diff options
| author | Marek Olšák <[email protected]> | 2016-12-24 22:57:46 +0100 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2017-01-05 18:43:23 +0100 |
| commit | 9a3296bf1cf8d45349b14b31eeb0d81f8b8774fc (patch) | |
| tree | 4faed51aca09cff74e2098b398379c723835e100 /src/gallium/drivers | |
| parent | d4c0ad4de8c4eeec1cc0478b12ce542e9a7faa0f (diff) | |
radeonsi: use SDMA for initial clearing of DCC/CMASK/HTILE on CIK-VI
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
| -rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.c | 5 | ||||
| -rw-r--r-- | src/gallium/drivers/radeon/r600_pipe_common.h | 3 | ||||
| -rw-r--r-- | src/gallium/drivers/radeon/r600_texture.c | 6 |
3 files changed, 6 insertions, 8 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c index a3198450923..9a8dda7669d 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.c +++ b/src/gallium/drivers/radeon/r600_pipe_common.c @@ -1351,13 +1351,12 @@ bool r600_extra_shader_checks(struct r600_common_screen *rscreen, unsigned proce } void r600_screen_clear_buffer(struct r600_common_screen *rscreen, struct pipe_resource *dst, - uint64_t offset, uint64_t size, unsigned value, - enum r600_coherency coher) + uint64_t offset, uint64_t size, unsigned value) { struct r600_common_context *rctx = (struct r600_common_context*)rscreen->aux_context; pipe_mutex_lock(rscreen->aux_context_lock); - rctx->clear_buffer(&rctx->b, dst, offset, size, value, coher); + rctx->dma_clear_buffer(&rctx->b, dst, offset, size, value); rscreen->aux_context->flush(rscreen->aux_context, NULL, 0); pipe_mutex_unlock(rscreen->aux_context_lock); } diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index da4b63c0b69..2bb622ab365 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -723,8 +723,7 @@ bool r600_can_dump_shader(struct r600_common_screen *rscreen, bool r600_extra_shader_checks(struct r600_common_screen *rscreen, unsigned processor); void r600_screen_clear_buffer(struct r600_common_screen *rscreen, struct pipe_resource *dst, - uint64_t offset, uint64_t size, unsigned value, - enum r600_coherency coher); + uint64_t offset, uint64_t size, unsigned value); struct pipe_resource *r600_resource_create_common(struct pipe_screen *screen, const struct pipe_resource *templ); const char *r600_get_llvm_processor_name(enum radeon_family family); diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index 259ff36800c..cba4e7d7340 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -890,7 +890,7 @@ static void r600_texture_allocate_htile(struct r600_common_screen *rscreen, } else { r600_screen_clear_buffer(rscreen, &rtex->htile_buffer->b.b, 0, rtex->surface.htile_size, - clear_value, R600_COHERENCY_NONE); + clear_value); } } @@ -1105,7 +1105,7 @@ r600_texture_create_object(struct pipe_screen *screen, /* Initialize the cmask to 0xCC (= compressed state). */ r600_screen_clear_buffer(rscreen, &rtex->cmask_buffer->b.b, rtex->cmask.offset, rtex->cmask.size, - 0xCCCCCCCC, R600_COHERENCY_NONE); + 0xCCCCCCCC); } /* Initialize DCC only if the texture is not being imported. */ @@ -1113,7 +1113,7 @@ r600_texture_create_object(struct pipe_screen *screen, r600_screen_clear_buffer(rscreen, &rtex->resource.b.b, rtex->dcc_offset, rtex->surface.dcc_size, - 0xFFFFFFFF, R600_COHERENCY_NONE); + 0xFFFFFFFF); } /* Initialize the CMASK base register value. */ |