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authorMarek Olšák <[email protected]>2016-04-30 01:21:22 +0200
committerMarek Olšák <[email protected]>2016-05-10 17:20:09 +0200
commit60946c0d60610b03bc297df17ec7a3cca1e5f6e8 (patch)
tree531093de54a63ab4ae98b5ac1495df343beb80c7 /src/gallium/drivers
parentbb74152597de44ee877b8928587b1cece8b49656 (diff)
gallium/radeon: add a heuristic for better (S)DMA performance
Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/radeon/r600_pipe_common.c14
-rw-r--r--src/gallium/drivers/radeon/radeon_winsys.h2
2 files changed, 16 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index ce8d76963a9..bc7f5f53e5d 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -176,6 +176,20 @@ void r600_dma_emit_wait_idle(struct r600_common_context *rctx)
/* done at the end of DMA calls, so increment this. */
rctx->num_dma_calls++;
+ /* IBs using too little memory are limited by the IB submission overhead.
+ * IBs using too much memory are limited by the kernel/TTM overhead.
+ * Too long IBs create CPU-GPU pipeline bubbles and add latency.
+ *
+ * This heuristic makes sure that DMA requests are executed
+ * very soon after the call is made and lowers memory usage.
+ * It improves texture upload performance by keeping the DMA
+ * engine busy while uploads are being submitted.
+ */
+ if (rctx->ws->cs_query_memory_usage(rctx->dma.cs) > 64 * 1024 * 1024) {
+ rctx->dma.flush(rctx, RADEON_FLUSH_ASYNC, NULL);
+ return;
+ }
+
r600_need_dma_space(rctx, 1, NULL, NULL);
if (cs->cdw == 0) /* empty queue */
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index 442a4613e96..e73fa14a17e 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -683,6 +683,8 @@ struct radeon_winsys {
*/
boolean (*cs_memory_below_limit)(struct radeon_winsys_cs *cs, uint64_t vram, uint64_t gtt);
+ uint64_t (*cs_query_memory_usage)(struct radeon_winsys_cs *cs);
+
/**
* Return the buffer list.
*