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authorKenneth Graunke <[email protected]>2019-02-15 14:22:52 -0800
committerKenneth Graunke <[email protected]>2019-02-21 10:26:12 -0800
commit51ddc4008429e61f80d64e63a8abc47392faa6d0 (patch)
tree6ca75543655f8d31d095b3a48edaf72fbbca8f0f /src/gallium/drivers
parentd6dd57d43cd019fb2ffd23f686307b1e6d02a0ef (diff)
iris: Always emit at least one BLEND_STATE
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/iris/iris_state.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 95c05f77757..bd222db4843 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -4140,7 +4140,14 @@ iris_upload_dirty_render_state(struct iris_context *ice,
struct pipe_framebuffer_state *cso_fb = &ice->state.framebuffer;
struct iris_depth_stencil_alpha_state *cso_zsa = ice->state.cso_zsa;
const int header_dwords = GENX(BLEND_STATE_length);
- const int rt_dwords = cso_fb->nr_cbufs * GENX(BLEND_STATE_ENTRY_length);
+
+ /* Always write at least one BLEND_STATE - the final RT message will
+ * reference BLEND_STATE[0] even if there aren't color writes. There
+ * may still be alpha testing, computed depth, and so on.
+ */
+ const int rt_dwords =
+ MAX2(cso_fb->nr_cbufs, 1) * GENX(BLEND_STATE_ENTRY_length);
+
uint32_t blend_offset;
uint32_t *blend_map =
stream_state(batch, ice->state.dynamic_uploader,