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authorCorbin Simpson <[email protected]>2009-02-02 15:39:30 -0800
committerCorbin Simpson <[email protected]>2009-02-02 15:39:30 -0800
commit33d798c4eab57293336082c7d011aa27af693bbb (patch)
tree6ba60210a9a7184cd1b873a94d3c5addb28bfbc7 /src/gallium/drivers
parenta2416e3d7ecb2fcf18d93a08bc3cc3639ed97b39 (diff)
r300: Move some registers around.
This fixes r500 hangs.
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/r300/r300_cs_inlines.h2
-rw-r--r--src/gallium/drivers/r300/r300_surface.c11
2 files changed, 6 insertions, 7 deletions
diff --git a/src/gallium/drivers/r300/r300_cs_inlines.h b/src/gallium/drivers/r300/r300_cs_inlines.h
index aa0e647008d..71e66236991 100644
--- a/src/gallium/drivers/r300/r300_cs_inlines.h
+++ b/src/gallium/drivers/r300/r300_cs_inlines.h
@@ -27,8 +27,10 @@
#ifdef R300_CS_H
#define R300_PACIFY do { \
+ OUT_CS_REG(R300_SC_SCREENDOOR, 0x0); \
OUT_CS_REG(RADEON_WAIT_UNTIL, (1 << 15) | (1 << 17) | \
(1 << 18) | (1 << 31)); \
+ OUT_CS_REG(R300_SC_SCREENDOOR, 0xffffff); \
} while (0)
diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c
index 3ffaee54b6c..4bccdbca29d 100644
--- a/src/gallium/drivers/r300/r300_surface.c
+++ b/src/gallium/drivers/r300/r300_surface.c
@@ -151,9 +151,7 @@ OUT_CS_REG(0x4F30, 0x00000000);
OUT_CS_REG(0x4F34, 0x00000000);
OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000);
OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000);
-OUT_CS_REG(R300_SC_SCREENDOOR, 0x00000000);
R300_PACIFY;
-OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF);
OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x21030003);
OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000000);
OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688);
@@ -263,9 +261,7 @@ OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) |
OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000);
OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000);
OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001);
-OUT_CS_REG(R300_SC_SCREENDOOR, 0x00000000);
R300_PACIFY;
-OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF);
/* XXX translate these back into normal instructions */
OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1);
OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0);
@@ -293,7 +289,8 @@ OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0, 1);
OUT_CS_RELOC(dest->buffer, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0);
-OUT_CS_REG(R300_RB3D_COLORPITCH0, (w >> 1) | R300_COLOR_TILE_ENABLE |
+/* XXX this should not be so rigid */
+OUT_CS_REG(R300_RB3D_COLORPITCH0, (w / 4) | R300_COLOR_TILE_ENABLE |
R300_COLOR_FORMAT_ARGB8888);
OUT_CS_REG(RB3D_COLOR_CHANNEL_MASK, 0x0000000F);
/* XXX Packet3 */
@@ -311,8 +308,8 @@ OUT_CS_32F(b);
OUT_CS_32F(1.0);
/* XXX figure out why this is 0xA and not 0x2 */
-/* XXX OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA);
-OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
+OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT, 0xA);
+/* XXX OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); */
R300_PACIFY;