diff options
| author | Nicolai Hähnle <[email protected]> | 2018-09-21 18:05:19 +0200 |
|---|---|---|
| committer | Nicolai Hähnle <[email protected]> | 2018-12-19 12:01:34 +0100 |
| commit | 0d58dcc3cff2f491f7c57c5c5c9d4b28e7f842b2 (patch) | |
| tree | da2e080b9618706e766040ccae8fe15453425430 /src/gallium/drivers | |
| parent | 23af72af25b26e290a903611e1aa5b5d1cb10b40 (diff) | |
radeonsi: don't set RAW_WAIT for CP DMA clears
There is never a read-after-write hazard because the command doesn't read.
Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_cp_dma.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c index 33220d9f0fa..80673f3f5f2 100644 --- a/src/gallium/drivers/radeonsi/si_cp_dma.c +++ b/src/gallium/drivers/radeonsi/si_cp_dma.c @@ -189,7 +189,8 @@ static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst if (!(user_flags & SI_CPDMA_SKIP_GFX_SYNC) && sctx->flags) si_emit_cache_flush(sctx); - if (!(user_flags & SI_CPDMA_SKIP_SYNC_BEFORE) && *is_first) + if (!(user_flags & SI_CPDMA_SKIP_SYNC_BEFORE) && *is_first && + !(*packet_flags & CP_DMA_CLEAR)) *packet_flags |= CP_DMA_RAW_WAIT; *is_first = false; |