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authorChristian König <[email protected]>2013-03-21 18:30:23 +0100
committerChristian König <[email protected]>2013-04-02 13:01:43 +0200
commitcf9b31f78a545ede480c2dc25937a07a96cf6656 (patch)
tree1588dee47b989df76d6f876087a473dadf40e038 /src/gallium/drivers
parente4ed58763ab6e948a20d6e66a54d10466dd0c4cc (diff)
radeonsi: add start instance support
This works different than on R600, we need to add the start instance manually. Signed-off-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]> Tested-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/radeonsi/radeonsi_shader.c13
-rw-r--r--src/gallium/drivers/radeonsi/radeonsi_shader.h12
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c6
3 files changed, 21 insertions, 10 deletions
diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c b/src/gallium/drivers/radeonsi/radeonsi_shader.c
index 62f478e1300..05125289a1f 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_shader.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_shader.c
@@ -351,11 +351,15 @@ static void declare_system_value(
unsigned index,
const struct tgsi_full_declaration *decl)
{
+ struct gallivm_state * gallivm = radeon_bld->soa.bld_base.base.gallivm;
+
LLVMValueRef value = 0;
switch (decl->Semantic.Name) {
case TGSI_SEMANTIC_INSTANCEID:
value = LLVMGetParam(radeon_bld->main_fn, SI_PARAM_INSTANCE_ID);
+ value = LLVMBuildAdd(gallivm->builder, value,
+ LLVMGetParam(radeon_bld->main_fn, SI_PARAM_START_INSTANCE), "");
break;
case TGSI_SEMANTIC_VERTEXID:
@@ -963,11 +967,12 @@ static void create_function(struct si_shader_context *si_shader_ctx)
if (si_shader_ctx->type == TGSI_PROCESSOR_VERTEX) {
params[SI_PARAM_VERTEX_BUFFER] = params[SI_PARAM_SAMPLER];
+ params[SI_PARAM_START_INSTANCE] = i32;
params[SI_PARAM_VERTEX_ID] = i32;
params[SI_PARAM_DUMMY_0] = i32;
params[SI_PARAM_DUMMY_1] = i32;
params[SI_PARAM_INSTANCE_ID] = i32;
- radeon_llvm_create_func(&si_shader_ctx->radeon_bld, params, 8);
+ radeon_llvm_create_func(&si_shader_ctx->radeon_bld, params, 9);
} else {
params[SI_PARAM_PRIM_MASK] = i32;
@@ -995,6 +1000,12 @@ static void create_function(struct si_shader_context *si_shader_ctx)
LLVMValueRef P = LLVMGetParam(si_shader_ctx->radeon_bld.main_fn, i);
LLVMAddAttribute(P, LLVMInRegAttribute);
}
+
+ if (si_shader_ctx->type == TGSI_PROCESSOR_VERTEX) {
+ LLVMValueRef P = LLVMGetParam(si_shader_ctx->radeon_bld.main_fn,
+ SI_PARAM_START_INSTANCE);
+ LLVMAddAttribute(P, LLVMInRegAttribute);
+ }
}
static void preload_constants(struct si_shader_context *si_shader_ctx)
diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.h b/src/gallium/drivers/radeonsi/radeonsi_shader.h
index 8f5efd01135..9dae742115f 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_shader.h
+++ b/src/gallium/drivers/radeonsi/radeonsi_shader.h
@@ -33,8 +33,9 @@
#define SI_SGPR_SAMPLER 2
#define SI_SGPR_RESOURCE 4
#define SI_SGPR_VERTEX_BUFFER 6
+#define SI_SGPR_START_INSTANCE 8
-#define SI_VS_NUM_USER_SGPR 8
+#define SI_VS_NUM_USER_SGPR 9
#define SI_PS_NUM_USER_SGPR 6
/* LLVM function parameter indices */
@@ -44,10 +45,11 @@
/* VS only parameters */
#define SI_PARAM_VERTEX_BUFFER 3
-#define SI_PARAM_VERTEX_ID 4
-#define SI_PARAM_DUMMY_0 5
-#define SI_PARAM_DUMMY_1 6
-#define SI_PARAM_INSTANCE_ID 7
+#define SI_PARAM_START_INSTANCE 4
+#define SI_PARAM_VERTEX_ID 5
+#define SI_PARAM_DUMMY_0 6
+#define SI_PARAM_DUMMY_1 7
+#define SI_PARAM_INSTANCE_ID 8
/* PS only parameters */
#define SI_PARAM_PRIM_MASK 3
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index d357d64939b..0deb06f2242 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -279,10 +279,8 @@ static bool si_update_draw_info_state(struct r600_context *rctx,
info->indexed ? info->index_bias : info->start);
si_pm4_set_reg(pm4, R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX, info->restart_index);
si_pm4_set_reg(pm4, R_028A94_VGT_MULTI_PRIM_IB_RESET_EN, info->primitive_restart);
-#if 0
- si_pm4_set_reg(pm4, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0);
- si_pm4_set_reg(pm4, R_03CFF4_SQ_VTX_START_INST_LOC, info->start_instance);
-#endif
+ si_pm4_set_reg(pm4, R_00B130_SPI_SHADER_USER_DATA_VS_0 + SI_SGPR_START_INSTANCE * 4,
+ info->start_instance);
if (prim == V_008958_DI_PT_LINELIST)
ls_mask = 1;