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authorSamuel Pitoiset <[email protected]>2019-08-23 08:52:07 +0200
committerSamuel Pitoiset <[email protected]>2019-08-27 08:04:47 +0200
commitfd54fc85aa6ad6f6d904ee7d7cf9955257fa703f (patch)
treeee6b79c9bf11a746435f1740de81e2d2c395d933 /src/gallium/drivers
parent1bf2572dff511562cc23b3d9e920e101f0aea134 (diff)
ac: add has_ls_vgpr_init_bug to ac_gpu_info
Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c2
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.h1
-rw-r--r--src/gallium/drivers/radeonsi/si_shader.c2
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c2
4 files changed, 2 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index d3dcab3ccce..fef44836ea2 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -1135,8 +1135,6 @@ radeonsi_screen_create_impl(struct radeon_winsys *ws,
#include "si_debug_options.h"
}
- sscreen->has_ls_vgpr_init_bug = sscreen->info.family == CHIP_VEGA10 ||
- sscreen->info.family == CHIP_RAVEN;
sscreen->use_ngg = sscreen->info.chip_class >= GFX10;
sscreen->use_ngg_streamout = sscreen->info.chip_class >= GFX10;
diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h
index 2d0b83fcf33..7acef0cfef4 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.h
+++ b/src/gallium/drivers/radeonsi/si_pipe.h
@@ -495,7 +495,6 @@ struct si_screen {
bool has_out_of_order_rast;
bool assume_no_z_fights;
bool commutative_blend_add;
- bool has_ls_vgpr_init_bug;
bool dpbb_allowed;
bool dfsm_allowed;
bool llvm_has_working_vgpr_indexing;
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index b8609e49fe1..28003d1bad2 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -7406,7 +7406,7 @@ static void si_build_vs_prolog_function(struct si_shader_context *ctx,
si_init_exec_from_input(ctx, 3, 0);
if (key->vs_prolog.as_ls &&
- ctx->screen->has_ls_vgpr_init_bug) {
+ ctx->screen->info.has_ls_vgpr_init_bug) {
/* If there are no HS threads, SPI loads the LS VGPRs
* starting at VGPR 0. Shift them back to where they
* belong.
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 788697db02e..586925ef727 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -1833,7 +1833,7 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
}
if (sctx->tes_shader.cso &&
- sctx->screen->has_ls_vgpr_init_bug) {
+ sctx->screen->info.has_ls_vgpr_init_bug) {
/* Determine whether the LS VGPR fix should be applied.
*
* It is only required when num input CPs > num output CPs,