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authorSagar Ghuge <[email protected]>2019-08-14 13:58:57 -0700
committerSagar Ghuge <[email protected]>2019-10-29 14:46:15 -0700
commit81de49a9f28482d262c875569ca1412989e88b06 (patch)
tree5902c00a0878b1f0daaf31441632346bcc4db1c3 /src/gallium/drivers
parentb8223991b5f2296ed22122cdf8a773cabd8f2f0f (diff)
iris: Prepare stencil resource before clear depth stencil
Let aux surface state tracker track the stencil buffer's aux state while clearing depth stencil buffer. v2: Fix condition check (Nanley Chery) Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Nanley Chery <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/iris/iris_clear.c12
1 files changed, 10 insertions, 2 deletions
diff --git a/src/gallium/drivers/iris/iris_clear.c b/src/gallium/drivers/iris/iris_clear.c
index 309fda66665..cdc96471ce7 100644
--- a/src/gallium/drivers/iris/iris_clear.c
+++ b/src/gallium/drivers/iris/iris_clear.c
@@ -590,7 +590,10 @@ clear_depth_stencil(struct iris_context *ice,
struct blorp_batch blorp_batch;
blorp_batch_init(&ice->blorp, &blorp_batch, batch, blorp_flags);
- if (stencil_res) {
+ uint8_t stencil_mask = clear_stencil && stencil_res ? 0xff : 0;
+ if (stencil_mask) {
+ iris_resource_prepare_access(ice, batch, stencil_res, level, 1, box->z,
+ box->depth, stencil_res->aux.usage, false);
iris_blorp_surf_for_resource(&ice->vtbl, &stencil_surf,
&stencil_res->base, stencil_res->aux.usage,
level, true);
@@ -602,7 +605,7 @@ clear_depth_stencil(struct iris_context *ice,
box->x + box->width,
box->y + box->height,
clear_depth && z_res, depth,
- clear_stencil && stencil_res ? 0xff : 0, stencil);
+ stencil_mask, stencil);
blorp_batch_finish(&blorp_batch);
iris_flush_and_dirty_for_history(ice, batch, res, 0,
@@ -612,6 +615,11 @@ clear_depth_stencil(struct iris_context *ice,
iris_resource_finish_depth(ice, z_res, level,
box->z, box->depth, true);
}
+
+ if (stencil_mask) {
+ iris_resource_finish_write(ice, stencil_res, level, box->z, box->depth,
+ stencil_res->aux.usage);
+ }
}
/**