diff options
| author | Marek Olšák <[email protected]> | 2018-10-17 12:26:54 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2018-10-18 16:08:56 -0400 |
| commit | 77bcbe712e5224043101bdfc19aee7038bc8b0ee (patch) | |
| tree | e6817f8e66a8e679e93bdd604638ca64557536af /src/gallium/drivers | |
| parent | eae8f49fc65e6e625f5e05d38c3bf1b61b84bd3d (diff) | |
radeonsi: clamp point size to the limit
This fixes dEQP-GLES2.functional.rasterization.limits.points.
Broken by: ea039f789d9b54e1bd1d644b6a29863ca3500314
Tested-by: Jakob Bornecrantz <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_get.c | 5 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.h | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 2 |
3 files changed, 5 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c index ac302b8a946..804276b3eda 100644 --- a/src/gallium/drivers/radeonsi/si_get.c +++ b/src/gallium/drivers/radeonsi/si_get.c @@ -333,11 +333,12 @@ static float si_get_paramf(struct pipe_screen* pscreen, enum pipe_capf param) switch (param) { case PIPE_CAPF_MAX_LINE_WIDTH: case PIPE_CAPF_MAX_LINE_WIDTH_AA: - case PIPE_CAPF_MAX_POINT_WIDTH: - case PIPE_CAPF_MAX_POINT_WIDTH_AA: /* This depends on the quant mode, though the precise interactions * are unknown. */ return 2048; + case PIPE_CAPF_MAX_POINT_WIDTH: + case PIPE_CAPF_MAX_POINT_WIDTH_AA: + return SI_MAX_POINT_SIZE; case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY: return 16.0f; case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS: diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index 6edc06cece7..dc95afb7421 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -48,6 +48,7 @@ #define SI_BASE_VERTEX_UNKNOWN INT_MIN #define SI_RESTART_INDEX_UNKNOWN INT_MIN #define SI_NUM_SMOOTH_AA_SAMPLES 8 +#define SI_MAX_POINT_SIZE 2048 #define SI_GS_PER_ES 128 /* Alignment for optimal CP DMA performance. */ #define SI_CPDMA_ALIGNMENT 32 diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 8b2e6e57f45..176ec749148 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -898,7 +898,7 @@ static void *si_create_rs_state(struct pipe_context *ctx, if (state->point_size_per_vertex) { psize_min = util_get_min_point_size(state); - psize_max = 8192; + psize_max = SI_MAX_POINT_SIZE; } else { /* Force the point size to be as if the vertex output was disabled. */ psize_min = state->point_size; |