diff options
| author | Marek Olšák <[email protected]> | 2016-10-23 21:03:40 +0200 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2016-10-26 13:02:58 +0200 |
| commit | 67a44c97afb72812639039eb4594592c91c9ead5 (patch) | |
| tree | a80c7cf0f19e41f47b219c4de32c18a84b127839 /src/gallium/drivers | |
| parent | 7a706ad25cefc666b54ddf778d047691a575b689 (diff) | |
gallium/radeon: remove flags specific to libdrm_radeon from winsys interface
These just say whether libdrm can assume that the latest radeon_surface
definition is used by Mesa.
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
| -rw-r--r-- | src/gallium/drivers/radeon/r600_texture.c | 14 | ||||
| -rw-r--r-- | src/gallium/drivers/radeon/radeon_winsys.h | 3 |
2 files changed, 3 insertions, 14 deletions
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index 4d4be972175..dcfa7cd4abe 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -233,14 +233,8 @@ static int r600_init_surface(struct r600_common_screen *rscreen, flags |= RADEON_SURF_TC_COMPATIBLE_HTILE; } - if (is_stencil) { - flags |= RADEON_SURF_SBUFFER | - RADEON_SURF_HAS_SBUFFER_MIPTREE; - } - } - - if (rscreen->chip_class >= SI) { - flags |= RADEON_SURF_HAS_TILE_MODE_INDEX; + if (is_stencil) + flags |= RADEON_SURF_SBUFFER; } if (rscreen->chip_class >= VI && @@ -605,10 +599,6 @@ void r600_texture_get_fmask_info(struct r600_common_screen *rscreen, fmask.mtilea = rtex->surface.mtilea; fmask.tile_split = rtex->surface.tile_split; - if (rscreen->chip_class >= SI) { - flags |= RADEON_SURF_HAS_TILE_MODE_INDEX; - } - switch (nr_samples) { case 2: case 4: diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h index bf4bb8251ae..29b64c0238e 100644 --- a/src/gallium/drivers/radeon/radeon_winsys.h +++ b/src/gallium/drivers/radeon/radeon_winsys.h @@ -268,8 +268,7 @@ enum radeon_surf_mode { #define RADEON_SURF_ZBUFFER (1 << 17) #define RADEON_SURF_SBUFFER (1 << 18) #define RADEON_SURF_Z_OR_SBUFFER (RADEON_SURF_ZBUFFER | RADEON_SURF_SBUFFER) -#define RADEON_SURF_HAS_SBUFFER_MIPTREE (1 << 19) -#define RADEON_SURF_HAS_TILE_MODE_INDEX (1 << 20) +/* bits 19 and 20 are reserved for libdrm_radeon, don't use them */ #define RADEON_SURF_FMASK (1 << 21) #define RADEON_SURF_DISABLE_DCC (1 << 22) #define RADEON_SURF_TC_COMPATIBLE_HTILE (1 << 23) |