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authorRob Clark <[email protected]>2019-06-11 10:38:19 -0700
committerRob Clark <[email protected]>2019-06-15 07:33:04 -0700
commit363a9ed614b343d75482f42fbd32d7616070d8ea (patch)
treefb16d6c0c79a933b62bf4332745b4b1e7e427448 /src/gallium/drivers
parenta96ae18de68afed354cadb43de4a75297f15eea5 (diff)
freedreno/a6xx: handle z24s8/z24x8 blits with u_blitter
Now that it can turn these blits into rendering to RB6_Z24_UNORM_S8_UINT it can properly handle cases where only one of depth+stencil is being blit. And this avoids lying about he format, which completely doesn't work when UBWC is used. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_blitter.c33
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_format.c3
2 files changed, 11 insertions, 25 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
index a196a4c427e..3b7020510b0 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.c
@@ -638,32 +638,15 @@ handle_zs_blit(struct fd_context *ctx, const struct pipe_blit_info *info)
return do_rewritten_blit(ctx, &blit);
case PIPE_FORMAT_Z24X8_UNORM:
- blit.mask = PIPE_MASK_R;
- blit.src.format = PIPE_FORMAT_R32_UINT;
- blit.dst.format = PIPE_FORMAT_R32_UINT;
- return do_rewritten_blit(ctx, &blit);
-
case PIPE_FORMAT_Z24_UNORM_S8_UINT:
- switch (info->mask) {
- case PIPE_MASK_ZS:
- blit.mask = PIPE_MASK_R;
- blit.src.format = PIPE_FORMAT_R32_UINT;
- blit.dst.format = PIPE_FORMAT_R32_UINT;
- return do_rewritten_blit(ctx, &blit);
- case PIPE_MASK_Z:
- blit.mask = PIPE_MASK_R | PIPE_MASK_G | PIPE_MASK_B;
- blit.src.format = PIPE_FORMAT_R8G8B8A8_UNORM;
- blit.dst.format = PIPE_FORMAT_R8G8B8A8_UNORM;
- return fd_blitter_blit(ctx, &blit);
- case PIPE_MASK_S:
- blit.mask = PIPE_MASK_A;
- blit.src.format = PIPE_FORMAT_R8G8B8A8_UNORM;
- blit.dst.format = PIPE_FORMAT_R8G8B8A8_UNORM;
- return fd_blitter_blit(ctx, &blit);
- default:
- unreachable("");
- }
- return true;
+ blit.mask = 0;
+ if (info->mask & PIPE_MASK_Z)
+ blit.mask |= PIPE_MASK_R | PIPE_MASK_G | PIPE_MASK_B;
+ if (info->mask & PIPE_MASK_S)
+ blit.mask |= PIPE_MASK_A;
+ blit.src.format = PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8;
+ blit.dst.format = PIPE_FORMAT_Z24_UNORM_S8_UINT_AS_R8G8B8A8;
+ return fd_blitter_blit(ctx, &blit);
default:
return false;
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_format.c b/src/gallium/drivers/freedreno/a6xx/fd6_format.c
index 9448ff18e54..492de2edfcd 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_format.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_format.c
@@ -222,6 +222,9 @@ static struct fd6_format formats[PIPE_FORMAT_COUNT] = {
_T(Z32_FLOAT_S8X24_UINT, 32_FLOAT, R32_FLOAT, WZYX),
_T(X32_S8X24_UINT, 8_UINT, R8_UINT, WZYX),
+ /* special format for blits: */
+ _T(Z24_UNORM_S8_UINT_AS_R8G8B8A8, Z24_UNORM_S8_UINT, Z24_UNORM_S8_UINT, WZYX),
+
/* 48-bit */
V_(R16G16B16_UNORM, 16_16_16_UNORM, NONE, WZYX),
V_(R16G16B16_SNORM, 16_16_16_SNORM, NONE, WZYX),