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authorRob Clark <[email protected]>2018-03-31 14:14:31 -0400
committerRob Clark <[email protected]>2018-03-31 15:13:11 -0400
commite04e068f75e82238a8964a6210cd40711805a458 (patch)
tree01627fec950cc876a18247c09e45bd2ef6e3eaaa /src/gallium/drivers
parent1f45320e5105e58d574d64b510ff165f6cda0751 (diff)
freedreno/ir3: add helper to create immed of specified size
We'll also need to be able to create a half-precision immediate. So re-work create_immed(). Prep work for following patch. Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c15
1 files changed, 11 insertions, 4 deletions
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
index 337054cd110..1481510a5dd 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_compiler_nir.c
@@ -505,20 +505,27 @@ put_dst(struct ir3_context *ctx, nir_dest *dst)
}
static struct ir3_instruction *
-create_immed(struct ir3_block *block, uint32_t val)
+create_immed_typed(struct ir3_block *block, uint32_t val, type_t type)
{
struct ir3_instruction *mov;
+ unsigned flags = (type_size(type) < 32) ? IR3_REG_HALF : 0;
mov = ir3_instr_create(block, OPC_MOV);
- mov->cat1.src_type = TYPE_U32;
- mov->cat1.dst_type = TYPE_U32;
- ir3_reg_create(mov, 0, 0);
+ mov->cat1.src_type = type;
+ mov->cat1.dst_type = type;
+ ir3_reg_create(mov, 0, flags);
ir3_reg_create(mov, 0, IR3_REG_IMMED)->uim_val = val;
return mov;
}
static struct ir3_instruction *
+create_immed(struct ir3_block *block, uint32_t val)
+{
+ return create_immed_typed(block, val, TYPE_U32);
+}
+
+static struct ir3_instruction *
create_addr(struct ir3_block *block, struct ir3_instruction *src, int align)
{
struct ir3_instruction *instr, *immed;