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authorMarek Olšák <[email protected]>2018-05-02 19:11:37 -0400
committerMarek Olšák <[email protected]>2018-05-10 18:40:01 -0400
commit64265ac8d53367c143050df9a8b08b224185e9ae (patch)
tree668c6568ba0982b5fc80ad5499b453a1fddbf086 /src/gallium/drivers
parent14c5a93bfabdc6543b504a0e7ed658e215b4eedb (diff)
ac/gpu_info: add kernel_flushes_tc_l2_after_ib
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/radeonsi/si_gfx_cs.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c
index 0af16dd3474..ec74c1bc703 100644
--- a/src/gallium/drivers/radeonsi/si_gfx_cs.c
+++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c
@@ -74,8 +74,7 @@ void si_flush_gfx_cs(struct si_context *ctx, unsigned flags,
if (ctx->gfx_flush_in_progress)
return;
- if (ctx->chip_class == VI && ctx->screen->info.drm_minor <= 1) {
- /* DRM 3.1.0 doesn't flush TC for VI correctly. */
+ if (!ctx->screen->info.kernel_flushes_tc_l2_after_ib) {
wait_flags |= SI_CONTEXT_PS_PARTIAL_FLUSH |
SI_CONTEXT_CS_PARTIAL_FLUSH |
SI_CONTEXT_INV_GLOBAL_L2;