diff options
author | Andrii Simiklit <[email protected]> | 2019-04-25 11:19:46 +0300 |
---|---|---|
committer | Kenneth Graunke <[email protected]> | 2019-04-25 11:48:04 -0700 |
commit | 4e9592c5fa249df11d9aab665f49f26f3d428d77 (patch) | |
tree | 010da62a3442fe0c9a838dc8fae73af6686773fc /src/gallium/drivers | |
parent | aa7306b4cfcae3898f5b8ff2ef3022a0e6329649 (diff) |
iris: make the TFB result visible to others
OpenGL 4.6 Spec:
"5.3.3 Rules
.......
Note: “Updates” via rendering or transform feedback
are treated consistently with updates via GL commands.
Once EndTransformFeedback has been issued, any subsequent
command in the same context that uses the results of the
transform feedback operation will see the results."
v2: removed a wrong comment
( Kenneth Graunke <[email protected]> )
v3: - flush+dirty depends on buffers usage history
- removed an old hack
( Kenneth Graunke <[email protected]> )
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110404
Signed-off-by: Andrii Simiklit <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r-- | src/gallium/drivers/iris/iris_state.c | 25 |
1 files changed, 15 insertions, 10 deletions
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index c0c0ed02e71..6802cb22d11 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -2954,8 +2954,22 @@ iris_set_stream_output_targets(struct pipe_context *ctx, * may have missed emitting it earlier, so do so now. (We're already * taking a stall to update 3DSTATE_SO_BUFFERS anyway...) */ - if (active) + if (active) { ice->state.dirty |= IRIS_DIRTY_SO_DECL_LIST; + } else { + uint32_t flush = 0; + for (int i = 0; i < PIPE_MAX_SO_BUFFERS; i++) { + struct iris_stream_output_target *tgt = + (void *) ice->state.so_target[i]; + if (tgt) { + struct iris_resource *res = (void *) tgt->base.buffer; + + flush |= iris_flush_bits_for_history(res); + iris_dirty_for_history(ice, res); + } + } + iris_emit_pipe_control_flush(&ice->batches[IRIS_BATCH_RENDER], flush); + } } for (int i = 0; i < 4; i++) { @@ -4980,15 +4994,6 @@ iris_upload_dirty_render_state(struct iris_context *ice, PIPE_CONTROL_CS_STALL; ice->state.last_vbo_high_bits[i] = high_bits; } - - /* If the buffer was written to by streamout, we may need - * to stall so those writes land and become visible to the - * vertex fetcher. - * - * TODO: This may stall more than necessary. - */ - if (res->bind_history & PIPE_BIND_STREAM_OUTPUT) - flush_flags |= PIPE_CONTROL_CS_STALL; } } |