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authorMarek Olšák <[email protected]>2016-12-29 19:00:43 +0100
committerMarek Olšák <[email protected]>2017-01-05 18:43:23 +0100
commit067a3237b955cc2a789caf34ad0d8afa54d9cac3 (patch)
tree6b2fce901ab27718955d435b3211afc4b031412d /src/gallium/drivers
parentf6a1c2d883ebaa38cadee3d99abffbda204876e1 (diff)
radeonsi: also wait for SDMA in the clear_buffer CPU fallback
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/radeonsi/si_cp_dma.c5
1 files changed, 2 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c b/src/gallium/drivers/radeonsi/si_cp_dma.c
index b25598cde6b..722ac4d2c23 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -184,9 +184,8 @@ static void si_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
/* Fallback for unaligned clears. */
if (offset % 4 != 0 || size % 4 != 0) {
- uint8_t *map = sctx->b.ws->buffer_map(r600_resource(dst)->buf,
- sctx->b.gfx.cs,
- PIPE_TRANSFER_WRITE);
+ uint8_t *map = r600_buffer_map_sync_with_rings(&sctx->b, rdst,
+ PIPE_TRANSFER_WRITE);
map += offset;
for (uint64_t i = 0; i < size; i++) {
unsigned byte_within_dword = (offset + i) % 4;