diff options
| author | Marek Olšák <[email protected]> | 2018-05-02 18:27:18 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2018-05-10 18:39:47 -0400 |
| commit | b81149e258a492ed0c81058fb535f6bfdacb36da (patch) | |
| tree | d7c2da10d3fa6f9c0af31da01c560f721b1a9e34 /src/gallium/drivers | |
| parent | a969f184cf3e8f2d9089fc4df424fa590f967983 (diff) | |
ac/gpu_info: add kernel_flushes_hdp_before_ib
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_buffer.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeonsi/si_buffer.c b/src/gallium/drivers/radeonsi/si_buffer.c index 504e0c723dc..2d68edc3404 100644 --- a/src/gallium/drivers/radeonsi/si_buffer.c +++ b/src/gallium/drivers/radeonsi/si_buffer.c @@ -125,8 +125,7 @@ void si_init_resource_fields(struct si_screen *sscreen, /* Older kernels didn't always flush the HDP cache before * CS execution */ - if (sscreen->info.drm_major == 2 && - sscreen->info.drm_minor < 40) { + if (!sscreen->info.kernel_flushes_hdp_before_ib) { res->domains = RADEON_DOMAIN_GTT; res->flags |= RADEON_FLAG_GTT_WC; break; @@ -153,8 +152,7 @@ void si_init_resource_fields(struct si_screen *sscreen, * ensures all CPU writes finish before the GPU * executes a command stream. */ - if (sscreen->info.drm_major == 2 && - sscreen->info.drm_minor < 40) + if (!sscreen->info.kernel_flushes_hdp_before_ib) res->domains = RADEON_DOMAIN_GTT; } |