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authorEric Anholt <[email protected]>2016-11-22 13:51:03 -0800
committerEric Anholt <[email protected]>2016-11-22 16:46:03 -0800
commit9728887e7f1e19402b4b7463b44153b3a6e266c0 (patch)
tree043491598b329370901ee7ddf4c8b234db345094 /src/gallium/drivers
parentff018e0979458636a1e3ad555a39ec4393206343 (diff)
vc4: Disable MSAA rasterization when the job binning is single-sampled.
Gallium core just changed to start setting MSAA enabled in the rasterizer state even with samples==1 buffers. This caused disagreements in our driver between binning and rasterization state, which the simulator threw assertion failures about. Keep the single-sampled samples==1 behavior for now.
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/vc4/vc4_emit.c15
1 files changed, 13 insertions, 2 deletions
diff --git a/src/gallium/drivers/vc4/vc4_emit.c b/src/gallium/drivers/vc4/vc4_emit.c
index 9258ceebe33..b48d89a0604 100644
--- a/src/gallium/drivers/vc4/vc4_emit.c
+++ b/src/gallium/drivers/vc4/vc4_emit.c
@@ -76,6 +76,7 @@ vc4_emit_state(struct pipe_context *pctx)
VC4_DIRTY_ZSA |
VC4_DIRTY_COMPILED_FS)) {
uint8_t ez_enable_mask_out = ~0;
+ uint8_t rasosm_mask_out = ~0;
/* HW-2905: If the RCL ends up doing a full-res load when
* multisampling, then early Z tracking may end up with values
@@ -89,10 +90,20 @@ vc4_emit_state(struct pipe_context *pctx)
if (job->msaa || vc4->prog.fs->disable_early_z)
ez_enable_mask_out &= ~VC4_CONFIG_BITS_EARLY_Z;
+ /* Don't set the rasterizer to oversample if we're doing our
+ * binning and load/stores in single-sample mode. This is for
+ * the samples == 1 case, where vc4 doesn't do any
+ * multisampling behavior.
+ */
+ if (!job->msaa) {
+ rasosm_mask_out &=
+ ~VC4_CONFIG_BITS_RASTERIZER_OVERSAMPLE_4X;
+ }
+
cl_u8(&bcl, VC4_PACKET_CONFIGURATION_BITS);
cl_u8(&bcl,
- vc4->rasterizer->config_bits[0] |
- vc4->zsa->config_bits[0]);
+ (vc4->rasterizer->config_bits[0] |
+ vc4->zsa->config_bits[0]) & rasosm_mask_out);
cl_u8(&bcl,
vc4->rasterizer->config_bits[1] |
vc4->zsa->config_bits[1]);