diff options
| author | Eric Anholt <[email protected]> | 2015-12-18 11:41:38 -0800 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2015-12-18 17:09:03 -0800 |
| commit | 960f48809ffebca14af27ce9e87eabc04dfe9b84 (patch) | |
| tree | fe1e82a0e38b1ea22f06417e12417faa750e7c0a /src/gallium/drivers | |
| parent | 5dc22cadb5ed4a7cf8c7d1cbaf7296c27e567e0f (diff) | |
vc4: Keep sample mask writes from being reordered after TLB writes
Fixes a regression I noticed after introducing scheduling on the QIR.
Cc: "11.1" <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
| -rw-r--r-- | src/gallium/drivers/vc4/vc4_qpu_schedule.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/gallium/drivers/vc4/vc4_qpu_schedule.c b/src/gallium/drivers/vc4/vc4_qpu_schedule.c index 98b7b6070d7..76cad2e03fe 100644 --- a/src/gallium/drivers/vc4/vc4_qpu_schedule.c +++ b/src/gallium/drivers/vc4/vc4_qpu_schedule.c @@ -259,7 +259,8 @@ process_waddr_deps(struct schedule_state *state, struct schedule_node *n, } } else if (is_tmu_write(waddr)) { add_write_dep(state, &state->last_tmu_write, n); - } else if (qpu_waddr_is_tlb(waddr)) { + } else if (qpu_waddr_is_tlb(waddr) || + waddr == QPU_W_MS_FLAGS) { add_write_dep(state, &state->last_tlb, n); } else { switch (waddr) { |