diff options
| author | Bas Nieuwenhuizen <[email protected]> | 2016-04-21 01:22:02 +0200 |
|---|---|---|
| committer | Bas Nieuwenhuizen <[email protected]> | 2016-04-21 12:50:58 +0200 |
| commit | 4d13c7c8794082400e383ac6d76eb6ba753dcb0f (patch) | |
| tree | 05f2edfbb09e83f9a0faa2b458e910ea95811150 /src/gallium/drivers | |
| parent | f45f54e14ac54460f2785bc14fc1f9220a0a763d (diff) | |
radeonsi: Enable loading into CE RAM.
We need to enable a bit in the CONTEXT_CONTROL packet for the
loads to work.
v2: Style issues.
Signed-off-by: Bas Nieuwenhuizen <[email protected]>
Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_descriptors.c | 8 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_hw_context.c | 5 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.h | 1 |
3 files changed, 14 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c index 1580e61e17f..2306a8b23ec 100644 --- a/src/gallium/drivers/radeonsi/si_descriptors.c +++ b/src/gallium/drivers/radeonsi/si_descriptors.c @@ -185,6 +185,14 @@ static void si_reinitialize_ce_ram(struct si_context *sctx, desc->ce_ram_dirty = false; } +void si_ce_enable_loads(struct radeon_winsys_cs *ib) +{ + radeon_emit(ib, PKT3(PKT3_CONTEXT_CONTROL, 1, 0)); + radeon_emit(ib, CONTEXT_CONTROL_LOAD_ENABLE(1) | + CONTEXT_CONTROL_LOAD_CE_RAM(1)); + radeon_emit(ib, CONTEXT_CONTROL_SHADOW_ENABLE(1)); +} + static bool si_upload_descriptors(struct si_context *sctx, struct si_descriptors *desc, struct r600_atom * atom) diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c index e3abb7f67cc..e6018f3b29d 100644 --- a/src/gallium/drivers/radeonsi/si_hw_context.c +++ b/src/gallium/drivers/radeonsi/si_hw_context.c @@ -202,6 +202,11 @@ void si_begin_new_cs(struct si_context *ctx) if (ctx->init_config_gs_rings) si_pm4_emit(ctx, ctx->init_config_gs_rings); + if (ctx->ce_preamble_ib) + si_ce_enable_loads(ctx->ce_preamble_ib); + else if (ctx->ce_ib) + si_ce_enable_loads(ctx->ce_ib); + ctx->framebuffer.dirty_cbufs = (1 << 8) - 1; ctx->framebuffer.dirty_zsbuf = true; si_mark_atom_dirty(ctx, &ctx->framebuffer.atom); diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index c4b2b458241..cbe91dd43d7 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -251,6 +251,7 @@ struct si_buffer_resources { } while(0) /* si_descriptors.c */ +void si_ce_enable_loads(struct radeon_winsys_cs *ib); void si_set_ring_buffer(struct pipe_context *ctx, uint shader, uint slot, struct pipe_resource *buffer, unsigned stride, unsigned num_records, |