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authorMarek Olšák <[email protected]>2016-06-06 11:28:16 +0200
committerMarek Olšák <[email protected]>2016-06-08 00:22:45 +0200
commita01536a29fdebfcdf7781e28a66b3b2abba943c8 (patch)
tree547f22512b637f839cd9ec589e5ff5a07903069c /src/gallium/drivers
parentd4d733e39de2fc75aaa17d95998abdf19219cb38 (diff)
gallium/radeon: add an assertion checking the validity of PIPE_BIND_SCANOUT
Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/radeon/r600_texture.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 0f72a6d64af..ca91c37ae17 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -266,9 +266,6 @@ static int r600_init_surface(struct r600_common_screen *rscreen,
default:
return -EINVAL;
}
- if (ptex->bind & PIPE_BIND_SCANOUT) {
- surface->flags |= RADEON_SURF_SCANOUT;
- }
if (!is_flushed_depth && is_depth) {
surface->flags |= RADEON_SURF_ZBUFFER;
@@ -286,6 +283,16 @@ static int r600_init_surface(struct r600_common_screen *rscreen,
ptex->format == PIPE_FORMAT_R9G9B9E5_FLOAT)
surface->flags |= RADEON_SURF_DISABLE_DCC;
+ if (ptex->bind & PIPE_BIND_SCANOUT) {
+ /* This should catch bugs in gallium users setting incorrect flags. */
+ assert(surface->nsamples == 1 &&
+ surface->array_size == 1 &&
+ surface->npix_z == 1 &&
+ surface->last_level == 0 &&
+ !(surface->flags & RADEON_SURF_Z_OR_SBUFFER));
+
+ surface->flags |= RADEON_SURF_SCANOUT;
+ }
return 0;
}