radeonsi: merge si_tessctrl_info into si_shader_info

Reviewed-by: Timothy Arceri <[email protected]>

4 files changed, 10 insertions, 23 deletions

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 2618c2c51bc..e5581b9e25c 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -1053,7 +1053,7 @@ static void si_nir_store_output_tcs(struct ac_shader_abi *abi,
 			    name == TGSI_SEMANTIC_TESSOUTER) {
 				/* The epilog doesn't read LDS if invocation 0 defines tess factors. */
 				skip_lds_store = !info->reads_tessfactor_outputs &&
-						 ctx->shader->selector->tcs_info.tessfactors_are_def_in_all_invocs;
+						 ctx->shader->selector->info.tessfactors_are_def_in_all_invocs;
 				is_tess_factor = true;
 				is_tess_inner = name == TGSI_SEMANTIC_TESSINNER;
 			}
@@ -1098,7 +1098,7 @@ static void si_nir_store_output_tcs(struct ac_shader_abi *abi,
 
 		/* Write tess factors into VGPRs for the epilog. */
 		if (is_tess_factor &&
-		    ctx->shader->selector->tcs_info.tessfactors_are_def_in_all_invocs) {
+		    ctx->shader->selector->info.tessfactors_are_def_in_all_invocs) {
 			if (!is_tess_inner) {
 				LLVMBuildStore(ctx->ac.builder, value, /* outer */
 					       ctx->invoc0_tess_factors[chan]);
@@ -2604,7 +2604,7 @@ static void si_llvm_emit_tcs_epilogue(struct ac_shader_abi *abi,
 	ret = LLVMBuildInsertValue(builder, ret, rel_patch_id, vgpr++, "");
 	ret = LLVMBuildInsertValue(builder, ret, invocation_id, vgpr++, "");
 
-	if (ctx->shader->selector->tcs_info.tessfactors_are_def_in_all_invocs) {
+	if (ctx->shader->selector->info.tessfactors_are_def_in_all_invocs) {
 		vgpr++; /* skip the tess factor LDS offset */
 		for (unsigned i = 0; i < 6; i++) {
 			LLVMValueRef value =
@@ -4949,7 +4949,7 @@ static bool si_compile_tgsi_main(struct si_shader_context *ctx,
 	preload_ring_buffers(ctx);
 
 	if (ctx->type == PIPE_SHADER_TESS_CTRL &&
-	    sel->tcs_info.tessfactors_are_def_in_all_invocs) {
+	    sel->info.tessfactors_are_def_in_all_invocs) {
 		for (unsigned i = 0; i < 6; i++) {
 			ctx->invoc0_tess_factors[i] =
 				ac_build_alloca_undef(&ctx->ac, ctx->i32, "");
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index 565bcd6b7a2..058bb35cf0a 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -450,9 +450,7 @@ struct si_shader_info {
 	 * Max nesting limit of loops/if's
 	 */
 	unsigned max_depth;
-};
 
-struct si_tessctrl_info {
 	/** Whether all codepaths write tess factors in all invocations. */
 	bool tessfactors_are_def_in_all_invocs;
 };
@@ -487,7 +485,6 @@ struct si_shader_selector {
 
 	struct pipe_stream_output_info  so;
 	struct si_shader_info		info;
-	struct si_tessctrl_info		tcs_info;
 
 	/* PIPE_SHADER_[VERTEX|FRAGMENT|...] */
 	enum pipe_shader_type type;
@@ -913,8 +910,6 @@ void si_shader_binary_clean(struct si_shader_binary *binary);
 /* si_shader_nir.c */
 void si_nir_scan_shader(const struct nir_shader *nir,
 			struct si_shader_info *info);
-void si_nir_scan_tess_ctrl(const struct nir_shader *nir,
-			   struct si_tessctrl_info *out);
 void si_nir_adjust_driver_locations(struct nir_shader *nir);
 void si_finalize_nir(struct pipe_screen *screen, void *nirptr, bool optimize);
 
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 331103fe3a3..6aa85ef6c7b 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -430,18 +430,6 @@ static void scan_instruction(const struct nir_shader *nir,
 	}
 }
 
-void si_nir_scan_tess_ctrl(const struct nir_shader *nir,
-			   struct si_tessctrl_info *out)
-{
-	memset(out, 0, sizeof(*out));
-
-	if (nir->info.stage != MESA_SHADER_TESS_CTRL)
-		return;
-
-	out->tessfactors_are_def_in_all_invocs =
-		ac_are_tessfactors_def_in_all_invocs(nir);
-}
-
 static void scan_output_slot(const nir_variable *var,
 			     unsigned var_idx,
 			     unsigned component, unsigned num_components,
@@ -799,6 +787,11 @@ void si_nir_scan_shader(const struct nir_shader *nir,
 	if (info->processor == PIPE_SHADER_FRAGMENT)
 		info->uses_kill = nir->info.fs.uses_discard;
 
+	if (nir->info.stage == MESA_SHADER_TESS_CTRL) {
+		info->tessfactors_are_def_in_all_invocs =
+			ac_are_tessfactors_def_in_all_invocs(nir);
+	}
+
 	func = (struct nir_function *)exec_list_get_head_const(&nir->functions);
 	nir_foreach_block(block, func->impl) {
 		nir_foreach_instr(instr, block)
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 2c0c6c4dace..b4fd6a58b11 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1891,7 +1891,7 @@ static inline void si_shader_selector_key(struct pipe_context *ctx,
 		key->part.tcs.epilog.prim_mode =
 			sctx->tes_shader.cso->info.properties[TGSI_PROPERTY_TES_PRIM_MODE];
 		key->part.tcs.epilog.invoc0_tess_factors_are_def =
-			sel->tcs_info.tessfactors_are_def_in_all_invocs;
+			sel->info.tessfactors_are_def_in_all_invocs;
 		key->part.tcs.epilog.tes_reads_tess_factors =
 			sctx->tes_shader.cso->info.reads_tess_factors;
 
@@ -2714,7 +2714,6 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
 	}
 
 	si_nir_scan_shader(sel->nir, &sel->info);
-	si_nir_scan_tess_ctrl(sel->nir, &sel->tcs_info);
 	si_nir_adjust_driver_locations(sel->nir);
 
 	sel->type = sel->info.processor;