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authorSamuel Pitoiset <[email protected]>2015-10-09 16:10:19 +0200
committerSamuel Pitoiset <[email protected]>2015-10-16 21:57:44 +0200
commitcef22f3490f9809a6e77949f73448efac23be7ee (patch)
tree6b27d8d542ace34811b7f552a388d95160621093 /src/gallium/drivers
parent1825898e0471915673e572db4f61f1fd42461150 (diff)
nvc0: read MP counters of all GPCs on Fermi
When a card has more than one GPC, the grid used by the compute kernel which reads MP performance counters seems to be too small. The consequence is that the kernel is not launched on all TPCs. Increasing the grid size using the number of GPCs now launches enough blocks and we can read MP performance counters of all TPCs. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
index 8eb3b3ef14a..0b4a36f57dd 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_query_hw_sm.c
@@ -528,7 +528,7 @@ nvc0_hw_sm_end_query(struct nvc0_context *nvc0, struct nvc0_hw_query *hq)
uint32_t mask;
uint32_t input[3];
const uint block[3] = { 32, is_nve4 ? 4 : 1, 1 };
- const uint grid[3] = { screen->mp_count, 1, 1 };
+ const uint grid[3] = { screen->mp_count, screen->gpc_count, 1 };
unsigned c;
if (unlikely(!screen->pm.prog)) {