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authorMarek Olšák <[email protected]>2016-04-07 00:49:32 +0200
committerMarek Olšák <[email protected]>2016-04-07 13:58:01 +0200
commitbaa0b3f4ccd960bb6131ba16b1f9d8736c6432c1 (patch)
treebcccd47ce91a380fc7999c9abf6b80ca6ffd5896 /src/gallium/drivers
parent715e97e3421ec33c219c9829e7930d135dfe0bf8 (diff)
radeonsi: don't use the real barrier instruction in tess ctrl shaders
Reviewed-by: Bas Nieuwenhuizen <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/radeonsi/si_shader.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index bf3f00867e9..08da3e37550 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -4282,6 +4282,14 @@ static void si_llvm_emit_barrier(const struct lp_build_tgsi_action *action,
struct si_shader_context *ctx = si_shader_context(bld_base);
struct gallivm_state *gallivm = bld_base->base.gallivm;
+ /* The real barrier instruction isn’t needed, because an entire patch
+ * always fits into a single wave.
+ */
+ if (ctx->type == TGSI_PROCESSOR_TESS_CTRL) {
+ emit_optimization_barrier(ctx);
+ return;
+ }
+
lp_build_intrinsic(gallivm->builder,
HAVE_LLVM >= 0x0309 ? "llvm.amdgcn.s.barrier"
: "llvm.AMDGPU.barrier.local",