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authorIlia Mirkin <[email protected]>2015-04-05 17:40:44 -0400
committerIlia Mirkin <[email protected]>2015-04-06 23:06:55 -0400
commitae720c66cb91c2640dfd6707446899694a24ab5b (patch)
treeebb60a1b4ad19a8a1e1a7d7f486f2497d12db1e9 /src/gallium/drivers
parentad84689f737edefe549688f9b36d66027ca3fcb2 (diff)
nv50,nvc0: limit the y-tiling of 3d textures to the first level's tiling
We limit y-tiling to 0x20 when depth is involved. However the function is run for each miplevel, and the hardware expects miplevel 0 to have the highest tiling settings. Perform the y-tiling limit on all levels of a 3d texture, not just the ones that have depth. Fixes: texelFetch fs sampler3D 98x129x1-98x129x9 Signed-off-by: Ilia Mirkin <[email protected]> Tested-by: Nick Tenney <[email protected]> # GT216 Cc: "10.4 10.5" <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/nouveau/nv50/nv50_miptree.c14
-rw-r--r--src/gallium/drivers/nouveau/nv50/nv50_resource.h3
-rw-r--r--src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c6
3 files changed, 13 insertions, 10 deletions
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_miptree.c b/src/gallium/drivers/nouveau/nv50/nv50_miptree.c
index 2e410912acb..744a3a5bf8b 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_miptree.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_miptree.c
@@ -29,7 +29,8 @@
#include "nv50/nv50_resource.h"
uint32_t
-nv50_tex_choose_tile_dims_helper(unsigned nx, unsigned ny, unsigned nz)
+nv50_tex_choose_tile_dims_helper(unsigned nx, unsigned ny, unsigned nz,
+ boolean is_3d)
{
uint32_t tile_mode = 0x000;
@@ -41,7 +42,7 @@ nv50_tex_choose_tile_dims_helper(unsigned nx, unsigned ny, unsigned nz)
else
if (ny > 8) tile_mode = 0x010; /* height 16 tiles */
- if (nz == 1)
+ if (!is_3d)
return tile_mode;
else
if (tile_mode > 0x020)
@@ -52,14 +53,15 @@ nv50_tex_choose_tile_dims_helper(unsigned nx, unsigned ny, unsigned nz)
if (nz > 8) return tile_mode | 0x400; /* depth 16 tiles */
if (nz > 4) return tile_mode | 0x300; /* depth 8 tiles */
if (nz > 2) return tile_mode | 0x200; /* depth 4 tiles */
+ if (nz > 1) return tile_mode | 0x100; /* depth 2 tiles */
- return tile_mode | 0x100;
+ return tile_mode;
}
static uint32_t
-nv50_tex_choose_tile_dims(unsigned nx, unsigned ny, unsigned nz)
+nv50_tex_choose_tile_dims(unsigned nx, unsigned ny, unsigned nz, boolean is_3d)
{
- return nv50_tex_choose_tile_dims_helper(nx, ny * 2, nz);
+ return nv50_tex_choose_tile_dims_helper(nx, ny * 2, nz, is_3d);
}
static uint32_t
@@ -304,7 +306,7 @@ nv50_miptree_init_layout_tiled(struct nv50_miptree *mt)
lvl->offset = mt->total_size;
- lvl->tile_mode = nv50_tex_choose_tile_dims(nbx, nby, d);
+ lvl->tile_mode = nv50_tex_choose_tile_dims(nbx, nby, d, mt->layout_3d);
tsx = NV50_TILE_SIZE_X(lvl->tile_mode); /* x is tile row pitch in bytes */
tsy = NV50_TILE_SIZE_Y(lvl->tile_mode);
diff --git a/src/gallium/drivers/nouveau/nv50/nv50_resource.h b/src/gallium/drivers/nouveau/nv50/nv50_resource.h
index c06daa31c5d..36d70d812f1 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_resource.h
+++ b/src/gallium/drivers/nouveau/nv50/nv50_resource.h
@@ -34,7 +34,8 @@ nv50_screen_init_resource_functions(struct pipe_screen *pscreen);
#endif /* __NVC0_RESOURCE_H__ */
uint32_t
-nv50_tex_choose_tile_dims_helper(unsigned nx, unsigned ny, unsigned nz);
+nv50_tex_choose_tile_dims_helper(unsigned nx, unsigned ny, unsigned nz,
+ boolean is_3d);
struct nv50_miptree_level {
uint32_t offset;
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c b/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c
index 1beda7d4a2c..fc75fc6a4a1 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_miptree.c
@@ -29,9 +29,9 @@
#include "nvc0/nvc0_resource.h"
static uint32_t
-nvc0_tex_choose_tile_dims(unsigned nx, unsigned ny, unsigned nz)
+nvc0_tex_choose_tile_dims(unsigned nx, unsigned ny, unsigned nz, boolean is_3d)
{
- return nv50_tex_choose_tile_dims_helper(nx, ny, nz);
+ return nv50_tex_choose_tile_dims_helper(nx, ny, nz, is_3d);
}
static uint32_t
@@ -211,7 +211,7 @@ nvc0_miptree_init_layout_tiled(struct nv50_miptree *mt)
lvl->offset = mt->total_size;
- lvl->tile_mode = nvc0_tex_choose_tile_dims(nbx, nby, d);
+ lvl->tile_mode = nvc0_tex_choose_tile_dims(nbx, nby, d, mt->layout_3d);
tsx = NVC0_TILE_SIZE_X(lvl->tile_mode); /* x is tile row pitch in bytes */
tsy = NVC0_TILE_SIZE_Y(lvl->tile_mode);