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authorMarek Olšák <[email protected]>2016-07-01 00:17:36 +0200
committerMarek Olšák <[email protected]>2016-07-05 00:47:13 +0200
commit8a4ace4a47a07323997da5c2dbc865a32df52451 (patch)
tree199241d82bf4465dbfb73074465ec406166540e6 /src/gallium/drivers
parent027ad71b57a0bec882c604027dc83f42eb2eb54c (diff)
gallium/radeon: add and use radeon_info::max_alloc_size (v2)
v2: - squashed the patches - use INT_MAX - clamp max_const_buffer_size - check the DRM version in radeon Reviewed-by: Nicolai Hähnle <[email protected]> Reviewed-by: Vedran Miletić <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/r600/r600_pipe.c4
-rw-r--r--src/gallium/drivers/radeon/r600_pipe_common.c11
-rw-r--r--src/gallium/drivers/radeon/radeon_winsys.h1
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c4
4 files changed, 10 insertions, 10 deletions
diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 119c76bd4a9..f23daf95109 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -301,7 +301,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
return 0;
case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
- return MIN2(rscreen->b.info.vram_size, 0xFFFFFFFF);
+ return MIN2(rscreen->b.info.max_alloc_size, INT_MAX);
case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
return R600_MAP_BUFFER_ALIGNMENT;
@@ -509,7 +509,7 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
pscreen->get_compute_param(pscreen, PIPE_SHADER_IR_TGSI,
PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
&max_const_buffer_size);
- return max_const_buffer_size;
+ return MIN2(max_const_buffer_size, INT_MAX);
} else {
return R600_MAX_CONST_BUFFER_SIZE;
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index 74674e70e72..f75fa6c7d8c 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -864,8 +864,8 @@ static int r600_get_compute_param(struct pipe_screen *screen,
* 4 * MAX_MEM_ALLOC_SIZE.
*/
*max_global_size = MIN2(4 * max_mem_alloc_size,
- rscreen->info.gart_size +
- rscreen->info.vram_size);
+ MAX2(rscreen->info.gart_size,
+ rscreen->info.vram_size));
}
return sizeof(uint64_t);
@@ -889,10 +889,7 @@ static int r600_get_compute_param(struct pipe_screen *screen,
if (ret) {
uint64_t *max_mem_alloc_size = ret;
- /* XXX: The limit in older kernels is 256 MB. We
- * should add a query here for newer kernels.
- */
- *max_mem_alloc_size = 256 * 1024 * 1024;
+ *max_mem_alloc_size = rscreen->info.max_alloc_size;
}
return sizeof(uint64_t);
@@ -1098,6 +1095,8 @@ bool r600_common_screen_init(struct r600_common_screen *rscreen,
printf("chip_class = %i\n", rscreen->info.chip_class);
printf("gart_size = %i MB\n", (int)DIV_ROUND_UP(rscreen->info.gart_size, 1024*1024));
printf("vram_size = %i MB\n", (int)DIV_ROUND_UP(rscreen->info.vram_size, 1024*1024));
+ printf("max_alloc_size = %i MB\n",
+ (int)DIV_ROUND_UP(rscreen->info.max_alloc_size, 1024*1024));
printf("has_virtual_memory = %i\n", rscreen->info.has_virtual_memory);
printf("gfx_ib_pad_with_type2 = %i\n", rscreen->info.gfx_ib_pad_with_type2);
printf("has_sdma = %i\n", rscreen->info.has_sdma);
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index f32edf09a2d..5910b000104 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -253,6 +253,7 @@ struct radeon_info {
uint32_t gart_page_size;
uint64_t gart_size;
uint64_t vram_size;
+ uint64_t max_alloc_size;
bool has_dedicated_vram;
bool has_virtual_memory;
bool gfx_ib_pad_with_type2;
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index ad2a86a812b..57c3fbde3f6 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -419,7 +419,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
HAVE_LLVM >= 0x0307 ? 410 : 330;
case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
- return MIN2(sscreen->b.info.vram_size, 0xFFFFFFFF);
+ return MIN2(sscreen->b.info.max_alloc_size, INT_MAX);
case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
return 0;
@@ -566,7 +566,7 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu
pscreen->get_compute_param(pscreen, PIPE_SHADER_IR_TGSI,
PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
&max_const_buffer_size);
- return max_const_buffer_size;
+ return MIN2(max_const_buffer_size, INT_MAX);
}
default:
/* If compute shaders don't require a special value