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authorMarek Olšák <[email protected]>2016-08-19 01:37:34 +0200
committerMarek Olšák <[email protected]>2016-08-26 15:50:10 +0200
commit49c798e902be6c95ae44422cb05c98e1e8f6f1ca (patch)
tree37ced5c0abd0fcf1a20b92b683b6a46a800af538 /src/gallium/drivers
parent281f1a5980e86b7f9083c23ac451591fa9c7e361 (diff)
radeonsi: disable CE on SI + AMDGPU
Reviewed-by: Edward O'Callaghan <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 67c3a260ef0..8e7d021b3ae 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -186,7 +186,9 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen,
sctx->b.gfx.cs = ws->cs_create(sctx->b.ctx, RING_GFX,
si_context_gfx_flush, sctx);
- if (!(sscreen->b.debug_flags & DBG_NO_CE) && ws->cs_add_const_ib) {
+ /* SI + AMDGPU + CE = GPU hang */
+ if (!(sscreen->b.debug_flags & DBG_NO_CE) && ws->cs_add_const_ib &&
+ sscreen->b.chip_class != SI) {
sctx->ce_ib = ws->cs_add_const_ib(sctx->b.gfx.cs);
if (!sctx->ce_ib)
goto fail;