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authorMichel Dänzer <[email protected]>2013-08-09 18:36:31 +0200
committerMichel Dänzer <[email protected]>2013-08-15 17:55:00 +0200
commit3b2f3f90ace68e0a4777661f8cbf07438855edcb (patch)
treee3ae1f1f2456a76a0db883c0b8d4ee7c308bfeba /src/gallium/drivers
parentf0753a3cd40d579fbb3d3f0f65430bee21834ffb (diff)
radeonsi: Pixel shaders pre-load one more SGPR
Acked-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index c6ef8bd29ac..47e64d8634e 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -236,9 +236,10 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *s
num_user_sgprs = SI_PS_NUM_USER_SGPR;
num_sgprs = shader->num_sgprs;
- if (num_user_sgprs > num_sgprs) {
+ /* One SGPR after user SGPRs is pre-loaded with {prim_mask, lds_offset} */
+ if ((num_user_sgprs + 1) > num_sgprs) {
/* Last 2 reserved SGPRs are used for VCC */
- num_sgprs = num_user_sgprs + 2;
+ num_sgprs = num_user_sgprs + 1 + 2;
}
assert(num_sgprs <= 104);