diff options
| author | Nicolai Hähnle <[email protected]> | 2016-12-09 23:21:28 +0100 |
|---|---|---|
| committer | Nicolai Hähnle <[email protected]> | 2016-12-22 16:58:53 +0100 |
| commit | 3778a10d37cd0676ae6af03a059d7e80eb059245 (patch) | |
| tree | 4e3b5fdc8a43ea7fa459eeff8050a823c227eddf /src/gallium/drivers | |
| parent | ede8c02ab0f9c2bd7bb42d2398103674cb505f6c (diff) | |
radeonsi: only set VS_OUT_MISC_SIDE_BUS_ENA when the misc vector is used
Should have no effect (other than perhaps on power consumption), but
Vulkan does this.
Reviewed-by: Marek Olšák <[email protected]>
Reviewed-by: Edward O'Callaghan <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 65737f4f165..afcd3ad26bc 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -669,6 +669,7 @@ static void si_emit_clip_regs(struct si_context *sctx, struct r600_atom *atom) unsigned ucp_mask = clipdist_mask ? 0 : rs->clip_plane_enable & SIX_BITS; unsigned culldist_mask = info->culldist_writemask << info->num_written_clipdistance; unsigned total_mask; + bool misc_vec_ena; if (vs->key.opt.hw_vs.clip_disable) { assert(!info->culldist_writemask); @@ -677,6 +678,9 @@ static void si_emit_clip_regs(struct si_context *sctx, struct r600_atom *atom) } total_mask = clipdist_mask | culldist_mask; + misc_vec_ena = info->writes_psize || info->writes_edgeflag || + info->writes_layer || info->writes_viewport_index; + radeon_set_context_reg(cs, R_02881C_PA_CL_VS_OUT_CNTL, S_02881C_USE_VTX_POINT_SIZE(info->writes_psize) | S_02881C_USE_VTX_EDGE_FLAG(info->writes_edgeflag) | @@ -684,11 +688,8 @@ static void si_emit_clip_regs(struct si_context *sctx, struct r600_atom *atom) S_02881C_USE_VTX_VIEWPORT_INDX(info->writes_viewport_index) | S_02881C_VS_OUT_CCDIST0_VEC_ENA((total_mask & 0x0F) != 0) | S_02881C_VS_OUT_CCDIST1_VEC_ENA((total_mask & 0xF0) != 0) | - S_02881C_VS_OUT_MISC_VEC_ENA(info->writes_psize || - info->writes_edgeflag || - info->writes_layer || - info->writes_viewport_index) | - S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(1) | + S_02881C_VS_OUT_MISC_VEC_ENA(misc_vec_ena) | + S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(misc_vec_ena) | (rs->clip_plane_enable & clipdist_mask) | (culldist_mask << 8)); radeon_set_context_reg(cs, R_028810_PA_CL_CLIP_CNTL, |