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authorMarek Olšák <[email protected]>2017-05-17 02:45:25 +0200
committerMarek Olšák <[email protected]>2017-05-18 22:15:02 +0200
commit1cde473ec08e9aa60f474d460df1b4c3ba6d3c70 (patch)
tree547afaf2fa483e2147a0f1ef2c2998bce91b8276 /src/gallium/drivers
parenta7f098fb769bdfdac692a04eab6bdd84e061e5cd (diff)
radeonsi: remove CE offset alignment restriction
This was only needed by LOAD_CONST_RAM, which is now only used to load whole CE. Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/radeonsi/si_descriptors.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index b514961925f..5086a33969a 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -113,8 +113,7 @@ static void si_init_descriptors(struct si_descriptors *desc,
desc->uses_ce = true;
desc->ce_offset = *ce_offset;
- /* make sure that ce_offset stays 32 byte aligned */
- *ce_offset += align(element_dw_size * num_elements * 4, 32);
+ *ce_offset += element_dw_size * num_elements * 4;
}
}