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authorNicolai Hähnle <[email protected]>2016-06-30 20:04:54 +0200
committerNicolai Hähnle <[email protected]>2016-07-06 10:43:52 +0200
commit7000dfd5c36dcfcc493e149e5aa5b4124d814d8a (patch)
tree62e7aef18be18f040a822a658564ded19c8bb275 /src/gallium/drivers
parent68fe270e71cafcaa23825442228f03f269598476 (diff)
gallium/radeon: add depth/stencil_adjusted output to surface computation
This fixes a rare bug with stencil texturing -- seen on Polaris and Tonga, though it's basically a function of the memory configuration so could affect other parts as well. Fixes piglit "unaligned-blit * stencil downsample" and various "fbo-depth-array *stencil*" tests. Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/radeon/r600_texture.c4
-rw-r--r--src/gallium/drivers/radeon/radeon_winsys.h8
2 files changed, 10 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c
index 434bd44fbbb..7763f812141 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -1030,8 +1030,8 @@ r600_texture_create_object(struct pipe_screen *screen,
if (base->flags & (R600_RESOURCE_FLAG_TRANSFER |
R600_RESOURCE_FLAG_FLUSHED_DEPTH) ||
rscreen->chip_class >= EVERGREEN) {
- rtex->can_sample_z = true;
- rtex->can_sample_s = true;
+ rtex->can_sample_z = !rtex->surface.depth_adjusted;
+ rtex->can_sample_s = !rtex->surface.stencil_adjusted;
} else {
if (rtex->resource.b.b.nr_samples <= 1 &&
(rtex->resource.b.b.format == PIPE_FORMAT_Z16_UNORM ||
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index 0bf6fd97537..de25e19aa5b 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -401,6 +401,14 @@ struct radeon_surf {
uint32_t macro_tile_index;
uint32_t micro_tile_mode; /* displayable, thin, depth, rotated */
+ /* Whether the depth miptree or stencil miptree as used by the DB are
+ * adjusted from their TC compatible form to ensure depth/stencil
+ * compatibility. If either is true, the corresponding plane cannot be
+ * sampled from.
+ */
+ bool depth_adjusted;
+ bool stencil_adjusted;
+
uint64_t dcc_size;
uint64_t dcc_alignment;
};