radeonsi: merge si_pipe_shader into si_shader

One is part of the other anyway.

Reviewed-by: Michel Dänzer <[email protected]>

5 files changed, 90 insertions, 92 deletions

diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index fc842d43719..049f6c251e1 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -45,7 +45,7 @@ struct si_pipe_compute {
 	unsigned private_size;
 	unsigned input_size;
 	unsigned num_kernels;
-	struct si_pipe_shader *kernels;
+	struct si_shader *kernels;
 	unsigned num_user_sgprs;
 
 	struct r600_resource *input_buffer;
@@ -77,7 +77,7 @@ static void *si_create_compute_state(
 
 	program->num_kernels = radeon_llvm_get_num_kernels(program->llvm_ctx, code,
 							header->num_bytes);
-	program->kernels = CALLOC(sizeof(struct si_pipe_shader),
+	program->kernels = CALLOC(sizeof(struct si_shader),
 							program->num_kernels);
 	for (i = 0; i < program->num_kernels; i++) {
 		LLVMModuleRef mod = radeon_llvm_get_kernel_module(program->llvm_ctx, i,
@@ -181,7 +181,7 @@ static void si_launch_grid(
 	uint64_t shader_va;
 	unsigned arg_user_sgpr_count = NUM_USER_SGPRS;
 	unsigned i;
-	struct si_pipe_shader *shader = &program->kernels[pc];
+	struct si_shader *shader = &program->kernels[pc];
 	unsigned lds_blocks;
 	unsigned num_waves_for_scratch;
 
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 5893531f816..9b70a352f06 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -59,7 +59,7 @@ struct si_shader_context
 	struct radeon_llvm_context radeon_bld;
 	struct tgsi_parse_context parse;
 	struct tgsi_token * tokens;
-	struct si_pipe_shader *shader;
+	struct si_shader *shader;
 	struct si_shader *gs_for_vs;
 	unsigned type; /* TGSI_PROCESSOR_* specifies the type of shader. */
 	int param_streamout_config;
@@ -220,7 +220,7 @@ static void declare_input_vs(
 
 	if (divisor) {
 		/* Build index from instance ID, start instance and divisor */
-		si_shader_ctx->shader->shader.uses_instanceid = true;
+		si_shader_ctx->shader->uses_instanceid = true;
 		buffer_index = get_instance_index_for_fetch(&si_shader_ctx->radeon_bld, divisor);
 	} else {
 		/* Load the buffer index for vertices. */
@@ -257,7 +257,7 @@ static void declare_input_gs(
 {
 	struct si_shader_context *si_shader_ctx =
 		si_shader_context(&radeon_bld->soa.bld_base);
-	struct si_shader *shader = &si_shader_ctx->shader->shader;
+	struct si_shader *shader = si_shader_ctx->shader;
 
 	si_store_shader_io_attribs(shader, decl);
 
@@ -273,7 +273,7 @@ static LLVMValueRef fetch_input_gs(
 {
 	struct lp_build_context *base = &bld_base->base;
 	struct si_shader_context *si_shader_ctx = si_shader_context(bld_base);
-	struct si_shader *shader = &si_shader_ctx->shader->shader;
+	struct si_shader *shader = si_shader_ctx->shader;
 	struct lp_build_context *uint =	&si_shader_ctx->radeon_bld.soa.bld_base.uint_bld;
 	struct gallivm_state *gallivm = base->gallivm;
 	LLVMTypeRef i32 = LLVMInt32TypeInContext(gallivm->context);
@@ -352,7 +352,7 @@ static void declare_input_fs(
 	struct lp_build_context *base = &radeon_bld->soa.bld_base.base;
 	struct si_shader_context *si_shader_ctx =
 		si_shader_context(&radeon_bld->soa.bld_base);
-	struct si_shader *shader = &si_shader_ctx->shader->shader;
+	struct si_shader *shader = si_shader_ctx->shader;
 	struct lp_build_context *uint =	&radeon_bld->soa.bld_base.uint_bld;
 	struct gallivm_state *gallivm = base->gallivm;
 	LLVMTypeRef input_type = LLVMFloatTypeInContext(gallivm->context);
@@ -782,7 +782,7 @@ static void si_llvm_emit_clipvertex(struct lp_build_tgsi_context * bld_base,
 				    LLVMValueRef (*pos)[9], LLVMValueRef *out_elts)
 {
 	struct si_shader_context *si_shader_ctx = si_shader_context(bld_base);
-	struct si_pipe_shader *shader = si_shader_ctx->shader;
+	struct si_shader *shader = si_shader_ctx->shader;
 	struct lp_build_context *base = &bld_base->base;
 	struct lp_build_context *uint = &si_shader_ctx->radeon_bld.soa.bld_base.uint_bld;
 	unsigned reg_index;
@@ -799,7 +799,7 @@ static void si_llvm_emit_clipvertex(struct lp_build_tgsi_context * bld_base,
 		if (!(shader->key.vs.ucps_enabled & (1 << reg_index)))
 			continue;
 
-		shader->shader.clip_dist_write |= 0xf << (4 * reg_index);
+		shader->clip_dist_write |= 0xf << (4 * reg_index);
 
 		args[5] =
 		args[6] =
@@ -1052,7 +1052,7 @@ static void si_llvm_export_vs(struct lp_build_tgsi_context *bld_base,
 			      unsigned noutput)
 {
 	struct si_shader_context * si_shader_ctx = si_shader_context(bld_base);
-	struct si_shader * shader = &si_shader_ctx->shader->shader;
+	struct si_shader * shader = si_shader_ctx->shader;
 	struct lp_build_context * base = &bld_base->base;
 	struct lp_build_context * uint =
 				&si_shader_ctx->radeon_bld.soa.bld_base.uint_bld;
@@ -1223,7 +1223,7 @@ static void si_llvm_emit_es_epilogue(struct lp_build_tgsi_context * bld_base)
 {
 	struct si_shader_context *si_shader_ctx = si_shader_context(bld_base);
 	struct gallivm_state *gallivm = bld_base->base.gallivm;
-	struct si_shader *es = &si_shader_ctx->shader->shader;
+	struct si_shader *es = si_shader_ctx->shader;
 	struct si_shader *gs = si_shader_ctx->gs_for_vs;
 	struct tgsi_parse_context *parse = &si_shader_ctx->parse;
 	LLVMTypeRef i32 = LLVMInt32TypeInContext(gallivm->context);
@@ -1296,7 +1296,7 @@ static void si_llvm_emit_vs_epilogue(struct lp_build_tgsi_context * bld_base)
 {
 	struct si_shader_context *si_shader_ctx = si_shader_context(bld_base);
 	struct gallivm_state *gallivm = bld_base->base.gallivm;
-	struct si_pipe_shader *shader = si_shader_ctx->shader;
+	struct si_shader *shader = si_shader_ctx->shader;
 	struct tgsi_parse_context *parse = &si_shader_ctx->parse;
 	struct si_shader_output_values *outputs = NULL;
 	unsigned noutput = 0;
@@ -1312,7 +1312,7 @@ static void si_llvm_emit_vs_epilogue(struct lp_build_tgsi_context * bld_base)
 		if (parse->FullToken.Token.Type != TGSI_TOKEN_TYPE_DECLARATION)
 			continue;
 
-		i = si_store_shader_io_attribs(&shader->shader, d);
+		i = si_store_shader_io_attribs(shader, d);
 		if (i < 0)
 			continue;
 
@@ -1340,7 +1340,7 @@ static void si_llvm_emit_vs_epilogue(struct lp_build_tgsi_context * bld_base)
 static void si_llvm_emit_fs_epilogue(struct lp_build_tgsi_context * bld_base)
 {
 	struct si_shader_context * si_shader_ctx = si_shader_context(bld_base);
-	struct si_shader * shader = &si_shader_ctx->shader->shader;
+	struct si_shader * shader = si_shader_ctx->shader;
 	struct lp_build_context * base = &bld_base->base;
 	struct lp_build_context * uint =
 				&si_shader_ctx->radeon_bld.soa.bld_base.uint_bld;
@@ -2185,7 +2185,7 @@ static void si_llvm_emit_vertex(
 {
 	struct si_shader_context *si_shader_ctx = si_shader_context(bld_base);
 	struct lp_build_context *uint = &bld_base->uint_bld;
-	struct si_shader *shader = &si_shader_ctx->shader->shader;
+	struct si_shader *shader = si_shader_ctx->shader;
 	struct gallivm_state *gallivm = bld_base->base.gallivm;
 	LLVMTypeRef i32 = LLVMInt32TypeInContext(gallivm->context);
 	LLVMValueRef soffset = LLVMGetParam(si_shader_ctx->radeon_bld.main_fn,
@@ -2321,7 +2321,7 @@ static void create_function(struct si_shader_context *si_shader_ctx)
 {
 	struct lp_build_tgsi_context *bld_base = &si_shader_ctx->radeon_bld.soa.bld_base;
 	struct gallivm_state *gallivm = bld_base->base.gallivm;
-	struct si_pipe_shader *shader = si_shader_ctx->shader;
+	struct si_shader *shader = si_shader_ctx->shader;
 	LLVMTypeRef params[SI_NUM_PARAMS], f32, i8, i32, v2i32, v3i32, v16i8, v4i32, v8i32;
 	unsigned i, last_sgpr, num_params;
 
@@ -2546,7 +2546,7 @@ static void preload_streamout_buffers(struct si_shader_context *si_shader_ctx)
 	}
 }
 
-int si_compile_llvm(struct si_context *sctx, struct si_pipe_shader *shader,
+int si_compile_llvm(struct si_context *sctx, struct si_shader *shader,
 							LLVMModuleRef mod)
 {
 	unsigned r; /* llvm_compile result */
@@ -2642,8 +2642,8 @@ static int si_generate_gs_copy_shader(struct si_context *sctx,
 	struct lp_build_tgsi_context *bld_base = &si_shader_ctx->radeon_bld.soa.bld_base;
 	struct lp_build_context *base = &bld_base->base;
 	struct lp_build_context *uint = &bld_base->uint_bld;
-	struct si_shader *shader = &si_shader_ctx->shader->shader;
-	struct si_shader *gs = &si_shader_ctx->shader->selector->current->shader;
+	struct si_shader *shader = si_shader_ctx->shader;
+	struct si_shader *gs = si_shader_ctx->shader->selector->current;
 	struct si_shader_output_values *outputs;
 	LLVMValueRef t_list_ptr, t_list;
 	LLVMValueRef args[9];
@@ -2725,7 +2725,7 @@ static int si_generate_gs_copy_shader(struct si_context *sctx,
 
 int si_pipe_shader_create(
 	struct pipe_context *ctx,
-	struct si_pipe_shader *shader)
+	struct si_shader *shader)
 {
 	struct si_context *sctx = (struct si_context*)ctx;
 	struct si_pipe_shader_selector *sel = shader->selector;
@@ -2743,9 +2743,9 @@ int si_pipe_shader_create(
 		si_dump_streamout(&sel->so);
 	}
 
-	assert(shader->shader.noutput == 0);
-	assert(shader->shader.nparam == 0);
-	assert(shader->shader.ninput == 0);
+	assert(shader->noutput == 0);
+	assert(shader->nparam == 0);
+	assert(shader->ninput == 0);
 
 	memset(&si_shader_ctx, 0, sizeof(si_shader_ctx));
 	radeon_llvm_context_init(&si_shader_ctx.radeon_bld);
@@ -2756,7 +2756,7 @@ int si_pipe_shader_create(
 	if (shader_info.uses_kill)
 		shader->db_shader_control |= S_02880C_KILL_ENABLE(1);
 
-	shader->shader.uses_instanceid = shader_info.uses_instanceid;
+	shader->uses_instanceid = shader_info.uses_instanceid;
 	bld_base->info = &shader_info;
 	bld_base->emit_fetch_funcs[TGSI_FILE_CONSTANT] = fetch_constant;
 
@@ -2789,7 +2789,7 @@ int si_pipe_shader_create(
 	case TGSI_PROCESSOR_VERTEX:
 		si_shader_ctx.radeon_bld.load_input = declare_input_vs;
 		if (shader->key.vs.as_es) {
-			si_shader_ctx.gs_for_vs = &sctx->gs_shader->current->shader;
+			si_shader_ctx.gs_for_vs = sctx->gs_shader->current;
 			bld_base->emit_epilogue = si_llvm_emit_es_epilogue;
 		} else {
 			bld_base->emit_epilogue = si_llvm_emit_vs_epilogue;
@@ -2805,13 +2805,13 @@ int si_pipe_shader_create(
 		for (i = 0; i < shader_info.num_properties; i++) {
 			switch (shader_info.properties[i].name) {
 			case TGSI_PROPERTY_GS_INPUT_PRIM:
-				shader->shader.gs_input_prim = shader_info.properties[i].data[0];
+				shader->gs_input_prim = shader_info.properties[i].data[0];
 				break;
 			case TGSI_PROPERTY_GS_OUTPUT_PRIM:
-				shader->shader.gs_output_prim = shader_info.properties[i].data[0];
+				shader->gs_output_prim = shader_info.properties[i].data[0];
 				break;
 			case TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES:
-				shader->shader.gs_max_out_vertices = shader_info.properties[i].data[0];
+				shader->gs_max_out_vertices = shader_info.properties[i].data[0];
 				break;
 			}
 		}
@@ -2875,7 +2875,7 @@ int si_pipe_shader_create(
 	radeon_llvm_dispose(&si_shader_ctx.radeon_bld);
 
 	if (si_shader_ctx.type == TGSI_PROCESSOR_GEOMETRY) {
-		shader->gs_copy_shader = CALLOC_STRUCT(si_pipe_shader);
+		shader->gs_copy_shader = CALLOC_STRUCT(si_shader);
 		shader->gs_copy_shader->selector = shader->selector;
 		shader->gs_copy_shader->key = shader->key;
 		si_shader_ctx.shader = shader->gs_copy_shader;
@@ -2897,7 +2897,7 @@ out:
 	return r;
 }
 
-void si_pipe_shader_destroy(struct pipe_context *ctx, struct si_pipe_shader *shader)
+void si_pipe_shader_destroy(struct pipe_context *ctx, struct si_shader *shader)
 {
 	r600_resource_reference(&shader->bo, NULL);
 }
diff --git a/src/gallium/drivers/radeonsi/si_shader.h b/src/gallium/drivers/radeonsi/si_shader.h
index 9c6b2387ac1..3cc77570c31 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -110,10 +110,10 @@ struct si_shader_output {
 	unsigned		usage;
 };
 
-struct si_pipe_shader;
+struct si_shader;
 
 struct si_pipe_shader_selector {
-	struct si_pipe_shader *current;
+	struct si_shader *current;
 
 	struct tgsi_token       *tokens;
 	struct pipe_stream_output_info  so;
@@ -129,29 +129,6 @@ struct si_pipe_shader_selector {
 	unsigned	fs_write_all;
 };
 
-struct si_shader {
-	unsigned		ninput;
-	struct si_shader_input	input[40];
-
-	unsigned		noutput;
-	struct si_shader_output	output[40];
-
-	/* geometry shader properties */
-	unsigned		gs_input_prim;
-	unsigned		gs_output_prim;
-	unsigned		gs_max_out_vertices;
-
-	unsigned		nparam;
-	bool			uses_instanceid;
-	bool			fs_write_all;
-	bool			vs_out_misc_write;
-	bool			vs_out_point_size;
-	bool			vs_out_edgeflag;
-	bool			vs_out_layer;
-	unsigned		nr_pos_exports;
-	unsigned		clip_dist_write;
-};
-
 union si_shader_key {
 	struct {
 		unsigned	export_16bpc:8;
@@ -169,11 +146,11 @@ union si_shader_key {
 	} vs;
 };
 
-struct si_pipe_shader {
+struct si_shader {
 	struct si_pipe_shader_selector	*selector;
-	struct si_pipe_shader		*next_variant;
-	struct si_pipe_shader		*gs_copy_shader;
-	struct si_shader		shader;
+	struct si_shader		*next_variant;
+
+	struct si_shader		*gs_copy_shader;
 	struct si_pm4_state		*pm4;
 	struct r600_resource		*bo;
 	struct r600_resource		*scratch_bo;
@@ -187,21 +164,42 @@ struct si_pipe_shader {
 	unsigned			db_shader_control;
 	unsigned			cb_shader_mask;
 	union si_shader_key		key;
+
+	unsigned		ninput;
+	struct si_shader_input	input[40];
+
+	unsigned		noutput;
+	struct si_shader_output	output[40];
+
+	/* geometry shader properties */
+	unsigned		gs_input_prim;
+	unsigned		gs_output_prim;
+	unsigned		gs_max_out_vertices;
+
+	unsigned		nparam;
+	bool			uses_instanceid;
+	bool			fs_write_all;
+	bool			vs_out_misc_write;
+	bool			vs_out_point_size;
+	bool			vs_out_edgeflag;
+	bool			vs_out_layer;
+	unsigned		nr_pos_exports;
+	unsigned		clip_dist_write;
 };
 
 static inline struct si_shader* si_get_vs_state(struct si_context *sctx)
 {
 	if (sctx->gs_shader)
-		return &sctx->gs_shader->current->gs_copy_shader->shader;
+		return sctx->gs_shader->current->gs_copy_shader;
 	else
-		return &sctx->vs_shader->current->shader;
+		return sctx->vs_shader->current;
 }
 
 /* radeonsi_shader.c */
-int si_pipe_shader_create(struct pipe_context *ctx, struct si_pipe_shader *shader);
-int si_pipe_shader_create(struct pipe_context *ctx, struct si_pipe_shader *shader);
-int si_compile_llvm(struct si_context *sctx, struct si_pipe_shader *shader,
+int si_pipe_shader_create(struct pipe_context *ctx, struct si_shader *shader);
+int si_pipe_shader_create(struct pipe_context *ctx, struct si_shader *shader);
+int si_compile_llvm(struct si_context *sctx, struct si_shader *shader,
 							LLVMModuleRef mod);
-void si_pipe_shader_destroy(struct pipe_context *ctx, struct si_pipe_shader *shader);
+void si_pipe_shader_destroy(struct pipe_context *ctx, struct si_shader *shader);
 
 #endif
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 7614bbabe13..bfda5285151 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2245,7 +2245,7 @@ int si_shader_select(struct pipe_context *ctx,
 		     struct si_pipe_shader_selector *sel)
 {
 	union si_shader_key key;
-	struct si_pipe_shader * shader = NULL;
+	struct si_shader * shader = NULL;
 	int r;
 
 	si_shader_selector_key(ctx, sel, &key);
@@ -2260,7 +2260,7 @@ int si_shader_select(struct pipe_context *ctx,
 
 	/* lookup if we have other variants in the list */
 	if (sel->num_shaders > 1) {
-		struct si_pipe_shader *p = sel->current, *c = p->next_variant;
+		struct si_shader *p = sel->current, *c = p->next_variant;
 
 		while (c && memcmp(&c->key, &key, sizeof(key)) != 0) {
 			p = c;
@@ -2277,7 +2277,7 @@ int si_shader_select(struct pipe_context *ctx,
 		shader->next_variant = sel->current;
 		sel->current = shader;
 	} else {
-		shader = CALLOC(1, sizeof(struct si_pipe_shader));
+		shader = CALLOC(1, sizeof(struct si_shader));
 		shader->selector = sel;
 		shader->key = key;
 
@@ -2395,7 +2395,7 @@ static void si_delete_shader_selector(struct pipe_context *ctx,
 				      struct si_pipe_shader_selector *sel)
 {
 	struct si_context *sctx = (struct si_context *)ctx;
-	struct si_pipe_shader *p = sel->current, *c;
+	struct si_shader *p = sel->current, *c;
 
 	while (p) {
 		c = p->next_variant;
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 54f2fd96234..acc2ef39897 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -39,7 +39,7 @@
  * Shaders
  */
 
-static void si_pipe_shader_es(struct pipe_context *ctx, struct si_pipe_shader *shader)
+static void si_pipe_shader_es(struct pipe_context *ctx, struct si_shader *shader)
 {
 	struct si_context *sctx = (struct si_context *)ctx;
 	struct si_pm4_state *pm4;
@@ -56,7 +56,7 @@ static void si_pipe_shader_es(struct pipe_context *ctx, struct si_pipe_shader *s
 	va = shader->bo->gpu_address;
 	si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_SHADER_DATA);
 
-	vgpr_comp_cnt = shader->shader.uses_instanceid ? 3 : 0;
+	vgpr_comp_cnt = shader->uses_instanceid ? 3 : 0;
 
 	num_user_sgprs = SI_VS_NUM_USER_SGPR;
 	num_sgprs = shader->num_sgprs;
@@ -79,11 +79,11 @@ static void si_pipe_shader_es(struct pipe_context *ctx, struct si_pipe_shader *s
 	sctx->b.flags |= R600_CONTEXT_INV_SHADER_CACHE;
 }
 
-static void si_pipe_shader_gs(struct pipe_context *ctx, struct si_pipe_shader *shader)
+static void si_pipe_shader_gs(struct pipe_context *ctx, struct si_shader *shader)
 {
 	struct si_context *sctx = (struct si_context *)ctx;
-	unsigned gs_vert_itemsize = shader->shader.noutput * (16 >> 2);
-	unsigned gs_max_vert_out = shader->shader.gs_max_out_vertices;
+	unsigned gs_vert_itemsize = shader->noutput * (16 >> 2);
+	unsigned gs_max_vert_out = shader->gs_max_out_vertices;
 	unsigned gsvs_itemsize = gs_vert_itemsize * gs_max_vert_out;
 	unsigned cut_mode;
 	struct si_pm4_state *pm4;
@@ -121,7 +121,7 @@ static void si_pipe_shader_gs(struct pipe_context *ctx, struct si_pipe_shader *s
 	si_pm4_set_reg(pm4, R_028A68_VGT_GSVS_RING_OFFSET_3, gsvs_itemsize);
 
 	si_pm4_set_reg(pm4, R_028AAC_VGT_ESGS_RING_ITEMSIZE,
-		       shader->shader.nparam * (16 >> 2));
+		       shader->nparam * (16 >> 2));
 	si_pm4_set_reg(pm4, R_028AB0_VGT_GSVS_RING_ITEMSIZE, gsvs_itemsize);
 
 	si_pm4_set_reg(pm4, R_028B38_VGT_GS_MAX_VERT_OUT, gs_max_vert_out);
@@ -151,7 +151,7 @@ static void si_pipe_shader_gs(struct pipe_context *ctx, struct si_pipe_shader *s
 	sctx->b.flags |= R600_CONTEXT_INV_SHADER_CACHE;
 }
 
-static void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *shader)
+static void si_pipe_shader_vs(struct pipe_context *ctx, struct si_shader *shader)
 {
 	struct si_context *sctx = (struct si_context *)ctx;
 	struct si_pm4_state *pm4;
@@ -168,7 +168,7 @@ static void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *s
 	va = shader->bo->gpu_address;
 	si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_SHADER_DATA);
 
-	vgpr_comp_cnt = shader->shader.uses_instanceid ? 3 : 0;
+	vgpr_comp_cnt = shader->uses_instanceid ? 3 : 0;
 
 	num_user_sgprs = SI_VS_NUM_USER_SGPR;
 	num_sgprs = shader->num_sgprs;
@@ -182,8 +182,8 @@ static void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *s
 	 * VS is required to export at least one param and r600_shader_from_tgsi()
 	 * takes care of adding a dummy export.
 	 */
-	for (nparams = 0, i = 0 ; i < shader->shader.noutput; i++) {
-		switch (shader->shader.output[i].name) {
+	for (nparams = 0, i = 0 ; i < shader->noutput; i++) {
+		switch (shader->output[i].name) {
 		case TGSI_SEMANTIC_CLIPVERTEX:
 		case TGSI_SEMANTIC_POSITION:
 		case TGSI_SEMANTIC_PSIZE:
@@ -200,13 +200,13 @@ static void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *s
 
 	si_pm4_set_reg(pm4, R_02870C_SPI_SHADER_POS_FORMAT,
 		       S_02870C_POS0_EXPORT_FORMAT(V_02870C_SPI_SHADER_4COMP) |
-		       S_02870C_POS1_EXPORT_FORMAT(shader->shader.nr_pos_exports > 1 ?
+		       S_02870C_POS1_EXPORT_FORMAT(shader->nr_pos_exports > 1 ?
 						   V_02870C_SPI_SHADER_4COMP :
 						   V_02870C_SPI_SHADER_NONE) |
-		       S_02870C_POS2_EXPORT_FORMAT(shader->shader.nr_pos_exports > 2 ?
+		       S_02870C_POS2_EXPORT_FORMAT(shader->nr_pos_exports > 2 ?
 						   V_02870C_SPI_SHADER_4COMP :
 						   V_02870C_SPI_SHADER_NONE) |
-		       S_02870C_POS3_EXPORT_FORMAT(shader->shader.nr_pos_exports > 3 ?
+		       S_02870C_POS3_EXPORT_FORMAT(shader->nr_pos_exports > 3 ?
 						   V_02870C_SPI_SHADER_4COMP :
 						   V_02870C_SPI_SHADER_NONE));
 
@@ -227,7 +227,7 @@ static void si_pipe_shader_vs(struct pipe_context *ctx, struct si_pipe_shader *s
 	sctx->b.flags |= R600_CONTEXT_INV_SHADER_CACHE;
 }
 
-static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *shader)
+static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_shader *shader)
 {
 	struct si_context *sctx = (struct si_context *)ctx;
 	struct si_pm4_state *pm4;
@@ -242,10 +242,10 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *s
 	if (pm4 == NULL)
 		return;
 
-	for (i = 0; i < shader->shader.ninput; i++) {
-		switch (shader->shader.input[i].name) {
+	for (i = 0; i < shader->ninput; i++) {
+		switch (shader->input[i].name) {
 		case TGSI_SEMANTIC_POSITION:
-			if (shader->shader.input[i].centroid) {
+			if (shader->input[i].centroid) {
 				/* SPI_BARYC_CNTL.POS_FLOAT_LOCATION
 				 * Possible vaules:
 				 * 0 -> Position = pixel center (default)
@@ -261,7 +261,7 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *s
 		}
 	}
 
-	spi_ps_in_control = S_0286D8_NUM_INTERP(shader->shader.nparam) |
+	spi_ps_in_control = S_0286D8_NUM_INTERP(shader->nparam) |
 		S_0286D8_BC_OPTIMIZE_DISABLE(1);
 
 	si_pm4_set_reg(pm4, R_0286E0_SPI_BARYC_CNTL, spi_baryc_cntl);
@@ -427,7 +427,7 @@ static bool si_update_draw_info_state(struct si_context *sctx,
 	unsigned prim = si_conv_pipe_prim(info->mode);
 	unsigned gs_out_prim =
 		si_conv_prim_to_gs_out(sctx->gs_shader ?
-				       sctx->gs_shader->current->shader.gs_output_prim :
+				       sctx->gs_shader->current->gs_output_prim :
 				       info->mode);
 	unsigned ls_mask = 0;
 	unsigned ia_multi_vgt_param = si_get_ia_multi_vgt_param(sctx, info);
@@ -492,7 +492,7 @@ static bool si_update_draw_info_state(struct si_context *sctx,
 
 static void si_update_spi_map(struct si_context *sctx)
 {
-	struct si_shader *ps = &sctx->ps_shader->current->shader;
+	struct si_shader *ps = sctx->ps_shader->current;
 	struct si_shader *vs = si_get_vs_state(sctx);
 	struct si_pm4_state *pm4 = si_pm4_alloc_state(sctx);
 	unsigned i, j, tmp;
@@ -634,8 +634,8 @@ static void si_update_derived_state(struct si_context *sctx)
 
 		si_set_ring_buffer(ctx, PIPE_SHADER_GEOMETRY, SI_RING_GSVS,
 				   &sctx->gsvs_ring,
-				   sctx->gs_shader->current->shader.gs_max_out_vertices *
-				   sctx->gs_shader->current->shader.noutput * 16,
+				   sctx->gs_shader->current->gs_max_out_vertices *
+				   sctx->gs_shader->current->noutput * 16,
 				   64, true, true, 4, 16);
 
 		if (!sctx->gs_on) {