nv50/ir: fix threads calculation for non-compute shaders

We were using the "cp" union fields, which are only valid for compute
shaders. The threads calculation affects the available GPRs, so just
pick a small number for other shader types to avoid limiting available
registers.

Signed-off-by: Ilia Mirkin <[email protected]>
Cc: [email protected]
(cherry picked from commit 3645268748c44825ce8d37bf03f684731eb2652a)

1 files changed, 9 insertions, 5 deletions

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h b/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h
index e9d10574835..afeca14d7d1 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target.h
@@ -174,11 +174,15 @@ public:
    virtual void getBuiltinCode(const uint32_t **code, uint32_t *size) const = 0;
 
    virtual void parseDriverInfo(const struct nv50_ir_prog_info *info) {
-      threads = info->prop.cp.numThreads[0] *
-         info->prop.cp.numThreads[1] *
-         info->prop.cp.numThreads[2];
-      if (threads == 0)
-         threads = info->target >= NVISA_GK104_CHIPSET ? 1024 : 512;
+      if (info->type == PIPE_SHADER_COMPUTE) {
+         threads = info->prop.cp.numThreads[0] *
+            info->prop.cp.numThreads[1] *
+            info->prop.cp.numThreads[2];
+         if (threads == 0)
+            threads = info->target >= NVISA_GK104_CHIPSET ? 1024 : 512;
+      } else {
+         threads = 32; // doesn't matter, just not too big.
+      }
    }
 
    virtual bool runLegalizePass(Program *, CGStage stage) const = 0;