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authorRob Clark <[email protected]>2019-10-25 13:57:49 -0700
committerRob Clark <[email protected]>2019-11-09 02:49:15 +0000
commitf3980a8ef7843bb95fca2f7831fcb58fa6c97ee1 (patch)
tree234420da0d60e7b9027877810e9626837026c7dc /src/gallium/drivers
parentf0f9ec6882fc749943d9a7147318b7b05d74bf4f (diff)
freedreno/a4xx: fix SP_FS_MRT_REG.HALF_PRECISION
Set flag based on actual output reg type. Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/freedreno/a4xx/fd4_program.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_program.c b/src/gallium/drivers/freedreno/a4xx/fd4_program.c
index b982d5d06e7..002de9f1923 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_program.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_program.c
@@ -411,7 +411,7 @@ fd4_program_emit(struct fd_ringbuffer *ring, struct fd4_emit *emit,
OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(color_regid[i]) |
A4XX_SP_FS_MRT_REG_MRTFORMAT(format) |
COND(srgb, A4XX_SP_FS_MRT_REG_COLOR_SRGB) |
- COND(emit->key.half_precision,
+ COND(color_regid[i] & HALF_REG_ID,
A4XX_SP_FS_MRT_REG_HALF_PRECISION));
}