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authorRob Clark <[email protected]>2019-05-06 14:52:27 -0700
committerRob Clark <[email protected]>2019-05-07 07:26:00 -0700
commit23e7a34466c448c4c7c9a2c2e4d200dedf2584f7 (patch)
tree9feaa00be35bce3642c01a29588956ae237c6b09 /src/gallium/drivers
parentef3eecd66bdcaa3991dd2b53cb3e7285bed6d718 (diff)
freedreno/ir3: consolidate const state
Combine the offsets of differenet parts of the constant space with (what was formerly known as) ir3_driver_const_layout. Bunch of churn, but no functional change. Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/freedreno/ir3/ir3_gallium.c38
1 files changed, 23 insertions, 15 deletions
diff --git a/src/gallium/drivers/freedreno/ir3/ir3_gallium.c b/src/gallium/drivers/freedreno/ir3/ir3_gallium.c
index 0f4427f3028..3bb29daf9b8 100644
--- a/src/gallium/drivers/freedreno/ir3/ir3_gallium.c
+++ b/src/gallium/drivers/freedreno/ir3/ir3_gallium.c
@@ -241,7 +241,8 @@ emit_user_consts(struct fd_context *ctx, const struct ir3_shader_variant *v,
* the user consts early to avoid HLSQ lockup caused by
* writing too many consts
*/
- uint32_t max_const = MIN2(v->num_uniforms, v->constlen);
+ const struct ir3_const_state *const_state = &v->const_state;
+ uint32_t max_const = MIN2(const_state->num_uniforms, v->constlen);
/* and even if the start of the const buffer is before
* first_immediate, the end may not be:
@@ -280,9 +281,10 @@ static void
emit_ubos(struct fd_context *ctx, const struct ir3_shader_variant *v,
struct fd_ringbuffer *ring, struct fd_constbuf_stateobj *constbuf)
{
- uint32_t offset = v->constbase.ubo;
+ const struct ir3_const_state *const_state = &v->const_state;
+ uint32_t offset = const_state->offsets.ubo;
if (v->constlen > offset) {
- uint32_t params = v->num_ubos;
+ uint32_t params = const_state->num_ubos;
uint32_t offsets[params];
struct pipe_resource *prscs[params];
@@ -309,14 +311,15 @@ static void
emit_ssbo_sizes(struct fd_context *ctx, const struct ir3_shader_variant *v,
struct fd_ringbuffer *ring, struct fd_shaderbuf_stateobj *sb)
{
- uint32_t offset = v->constbase.ssbo_sizes;
+ const struct ir3_const_state *const_state = &v->const_state;
+ uint32_t offset = const_state->offsets.ssbo_sizes;
if (v->constlen > offset) {
- uint32_t sizes[align(v->const_layout.ssbo_size.count, 4)];
- unsigned mask = v->const_layout.ssbo_size.mask;
+ uint32_t sizes[align(const_state->ssbo_size.count, 4)];
+ unsigned mask = const_state->ssbo_size.mask;
while (mask) {
unsigned index = u_bit_scan(&mask);
- unsigned off = v->const_layout.ssbo_size.off[index];
+ unsigned off = const_state->ssbo_size.off[index];
sizes[off] = sb->sb[index].buffer_size;
}
@@ -330,16 +333,17 @@ static void
emit_image_dims(struct fd_context *ctx, const struct ir3_shader_variant *v,
struct fd_ringbuffer *ring, struct fd_shaderimg_stateobj *si)
{
- uint32_t offset = v->constbase.image_dims;
+ const struct ir3_const_state *const_state = &v->const_state;
+ uint32_t offset = const_state->offsets.image_dims;
if (v->constlen > offset) {
- uint32_t dims[align(v->const_layout.image_dims.count, 4)];
- unsigned mask = v->const_layout.image_dims.mask;
+ uint32_t dims[align(const_state->image_dims.count, 4)];
+ unsigned mask = const_state->image_dims.mask;
while (mask) {
struct pipe_image_view *img;
struct fd_resource *rsc;
unsigned index = u_bit_scan(&mask);
- unsigned off = v->const_layout.image_dims.off[index];
+ unsigned off = const_state->image_dims.off[index];
img = &si->si[index];
rsc = fd_resource(img->resource);
@@ -382,8 +386,9 @@ static void
emit_immediates(struct fd_context *ctx, const struct ir3_shader_variant *v,
struct fd_ringbuffer *ring)
{
+ const struct ir3_const_state *const_state = &v->const_state;
+ uint32_t base = const_state->offsets.immediate;
int size = v->immediates_count;
- uint32_t base = v->constbase.immediate;
/* truncate size to avoid writing constants that shader
* does not use:
@@ -407,7 +412,8 @@ emit_tfbos(struct fd_context *ctx, const struct ir3_shader_variant *v,
struct fd_ringbuffer *ring)
{
/* streamout addresses after driver-params: */
- uint32_t offset = v->constbase.tfbo;
+ const struct ir3_const_state *const_state = &v->const_state;
+ uint32_t offset = const_state->offsets.tfbo;
if (v->constlen > offset) {
struct fd_streamout_stateobj *so = &ctx->streamout;
struct ir3_stream_output_info *info = &v->shader->stream_output;
@@ -534,7 +540,8 @@ ir3_emit_vs_consts(const struct ir3_shader_variant *v, struct fd_ringbuffer *rin
/* emit driver params every time: */
/* TODO skip emit if shader doesn't use driver params to avoid WFI.. */
if (info) {
- uint32_t offset = v->constbase.driver_param;
+ const struct ir3_const_state *const_state = &v->const_state;
+ uint32_t offset = const_state->offsets.driver_param;
if (v->constlen > offset) {
uint32_t vertex_params[IR3_DP_VS_COUNT] = {
[IR3_DP_VTXID_BASE] = info->index_size ?
@@ -628,7 +635,8 @@ ir3_emit_cs_consts(const struct ir3_shader_variant *v, struct fd_ringbuffer *rin
emit_common_consts(v, ring, ctx, PIPE_SHADER_COMPUTE);
/* emit compute-shader driver-params: */
- uint32_t offset = v->constbase.driver_param;
+ const struct ir3_const_state *const_state = &v->const_state;
+ uint32_t offset = const_state->offsets.driver_param;
if (v->constlen > offset) {
ring_wfi(ctx->batch, ring);