radeonsi: add support for Vega12

Reviewed-by: Alex Deucher <[email protected]>

4 files changed, 7 insertions, 1 deletions

diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c
index b4ca5bea943..fc2be33b3e4 100644
--- a/src/gallium/drivers/radeonsi/si_get.c
+++ b/src/gallium/drivers/radeonsi/si_get.c
@@ -75,6 +75,7 @@ const char *si_get_family_name(const struct si_screen *sscreen)
 	case CHIP_POLARIS12: return "AMD POLARIS12";
 	case CHIP_STONEY: return "AMD STONEY";
 	case CHIP_VEGA10: return "AMD VEGA10";
+	case CHIP_VEGA12: return "AMD VEGA12";
 	case CHIP_RAVEN: return "AMD RAVEN";
 	default: return "AMD unknown";
 	}
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 3d787d58cd1..fa9ee43389a 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -828,6 +828,7 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
 		sscreen->dpbb_allowed = true;
 	} else {
 		/* Only enable primitive binning on Raven by default. */
+		/* TODO: Investigate if binning is profitable on Vega12. */
 		sscreen->dpbb_allowed = sscreen->info.family == CHIP_RAVEN &&
 					!(sscreen->debug_flags & DBG(NO_DPBB));
 	}
@@ -855,6 +856,7 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
 		sscreen->rbplus_allowed =
 			!(sscreen->debug_flags & DBG(NO_RB_PLUS)) &&
 			(sscreen->info.family == CHIP_STONEY ||
+			 sscreen->info.family == CHIP_VEGA12 ||
 			 sscreen->info.family == CHIP_RAVEN);
 	}
 
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 1bfb3c34aa7..b4165a4669b 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -1675,7 +1675,8 @@ static uint32_t si_translate_texformat(struct pipe_screen *screen,
 
 	if (desc->layout == UTIL_FORMAT_LAYOUT_ETC &&
 	    (sscreen->info.family == CHIP_STONEY ||
-	     sscreen->info.chip_class >= GFX9)) {
+	     sscreen->info.family == CHIP_VEGA10 ||
+	     sscreen->info.family == CHIP_RAVEN)) {
 		switch (format) {
 		case PIPE_FORMAT_ETC1_RGB8:
 		case PIPE_FORMAT_ETC2_RGB8:
@@ -5045,6 +5046,7 @@ static void si_init_config(struct si_context *sctx)
 
 		switch (sctx->b.family) {
 		case CHIP_VEGA10:
+		case CHIP_VEGA12:
 			pc_lines = 4096;
 			break;
 		case CHIP_RAVEN:
diff --git a/src/gallium/drivers/radeonsi/si_state_binning.c b/src/gallium/drivers/radeonsi/si_state_binning.c
index 686701d718f..0f50ea755cb 100644
--- a/src/gallium/drivers/radeonsi/si_state_binning.c
+++ b/src/gallium/drivers/radeonsi/si_state_binning.c
@@ -414,6 +414,7 @@ void si_emit_dpbb_state(struct si_context *sctx, struct r600_atom *state)
 
 	switch (sctx->b.family) {
 	case CHIP_VEGA10:
+	case CHIP_VEGA12:
 	case CHIP_RAVEN:
 		/* Tuned for Raven. Vega might need different values. */
 		context_states_per_bin = 5;