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authorDave Airlie <[email protected]>2017-11-23 10:19:14 +1000
committerDave Airlie <[email protected]>2017-11-30 09:53:22 +1000
commit2c4861e45319adae190fe59caa5950c064ca0d3c (patch)
treeea361cc87480de632708f49233151b8aff1e8cee /src/gallium/drivers
parentea355e29f783701bb63a08a50f96cf18fcc79df6 (diff)
r600: no need to reinit compute regs
Compute setup gets emitted into the normal gfx state buffer, so no need to reinit the basics. Signed-off-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/r600/evergreen_compute.c13
1 files changed, 0 insertions, 13 deletions
diff --git a/src/gallium/drivers/r600/evergreen_compute.c b/src/gallium/drivers/r600/evergreen_compute.c
index 0573f8ee2b5..59063b1e3a6 100644
--- a/src/gallium/drivers/r600/evergreen_compute.c
+++ b/src/gallium/drivers/r600/evergreen_compute.c
@@ -898,11 +898,6 @@ void evergreen_init_atom_start_compute_cs(struct r600_context *rctx)
r600_init_command_buffer(cb, 256);
cb->pkt_flags = RADEON_CP_PACKET3_COMPUTE_MODE;
- /* This must be first. */
- r600_store_value(cb, PKT3(PKT3_CONTEXT_CONTROL, 1, 0));
- r600_store_value(cb, 0x80000000);
- r600_store_value(cb, 0x80000000);
-
/* We're setting config registers here. */
r600_store_value(cb, PKT3(PKT3_EVENT_WRITE, 0, 0));
r600_store_value(cb, EVENT_TYPE(EVENT_TYPE_CS_PARTIAL_FLUSH) | EVENT_INDEX(4));
@@ -952,14 +947,6 @@ void evergreen_init_atom_start_compute_cs(struct r600_context *rctx)
break;
}
- /* Config Registers */
- if (rctx->b.chip_class < CAYMAN)
- evergreen_init_common_regs(rctx, cb, rctx->b.chip_class, rctx->b.family,
- rctx->screen->b.info.drm_minor);
- else
- cayman_init_common_regs(cb, rctx->b.chip_class, rctx->b.family,
- rctx->screen->b.info.drm_minor);
-
/* The primitive type always needs to be POINTLIST for compute. */
r600_store_config_reg(cb, R_008958_VGT_PRIMITIVE_TYPE,
V_008958_DI_PT_POINTLIST);