diff options
| author | Younes Manton <[email protected]> | 2010-04-30 20:42:30 -0400 |
|---|---|---|
| committer | Younes Manton <[email protected]> | 2010-04-30 20:42:30 -0400 |
| commit | a8ea1dacc63ac567498049e5756c247b9fec6cd9 (patch) | |
| tree | 4031e2e2b6166bd926b43fa4bbb3aab773a30ee5 /src/gallium/drivers | |
| parent | 404fb63b4649f58fce443615e49337d42b8ddece (diff) | |
| parent | 35d960cc744c374ccaad48c3d80559b59c74e28a (diff) | |
Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/mesa into pipe-video
Conflicts:
src/gallium/auxiliary/Makefile
src/gallium/auxiliary/SConscript
src/gallium/auxiliary/util/u_format.csv
src/gallium/auxiliary/vl/vl_compositor.c
src/gallium/auxiliary/vl/vl_compositor.h
src/gallium/auxiliary/vl/vl_mpeg12_mc_renderer.c
src/gallium/auxiliary/vl/vl_mpeg12_mc_renderer.h
src/gallium/drivers/identity/id_objects.c
src/gallium/drivers/identity/id_objects.h
src/gallium/drivers/identity/id_screen.c
src/gallium/drivers/nv40/Makefile
src/gallium/drivers/nv40/nv40_screen.c
src/gallium/drivers/softpipe/sp_texture.c
src/gallium/drivers/softpipe/sp_texture.h
src/gallium/drivers/softpipe/sp_video_context.c
src/gallium/drivers/softpipe/sp_video_context.h
src/gallium/include/pipe/p_format.h
src/gallium/include/pipe/p_screen.h
src/gallium/include/pipe/p_video_context.h
src/gallium/include/pipe/p_video_state.h
src/gallium/include/state_tracker/dri1_api.h
src/gallium/include/state_tracker/drm_api.h
src/gallium/state_trackers/dri/common/dri_context.c
src/gallium/state_trackers/xorg/xvmc/attributes.c
src/gallium/state_trackers/xorg/xvmc/block.c
src/gallium/state_trackers/xorg/xvmc/context.c
src/gallium/state_trackers/xorg/xvmc/subpicture.c
src/gallium/state_trackers/xorg/xvmc/surface.c
src/gallium/state_trackers/xorg/xvmc/tests/.gitignore
src/gallium/state_trackers/xorg/xvmc/tests/Makefile
src/gallium/state_trackers/xorg/xvmc/xvmc_private.h
src/gallium/winsys/drm/radeon/core/radeon_drm.c
src/gallium/winsys/g3dvl/vl_winsys.h
src/gallium/winsys/g3dvl/xlib/xsp_winsys.c
src/gallium/winsys/sw/Makefile
Diffstat (limited to 'src/gallium/drivers')
426 files changed, 36341 insertions, 24294 deletions
diff --git a/src/gallium/drivers/cell/ppu/cell_context.c b/src/gallium/drivers/cell/ppu/cell_context.c index 5bff9869fd0..49cece58b8f 100644 --- a/src/gallium/drivers/cell/ppu/cell_context.c +++ b/src/gallium/drivers/cell/ppu/cell_context.c @@ -36,7 +36,6 @@ #include "pipe/p_defines.h" #include "pipe/p_format.h" #include "util/u_memory.h" -#include "util/u_simple_screen.h" #include "pipe/p_screen.h" #include "draw/draw_context.h" @@ -100,8 +99,8 @@ static const struct debug_named_value cell_debug_flags[] = { }; static unsigned int -cell_is_texture_referenced( struct pipe_context *pipe, - struct pipe_texture *texture, +cell_is_resource_referenced( struct pipe_context *pipe, + struct pipe_resource *texture, unsigned face, unsigned level) { /** @@ -111,16 +110,6 @@ cell_is_texture_referenced( struct pipe_context *pipe, return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE; } -static unsigned int -cell_is_buffer_referenced( struct pipe_context *pipe, - struct pipe_buffer *buf) -{ - /** - * FIXME: Optimize. - */ - - return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE; -} struct pipe_context * cell_create_context(struct pipe_screen *screen, @@ -137,7 +126,7 @@ cell_create_context(struct pipe_screen *screen, memset(cell, 0, sizeof(*cell)); cell->winsys = NULL; /* XXX: fixme - get this from screen? */ - cell->pipe.winsys = screen->winsys; + cell->pipe.winsys = NULL; cell->pipe.screen = screen; cell->pipe.priv = priv; cell->pipe.destroy = cell_destroy_context; @@ -145,8 +134,7 @@ cell_create_context(struct pipe_screen *screen, cell->pipe.clear = cell_clear; cell->pipe.flush = cell_flush; - cell->pipe.is_texture_referenced = cell_is_texture_referenced; - cell->pipe.is_buffer_referenced = cell_is_buffer_referenced; + cell->pipe.is_resource_referenced = cell_is_resource_referenced; #if 0 cell->pipe.begin_query = cell_begin_query; @@ -159,6 +147,7 @@ cell_create_context(struct pipe_screen *screen, cell_init_shader_functions(cell); cell_init_surface_functions(cell); cell_init_vertex_functions(cell); + cell_init_texture_transfer_funcs(cell); cell->draw = cell_draw_create(cell); diff --git a/src/gallium/drivers/cell/ppu/cell_context.h b/src/gallium/drivers/cell/ppu/cell_context.h index a77cc5b9067..07b6eebc69c 100644 --- a/src/gallium/drivers/cell/ppu/cell_context.h +++ b/src/gallium/drivers/cell/ppu/cell_context.h @@ -34,7 +34,7 @@ #include "pipe/p_defines.h" #include "draw/draw_vertex.h" #include "draw/draw_vbuf.h" -#include "cell_winsys.h" +/*#include "cell_winsys.h"*/ #include "cell/common.h" #include "rtasm/rtasm_ppc_spe.h" #include "tgsi/tgsi_scan.h" @@ -93,6 +93,11 @@ struct cell_buffer_list struct cell_buffer_node *head; }; +struct cell_velems_state +{ + unsigned count; + struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS]; +}; /** * Per-context state, subclass of pipe_context. @@ -110,23 +115,23 @@ struct cell_context const struct pipe_rasterizer_state *rasterizer; const struct cell_vertex_shader_state *vs; const struct cell_fragment_shader_state *fs; + const struct cell_velems_state *velems; struct spe_function logic_op; struct pipe_blend_color blend_color; struct pipe_stencil_ref stencil_ref; struct pipe_clip_state clip; - struct pipe_buffer *constants[2]; + struct pipe_resource *constants[2]; struct pipe_framebuffer_state framebuffer; struct pipe_poly_stipple poly_stipple; struct pipe_scissor_state scissor; - struct cell_texture *texture[PIPE_MAX_SAMPLERS]; + struct cell_resource *texture[PIPE_MAX_SAMPLERS]; + struct pipe_sampler_view *fragment_sampler_views[PIPE_MAX_SAMPLERS]; uint num_textures; struct pipe_viewport_state viewport; struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS]; uint num_vertex_buffers; - struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS]; - uint num_vertex_elements; ubyte *cbuf_map[PIPE_MAX_COLOR_BUFS]; ubyte *zsbuf_map; diff --git a/src/gallium/drivers/cell/ppu/cell_draw_arrays.c b/src/gallium/drivers/cell/ppu/cell_draw_arrays.c index bffd0fac6fe..b50a30bee80 100644 --- a/src/gallium/drivers/cell/ppu/cell_draw_arrays.c +++ b/src/gallium/drivers/cell/ppu/cell_draw_arrays.c @@ -33,48 +33,18 @@ #include "pipe/p_defines.h" #include "pipe/p_context.h" -#include "util/u_simple_screen.h" #include "util/u_inlines.h" #include "cell_context.h" #include "cell_draw_arrays.h" #include "cell_state.h" #include "cell_flush.h" +#include "cell_texture.h" #include "draw/draw_context.h" -static void -cell_map_constant_buffers(struct cell_context *sp) -{ - struct pipe_winsys *ws = sp->pipe.winsys; - uint i; - for (i = 0; i < 2; i++) { - if (sp->constants[i] && sp->constants[i]->size) { - sp->mapped_constants[i] = ws->buffer_map(ws, sp->constants[i], - PIPE_BUFFER_USAGE_CPU_READ); - cell_flush_buffer_range(sp, sp->mapped_constants[i], - sp->constants[i]->size); - } - } - - draw_set_mapped_constant_buffer(sp->draw, PIPE_SHADER_VERTEX, 0, - sp->mapped_constants[PIPE_SHADER_VERTEX], - sp->constants[PIPE_SHADER_VERTEX]->size); -} - -static void -cell_unmap_constant_buffers(struct cell_context *sp) -{ - struct pipe_winsys *ws = sp->pipe.winsys; - uint i; - for (i = 0; i < 2; i++) { - if (sp->constants[i] && sp->constants[i]->size) - ws->buffer_unmap(ws, sp->constants[i]); - sp->mapped_constants[i] = NULL; - } -} @@ -87,44 +57,39 @@ cell_unmap_constant_buffers(struct cell_context *sp) */ static void cell_draw_range_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, + struct pipe_resource *indexBuffer, unsigned indexSize, + int indexBias, unsigned min_index, unsigned max_index, unsigned mode, unsigned start, unsigned count) { - struct cell_context *sp = cell_context(pipe); - struct draw_context *draw = sp->draw; + struct cell_context *cell = cell_context(pipe); + struct draw_context *draw = cell->draw; unsigned i; - if (sp->dirty) - cell_update_derived( sp ); + if (cell->dirty) + cell_update_derived( cell ); #if 0 - cell_map_surfaces(sp); + cell_map_surfaces(cell); #endif - cell_map_constant_buffers(sp); /* * Map vertex buffers */ - for (i = 0; i < sp->num_vertex_buffers; i++) { - void *buf = pipe_buffer_map(pipe->screen, - sp->vertex_buffer[i].buffer, - PIPE_BUFFER_USAGE_CPU_READ); - cell_flush_buffer_range(sp, buf, sp->vertex_buffer[i].buffer->size); + for (i = 0; i < cell->num_vertex_buffers; i++) { + void *buf = cell_resource(cell->vertex_buffer[i].buffer)->data; draw_set_mapped_vertex_buffer(draw, i, buf); } /* Map index buffer, if present */ if (indexBuffer) { - void *mapped_indexes = pipe_buffer_map(pipe->screen, - indexBuffer, - PIPE_BUFFER_USAGE_CPU_READ); - draw_set_mapped_element_buffer(draw, indexSize, mapped_indexes); + void *mapped_indexes = cell_resource(indexBuffer)->data; + draw_set_mapped_element_buffer(draw, indexSize, indexBias, mapped_indexes); } else { /* no index/element buffer */ - draw_set_mapped_element_buffer(draw, 0, NULL); + draw_set_mapped_element_buffer(draw, 0, 0, NULL); } @@ -134,28 +99,30 @@ cell_draw_range_elements(struct pipe_context *pipe, /* * unmap vertex/index buffers - will cause draw module to flush */ - for (i = 0; i < sp->num_vertex_buffers; i++) { + for (i = 0; i < cell->num_vertex_buffers; i++) { draw_set_mapped_vertex_buffer(draw, i, NULL); - pipe_buffer_unmap(pipe->screen, sp->vertex_buffer[i].buffer); } if (indexBuffer) { draw_set_mapped_element_buffer(draw, 0, NULL); - pipe_buffer_unmap(pipe->screen, indexBuffer); } - /* Note: leave drawing surfaces mapped */ - cell_unmap_constant_buffers(sp); + /* + * TODO: Flush only when a user vertex/index buffer is present + * (or even better, modify draw module to do this + * internally when this condition is seen?) + */ + draw_flush(draw); } static void cell_draw_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, - unsigned indexSize, + struct pipe_resource *indexBuffer, + unsigned indexSize, int indexBias, unsigned mode, unsigned start, unsigned count) { cell_draw_range_elements( pipe, indexBuffer, - indexSize, + indexSize, indeBias, 0, 0xffffffff, mode, start, count ); } @@ -165,7 +132,7 @@ static void cell_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start, unsigned count) { - cell_draw_elements(pipe, NULL, 0, mode, start, count); + cell_draw_elements(pipe, NULL, 0, 0, mode, start, count); } diff --git a/src/gallium/drivers/cell/ppu/cell_fence.c b/src/gallium/drivers/cell/ppu/cell_fence.c index e10071529a8..eac798e8cf6 100644 --- a/src/gallium/drivers/cell/ppu/cell_fence.c +++ b/src/gallium/drivers/cell/ppu/cell_fence.c @@ -82,7 +82,7 @@ cell_fence_finish(const struct cell_context *cell, struct cell_buffer_node { - struct pipe_buffer *buffer; + struct pipe_resource *buffer; struct cell_buffer_node *next; }; @@ -90,13 +90,12 @@ struct cell_buffer_node static void cell_add_buffer_to_list(struct cell_context *cell, struct cell_buffer_list *list, - struct pipe_buffer *buffer) + struct pipe_resource *buffer) { - struct pipe_screen *ps = cell->pipe.screen; struct cell_buffer_node *node = CALLOC_STRUCT(cell_buffer_node); /* create new list node which references the buffer, insert at head */ if (node) { - pipe_buffer_reference(&node->buffer, buffer); + pipe_resource_reference(&node->buffer, buffer); node->next = list->head; list->head = node; } @@ -130,7 +129,7 @@ cell_free_fenced_buffers(struct cell_context *cell, if (node->buffer->reference.count == 1) printf(" Delete!\n"); #endif - pipe_buffer_reference(&node->buffer, NULL); + pipe_resource_reference(&node->buffer, NULL); FREE(node); node = next; } @@ -151,14 +150,19 @@ cell_add_fenced_textures(struct cell_context *cell) uint i; for (i = 0; i < cell->num_textures; i++) { - struct cell_texture *ct = cell->texture[i]; + struct cell_resource *ct = cell->texture[i]; if (ct) { #if 0 printf("Adding texture %p buffer %p to list\n", ct, ct->tiled_buffer[level]); #endif - if (ct->buffer) +#if 00 + /* XXX this needs to be fixed/restored! + * Maybe keep pointers to textures, not buffers. + */ + if (ct->base.buffer) cell_add_buffer_to_list(cell, list, ct->buffer); +#endif } } } diff --git a/src/gallium/drivers/cell/ppu/cell_gen_fragment.c b/src/gallium/drivers/cell/ppu/cell_gen_fragment.c index 576d514741d..628bc1c694b 100644 --- a/src/gallium/drivers/cell/ppu/cell_gen_fragment.c +++ b/src/gallium/drivers/cell/ppu/cell_gen_fragment.c @@ -1352,7 +1352,7 @@ gen_stencil_values(struct spe_function *f, */ ASSERT(fbS_reg != newS_reg); - /* The code also assumes the the stencil_max_value is of the form + /* The code also assumes that the stencil_max_value is of the form * 2^n-1 and can therefore be used as a mask for the valid bits in * addition to a maximum. Make sure this is the case as well. * The clever math below exploits the fact that incrementing a @@ -1859,7 +1859,7 @@ gen_depth_stencil(struct cell_context *cell, spe_comment(f, 0, "Fetch Z/stencil quad from tile"); switch(zs_format) { - case PIPE_FORMAT_Z24S8_UNORM: /* fall through */ + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: /* fall through */ case PIPE_FORMAT_Z24X8_UNORM: /* prepare mask to extract Z vals from ZS vals */ spe_load_uint(f, zmask_reg, 0x00ffffff); @@ -1880,7 +1880,7 @@ gen_depth_stencil(struct cell_context *cell, spe_rotmi(f, fbS_reg, fbZS_reg, -24); break; - case PIPE_FORMAT_S8Z24_UNORM: /* fall through */ + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: /* fall through */ case PIPE_FORMAT_X8Z24_UNORM: /* convert fragment Z from [0,1] to 32-bit ints */ spe_cfltu(f, fragZ_reg, fragZ_reg, 32); @@ -1969,12 +1969,12 @@ gen_depth_stencil(struct cell_context *cell, * fbS_reg has four 8-bit Z values in bits [7..0]. */ spe_comment(f, 0, "Store quad's depth/stencil values in tile"); - if (zs_format == PIPE_FORMAT_Z24S8_UNORM || + if (zs_format == PIPE_FORMAT_Z24_UNORM_S8_USCALED || zs_format == PIPE_FORMAT_Z24X8_UNORM) { spe_shli(f, fbS_reg, fbS_reg, 24); /* fbS = fbS << 24 */ spe_or(f, fbZS_reg, fbS_reg, fbZ_reg); /* fbZS = fbS | fbZ */ } - else if (zs_format == PIPE_FORMAT_S8Z24_UNORM || + else if (zs_format == PIPE_FORMAT_S8_USCALED_Z24_UNORM || zs_format == PIPE_FORMAT_X8Z24_UNORM) { spe_shli(f, fbZ_reg, fbZ_reg, 8); /* fbZ = fbZ << 8 */ spe_or(f, fbZS_reg, fbS_reg, fbZ_reg); /* fbZS = fbS | fbZ */ @@ -1985,7 +1985,7 @@ gen_depth_stencil(struct cell_context *cell, else if (zs_format == PIPE_FORMAT_Z16_UNORM) { spe_move(f, fbZS_reg, fbZ_reg); /* fbZS = fbZ */ } - else if (zs_format == PIPE_FORMAT_S8_UNORM) { + else if (zs_format == PIPE_FORMAT_S8_USCALED) { ASSERT(0); /* XXX to do */ } else { @@ -2015,7 +2015,7 @@ gen_depth_stencil(struct cell_context *cell, * code before the fragment shader to cull fragments/quads that are * totally occluded/discarded. * - * XXX we only support PIPE_FORMAT_S8Z24_UNORM z/stencil buffer right now. + * XXX we only support PIPE_FORMAT_S8_USCALED_Z24_UNORM z/stencil buffer right now. * * See the spu_default_fragment_ops() function to see how the per-fragment * operations would be done with ordinary C code. diff --git a/src/gallium/drivers/cell/ppu/cell_pipe_state.c b/src/gallium/drivers/cell/ppu/cell_pipe_state.c index 3d8b4409c75..8c975c6ae2a 100644 --- a/src/gallium/drivers/cell/ppu/cell_pipe_state.c +++ b/src/gallium/drivers/cell/ppu/cell_pipe_state.c @@ -257,8 +257,9 @@ cell_delete_sampler_state(struct pipe_context *pipe, static void -cell_set_sampler_textures(struct pipe_context *pipe, - unsigned num, struct pipe_texture **texture) +cell_set_fragment_sampler_views(struct pipe_context *pipe, + unsigned num, + struct pipe_sampler_view **views) { struct cell_context *cell = cell_context(pipe); uint i, changed = 0x0; @@ -266,12 +267,16 @@ cell_set_sampler_textures(struct pipe_context *pipe, assert(num <= CELL_MAX_SAMPLERS); for (i = 0; i < CELL_MAX_SAMPLERS; i++) { - struct cell_texture *new_tex = cell_texture(i < num ? texture[i] : NULL); - struct cell_texture *old_tex = cell->texture[i]; - if (old_tex != new_tex) { + struct pipe_sampler_view *new_view = i < num ? views[i] : NULL; + struct pipe_sampler_view *old_view = cell->fragment_sampler_views[i]; - pipe_texture_reference((struct pipe_texture **) &cell->texture[i], - (struct pipe_texture *) new_tex); + if (old_view != new_view) { + struct pipe_resource *new_tex = new_view ? new_view->texture : NULL; + + pipe_sampler_view_reference(&cell->fragment_sampler_views[i], + views[i]); + pipe_resource_reference((struct pipe_resource **) &cell->texture[i], + (struct pipe_resource *) new_tex); changed |= (1 << i); } @@ -286,34 +291,72 @@ cell_set_sampler_textures(struct pipe_context *pipe, } +static struct pipe_sampler_view * +cell_create_sampler_view(struct pipe_context *pipe, + struct pipe_resource *texture, + const struct pipe_sampler_view *templ) +{ + struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view); + + if (view) { + *view = *templ; + view->reference.count = 1; + view->texture = NULL; + pipe_resource_reference(&view->texture, texture); + view->context = pipe; + } + + return view; +} + + +static void +cell_sampler_view_destroy(struct pipe_context *pipe, + struct pipe_sampler_view *view) +{ + pipe_resource_reference(&view->texture, NULL); + FREE(view); +} + + /** * Map color and z/stencil framebuffer surfaces. */ static void cell_map_surfaces(struct cell_context *cell) { +#if 0 struct pipe_screen *screen = cell->pipe.screen; +#endif uint i; for (i = 0; i < 1; i++) { struct pipe_surface *ps = cell->framebuffer.cbufs[i]; if (ps) { - struct cell_texture *ct = cell_texture(ps->texture); + struct cell_resource *ct = cell_resource(ps->texture); +#if 0 cell->cbuf_map[i] = screen->buffer_map(screen, ct->buffer, (PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE)); +#else + cell->cbuf_map[i] = ct->data; +#endif } } { struct pipe_surface *ps = cell->framebuffer.zsbuf; if (ps) { - struct cell_texture *ct = cell_texture(ps->texture); + struct cell_resource *ct = cell_resource(ps->texture); +#if 0 cell->zsbuf_map = screen->buffer_map(screen, ct->buffer, (PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE)); +#else + cell->zsbuf_map = ct->data; +#endif } } } @@ -325,17 +368,17 @@ cell_map_surfaces(struct cell_context *cell) static void cell_unmap_surfaces(struct cell_context *cell) { - struct pipe_screen *screen = cell->pipe.screen; + /*struct pipe_screen *screen = cell->pipe.screen;*/ uint i; for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) { struct pipe_surface *ps = cell->framebuffer.cbufs[i]; if (ps && cell->cbuf_map[i]) { - struct cell_texture *ct = cell_texture(ps->texture); + /*struct cell_resource *ct = cell_resource(ps->texture);*/ assert(ps->texture); - assert(ct->buffer); + /*assert(ct->buffer);*/ - screen->buffer_unmap(screen, ct->buffer); + /*screen->buffer_unmap(screen, ct->buffer);*/ cell->cbuf_map[i] = NULL; } } @@ -343,8 +386,8 @@ cell_unmap_surfaces(struct cell_context *cell) { struct pipe_surface *ps = cell->framebuffer.zsbuf; if (ps && cell->zsbuf_map) { - struct cell_texture *ct = cell_texture(ps->texture); - screen->buffer_unmap(screen, ct->buffer); + /*struct cell_resource *ct = cell_resource(ps->texture);*/ + /*screen->buffer_unmap(screen, ct->buffer);*/ cell->zsbuf_map = NULL; } } @@ -399,7 +442,9 @@ cell_init_state_functions(struct cell_context *cell) cell->pipe.bind_fragment_sampler_states = cell_bind_sampler_states; cell->pipe.delete_sampler_state = cell_delete_sampler_state; - cell->pipe.set_fragment_sampler_textures = cell_set_sampler_textures; + cell->pipe.set_fragment_sampler_views = cell_set_fragment_sampler_views; + cell->pipe.create_sampler_view = cell_create_sampler_view; + cell->pipe.sampler_view_destroy = cell_sampler_view_destroy; cell->pipe.create_depth_stencil_alpha_state = cell_create_depth_stencil_alpha_state; cell->pipe.bind_depth_stencil_alpha_state = cell_bind_depth_stencil_alpha_state; diff --git a/src/gallium/drivers/cell/ppu/cell_public.h b/src/gallium/drivers/cell/ppu/cell_public.h new file mode 100644 index 00000000000..7e2e093565d --- /dev/null +++ b/src/gallium/drivers/cell/ppu/cell_public.h @@ -0,0 +1,10 @@ +#ifndef CELL_PUBLIC_H +#define CELL_PUBLIC_H + +struct pipe_screen; +struct sw_winsys; + +struct pipe_screen * +cell_create_screen(struct sw_winsys *winsys); + +#endif diff --git a/src/gallium/drivers/cell/ppu/cell_screen.c b/src/gallium/drivers/cell/ppu/cell_screen.c index a43f8638dcd..b4fd8d7235c 100644 --- a/src/gallium/drivers/cell/ppu/cell_screen.c +++ b/src/gallium/drivers/cell/ppu/cell_screen.c @@ -28,7 +28,6 @@ #include "util/u_memory.h" #include "util/u_simple_screen.h" -#include "util/u_simple_screen.h" #include "pipe/p_defines.h" #include "pipe/p_screen.h" @@ -36,7 +35,9 @@ #include "cell_context.h" #include "cell_screen.h" #include "cell_texture.h" -#include "cell_winsys.h" +#include "cell_public.h" + +#include "state_tracker/sw_winsys.h" static const char * @@ -95,6 +96,8 @@ cell_get_param(struct pipe_screen *screen, int param) case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: return 0; + case PIPE_CAP_BLEND_EQUATION_SEPARATE: + return 1; default: return 0; } @@ -134,19 +137,33 @@ cell_is_format_supported( struct pipe_screen *screen, unsigned tex_usage, unsigned geom_flags ) { - /* cell supports most formats, XXX for now anyway */ - if (format == PIPE_FORMAT_DXT5_RGBA || - format == PIPE_FORMAT_A8B8G8R8_SRGB) - return FALSE; - else + struct sw_winsys *winsys = cell_screen(screen)->winsys; + + if (tex_usage & (PIPE_BIND_DISPLAY_TARGET | + PIPE_BIND_SCANOUT | + PIPE_BIND_SHARED)) { + if (!winsys->is_displaytarget_format_supported(winsys, tex_usage, format)) + return FALSE; + } + + /* only a few formats are known to work at this time */ + switch (format) { + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: + case PIPE_FORMAT_Z24X8_UNORM: + case PIPE_FORMAT_B8G8R8A8_UNORM: + case PIPE_FORMAT_I8_UNORM: return TRUE; + default: + return FALSE; + } } static void cell_destroy_screen( struct pipe_screen *screen ) { - struct pipe_winsys *winsys = screen->winsys; + struct cell_screen *sp_screen = cell_screen(screen); + struct sw_winsys *winsys = sp_screen->winsys; if(winsys->destroy) winsys->destroy(winsys); @@ -155,32 +172,33 @@ cell_destroy_screen( struct pipe_screen *screen ) } + /** * Create a new pipe_screen object * Note: we're not presently subclassing pipe_screen (no cell_screen) but * that would be the place to put SPU thread/context info... */ struct pipe_screen * -cell_create_screen(struct pipe_winsys *winsys) +cell_create_screen(struct sw_winsys *winsys) { - struct pipe_screen *screen = CALLOC_STRUCT(pipe_screen); + struct cell_screen *screen = CALLOC_STRUCT(cell_screen); if (!screen) return NULL; screen->winsys = winsys; + screen->base.winsys = NULL; - screen->destroy = cell_destroy_screen; + screen->base.destroy = cell_destroy_screen; - screen->get_name = cell_get_name; - screen->get_vendor = cell_get_vendor; - screen->get_param = cell_get_param; - screen->get_paramf = cell_get_paramf; - screen->is_format_supported = cell_is_format_supported; - screen->context_create = cell_create_context; + screen->base.get_name = cell_get_name; + screen->base.get_vendor = cell_get_vendor; + screen->base.get_param = cell_get_param; + screen->base.get_paramf = cell_get_paramf; + screen->base.is_format_supported = cell_is_format_supported; + screen->base.context_create = cell_create_context; - cell_init_screen_texture_funcs(screen); - u_simple_screen_init(screen); + cell_init_screen_texture_funcs(&screen->base); - return screen; + return &screen->base; } diff --git a/src/gallium/drivers/cell/ppu/cell_screen.h b/src/gallium/drivers/cell/ppu/cell_screen.h index c7e15889d66..baff9d3b7d4 100644 --- a/src/gallium/drivers/cell/ppu/cell_screen.h +++ b/src/gallium/drivers/cell/ppu/cell_screen.h @@ -30,12 +30,26 @@ #define CELL_SCREEN_H -struct pipe_screen; -struct pipe_winsys; +#include "pipe/p_screen.h" +struct sw_winsys; -extern struct pipe_screen * -cell_create_screen(struct pipe_winsys *winsys); +struct cell_screen { + struct pipe_screen base; + + struct sw_winsys *winsys; + + /* Increments whenever textures are modified. Contexts can track + * this. + */ + unsigned timestamp; +}; + +static INLINE struct cell_screen * +cell_screen( struct pipe_screen *pipe ) +{ + return (struct cell_screen *)pipe; +} #endif /* CELL_SCREEN_H */ diff --git a/src/gallium/drivers/cell/ppu/cell_spu.c b/src/gallium/drivers/cell/ppu/cell_spu.c index 28e5e6d706d..39284f3a5d1 100644 --- a/src/gallium/drivers/cell/ppu/cell_spu.c +++ b/src/gallium/drivers/cell/ppu/cell_spu.c @@ -135,7 +135,7 @@ cell_thread_function(void *arg) /** * Create the SPU threads. This is done once during driver initialization. - * This involves setting the the "init" message which is sent to each SPU. + * This involves setting the "init" message which is sent to each SPU. * The init message specifies an SPU id, total number of SPUs, location * and number of batch buffers, etc. */ diff --git a/src/gallium/drivers/cell/ppu/cell_state_emit.c b/src/gallium/drivers/cell/ppu/cell_state_emit.c index a59c7828ac3..bb11c68fa24 100644 --- a/src/gallium/drivers/cell/ppu/cell_state_emit.c +++ b/src/gallium/drivers/cell/ppu/cell_state_emit.c @@ -241,20 +241,17 @@ cell_emit_state(struct cell_context *cell) if (cell->dirty & (CELL_NEW_FS_CONSTANTS)) { const uint shader = PIPE_SHADER_FRAGMENT; - const uint num_const = cell->constants[shader]->size / sizeof(float); + const uint num_const = cell->constants[shader]->width0 / sizeof(float); uint i, j; float *buf = cell_batch_alloc16(cell, ROUNDUP16(32 + num_const * sizeof(float))); uint32_t *ibuf = (uint32_t *) buf; - const float *constants = pipe_buffer_map(cell->pipe.screen, - cell->constants[shader], - PIPE_BUFFER_USAGE_CPU_READ); + const float *constants = cell->mapped_constants[shader]; ibuf[0] = CELL_CMD_STATE_FS_CONSTANTS; ibuf[4] = num_const; j = 8; for (i = 0; i < num_const; i++) { buf[j++] = constants[i]; } - pipe_buffer_unmap(cell->pipe.screen, cell->constants[shader]); } if (cell->dirty & (CELL_NEW_FRAMEBUFFER | @@ -296,7 +293,7 @@ cell_emit_state(struct cell_context *cell) texture->opcode[0] = CELL_CMD_STATE_TEXTURE; texture->unit = i; if (cell->texture[i]) { - struct cell_texture *ct = cell->texture[i]; + struct cell_resource *ct = cell->texture[i]; uint level; for (level = 0; level < CELL_MAX_TEXTURE_LEVELS; level++) { texture->start[level] = (ct->mapped + diff --git a/src/gallium/drivers/cell/ppu/cell_state_shader.c b/src/gallium/drivers/cell/ppu/cell_state_shader.c index 9b2f86fdfba..ddf14772689 100644 --- a/src/gallium/drivers/cell/ppu/cell_state_shader.c +++ b/src/gallium/drivers/cell/ppu/cell_state_shader.c @@ -28,13 +28,13 @@ #include "pipe/p_defines.h" #include "util/u_memory.h" #include "util/u_inlines.h" -#include "util/u_simple_screen.h" #include "draw/draw_context.h" #include "tgsi/tgsi_parse.h" #include "cell_context.h" #include "cell_state.h" #include "cell_gen_fp.h" +#include "cell_texture.h" /** cast wrapper */ @@ -183,17 +183,29 @@ cell_delete_vs_state(struct pipe_context *pipe, void *vs) static void cell_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_buffer *buf) + struct pipe_resource *constants) { struct cell_context *cell = cell_context(pipe); + unsigned size = constants ? constants->width0 : 0; + const void *data = constants ? cell_resource(constants)->data : NULL; assert(shader < PIPE_SHADER_TYPES); assert(index == 0); + if (cell->constants[shader] == constants) + return; + draw_flush(cell->draw); /* note: reference counting */ - pipe_buffer_reference(&cell->constants[shader], buf); + pipe_resource_reference(&cell->constants[shader], constants); + + if(shader == PIPE_SHADER_VERTEX) { + draw_set_mapped_constant_buffer(cell->draw, PIPE_SHADER_VERTEX, 0, + data, size); + } + + cell->mapped_constants[shader] = data; if (shader == PIPE_SHADER_VERTEX) cell->dirty |= CELL_NEW_VS_CONSTANTS; diff --git a/src/gallium/drivers/cell/ppu/cell_state_vertex.c b/src/gallium/drivers/cell/ppu/cell_state_vertex.c index fbe55c84721..9510ea9ac2b 100644 --- a/src/gallium/drivers/cell/ppu/cell_state_vertex.c +++ b/src/gallium/drivers/cell/ppu/cell_state_vertex.c @@ -32,24 +32,44 @@ #include "cell_context.h" #include "cell_state.h" +#include "util/u_memory.h" #include "draw/draw_context.h" -static void -cell_set_vertex_elements(struct pipe_context *pipe, - unsigned count, - const struct pipe_vertex_element *elements) +void * +cell_create_vertex_elements_state(struct pipe_context *pipe, + unsigned count, + const struct pipe_vertex_element *attribs) { - struct cell_context *cell = cell_context(pipe); - + struct cell_velems_state *velems; assert(count <= PIPE_MAX_ATTRIBS); + velems = (struct cell_velems_state *) MALLOC(sizeof(struct cell_velems_state)); + if (velems) { + velems->count = count; + memcpy(velems->velem, attribs, sizeof(*attribs) * count); + } + return velems; +} + +void +cell_bind_vertex_elements_state(struct pipe_context *pipe, + void *velems) +{ + struct cell_context *cell = cell_context(pipe); + struct cell_velems_state *cell_velems = (struct cell_velems_state *) velems; - memcpy(cell->vertex_element, elements, count * sizeof(elements[0])); - cell->num_vertex_elements = count; + cell->velems = cell_velems; cell->dirty |= CELL_NEW_VERTEX; - draw_set_vertex_elements(cell->draw, count, elements); + if (cell_velems) + draw_set_vertex_elements(cell->draw, cell_velems->count, cell_velems->velem); +} + +void +cell_delete_vertex_elements_state(struct pipe_context *pipe, void *velems) +{ + FREE( velems ); } @@ -75,5 +95,7 @@ void cell_init_vertex_functions(struct cell_context *cell) { cell->pipe.set_vertex_buffers = cell_set_vertex_buffers; - cell->pipe.set_vertex_elements = cell_set_vertex_elements; + cell->pipe.create_vertex_elements_state = cell_create_vertex_elements_state; + cell->pipe.bind_vertex_elements_state = cell_bind_vertex_elements_state; + cell->pipe.delete_vertex_elements_state = cell_delete_vertex_elements_state; } diff --git a/src/gallium/drivers/cell/ppu/cell_texture.c b/src/gallium/drivers/cell/ppu/cell_texture.c index fad290dfa0e..d08334d892b 100644 --- a/src/gallium/drivers/cell/ppu/cell_texture.c +++ b/src/gallium/drivers/cell/ppu/cell_texture.c @@ -34,22 +34,25 @@ #include "pipe/p_context.h" #include "pipe/p_defines.h" #include "util/u_inlines.h" -#include "util/u_simple_screen.h" #include "util/u_format.h" #include "util/u_math.h" #include "util/u_memory.h" #include "cell_context.h" +#include "cell_screen.h" #include "cell_state.h" -#include "cell_texture.h" +#include "cell_resource.h" +#include "state_tracker/sw_winsys.h" -static void -cell_texture_layout(struct cell_texture *ct) + +static boolean +cell_resource_layout(struct pipe_screen *screen, + struct cell_resource *ct) { - struct pipe_texture *pt = &ct->base; + struct pipe_resource *pt = &ct->base; unsigned level; unsigned width = pt->width0; unsigned height = pt->height0; @@ -83,14 +86,40 @@ cell_texture_layout(struct cell_texture *ct) height = u_minify(height, 1); depth = u_minify(depth, 1); } + + ct->data = align_malloc(ct->buffer_size, 16); + + return ct->data != NULL; } -static struct pipe_texture * -cell_texture_create(struct pipe_screen *screen, - const struct pipe_texture *templat) +/** + * Texture layout for simple color buffers. + */ +static boolean +cell_displaytarget_layout(struct pipe_screen *screen, + struct cell_resource * ct) +{ + struct sw_winsys *winsys = cell_screen(screen)->winsys; + + /* Round up the surface size to a multiple of the tile size? + */ + ct->dt = winsys->displaytarget_create(winsys, + ct->base.bind, + ct->base.format, + ct->base.width0, + ct->base.height0, + 16, + &ct->dt_stride ); + + return ct->dt != NULL; +} + +static struct pipe_resource * +cell_resource_create(struct pipe_screen *screen, + const struct pipe_resource *templat) { - struct cell_texture *ct = CALLOC_STRUCT(cell_texture); + struct cell_resource *ct = CALLOC_STRUCT(cell_resource); if (!ct) return NULL; @@ -98,31 +127,47 @@ cell_texture_create(struct pipe_screen *screen, pipe_reference_init(&ct->base.reference, 1); ct->base.screen = screen; - cell_texture_layout(ct); + /* Create both a displaytarget (linear) and regular texture + * (twiddled). Convert twiddled->linear at flush_frontbuffer time. + */ + if (ct->base.bind & (PIPE_BIND_DISPLAY_TARGET | + PIPE_BIND_SCANOUT | + PIPE_BIND_SHARED)) { + if (!cell_displaytarget_layout(screen, ct)) + goto fail; + } - ct->buffer = screen->buffer_create(screen, 32, PIPE_BUFFER_USAGE_PIXEL, - ct->buffer_size); + if (!cell_resource_layout(screen, ct)) + goto fail; - if (!ct->buffer) { - FREE(ct); - return NULL; + return &ct->base; + +fail: + if (ct->dt) { + struct sw_winsys *winsys = cell_screen(screen)->winsys; + winsys->displaytarget_destroy(winsys, ct->dt); } - return &ct->base; + FREE(ct); + + return NULL; } static void -cell_texture_destroy(struct pipe_texture *pt) +cell_resource_destroy(struct pipe_resource *pt) { - struct cell_texture *ct = cell_texture(pt); + struct cell_screen *screen = cell_screen(pt->screen); + struct sw_winsys *winsys = screen->winsys; + struct cell_resource *ct = cell_resource(pt); - if (ct->mapped) { - pipe_buffer_unmap(ct->buffer->screen, ct->buffer); - ct->mapped = NULL; + if (ct->dt) { + /* display target */ + winsys->displaytarget_destroy(winsys, ct->dt); + } + else if (!ct->userBuffer) { + align_free(ct->data); } - - pipe_buffer_reference(&ct->buffer, NULL); FREE(ct); } @@ -260,17 +305,17 @@ untwiddle_image_uint(uint w, uint h, uint tile_size, uint *dst, static struct pipe_surface * cell_get_tex_surface(struct pipe_screen *screen, - struct pipe_texture *pt, + struct pipe_resource *pt, unsigned face, unsigned level, unsigned zslice, unsigned usage) { - struct cell_texture *ct = cell_texture(pt); + struct cell_resource *ct = cell_resource(pt); struct pipe_surface *ps; ps = CALLOC_STRUCT(pipe_surface); if (ps) { pipe_reference_init(&ps->reference, 1); - pipe_texture_reference(&ps->texture, pt); + pipe_resource_reference(&ps->texture, pt); ps->format = pt->format; ps->width = u_minify(pt->width0, level); ps->height = u_minify(pt->height0, level); @@ -301,7 +346,7 @@ cell_get_tex_surface(struct pipe_screen *screen, static void cell_tex_surface_destroy(struct pipe_surface *surf) { - pipe_texture_reference(&surf->texture, NULL); + pipe_resource_reference(&surf->texture, NULL); FREE(surf); } @@ -312,46 +357,48 @@ cell_tex_surface_destroy(struct pipe_surface *surf) * back out for glGetTexImage). */ static struct pipe_transfer * -cell_get_tex_transfer(struct pipe_screen *screen, - struct pipe_texture *texture, - unsigned face, unsigned level, unsigned zslice, - enum pipe_transfer_usage usage, - unsigned x, unsigned y, unsigned w, unsigned h) +cell_get_transfer(struct pipe_context *ctx, + struct pipe_resource *resource, + struct pipe_subresource sr, + unsigned usage, + const struct pipe_box *box) { - struct cell_texture *ct = cell_texture(texture); + struct cell_resource *ct = cell_resource(resource); struct cell_transfer *ctrans; + enum pipe_format *format = resource->format; - assert(texture); - assert(level <= texture->last_level); + assert(resource); + assert(level <= resource->last_level); + + /* make sure the requested region is in the image bounds */ + assert(box->x + box->width <= u_minify(resource->width0, sr.level)); + assert(box->y + box->height <= u_minify(resource->height0, sr.level)); + assert(box->z + box->depth <= u_minify(resource->depth0, sr.level)); ctrans = CALLOC_STRUCT(cell_transfer); if (ctrans) { struct pipe_transfer *pt = &ctrans->base; - pipe_texture_reference(&pt->texture, texture); - pt->x = x; - pt->y = y; - pt->width = w; - pt->height = h; - pt->stride = ct->stride[level]; + pipe_resource_reference(&pt->resource, resource); + pt->sr = sr; pt->usage = usage; - pt->face = face; - pt->level = level; - pt->zslice = zslice; + pt->box = *box; + pt->stride = ct->stride[sr.level]; - ctrans->offset = ct->level_offset[level]; + ctrans->offset = ct->level_offset[sr.level]; - if (texture->target == PIPE_TEXTURE_CUBE) { - unsigned h_tile = align(u_minify(texture->height0, level), TILE_SIZE); - ctrans->offset += face * util_format_get_nblocksy(texture->format, h_tile) * pt->stride; + if (resource->target == PIPE_TEXTURE_CUBE) { + unsigned h_tile = align(u_minify(resource->height0, sr.level), TILE_SIZE); + ctrans->offset += sr.face * util_format_get_nblocksy(format, h_tile) * pt->stride; } - else if (texture->target == PIPE_TEXTURE_3D) { - unsigned h_tile = align(u_minify(texture->height0, level), TILE_SIZE); - ctrans->offset += zslice * util_format_get_nblocksy(texture->format, h_tile) * pt->stride; + else if (resource->target == PIPE_TEXTURE_3D) { + unsigned h_tile = align(u_minify(resource->height0, sr.level), TILE_SIZE); + ctrans->offset += box->z * util_format_get_nblocksy(format, h_tile) * pt->stride; } else { - assert(face == 0); - assert(zslice == 0); + assert(sr.face == 0); + assert(box->z == 0); } + return pt; } return NULL; @@ -359,15 +406,15 @@ cell_get_tex_transfer(struct pipe_screen *screen, static void -cell_tex_transfer_destroy(struct pipe_transfer *t) +cell_transfer_destroy(struct pipe_context *ctx, struct pipe_transfer *t) { struct cell_transfer *transfer = cell_transfer(t); /* Effectively do the texture_update work here - if texture images * needed post-processing to put them into hardware layout, this is * where it would happen. For cell, nothing to do. */ - assert (transfer->base.texture); - pipe_texture_reference(&transfer->base.texture, NULL); + assert (transfer->base.resource); + pipe_resource_reference(&transfer->base.resource, NULL); FREE(transfer); } @@ -376,49 +423,66 @@ cell_tex_transfer_destroy(struct pipe_transfer *t) * Return pointer to texture image data in linear layout. */ static void * -cell_transfer_map(struct pipe_screen *screen, struct pipe_transfer *transfer) +cell_transfer_map(struct pipe_context *ctx, struct pipe_transfer *transfer) { struct cell_transfer *ctrans = cell_transfer(transfer); - struct pipe_texture *pt = transfer->texture; - struct cell_texture *ct = cell_texture(pt); - const uint level = ctrans->base.level; - const uint texWidth = u_minify(pt->width0, level); - const uint texHeight = u_minify(pt->height0, level); - const uint stride = ct->stride[level]; - unsigned size; + struct pipe_resource *pt = transfer->resource; + struct cell_resource *ct = cell_resource(pt); - assert(transfer->texture); + assert(transfer->resource); - if (!ct->mapped) { - /* map now */ - ct->mapped = pipe_buffer_map(screen, ct->buffer, - pipe_transfer_buffer_flags(transfer)); + if (ct->mapped == NULL) { + ct->mapped = ct->data; } - /* - * Create a buffer of ordinary memory for the linear texture. - * This is the memory that the user will read/write. + + /* Better test would be resource->is_linear */ - size = util_format_get_stride(pt->format, align(texWidth, TILE_SIZE)) * - util_format_get_nblocksy(pt->format, align(texHeight, TILE_SIZE)); - - ctrans->map = align_malloc(size, 16); - if (!ctrans->map) - return NULL; /* out of memory */ - - if (transfer->usage & PIPE_TRANSFER_READ) { - /* need to untwiddle the texture to make a linear version */ - const uint bpp = util_format_get_blocksize(ct->base.format); - if (bpp == 4) { - const uint *src = (uint *) (ct->mapped + ctrans->offset); - uint *dst = ctrans->map; - untwiddle_image_uint(texWidth, texHeight, TILE_SIZE, - dst, stride, src); - } - else { - // xxx fix + if (transfer->resource->target != PIPE_BUFFER) { + const uint level = ctrans->base.sr.level; + const uint texWidth = u_minify(pt->width0, level); + const uint texHeight = u_minify(pt->height0, level); + unsigned size; + + + /* + * Create a buffer of ordinary memory for the linear texture. + * This is the memory that the user will read/write. + */ + size = (util_format_get_stride(pt->format, align(texWidth, TILE_SIZE)) * + util_format_get_nblocksy(pt->format, align(texHeight, TILE_SIZE))); + + ctrans->map = align_malloc(size, 16); + if (!ctrans->map) + return NULL; /* out of memory */ + + if (transfer->usage & PIPE_TRANSFER_READ) { + /* Textures always stored twiddled, need to untwiddle the + * texture to make a linear version. + */ + const uint bpp = util_format_get_blocksize(ct->base.format); + if (bpp == 4) { + const uint *src = (uint *) (ct->mapped + ctrans->offset); + uint *dst = ctrans->map; + untwiddle_image_uint(texWidth, texHeight, TILE_SIZE, + dst, transfer->stride, src); + } + else { + // xxx fix + } } } + else { + unsigned stride = transfer->stride; + enum pipe_format format = pt->format; + unsigned blocksize = util_format_get_blocksize(format); + + ctrans->map = (ct->mapped + + ctrans->offset + + ctrans->base.box.y / util_format_get_blockheight(format) * stride + + ctrans->base.box.x / util_format_get_blockwidth(format) * blocksize); + } + return ctrans->map; } @@ -430,55 +494,149 @@ cell_transfer_map(struct pipe_screen *screen, struct pipe_transfer *transfer) * to tiled data. */ static void -cell_transfer_unmap(struct pipe_screen *screen, +cell_transfer_unmap(struct pipe_context *ctx, struct pipe_transfer *transfer) { struct cell_transfer *ctrans = cell_transfer(transfer); - struct pipe_texture *pt = transfer->texture; - struct cell_texture *ct = cell_texture(pt); - const uint level = ctrans->base.level; + struct pipe_resource *pt = transfer->resource; + struct cell_resource *ct = cell_resource(pt); + const uint level = ctrans->base.sr.level; const uint texWidth = u_minify(pt->width0, level); const uint texHeight = u_minify(pt->height0, level); const uint stride = ct->stride[level]; if (!ct->mapped) { - /* map now */ - ct->mapped = pipe_buffer_map(screen, ct->buffer, - PIPE_BUFFER_USAGE_CPU_READ); + assert(0); + return; } - if (transfer->usage & PIPE_TRANSFER_WRITE) { - /* The user wrote new texture data into the mapped buffer. - * We need to convert the new linear data into the twiddled/tiled format. - */ - const uint bpp = util_format_get_blocksize(ct->base.format); - if (bpp == 4) { - const uint *src = ctrans->map; - uint *dst = (uint *) (ct->mapped + ctrans->offset); - twiddle_image_uint(texWidth, texHeight, TILE_SIZE, dst, stride, src); - } - else { - // xxx fix + if (pt->target != PIPE_BUFFER) { + if (transfer->usage & PIPE_TRANSFER_WRITE) { + /* The user wrote new texture data into the mapped buffer. + * We need to convert the new linear data into the twiddled/tiled format. + */ + const uint bpp = util_format_get_blocksize(ct->base.format); + if (bpp == 4) { + const uint *src = ctrans->map; + uint *dst = (uint *) (ct->mapped + ctrans->offset); + twiddle_image_uint(texWidth, texHeight, TILE_SIZE, dst, stride, src); + } + else { + // xxx fix + } } + + align_free(ctrans->map); + } + else { + /* nothing to do */ } - align_free(ctrans->map); ctrans->map = NULL; } + +/* This used to be overriden by the co-state tracker, but really needs + * to be active with sw_winsys. + * + * Contrasting with llvmpipe and softpipe, this is the only place + * where we use the ct->dt display target in any real sense. + * + * Basically just untwiddle our local data into the linear + * displaytarget. + */ +static void +cell_flush_frontbuffer(struct pipe_screen *_screen, + struct pipe_surface *surface, + void *context_private) +{ + struct cell_screen *screen = cell_screen(_screen); + struct sw_winsys *winsys = screen->winsys; + struct cell_resource *ct = cell_resource(surface->texture); + + if (!ct->dt) + return; + + /* Need to untwiddle from our internal representation here: + */ + { + unsigned *map = winsys->displaytarget_map(winsys, ct->dt, + (PIPE_TRANSFER_READ | + PIPE_TRANSFER_WRITE)); + unsigned *src = (unsigned *)(ct->data + ct->level_offset[surface->level]); + + untwiddle_image_uint(surface->width, + surface->height, + TILE_SIZE, + map, + ct->dt_stride, + src); + + winsys->displaytarget_unmap(winsys, ct->dt); + } + + winsys->displaytarget_display(winsys, ct->dt, context_private); +} + + + +/** + * Create buffer which wraps user-space data. + */ +static struct pipe_resource * +cell_user_buffer_create(struct pipe_screen *screen, + void *ptr, + unsigned bytes, + unsigned bind_flags) +{ + struct cell_resource *buffer; + + buffer = CALLOC_STRUCT(cell_resource); + if(!buffer) + return NULL; + + pipe_reference_init(&buffer->base.reference, 1); + buffer->base.screen = screen; + buffer->base.format = PIPE_FORMAT_R8_UNORM; /* ?? */ + buffer->base.bind = PIPE_BIND_TRANSFER_READ | bind_flags; + buffer->base.usage = PIPE_USAGE_IMMUTABLE; + buffer->base.flags = 0; + buffer->base.width0 = bytes; + buffer->base.height0 = 1; + buffer->base.depth0 = 1; + buffer->userBuffer = TRUE; + buffer->data = ptr; + + return &buffer->base; +} + + + + void cell_init_screen_texture_funcs(struct pipe_screen *screen) { - screen->texture_create = cell_texture_create; - screen->texture_destroy = cell_texture_destroy; + screen->resource_create = cell_resource_create; + screen->resource_destroy = cell_resource_destroy; + screen->resource_from_handle = cell_resource_from_handle; + screen->resource_get_handle = cell_resource_get_handle; + screen->user_buffer_create = cell_user_buffer_create; screen->get_tex_surface = cell_get_tex_surface; screen->tex_surface_destroy = cell_tex_surface_destroy; - screen->get_tex_transfer = cell_get_tex_transfer; - screen->tex_transfer_destroy = cell_tex_transfer_destroy; + screen->flush_frontbuffer = cell_flush_frontbuffer; +} + +void +cell_init_transfer_funcs(struct cell_context *cell) +{ + cell->pipe.get_transfer = cell_get_transfer; + cell->pipe.transfer_destroy = cell_transfer_destroy; + cell->pipe.transfer_map = cell_transfer_map; + cell->pipe.transfer_unmap = cell_transfer_unmap; - screen->transfer_map = cell_transfer_map; - screen->transfer_unmap = cell_transfer_unmap; + cell->pipe.transfer_flush_region = u_default_transfer_flush_region; + cell->pipe.transfer_inline_write = u_default_transfer_inline_write; } diff --git a/src/gallium/drivers/cell/ppu/cell_texture.h b/src/gallium/drivers/cell/ppu/cell_texture.h index 3ffc0bfdb51..bd8224b3b7b 100644 --- a/src/gallium/drivers/cell/ppu/cell_texture.h +++ b/src/gallium/drivers/cell/ppu/cell_texture.h @@ -28,23 +28,37 @@ #ifndef CELL_TEXTURE_H #define CELL_TEXTURE_H +#include "cell/common.h" struct cell_context; -struct pipe_texture; +struct pipe_resource; /** - * Subclass of pipe_texture + * Subclass of pipe_resource */ -struct cell_texture +struct cell_resource { - struct pipe_texture base; + struct pipe_resource base; unsigned long level_offset[CELL_MAX_TEXTURE_LEVELS]; unsigned long stride[CELL_MAX_TEXTURE_LEVELS]; - /** The tiled texture data is held in this buffer */ - struct pipe_buffer *buffer; + /** + * Display target, for textures with the PIPE_BIND_DISPLAY_TARGET + * usage. + */ + struct sw_displaytarget *dt; + unsigned dt_stride; + + /** + * Malloc'ed data for regular textures, or a mapping to dt above. + */ + void *data; + boolean userBuffer; + + /* Size of the linear buffer?? + */ unsigned long buffer_size; /** The buffer above, mapped. This is the memory from which the @@ -64,10 +78,10 @@ struct cell_transfer /** cast wrapper */ -static INLINE struct cell_texture * -cell_texture(struct pipe_texture *pt) +static INLINE struct cell_resource * +cell_resource(struct pipe_resource *pt) { - return (struct cell_texture *) pt; + return (struct cell_resource *) pt; } @@ -82,5 +96,7 @@ cell_transfer(struct pipe_transfer *pt) extern void cell_init_screen_texture_funcs(struct pipe_screen *screen); +extern void +cell_init_texture_transfer_funcs(struct cell_context *cell); #endif /* CELL_TEXTURE_H */ diff --git a/src/gallium/drivers/cell/ppu/cell_vertex_shader.c b/src/gallium/drivers/cell/ppu/cell_vertex_shader.c index cf8cd411598..3d389d6ea36 100644 --- a/src/gallium/drivers/cell/ppu/cell_vertex_shader.c +++ b/src/gallium/drivers/cell/ppu/cell_vertex_shader.c @@ -31,7 +31,6 @@ #include "pipe/p_defines.h" #include "pipe/p_context.h" -#include "util/u_simple_screen.h" #include "util/u_math.h" #include "cell_context.h" diff --git a/src/gallium/drivers/cell/spu/spu_command.c b/src/gallium/drivers/cell/spu/spu_command.c index 79f1fb7fb28..f16cabc0270 100644 --- a/src/gallium/drivers/cell/spu/spu_command.c +++ b/src/gallium/drivers/cell/spu/spu_command.c @@ -337,8 +337,8 @@ cmd_state_framebuffer(const struct cell_command_framebuffer *cmd) spu.fb.zsize = 4; spu.fb.zscale = (float) 0xffffffffu; break; - case PIPE_FORMAT_S8Z24_UNORM: - case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: case PIPE_FORMAT_X8Z24_UNORM: case PIPE_FORMAT_Z24X8_UNORM: spu.fb.zsize = 4; diff --git a/src/gallium/drivers/cell/spu/spu_exec.c b/src/gallium/drivers/cell/spu/spu_exec.c index d2166a49016..d7788bd9bbb 100644 --- a/src/gallium/drivers/cell/spu/spu_exec.c +++ b/src/gallium/drivers/cell/spu/spu_exec.c @@ -1622,14 +1622,6 @@ exec_instruction( *pc = -1; break; - case TGSI_OPCODE_REP: - ASSERT (0); - break; - - case TGSI_OPCODE_ENDREP: - ASSERT (0); - break; - case TGSI_OPCODE_PUSHA: ASSERT (0); break; @@ -1743,8 +1735,6 @@ exec_instruction( mach->Primitives[mach->Temps[TEMP_PRIMITIVE_I].xyzw[TEMP_PRIMITIVE_C].u[0]] = 0; break; - case TGSI_OPCODE_BGNFOR: - /* fall-through (for now) */ case TGSI_OPCODE_BGNLOOP: /* push LoopMask and ContMasks */ ASSERT(mach->LoopStackTop < TGSI_EXEC_MAX_LOOP_NESTING); @@ -1753,8 +1743,6 @@ exec_instruction( mach->ContStack[mach->ContStackTop++] = mach->ContMask; break; - case TGSI_OPCODE_ENDFOR: - /* fall-through (for now at least) */ case TGSI_OPCODE_ENDLOOP: /* Restore ContMask, but don't pop */ ASSERT(mach->ContStackTop > 0); diff --git a/src/gallium/drivers/cell/spu/spu_exec.h b/src/gallium/drivers/cell/spu/spu_exec.h index 0ca92af248d..da9626024e7 100644 --- a/src/gallium/drivers/cell/spu/spu_exec.h +++ b/src/gallium/drivers/cell/spu/spu_exec.h @@ -75,7 +75,7 @@ struct softpipe_tile_cache; /**< Opaque to TGSI */ struct spu_sampler { const struct pipe_sampler_state *state; - struct pipe_texture *texture; + struct pipe_resource *texture; /** Get samples for four fragments in a quad */ void (*get_samples)(struct spu_sampler *sampler, const float s[QUAD_SIZE], diff --git a/src/gallium/drivers/cell/spu/spu_per_fragment_op.c b/src/gallium/drivers/cell/spu/spu_per_fragment_op.c index 2c9e7458afe..3b9566042a1 100644 --- a/src/gallium/drivers/cell/spu/spu_per_fragment_op.c +++ b/src/gallium/drivers/cell/spu/spu_per_fragment_op.c @@ -138,13 +138,13 @@ spu_fallback_fragment_ops(uint x, uint y, if (spu.depth_stencil_alpha.stencil[0].enabled) { /* do stencil test */ - ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z24S8_UNORM); + ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z24_UNORM_S8_USCALED); } else if (spu.depth_stencil_alpha.depth.enabled) { /* do depth test */ - ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z24S8_UNORM || + ASSERT(spu.fb.depth_format == PIPE_FORMAT_Z24_UNORM_S8_USCALED || spu.fb.depth_format == PIPE_FORMAT_Z24X8_UNORM); vector unsigned int ifragZ; diff --git a/src/gallium/drivers/failover/fo_context.c b/src/gallium/drivers/failover/fo_context.c index 2ccc5d3e605..9515cd8938c 100644 --- a/src/gallium/drivers/failover/fo_context.c +++ b/src/gallium/drivers/failover/fo_context.c @@ -27,7 +27,6 @@ #include "pipe/p_defines.h" -#include "util/u_simple_screen.h" #include "util/u_memory.h" #include "pipe/p_context.h" @@ -40,7 +39,7 @@ static void failover_destroy( struct pipe_context *pipe ) { struct failover_context *failover = failover_context( pipe ); - free( failover ); + FREE( failover ); } @@ -52,8 +51,9 @@ void failover_fail_over( struct failover_context *failover ) static void failover_draw_elements( struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, + struct pipe_resource *indexResource, unsigned indexSize, + int indexBias, unsigned prim, unsigned start, unsigned count) @@ -71,8 +71,9 @@ static void failover_draw_elements( struct pipe_context *pipe, */ if (failover->mode == FO_HW) { failover->hw->draw_elements( failover->hw, - indexBuffer, + indexResource, indexSize, + indexBias, prim, start, count ); @@ -88,8 +89,9 @@ static void failover_draw_elements( struct pipe_context *pipe, } failover->sw->draw_elements( failover->sw, - indexBuffer, + indexResource, indexSize, + indexBias, prim, start, count ); @@ -106,30 +108,19 @@ static void failover_draw_elements( struct pipe_context *pipe, static void failover_draw_arrays( struct pipe_context *pipe, unsigned prim, unsigned start, unsigned count) { - failover_draw_elements(pipe, NULL, 0, prim, start, count); + failover_draw_elements(pipe, NULL, 0, 0, prim, start, count); } static unsigned int -failover_is_texture_referenced( struct pipe_context *_pipe, - struct pipe_texture *texture, - unsigned face, unsigned level) +failover_is_resource_referenced( struct pipe_context *_pipe, + struct pipe_resource *resource, + unsigned face, unsigned level) { struct failover_context *failover = failover_context( _pipe ); struct pipe_context *pipe = (failover->mode == FO_HW) ? failover->hw : failover->sw; - return pipe->is_texture_referenced(pipe, texture, face, level); -} - -static unsigned int -failover_is_buffer_referenced( struct pipe_context *_pipe, - struct pipe_buffer *buf) -{ - struct failover_context *failover = failover_context( _pipe ); - struct pipe_context *pipe = (failover->mode == FO_HW) ? - failover->hw : failover->sw; - - return pipe->is_buffer_referenced(pipe, buf); + return pipe->is_resource_referenced(pipe, resource, face, level); } struct pipe_context *failover_create( struct pipe_context *hw, @@ -176,8 +167,7 @@ struct pipe_context *failover_create( struct pipe_context *hw, #endif failover->pipe.flush = hw->flush; - failover->pipe.is_texture_referenced = failover_is_texture_referenced; - failover->pipe.is_buffer_referenced = failover_is_buffer_referenced; + failover->pipe.is_resource_referenced = failover_is_resource_referenced; failover->dirty = 0; diff --git a/src/gallium/drivers/failover/fo_context.h b/src/gallium/drivers/failover/fo_context.h index bb1a168ea7a..88ae5ad60d5 100644 --- a/src/gallium/drivers/failover/fo_context.h +++ b/src/gallium/drivers/failover/fo_context.h @@ -47,7 +47,7 @@ #define FO_NEW_ALPHA_TEST 0x100 #define FO_NEW_DEPTH_STENCIL 0x200 #define FO_NEW_SAMPLER 0x400 -#define FO_NEW_TEXTURE 0x800 +#define FO_NEW_SAMPLER_VIEW 0x800 #define FO_NEW_VERTEX 0x2000 #define FO_NEW_VERTEX_SHADER 0x4000 #define FO_NEW_BLEND_COLOR 0x8000 @@ -65,6 +65,13 @@ struct fo_state { void *sw_state; void *hw_state; }; + +struct fo_sampler_view { + struct pipe_sampler_view base; + struct pipe_sampler_view *sw; + struct pipe_sampler_view *hw; +}; + struct failover_context { struct pipe_context pipe; /**< base class */ @@ -78,6 +85,7 @@ struct failover_context { const struct fo_state *rasterizer; const struct fo_state *fragment_shader; const struct fo_state *vertex_shader; + const struct fo_state *vertex_elements; struct pipe_blend_color blend_color; struct pipe_stencil_ref stencil_ref; @@ -85,26 +93,25 @@ struct failover_context { struct pipe_framebuffer_state framebuffer; struct pipe_poly_stipple poly_stipple; struct pipe_scissor_state scissor; - struct pipe_texture *texture[PIPE_MAX_SAMPLERS]; - struct pipe_texture *vertex_textures[PIPE_MAX_VERTEX_SAMPLERS]; struct pipe_viewport_state viewport; struct pipe_vertex_buffer vertex_buffers[PIPE_MAX_ATTRIBS]; - struct pipe_vertex_element vertex_elements[PIPE_MAX_ATTRIBS]; uint num_vertex_buffers; - uint num_vertex_elements; void *sw_sampler_state[PIPE_MAX_SAMPLERS]; void *hw_sampler_state[PIPE_MAX_SAMPLERS]; void *sw_vertex_sampler_state[PIPE_MAX_VERTEX_SAMPLERS]; void *hw_vertex_sampler_state[PIPE_MAX_VERTEX_SAMPLERS]; + struct fo_sampler_view *fragment_sampler_views[PIPE_MAX_SAMPLERS]; + struct fo_sampler_view *vertex_sampler_views[PIPE_MAX_VERTEX_SAMPLERS]; + unsigned num_fragment_sampler_views; + unsigned num_vertex_sampler_views; + unsigned dirty; unsigned num_samplers; unsigned num_vertex_samplers; - unsigned num_textures; - unsigned num_vertex_textures; unsigned mode; struct pipe_context *hw; @@ -127,7 +134,7 @@ failover_context( struct pipe_context *pipe ) void failover_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_buffer *buf); + struct pipe_resource *resource); #endif /* FO_CONTEXT_H */ diff --git a/src/gallium/drivers/failover/fo_state.c b/src/gallium/drivers/failover/fo_state.c index 970606a3f50..272e683067e 100644 --- a/src/gallium/drivers/failover/fo_state.c +++ b/src/gallium/drivers/failover/fo_state.c @@ -29,6 +29,7 @@ */ #include "util/u_inlines.h" +#include "util/u_memory.h" #include "fo_context.h" @@ -53,7 +54,7 @@ static void * failover_create_blend_state( struct pipe_context *pipe, const struct pipe_blend_state *blend ) { - struct fo_state *state = malloc(sizeof(struct fo_state)); + struct fo_state *state = MALLOC(sizeof(struct fo_state)); struct failover_context *failover = failover_context(pipe); state->sw_state = failover->sw->create_blend_state(failover->sw, blend); @@ -85,7 +86,7 @@ failover_delete_blend_state( struct pipe_context *pipe, failover->hw->delete_blend_state(failover->hw, state->hw_state); state->sw_state = 0; state->hw_state = 0; - free(state); + FREE(state); } static void @@ -129,7 +130,7 @@ static void * failover_create_depth_stencil_state(struct pipe_context *pipe, const struct pipe_depth_stencil_alpha_state *templ) { - struct fo_state *state = malloc(sizeof(struct fo_state)); + struct fo_state *state = MALLOC(sizeof(struct fo_state)); struct failover_context *failover = failover_context(pipe); state->sw_state = failover->sw->create_depth_stencil_alpha_state(failover->sw, templ); @@ -161,7 +162,7 @@ failover_delete_depth_stencil_state(struct pipe_context *pipe, failover->hw->delete_depth_stencil_alpha_state(failover->hw, state->hw_state); state->sw_state = 0; state->hw_state = 0; - free(state); + FREE(state); } static void @@ -181,7 +182,7 @@ static void * failover_create_fs_state(struct pipe_context *pipe, const struct pipe_shader_state *templ) { - struct fo_state *state = malloc(sizeof(struct fo_state)); + struct fo_state *state = MALLOC(sizeof(struct fo_state)); struct failover_context *failover = failover_context(pipe); state->sw_state = failover->sw->create_fs_state(failover->sw, templ); @@ -212,14 +213,14 @@ failover_delete_fs_state(struct pipe_context *pipe, failover->hw->delete_fs_state(failover->hw, state->hw_state); state->sw_state = 0; state->hw_state = 0; - free(state); + FREE(state); } static void * failover_create_vs_state(struct pipe_context *pipe, const struct pipe_shader_state *templ) { - struct fo_state *state = malloc(sizeof(struct fo_state)); + struct fo_state *state = MALLOC(sizeof(struct fo_state)); struct failover_context *failover = failover_context(pipe); state->sw_state = failover->sw->create_vs_state(failover->sw, templ); @@ -252,12 +253,55 @@ failover_delete_vs_state(struct pipe_context *pipe, failover->hw->delete_vs_state(failover->hw, state->hw_state); state->sw_state = 0; state->hw_state = 0; - free(state); + FREE(state); +} + + + +static void * +failover_create_vertex_elements_state( struct pipe_context *pipe, + unsigned count, + const struct pipe_vertex_element *velems ) +{ + struct fo_state *state = MALLOC(sizeof(struct fo_state)); + struct failover_context *failover = failover_context(pipe); + + state->sw_state = failover->sw->create_vertex_elements_state(failover->sw, count, velems); + state->hw_state = failover->hw->create_vertex_elements_state(failover->hw, count, velems); + + return state; +} + +static void +failover_bind_vertex_elements_state(struct pipe_context *pipe, + void *velems ) +{ + struct failover_context *failover = failover_context(pipe); + struct fo_state *state = (struct fo_state*)velems; + + failover->vertex_elements = state; + failover->dirty |= FO_NEW_VERTEX_ELEMENT; + failover->sw->bind_vertex_elements_state( failover->sw, velems ); + failover->hw->bind_vertex_elements_state( failover->hw, velems ); +} + +static void +failover_delete_vertex_elements_state( struct pipe_context *pipe, + void *velems ) +{ + struct fo_state *state = (struct fo_state*)velems; + struct failover_context *failover = failover_context(pipe); + + failover->sw->delete_vertex_elements_state(failover->sw, state->sw_state); + failover->hw->delete_vertex_elements_state(failover->hw, state->hw_state); + state->sw_state = 0; + state->hw_state = 0; + FREE(state); } static void failover_set_polygon_stipple( struct pipe_context *pipe, - const struct pipe_poly_stipple *stipple ) + const struct pipe_poly_stipple *stipple ) { struct failover_context *failover = failover_context(pipe); @@ -272,7 +316,7 @@ static void * failover_create_rasterizer_state(struct pipe_context *pipe, const struct pipe_rasterizer_state *templ) { - struct fo_state *state = malloc(sizeof(struct fo_state)); + struct fo_state *state = MALLOC(sizeof(struct fo_state)); struct failover_context *failover = failover_context(pipe); state->sw_state = failover->sw->create_rasterizer_state(failover->sw, templ); @@ -305,7 +349,7 @@ failover_delete_rasterizer_state(struct pipe_context *pipe, failover->hw->delete_rasterizer_state(failover->hw, state->hw_state); state->sw_state = 0; state->hw_state = 0; - free(state); + FREE(state); } @@ -326,7 +370,7 @@ static void * failover_create_sampler_state(struct pipe_context *pipe, const struct pipe_sampler_state *templ) { - struct fo_state *state = malloc(sizeof(struct fo_state)); + struct fo_state *state = MALLOC(sizeof(struct fo_state)); struct failover_context *failover = failover_context(pipe); state->sw_state = failover->sw->create_sampler_state(failover->sw, templ); @@ -400,64 +444,100 @@ failover_delete_sampler_state(struct pipe_context *pipe, void *sampler) failover->hw->delete_sampler_state(failover->hw, state->hw_state); state->sw_state = 0; state->hw_state = 0; - free(state); + FREE(state); } +static struct pipe_sampler_view * +failover_create_sampler_view(struct pipe_context *pipe, + struct pipe_resource *texture, + const struct pipe_sampler_view *templ) +{ + struct fo_sampler_view *view = MALLOC(sizeof(struct fo_sampler_view)); + struct failover_context *failover = failover_context(pipe); + + view->sw = failover->sw->create_sampler_view(failover->sw, texture, templ); + view->hw = failover->hw->create_sampler_view(failover->hw, texture, templ); + + view->base = *templ; + view->base.reference.count = 1; + view->base.texture = NULL; + pipe_resource_reference(&view->base.texture, texture); + view->base.context = pipe; + + return &view->base; +} + +static void +failover_sampler_view_destroy(struct pipe_context *pipe, + struct pipe_sampler_view *view) +{ + struct fo_sampler_view *fo_view = (struct fo_sampler_view *)view; + struct failover_context *failover = failover_context(pipe); + + failover->sw->sampler_view_destroy(failover->sw, fo_view->sw); + failover->hw->sampler_view_destroy(failover->hw, fo_view->hw); + + pipe_resource_reference(&fo_view->base.texture, NULL); + FREE(fo_view); +} + static void -failover_set_fragment_sampler_textures(struct pipe_context *pipe, - unsigned num, - struct pipe_texture **texture) +failover_set_fragment_sampler_views(struct pipe_context *pipe, + unsigned num, + struct pipe_sampler_view **views) { struct failover_context *failover = failover_context(pipe); + struct pipe_sampler_view *hw_views[PIPE_MAX_SAMPLERS]; uint i; assert(num <= PIPE_MAX_SAMPLERS); /* Check for no-op */ - if (num == failover->num_textures && - !memcmp(failover->texture, texture, num * sizeof(struct pipe_texture *))) + if (num == failover->num_fragment_sampler_views && + !memcmp(failover->fragment_sampler_views, views, num * sizeof(struct pipe_sampler_view *))) return; - for (i = 0; i < num; i++) - pipe_texture_reference((struct pipe_texture **) &failover->texture[i], - texture[i]); - for (i = num; i < failover->num_textures; i++) - pipe_texture_reference((struct pipe_texture **) &failover->texture[i], - NULL); - failover->dirty |= FO_NEW_TEXTURE; - failover->num_textures = num; - failover->sw->set_fragment_sampler_textures( failover->sw, num, texture ); - failover->hw->set_fragment_sampler_textures( failover->hw, num, texture ); + for (i = 0; i < num; i++) { + struct fo_sampler_view *fo_view = (struct fo_sampler_view *)views[i]; + + pipe_sampler_view_reference((struct pipe_sampler_view **)&failover->fragment_sampler_views[i], views[i]); + hw_views[i] = fo_view->hw; + } + for (i = num; i < failover->num_fragment_sampler_views; i++) + pipe_sampler_view_reference((struct pipe_sampler_view **)&failover->fragment_sampler_views[i], NULL); + failover->dirty |= FO_NEW_SAMPLER_VIEW; + failover->num_fragment_sampler_views = num; + failover->hw->set_fragment_sampler_views(failover->hw, num, hw_views); } static void -failover_set_vertex_sampler_textures(struct pipe_context *pipe, - unsigned num_textures, - struct pipe_texture **textures) +failover_set_vertex_sampler_views(struct pipe_context *pipe, + unsigned num, + struct pipe_sampler_view **views) { struct failover_context *failover = failover_context(pipe); + struct pipe_sampler_view *hw_views[PIPE_MAX_VERTEX_SAMPLERS]; uint i; - assert(num_textures <= PIPE_MAX_VERTEX_SAMPLERS); + assert(num <= PIPE_MAX_VERTEX_SAMPLERS); /* Check for no-op */ - if (num_textures == failover->num_vertex_textures && - !memcmp(failover->vertex_textures, textures, num_textures * sizeof(struct pipe_texture *))) { + if (num == failover->num_vertex_sampler_views && + !memcmp(failover->vertex_sampler_views, views, num * sizeof(struct pipe_sampler_view *))) { return; } - for (i = 0; i < num_textures; i++) { - pipe_texture_reference((struct pipe_texture **)&failover->vertex_textures[i], - textures[i]); - } - for (i = num_textures; i < failover->num_vertex_textures; i++) { - pipe_texture_reference((struct pipe_texture **)&failover->vertex_textures[i], - NULL); + for (i = 0; i < num; i++) { + struct fo_sampler_view *fo_view = (struct fo_sampler_view *)views[i]; + + pipe_sampler_view_reference((struct pipe_sampler_view **)&failover->vertex_sampler_views[i], views[i]); + hw_views[i] = fo_view->hw; } - failover->dirty |= FO_NEW_TEXTURE; - failover->num_vertex_textures = num_textures; - failover->sw->set_vertex_sampler_textures(failover->sw, num_textures, textures); - failover->hw->set_vertex_sampler_textures(failover->hw, num_textures, textures); + for (i = num; i < failover->num_vertex_sampler_views; i++) + pipe_sampler_view_reference((struct pipe_sampler_view **)&failover->vertex_sampler_views[i], NULL); + failover->dirty |= FO_NEW_SAMPLER_VIEW; + failover->num_vertex_sampler_views = num; + failover->hw->set_vertex_sampler_views(failover->hw, num, hw_views); } @@ -490,34 +570,18 @@ failover_set_vertex_buffers(struct pipe_context *pipe, } -static void -failover_set_vertex_elements(struct pipe_context *pipe, - unsigned count, - const struct pipe_vertex_element *vertex_elements) -{ - struct failover_context *failover = failover_context(pipe); - - memcpy(failover->vertex_elements, vertex_elements, - count * sizeof(vertex_elements[0])); - - failover->dirty |= FO_NEW_VERTEX_ELEMENT; - failover->num_vertex_elements = count; - failover->sw->set_vertex_elements( failover->sw, count, vertex_elements ); - failover->hw->set_vertex_elements( failover->hw, count, vertex_elements ); -} - void failover_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_buffer *buf) + struct pipe_resource *res) { struct failover_context *failover = failover_context(pipe); assert(shader < PIPE_SHADER_TYPES); assert(index == 0); - failover->sw->set_constant_buffer(failover->sw, shader, index, buf); - failover->hw->set_constant_buffer(failover->hw, shader, index, buf); + failover->sw->set_constant_buffer(failover->sw, shader, index, res); + failover->hw->set_constant_buffer(failover->hw, shader, index, res); } @@ -543,6 +607,9 @@ failover_init_state_functions( struct failover_context *failover ) failover->pipe.create_vs_state = failover_create_vs_state; failover->pipe.bind_vs_state = failover_bind_vs_state; failover->pipe.delete_vs_state = failover_delete_vs_state; + failover->pipe.create_vertex_elements_state = failover_create_vertex_elements_state; + failover->pipe.bind_vertex_elements_state = failover_bind_vertex_elements_state; + failover->pipe.delete_vertex_elements_state = failover_delete_vertex_elements_state; failover->pipe.set_blend_color = failover_set_blend_color; failover->pipe.set_stencil_ref = failover_set_stencil_ref; @@ -550,10 +617,11 @@ failover_init_state_functions( struct failover_context *failover ) failover->pipe.set_framebuffer_state = failover_set_framebuffer_state; failover->pipe.set_polygon_stipple = failover_set_polygon_stipple; failover->pipe.set_scissor_state = failover_set_scissor_state; - failover->pipe.set_fragment_sampler_textures = failover_set_fragment_sampler_textures; - failover->pipe.set_vertex_sampler_textures = failover_set_vertex_sampler_textures; + failover->pipe.set_fragment_sampler_views = failover_set_fragment_sampler_views; + failover->pipe.set_vertex_sampler_views = failover_set_vertex_sampler_views; failover->pipe.set_viewport_state = failover_set_viewport_state; failover->pipe.set_vertex_buffers = failover_set_vertex_buffers; - failover->pipe.set_vertex_elements = failover_set_vertex_elements; failover->pipe.set_constant_buffer = failover_set_constant_buffer; + failover->pipe.create_sampler_view = failover_create_sampler_view; + failover->pipe.sampler_view_destroy = failover_sampler_view_destroy; } diff --git a/src/gallium/drivers/failover/fo_state_emit.c b/src/gallium/drivers/failover/fo_state_emit.c index 5c000808425..42bd6929a7f 100644 --- a/src/gallium/drivers/failover/fo_state_emit.c +++ b/src/gallium/drivers/failover/fo_state_emit.c @@ -81,6 +81,10 @@ failover_state_emit( struct failover_context *failover ) failover->sw->bind_vs_state( failover->sw, failover->vertex_shader->sw_state ); + if (failover->dirty & FO_NEW_VERTEX_ELEMENT) + failover->sw->bind_vertex_elements_state( failover->sw, + failover->vertex_elements->sw_state ); + if (failover->dirty & FO_NEW_STIPPLE) failover->sw->set_polygon_stipple( failover->sw, &failover->poly_stipple ); @@ -102,12 +106,24 @@ failover_state_emit( struct failover_context *failover ) failover->sw_vertex_sampler_state); } - if (failover->dirty & FO_NEW_TEXTURE) { - failover->sw->set_fragment_sampler_textures( failover->sw, failover->num_textures, - failover->texture ); - failover->sw->set_vertex_sampler_textures(failover->sw, - failover->num_vertex_textures, - failover->vertex_textures); + if (failover->dirty & FO_NEW_SAMPLER_VIEW) { + struct pipe_sampler_view *fragment_views[PIPE_MAX_SAMPLERS]; + struct pipe_sampler_view *vertex_views[PIPE_MAX_VERTEX_SAMPLERS]; + uint i; + + for (i = 0; i < failover->num_fragment_sampler_views; i++) { + fragment_views[i] = failover->fragment_sampler_views[i]->sw; + } + failover->sw->set_fragment_sampler_views(failover->sw, + failover->num_fragment_sampler_views, + fragment_views); + + for (i = 0; i < failover->num_vertex_sampler_views; i++) { + vertex_views[i] = failover->vertex_sampler_views[i]->sw; + } + failover->sw->set_vertex_sampler_views(failover->sw, + failover->num_vertex_sampler_views, + vertex_views); } if (failover->dirty & FO_NEW_VERTEX_BUFFER) { @@ -116,11 +132,5 @@ failover_state_emit( struct failover_context *failover ) failover->vertex_buffers ); } - if (failover->dirty & FO_NEW_VERTEX_ELEMENT) { - failover->sw->set_vertex_elements( failover->sw, - failover->num_vertex_elements, - failover->vertex_elements ); - } - failover->dirty = 0; } diff --git a/src/gallium/drivers/i915/Makefile b/src/gallium/drivers/i915/Makefile index e33c74d02f7..2cefe708500 100644 --- a/src/gallium/drivers/i915/Makefile +++ b/src/gallium/drivers/i915/Makefile @@ -5,7 +5,6 @@ LIBNAME = i915 C_SOURCES = \ i915_blit.c \ - i915_buffer.c \ i915_clear.c \ i915_flush.c \ i915_context.c \ @@ -20,7 +19,9 @@ C_SOURCES = \ i915_screen.c \ i915_prim_emit.c \ i915_prim_vbuf.c \ - i915_texture.c \ + i915_resource.c \ + i915_resource_texture.c \ + i915_resource_buffer.c \ i915_fpc_emit.c \ i915_fpc_translate.c \ i915_surface.c diff --git a/src/gallium/drivers/i915/SConscript b/src/gallium/drivers/i915/SConscript index 5a1c47c88db..7b69681096d 100644 --- a/src/gallium/drivers/i915/SConscript +++ b/src/gallium/drivers/i915/SConscript @@ -6,7 +6,7 @@ i915 = env.ConvenienceLibrary( target = 'i915', source = [ 'i915_blit.c', - 'i915_buffer.c', + 'i915_resource_buffer.c', 'i915_clear.c', 'i915_context.c', 'i915_debug.c', @@ -24,7 +24,8 @@ i915 = env.ConvenienceLibrary( 'i915_state_immediate.c', 'i915_state_sampler.c', 'i915_surface.c', - 'i915_texture.c', + 'i915_resource.c', + 'i915_resource_texture.c', ]) Export('i915') diff --git a/src/gallium/drivers/i915/i915_batch.h b/src/gallium/drivers/i915/i915_batch.h index b813784723f..f0086695d16 100644 --- a/src/gallium/drivers/i915/i915_batch.h +++ b/src/gallium/drivers/i915/i915_batch.h @@ -28,19 +28,19 @@ #ifndef I915_BATCH_H #define I915_BATCH_H -#include "intel_batchbuffer.h" +#include "i915_batchbuffer.h" #define BEGIN_BATCH(dwords, relocs) \ - (intel_batchbuffer_check(i915->batch, dwords, relocs)) + (i915_winsys_batchbuffer_check(i915->batch, dwords, relocs)) #define OUT_BATCH(dword) \ - intel_batchbuffer_dword(i915->batch, dword) + i915_winsys_batchbuffer_dword(i915->batch, dword) #define OUT_RELOC(buf, usage, offset) \ - intel_batchbuffer_reloc(i915->batch, buf, usage, offset) + i915_winsys_batchbuffer_reloc(i915->batch, buf, usage, offset) #define FLUSH_BATCH(fence) do { \ - intel_batchbuffer_flush(i915->batch, fence); \ + i915_winsys_batchbuffer_flush(i915->batch, fence); \ i915->hardware_dirty = ~0; \ } while (0) diff --git a/src/gallium/drivers/i915/intel_batchbuffer.h b/src/gallium/drivers/i915/i915_batchbuffer.h index db12dfd2ac2..27ccaa6b1fa 100644 --- a/src/gallium/drivers/i915/intel_batchbuffer.h +++ b/src/gallium/drivers/i915/i915_batchbuffer.h @@ -1,8 +1,8 @@ /************************************************************************** - * + * * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. - * + * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including @@ -10,11 +10,11 @@ * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: - * + * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. @@ -22,34 +22,34 @@ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * + * **************************************************************************/ -#ifndef INTEL_BATCH_H -#define INTEL_BATCH_H +#ifndef I915_BATCHBUFFER_H +#define I915_BATCHBUFFER_H -#include "intel_winsys.h" +#include "i915_winsys.h" static INLINE boolean -intel_batchbuffer_check(struct intel_batchbuffer *batch, - size_t dwords, - size_t relocs) +i915_winsys_batchbuffer_check(struct i915_winsys_batchbuffer *batch, + size_t dwords, + size_t relocs) { return dwords * 4 <= batch->size - (batch->ptr - batch->map) && relocs <= (batch->max_relocs - batch->relocs); } static INLINE size_t -intel_batchbuffer_space(struct intel_batchbuffer *batch) +i915_winsys_batchbuffer_space(struct i915_winsys_batchbuffer *batch) { return batch->size - (batch->ptr - batch->map); } static INLINE void -intel_batchbuffer_dword(struct intel_batchbuffer *batch, - unsigned dword) +i915_winsys_batchbuffer_dword(struct i915_winsys_batchbuffer *batch, + unsigned dword) { - if (intel_batchbuffer_space(batch) < 4) + if (i915_winsys_batchbuffer_space(batch) < 4) return; *(unsigned *)batch->ptr = dword; @@ -57,11 +57,11 @@ intel_batchbuffer_dword(struct intel_batchbuffer *batch, } static INLINE void -intel_batchbuffer_write(struct intel_batchbuffer *batch, - void *data, - size_t size) +i915_winsys_batchbuffer_write(struct i915_winsys_batchbuffer *batch, + void *data, + size_t size) { - if (intel_batchbuffer_space(batch) < size) + if (i915_winsys_batchbuffer_space(batch) < size) return; memcpy(data, batch->ptr, size); @@ -69,17 +69,17 @@ intel_batchbuffer_write(struct intel_batchbuffer *batch, } static INLINE int -intel_batchbuffer_reloc(struct intel_batchbuffer *batch, - struct intel_buffer *buffer, - enum intel_buffer_usage usage, - size_t offset) +i915_winsys_batchbuffer_reloc(struct i915_winsys_batchbuffer *batch, + struct i915_winsys_buffer *buffer, + enum i915_winsys_buffer_usage usage, + size_t offset) { return batch->iws->batchbuffer_reloc(batch, buffer, usage, offset); } static INLINE void -intel_batchbuffer_flush(struct intel_batchbuffer *batch, - struct pipe_fence_handle **fence) +i915_winsys_batchbuffer_flush(struct i915_winsys_batchbuffer *batch, + struct pipe_fence_handle **fence) { batch->iws->batchbuffer_flush(batch, fence); } diff --git a/src/gallium/drivers/i915/i915_blit.c b/src/gallium/drivers/i915/i915_blit.c index 83dfc335288..533fa81219b 100644 --- a/src/gallium/drivers/i915/i915_blit.c +++ b/src/gallium/drivers/i915/i915_blit.c @@ -37,7 +37,7 @@ void i915_fill_blit(struct i915_context *i915, unsigned cpp, unsigned short dst_pitch, - struct intel_buffer *dst_buffer, + struct i915_winsys_buffer *dst_buffer, unsigned dst_offset, short x, short y, short w, short h, @@ -77,7 +77,7 @@ i915_fill_blit(struct i915_context *i915, OUT_BATCH(BR13); OUT_BATCH((y << 16) | x); OUT_BATCH(((y + h) << 16) | (x + w)); - OUT_RELOC(dst_buffer, INTEL_USAGE_2D_TARGET, dst_offset); + OUT_RELOC(dst_buffer, I915_USAGE_2D_TARGET, dst_offset); OUT_BATCH(color); FLUSH_BATCH(NULL); } @@ -87,10 +87,10 @@ i915_copy_blit(struct i915_context *i915, unsigned do_flip, unsigned cpp, unsigned short src_pitch, - struct intel_buffer *src_buffer, + struct i915_winsys_buffer *src_buffer, unsigned src_offset, unsigned short dst_pitch, - struct intel_buffer *dst_buffer, + struct i915_winsys_buffer *dst_buffer, unsigned dst_offset, short src_x, short src_y, short dst_x, short dst_y, @@ -143,9 +143,9 @@ i915_copy_blit(struct i915_context *i915, OUT_BATCH(BR13); OUT_BATCH((dst_y << 16) | dst_x); OUT_BATCH((dst_y2 << 16) | dst_x2); - OUT_RELOC(dst_buffer, INTEL_USAGE_2D_TARGET, dst_offset); + OUT_RELOC(dst_buffer, I915_USAGE_2D_TARGET, dst_offset); OUT_BATCH((src_y << 16) | src_x); OUT_BATCH(((int) src_pitch & 0xffff)); - OUT_RELOC(src_buffer, INTEL_USAGE_2D_SOURCE, src_offset); + OUT_RELOC(src_buffer, I915_USAGE_2D_SOURCE, src_offset); FLUSH_BATCH(NULL); } diff --git a/src/gallium/drivers/i915/i915_blit.h b/src/gallium/drivers/i915/i915_blit.h index 8ce3220cfd9..db576ed4c90 100644 --- a/src/gallium/drivers/i915/i915_blit.h +++ b/src/gallium/drivers/i915/i915_blit.h @@ -34,10 +34,10 @@ extern void i915_copy_blit(struct i915_context *i915, unsigned do_flip, unsigned cpp, unsigned short src_pitch, - struct intel_buffer *src_buffer, + struct i915_winsys_buffer *src_buffer, unsigned src_offset, unsigned short dst_pitch, - struct intel_buffer *dst_buffer, + struct i915_winsys_buffer *dst_buffer, unsigned dst_offset, short srcx, short srcy, short dstx, short dsty, @@ -46,7 +46,7 @@ extern void i915_copy_blit(struct i915_context *i915, extern void i915_fill_blit(struct i915_context *i915, unsigned cpp, unsigned short dst_pitch, - struct intel_buffer *dst_buffer, + struct i915_winsys_buffer *dst_buffer, unsigned dst_offset, short x, short y, short w, short h, unsigned color); diff --git a/src/gallium/drivers/i915/i915_buffer.c b/src/gallium/drivers/i915/i915_buffer.c deleted file mode 100644 index 0f76a59e93a..00000000000 --- a/src/gallium/drivers/i915/i915_buffer.c +++ /dev/null @@ -1,138 +0,0 @@ -/************************************************************************** - * - * Copyright © 2009 Jakob Bornecrantz - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -#include "util/u_inlines.h" -#include "util/u_memory.h" -#include "i915_screen.h" -#include "i915_buffer.h" - -struct intel_buffer; - -struct i915_buffer -{ - struct pipe_buffer base; - - struct intel_buffer *ibuf; /** hw buffer */ - - void *data; /**< user and malloc data */ - boolean own; /**< we own the data incase of malloc */ -}; - -static INLINE struct i915_buffer * -i915_buffer(struct pipe_buffer *buffer) -{ - return (struct i915_buffer *)buffer; -} - -static struct pipe_buffer * -i915_buffer_create(struct pipe_screen *screen, - unsigned alignment, - unsigned usage, - unsigned size) -{ - struct i915_buffer *buf = CALLOC_STRUCT(i915_buffer); - - if (!buf) - return NULL; - - pipe_reference_init(&buf->base.reference, 1); - buf->base.alignment = alignment; - buf->base.screen = screen; - buf->base.usage = usage; - buf->base.size = size; - buf->data = MALLOC(size); - buf->own = TRUE; - - if (!buf->data) - goto err; - - return &buf->base; - -err: - FREE(buf); - return NULL; -} - -static struct pipe_buffer * -i915_user_buffer_create(struct pipe_screen *screen, - void *ptr, - unsigned bytes) -{ - struct i915_buffer *buf = CALLOC_STRUCT(i915_buffer); - - if (!buf) - return NULL; - - pipe_reference_init(&buf->base.reference, 1); - buf->base.alignment = 0; - buf->base.screen = screen; - buf->base.usage = 0; - buf->base.size = bytes; - buf->data = ptr; - buf->own = FALSE; - - return &buf->base; -} - -static void * -i915_buffer_map(struct pipe_screen *screen, - struct pipe_buffer *buffer, - unsigned usage) -{ - struct i915_buffer *buf = i915_buffer(buffer); - assert(!buf->ibuf); - return buf->data; -} - -static void -i915_buffer_unmap(struct pipe_screen *screen, - struct pipe_buffer *buffer) -{ - struct i915_buffer *buf = i915_buffer(buffer); - assert(!buf->ibuf); - (void) buf; -} - -static void -i915_buffer_destroy(struct pipe_buffer *buffer) -{ - struct i915_buffer *buf = i915_buffer(buffer); - assert(!buf->ibuf); - - if (buf->own) - FREE(buf->data); - FREE(buf); -} - -void i915_init_screen_buffer_functions(struct i915_screen *screen) -{ - screen->base.buffer_create = i915_buffer_create; - screen->base.user_buffer_create = i915_user_buffer_create; - screen->base.buffer_map = i915_buffer_map; - screen->base.buffer_map_range = NULL; - screen->base.buffer_flush_mapped_range = NULL; - screen->base.buffer_unmap = i915_buffer_unmap; - screen->base.buffer_destroy = i915_buffer_destroy; -} diff --git a/src/gallium/drivers/i915/i915_buffer.h b/src/gallium/drivers/i915/i915_buffer.h deleted file mode 100644 index 80fda7c62fd..00000000000 --- a/src/gallium/drivers/i915/i915_buffer.h +++ /dev/null @@ -1,31 +0,0 @@ -/************************************************************************** - * - * Copyright © 2009 Jakob Bornecrantz - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER - * DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -#ifndef I915_BUFFER_H -#define I915_BUFFER_H - -void i915_init_screen_buffer_functions(struct i915_screen *screen); - -#endif diff --git a/src/gallium/drivers/i915/i915_context.c b/src/gallium/drivers/i915/i915_context.c index 3d45a22b7e7..2af9bdac956 100644 --- a/src/gallium/drivers/i915/i915_context.c +++ b/src/gallium/drivers/i915/i915_context.c @@ -28,7 +28,9 @@ #include "i915_context.h" #include "i915_state.h" #include "i915_screen.h" +#include "i915_surface.h" #include "i915_batch.h" +#include "i915_resource.h" #include "draw/draw_context.h" #include "pipe/p_defines.h" @@ -44,8 +46,9 @@ static void i915_draw_range_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, + struct pipe_resource *indexBuffer, unsigned indexSize, + int indexBias, unsigned min_index, unsigned max_index, unsigned prim, unsigned start, unsigned count) @@ -61,8 +64,7 @@ i915_draw_range_elements(struct pipe_context *pipe, * Map vertex buffers */ for (i = 0; i < i915->num_vertex_buffers; i++) { - void *buf = pipe_buffer_map(pipe->screen, i915->vertex_buffer[i].buffer, - PIPE_BUFFER_USAGE_CPU_READ); + void *buf = i915_buffer(i915->vertex_buffer[i].buffer)->data; draw_set_mapped_vertex_buffer(draw, i, buf); } @@ -70,14 +72,13 @@ i915_draw_range_elements(struct pipe_context *pipe, * Map index buffer, if present */ if (indexBuffer) { - void *mapped_indexes = pipe_buffer_map(pipe->screen, indexBuffer, - PIPE_BUFFER_USAGE_CPU_READ); - draw_set_mapped_element_buffer_range(draw, indexSize, + void *mapped_indexes = i915_buffer(indexBuffer)->data; + draw_set_mapped_element_buffer_range(draw, indexSize, indexBias, min_index, max_index, mapped_indexes); } else { - draw_set_mapped_element_buffer(draw, 0, NULL); + draw_set_mapped_element_buffer(draw, 0, 0, NULL); } @@ -95,24 +96,22 @@ i915_draw_range_elements(struct pipe_context *pipe, * unmap vertex/index buffers */ for (i = 0; i < i915->num_vertex_buffers; i++) { - pipe_buffer_unmap(pipe->screen, i915->vertex_buffer[i].buffer); draw_set_mapped_vertex_buffer(draw, i, NULL); } if (indexBuffer) { - pipe_buffer_unmap(pipe->screen, indexBuffer); - draw_set_mapped_element_buffer_range(draw, 0, start, start + count - 1, NULL); + draw_set_mapped_element_buffer(draw, 0, 0, NULL); } } static void i915_draw_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, - unsigned indexSize, + struct pipe_resource *indexBuffer, + unsigned indexSize, int indexBias, unsigned prim, unsigned start, unsigned count) { i915_draw_range_elements(pipe, indexBuffer, - indexSize, + indexSize, indexBias, 0, 0xffffffff, prim, start, count); } @@ -121,41 +120,10 @@ static void i915_draw_arrays(struct pipe_context *pipe, unsigned prim, unsigned start, unsigned count) { - i915_draw_elements(pipe, NULL, 0, prim, start, count); + i915_draw_elements(pipe, NULL, 0, 0, prim, start, count); } -/* - * Is referenced functions - */ - - -static unsigned int -i915_is_texture_referenced(struct pipe_context *pipe, - struct pipe_texture *texture, - unsigned face, unsigned level) -{ - /** - * FIXME: Return the corrent result. We can't alays return referenced - * since it causes a double flush within the vbo module. - */ -#if 0 - return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE; -#else - return 0; -#endif -} - -static unsigned int -i915_is_buffer_referenced(struct pipe_context *pipe, - struct pipe_buffer *buf) -{ - /* - * Since we never expose hardware buffers to the state tracker - * they can never be referenced, so this isn't a lie - */ - return 0; -} /* @@ -204,13 +172,10 @@ i915_create_context(struct pipe_screen *screen, void *priv) i915->base.draw_elements = i915_draw_elements; i915->base.draw_range_elements = i915_draw_range_elements; - i915->base.is_texture_referenced = i915_is_texture_referenced; - i915->base.is_buffer_referenced = i915_is_buffer_referenced; - /* * Create drawing context and plug our rendering stage into it. */ - i915->draw = draw_create(); + i915->draw = draw_create(&i915->base); assert(i915->draw); if (!debug_get_bool_option("I915_NO_VBUF", FALSE)) { draw_set_rasterize_stage(i915->draw, i915_draw_vbuf_stage(i915)); @@ -221,6 +186,7 @@ i915_create_context(struct pipe_screen *screen, void *priv) i915_init_surface_functions(i915); i915_init_state_functions(i915); i915_init_flush_functions(i915); + i915_init_resource_functions(i915); draw_install_aaline_stage(i915->draw, &i915->base); draw_install_aapoint_stage(i915->draw, &i915->base); diff --git a/src/gallium/drivers/i915/i915_context.h b/src/gallium/drivers/i915/i915_context.h index da769e7b290..acc0ffe037f 100644 --- a/src/gallium/drivers/i915/i915_context.h +++ b/src/gallium/drivers/i915/i915_context.h @@ -38,9 +38,9 @@ #include "tgsi/tgsi_scan.h" -struct intel_winsys; -struct intel_buffer; -struct intel_batchbuffer; +struct i915_winsys; +struct i915_winsys_buffer; +struct i915_winsys_batchbuffer; #define I915_TEX_UNITS 8 @@ -148,7 +148,7 @@ struct i915_state /** Describes the current hardware vertex layout */ struct vertex_info vertex_info; - + unsigned id; /* track lost context events */ }; @@ -187,38 +187,17 @@ struct i915_sampler_state { unsigned maxlod; }; -struct i915_texture { - struct pipe_texture base; - - /* Derived from the above: - */ - unsigned stride; - unsigned depth_stride; /* per-image on i945? */ - unsigned total_nblocksy; - - unsigned sw_tiled; /**< tiled with software flags */ - unsigned hw_tiled; /**< tiled with hardware fences */ - - unsigned nr_images[PIPE_MAX_TEXTURE_LEVELS]; - - /* Explicitly store the offset of each image for each cube face or - * depth value. Pretty much have to accept that hardware formats - * are going to be so diverse that there is no unified way to - * compute the offsets of depth/cube images within a mipmap level, - * so have to store them as a lookup table: - */ - unsigned *image_offset[PIPE_MAX_TEXTURE_LEVELS]; /**< array [depth] of offsets */ - - /* The data is held here: - */ - struct intel_buffer *buffer; +struct i915_velems_state { + unsigned count; + struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS]; }; + struct i915_context { struct pipe_context base; - struct intel_winsys *iws; + struct i915_winsys *iws; struct draw_context *draw; @@ -235,25 +214,24 @@ struct i915_context struct pipe_stencil_ref stencil_ref; struct pipe_clip_state clip; /* XXX unneded */ - struct pipe_buffer *constants[PIPE_SHADER_TYPES]; + struct pipe_resource *constants[PIPE_SHADER_TYPES]; struct pipe_framebuffer_state framebuffer; struct pipe_poly_stipple poly_stipple; struct pipe_scissor_state scissor; - struct i915_texture *texture[PIPE_MAX_SAMPLERS]; + struct pipe_sampler_view *fragment_sampler_views[PIPE_MAX_SAMPLERS]; struct pipe_viewport_state viewport; struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS]; unsigned dirty; unsigned num_samplers; - unsigned num_textures; - unsigned num_vertex_elements; + unsigned num_fragment_sampler_views; unsigned num_vertex_buffers; - struct intel_batchbuffer *batch; + struct i915_winsys_batchbuffer *batch; /** Vertex buffer */ - struct intel_buffer *vbo; + struct i915_winsys_buffer *vbo; size_t vbo_offset; unsigned vbo_flushed; @@ -276,7 +254,7 @@ struct i915_context #define I915_NEW_ALPHA_TEST 0x100 #define I915_NEW_DEPTH_STENCIL 0x200 #define I915_NEW_SAMPLER 0x400 -#define I915_NEW_TEXTURE 0x800 +#define I915_NEW_SAMPLER_VIEW 0x800 #define I915_NEW_CONSTANTS 0x1000 #define I915_NEW_VBO 0x2000 #define I915_NEW_VS 0x4000 @@ -326,10 +304,8 @@ void i915_clear( struct pipe_context *pipe, unsigned buffers, const float *rgba, /*********************************************************************** - * i915_surface.c: + * */ -void i915_init_surface_functions( struct i915_context *i915 ); - void i915_init_state_functions( struct i915_context *i915 ); void i915_init_flush_functions( struct i915_context *i915 ); void i915_init_string_functions( struct i915_context *i915 ); @@ -342,6 +318,8 @@ struct pipe_context *i915_create_context(struct pipe_screen *screen, void *priv); + + /*********************************************************************** * Inline conversion functions. These are better-typed than the * macros used previously: diff --git a/src/gallium/drivers/i915/i915_debug.c b/src/gallium/drivers/i915/i915_debug.c index 237654d26b2..663fac3055c 100644 --- a/src/gallium/drivers/i915/i915_debug.c +++ b/src/gallium/drivers/i915/i915_debug.c @@ -863,7 +863,7 @@ static boolean i915_debug_packet( struct debug_stream *stream ) void -i915_dump_batchbuffer( struct intel_batchbuffer *batch ) +i915_dump_batchbuffer( struct i915_winsys_batchbuffer *batch ) { struct debug_stream stream; unsigned *start = (unsigned*)batch->map; diff --git a/src/gallium/drivers/i915/i915_debug.h b/src/gallium/drivers/i915/i915_debug.h index 8f7484797de..67b8d9c2f63 100644 --- a/src/gallium/drivers/i915/i915_debug.h +++ b/src/gallium/drivers/i915/i915_debug.h @@ -104,9 +104,9 @@ I915_DBG( #endif -struct intel_batchbuffer; +struct i915_winsys_batchbuffer; -void i915_dump_batchbuffer( struct intel_batchbuffer *i915 ); +void i915_dump_batchbuffer( struct i915_winsys_batchbuffer *i915 ); void i915_debug_init( struct i915_context *i915 ); diff --git a/src/gallium/drivers/i915/i915_debug_fp.c b/src/gallium/drivers/i915/i915_debug_fp.c index 066e7392d18..f41c51f2991 100644 --- a/src/gallium/drivers/i915/i915_debug_fp.c +++ b/src/gallium/drivers/i915/i915_debug_fp.c @@ -28,7 +28,6 @@ #include "i915_reg.h" #include "i915_debug.h" -#include "util/u_simple_screen.h" #include "util/u_debug.h" diff --git a/src/gallium/drivers/i915/i915_fpc_emit.c b/src/gallium/drivers/i915/i915_fpc_emit.c index b054ce41d39..76c24d2b2fd 100644 --- a/src/gallium/drivers/i915/i915_fpc_emit.c +++ b/src/gallium/drivers/i915/i915_fpc_emit.c @@ -243,7 +243,7 @@ uint i915_emit_texld( struct i915_fp_compile *p, } else { assert(GET_UREG_TYPE(dest) != REG_TYPE_CONST); - assert(dest = UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest))); + assert(dest == UREG(GET_UREG_TYPE(dest), GET_UREG_NR(dest))); /* is the sampler coord a texcoord input reg? */ if (GET_UREG_TYPE(coord) != REG_TYPE_T) { diff --git a/src/gallium/drivers/i915/i915_prim_emit.c b/src/gallium/drivers/i915/i915_prim_emit.c index d9a5c40ab97..dd997e2cf48 100644 --- a/src/gallium/drivers/i915/i915_prim_emit.c +++ b/src/gallium/drivers/i915/i915_prim_emit.c @@ -102,6 +102,13 @@ emit_hw_vertex( struct i915_context *i915, count += 4; break; case EMIT_4UB: + OUT_BATCH( pack_ub4(float_to_ubyte( attrib[0] ), + float_to_ubyte( attrib[1] ), + float_to_ubyte( attrib[2] ), + float_to_ubyte( attrib[3] )) ); + count += 1; + break; + case EMIT_4UB_BGRA: OUT_BATCH( pack_ub4(float_to_ubyte( attrib[2] ), float_to_ubyte( attrib[1] ), float_to_ubyte( attrib[0] ), diff --git a/src/gallium/drivers/i915/i915_prim_vbuf.c b/src/gallium/drivers/i915/i915_prim_vbuf.c index cad4109ee6b..df9e68af4fc 100644 --- a/src/gallium/drivers/i915/i915_prim_vbuf.c +++ b/src/gallium/drivers/i915/i915_prim_vbuf.c @@ -76,7 +76,7 @@ struct i915_vbuf_render { unsigned fallback; /* Stuff for the vbo */ - struct intel_buffer *vbo; + struct i915_winsys_buffer *vbo; size_t vbo_size; /**< current size of allocated buffer */ size_t vbo_alloc_size; /**< minimum buffer size to allocate */ size_t vbo_offset; @@ -141,7 +141,7 @@ static void i915_vbuf_render_new_buf(struct i915_vbuf_render *i915_render, size_t size) { struct i915_context *i915 = i915_render->i915; - struct intel_winsys *iws = i915->iws; + struct i915_winsys *iws = i915->iws; if (i915_render->vbo) { #ifdef VBUF_USE_FIFO @@ -172,7 +172,7 @@ i915_vbuf_render_new_buf(struct i915_vbuf_render *i915_render, size_t size) if (i915_render->vbo_size != i915_render->pool_buffer_size) { i915_render->pool_not_used = TRUE; i915_render->vbo = iws->buffer_create(iws, i915_render->vbo_size, 64, - INTEL_NEW_VERTEX); + I915_NEW_VERTEX); } else { i915_render->pool_not_used = FALSE; @@ -185,7 +185,7 @@ i915_vbuf_render_new_buf(struct i915_vbuf_render *i915_render, size_t size) } #else i915_render->vbo = iws->buffer_create(iws, i915_render->vbo_size, - 64, INTEL_NEW_VERTEX); + 64, I915_NEW_VERTEX); #endif } @@ -225,7 +225,7 @@ i915_vbuf_render_map_vertices(struct vbuf_render *render) { struct i915_vbuf_render *i915_render = i915_vbuf_render(render); struct i915_context *i915 = i915_render->i915; - struct intel_winsys *iws = i915->iws; + struct i915_winsys *iws = i915->iws; if (i915->vbo_flushed) debug_printf("%s bad vbo flush occured stalling on hw\n", __FUNCTION__); @@ -246,7 +246,7 @@ i915_vbuf_render_unmap_vertices(struct vbuf_render *render, { struct i915_vbuf_render *i915_render = i915_vbuf_render(render); struct i915_context *i915 = i915_render->i915; - struct intel_winsys *iws = i915->iws; + struct i915_winsys *iws = i915->iws; i915_render->vbo_max_used = MAX2(i915_render->vbo_max_used, i915_render->vertex_size * (max_index + 1)); #ifdef VBUF_MAP_BUFFER @@ -621,7 +621,7 @@ static struct vbuf_render * i915_vbuf_render_create(struct i915_context *i915) { struct i915_vbuf_render *i915_render = CALLOC_STRUCT(i915_vbuf_render); - struct intel_winsys *iws = i915->iws; + struct i915_winsys *iws = i915->iws; int i; i915_render->i915 = i915; @@ -662,7 +662,7 @@ i915_vbuf_render_create(struct i915_context *i915) for (i = 0; i < 6; i++) u_fifo_add(i915_render->pool_fifo, iws->buffer_create(iws, i915_render->pool_buffer_size, 64, - INTEL_NEW_VERTEX)); + I915_NEW_VERTEX)); #else (void)i; (void)iws; diff --git a/src/gallium/drivers/i915/i915_resource.c b/src/gallium/drivers/i915/i915_resource.c new file mode 100644 index 00000000000..499233ceb9b --- /dev/null +++ b/src/gallium/drivers/i915/i915_resource.c @@ -0,0 +1,51 @@ +#include "util/u_debug.h" + +#include "i915_resource.h" +#include "i915_context.h" +#include "i915_screen.h" + + +static struct pipe_resource * +i915_resource_create(struct pipe_screen *screen, + const struct pipe_resource *template) +{ + if (template->target == PIPE_BUFFER) + return i915_buffer_create(screen, template); + else + return i915_texture_create(screen, template); + +} + +static struct pipe_resource * +i915_resource_from_handle(struct pipe_screen * screen, + const struct pipe_resource *template, + struct winsys_handle *whandle) +{ + if (template->target == PIPE_BUFFER) + return NULL; + else + return i915_texture_from_handle(screen, template, whandle); +} + + +void +i915_init_resource_functions(struct i915_context *i915 ) +{ + i915->base.is_resource_referenced = u_default_is_resource_referenced; + i915->base.get_transfer = u_get_transfer_vtbl; + i915->base.transfer_map = u_transfer_map_vtbl; + i915->base.transfer_flush_region = u_transfer_flush_region_vtbl; + i915->base.transfer_unmap = u_transfer_unmap_vtbl; + i915->base.transfer_destroy = u_transfer_destroy_vtbl; + i915->base.transfer_inline_write = u_transfer_inline_write_vtbl; +} + +void +i915_init_screen_resource_functions(struct i915_screen *is) +{ + is->base.resource_create = i915_resource_create; + is->base.resource_from_handle = i915_resource_from_handle; + is->base.resource_get_handle = u_resource_get_handle_vtbl; + is->base.resource_destroy = u_resource_destroy_vtbl; + is->base.user_buffer_create = i915_user_buffer_create; +} diff --git a/src/gallium/drivers/i915/i915_resource.h b/src/gallium/drivers/i915/i915_resource.h new file mode 100644 index 00000000000..1093e8f41f9 --- /dev/null +++ b/src/gallium/drivers/i915/i915_resource.h @@ -0,0 +1,114 @@ +/************************************************************************** + * + * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#ifndef I915_RESOURCE_H +#define I915_RESOURCE_H + +struct i915_screen; + +#include "util/u_transfer.h" +#include "util/u_debug.h" + + +struct i915_context; +struct i915_screen; + + +struct i915_buffer { + struct u_resource b; + uint8_t *data; + boolean free_on_destroy; +}; + +#define I915_MAX_TEXTURE_2D_LEVELS 11 /* max 1024x1024 */ +#define I915_MAX_TEXTURE_3D_LEVELS 8 /* max 128x128x128 */ + + + +struct i915_texture { + struct u_resource b; + + unsigned stride; + unsigned depth_stride; /* per-image on i945? */ + unsigned total_nblocksy; + + unsigned sw_tiled; /**< tiled with software flags */ + unsigned hw_tiled; /**< tiled with hardware fences */ + + unsigned nr_images[I915_MAX_TEXTURE_2D_LEVELS]; + + /* Explicitly store the offset of each image for each cube face or + * depth value. + */ + unsigned *image_offset[I915_MAX_TEXTURE_2D_LEVELS]; /**< array [depth] of offsets */ + + /* The data is held here: + */ + struct i915_winsys_buffer *buffer; +}; + +void i915_init_screen_resource_functions(struct i915_screen *is); +void i915_init_resource_functions(struct i915_context *i915); + +extern struct u_resource_vtbl i915_buffer_vtbl; +extern struct u_resource_vtbl i915_texture_vtbl; + +static INLINE struct i915_texture *i915_texture(struct pipe_resource *resource) +{ + struct i915_texture *tex = (struct i915_texture *)resource; + assert(tex->b.vtbl == &i915_texture_vtbl); + return tex; +} + +static INLINE struct i915_buffer *i915_buffer(struct pipe_resource *resource) +{ + struct i915_buffer *tex = (struct i915_buffer *)resource; + assert(tex->b.vtbl == &i915_buffer_vtbl); + return tex; +} + +struct pipe_resource * +i915_texture_create(struct pipe_screen *screen, + const struct pipe_resource *template); + +struct pipe_resource * +i915_texture_from_handle(struct pipe_screen * screen, + const struct pipe_resource *template, + struct winsys_handle *whandle); + + +struct pipe_resource * +i915_user_buffer_create(struct pipe_screen *screen, + void *ptr, + unsigned bytes, + unsigned usage); + +struct pipe_resource * +i915_buffer_create(struct pipe_screen *screen, + const struct pipe_resource *template); + +#endif /* I915_RESOURCE_H */ diff --git a/src/gallium/drivers/i915/i915_resource_buffer.c b/src/gallium/drivers/i915/i915_resource_buffer.c new file mode 100644 index 00000000000..0d379497dfc --- /dev/null +++ b/src/gallium/drivers/i915/i915_resource_buffer.c @@ -0,0 +1,160 @@ +/************************************************************************** + * + * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + /* + * Authors: + * Keith Whitwell <[email protected]> + * Michel Dänzer <[email protected]> + */ + +#include "pipe/p_context.h" +#include "pipe/p_defines.h" +#include "util/u_inlines.h" +#include "util/u_math.h" +#include "util/u_memory.h" + +#include "i915_context.h" +#include "i915_resource.h" + + + +static boolean +i915_buffer_get_handle(struct pipe_screen *screen, + struct pipe_resource *resource, + struct winsys_handle *handle) +{ + return FALSE; +} + +static void +i915_buffer_destroy(struct pipe_screen *screen, + struct pipe_resource *resource) +{ + struct i915_buffer *buffer = i915_buffer(resource); + if (buffer->free_on_destroy) + align_free(buffer->data); + FREE(buffer); +} + + +static void * +i915_buffer_transfer_map( struct pipe_context *pipe, + struct pipe_transfer *transfer ) +{ + struct i915_buffer *buffer = i915_buffer(transfer->resource); + return buffer->data + transfer->box.x; +} + + +static void +i915_buffer_transfer_inline_write( struct pipe_context *rm_ctx, + struct pipe_resource *resource, + struct pipe_subresource sr, + unsigned usage, + const struct pipe_box *box, + const void *data, + unsigned stride, + unsigned slice_stride) +{ + struct i915_buffer *buffer = i915_buffer(resource); + + memcpy(buffer->data + box->x, + data, + box->width); +} + + +struct u_resource_vtbl i915_buffer_vtbl = +{ + i915_buffer_get_handle, /* get_handle */ + i915_buffer_destroy, /* resource_destroy */ + NULL, /* is_resource_referenced */ + u_default_get_transfer, /* get_transfer */ + u_default_transfer_destroy, /* transfer_destroy */ + i915_buffer_transfer_map, /* transfer_map */ + u_default_transfer_flush_region, /* transfer_flush_region */ + u_default_transfer_unmap, /* transfer_unmap */ + i915_buffer_transfer_inline_write /* transfer_inline_write */ +}; + + + +struct pipe_resource * +i915_buffer_create(struct pipe_screen *screen, + const struct pipe_resource *template) +{ + struct i915_buffer *buf = CALLOC_STRUCT(i915_buffer); + + if (!buf) + return NULL; + + buf->b.b = *template; + buf->b.vtbl = &i915_buffer_vtbl; + pipe_reference_init(&buf->b.b.reference, 1); + buf->b.b.screen = screen; + + buf->data = MALLOC(template->width0); + buf->free_on_destroy = TRUE; + + if (!buf->data) + goto err; + + return &buf->b.b; + +err: + FREE(buf); + return NULL; +} + + + +struct pipe_resource * +i915_user_buffer_create(struct pipe_screen *screen, + void *ptr, + unsigned bytes, + unsigned bind) +{ + struct i915_buffer *buf = CALLOC_STRUCT(i915_buffer); + + if (!buf) + return NULL; + + pipe_reference_init(&buf->b.b.reference, 1); + buf->b.vtbl = &i915_buffer_vtbl; + buf->b.b.screen = screen; + buf->b.b.format = PIPE_FORMAT_R8_UNORM; /* ?? */ + buf->b.b.usage = PIPE_USAGE_IMMUTABLE; + buf->b.b.bind = bind; + buf->b.b.flags = 0; + buf->b.b.width0 = bytes; + buf->b.b.height0 = 1; + buf->b.b.depth0 = 1; + + buf->data = ptr; + buf->free_on_destroy = FALSE; + + return &buf->b.b; +} diff --git a/src/gallium/drivers/i915/i915_resource_texture.c b/src/gallium/drivers/i915/i915_resource_texture.c new file mode 100644 index 00000000000..17fcdee379a --- /dev/null +++ b/src/gallium/drivers/i915/i915_resource_texture.c @@ -0,0 +1,857 @@ +/************************************************************************** + * + * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + /* + * Authors: + * Keith Whitwell <[email protected]> + * Michel Dänzer <[email protected]> + */ + +#include "pipe/p_state.h" +#include "pipe/p_context.h" +#include "pipe/p_defines.h" +#include "util/u_inlines.h" +#include "util/u_format.h" +#include "util/u_math.h" +#include "util/u_memory.h" + +#include "i915_context.h" +#include "i915_resource.h" +#include "i915_screen.h" +#include "i915_winsys.h" + + +#define DEBUG_TEXTURES 0 + +/* + * Helper function and arrays + */ + + +/** + * Initial offset for Cube map. + */ +static const int initial_offsets[6][2] = { + [PIPE_TEX_FACE_POS_X] = {0, 0}, + [PIPE_TEX_FACE_POS_Y] = {1, 0}, + [PIPE_TEX_FACE_POS_Z] = {1, 1}, + [PIPE_TEX_FACE_NEG_X] = {0, 2}, + [PIPE_TEX_FACE_NEG_Y] = {1, 2}, + [PIPE_TEX_FACE_NEG_Z] = {1, 3}, +}; + +/** + * Step offsets for Cube map. + */ +static const int step_offsets[6][2] = { + [PIPE_TEX_FACE_POS_X] = { 0, 2}, + [PIPE_TEX_FACE_POS_Y] = {-1, 2}, + [PIPE_TEX_FACE_POS_Z] = {-1, 1}, + [PIPE_TEX_FACE_NEG_X] = { 0, 2}, + [PIPE_TEX_FACE_NEG_Y] = {-1, 2}, + [PIPE_TEX_FACE_NEG_Z] = {-1, 1}, +}; + +/** + * For compressed level 2 + */ +static const int bottom_offsets[6] = { + [PIPE_TEX_FACE_POS_X] = 16 + 0 * 8, + [PIPE_TEX_FACE_POS_Y] = 16 + 1 * 8, + [PIPE_TEX_FACE_POS_Z] = 16 + 2 * 8, + [PIPE_TEX_FACE_NEG_X] = 16 + 3 * 8, + [PIPE_TEX_FACE_NEG_Y] = 16 + 4 * 8, + [PIPE_TEX_FACE_NEG_Z] = 16 + 5 * 8, +}; + +static INLINE unsigned +align_nblocksx(enum pipe_format format, unsigned width, unsigned align_to) +{ + return align(util_format_get_nblocksx(format, width), align_to); +} + +static INLINE unsigned +align_nblocksy(enum pipe_format format, unsigned width, unsigned align_to) +{ + return align(util_format_get_nblocksy(format, width), align_to); +} + +static INLINE unsigned +get_pot_stride(enum pipe_format format, unsigned width) +{ + return util_next_power_of_two(util_format_get_stride(format, width)); +} + +/* + * More advanced helper funcs + */ + + +static void +i915_texture_set_level_info(struct i915_texture *tex, + unsigned level, unsigned nr_images) +{ + assert(level < Elements(tex->nr_images)); + assert(nr_images); + assert(!tex->image_offset[level]); + + tex->nr_images[level] = nr_images; + tex->image_offset[level] = (unsigned *) MALLOC(nr_images * sizeof(unsigned)); + tex->image_offset[level][0] = 0; +} + +static void +i915_texture_set_image_offset(struct i915_texture *tex, + unsigned level, unsigned img, + unsigned x, unsigned y) +{ + /* for the first image and level make sure offset is zero */ + assert(!(img == 0 && level == 0) || (x == 0 && y == 0)); + assert(img < tex->nr_images[level]); + + tex->image_offset[level][img] = y * tex->stride + x * util_format_get_blocksize(tex->b.b.format); + +#if DEBUG_TEXTURES + debug_printf("%s: %p level %u, img %u (%u, %u) %p\n", __FUNCTION__, + tex, level, img, x, y, + (void*)(uintptr_t)tex->image_offset[level][img]); +#endif +} + + +/* + * Shared layout functions + */ + + +/** + * Special case to deal with scanout textures. + */ +static boolean +i9x5_scanout_layout(struct i915_texture *tex) +{ + struct pipe_resource *pt = &tex->b.b; + + if (pt->last_level > 0 || util_format_get_blocksize(pt->format) != 4) + return FALSE; + + i915_texture_set_level_info(tex, 0, 1); + i915_texture_set_image_offset(tex, 0, 0, 0, 0); + + if (pt->width0 >= 240) { + tex->stride = get_pot_stride(pt->format, pt->width0); + tex->total_nblocksy = align_nblocksy(pt->format, pt->height0, 8); + tex->hw_tiled = I915_TILE_X; + } else if (pt->width0 == 64 && pt->height0 == 64) { + tex->stride = get_pot_stride(pt->format, pt->width0); + tex->total_nblocksy = align_nblocksy(pt->format, pt->height0, 8); + } else { + return FALSE; + } + +#if DEBUG_TEXTURE + debug_printf("%s size: %d,%d,%d offset %d,%d (0x%x)\n", __FUNCTION__, + pt->width0, pt->height0, util_format_get_blocksize(pt->format), + tex->stride, tex->total_nblocksy, tex->stride * tex->total_nblocksy); +#endif + + return TRUE; +} + +/** + * Special case to deal with shared textures. + */ +static boolean +i9x5_display_target_layout(struct i915_texture *tex) +{ + struct pipe_resource *pt = &tex->b.b; + + if (pt->last_level > 0 || util_format_get_blocksize(pt->format) != 4) + return FALSE; + + /* fallback to normal textures for small textures */ + if (pt->width0 < 240) + return FALSE; + + i915_texture_set_level_info(tex, 0, 1); + i915_texture_set_image_offset(tex, 0, 0, 0, 0); + + tex->stride = get_pot_stride(pt->format, pt->width0); + tex->total_nblocksy = align_nblocksy(pt->format, pt->height0, 8); + tex->hw_tiled = I915_TILE_X; + +#if DEBUG_TEXTURE + debug_printf("%s size: %d,%d,%d offset %d,%d (0x%x)\n", __FUNCTION__, + pt->width0, pt->height0, util_format_get_blocksize(pt->format), + tex->stride, tex->total_nblocksy, tex->stride * tex->total_nblocksy); +#endif + + return TRUE; +} + +/** + * Helper function for special layouts + */ +static boolean +i9x5_special_layout(struct i915_texture *tex) +{ + struct pipe_resource *pt = &tex->b.b; + + /* Scanouts needs special care */ + if (pt->bind & PIPE_BIND_SCANOUT) + if (i9x5_scanout_layout(tex)) + return TRUE; + + /* Shared buffers needs to be compatible with X servers + * + * XXX: need a better name than shared for this if it is to be part + * of core gallium, and probably move the flag to resource.flags, + * rather than bindings. + */ + if (pt->bind & (PIPE_BIND_SHARED | PIPE_BIND_DISPLAY_TARGET)) + if (i9x5_display_target_layout(tex)) + return TRUE; + + return FALSE; +} + +/** + * Cube layout used on i915 and for non-compressed textures on i945. + */ +static void +i9x5_texture_layout_cube(struct i915_texture *tex) +{ + struct pipe_resource *pt = &tex->b.b; + const unsigned nblocks = util_format_get_nblocksx(pt->format, pt->width0); + unsigned level; + unsigned face; + + assert(pt->width0 == pt->height0); /* cubemap images are square */ + + /* double pitch for cube layouts */ + tex->stride = align(nblocks * util_format_get_blocksize(pt->format) * 2, 4); + tex->total_nblocksy = nblocks * 4; + + for (level = 0; level <= pt->last_level; level++) + i915_texture_set_level_info(tex, level, 6); + + for (face = 0; face < 6; face++) { + unsigned x = initial_offsets[face][0] * nblocks; + unsigned y = initial_offsets[face][1] * nblocks; + unsigned d = nblocks; + + for (level = 0; level <= pt->last_level; level++) { + i915_texture_set_image_offset(tex, level, face, x, y); + d >>= 1; + x += step_offsets[face][0] * d; + y += step_offsets[face][1] * d; + } + } +} + + +/* + * i915 layout functions + */ + + +static void +i915_texture_layout_2d(struct i915_texture *tex) +{ + struct pipe_resource *pt = &tex->b.b; + unsigned level; + unsigned width = pt->width0; + unsigned height = pt->height0; + unsigned nblocksy = util_format_get_nblocksy(pt->format, pt->width0); + unsigned align_y = 2; + + if (util_format_is_s3tc(pt->format)) + align_y = 1; + + tex->stride = align(util_format_get_stride(pt->format, pt->width0), 4); + tex->total_nblocksy = 0; + + for (level = 0; level <= pt->last_level; level++) { + i915_texture_set_level_info(tex, level, 1); + i915_texture_set_image_offset(tex, level, 0, 0, tex->total_nblocksy); + + tex->total_nblocksy += nblocksy; + + width = u_minify(width, 1); + height = u_minify(height, 1); + nblocksy = align_nblocksy(pt->format, height, align_y); + } +} + +static void +i915_texture_layout_3d(struct i915_texture *tex) +{ + struct pipe_resource *pt = &tex->b.b; + unsigned level; + + unsigned width = pt->width0; + unsigned height = pt->height0; + unsigned depth = pt->depth0; + unsigned nblocksy = util_format_get_nblocksy(pt->format, pt->height0); + unsigned stack_nblocksy = 0; + + /* Calculate the size of a single slice. + */ + tex->stride = align(util_format_get_stride(pt->format, pt->width0), 4); + + /* XXX: hardware expects/requires 9 levels at minimum. + */ + for (level = 0; level <= MAX2(8, pt->last_level); level++) { + i915_texture_set_level_info(tex, level, depth); + + stack_nblocksy += MAX2(2, nblocksy); + + width = u_minify(width, 1); + height = u_minify(height, 1); + nblocksy = util_format_get_nblocksy(pt->format, height); + } + + /* Fixup depth image_offsets: + */ + for (level = 0; level <= pt->last_level; level++) { + unsigned i; + for (i = 0; i < depth; i++) + i915_texture_set_image_offset(tex, level, i, 0, i * stack_nblocksy); + + depth = u_minify(depth, 1); + } + + /* Multiply slice size by texture depth for total size. It's + * remarkable how wasteful of memory the i915 texture layouts + * are. They are largely fixed in the i945. + */ + tex->total_nblocksy = stack_nblocksy * pt->depth0; +} + +static boolean +i915_texture_layout(struct i915_texture * tex) +{ + struct pipe_resource *pt = &tex->b.b; + + switch (pt->target) { + case PIPE_TEXTURE_1D: + case PIPE_TEXTURE_2D: + if (!i9x5_special_layout(tex)) + i915_texture_layout_2d(tex); + break; + case PIPE_TEXTURE_3D: + i915_texture_layout_3d(tex); + break; + case PIPE_TEXTURE_CUBE: + i9x5_texture_layout_cube(tex); + break; + default: + assert(0); + return FALSE; + } + + return TRUE; +} + + +/* + * i945 layout functions + */ + + +static void +i945_texture_layout_2d(struct i915_texture *tex) +{ + struct pipe_resource *pt = &tex->b.b; + int align_x = 4, align_y = 2; + unsigned level; + unsigned x = 0; + unsigned y = 0; + unsigned width = pt->width0; + unsigned height = pt->height0; + unsigned nblocksx = util_format_get_nblocksx(pt->format, pt->width0); + unsigned nblocksy = util_format_get_nblocksy(pt->format, pt->height0); + + if (util_format_is_s3tc(pt->format)) { + align_x = 1; + align_y = 1; + } + + tex->stride = align(util_format_get_stride(pt->format, pt->width0), 4); + + /* May need to adjust pitch to accomodate the placement of + * the 2nd mipmap level. This occurs when the alignment + * constraints of mipmap placement push the right edge of the + * 2nd mipmap level out past the width of its parent. + */ + if (pt->last_level > 0) { + unsigned mip1_nblocksx = + align_nblocksx(pt->format, u_minify(pt->width0, 1), align_x) + + util_format_get_nblocksx(pt->format, u_minify(pt->width0, 2)); + + if (mip1_nblocksx > nblocksx) + tex->stride = mip1_nblocksx * util_format_get_blocksize(pt->format); + } + + /* Pitch must be a whole number of dwords + */ + tex->stride = align(tex->stride, 64); + tex->total_nblocksy = 0; + + for (level = 0; level <= pt->last_level; level++) { + i915_texture_set_level_info(tex, level, 1); + i915_texture_set_image_offset(tex, level, 0, x, y); + + /* Because the images are packed better, the final offset + * might not be the maximal one: + */ + tex->total_nblocksy = MAX2(tex->total_nblocksy, y + nblocksy); + + /* Layout_below: step right after second mipmap level. + */ + if (level == 1) { + x += nblocksx; + } else { + y += nblocksy; + } + + width = u_minify(width, 1); + height = u_minify(height, 1); + nblocksx = align_nblocksx(pt->format, width, align_x); + nblocksy = align_nblocksy(pt->format, height, align_y); + } +} + +static void +i945_texture_layout_3d(struct i915_texture *tex) +{ + struct pipe_resource *pt = &tex->b.b; + unsigned width = pt->width0; + unsigned height = pt->height0; + unsigned depth = pt->depth0; + unsigned nblocksy = util_format_get_nblocksy(pt->format, pt->width0); + unsigned pack_x_pitch, pack_x_nr; + unsigned pack_y_pitch; + unsigned level; + + tex->stride = align(util_format_get_stride(pt->format, pt->width0), 4); + tex->total_nblocksy = 0; + + pack_y_pitch = MAX2(nblocksy, 2); + pack_x_pitch = tex->stride / util_format_get_blocksize(pt->format); + pack_x_nr = 1; + + for (level = 0; level <= pt->last_level; level++) { + int x = 0; + int y = 0; + unsigned q, j; + + i915_texture_set_level_info(tex, level, depth); + + for (q = 0; q < depth;) { + for (j = 0; j < pack_x_nr && q < depth; j++, q++) { + i915_texture_set_image_offset(tex, level, q, x, y + tex->total_nblocksy); + x += pack_x_pitch; + } + + x = 0; + y += pack_y_pitch; + } + + tex->total_nblocksy += y; + + if (pack_x_pitch > 4) { + pack_x_pitch >>= 1; + pack_x_nr <<= 1; + assert(pack_x_pitch * pack_x_nr * util_format_get_blocksize(pt->format) <= tex->stride); + } + + if (pack_y_pitch > 2) { + pack_y_pitch >>= 1; + } + + width = u_minify(width, 1); + height = u_minify(height, 1); + depth = u_minify(depth, 1); + nblocksy = util_format_get_nblocksy(pt->format, height); + } +} + +static void +i945_texture_layout_cube(struct i915_texture *tex) +{ + struct pipe_resource *pt = &tex->b.b; + const unsigned nblocks = util_format_get_nblocksx(pt->format, pt->width0); + const unsigned dim = pt->width0; + unsigned level; + unsigned face; + + assert(pt->width0 == pt->height0); /* cubemap images are square */ + assert(util_next_power_of_two(pt->width0) == pt->width0); /* npot only */ + assert(util_format_is_s3tc(pt->format)); /* compressed only */ + + /* + * Depending on the size of the largest images, pitch can be + * determined either by the old-style packing of cubemap faces, + * or the final row of 4x4, 2x2 and 1x1 faces below this. + * + * 64 * 2 / 4 = 32 + * 14 * 2 = 28 + */ + if (pt->width0 >= 64) + tex->stride = nblocks * 2 * util_format_get_blocksize(pt->format); + else + tex->stride = 14 * 2 * util_format_get_blocksize(pt->format); + + /* + * Something similary apply for height as well. + */ + if (pt->width0 >= 4) + tex->total_nblocksy = nblocks * 4 + 1; + else + tex->total_nblocksy = 1; + + /* Set all the levels to effectively occupy the whole rectangular region */ + for (level = 0; level <= pt->last_level; level++) + i915_texture_set_level_info(tex, level, 6); + + for (face = 0; face < 6; face++) { + /* all calculations in pixels */ + unsigned total_height = tex->total_nblocksy * 4; + unsigned x = initial_offsets[face][0] * dim; + unsigned y = initial_offsets[face][1] * dim; + unsigned d = dim; + + if (dim == 4 && face >= 4) { + x = (face - 4) * 8; + y = tex->total_nblocksy * 4 - 4; /* 4 = 1 block */ + } else if (dim < 4 && (face > 0)) { + x = face * 8; + y = total_height - 4; + } + + for (level = 0; level <= pt->last_level; level++) { + i915_texture_set_image_offset(tex, level, face, + util_format_get_nblocksx(pt->format, x), + util_format_get_nblocksy(pt->format, y)); + + d >>= 1; + + switch (d) { + case 4: + switch (face) { + case PIPE_TEX_FACE_POS_X: + case PIPE_TEX_FACE_NEG_X: + x += step_offsets[face][0] * d; + y += step_offsets[face][1] * d; + break; + case PIPE_TEX_FACE_POS_Y: + case PIPE_TEX_FACE_NEG_Y: + y += 12; + x -= 8; + break; + case PIPE_TEX_FACE_POS_Z: + case PIPE_TEX_FACE_NEG_Z: + y = total_height - 4; + x = (face - 4) * 8; + break; + } + break; + case 2: + y = total_height - 4; + x = bottom_offsets[face]; + break; + case 1: + x += 48; + break; + default: + x += step_offsets[face][0] * d; + y += step_offsets[face][1] * d; + break; + } + } + } +} + +static boolean +i945_texture_layout(struct i915_texture * tex) +{ + struct pipe_resource *pt = &tex->b.b; + + switch (pt->target) { + case PIPE_TEXTURE_1D: + case PIPE_TEXTURE_2D: + if (!i9x5_special_layout(tex)) + i945_texture_layout_2d(tex); + break; + case PIPE_TEXTURE_3D: + i945_texture_layout_3d(tex); + break; + case PIPE_TEXTURE_CUBE: + if (!util_format_is_s3tc(pt->format)) + i9x5_texture_layout_cube(tex); + else + i945_texture_layout_cube(tex); + break; + default: + assert(0); + return FALSE; + } + + return TRUE; +} + + + +/* + * Screen texture functions + */ + + + +static boolean +i915_texture_get_handle(struct pipe_screen * screen, + struct pipe_resource *texture, + struct winsys_handle *whandle) +{ + struct i915_screen *is = i915_screen(screen); + struct i915_texture *tex = i915_texture(texture); + struct i915_winsys *iws = is->iws; + + return iws->buffer_get_handle(iws, tex->buffer, whandle, tex->stride); +} + + +static void +i915_texture_destroy(struct pipe_screen *screen, + struct pipe_resource *pt) +{ + struct i915_texture *tex = i915_texture(pt); + struct i915_winsys *iws = i915_screen(screen)->iws; + uint i; + + iws->buffer_destroy(iws, tex->buffer); + + for (i = 0; i < Elements(tex->image_offset); i++) + if (tex->image_offset[i]) + FREE(tex->image_offset[i]); + + FREE(tex); +} + +static struct pipe_transfer * +i915_texture_get_transfer(struct pipe_context *context, + struct pipe_resource *resource, + struct pipe_subresource sr, + unsigned usage, + const struct pipe_box *box) +{ + struct i915_texture *tex = i915_texture(resource); + struct pipe_transfer *transfer = CALLOC_STRUCT(pipe_transfer); + if (transfer == NULL) + return NULL; + + transfer->resource = resource; + transfer->sr = sr; + transfer->usage = usage; + transfer->box = *box; + transfer->stride = tex->stride; + + return transfer; +} + + +static void * +i915_texture_transfer_map(struct pipe_context *pipe, + struct pipe_transfer *transfer) +{ + struct pipe_resource *resource = transfer->resource; + struct i915_texture *tex = i915_texture(resource); + struct i915_winsys *iws = i915_screen(pipe->screen)->iws; + struct pipe_subresource sr = transfer->sr; + struct pipe_box *box = &transfer->box; + enum pipe_format format = resource->format; + unsigned offset; + char *map; + + if (resource->target == PIPE_TEXTURE_CUBE) { + offset = tex->image_offset[sr.level][sr.face]; + } else if (resource->target == PIPE_TEXTURE_3D) { + offset = tex->image_offset[sr.level][box->z]; + } else { + offset = tex->image_offset[sr.level][0]; + assert(sr.face == 0); + assert(box->z == 0); + } + + map = iws->buffer_map(iws, tex->buffer, + (transfer->usage & PIPE_TRANSFER_WRITE) ? TRUE : FALSE); + if (map == NULL) + return NULL; + + return map + offset + + box->y / util_format_get_blockheight(format) * transfer->stride + + box->x / util_format_get_blockwidth(format) * util_format_get_blocksize(format); +} + +static void +i915_texture_transfer_unmap(struct pipe_context *pipe, + struct pipe_transfer *transfer) +{ + struct i915_texture *tex = i915_texture(transfer->resource); + struct i915_winsys *iws = i915_screen(tex->b.b.screen)->iws; + iws->buffer_unmap(iws, tex->buffer); +} + + + +struct u_resource_vtbl i915_texture_vtbl = +{ + i915_texture_get_handle, /* get_handle */ + i915_texture_destroy, /* resource_destroy */ + NULL, /* is_resource_referenced */ + i915_texture_get_transfer, /* get_transfer */ + u_default_transfer_destroy, /* transfer_destroy */ + i915_texture_transfer_map, /* transfer_map */ + u_default_transfer_flush_region, /* transfer_flush_region */ + i915_texture_transfer_unmap, /* transfer_unmap */ + u_default_transfer_inline_write /* transfer_inline_write */ +}; + + + + +struct pipe_resource * +i915_texture_create(struct pipe_screen *screen, + const struct pipe_resource *template) +{ + struct i915_screen *is = i915_screen(screen); + struct i915_winsys *iws = is->iws; + struct i915_texture *tex = CALLOC_STRUCT(i915_texture); + size_t tex_size; + unsigned buf_usage = 0; + + if (!tex) + return NULL; + + tex->b.b = *template; + tex->b.vtbl = &i915_texture_vtbl; + pipe_reference_init(&tex->b.b.reference, 1); + tex->b.b.screen = screen; + + if (is->is_i945) { + if (!i945_texture_layout(tex)) + goto fail; + } else { + if (!i915_texture_layout(tex)) + goto fail; + } + + tex_size = tex->stride * tex->total_nblocksy; + + /* for scanouts and cursors, cursors arn't scanouts */ + + /* XXX: use a custom flag for cursors, don't rely on magically + * guessing that this is Xorg asking for a cursor + */ + if ((template->bind & PIPE_BIND_SCANOUT) && template->width0 != 64) + buf_usage = I915_NEW_SCANOUT; + else + buf_usage = I915_NEW_TEXTURE; + + tex->buffer = iws->buffer_create(iws, tex_size, 64, buf_usage); + if (!tex->buffer) + goto fail; + + /* setup any hw fences */ + if (tex->hw_tiled) { + assert(tex->sw_tiled == I915_TILE_NONE); + iws->buffer_set_fence_reg(iws, tex->buffer, tex->stride, tex->hw_tiled); + } + + +#if 0 + void *ptr = ws->buffer_map(ws, tex->buffer, + PIPE_BUFFER_USAGE_CPU_WRITE); + memset(ptr, 0x80, tex_size); + ws->buffer_unmap(ws, tex->buffer); +#endif + +#if DEBUG_TEXTURES + debug_printf("%s: %p size %u, stride %u, blocks (%u, %u)\n", __func__, + tex, (unsigned int)tex_size, tex->stride, + tex->stride / util_format_get_blocksize(tex->b.b.format), + tex->total_nblocksy); +#endif + + return &tex->b.b; + +fail: + FREE(tex); + return NULL; +} + +struct pipe_resource * +i915_texture_from_handle(struct pipe_screen * screen, + const struct pipe_resource *template, + struct winsys_handle *whandle) +{ + struct i915_screen *is = i915_screen(screen); + struct i915_texture *tex; + struct i915_winsys *iws = is->iws; + struct i915_winsys_buffer *buffer; + unsigned stride; + + assert(screen); + + buffer = iws->buffer_from_handle(iws, whandle, &stride); + + /* Only supports one type */ + if (template->target != PIPE_TEXTURE_2D || + template->last_level != 0 || + template->depth0 != 1) { + return NULL; + } + + tex = CALLOC_STRUCT(i915_texture); + if (!tex) + return NULL; + + tex->b.b = *template; + tex->b.vtbl = &i915_texture_vtbl; + pipe_reference_init(&tex->b.b.reference, 1); + tex->b.b.screen = screen; + + tex->stride = stride; + + i915_texture_set_level_info(tex, 0, 1); + i915_texture_set_image_offset(tex, 0, 0, 0, 0); + + tex->buffer = buffer; + + return &tex->b.b; +} + diff --git a/src/gallium/drivers/i915/i915_screen.c b/src/gallium/drivers/i915/i915_screen.c index 72bd2635506..9086f9fc3b1 100644 --- a/src/gallium/drivers/i915/i915_screen.c +++ b/src/gallium/drivers/i915/i915_screen.c @@ -33,9 +33,9 @@ #include "i915_reg.h" #include "i915_context.h" #include "i915_screen.h" -#include "i915_buffer.h" -#include "i915_texture.h" -#include "intel_winsys.h" +#include "i915_surface.h" +#include "i915_resource.h" +#include "i915_winsys.h" /* @@ -116,11 +116,11 @@ i915_get_param(struct pipe_screen *screen, int param) case PIPE_CAP_TEXTURE_SHADOW_MAP: return 1; case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: - return 11; /* max 1024x1024 */ + return I915_MAX_TEXTURE_2D_LEVELS; case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: - return 8; /* max 128x128x128 */ + return I915_MAX_TEXTURE_3D_LEVELS; case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: - return 11; /* max 1024x1024 */ + return I915_MAX_TEXTURE_2D_LEVELS; case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: return 1; @@ -165,8 +165,12 @@ i915_is_format_supported(struct pipe_screen *screen, unsigned geom_flags) { static const enum pipe_format tex_supported[] = { - PIPE_FORMAT_A8B8G8R8_UNORM, PIPE_FORMAT_B8G8R8A8_UNORM, + PIPE_FORMAT_B8G8R8X8_UNORM, + PIPE_FORMAT_R8G8B8A8_UNORM, +#if 0 + PIPE_FORMAT_R8G8B8X8_UNORM, +#endif PIPE_FORMAT_B5G6R5_UNORM, PIPE_FORMAT_L8_UNORM, PIPE_FORMAT_A8_UNORM, @@ -174,19 +178,19 @@ i915_is_format_supported(struct pipe_screen *screen, PIPE_FORMAT_L8A8_UNORM, PIPE_FORMAT_UYVY, PIPE_FORMAT_YUYV, - PIPE_FORMAT_Z24S8_UNORM, + PIPE_FORMAT_Z24_UNORM_S8_USCALED, PIPE_FORMAT_NONE /* list terminator */ }; static const enum pipe_format surface_supported[] = { PIPE_FORMAT_B8G8R8A8_UNORM, PIPE_FORMAT_B5G6R5_UNORM, - PIPE_FORMAT_Z24S8_UNORM, + PIPE_FORMAT_Z24_UNORM_S8_USCALED, PIPE_FORMAT_NONE /* list terminator */ }; const enum pipe_format *list; uint i; - if(tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) + if(tex_usage & PIPE_BIND_RENDER_TARGET) list = surface_supported; else list = tex_supported; @@ -256,7 +260,7 @@ i915_destroy_screen(struct pipe_screen *screen) * Create a new i915_screen object */ struct pipe_screen * -i915_create_screen(struct intel_winsys *iws, uint pci_id) +i915_create_screen(struct i915_winsys *iws, uint pci_id) { struct i915_screen *is = CALLOC_STRUCT(i915_screen); @@ -304,8 +308,8 @@ i915_create_screen(struct intel_winsys *iws, uint pci_id) is->base.fence_signalled = i915_fence_signalled; is->base.fence_finish = i915_fence_finish; - i915_init_screen_texture_functions(is); - i915_init_screen_buffer_functions(is); + i915_init_screen_resource_functions(is); + i915_init_screen_surface_functions(is); return &is->base; } diff --git a/src/gallium/drivers/i915/i915_screen.h b/src/gallium/drivers/i915/i915_screen.h index 5126485caa7..7f9e02fc0f6 100644 --- a/src/gallium/drivers/i915/i915_screen.h +++ b/src/gallium/drivers/i915/i915_screen.h @@ -32,7 +32,7 @@ #include "pipe/p_screen.h" -struct intel_winsys; +struct i915_winsys; /** @@ -42,7 +42,7 @@ struct i915_screen { struct pipe_screen base; - struct intel_winsys *iws; + struct i915_winsys *iws; boolean is_i945; uint pci_id; diff --git a/src/gallium/drivers/i915/i915_state.c b/src/gallium/drivers/i915/i915_state.c index 62169918e2b..f883883852a 100644 --- a/src/gallium/drivers/i915/i915_state.c +++ b/src/gallium/drivers/i915/i915_state.c @@ -39,6 +39,7 @@ #include "i915_reg.h" #include "i915_state_inlines.h" #include "i915_fpc.h" +#include "i915_resource.h" /* The i915 (and related graphics cores) do not support GL_CLAMP. The * Intel drivers for "other operating systems" implement GL_CLAMP as @@ -523,10 +524,9 @@ static void i915_delete_vs_state(struct pipe_context *pipe, void *shader) static void i915_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_buffer *buf) + struct pipe_resource *buf) { struct i915_context *i915 = i915_context(pipe); - struct pipe_screen *screen = pipe->screen; draw_flush(i915->draw); assert(shader < PIPE_SHADER_TYPES); @@ -542,27 +542,23 @@ static void i915_set_constant_buffer(struct pipe_context *pipe, * N constants, leaving any extras from shader translation alone. */ if (buf) { - void *mapped; - if (buf->size && - (mapped = pipe_buffer_map(screen, buf, - PIPE_BUFFER_USAGE_CPU_READ))) { - memcpy(i915->current.constants[shader], mapped, buf->size); - pipe_buffer_unmap(screen, buf); - i915->current.num_user_constants[shader] - = buf->size / (4 * sizeof(float)); - } - else { - i915->current.num_user_constants[shader] = 0; - } + struct i915_buffer *ir = i915_buffer(buf); + memcpy(i915->current.constants[shader], ir->data, ir->b.b.width0); + i915->current.num_user_constants[shader] = (ir->b.b.width0 / + 4 * sizeof(float)); } + else { + i915->current.num_user_constants[shader] = 0; + } + i915->dirty |= I915_NEW_CONSTANTS; } -static void i915_set_sampler_textures(struct pipe_context *pipe, - unsigned num, - struct pipe_texture **texture) +static void i915_set_fragment_sampler_views(struct pipe_context *pipe, + unsigned num, + struct pipe_sampler_view **views) { struct i915_context *i915 = i915_context(pipe); uint i; @@ -570,27 +566,54 @@ static void i915_set_sampler_textures(struct pipe_context *pipe, assert(num <= PIPE_MAX_SAMPLERS); /* Check for no-op */ - if (num == i915->num_textures && - !memcmp(i915->texture, texture, num * sizeof(struct pipe_texture *))) + if (num == i915->num_fragment_sampler_views && + !memcmp(i915->fragment_sampler_views, views, num * sizeof(struct pipe_sampler_view *))) return; /* Fixes wrong texture in texobj with VBUF */ draw_flush(i915->draw); for (i = 0; i < num; i++) - pipe_texture_reference((struct pipe_texture **) &i915->texture[i], - texture[i]); + pipe_sampler_view_reference(&i915->fragment_sampler_views[i], + views[i]); - for (i = num; i < i915->num_textures; i++) - pipe_texture_reference((struct pipe_texture **) &i915->texture[i], - NULL); + for (i = num; i < i915->num_fragment_sampler_views; i++) + pipe_sampler_view_reference(&i915->fragment_sampler_views[i], + NULL); - i915->num_textures = num; + i915->num_fragment_sampler_views = num; - i915->dirty |= I915_NEW_TEXTURE; + i915->dirty |= I915_NEW_SAMPLER_VIEW; } +static struct pipe_sampler_view * +i915_create_sampler_view(struct pipe_context *pipe, + struct pipe_resource *texture, + const struct pipe_sampler_view *templ) +{ + struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view); + + if (view) { + *view = *templ; + view->reference.count = 1; + view->texture = NULL; + pipe_resource_reference(&view->texture, texture); + view->context = pipe; + } + + return view; +} + + +static void +i915_sampler_view_destroy(struct pipe_context *pipe, + struct pipe_sampler_view *view) +{ + pipe_resource_reference(&view->texture, NULL); + FREE(view); +} + static void i915_set_framebuffer_state(struct pipe_context *pipe, const struct pipe_framebuffer_state *fb) @@ -714,7 +737,8 @@ static void i915_bind_rasterizer_state( struct pipe_context *pipe, /* pass-through to draw module */ draw_set_rasterizer_state(i915->draw, - (i915->rasterizer ? i915->rasterizer->templ : NULL)); + (i915->rasterizer ? i915->rasterizer->templ : NULL), + raster); i915->dirty |= I915_NEW_RASTERIZER; } @@ -742,21 +766,45 @@ static void i915_set_vertex_buffers(struct pipe_context *pipe, draw_set_vertex_buffers(i915->draw, count, buffers); } -static void i915_set_vertex_elements(struct pipe_context *pipe, - unsigned count, - const struct pipe_vertex_element *elements) +static void * +i915_create_vertex_elements_state(struct pipe_context *pipe, + unsigned count, + const struct pipe_vertex_element *attribs) +{ + struct i915_velems_state *velems; + assert(count <= PIPE_MAX_ATTRIBS); + velems = (struct i915_velems_state *) MALLOC(sizeof(struct i915_velems_state)); + if (velems) { + velems->count = count; + memcpy(velems->velem, attribs, sizeof(*attribs) * count); + } + return velems; +} + +static void +i915_bind_vertex_elements_state(struct pipe_context *pipe, + void *velems) { struct i915_context *i915 = i915_context(pipe); + struct i915_velems_state *i915_velems = (struct i915_velems_state *) velems; + /* Because we change state before the draw_set_vertex_buffers call * we need a flush here, just to be sure. */ draw_flush(i915->draw); - i915->num_vertex_elements = count; /* pass-through to draw module */ - draw_set_vertex_elements(i915->draw, count, elements); + if (i915_velems) { + draw_set_vertex_elements(i915->draw, + i915_velems->count, i915_velems->velem); + } } +static void +i915_delete_vertex_elements_state(struct pipe_context *pipe, void *velems) +{ + FREE( velems ); +} void i915_init_state_functions( struct i915_context *i915 ) @@ -782,6 +830,9 @@ i915_init_state_functions( struct i915_context *i915 ) i915->base.create_vs_state = i915_create_vs_state; i915->base.bind_vs_state = i915_bind_vs_state; i915->base.delete_vs_state = i915_delete_vs_state; + i915->base.create_vertex_elements_state = i915_create_vertex_elements_state; + i915->base.bind_vertex_elements_state = i915_bind_vertex_elements_state; + i915->base.delete_vertex_elements_state = i915_delete_vertex_elements_state; i915->base.set_blend_color = i915_set_blend_color; i915->base.set_stencil_ref = i915_set_stencil_ref; @@ -791,8 +842,9 @@ i915_init_state_functions( struct i915_context *i915 ) i915->base.set_polygon_stipple = i915_set_polygon_stipple; i915->base.set_scissor_state = i915_set_scissor_state; - i915->base.set_fragment_sampler_textures = i915_set_sampler_textures; + i915->base.set_fragment_sampler_views = i915_set_fragment_sampler_views; + i915->base.create_sampler_view = i915_create_sampler_view; + i915->base.sampler_view_destroy = i915_sampler_view_destroy; i915->base.set_viewport_state = i915_set_viewport_state; i915->base.set_vertex_buffers = i915_set_vertex_buffers; - i915->base.set_vertex_elements = i915_set_vertex_elements; } diff --git a/src/gallium/drivers/i915/i915_state_derived.c b/src/gallium/drivers/i915/i915_state_derived.c index f5b0e9f011e..4da46772b5d 100644 --- a/src/gallium/drivers/i915/i915_state_derived.c +++ b/src/gallium/drivers/i915/i915_state_derived.c @@ -101,14 +101,14 @@ static void calculate_vertex_layout( struct i915_context *i915 ) /* primary color */ if (colors[0]) { src = draw_find_shader_output(i915->draw, TGSI_SEMANTIC_COLOR, 0); - draw_emit_vertex_attr(&vinfo, EMIT_4UB, colorInterp, src); + draw_emit_vertex_attr(&vinfo, EMIT_4UB_BGRA, colorInterp, src); vinfo.hwfmt[0] |= S4_VFMT_COLOR; } /* secondary color */ if (colors[1]) { src = draw_find_shader_output(i915->draw, TGSI_SEMANTIC_COLOR, 1); - draw_emit_vertex_attr(&vinfo, EMIT_4UB, colorInterp, src); + draw_emit_vertex_attr(&vinfo, EMIT_4UB_BGRA, colorInterp, src); vinfo.hwfmt[0] |= S4_VFMT_SPEC_FOG; } @@ -157,10 +157,10 @@ void i915_update_derived( struct i915_context *i915 ) if (i915->dirty & (I915_NEW_RASTERIZER | I915_NEW_FS | I915_NEW_VS)) calculate_vertex_layout( i915 ); - if (i915->dirty & (I915_NEW_SAMPLER | I915_NEW_TEXTURE)) + if (i915->dirty & (I915_NEW_SAMPLER | I915_NEW_SAMPLER_VIEW)) i915_update_samplers(i915); - if (i915->dirty & I915_NEW_TEXTURE) + if (i915->dirty & I915_NEW_SAMPLER_VIEW) i915_update_textures(i915); if (i915->dirty) diff --git a/src/gallium/drivers/i915/i915_state_emit.c b/src/gallium/drivers/i915/i915_state_emit.c index 51f0ef12baf..4d069fffa85 100644 --- a/src/gallium/drivers/i915/i915_state_emit.c +++ b/src/gallium/drivers/i915/i915_state_emit.c @@ -30,6 +30,7 @@ #include "i915_context.h" #include "i915_batch.h" #include "i915_reg.h" +#include "i915_resource.h" #include "pipe/p_context.h" #include "pipe/p_defines.h" @@ -50,7 +51,7 @@ static unsigned translate_format( enum pipe_format format ) static unsigned translate_depth_format( enum pipe_format zformat ) { switch (zformat) { - case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: return DEPTH_FRMT_24_FIXED_8_OTHER; case PIPE_FORMAT_Z16_UNORM: return DEPTH_FRMT_16_FIXED; @@ -182,7 +183,7 @@ i915_emit_hardware_state(struct i915_context *i915 ) if(i915->vbo) OUT_RELOC(i915->vbo, - INTEL_USAGE_VERTEX, + I915_USAGE_VERTEX, i915->current.immediate[I915_IMMEDIATE_S0]); else /* FIXME: we should not do this */ @@ -211,8 +212,7 @@ i915_emit_hardware_state(struct i915_context *i915 ) if (cbuf_surface) { unsigned ctile = BUF_3D_USE_FENCE; - struct i915_texture *tex = (struct i915_texture *) - cbuf_surface->texture; + struct i915_texture *tex = i915_texture(cbuf_surface->texture); assert(tex); if (tex && tex->sw_tiled) { @@ -226,7 +226,7 @@ i915_emit_hardware_state(struct i915_context *i915 ) ctile); OUT_RELOC(tex->buffer, - INTEL_USAGE_RENDER, + I915_USAGE_RENDER, cbuf_surface->offset); } @@ -234,8 +234,7 @@ i915_emit_hardware_state(struct i915_context *i915 ) */ if (depth_surface) { unsigned ztile = BUF_3D_USE_FENCE; - struct i915_texture *tex = (struct i915_texture *) - depth_surface->texture; + struct i915_texture *tex = i915_texture(depth_surface->texture); assert(tex); if (tex && tex->sw_tiled) { @@ -250,7 +249,7 @@ i915_emit_hardware_state(struct i915_context *i915 ) ztile); OUT_RELOC(tex->buffer, - INTEL_USAGE_RENDER, + I915_USAGE_RENDER, depth_surface->offset); } @@ -290,13 +289,14 @@ i915_emit_hardware_state(struct i915_context *i915 ) OUT_BATCH(enabled); for (unit = 0; unit < I915_TEX_UNITS; unit++) { if (enabled & (1 << unit)) { - struct intel_buffer *buf = i915->texture[unit]->buffer; + struct i915_texture *texture = i915_texture(i915->fragment_sampler_views[unit]->texture); + struct i915_winsys_buffer *buf = texture->buffer; uint offset = 0; assert(buf); count++; - OUT_RELOC(buf, INTEL_USAGE_SAMPLER, offset); + OUT_RELOC(buf, I915_USAGE_SAMPLER, offset); OUT_BATCH(i915->current.texbuffer[unit][0]); /* MS3 */ OUT_BATCH(i915->current.texbuffer[unit][1]); /* MS4 */ } diff --git a/src/gallium/drivers/i915/i915_state_immediate.c b/src/gallium/drivers/i915/i915_state_immediate.c index d2c6f151434..8cec699285c 100644 --- a/src/gallium/drivers/i915/i915_state_immediate.c +++ b/src/gallium/drivers/i915/i915_state_immediate.c @@ -52,11 +52,11 @@ static void upload_S0S1(struct i915_context *i915) { unsigned LIS0, LIS1; - /* INTEL_NEW_VBO */ + /* I915_NEW_VBO */ /* TODO: re-use vertex buffers here? */ LIS0 = i915->vbo_offset; - /* INTEL_NEW_VERTEX_SIZE -- do this where the vertex size is calculated! + /* I915_NEW_VERTEX_SIZE -- do this where the vertex size is calculated! */ { unsigned vertex_size = i915->current.vertex_info.size; @@ -65,7 +65,7 @@ static void upload_S0S1(struct i915_context *i915) (vertex_size << 16)); } - /* INTEL_NEW_VBO */ + /* I915_NEW_VBO */ /* TODO: use a vertex generation number to track vbo changes */ if (1 || i915->current.immediate[I915_IMMEDIATE_S0] != LIS0 || diff --git a/src/gallium/drivers/i915/i915_state_sampler.c b/src/gallium/drivers/i915/i915_state_sampler.c index 9813290b51b..73e61b66240 100644 --- a/src/gallium/drivers/i915/i915_state_sampler.c +++ b/src/gallium/drivers/i915/i915_state_sampler.c @@ -32,6 +32,7 @@ #include "i915_context.h" #include "i915_reg.h" #include "i915_state.h" +#include "i915_resource.h" /* @@ -77,7 +78,7 @@ static void update_sampler(struct i915_context *i915, const struct i915_texture *tex, unsigned state[3] ) { - const struct pipe_texture *pt = &tex->base; + const struct pipe_resource *pt = &tex->b.b; unsigned minlod, lastlod; /* Need to do this after updating the maps, which call the @@ -144,20 +145,22 @@ void i915_update_samplers( struct i915_context *i915 ) i915->current.sampler_enable_nr = 0; i915->current.sampler_enable_flags = 0x0; - for (unit = 0; unit < i915->num_textures && unit < i915->num_samplers; + for (unit = 0; unit < i915->num_fragment_sampler_views && unit < i915->num_samplers; unit++) { /* determine unit enable/disable by looking for a bound texture */ /* could also examine the fragment program? */ - if (i915->texture[unit]) { + if (i915->fragment_sampler_views[unit]) { + struct i915_texture *texture = i915_texture(i915->fragment_sampler_views[unit]->texture); + update_sampler( i915, unit, i915->sampler[unit], /* sampler state */ - i915->texture[unit], /* texture */ + texture, /* texture */ i915->current.sampler[unit] /* the result */ ); i915_update_texture( i915, unit, - i915->texture[unit], /* texture */ + texture, /* texture */ i915->sampler[unit], /* sampler state */ i915->current.texbuffer[unit] ); @@ -190,6 +193,14 @@ translate_texture_format(enum pipe_format pipeFormat) return MAPSURF_16BIT | MT_16BIT_ARGB4444; case PIPE_FORMAT_B8G8R8A8_UNORM: return MAPSURF_32BIT | MT_32BIT_ARGB8888; + case PIPE_FORMAT_B8G8R8X8_UNORM: + return MAPSURF_32BIT | MT_32BIT_XRGB8888; + case PIPE_FORMAT_R8G8B8A8_UNORM: + return MAPSURF_32BIT | MT_32BIT_ABGR8888; +#if 0 + case PIPE_FORMAT_R8G8B8X8_UNORM: + return MAPSURF_32BIT | MT_32BIT_XBGR8888; +#endif case PIPE_FORMAT_YUYV: return (MAPSURF_422 | MT_422_YCRCB_NORMAL); case PIPE_FORMAT_UYVY: @@ -210,7 +221,7 @@ translate_texture_format(enum pipe_format pipeFormat) case PIPE_FORMAT_RGBA_DXT5: return (MAPSURF_COMPRESSED | MT_COMPRESS_DXT4_5); #endif - case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: return (MAPSURF_32BIT | MT_32BIT_xI824); default: debug_printf("i915: translate_texture_format() bad image format %x\n", @@ -228,7 +239,7 @@ i915_update_texture(struct i915_context *i915, const struct i915_sampler_state *sampler, uint state[6]) { - const struct pipe_texture *pt = &tex->base; + const struct pipe_resource *pt = &tex->b.b; uint format, pitch; const uint width = pt->width0, height = pt->height0, depth = pt->depth0; const uint num_levels = pt->last_level; @@ -281,14 +292,16 @@ i915_update_textures(struct i915_context *i915) { uint unit; - for (unit = 0; unit < i915->num_textures && unit < i915->num_samplers; + for (unit = 0; unit < i915->num_fragment_sampler_views && unit < i915->num_samplers; unit++) { /* determine unit enable/disable by looking for a bound texture */ /* could also examine the fragment program? */ - if (i915->texture[unit]) { + if (i915->fragment_sampler_views[unit]) { + struct i915_texture *texture = i915_texture(i915->fragment_sampler_views[unit]->texture); + i915_update_texture( i915, unit, - i915->texture[unit], /* texture */ + texture, /* texture */ i915->sampler[unit], /* sampler state */ i915->current.texbuffer[unit] ); } diff --git a/src/gallium/drivers/i915/i915_surface.c b/src/gallium/drivers/i915/i915_surface.c index 1ff6b9f4c63..453437b8090 100644 --- a/src/gallium/drivers/i915/i915_surface.c +++ b/src/gallium/drivers/i915/i915_surface.c @@ -25,10 +25,15 @@ * **************************************************************************/ -#include "i915_context.h" +#include "i915_surface.h" +#include "i915_resource.h" #include "i915_blit.h" +#include "i915_screen.h" #include "pipe/p_defines.h" +#include "util/u_inlines.h" +#include "util/u_math.h" #include "util/u_format.h" +#include "util/u_memory.h" /* Assumes all values are within bounds -- no checking at this level - @@ -41,10 +46,10 @@ i915_surface_copy(struct pipe_context *pipe, struct pipe_surface *src, unsigned srcx, unsigned srcy, unsigned width, unsigned height) { - struct i915_texture *dst_tex = (struct i915_texture *)dst->texture; - struct i915_texture *src_tex = (struct i915_texture *)src->texture; - struct pipe_texture *dpt = &dst_tex->base; - struct pipe_texture *spt = &src_tex->base; + struct i915_texture *dst_tex = i915_texture(dst->texture); + struct i915_texture *src_tex = i915_texture(src->texture); + struct pipe_resource *dpt = &dst_tex->b.b; + struct pipe_resource *spt = &src_tex->b.b; assert( dst != src ); assert( util_format_get_blocksize(dpt->format) == util_format_get_blocksize(spt->format) ); @@ -68,8 +73,8 @@ i915_surface_fill(struct pipe_context *pipe, unsigned dstx, unsigned dsty, unsigned width, unsigned height, unsigned value) { - struct i915_texture *tex = (struct i915_texture *)dst->texture; - struct pipe_texture *pt = &tex->base; + struct i915_texture *tex = i915_texture(dst->texture); + struct pipe_resource *pt = &tex->b.b; assert(util_format_get_blockwidth(pt->format) == 1); assert(util_format_get_blockheight(pt->format) == 1); @@ -84,9 +89,68 @@ i915_surface_fill(struct pipe_context *pipe, } +/* + * Screen surface functions + */ + + +static struct pipe_surface * +i915_get_tex_surface(struct pipe_screen *screen, + struct pipe_resource *pt, + unsigned face, unsigned level, unsigned zslice, + unsigned flags) +{ + struct i915_texture *tex = i915_texture(pt); + struct pipe_surface *ps; + unsigned offset; /* in bytes */ + + if (pt->target == PIPE_TEXTURE_CUBE) { + offset = tex->image_offset[level][face]; + } + else if (pt->target == PIPE_TEXTURE_3D) { + offset = tex->image_offset[level][zslice]; + } + else { + offset = tex->image_offset[level][0]; + assert(face == 0); + assert(zslice == 0); + } + + ps = CALLOC_STRUCT(pipe_surface); + if (ps) { + pipe_reference_init(&ps->reference, 1); + pipe_resource_reference(&ps->texture, pt); + ps->format = pt->format; + ps->width = u_minify(pt->width0, level); + ps->height = u_minify(pt->height0, level); + ps->offset = offset; + ps->usage = flags; + } + return ps; +} + +static void +i915_tex_surface_destroy(struct pipe_surface *surf) +{ + pipe_resource_reference(&surf->texture, NULL); + FREE(surf); +} + + +/* Probably going to make blits work on textures rather than surfaces. + */ void i915_init_surface_functions(struct i915_context *i915) { i915->base.surface_copy = i915_surface_copy; i915->base.surface_fill = i915_surface_fill; } + +/* No good reason for these to be in the screen. + */ +void +i915_init_screen_surface_functions(struct i915_screen *is) +{ + is->base.get_tex_surface = i915_get_tex_surface; + is->base.tex_surface_destroy = i915_tex_surface_destroy; +} diff --git a/src/gallium/drivers/i915/i915_texture.h b/src/gallium/drivers/i915/i915_surface.h index 51a1dd984c8..448106d5662 100644 --- a/src/gallium/drivers/i915/i915_texture.h +++ b/src/gallium/drivers/i915/i915_surface.h @@ -25,12 +25,14 @@ * **************************************************************************/ -#ifndef I915_TEXTURE_H -#define I915_TEXTURE_H +#ifndef I915_SURFACE_H +#define I915_SURFACE_H +struct i915_context; struct i915_screen; -extern void -i915_init_screen_texture_functions(struct i915_screen *is); +void i915_init_surface_functions( struct i915_context *i915 ); +void i915_init_screen_surface_functions( struct i915_screen *is ); -#endif /* I915_TEXTURE_H */ + +#endif /* I915_SCREEN_H */ diff --git a/src/gallium/drivers/i915/i915_texture.c b/src/gallium/drivers/i915/i915_texture.c deleted file mode 100644 index 7ba222c78b7..00000000000 --- a/src/gallium/drivers/i915/i915_texture.c +++ /dev/null @@ -1,930 +0,0 @@ -/************************************************************************** - * - * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - /* - * Authors: - * Keith Whitwell <[email protected]> - * Michel Dänzer <[email protected]> - */ - -#include "pipe/p_state.h" -#include "pipe/p_context.h" -#include "pipe/p_defines.h" -#include "util/u_inlines.h" -#include "util/u_format.h" -#include "util/u_math.h" -#include "util/u_memory.h" - -#include "i915_context.h" -#include "i915_texture.h" -#include "i915_screen.h" -#include "intel_winsys.h" - - -/* - * Helper function and arrays - */ - - -/** - * Initial offset for Cube map. - */ -static const int initial_offsets[6][2] = { - {0, 0}, - {0, 2}, - {1, 0}, - {1, 2}, - {1, 1}, - {1, 3} -}; - -/** - * Step offsets for Cube map. - */ -static const int step_offsets[6][2] = { - {0, 2}, - {0, 2}, - {-1, 2}, - {-1, 2}, - {-1, 1}, - {-1, 1} -}; - -/* XXX really need twice the size if x is already pot? - Otherwise just use util_next_power_of_two? -*/ -static unsigned -power_of_two(unsigned x) -{ - unsigned value = 1; - while (value < x) - value = value << 1; - return value; -} - -/* - * More advanced helper funcs - */ - - -static void -i915_miptree_set_level_info(struct i915_texture *tex, - unsigned level, - unsigned nr_images, - unsigned w, unsigned h, unsigned d) -{ - assert(level < PIPE_MAX_TEXTURE_LEVELS); - - tex->nr_images[level] = nr_images; - - /* - DBG("%s level %d size: %d,%d,%d offset %d,%d (0x%x)\n", __FUNCTION__, - level, w, h, d, x, y, tex->level_offset[level]); - */ - - /* Not sure when this would happen, but anyway: - */ - if (tex->image_offset[level]) { - FREE(tex->image_offset[level]); - tex->image_offset[level] = NULL; - } - - assert(nr_images); - assert(!tex->image_offset[level]); - - tex->image_offset[level] = (unsigned *) MALLOC(nr_images * sizeof(unsigned)); - tex->image_offset[level][0] = 0; -} - -static void -i915_miptree_set_image_offset(struct i915_texture *tex, - unsigned level, unsigned img, unsigned x, unsigned y) -{ - if (img == 0 && level == 0) - assert(x == 0 && y == 0); - - assert(img < tex->nr_images[level]); - - tex->image_offset[level][img] = y * tex->stride + x * util_format_get_blocksize(tex->base.format); - - /* - printf("%s level %d img %d pos %d,%d image_offset %x\n", - __FUNCTION__, level, img, x, y, tex->image_offset[level][img]); - */ -} - - -/* - * i915 layout functions, some used by i945 - */ - - -/** - * Special case to deal with scanout textures. - */ -static boolean -i915_scanout_layout(struct i915_texture *tex) -{ - struct pipe_texture *pt = &tex->base; - - if (pt->last_level > 0 || util_format_get_blocksize(pt->format) != 4) - return FALSE; - - i915_miptree_set_level_info(tex, 0, 1, - pt->width0, - pt->height0, - 1); - i915_miptree_set_image_offset(tex, 0, 0, 0, 0); - - if (pt->width0 >= 240) { - tex->stride = power_of_two(util_format_get_stride(pt->format, pt->width0)); - tex->total_nblocksy = align(util_format_get_nblocksy(pt->format, pt->height0), 8); - tex->hw_tiled = INTEL_TILE_X; - } else if (pt->width0 == 64 && pt->height0 == 64) { - tex->stride = power_of_two(util_format_get_stride(pt->format, pt->width0)); - tex->total_nblocksy = align(util_format_get_nblocksy(pt->format, pt->height0), 8); - } else { - return FALSE; - } - - debug_printf("%s size: %d,%d,%d offset %d,%d (0x%x)\n", __FUNCTION__, - pt->width0, pt->height0, util_format_get_blocksize(pt->format), - tex->stride, tex->total_nblocksy, tex->stride * tex->total_nblocksy); - - return TRUE; -} - -/** - * Special case to deal with shared textures. - */ -static boolean -i915_display_target_layout(struct i915_texture *tex) -{ - struct pipe_texture *pt = &tex->base; - - if (pt->last_level > 0 || util_format_get_blocksize(pt->format) != 4) - return FALSE; - - /* fallback to normal textures for small textures */ - if (pt->width0 < 240) - return FALSE; - - i915_miptree_set_level_info(tex, 0, 1, - pt->width0, - pt->height0, - 1); - i915_miptree_set_image_offset(tex, 0, 0, 0, 0); - - tex->stride = power_of_two(util_format_get_stride(pt->format, pt->width0)); - tex->total_nblocksy = align(util_format_get_nblocksy(pt->format, pt->height0), 8); - tex->hw_tiled = INTEL_TILE_X; - - debug_printf("%s size: %d,%d,%d offset %d,%d (0x%x)\n", __FUNCTION__, - pt->width0, pt->height0, util_format_get_blocksize(pt->format), - tex->stride, tex->total_nblocksy, tex->stride * tex->total_nblocksy); - - return TRUE; -} - -static void -i915_miptree_layout_2d(struct i915_texture *tex) -{ - struct pipe_texture *pt = &tex->base; - unsigned level; - unsigned width = pt->width0; - unsigned height = pt->height0; - unsigned nblocksy = util_format_get_nblocksy(pt->format, pt->width0); - - /* used for scanouts that need special layouts */ - if (pt->tex_usage & PIPE_TEXTURE_USAGE_PRIMARY) - if (i915_scanout_layout(tex)) - return; - - /* for shared buffers we use something very like scanout */ - if (pt->tex_usage & PIPE_TEXTURE_USAGE_DISPLAY_TARGET) - if (i915_display_target_layout(tex)) - return; - - tex->stride = align(util_format_get_stride(pt->format, pt->width0), 4); - tex->total_nblocksy = 0; - - for (level = 0; level <= pt->last_level; level++) { - i915_miptree_set_level_info(tex, level, 1, width, height, 1); - i915_miptree_set_image_offset(tex, level, 0, 0, tex->total_nblocksy); - - nblocksy = align(MAX2(2, nblocksy), 2); - - tex->total_nblocksy += nblocksy; - - width = u_minify(width, 1); - height = u_minify(height, 1); - nblocksy = util_format_get_nblocksy(pt->format, height); - } -} - -static void -i915_miptree_layout_3d(struct i915_texture *tex) -{ - struct pipe_texture *pt = &tex->base; - unsigned level; - - unsigned width = pt->width0; - unsigned height = pt->height0; - unsigned depth = pt->depth0; - unsigned nblocksy = util_format_get_nblocksy(pt->format, pt->height0); - unsigned stack_nblocksy = 0; - - /* Calculate the size of a single slice. - */ - tex->stride = align(util_format_get_stride(pt->format, pt->width0), 4); - - /* XXX: hardware expects/requires 9 levels at minimum. - */ - for (level = 0; level <= MAX2(8, pt->last_level); level++) { - i915_miptree_set_level_info(tex, level, depth, width, height, depth); - - stack_nblocksy += MAX2(2, nblocksy); - - width = u_minify(width, 1); - height = u_minify(height, 1); - nblocksy = util_format_get_nblocksy(pt->format, height); - } - - /* Fixup depth image_offsets: - */ - for (level = 0; level <= pt->last_level; level++) { - unsigned i; - for (i = 0; i < depth; i++) - i915_miptree_set_image_offset(tex, level, i, 0, i * stack_nblocksy); - - depth = u_minify(depth, 1); - } - - /* Multiply slice size by texture depth for total size. It's - * remarkable how wasteful of memory the i915 texture layouts - * are. They are largely fixed in the i945. - */ - tex->total_nblocksy = stack_nblocksy * pt->depth0; -} - -static void -i915_miptree_layout_cube(struct i915_texture *tex) -{ - struct pipe_texture *pt = &tex->base; - unsigned width = pt->width0, height = pt->height0; - const unsigned nblocks = util_format_get_nblocksx(pt->format, pt->width0); - unsigned level; - unsigned face; - - assert(width == height); /* cubemap images are square */ - - /* double pitch for cube layouts */ - tex->stride = align(nblocks * util_format_get_blocksize(pt->format) * 2, 4); - tex->total_nblocksy = nblocks * 4; - - for (level = 0; level <= pt->last_level; level++) { - i915_miptree_set_level_info(tex, level, 6, width, height, 1); - width /= 2; - height /= 2; - } - - for (face = 0; face < 6; face++) { - unsigned x = initial_offsets[face][0] * nblocks; - unsigned y = initial_offsets[face][1] * nblocks; - unsigned d = nblocks; - - for (level = 0; level <= pt->last_level; level++) { - i915_miptree_set_image_offset(tex, level, face, x, y); - d >>= 1; - x += step_offsets[face][0] * d; - y += step_offsets[face][1] * d; - } - } -} - -static boolean -i915_miptree_layout(struct i915_texture * tex) -{ - struct pipe_texture *pt = &tex->base; - - switch (pt->target) { - case PIPE_TEXTURE_1D: - case PIPE_TEXTURE_2D: - i915_miptree_layout_2d(tex); - break; - case PIPE_TEXTURE_3D: - i915_miptree_layout_3d(tex); - break; - case PIPE_TEXTURE_CUBE: - i915_miptree_layout_cube(tex); - break; - default: - assert(0); - return FALSE; - } - - return TRUE; -} - - -/* - * i945 layout functions - */ - - -static void -i945_miptree_layout_2d(struct i915_texture *tex) -{ - struct pipe_texture *pt = &tex->base; - const int align_x = 2, align_y = 4; - unsigned level; - unsigned x = 0; - unsigned y = 0; - unsigned width = pt->width0; - unsigned height = pt->height0; - unsigned nblocksx = util_format_get_nblocksx(pt->format, pt->width0); - unsigned nblocksy = util_format_get_nblocksy(pt->format, pt->height0); - - /* used for scanouts that need special layouts */ - if (tex->base.tex_usage & PIPE_TEXTURE_USAGE_PRIMARY) - if (i915_scanout_layout(tex)) - return; - - /* for shared buffers we use some very like scanout */ - if (tex->base.tex_usage & PIPE_TEXTURE_USAGE_DISPLAY_TARGET) - if (i915_display_target_layout(tex)) - return; - - tex->stride = align(util_format_get_stride(pt->format, pt->width0), 4); - - /* May need to adjust pitch to accomodate the placement of - * the 2nd mipmap level. This occurs when the alignment - * constraints of mipmap placement push the right edge of the - * 2nd mipmap level out past the width of its parent. - */ - if (pt->last_level > 0) { - unsigned mip1_nblocksx - = align(util_format_get_nblocksx(pt->format, u_minify(width, 1)), align_x) - + util_format_get_nblocksx(pt->format, u_minify(width, 2)); - - if (mip1_nblocksx > nblocksx) - tex->stride = mip1_nblocksx * util_format_get_blocksize(pt->format); - } - - /* Pitch must be a whole number of dwords - */ - tex->stride = align(tex->stride, 64); - tex->total_nblocksy = 0; - - for (level = 0; level <= pt->last_level; level++) { - i915_miptree_set_level_info(tex, level, 1, width, height, 1); - i915_miptree_set_image_offset(tex, level, 0, x, y); - - nblocksy = align(nblocksy, align_y); - - /* Because the images are packed better, the final offset - * might not be the maximal one: - */ - tex->total_nblocksy = MAX2(tex->total_nblocksy, y + nblocksy); - - /* Layout_below: step right after second mipmap level. - */ - if (level == 1) { - x += align(nblocksx, align_x); - } - else { - y += nblocksy; - } - - width = u_minify(width, 1); - height = u_minify(height, 1); - nblocksx = util_format_get_nblocksx(pt->format, width); - nblocksy = util_format_get_nblocksy(pt->format, height); - } -} - -static void -i945_miptree_layout_3d(struct i915_texture *tex) -{ - struct pipe_texture *pt = &tex->base; - unsigned width = pt->width0; - unsigned height = pt->height0; - unsigned depth = pt->depth0; - unsigned nblocksy = util_format_get_nblocksy(pt->format, pt->width0); - unsigned pack_x_pitch, pack_x_nr; - unsigned pack_y_pitch; - unsigned level; - - tex->stride = align(util_format_get_stride(pt->format, pt->width0), 4); - tex->total_nblocksy = 0; - - pack_y_pitch = MAX2(nblocksy, 2); - pack_x_pitch = tex->stride / util_format_get_blocksize(pt->format); - pack_x_nr = 1; - - for (level = 0; level <= pt->last_level; level++) { - int x = 0; - int y = 0; - unsigned q, j; - - i915_miptree_set_level_info(tex, level, depth, width, height, depth); - - for (q = 0; q < depth;) { - for (j = 0; j < pack_x_nr && q < depth; j++, q++) { - i915_miptree_set_image_offset(tex, level, q, x, y + tex->total_nblocksy); - x += pack_x_pitch; - } - - x = 0; - y += pack_y_pitch; - } - - tex->total_nblocksy += y; - - if (pack_x_pitch > 4) { - pack_x_pitch >>= 1; - pack_x_nr <<= 1; - assert(pack_x_pitch * pack_x_nr * util_format_get_blocksize(pt->format) <= tex->stride); - } - - if (pack_y_pitch > 2) { - pack_y_pitch >>= 1; - } - - width = u_minify(width, 1); - height = u_minify(height, 1); - depth = u_minify(depth, 1); - nblocksy = util_format_get_nblocksy(pt->format, height); - } -} - -static void -i945_miptree_layout_cube(struct i915_texture *tex) -{ - struct pipe_texture *pt = &tex->base; - unsigned level; - - const unsigned nblocks = util_format_get_nblocksx(pt->format, pt->width0); - unsigned face; - unsigned width = pt->width0; - unsigned height = pt->height0; - - /* - printf("%s %i, %i\n", __FUNCTION__, pt->width0, pt->height0); - */ - - assert(width == height); /* cubemap images are square */ - - /* - * XXX Should only be used for compressed formats. But lets - * keep this code active just in case. - * - * Depending on the size of the largest images, pitch can be - * determined either by the old-style packing of cubemap faces, - * or the final row of 4x4, 2x2 and 1x1 faces below this. - */ - if (nblocks > 32) - tex->stride = align(nblocks * util_format_get_blocksize(pt->format) * 2, 4); - else - tex->stride = 14 * 8 * util_format_get_blocksize(pt->format); - - tex->total_nblocksy = nblocks * 4; - - /* Set all the levels to effectively occupy the whole rectangular region. - */ - for (level = 0; level <= pt->last_level; level++) { - i915_miptree_set_level_info(tex, level, 6, width, height, 1); - width /= 2; - height /= 2; - } - - for (face = 0; face < 6; face++) { - unsigned x = initial_offsets[face][0] * nblocks; - unsigned y = initial_offsets[face][1] * nblocks; - unsigned d = nblocks; - -#if 0 /* Fix and enable this code for compressed formats */ - if (nblocks == 4 && face >= 4) { - y = tex->total_height - 4; - x = (face - 4) * 8; - } - else if (nblocks < 4 && (face > 0)) { - y = tex->total_height - 4; - x = face * 8; - } -#endif - - for (level = 0; level <= pt->last_level; level++) { - i915_miptree_set_image_offset(tex, level, face, x, y); - - d >>= 1; - -#if 0 /* Fix and enable this code for compressed formats */ - switch (d) { - case 4: - switch (face) { - case PIPE_TEX_FACE_POS_X: - case PIPE_TEX_FACE_NEG_X: - x += step_offsets[face][0] * d; - y += step_offsets[face][1] * d; - break; - case PIPE_TEX_FACE_POS_Y: - case PIPE_TEX_FACE_NEG_Y: - y += 12; - x -= 8; - break; - case PIPE_TEX_FACE_POS_Z: - case PIPE_TEX_FACE_NEG_Z: - y = tex->total_height - 4; - x = (face - 4) * 8; - break; - } - case 2: - y = tex->total_height - 4; - x = 16 + face * 8; - break; - - case 1: - x += 48; - break; - default: -#endif - x += step_offsets[face][0] * d; - y += step_offsets[face][1] * d; -#if 0 - break; - } -#endif - } - } -} - -static boolean -i945_miptree_layout(struct i915_texture * tex) -{ - struct pipe_texture *pt = &tex->base; - - switch (pt->target) { - case PIPE_TEXTURE_1D: - case PIPE_TEXTURE_2D: - i945_miptree_layout_2d(tex); - break; - case PIPE_TEXTURE_3D: - i945_miptree_layout_3d(tex); - break; - case PIPE_TEXTURE_CUBE: - i945_miptree_layout_cube(tex); - break; - default: - assert(0); - return FALSE; - } - - return TRUE; -} - - -/* - * Screen texture functions - */ - - -static struct pipe_texture * -i915_texture_create(struct pipe_screen *screen, - const struct pipe_texture *templat) -{ - struct i915_screen *is = i915_screen(screen); - struct intel_winsys *iws = is->iws; - struct i915_texture *tex = CALLOC_STRUCT(i915_texture); - size_t tex_size; - unsigned buf_usage = 0; - - if (!tex) - return NULL; - - tex->base = *templat; - pipe_reference_init(&tex->base.reference, 1); - tex->base.screen = screen; - - if (is->is_i945) { - if (!i945_miptree_layout(tex)) - goto fail; - } else { - if (!i915_miptree_layout(tex)) - goto fail; - } - - tex_size = tex->stride * tex->total_nblocksy; - - - - /* for scanouts and cursors, cursors arn't scanouts */ - if (templat->tex_usage & PIPE_TEXTURE_USAGE_PRIMARY && templat->width0 != 64) - buf_usage = INTEL_NEW_SCANOUT; - else - buf_usage = INTEL_NEW_TEXTURE; - - tex->buffer = iws->buffer_create(iws, tex_size, 64, buf_usage); - if (!tex->buffer) - goto fail; - - /* setup any hw fences */ - if (tex->hw_tiled) { - assert(tex->sw_tiled == INTEL_TILE_NONE); - iws->buffer_set_fence_reg(iws, tex->buffer, tex->stride, tex->hw_tiled); - } - - -#if 0 - void *ptr = ws->buffer_map(ws, tex->buffer, - PIPE_BUFFER_USAGE_CPU_WRITE); - memset(ptr, 0x80, tex_size); - ws->buffer_unmap(ws, tex->buffer); -#endif - - return &tex->base; - -fail: - FREE(tex); - return NULL; -} - -static struct pipe_texture * -i915_texture_blanket(struct pipe_screen * screen, - const struct pipe_texture *base, - const unsigned *stride, - struct pipe_buffer *buffer) -{ -#if 0 - struct i915_texture *tex; - assert(screen); - - /* Only supports one type */ - if (base->target != PIPE_TEXTURE_2D || - base->last_level != 0 || - base->depth0 != 1) { - return NULL; - } - - tex = CALLOC_STRUCT(i915_texture); - if (!tex) - return NULL; - - tex->base = *base; - pipe_reference_init(&tex->base.reference, 1); - tex->base.screen = screen; - - tex->stride = stride[0]; - - i915_miptree_set_level_info(tex, 0, 1, base->width0, base->height0, 1); - i915_miptree_set_image_offset(tex, 0, 0, 0, 0); - - pipe_buffer_reference(&tex->buffer, buffer); - - return &tex->base; -#else - return NULL; -#endif -} - -static void -i915_texture_destroy(struct pipe_texture *pt) -{ - struct i915_texture *tex = (struct i915_texture *)pt; - struct intel_winsys *iws = i915_screen(pt->screen)->iws; - uint i; - - /* - DBG("%s deleting %p\n", __FUNCTION__, (void *) tex); - */ - - iws->buffer_destroy(iws, tex->buffer); - - for (i = 0; i < PIPE_MAX_TEXTURE_LEVELS; i++) - if (tex->image_offset[i]) - FREE(tex->image_offset[i]); - - FREE(tex); -} - - -/* - * Screen surface functions - */ - - -static struct pipe_surface * -i915_get_tex_surface(struct pipe_screen *screen, - struct pipe_texture *pt, - unsigned face, unsigned level, unsigned zslice, - unsigned flags) -{ - struct i915_texture *tex = (struct i915_texture *)pt; - struct pipe_surface *ps; - unsigned offset; /* in bytes */ - - if (pt->target == PIPE_TEXTURE_CUBE) { - offset = tex->image_offset[level][face]; - } - else if (pt->target == PIPE_TEXTURE_3D) { - offset = tex->image_offset[level][zslice]; - } - else { - offset = tex->image_offset[level][0]; - assert(face == 0); - assert(zslice == 0); - } - - ps = CALLOC_STRUCT(pipe_surface); - if (ps) { - pipe_reference_init(&ps->reference, 1); - pipe_texture_reference(&ps->texture, pt); - ps->format = pt->format; - ps->width = u_minify(pt->width0, level); - ps->height = u_minify(pt->height0, level); - ps->offset = offset; - ps->usage = flags; - } - return ps; -} - -static void -i915_tex_surface_destroy(struct pipe_surface *surf) -{ - pipe_texture_reference(&surf->texture, NULL); - FREE(surf); -} - - -/* - * Screen transfer functions - */ - - -static struct pipe_transfer* -i915_get_tex_transfer(struct pipe_screen *screen, - struct pipe_texture *texture, - unsigned face, unsigned level, unsigned zslice, - enum pipe_transfer_usage usage, unsigned x, unsigned y, - unsigned w, unsigned h) -{ - struct i915_texture *tex = (struct i915_texture *)texture; - struct i915_transfer *trans; - unsigned offset; /* in bytes */ - - if (texture->target == PIPE_TEXTURE_CUBE) { - offset = tex->image_offset[level][face]; - } - else if (texture->target == PIPE_TEXTURE_3D) { - offset = tex->image_offset[level][zslice]; - } - else { - offset = tex->image_offset[level][0]; - assert(face == 0); - assert(zslice == 0); - } - - trans = CALLOC_STRUCT(i915_transfer); - if (trans) { - pipe_texture_reference(&trans->base.texture, texture); - trans->base.x = x; - trans->base.y = y; - trans->base.width = w; - trans->base.height = h; - trans->base.stride = tex->stride; - trans->offset = offset; - trans->base.usage = usage; - } - return &trans->base; -} - -static void * -i915_transfer_map(struct pipe_screen *screen, - struct pipe_transfer *transfer) -{ - struct i915_texture *tex = (struct i915_texture *)transfer->texture; - struct intel_winsys *iws = i915_screen(tex->base.screen)->iws; - char *map; - boolean write = FALSE; - enum pipe_format format = tex->base.format; - - if (transfer->usage & PIPE_TRANSFER_WRITE) - write = TRUE; - - map = iws->buffer_map(iws, tex->buffer, write); - if (map == NULL) - return NULL; - - return map + i915_transfer(transfer)->offset + - transfer->y / util_format_get_blockheight(format) * transfer->stride + - transfer->x / util_format_get_blockwidth(format) * util_format_get_blocksize(format); -} - -static void -i915_transfer_unmap(struct pipe_screen *screen, - struct pipe_transfer *transfer) -{ - struct i915_texture *tex = (struct i915_texture *)transfer->texture; - struct intel_winsys *iws = i915_screen(tex->base.screen)->iws; - iws->buffer_unmap(iws, tex->buffer); -} - -static void -i915_tex_transfer_destroy(struct pipe_transfer *trans) -{ - pipe_texture_reference(&trans->texture, NULL); - FREE(trans); -} - - -/* - * Other texture functions - */ - - -void -i915_init_screen_texture_functions(struct i915_screen *is) -{ - is->base.texture_create = i915_texture_create; - is->base.texture_blanket = i915_texture_blanket; - is->base.texture_destroy = i915_texture_destroy; - is->base.get_tex_surface = i915_get_tex_surface; - is->base.tex_surface_destroy = i915_tex_surface_destroy; - is->base.get_tex_transfer = i915_get_tex_transfer; - is->base.transfer_map = i915_transfer_map; - is->base.transfer_unmap = i915_transfer_unmap; - is->base.tex_transfer_destroy = i915_tex_transfer_destroy; -} - -struct pipe_texture * -i915_texture_blanket_intel(struct pipe_screen *screen, - struct pipe_texture *base, - unsigned stride, - struct intel_buffer *buffer) -{ - struct i915_texture *tex; - assert(screen); - - /* Only supports one type */ - if (base->target != PIPE_TEXTURE_2D || - base->last_level != 0 || - base->depth0 != 1) { - return NULL; - } - - tex = CALLOC_STRUCT(i915_texture); - if (!tex) - return NULL; - - tex->base = *base; - pipe_reference_init(&tex->base.reference, 1); - tex->base.screen = screen; - - tex->stride = stride; - - i915_miptree_set_level_info(tex, 0, 1, base->width0, base->height0, 1); - i915_miptree_set_image_offset(tex, 0, 0, 0, 0); - - tex->buffer = buffer; - - return &tex->base; -} - -boolean -i915_get_texture_buffer_intel(struct pipe_texture *texture, - struct intel_buffer **buffer, - unsigned *stride) -{ - struct i915_texture *tex = (struct i915_texture *)texture; - - if (!texture) - return FALSE; - - *stride = tex->stride; - *buffer = tex->buffer; - - return TRUE; -} diff --git a/src/gallium/drivers/i915/intel_winsys.h b/src/gallium/drivers/i915/i915_winsys.h index b3a802b0e29..8a6f579ad97 100644 --- a/src/gallium/drivers/i915/intel_winsys.h +++ b/src/gallium/drivers/i915/i915_winsys.h @@ -23,45 +23,46 @@ * **************************************************************************/ -#ifndef INTEL_WINSYS_H -#define INTEL_WINSYS_H +#ifndef I915_WINSYS_H +#define I915_WINSYS_H #include "pipe/p_compiler.h" -struct intel_winsys; -struct intel_buffer; -struct intel_batchbuffer; -struct pipe_texture; +struct i915_winsys; +struct i915_winsys_buffer; +struct i915_winsys_batchbuffer; +struct pipe_resource; struct pipe_fence_handle; +struct winsys_handle; -enum intel_buffer_usage +enum i915_winsys_buffer_usage { /* use on textures */ - INTEL_USAGE_RENDER = 0x01, - INTEL_USAGE_SAMPLER = 0x02, - INTEL_USAGE_2D_TARGET = 0x04, - INTEL_USAGE_2D_SOURCE = 0x08, + I915_USAGE_RENDER = 0x01, + I915_USAGE_SAMPLER = 0x02, + I915_USAGE_2D_TARGET = 0x04, + I915_USAGE_2D_SOURCE = 0x08, /* use on vertex */ - INTEL_USAGE_VERTEX = 0x10 + I915_USAGE_VERTEX = 0x10 }; -enum intel_buffer_type +enum i915_winsys_buffer_type { - INTEL_NEW_TEXTURE, - INTEL_NEW_SCANOUT, /**< a texture used for scanning out from */ - INTEL_NEW_VERTEX + I915_NEW_TEXTURE, + I915_NEW_SCANOUT, /**< a texture used for scanning out from */ + I915_NEW_VERTEX }; -enum intel_buffer_tile +enum i915_winsys_buffer_tile { - INTEL_TILE_NONE, - INTEL_TILE_X, - INTEL_TILE_Y + I915_TILE_NONE, + I915_TILE_X, + I915_TILE_Y }; -struct intel_batchbuffer { +struct i915_winsys_batchbuffer { - struct intel_winsys *iws; + struct i915_winsys *iws; /** * Values exported to speed up the writing the batchbuffer, @@ -78,7 +79,7 @@ struct intel_batchbuffer { /*@}*/ }; -struct intel_winsys { +struct i915_winsys { /** * Batchbuffer functions. @@ -87,7 +88,8 @@ struct intel_winsys { /** * Create a new batchbuffer. */ - struct intel_batchbuffer *(*batchbuffer_create)(struct intel_winsys *iws); + struct i915_winsys_batchbuffer * + (*batchbuffer_create)(struct i915_winsys *iws); /** * Emit a relocation to a buffer. @@ -99,21 +101,21 @@ struct intel_winsys { * @offset add this to the reloc buffers address * @target buffer where to write the address, null for batchbuffer. */ - int (*batchbuffer_reloc)(struct intel_batchbuffer *batch, - struct intel_buffer *reloc, - enum intel_buffer_usage usage, + int (*batchbuffer_reloc)(struct i915_winsys_batchbuffer *batch, + struct i915_winsys_buffer *reloc, + enum i915_winsys_buffer_usage usage, unsigned offset); /** * Flush a bufferbatch. */ - void (*batchbuffer_flush)(struct intel_batchbuffer *batch, + void (*batchbuffer_flush)(struct i915_winsys_batchbuffer *batch, struct pipe_fence_handle **fence); /** * Destroy a batchbuffer. */ - void (*batchbuffer_destroy)(struct intel_batchbuffer *batch); + void (*batchbuffer_destroy)(struct i915_winsys_batchbuffer *batch); /*@}*/ @@ -124,45 +126,66 @@ struct intel_winsys { /** * Create a buffer. */ - struct intel_buffer *(*buffer_create)(struct intel_winsys *iws, - unsigned size, unsigned alignment, - enum intel_buffer_type type); + struct i915_winsys_buffer * + (*buffer_create)(struct i915_winsys *iws, + unsigned size, unsigned alignment, + enum i915_winsys_buffer_type type); + + /** + * Creates a buffer from a handle. + * Used to implement pipe_screen::resource_from_handle. + * Also provides the stride information needed for the + * texture via the stride argument. + */ + struct i915_winsys_buffer * + (*buffer_from_handle)(struct i915_winsys *iws, + struct winsys_handle *whandle, + unsigned *stride); + + /** + * Used to implement pipe_screen::resource_get_handle. + * The winsys might need the stride information. + */ + boolean (*buffer_get_handle)(struct i915_winsys *iws, + struct i915_winsys_buffer *buffer, + struct winsys_handle *whandle, + unsigned stride); /** * Fence a buffer with a fence reg. * Not to be confused with pipe_fence_handle. */ - int (*buffer_set_fence_reg)(struct intel_winsys *iws, - struct intel_buffer *buffer, + int (*buffer_set_fence_reg)(struct i915_winsys *iws, + struct i915_winsys_buffer *buffer, unsigned stride, - enum intel_buffer_tile tile); + enum i915_winsys_buffer_tile tile); /** * Map a buffer. */ - void *(*buffer_map)(struct intel_winsys *iws, - struct intel_buffer *buffer, + void *(*buffer_map)(struct i915_winsys *iws, + struct i915_winsys_buffer *buffer, boolean write); /** * Unmap a buffer. */ - void (*buffer_unmap)(struct intel_winsys *iws, - struct intel_buffer *buffer); + void (*buffer_unmap)(struct i915_winsys *iws, + struct i915_winsys_buffer *buffer); /** * Write to a buffer. * * Arguments follows pipe_buffer_write. */ - int (*buffer_write)(struct intel_winsys *iws, - struct intel_buffer *dst, + int (*buffer_write)(struct i915_winsys *iws, + struct i915_winsys_buffer *dst, size_t offset, size_t size, const void *data); - void (*buffer_destroy)(struct intel_winsys *iws, - struct intel_buffer *buffer); + void (*buffer_destroy)(struct i915_winsys *iws, + struct i915_winsys_buffer *buffer); /*@}*/ @@ -173,20 +196,20 @@ struct intel_winsys { /** * Reference fence and set ptr to fence. */ - void (*fence_reference)(struct intel_winsys *iws, + void (*fence_reference)(struct i915_winsys *iws, struct pipe_fence_handle **ptr, struct pipe_fence_handle *fence); /** * Check if a fence has finished. */ - int (*fence_signalled)(struct intel_winsys *iws, + int (*fence_signalled)(struct i915_winsys *iws, struct pipe_fence_handle *fence); /** * Wait on a fence to finish. */ - int (*fence_finish)(struct intel_winsys *iws, + int (*fence_finish)(struct i915_winsys *iws, struct pipe_fence_handle *fence); /*@}*/ @@ -194,33 +217,14 @@ struct intel_winsys { /** * Destroy the winsys. */ - void (*destroy)(struct intel_winsys *iws); + void (*destroy)(struct i915_winsys *iws); }; /** * Create i915 pipe_screen. */ -struct pipe_screen *i915_create_screen(struct intel_winsys *iws, unsigned pci_id); - - -/** - * Get the intel_winsys buffer backing the texture. - * - * TODO UGLY - */ -boolean i915_get_texture_buffer_intel(struct pipe_texture *texture, - struct intel_buffer **buffer, - unsigned *stride); +struct pipe_screen *i915_create_screen(struct i915_winsys *iws, unsigned pci_id); -/** - * Wrap a intel_winsys buffer with a texture blanket. - * - * TODO UGLY - */ -struct pipe_texture * i915_texture_blanket_intel(struct pipe_screen *screen, - struct pipe_texture *tmplt, - unsigned pitch, - struct intel_buffer *buffer); #endif diff --git a/src/gallium/drivers/i965/Makefile b/src/gallium/drivers/i965/Makefile index 95fd3cd69bd..b0b09703384 100644 --- a/src/gallium/drivers/i965/Makefile +++ b/src/gallium/drivers/i965/Makefile @@ -36,6 +36,7 @@ C_SOURCES = \ brw_pipe_vertex.c \ brw_pipe_clear.c \ brw_pipe_rast.c \ + brw_resource.c \ brw_sf.c \ brw_sf_emit.c \ brw_sf_state.c \ @@ -46,7 +47,6 @@ C_SOURCES = \ brw_structs_dump.c \ brw_swtnl.c \ brw_urb.c \ - brw_util.c \ brw_vs.c \ brw_vs_emit.c \ brw_vs_state.c \ @@ -63,9 +63,9 @@ C_SOURCES = \ brw_wm_state.c \ brw_wm_surface_state.c \ brw_screen.c \ - brw_screen_buffers.c \ - brw_screen_tex_layout.c \ - brw_screen_texture.c \ + brw_resource_buffer.c \ + brw_resource_texture.c \ + brw_resource_texture_layout.c \ brw_screen_surface.c \ brw_batchbuffer.c \ brw_winsys_debug.c \ diff --git a/src/gallium/drivers/i965/SConscript b/src/gallium/drivers/i965/SConscript index 9c2faaf4b49..85c4d7ed22e 100644 --- a/src/gallium/drivers/i965/SConscript +++ b/src/gallium/drivers/i965/SConscript @@ -38,11 +38,12 @@ i965 = env.ConvenienceLibrary( 'brw_pipe_sampler.c', 'brw_pipe_shader.c', 'brw_pipe_vertex.c', - 'brw_screen_buffers.c', + 'brw_resource.c', + 'brw_resource_buffer.c', + 'brw_resource_texture.c', + 'brw_resource_texture_layout.c', 'brw_screen.c', 'brw_screen_surface.c', - 'brw_screen_tex_layout.c', - 'brw_screen_texture.c', 'brw_structs_dump.c', 'brw_sf.c', 'brw_sf_emit.c', @@ -53,11 +54,11 @@ i965 = env.ConvenienceLibrary( 'brw_state_upload.c', 'brw_swtnl.c', 'brw_urb.c', - 'brw_util.c', 'brw_vs.c', 'brw_vs_emit.c', 'brw_vs_state.c', 'brw_vs_surface_state.c', + 'brw_winsys_debug.c', 'brw_wm.c', # 'brw_wm_constant_buffer.c', 'brw_wm_debug.c', diff --git a/src/gallium/drivers/i965/brw_context.c b/src/gallium/drivers/i965/brw_context.c index 3dbe2b91308..227bc790deb 100644 --- a/src/gallium/drivers/i965/brw_context.c +++ b/src/gallium/drivers/i965/brw_context.c @@ -39,6 +39,7 @@ #include "brw_state.h" #include "brw_batchbuffer.h" #include "brw_winsys.h" +#include "brw_resource.h" #include "brw_screen.h" @@ -118,6 +119,7 @@ struct pipe_context *brw_create_context(struct pipe_screen *screen, brw->sws = brw_screen(screen)->sws; brw->chipset = brw_screen(screen)->chipset; + brw_init_resource_functions( brw ); brw_pipe_blend_init( brw ); brw_pipe_depth_stencil_init( brw ); brw_pipe_framebuffer_init( brw ); diff --git a/src/gallium/drivers/i965/brw_context.h b/src/gallium/drivers/i965/brw_context.h index 12cfa7b049c..94c9c443f05 100644 --- a/src/gallium/drivers/i965/brw_context.h +++ b/src/gallium/drivers/i965/brw_context.h @@ -351,7 +351,7 @@ struct brw_vs_prog_data { /* Size == 0 if output either not written, or always [0,0,0,1] */ -struct brw_vs_ouput_sizes { +struct brw_vs_output_sizes { GLubyte output_size[PIPE_MAX_SHADER_OUTPUTS]; }; @@ -546,15 +546,14 @@ struct brw_context const struct brw_blend_state *blend; const struct brw_rasterizer_state *rast; const struct brw_depth_stencil_state *zstencil; + const struct brw_vertex_element_packet *velems; const struct brw_sampler *sampler[PIPE_MAX_SAMPLERS]; unsigned num_samplers; - struct pipe_texture *texture[PIPE_MAX_SAMPLERS]; + struct pipe_sampler_view *fragment_sampler_views[PIPE_MAX_SAMPLERS]; struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS]; - struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS]; - unsigned num_vertex_elements; - unsigned num_textures; + unsigned num_fragment_sampler_views; unsigned num_vertex_buffers; struct pipe_scissor_state scissor; @@ -562,8 +561,8 @@ struct brw_context struct pipe_stencil_ref stencil_ref; struct pipe_framebuffer_state fb; struct pipe_clip_state ucp; - struct pipe_buffer *vertex_constants; - struct pipe_buffer *fragment_constants; + struct pipe_resource *vertex_constants; + struct pipe_resource *fragment_constants; struct brw_blend_constant_color bcc; struct brw_cc1 cc1_stencil_ref; @@ -575,7 +574,7 @@ struct brw_context * * Updates are signaled by PIPE_NEW_INDEX_BUFFER. */ - struct pipe_buffer *index_buffer; + struct pipe_resource *index_buffer; unsigned index_size; /* Updates are signalled by PIPE_NEW_INDEX_RANGE: diff --git a/src/gallium/drivers/i965/brw_curbe.c b/src/gallium/drivers/i965/brw_curbe.c index 4b215a001c4..a701de33f5d 100644 --- a/src/gallium/drivers/i965/brw_curbe.c +++ b/src/gallium/drivers/i965/brw_curbe.c @@ -160,7 +160,6 @@ static GLfloat fixed_plane[6][4] = { */ static enum pipe_error prepare_curbe_buffer(struct brw_context *brw) { - struct pipe_screen *screen = brw->base.screen; const GLuint sz = brw->curbe.total_size; const GLuint bufsz = sz * 16 * sizeof(GLfloat); enum pipe_error ret; @@ -169,7 +168,7 @@ static enum pipe_error prepare_curbe_buffer(struct brw_context *brw) if (sz == 0) { if (brw->curbe.last_buf) { - free(brw->curbe.last_buf); + FREE(brw->curbe.last_buf); brw->curbe.last_buf = NULL; brw->curbe.last_bufsz = 0; } @@ -196,15 +195,11 @@ static enum pipe_error prepare_curbe_buffer(struct brw_context *brw) nr_const = fs->info.file_max[TGSI_FILE_CONSTANT] + 1; /* nr_const = brw->wm.prog_data->nr_params; */ if (nr_const) { - const GLfloat *value = screen->buffer_map( screen, - brw->curr.fragment_constants, - PIPE_BUFFER_USAGE_CPU_READ); - - memcpy(&buf[offset], value, - nr_const * 4 * sizeof(float)); - - screen->buffer_unmap( screen, - brw->curr.fragment_constants ); + pipe_buffer_read( &brw->base, + brw->curr.fragment_constants, + 0, + nr_const * 4 * sizeof(float), + &buf[offset]); } } @@ -258,15 +253,14 @@ static enum pipe_error prepare_curbe_buffer(struct brw_context *brw) * buffer objects. If we want to keep on putting them into the * curbe, makes sense to treat constbuf's specially with malloc. */ - const GLfloat *value = screen->buffer_map( screen, - brw->curr.vertex_constants, - PIPE_BUFFER_USAGE_CPU_READ); /* XXX: what if user's constant buffer is too small? */ - memcpy(&buf[offset], value, nr_const * 4 * sizeof(float)); - - screen->buffer_unmap( screen, brw->curr.vertex_constants ); + pipe_buffer_read(&brw->base, + brw->curr.vertex_constants, + 0, + nr_const * 4 * sizeof(float), + &buf[offset]); } } diff --git a/src/gallium/drivers/i965/brw_disasm.c b/src/gallium/drivers/i965/brw_disasm.c index 9c2ccfff652..4c8579365d5 100644 --- a/src/gallium/drivers/i965/brw_disasm.c +++ b/src/gallium/drivers/i965/brw_disasm.c @@ -23,7 +23,6 @@ #include <stdio.h> #include <stdlib.h> #include <string.h> -#include <getopt.h> #include <unistd.h> #include <stdarg.h> diff --git a/src/gallium/drivers/i965/brw_draw.c b/src/gallium/drivers/i965/brw_draw.c index 9bad61ef72e..4625c2048f9 100644 --- a/src/gallium/drivers/i965/brw_draw.c +++ b/src/gallium/drivers/i965/brw_draw.c @@ -142,7 +142,7 @@ static int brw_emit_prim(struct brw_context *brw, */ static int try_draw_range_elements(struct brw_context *brw, - struct pipe_buffer *index_buffer, + struct pipe_resource *index_buffer, unsigned hw_prim, unsigned start, unsigned count) { @@ -178,8 +178,8 @@ try_draw_range_elements(struct brw_context *brw, static void brw_draw_range_elements(struct pipe_context *pipe, - struct pipe_buffer *index_buffer, - unsigned index_size, + struct pipe_resource *index_buffer, + unsigned index_size, int index_bias, unsigned min_index, unsigned max_index, unsigned mode, unsigned start, unsigned count) @@ -194,6 +194,8 @@ brw_draw_range_elements(struct pipe_context *pipe, debug_printf("PRIM: %s start %d count %d index_buffer %p\n", u_prim_name(mode), start, count, (void *)index_buffer); + assert(index_bias == 0); + /* Potentially trigger upload of new index buffer. * * XXX: do we need to go through state validation to achieve this? @@ -201,7 +203,7 @@ brw_draw_range_elements(struct pipe_context *pipe, */ if (brw->curr.index_buffer != index_buffer || brw->curr.index_size != index_size) { - pipe_buffer_reference( &brw->curr.index_buffer, index_buffer ); + pipe_resource_reference( &brw->curr.index_buffer, index_buffer ); brw->curr.index_size = index_size; brw->state.dirty.mesa |= PIPE_NEW_INDEX_BUFFER; } @@ -232,13 +234,13 @@ brw_draw_range_elements(struct pipe_context *pipe, static void brw_draw_elements(struct pipe_context *pipe, - struct pipe_buffer *index_buffer, - unsigned index_size, + struct pipe_resource *index_buffer, + unsigned index_size, int index_bias, unsigned mode, unsigned start, unsigned count) { brw_draw_range_elements( pipe, index_buffer, - index_size, + index_size, index_bias, 0, 0xffffffff, mode, start, count ); @@ -248,7 +250,7 @@ static void brw_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start, unsigned count) { - brw_draw_elements(pipe, NULL, 0, mode, start, count); + brw_draw_elements(pipe, NULL, 0, 0, mode, start, count); } @@ -263,17 +265,17 @@ boolean brw_draw_init( struct brw_context *brw ) /* Create helpers for uploading data in user buffers: */ - brw->vb.upload_vertex = u_upload_create( brw->base.screen, + brw->vb.upload_vertex = u_upload_create( &brw->base, 128 * 1024, 64, - PIPE_BUFFER_USAGE_VERTEX ); + PIPE_BIND_VERTEX_BUFFER ); if (brw->vb.upload_vertex == NULL) return FALSE; - brw->vb.upload_index = u_upload_create( brw->base.screen, + brw->vb.upload_index = u_upload_create( &brw->base, 32 * 1024, 64, - PIPE_BUFFER_USAGE_INDEX ); + PIPE_BIND_INDEX_BUFFER ); if (brw->vb.upload_index == NULL) return FALSE; diff --git a/src/gallium/drivers/i965/brw_draw_upload.c b/src/gallium/drivers/i965/brw_draw_upload.c index 9f136eec71c..337eee8cd9c 100644 --- a/src/gallium/drivers/i965/brw_draw_upload.c +++ b/src/gallium/drivers/i965/brw_draw_upload.c @@ -38,145 +38,11 @@ #include "brw_screen.h" #include "brw_batchbuffer.h" #include "brw_debug.h" +#include "brw_resource.h" -static unsigned brw_translate_surface_format( unsigned id ) -{ - switch (id) { - case PIPE_FORMAT_R64_FLOAT: - return BRW_SURFACEFORMAT_R64_FLOAT; - case PIPE_FORMAT_R64G64_FLOAT: - return BRW_SURFACEFORMAT_R64G64_FLOAT; - case PIPE_FORMAT_R64G64B64_FLOAT: - return BRW_SURFACEFORMAT_R64G64B64_FLOAT; - case PIPE_FORMAT_R64G64B64A64_FLOAT: - return BRW_SURFACEFORMAT_R64G64B64A64_FLOAT; - - case PIPE_FORMAT_R32_FLOAT: - return BRW_SURFACEFORMAT_R32_FLOAT; - case PIPE_FORMAT_R32G32_FLOAT: - return BRW_SURFACEFORMAT_R32G32_FLOAT; - case PIPE_FORMAT_R32G32B32_FLOAT: - return BRW_SURFACEFORMAT_R32G32B32_FLOAT; - case PIPE_FORMAT_R32G32B32A32_FLOAT: - return BRW_SURFACEFORMAT_R32G32B32A32_FLOAT; - - case PIPE_FORMAT_R32_UNORM: - return BRW_SURFACEFORMAT_R32_UNORM; - case PIPE_FORMAT_R32G32_UNORM: - return BRW_SURFACEFORMAT_R32G32_UNORM; - case PIPE_FORMAT_R32G32B32_UNORM: - return BRW_SURFACEFORMAT_R32G32B32_UNORM; - case PIPE_FORMAT_R32G32B32A32_UNORM: - return BRW_SURFACEFORMAT_R32G32B32A32_UNORM; - - case PIPE_FORMAT_R32_USCALED: - return BRW_SURFACEFORMAT_R32_USCALED; - case PIPE_FORMAT_R32G32_USCALED: - return BRW_SURFACEFORMAT_R32G32_USCALED; - case PIPE_FORMAT_R32G32B32_USCALED: - return BRW_SURFACEFORMAT_R32G32B32_USCALED; - case PIPE_FORMAT_R32G32B32A32_USCALED: - return BRW_SURFACEFORMAT_R32G32B32A32_USCALED; - - case PIPE_FORMAT_R32_SNORM: - return BRW_SURFACEFORMAT_R32_SNORM; - case PIPE_FORMAT_R32G32_SNORM: - return BRW_SURFACEFORMAT_R32G32_SNORM; - case PIPE_FORMAT_R32G32B32_SNORM: - return BRW_SURFACEFORMAT_R32G32B32_SNORM; - case PIPE_FORMAT_R32G32B32A32_SNORM: - return BRW_SURFACEFORMAT_R32G32B32A32_SNORM; - - case PIPE_FORMAT_R32_SSCALED: - return BRW_SURFACEFORMAT_R32_SSCALED; - case PIPE_FORMAT_R32G32_SSCALED: - return BRW_SURFACEFORMAT_R32G32_SSCALED; - case PIPE_FORMAT_R32G32B32_SSCALED: - return BRW_SURFACEFORMAT_R32G32B32_SSCALED; - case PIPE_FORMAT_R32G32B32A32_SSCALED: - return BRW_SURFACEFORMAT_R32G32B32A32_SSCALED; - - case PIPE_FORMAT_R16_UNORM: - return BRW_SURFACEFORMAT_R16_UNORM; - case PIPE_FORMAT_R16G16_UNORM: - return BRW_SURFACEFORMAT_R16G16_UNORM; - case PIPE_FORMAT_R16G16B16_UNORM: - return BRW_SURFACEFORMAT_R16G16B16_UNORM; - case PIPE_FORMAT_R16G16B16A16_UNORM: - return BRW_SURFACEFORMAT_R16G16B16A16_UNORM; - - case PIPE_FORMAT_R16_USCALED: - return BRW_SURFACEFORMAT_R16_USCALED; - case PIPE_FORMAT_R16G16_USCALED: - return BRW_SURFACEFORMAT_R16G16_USCALED; - case PIPE_FORMAT_R16G16B16_USCALED: - return BRW_SURFACEFORMAT_R16G16B16_USCALED; - case PIPE_FORMAT_R16G16B16A16_USCALED: - return BRW_SURFACEFORMAT_R16G16B16A16_USCALED; - - case PIPE_FORMAT_R16_SNORM: - return BRW_SURFACEFORMAT_R16_SNORM; - case PIPE_FORMAT_R16G16_SNORM: - return BRW_SURFACEFORMAT_R16G16_SNORM; - case PIPE_FORMAT_R16G16B16_SNORM: - return BRW_SURFACEFORMAT_R16G16B16_SNORM; - case PIPE_FORMAT_R16G16B16A16_SNORM: - return BRW_SURFACEFORMAT_R16G16B16A16_SNORM; - - case PIPE_FORMAT_R16_SSCALED: - return BRW_SURFACEFORMAT_R16_SSCALED; - case PIPE_FORMAT_R16G16_SSCALED: - return BRW_SURFACEFORMAT_R16G16_SSCALED; - case PIPE_FORMAT_R16G16B16_SSCALED: - return BRW_SURFACEFORMAT_R16G16B16_SSCALED; - case PIPE_FORMAT_R16G16B16A16_SSCALED: - return BRW_SURFACEFORMAT_R16G16B16A16_SSCALED; - - case PIPE_FORMAT_R8_UNORM: - return BRW_SURFACEFORMAT_R8_UNORM; - case PIPE_FORMAT_R8G8_UNORM: - return BRW_SURFACEFORMAT_R8G8_UNORM; - case PIPE_FORMAT_R8G8B8_UNORM: - return BRW_SURFACEFORMAT_R8G8B8_UNORM; - case PIPE_FORMAT_R8G8B8A8_UNORM: - return BRW_SURFACEFORMAT_R8G8B8A8_UNORM; - - case PIPE_FORMAT_R8_USCALED: - return BRW_SURFACEFORMAT_R8_USCALED; - case PIPE_FORMAT_R8G8_USCALED: - return BRW_SURFACEFORMAT_R8G8_USCALED; - case PIPE_FORMAT_R8G8B8_USCALED: - return BRW_SURFACEFORMAT_R8G8B8_USCALED; - case PIPE_FORMAT_R8G8B8A8_USCALED: - return BRW_SURFACEFORMAT_R8G8B8A8_USCALED; - - case PIPE_FORMAT_R8_SNORM: - return BRW_SURFACEFORMAT_R8_SNORM; - case PIPE_FORMAT_R8G8_SNORM: - return BRW_SURFACEFORMAT_R8G8_SNORM; - case PIPE_FORMAT_R8G8B8_SNORM: - return BRW_SURFACEFORMAT_R8G8B8_SNORM; - case PIPE_FORMAT_R8G8B8A8_SNORM: - return BRW_SURFACEFORMAT_R8G8B8A8_SNORM; - - case PIPE_FORMAT_R8_SSCALED: - return BRW_SURFACEFORMAT_R8_SSCALED; - case PIPE_FORMAT_R8G8_SSCALED: - return BRW_SURFACEFORMAT_R8G8_SSCALED; - case PIPE_FORMAT_R8G8B8_SSCALED: - return BRW_SURFACEFORMAT_R8G8B8_SSCALED; - case PIPE_FORMAT_R8G8B8A8_SSCALED: - return BRW_SURFACEFORMAT_R8G8B8A8_SSCALED; - - default: - assert(0); - return 0; - } -} - static unsigned get_index_type(int type) { switch (type) { @@ -202,7 +68,7 @@ static int brw_prepare_vertices(struct brw_context *brw) for (i = 0; i < brw->curr.num_vertex_buffers; i++) { struct pipe_vertex_buffer *vb = &brw->curr.vertex_buffer[i]; struct brw_winsys_buffer *bo; - struct pipe_buffer *upload_buf = NULL; + struct pipe_resource *upload_buf = NULL; unsigned offset; if (BRW_DEBUG & DEBUG_VERTS) @@ -210,7 +76,7 @@ static int brw_prepare_vertices(struct brw_context *brw) __FUNCTION__, i, brw_buffer_is_user_buffer(vb->buffer), vb->buffer_offset, - vb->buffer->size, + vb->buffer->width0, vb->stride); if (brw_buffer_is_user_buffer(vb->buffer)) { @@ -220,8 +86,8 @@ static int brw_prepare_vertices(struct brw_context *brw) * add support for >1 constant buffer) instead. */ unsigned size = (vb->stride == 0 ? - vb->buffer->size - vb->buffer_offset : - MAX2(vb->buffer->size - vb->buffer_offset, + vb->buffer->width0 - vb->buffer_offset : + MAX2(vb->buffer->width0 - vb->buffer_offset, vb->stride * (max_index + 1 - min_index))); ret = u_upload_buffer( brw->vb.upload_vertex, @@ -258,7 +124,7 @@ static int brw_prepare_vertices(struct brw_context *brw) /* Don't need to retain this reference. We have a reference on * the underlying winsys buffer: */ - pipe_buffer_reference( &upload_buf, NULL ); + pipe_resource_reference( &upload_buf, NULL ); } brw->vb.nr_vb = i; @@ -315,75 +181,16 @@ static int brw_emit_vertex_buffers( struct brw_context *brw ) - static int brw_emit_vertex_elements(struct brw_context *brw) { - GLuint nr = brw->curr.num_vertex_elements; - GLuint i; + const struct brw_vertex_element_packet *brw_velems = brw->curr.velems; + unsigned size = brw_velems->header.length + 2; + /* why is this here */ brw_emit_query_begin(brw); - /* If the VS doesn't read any inputs (calculating vertex position from - * a state variable for some reason, for example), emit a single pad - * VERTEX_ELEMENT struct and bail. - * - * The stale VB state stays in place, but they don't do anything unless - * a VE loads from them. - */ - if (nr == 0) { - BEGIN_BATCH(3, IGNORE_CLIPRECTS); - OUT_BATCH((CMD_VERTEX_ELEMENT << 16) | 1); - OUT_BATCH((0 << BRW_VE0_INDEX_SHIFT) | - BRW_VE0_VALID | - (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) | - (0 << BRW_VE0_SRC_OFFSET_SHIFT)); - OUT_BATCH((BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_0_SHIFT) | - (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) | - (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) | - (BRW_VE1_COMPONENT_STORE_1_FLT << BRW_VE1_COMPONENT_3_SHIFT)); - ADVANCE_BATCH(); - return 0; - } - - /* Now emit vertex element (VEP) state packets. - * - */ - BEGIN_BATCH(1 + nr * 2, IGNORE_CLIPRECTS); - OUT_BATCH((CMD_VERTEX_ELEMENT << 16) | ((1 + nr * 2) - 2)); - for (i = 0; i < nr; i++) { - const struct pipe_vertex_element *input = &brw->curr.vertex_element[i]; - uint32_t format = brw_translate_surface_format( input->src_format ); - uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC; - uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC; - uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC; - uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC; - - switch (input->nr_components) { - case 0: comp0 = BRW_VE1_COMPONENT_STORE_0; /* fallthrough */ - case 1: comp1 = BRW_VE1_COMPONENT_STORE_0; /* fallthrough */ - case 2: comp2 = BRW_VE1_COMPONENT_STORE_0; /* fallthrough */ - case 3: comp3 = BRW_VE1_COMPONENT_STORE_1_FLT; - break; - } - - OUT_BATCH((input->vertex_buffer_index << BRW_VE0_INDEX_SHIFT) | - BRW_VE0_VALID | - (format << BRW_VE0_FORMAT_SHIFT) | - (input->src_offset << BRW_VE0_SRC_OFFSET_SHIFT)); + brw_batchbuffer_data(brw->batch, brw_velems, size * 4, IGNORE_CLIPRECTS); - if (BRW_IS_IGDNG(brw)) - OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) | - (comp1 << BRW_VE1_COMPONENT_1_SHIFT) | - (comp2 << BRW_VE1_COMPONENT_2_SHIFT) | - (comp3 << BRW_VE1_COMPONENT_3_SHIFT)); - else - OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) | - (comp1 << BRW_VE1_COMPONENT_1_SHIFT) | - (comp2 << BRW_VE1_COMPONENT_2_SHIFT) | - (comp3 << BRW_VE1_COMPONENT_3_SHIFT) | - ((i * 4) << BRW_VE1_DST_OFFSET_SHIFT)); - } - ADVANCE_BATCH(); return 0; } @@ -396,10 +203,11 @@ static int brw_emit_vertices( struct brw_context *brw ) if (ret) return ret; + /* XXX should separate this? */ ret = brw_emit_vertex_elements( brw ); if (ret) return ret; - + return 0; } @@ -407,7 +215,8 @@ static int brw_emit_vertices( struct brw_context *brw ) const struct brw_tracked_state brw_vertices = { .dirty = { .mesa = (PIPE_NEW_INDEX_RANGE | - PIPE_NEW_VERTEX_BUFFER), + PIPE_NEW_VERTEX_BUFFER | + PIPE_NEW_VERTEX_ELEMENT), .brw = BRW_NEW_BATCH, .cache = 0, }, @@ -418,8 +227,8 @@ const struct brw_tracked_state brw_vertices = { static int brw_prepare_indices(struct brw_context *brw) { - struct pipe_buffer *index_buffer = brw->curr.index_buffer; - struct pipe_buffer *upload_buf = NULL; + struct pipe_resource *index_buffer = brw->curr.index_buffer; + struct pipe_resource *upload_buf = NULL; struct brw_winsys_buffer *bo = NULL; GLuint offset; GLuint index_size; @@ -433,9 +242,9 @@ static int brw_prepare_indices(struct brw_context *brw) debug_printf("%s: index_size:%d index_buffer->size:%d\n", __FUNCTION__, brw->curr.index_size, - brw->curr.index_buffer->size); + brw->curr.index_buffer->width0); - ib_size = index_buffer->size; + ib_size = index_buffer->width0; index_size = brw->curr.index_size; /* Turn userbuffer into a proper hardware buffer? @@ -489,7 +298,7 @@ static int brw_prepare_indices(struct brw_context *brw) brw->state.dirty.brw |= BRW_NEW_INDEX_BUFFER; } - pipe_buffer_reference( &upload_buf, NULL ); + pipe_resource_reference( &upload_buf, NULL ); brw_add_validated_bo(brw, brw->ib.bo); return 0; } diff --git a/src/gallium/drivers/i965/brw_misc_state.c b/src/gallium/drivers/i965/brw_misc_state.c index e3f25bdf622..b5029ceb69f 100644 --- a/src/gallium/drivers/i965/brw_misc_state.c +++ b/src/gallium/drivers/i965/brw_misc_state.c @@ -266,7 +266,7 @@ static int emit_depthbuffer(struct brw_context *brw) cpp = 2; break; case PIPE_FORMAT_Z24X8_UNORM: - case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: format = BRW_DEPTHFORMAT_D24_UNORM_S8_UINT; cpp = 4; break; diff --git a/src/gallium/drivers/i965/brw_pipe_clear.c b/src/gallium/drivers/i965/brw_pipe_clear.c index d7048f769b2..abf507991e2 100644 --- a/src/gallium/drivers/i965/brw_pipe_clear.c +++ b/src/gallium/drivers/i965/brw_pipe_clear.c @@ -140,7 +140,7 @@ static void zstencil_clear(struct brw_context *brw, switch (bsurface->base.format) { case PIPE_FORMAT_Z24X8_UNORM: - case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: value = ((unsigned)(depth * MASK24) & MASK24); break; case PIPE_FORMAT_Z16_UNORM: @@ -153,7 +153,7 @@ static void zstencil_clear(struct brw_context *brw, switch (bsurface->base.format) { case PIPE_FORMAT_Z24X8_UNORM: - case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: value = value | (stencil << 24); break; diff --git a/src/gallium/drivers/i965/brw_pipe_flush.c b/src/gallium/drivers/i965/brw_pipe_flush.c index fdc4814b221..0ae1a6be9e5 100644 --- a/src/gallium/drivers/i965/brw_pipe_flush.c +++ b/src/gallium/drivers/i965/brw_pipe_flush.c @@ -1,10 +1,10 @@ -#include "util/u_upload_mgr.h" - #include "brw_context.h" -#include "brw_screen.h" #include "brw_batchbuffer.h" +#include "util/u_upload_mgr.h" + + /* All batchbuffer flushes must go through this function. @@ -46,35 +46,9 @@ brw_flush( struct pipe_context *pipe, *fence = NULL; } -static unsigned brw_is_buffer_referenced(struct pipe_context *pipe, - struct pipe_buffer *buffer) -{ - struct brw_context *brw = brw_context(pipe); - struct brw_screen *bscreen = brw_screen(brw->base.screen); - - return brw_is_buffer_referenced_by_bo( bscreen, - buffer, - brw->batch->buf ); -} - -static unsigned brw_is_texture_referenced(struct pipe_context *pipe, - struct pipe_texture *texture, - unsigned face, - unsigned level) -{ - struct brw_context *brw = brw_context(pipe); - struct brw_screen *bscreen = brw_screen(brw->base.screen); - - return brw_is_texture_referenced_by_bo( bscreen, - texture, face, level, - brw->batch->buf ); -} - void brw_pipe_flush_init( struct brw_context *brw ) { brw->base.flush = brw_flush; - brw->base.is_buffer_referenced = brw_is_buffer_referenced; - brw->base.is_texture_referenced = brw_is_texture_referenced; } diff --git a/src/gallium/drivers/i965/brw_pipe_sampler.c b/src/gallium/drivers/i965/brw_pipe_sampler.c index c7c0e2ae95e..3fe753ec42c 100644 --- a/src/gallium/drivers/i965/brw_pipe_sampler.c +++ b/src/gallium/drivers/i965/brw_pipe_sampler.c @@ -183,26 +183,26 @@ static void brw_delete_sampler_state(struct pipe_context *pipe, FREE(cso); } -static void brw_set_sampler_textures(struct pipe_context *pipe, - unsigned num, - struct pipe_texture **texture) +static void brw_set_fragment_sampler_views(struct pipe_context *pipe, + unsigned num, + struct pipe_sampler_view **views) { struct brw_context *brw = brw_context(pipe); int i; for (i = 0; i < num; i++) - pipe_texture_reference(&brw->curr.texture[i], texture[i]); + pipe_sampler_view_reference(&brw->curr.fragment_sampler_views[i], views[i]); - for (i = num; i < brw->curr.num_textures; i++) - pipe_texture_reference(&brw->curr.texture[i], NULL); + for (i = num; i < brw->curr.num_fragment_sampler_views; i++) + pipe_sampler_view_reference(&brw->curr.fragment_sampler_views[i], NULL); - brw->curr.num_textures = num; + brw->curr.num_fragment_sampler_views = num; brw->state.dirty.mesa |= PIPE_NEW_BOUND_TEXTURES; } -static void brw_set_vertex_sampler_textures(struct pipe_context *pipe, - unsigned num, - struct pipe_texture **texture) +static void brw_set_vertex_sampler_views(struct pipe_context *pipe, + unsigned num, + struct pipe_sampler_view **views) { } @@ -212,17 +212,47 @@ static void brw_bind_vertex_sampler_state(struct pipe_context *pipe, } +static struct pipe_sampler_view * +brw_create_sampler_view(struct pipe_context *pipe, + struct pipe_resource *texture, + const struct pipe_sampler_view *templ) +{ + struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view); + + if (view) { + *view = *templ; + view->reference.count = 1; + view->texture = NULL; + pipe_resource_reference(&view->texture, texture); + view->context = pipe; + } + + return view; +} + + +static void +brw_sampler_view_destroy(struct pipe_context *pipe, + struct pipe_sampler_view *view) +{ + pipe_resource_reference(&view->texture, NULL); + FREE(view); +} + + void brw_pipe_sampler_init( struct brw_context *brw ) { brw->base.create_sampler_state = brw_create_sampler_state; brw->base.delete_sampler_state = brw_delete_sampler_state; - brw->base.set_fragment_sampler_textures = brw_set_sampler_textures; + brw->base.set_fragment_sampler_views = brw_set_fragment_sampler_views; brw->base.bind_fragment_sampler_states = brw_bind_sampler_state; - brw->base.set_vertex_sampler_textures = brw_set_vertex_sampler_textures; + brw->base.set_vertex_sampler_views = brw_set_vertex_sampler_views; brw->base.bind_vertex_sampler_states = brw_bind_vertex_sampler_state; + brw->base.create_sampler_view = brw_create_sampler_view; + brw->base.sampler_view_destroy = brw_sampler_view_destroy; } void brw_pipe_sampler_cleanup( struct brw_context *brw ) { diff --git a/src/gallium/drivers/i965/brw_pipe_shader.c b/src/gallium/drivers/i965/brw_pipe_shader.c index fe445b9982e..d9bee96c11f 100644 --- a/src/gallium/drivers/i965/brw_pipe_shader.c +++ b/src/gallium/drivers/i965/brw_pipe_shader.c @@ -262,20 +262,20 @@ static void brw_delete_vs_state( struct pipe_context *pipe, void *prog ) static void brw_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_buffer *buf) + struct pipe_resource *buf) { struct brw_context *brw = brw_context(pipe); assert(index == 0); if (shader == PIPE_SHADER_FRAGMENT) { - pipe_buffer_reference( &brw->curr.fragment_constants, + pipe_resource_reference( &brw->curr.fragment_constants, buf ); brw->state.dirty.mesa |= PIPE_NEW_FRAGMENT_CONSTANTS; } else { - pipe_buffer_reference( &brw->curr.vertex_constants, + pipe_resource_reference( &brw->curr.vertex_constants, buf ); brw->state.dirty.mesa |= PIPE_NEW_VERTEX_CONSTANTS; @@ -298,6 +298,6 @@ void brw_pipe_shader_init( struct brw_context *brw ) void brw_pipe_shader_cleanup( struct brw_context *brw ) { - pipe_buffer_reference( &brw->curr.fragment_constants, NULL ); - pipe_buffer_reference( &brw->curr.vertex_constants, NULL ); + pipe_resource_reference( &brw->curr.fragment_constants, NULL ); + pipe_resource_reference( &brw->curr.vertex_constants, NULL ); } diff --git a/src/gallium/drivers/i965/brw_pipe_vertex.c b/src/gallium/drivers/i965/brw_pipe_vertex.c index e3c48e31493..4a120a51dad 100644 --- a/src/gallium/drivers/i965/brw_pipe_vertex.c +++ b/src/gallium/drivers/i965/brw_pipe_vertex.c @@ -1,22 +1,251 @@ #include "brw_context.h" +#include "brw_defines.h" +#include "brw_structs.h" +#include "util/u_memory.h" +#include "util/u_format.h" -static void brw_set_vertex_elements( struct pipe_context *pipe, - unsigned count, - const struct pipe_vertex_element *elements ) + +static unsigned brw_translate_surface_format( unsigned id ) +{ + switch (id) { + case PIPE_FORMAT_R64_FLOAT: + return BRW_SURFACEFORMAT_R64_FLOAT; + case PIPE_FORMAT_R64G64_FLOAT: + return BRW_SURFACEFORMAT_R64G64_FLOAT; + case PIPE_FORMAT_R64G64B64_FLOAT: + return BRW_SURFACEFORMAT_R64G64B64_FLOAT; + case PIPE_FORMAT_R64G64B64A64_FLOAT: + return BRW_SURFACEFORMAT_R64G64B64A64_FLOAT; + + case PIPE_FORMAT_R32_FLOAT: + return BRW_SURFACEFORMAT_R32_FLOAT; + case PIPE_FORMAT_R32G32_FLOAT: + return BRW_SURFACEFORMAT_R32G32_FLOAT; + case PIPE_FORMAT_R32G32B32_FLOAT: + return BRW_SURFACEFORMAT_R32G32B32_FLOAT; + case PIPE_FORMAT_R32G32B32A32_FLOAT: + return BRW_SURFACEFORMAT_R32G32B32A32_FLOAT; + + case PIPE_FORMAT_R32_UNORM: + return BRW_SURFACEFORMAT_R32_UNORM; + case PIPE_FORMAT_R32G32_UNORM: + return BRW_SURFACEFORMAT_R32G32_UNORM; + case PIPE_FORMAT_R32G32B32_UNORM: + return BRW_SURFACEFORMAT_R32G32B32_UNORM; + case PIPE_FORMAT_R32G32B32A32_UNORM: + return BRW_SURFACEFORMAT_R32G32B32A32_UNORM; + + case PIPE_FORMAT_R32_USCALED: + return BRW_SURFACEFORMAT_R32_USCALED; + case PIPE_FORMAT_R32G32_USCALED: + return BRW_SURFACEFORMAT_R32G32_USCALED; + case PIPE_FORMAT_R32G32B32_USCALED: + return BRW_SURFACEFORMAT_R32G32B32_USCALED; + case PIPE_FORMAT_R32G32B32A32_USCALED: + return BRW_SURFACEFORMAT_R32G32B32A32_USCALED; + + case PIPE_FORMAT_R32_SNORM: + return BRW_SURFACEFORMAT_R32_SNORM; + case PIPE_FORMAT_R32G32_SNORM: + return BRW_SURFACEFORMAT_R32G32_SNORM; + case PIPE_FORMAT_R32G32B32_SNORM: + return BRW_SURFACEFORMAT_R32G32B32_SNORM; + case PIPE_FORMAT_R32G32B32A32_SNORM: + return BRW_SURFACEFORMAT_R32G32B32A32_SNORM; + + case PIPE_FORMAT_R32_SSCALED: + return BRW_SURFACEFORMAT_R32_SSCALED; + case PIPE_FORMAT_R32G32_SSCALED: + return BRW_SURFACEFORMAT_R32G32_SSCALED; + case PIPE_FORMAT_R32G32B32_SSCALED: + return BRW_SURFACEFORMAT_R32G32B32_SSCALED; + case PIPE_FORMAT_R32G32B32A32_SSCALED: + return BRW_SURFACEFORMAT_R32G32B32A32_SSCALED; + + case PIPE_FORMAT_R16_UNORM: + return BRW_SURFACEFORMAT_R16_UNORM; + case PIPE_FORMAT_R16G16_UNORM: + return BRW_SURFACEFORMAT_R16G16_UNORM; + case PIPE_FORMAT_R16G16B16_UNORM: + return BRW_SURFACEFORMAT_R16G16B16_UNORM; + case PIPE_FORMAT_R16G16B16A16_UNORM: + return BRW_SURFACEFORMAT_R16G16B16A16_UNORM; + + case PIPE_FORMAT_R16_USCALED: + return BRW_SURFACEFORMAT_R16_USCALED; + case PIPE_FORMAT_R16G16_USCALED: + return BRW_SURFACEFORMAT_R16G16_USCALED; + case PIPE_FORMAT_R16G16B16_USCALED: + return BRW_SURFACEFORMAT_R16G16B16_USCALED; + case PIPE_FORMAT_R16G16B16A16_USCALED: + return BRW_SURFACEFORMAT_R16G16B16A16_USCALED; + + case PIPE_FORMAT_R16_SNORM: + return BRW_SURFACEFORMAT_R16_SNORM; + case PIPE_FORMAT_R16G16_SNORM: + return BRW_SURFACEFORMAT_R16G16_SNORM; + case PIPE_FORMAT_R16G16B16_SNORM: + return BRW_SURFACEFORMAT_R16G16B16_SNORM; + case PIPE_FORMAT_R16G16B16A16_SNORM: + return BRW_SURFACEFORMAT_R16G16B16A16_SNORM; + + case PIPE_FORMAT_R16_SSCALED: + return BRW_SURFACEFORMAT_R16_SSCALED; + case PIPE_FORMAT_R16G16_SSCALED: + return BRW_SURFACEFORMAT_R16G16_SSCALED; + case PIPE_FORMAT_R16G16B16_SSCALED: + return BRW_SURFACEFORMAT_R16G16B16_SSCALED; + case PIPE_FORMAT_R16G16B16A16_SSCALED: + return BRW_SURFACEFORMAT_R16G16B16A16_SSCALED; + + case PIPE_FORMAT_R8_UNORM: + return BRW_SURFACEFORMAT_R8_UNORM; + case PIPE_FORMAT_R8G8_UNORM: + return BRW_SURFACEFORMAT_R8G8_UNORM; + case PIPE_FORMAT_R8G8B8_UNORM: + return BRW_SURFACEFORMAT_R8G8B8_UNORM; + case PIPE_FORMAT_R8G8B8A8_UNORM: + return BRW_SURFACEFORMAT_R8G8B8A8_UNORM; + + case PIPE_FORMAT_R8_USCALED: + return BRW_SURFACEFORMAT_R8_USCALED; + case PIPE_FORMAT_R8G8_USCALED: + return BRW_SURFACEFORMAT_R8G8_USCALED; + case PIPE_FORMAT_R8G8B8_USCALED: + return BRW_SURFACEFORMAT_R8G8B8_USCALED; + case PIPE_FORMAT_R8G8B8A8_USCALED: + return BRW_SURFACEFORMAT_R8G8B8A8_USCALED; + + case PIPE_FORMAT_R8_SNORM: + return BRW_SURFACEFORMAT_R8_SNORM; + case PIPE_FORMAT_R8G8_SNORM: + return BRW_SURFACEFORMAT_R8G8_SNORM; + case PIPE_FORMAT_R8G8B8_SNORM: + return BRW_SURFACEFORMAT_R8G8B8_SNORM; + case PIPE_FORMAT_R8G8B8A8_SNORM: + return BRW_SURFACEFORMAT_R8G8B8A8_SNORM; + + case PIPE_FORMAT_R8_SSCALED: + return BRW_SURFACEFORMAT_R8_SSCALED; + case PIPE_FORMAT_R8G8_SSCALED: + return BRW_SURFACEFORMAT_R8G8_SSCALED; + case PIPE_FORMAT_R8G8B8_SSCALED: + return BRW_SURFACEFORMAT_R8G8B8_SSCALED; + case PIPE_FORMAT_R8G8B8A8_SSCALED: + return BRW_SURFACEFORMAT_R8G8B8A8_SSCALED; + + default: + assert(0); + return 0; + } +} + +static void brw_translate_vertex_elements(struct brw_context *brw, + struct brw_vertex_element_packet *brw_velems, + const struct pipe_vertex_element *attribs, + unsigned count) +{ + unsigned i; + + /* If the VS doesn't read any inputs (calculating vertex position from + * a state variable for some reason, for example), emit a single pad + * VERTEX_ELEMENT struct and bail. + * + * The stale VB state stays in place, but they don't do anything unless + * a VE loads from them. + */ + brw_velems->header.opcode = CMD_VERTEX_ELEMENT; + + if (count == 0) { + brw_velems->header.length = 1; + brw_velems->ve[0].ve0.src_offset = 0; + brw_velems->ve[0].ve0.src_format = BRW_SURFACEFORMAT_R32G32B32A32_FLOAT; + brw_velems->ve[0].ve0.valid = 1; + brw_velems->ve[0].ve0.vertex_buffer_index = 0; + brw_velems->ve[0].ve1.dst_offset = 0; + brw_velems->ve[0].ve1.vfcomponent0 = BRW_VE1_COMPONENT_STORE_0; + brw_velems->ve[0].ve1.vfcomponent1 = BRW_VE1_COMPONENT_STORE_0; + brw_velems->ve[0].ve1.vfcomponent2 = BRW_VE1_COMPONENT_STORE_0; + brw_velems->ve[0].ve1.vfcomponent3 = BRW_VE1_COMPONENT_STORE_1_FLT; + return; + } + + + /* Now emit vertex element (VEP) state packets. + * + */ + brw_velems->header.length = (1 + count * 2) - 2; + for (i = 0; i < count; i++) { + const struct pipe_vertex_element *input = &attribs[i]; + unsigned nr_components = util_format_get_nr_components(input->src_format); + + uint32_t format = brw_translate_surface_format( input->src_format ); + uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC; + uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC; + uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC; + uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC; + + switch (nr_components) { + case 0: comp0 = BRW_VE1_COMPONENT_STORE_0; /* fallthrough */ + case 1: comp1 = BRW_VE1_COMPONENT_STORE_0; /* fallthrough */ + case 2: comp2 = BRW_VE1_COMPONENT_STORE_0; /* fallthrough */ + case 3: comp3 = BRW_VE1_COMPONENT_STORE_1_FLT; + break; + } + + brw_velems->ve[i].ve0.src_offset = input->src_offset; + brw_velems->ve[i].ve0.src_format = format; + brw_velems->ve[i].ve0.valid = 1; + brw_velems->ve[i].ve0.vertex_buffer_index = input->vertex_buffer_index; + brw_velems->ve[i].ve1.vfcomponent0 = comp0; + brw_velems->ve[i].ve1.vfcomponent1 = comp1; + brw_velems->ve[i].ve1.vfcomponent2 = comp2; + brw_velems->ve[i].ve1.vfcomponent3 = comp3; + + if (BRW_IS_IGDNG(brw)) + brw_velems->ve[i].ve1.dst_offset = 0; + else + brw_velems->ve[i].ve1.dst_offset = i * 4; + } +} + +static void* brw_create_vertex_elements_state( struct pipe_context *pipe, + unsigned count, + const struct pipe_vertex_element *attribs ) { + /* note: for the brw_swtnl.c code (if ever we need draw fallback) we'd also need + to store the original data */ struct brw_context *brw = brw_context(pipe); + struct brw_vertex_element_packet *velems; + assert(count <= BRW_VEP_MAX); + velems = (struct brw_vertex_element_packet *) MALLOC(sizeof(struct brw_vertex_element_packet)); + if (velems) { + brw_translate_vertex_elements(brw, velems, attribs, count); + } + return velems; +} - memcpy(brw->curr.vertex_element, elements, count * sizeof(elements[0])); - brw->curr.num_vertex_elements = count; +static void brw_bind_vertex_elements_state(struct pipe_context *pipe, + void *velems) +{ + struct brw_context *brw = brw_context(pipe); + struct brw_vertex_element_packet *brw_velems = (struct brw_vertex_element_packet *) velems; + + brw->curr.velems = brw_velems; brw->state.dirty.mesa |= PIPE_NEW_VERTEX_ELEMENT; } +static void brw_delete_vertex_elements_state(struct pipe_context *pipe, void *velems) +{ + FREE( velems ); +} + static void brw_set_vertex_buffers(struct pipe_context *pipe, - unsigned count, - const struct pipe_vertex_buffer *buffers) + unsigned count, + const struct pipe_vertex_buffer *buffers) { struct brw_context *brw = brw_context(pipe); unsigned i; @@ -30,11 +259,11 @@ static void brw_set_vertex_buffers(struct pipe_context *pipe, /* Adjust refcounts */ for (i = 0; i < count; i++) - pipe_buffer_reference(&brw->curr.vertex_buffer[i].buffer, + pipe_resource_reference(&brw->curr.vertex_buffer[i].buffer, buffers[i].buffer); for ( ; i < brw->curr.num_vertex_buffers; i++) - pipe_buffer_reference(&brw->curr.vertex_buffer[i].buffer, + pipe_resource_reference(&brw->curr.vertex_buffer[i].buffer, NULL); /* Copy remaining data */ @@ -49,7 +278,9 @@ void brw_pipe_vertex_init( struct brw_context *brw ) { brw->base.set_vertex_buffers = brw_set_vertex_buffers; - brw->base.set_vertex_elements = brw_set_vertex_elements; + brw->base.create_vertex_elements_state = brw_create_vertex_elements_state; + brw->base.bind_vertex_elements_state = brw_bind_vertex_elements_state; + brw->base.delete_vertex_elements_state = brw_delete_vertex_elements_state; } diff --git a/src/gallium/drivers/i965/brw_reg.h b/src/gallium/drivers/i965/brw_reg.h index a63403b6afd..ba10f9d5df1 100644 --- a/src/gallium/drivers/i965/brw_reg.h +++ b/src/gallium/drivers/i965/brw_reg.h @@ -109,7 +109,7 @@ struct brw_chipset { /* XXX: hacks */ #define VERT_RESULT_HPOS 0 /* not always true */ -#define VERT_RESULT_PSIZ 10000 /* disabled */ +#define VERT_RESULT_PSIZ 127 /* disabled */ #endif diff --git a/src/gallium/drivers/i965/brw_resource.c b/src/gallium/drivers/i965/brw_resource.c new file mode 100644 index 00000000000..d601f42dd16 --- /dev/null +++ b/src/gallium/drivers/i965/brw_resource.c @@ -0,0 +1,50 @@ +#include "util/u_debug.h" + +#include "brw_resource.h" +#include "brw_context.h" +#include "brw_screen.h" + + +static struct pipe_resource * +brw_resource_create(struct pipe_screen *screen, + const struct pipe_resource *template) +{ + if (template->target == PIPE_BUFFER) + return brw_buffer_create(screen, template); + else + return brw_resource_create(screen, template); + +} + +static struct pipe_resource * +brw_resource_from_handle(struct pipe_screen * screen, + const struct pipe_resource *template, + struct winsys_handle *whandle) +{ + if (template->target == PIPE_BUFFER) + return NULL; + else + return brw_texture_from_handle(screen, template, whandle); +} + + +void +brw_init_resource_functions(struct brw_context *brw ) +{ + brw->base.get_transfer = u_get_transfer_vtbl; + brw->base.transfer_map = u_transfer_map_vtbl; + brw->base.transfer_flush_region = u_transfer_flush_region_vtbl; + brw->base.transfer_unmap = u_transfer_unmap_vtbl; + brw->base.transfer_destroy = u_transfer_destroy_vtbl; + brw->base.transfer_inline_write = u_transfer_inline_write_vtbl; +} + +void +brw_init_screen_resource_functions(struct brw_screen *is) +{ + is->base.resource_create = brw_resource_create; + is->base.resource_from_handle = brw_resource_from_handle; + is->base.resource_get_handle = u_resource_get_handle_vtbl; + is->base.resource_destroy = u_resource_destroy_vtbl; + is->base.user_buffer_create = brw_user_buffer_create; +} diff --git a/src/gallium/drivers/i965/brw_resource.h b/src/gallium/drivers/i965/brw_resource.h new file mode 100644 index 00000000000..3390c270d42 --- /dev/null +++ b/src/gallium/drivers/i965/brw_resource.h @@ -0,0 +1,151 @@ +/************************************************************************** + * + * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#ifndef BRW_RESOURCE_H +#define BRW_RESOURCE_H + +struct brw_screen; + +#include "util/u_transfer.h" +#include "util/u_debug.h" + +#include "brw_screen.h" /* for brw_surface */ + +struct brw_context; +struct brw_screen; + + +struct brw_buffer { + struct u_resource b; + + /* One of either bo or user_buffer will be non-null, depending on + * whether this is a hardware or user buffer. + */ + struct brw_winsys_buffer *bo; + void *user_buffer; + + /* Mapped pointer?? + */ + void *ptr; +}; + +#define BRW_MAX_TEXTURE_2D_LEVELS 11 /* max 1024x1024 */ +#define BRW_MAX_TEXTURE_3D_LEVELS 8 /* max 128x128x128 */ + + + +struct brw_texture { + struct u_resource b; + struct brw_winsys_buffer *bo; + struct brw_surface_state ss; + + unsigned *image_offset[BRW_MAX_TEXTURE_2D_LEVELS]; + unsigned nr_images[BRW_MAX_TEXTURE_2D_LEVELS]; + unsigned level_offset[BRW_MAX_TEXTURE_2D_LEVELS]; + + boolean compressed; + unsigned brw_target; + unsigned pitch; + unsigned tiling; + unsigned cpp; + unsigned total_height; + + struct brw_surface views[2]; +}; + + +void brw_init_screen_resource_functions(struct brw_screen *is); +void brw_init_resource_functions(struct brw_context *brw ); + +extern struct u_resource_vtbl brw_buffer_vtbl; +extern struct u_resource_vtbl brw_texture_vtbl; + +static INLINE struct brw_texture *brw_texture( struct pipe_resource *resource ) +{ + struct brw_texture *tex = (struct brw_texture *)resource; + assert(tex->b.vtbl == &brw_texture_vtbl); + return tex; +} + +static INLINE struct brw_buffer *brw_buffer( struct pipe_resource *resource ) +{ + struct brw_buffer *tex = (struct brw_buffer *)resource; + assert(tex->b.vtbl == &brw_buffer_vtbl); + return tex; +} + +struct pipe_resource * +brw_texture_create(struct pipe_screen *screen, + const struct pipe_resource *template); + +struct pipe_resource * +brw_texture_from_handle(struct pipe_screen * screen, + const struct pipe_resource *template, + struct winsys_handle *whandle); + + +struct pipe_resource * +brw_user_buffer_create(struct pipe_screen *screen, + void *ptr, + unsigned bytes, + unsigned usage); + +struct pipe_resource * +brw_buffer_create(struct pipe_screen *screen, + const struct pipe_resource *template); + + +/* +boolean +brw_is_format_supported( struct pipe_screen *screen, + enum pipe_format format, + enum pipe_texture_target target, + unsigned tex_usage, + unsigned geom_flags ); +*/ + +/* Pipe buffer helpers + */ +static INLINE boolean +brw_buffer_is_user_buffer( const struct pipe_resource *buf ) +{ + return ((const struct brw_buffer *)buf)->user_buffer != NULL; +} + + +/*********************************************************************** + * Internal functions + */ +GLboolean brw_texture_layout(struct brw_screen *brw_screen, + struct brw_texture *tex ); + +void brw_update_texture( struct brw_screen *brw_screen, + struct brw_texture *tex ); + + + +#endif /* BRW_RESOURCE_H */ diff --git a/src/gallium/drivers/i965/brw_resource_buffer.c b/src/gallium/drivers/i965/brw_resource_buffer.c new file mode 100644 index 00000000000..5f9e8a87c99 --- /dev/null +++ b/src/gallium/drivers/i965/brw_resource_buffer.c @@ -0,0 +1,201 @@ + +#include "util/u_memory.h" +#include "util/u_math.h" + +#include "pipe/p_state.h" +#include "pipe/p_defines.h" +#include "util/u_inlines.h" + +#include "brw_resource.h" +#include "brw_context.h" +#include "brw_batchbuffer.h" +#include "brw_winsys.h" + +static boolean +brw_buffer_get_handle(struct pipe_screen *screen, + struct pipe_resource *resource, + struct winsys_handle *handle) +{ + return FALSE; +} + + +static void +brw_buffer_destroy(struct pipe_screen *screen, + struct pipe_resource *resource) +{ + struct brw_buffer *buf = brw_buffer( resource ); + + bo_reference(&buf->bo, NULL); + FREE(buf); +} + + +static void * +brw_buffer_transfer_map( struct pipe_context *pipe, + struct pipe_transfer *transfer) +{ + struct brw_screen *bscreen = brw_screen(pipe->screen); + struct brw_winsys_screen *sws = bscreen->sws; + struct brw_buffer *buf = brw_buffer(transfer->resource); + unsigned offset = transfer->box.x; + unsigned length = transfer->box.width; + unsigned usage = transfer->usage; + uint8_t *map; + + if (buf->user_buffer) + map = buf->user_buffer; + else + map = sws->bo_map( buf->bo, + BRW_DATA_OTHER, + offset, + length, + (usage & PIPE_TRANSFER_WRITE) ? TRUE : FALSE, + (usage & PIPE_TRANSFER_DISCARD) ? TRUE : FALSE, + (usage & PIPE_TRANSFER_FLUSH_EXPLICIT) ? TRUE : FALSE); + + return map + offset; +} + + +static void +brw_buffer_transfer_flush_region( struct pipe_context *pipe, + struct pipe_transfer *transfer, + const struct pipe_box *box) +{ + struct brw_screen *bscreen = brw_screen(pipe->screen); + struct brw_winsys_screen *sws = bscreen->sws; + struct brw_buffer *buf = brw_buffer(transfer->resource); + unsigned offset = box->x; + unsigned length = box->width; + + if (buf->user_buffer) + return; + + sws->bo_flush_range( buf->bo, + offset, + length ); +} + + +static void +brw_buffer_transfer_unmap( struct pipe_context *pipe, + struct pipe_transfer *transfer) +{ + struct brw_screen *bscreen = brw_screen(pipe->screen); + struct brw_winsys_screen *sws = bscreen->sws; + struct brw_buffer *buf = brw_buffer( transfer->resource ); + + if (buf->bo) + sws->bo_unmap(buf->bo); +} + + +static unsigned brw_buffer_is_referenced( struct pipe_context *pipe, + struct pipe_resource *resource, + unsigned face, + unsigned level) +{ + struct brw_context *brw = brw_context(pipe); + struct brw_winsys_buffer *batch_bo = brw->batch->buf; + struct brw_buffer *buf = brw_buffer(resource); + + if (buf->bo == NULL) + return PIPE_UNREFERENCED; + + if (!brw_screen(pipe->screen)->sws->bo_references( batch_bo, buf->bo )) + return PIPE_UNREFERENCED; + + return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE; +} + + +struct u_resource_vtbl brw_buffer_vtbl = +{ + brw_buffer_get_handle, /* get_handle */ + brw_buffer_destroy, /* resource_destroy */ + brw_buffer_is_referenced, /* is_resource_referenced */ + u_default_get_transfer, /* get_transfer */ + u_default_transfer_destroy, /* transfer_destroy */ + brw_buffer_transfer_map, /* transfer_map */ + brw_buffer_transfer_flush_region, /* transfer_flush_region */ + brw_buffer_transfer_unmap, /* transfer_unmap */ + u_default_transfer_inline_write /* transfer_inline_write */ +}; + + +struct pipe_resource * +brw_buffer_create(struct pipe_screen *screen, + const struct pipe_resource *template) +{ + struct brw_screen *bscreen = brw_screen(screen); + struct brw_winsys_screen *sws = bscreen->sws; + struct brw_buffer *buf; + unsigned buffer_type; + enum pipe_error ret; + + buf = CALLOC_STRUCT(brw_buffer); + if (!buf) + return NULL; + + buf->b.b = *template; + buf->b.vtbl = &brw_buffer_vtbl; + pipe_reference_init(&buf->b.b.reference, 1); + buf->b.b.screen = screen; + + switch (template->bind & (PIPE_BIND_VERTEX_BUFFER | + PIPE_BIND_INDEX_BUFFER | + PIPE_BIND_CONSTANT_BUFFER)) + { + case PIPE_BIND_VERTEX_BUFFER: + case PIPE_BIND_INDEX_BUFFER: + case (PIPE_BIND_VERTEX_BUFFER|PIPE_BIND_INDEX_BUFFER): + buffer_type = BRW_BUFFER_TYPE_VERTEX; + break; + + case PIPE_BIND_CONSTANT_BUFFER: + buffer_type = BRW_BUFFER_TYPE_SHADER_CONSTANTS; + break; + + default: + buffer_type = BRW_BUFFER_TYPE_GENERIC; + break; + } + + ret = sws->bo_alloc( sws, buffer_type, + template->width0, + 64, /* alignment */ + &buf->bo ); + if (ret != PIPE_OK) + return NULL; + + return &buf->b.b; +} + + +struct pipe_resource * +brw_user_buffer_create(struct pipe_screen *screen, + void *ptr, + unsigned bytes, + unsigned bind) +{ + struct brw_buffer *buf; + + buf = CALLOC_STRUCT(brw_buffer); + if (!buf) + return NULL; + + pipe_reference_init(&buf->b.b.reference, 1); + buf->b.vtbl = &brw_buffer_vtbl; + buf->b.b.screen = screen; + buf->b.b.format = PIPE_FORMAT_R8_UNORM; /* ?? */ + buf->b.b.usage = PIPE_USAGE_IMMUTABLE; + buf->b.b.bind = bind; + buf->b.b.width0 = bytes; + buf->b.b.height0 = 1; + buf->b.b.depth0 = 1; + + buf->user_buffer = ptr; + + return &buf->b.b; +} diff --git a/src/gallium/drivers/i965/brw_screen_texture.c b/src/gallium/drivers/i965/brw_resource_texture.c index e38fdf1869b..07537fe44ef 100644 --- a/src/gallium/drivers/i965/brw_screen_texture.c +++ b/src/gallium/drivers/i965/brw_resource_texture.c @@ -37,8 +37,27 @@ #include "brw_defines.h" #include "brw_structs.h" #include "brw_winsys.h" +#include "brw_batchbuffer.h" +#include "brw_context.h" +#include "brw_resource.h" +/** + * Subclass of pipe_transfer + */ +struct brw_transfer +{ + struct pipe_transfer base; + + unsigned offset; +}; + +static INLINE struct brw_transfer * +brw_transfer(struct pipe_transfer *transfer) +{ + return (struct brw_transfer *)transfer; +} + static GLuint translate_tex_target( unsigned target ) { @@ -156,7 +175,7 @@ static GLuint translate_tex_format( enum pipe_format pf ) case PIPE_FORMAT_Z16_UNORM: return BRW_SURFACEFORMAT_I16_UNORM; - case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: case PIPE_FORMAT_Z24X8_UNORM: return BRW_SURFACEFORMAT_I24X8_UNORM; @@ -180,12 +199,176 @@ static GLuint translate_tex_format( enum pipe_format pf ) } +static boolean +brw_texture_get_handle(struct pipe_screen *screen, + struct pipe_resource *texture, + struct winsys_handle *whandle) +{ + struct brw_screen *bscreen = brw_screen(screen); + struct brw_texture *tex = brw_texture(texture); + unsigned stride; + + stride = tex->pitch * tex->cpp; + + return bscreen->sws->bo_get_handle(tex->bo, whandle, stride); +} + + + +static void brw_texture_destroy(struct pipe_screen *screen, + struct pipe_resource *pt) +{ + struct brw_texture *tex = brw_texture(pt); + bo_reference(&tex->bo, NULL); + FREE(pt); +} + + + + +static unsigned brw_texture_is_referenced( struct pipe_context *pipe, + struct pipe_resource *texture, + unsigned face, + unsigned level ) +{ + struct brw_context *brw = brw_context(pipe); + struct brw_screen *bscreen = brw_screen(pipe->screen); + struct brw_winsys_buffer *batch_bo = brw->batch->buf; + struct brw_texture *tex = brw_texture(texture); + struct brw_surface *surf; + int i; + + /* XXX: this is subject to false positives if the underlying + * texture BO is referenced, we can't tell whether the sub-region + * we care about participates in that. + */ + if (bscreen->sws->bo_references( batch_bo, tex->bo )) + return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE; + + /* Find any view on this texture for this face/level and see if it + * is referenced: + */ + for (i = 0; i < 2; i++) { + foreach (surf, &tex->views[i]) { + if (surf->bo == tex->bo) + continue; + if (surf->id.bits.face != face || + surf->id.bits.level != level) + continue; + + if (bscreen->sws->bo_references( batch_bo, surf->bo)) + return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE; + } + } + return PIPE_UNREFERENCED; +} -static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, - const struct pipe_texture *templ ) +/* + * Transfer functions + */ + + +static struct pipe_transfer * +brw_texture_get_transfer(struct pipe_context *context, + struct pipe_resource *resource, + struct pipe_subresource sr, + unsigned usage, + const struct pipe_box *box) +{ + struct brw_texture *tex = brw_texture(resource); + struct pipe_transfer *transfer = CALLOC_STRUCT(pipe_transfer); + if (transfer == NULL) + return NULL; + + transfer->resource = resource; + transfer->sr = sr; + transfer->usage = usage; + transfer->box = *box; + transfer->stride = tex->pitch * tex->cpp; + + return transfer; +} + + +static void * +brw_texture_transfer_map(struct pipe_context *pipe, + struct pipe_transfer *transfer) +{ + struct pipe_resource *resource = transfer->resource; + struct brw_texture *tex = brw_texture(transfer->resource); + struct brw_winsys_screen *sws = brw_screen(pipe->screen)->sws; + struct pipe_subresource sr = transfer->sr; + struct pipe_box *box = &transfer->box; + enum pipe_format format = resource->format; + unsigned usage = transfer->usage; + unsigned offset; + char *map; + + if (resource->target == PIPE_TEXTURE_CUBE) { + offset = tex->image_offset[sr.level][sr.face]; + } + else if (resource->target == PIPE_TEXTURE_3D) { + offset = tex->image_offset[sr.level][box->z]; + } + else { + offset = tex->image_offset[sr.level][0]; + assert(sr.face == 0); + assert(box->z == 0); + } + + map = sws->bo_map(tex->bo, + BRW_DATA_OTHER, + 0, + tex->bo->size, + (usage & PIPE_TRANSFER_WRITE) ? TRUE : FALSE, + (usage & 0) ? TRUE : FALSE, + (usage & 0) ? TRUE : FALSE); + + if (!map) + return NULL; + + return map + offset + + box->y / util_format_get_blockheight(format) * transfer->stride + + box->x / util_format_get_blockwidth(format) * util_format_get_blocksize(format); +} + +static void +brw_texture_transfer_unmap(struct pipe_context *pipe, + struct pipe_transfer *transfer) +{ + struct brw_texture *tex = brw_texture(transfer->resource); + struct brw_winsys_screen *sws = brw_screen(pipe->screen)->sws; + + sws->bo_unmap(tex->bo); +} + + + + + +struct u_resource_vtbl brw_texture_vtbl = +{ + brw_texture_get_handle, /* get_handle */ + brw_texture_destroy, /* resource_destroy */ + brw_texture_is_referenced, /* is_resource_referenced */ + brw_texture_get_transfer, /* get_transfer */ + u_default_transfer_destroy, /* transfer_destroy */ + brw_texture_transfer_map, /* transfer_map */ + u_default_transfer_flush_region, /* transfer_flush_region */ + brw_texture_transfer_unmap, /* transfer_unmap */ + u_default_transfer_inline_write /* transfer_inline_write */ +}; + + + + + +struct pipe_resource * +brw_texture_create( struct pipe_screen *screen, + const struct pipe_resource *template ) { struct brw_screen *bscreen = brw_screen(screen); struct brw_texture *tex; @@ -197,14 +380,15 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, if (tex == NULL) return NULL; - memcpy(&tex->base, templ, sizeof *templ); - pipe_reference_init(&tex->base.reference, 1); - tex->base.screen = screen; + tex->b.b = *template; + tex->b.vtbl = &brw_texture_vtbl; + pipe_reference_init(&tex->b.b.reference, 1); + tex->b.b.screen = screen; /* XXX: compressed textures need special treatment here */ - tex->cpp = util_format_get_blocksize(tex->base.format); - tex->compressed = util_format_is_compressed(tex->base.format); + tex->cpp = util_format_get_blocksize(tex->b.b.format); + tex->compressed = util_format_is_s3tc(tex->b.b.format); make_empty_list(&tex->views[0]); make_empty_list(&tex->views[1]); @@ -215,7 +399,7 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, !bscreen->no_tiling) { if (bscreen->chipset.is_965 && - util_format_is_depth_or_stencil(templ->format)) + util_format_is_depth_or_stencil(template->format)) tex->tiling = BRW_TILING_Y; else tex->tiling = BRW_TILING_X; @@ -225,14 +409,12 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, } - - if (!brw_texture_layout( bscreen, tex )) goto fail; - if (templ->tex_usage & (PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_PRIMARY)) { + if (template->bind & (PIPE_BIND_SCANOUT | + PIPE_BIND_SHARED)) { buffer_type = BRW_BUFFER_TYPE_SCANOUT; } else { @@ -248,9 +430,9 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, goto fail; tex->ss.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW; - tex->ss.ss0.surface_type = translate_tex_target(tex->base.target); + tex->ss.ss0.surface_type = translate_tex_target(tex->b.b.target); - format = translate_tex_format(tex->base.format); + format = translate_tex_format(tex->b.b.format); assert(format != BRW_SURFACEFORMAT_INVALID); tex->ss.ss0.surface_format = format; @@ -262,9 +444,9 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, /* XXX: what happens when tex->bo->offset changes??? */ tex->ss.ss1.base_addr = 0; /* reloc */ - tex->ss.ss2.mip_count = tex->base.last_level; - tex->ss.ss2.width = tex->base.width0 - 1; - tex->ss.ss2.height = tex->base.height0 - 1; + tex->ss.ss2.mip_count = tex->b.b.last_level; + tex->ss.ss2.width = tex->b.b.width0 - 1; + tex->ss.ss2.height = tex->b.b.height0 - 1; switch (tex->tiling) { case BRW_TILING_NONE: @@ -282,11 +464,11 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, } tex->ss.ss3.pitch = (tex->pitch * tex->cpp) - 1; - tex->ss.ss3.depth = tex->base.depth0 - 1; + tex->ss.ss3.depth = tex->b.b.depth0 - 1; tex->ss.ss4.min_lod = 0; - if (tex->base.target == PIPE_TEXTURE_CUBE) { + if (tex->b.b.target == PIPE_TEXTURE_CUBE) { tex->ss.ss0.cube_pos_x = 1; tex->ss.ss0.cube_pos_y = 1; tex->ss.ss0.cube_pos_z = 1; @@ -295,7 +477,7 @@ static struct pipe_texture *brw_texture_create( struct pipe_screen *screen, tex->ss.ss0.cube_neg_z = 1; } - return &tex->base; + return &tex->b.b; fail: bo_reference(&tex->bo, NULL); @@ -303,201 +485,42 @@ fail: return NULL; } -static struct pipe_texture *brw_texture_blanket(struct pipe_screen *screen, - const struct pipe_texture *templ, - const unsigned *stride, - struct pipe_buffer *buffer) -{ - return NULL; -} - -static void brw_texture_destroy(struct pipe_texture *pt) -{ - struct brw_texture *tex = brw_texture(pt); - bo_reference(&tex->bo, NULL); - FREE(pt); -} - - -static boolean brw_is_format_supported( struct pipe_screen *screen, - enum pipe_format format, - enum pipe_texture_target target, - unsigned tex_usage, - unsigned geom_flags ) -{ - return translate_tex_format(format) != BRW_SURFACEFORMAT_INVALID; -} - - -boolean brw_is_texture_referenced_by_bo( struct brw_screen *brw_screen, - struct pipe_texture *texture, - unsigned face, - unsigned level, - struct brw_winsys_buffer *bo ) -{ - struct brw_texture *tex = brw_texture(texture); - struct brw_surface *surf; - int i; - - /* XXX: this is subject to false positives if the underlying - * texture BO is referenced, we can't tell whether the sub-region - * we care about participates in that. - */ - if (brw_screen->sws->bo_references( bo, tex->bo )) - return TRUE; - - /* Find any view on this texture for this face/level and see if it - * is referenced: - */ - for (i = 0; i < 2; i++) { - foreach (surf, &tex->views[i]) { - if (surf->bo == tex->bo) - continue; - - if (surf->id.bits.face != face || - surf->id.bits.level != level) - continue; - - if (brw_screen->sws->bo_references( bo, surf->bo)) - return TRUE; - } - } - - return FALSE; -} - - -/* - * Transfer functions - */ - -static struct pipe_transfer* -brw_get_tex_transfer(struct pipe_screen *screen, - struct pipe_texture *texture, - unsigned face, unsigned level, unsigned zslice, - enum pipe_transfer_usage usage, unsigned x, unsigned y, - unsigned w, unsigned h) -{ - struct brw_texture *tex = brw_texture(texture); - struct brw_transfer *trans; - unsigned offset; /* in bytes */ - - if (texture->target == PIPE_TEXTURE_CUBE) { - offset = tex->image_offset[level][face]; - } else if (texture->target == PIPE_TEXTURE_3D) { - offset = tex->image_offset[level][zslice]; - } else { - offset = tex->image_offset[level][0]; - assert(face == 0); - assert(zslice == 0); - } - - trans = CALLOC_STRUCT(brw_transfer); - if (trans) { - pipe_texture_reference(&trans->base.texture, texture); - trans->base.x = x; - trans->base.y = y; - trans->base.width = w; - trans->base.height = h; - trans->base.stride = tex->pitch * tex->cpp; - trans->offset = offset; - trans->base.usage = usage; - } - return &trans->base; -} - -static void * -brw_transfer_map(struct pipe_screen *screen, - struct pipe_transfer *transfer) -{ - struct brw_texture *tex = brw_texture(transfer->texture); - struct brw_winsys_screen *sws = brw_screen(screen)->sws; - char *map; - unsigned usage = transfer->usage; - - map = sws->bo_map(tex->bo, - BRW_DATA_OTHER, - 0, - tex->bo->size, - (usage & PIPE_TRANSFER_WRITE) ? TRUE : FALSE, - (usage & 0) ? TRUE : FALSE, - (usage & 0) ? TRUE : FALSE); - - if (!map) - return NULL; - - /* XXX: blocksize and compressed textures - */ - return map + brw_transfer(transfer)->offset + - transfer->y /* / transfer->block.height */ * transfer->stride + - transfer->x /* / transfer->block.width */ * brw_texture(transfer->texture)->cpp; -} -static void -brw_transfer_unmap(struct pipe_screen *screen, - struct pipe_transfer *transfer) -{ - struct brw_texture *tex = brw_texture(transfer->texture); - struct brw_winsys_screen *sws = brw_screen(screen)->sws; - - sws->bo_unmap(tex->bo); -} - -static void -brw_tex_transfer_destroy(struct pipe_transfer *trans) -{ - pipe_texture_reference(&trans->texture, NULL); - FREE(trans); -} - - -/* - * Functions exported to the winsys - */ - -boolean brw_texture_get_winsys_buffer(struct pipe_texture *texture, - struct brw_winsys_buffer **buffer, - unsigned *stride) -{ - struct brw_texture *tex = brw_texture(texture); - - *buffer = tex->bo; - if (stride) - *stride = tex->pitch * tex->cpp; - - return TRUE; -} - -struct pipe_texture * -brw_texture_blanket_winsys_buffer(struct pipe_screen *screen, - const struct pipe_texture *templ, - unsigned pitch, - unsigned tiling, - struct brw_winsys_buffer *buffer) +struct pipe_resource * +brw_texture_from_handle(struct pipe_screen *screen, + const struct pipe_resource *template, + struct winsys_handle *whandle) { struct brw_screen *bscreen = brw_screen(screen); struct brw_texture *tex; + struct brw_winsys_buffer *buffer; + unsigned tiling; + unsigned pitch; GLuint format; - if (templ->target != PIPE_TEXTURE_2D || - templ->last_level != 0 || - templ->depth0 != 1) + if (template->target != PIPE_TEXTURE_2D || + template->last_level != 0 || + template->depth0 != 1) return NULL; - if (util_format_is_compressed(templ->format)) + if (util_format_is_s3tc(template->format)) return NULL; tex = CALLOC_STRUCT(brw_texture); if (!tex) return NULL; - memcpy(&tex->base, templ, sizeof *templ); - pipe_reference_init(&tex->base.reference, 1); - tex->base.screen = screen; + if (bscreen->sws->bo_from_handle(bscreen->sws, whandle, &pitch, &tiling, &buffer) != PIPE_OK) + goto fail; + + tex->b.b = *template; + tex->b.vtbl = &brw_texture_vtbl; + pipe_reference_init(&tex->b.b.reference, 1); + tex->b.b.screen = screen; /* XXX: cpp vs. blocksize */ - tex->cpp = util_format_get_blocksize(tex->base.format); + tex->cpp = util_format_get_blocksize(tex->b.b.format); tex->tiling = tiling; make_empty_list(&tex->views[0]); @@ -521,9 +544,9 @@ brw_texture_blanket_winsys_buffer(struct pipe_screen *screen, #endif tex->ss.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW; - tex->ss.ss0.surface_type = translate_tex_target(tex->base.target); + tex->ss.ss0.surface_type = translate_tex_target(tex->b.b.target); - format = translate_tex_format(tex->base.format); + format = translate_tex_format(tex->b.b.format); assert(format != BRW_SURFACEFORMAT_INVALID); tex->ss.ss0.surface_format = format; @@ -535,9 +558,9 @@ brw_texture_blanket_winsys_buffer(struct pipe_screen *screen, /* XXX: what happens when tex->bo->offset changes??? */ tex->ss.ss1.base_addr = 0; /* reloc */ - tex->ss.ss2.mip_count = tex->base.last_level; - tex->ss.ss2.width = tex->base.width0 - 1; - tex->ss.ss2.height = tex->base.height0 - 1; + tex->ss.ss2.mip_count = tex->b.b.last_level; + tex->ss.ss2.width = tex->b.b.width0 - 1; + tex->ss.ss2.height = tex->b.b.height0 - 1; switch (tex->tiling) { case BRW_TILING_NONE: @@ -555,25 +578,25 @@ brw_texture_blanket_winsys_buffer(struct pipe_screen *screen, } tex->ss.ss3.pitch = (tex->pitch * tex->cpp) - 1; - tex->ss.ss3.depth = tex->base.depth0 - 1; + tex->ss.ss3.depth = tex->b.b.depth0 - 1; tex->ss.ss4.min_lod = 0; - return &tex->base; + return &tex->b.b; fail: FREE(tex); return NULL; } -void brw_screen_tex_init( struct brw_screen *brw_screen ) + +#if 0 +boolean brw_is_format_supported( struct pipe_screen *screen, + enum pipe_format format, + enum pipe_texture_target target, + unsigned tex_usage, + unsigned geom_flags ) { - brw_screen->base.is_format_supported = brw_is_format_supported; - brw_screen->base.texture_create = brw_texture_create; - brw_screen->base.texture_destroy = brw_texture_destroy; - brw_screen->base.texture_blanket = brw_texture_blanket; - brw_screen->base.get_tex_transfer = brw_get_tex_transfer; - brw_screen->base.transfer_map = brw_transfer_map; - brw_screen->base.transfer_unmap = brw_transfer_unmap; - brw_screen->base.tex_transfer_destroy = brw_tex_transfer_destroy; + return translate_tex_format(format) != BRW_SURFACEFORMAT_INVALID; } +#endif diff --git a/src/gallium/drivers/i965/brw_screen_tex_layout.c b/src/gallium/drivers/i965/brw_resource_texture_layout.c index 894f4bea401..2187bdd82ce 100644 --- a/src/gallium/drivers/i965/brw_screen_tex_layout.c +++ b/src/gallium/drivers/i965/brw_resource_texture_layout.c @@ -30,7 +30,7 @@ #include "util/u_math.h" #include "util/u_memory.h" -#include "brw_screen.h" +#include "brw_resource.h" #include "brw_debug.h" #include "brw_winsys.h" @@ -143,14 +143,14 @@ static void brw_layout_2d( struct brw_texture *tex ) GLuint level; GLuint x = 0; GLuint y = 0; - GLuint width = tex->base.width0; - GLuint height = tex->base.height0; + GLuint width = tex->b.b.width0; + GLuint height = tex->b.b.height0; - tex->pitch = tex->base.width0; - brw_tex_alignment_unit(tex->base.format, &align_w, &align_h); + tex->pitch = tex->b.b.width0; + brw_tex_alignment_unit(tex->b.b.format, &align_w, &align_h); if (tex->compressed) { - tex->pitch = align(tex->base.width0, align_w); + tex->pitch = align(tex->b.b.width0, align_w); } /* May need to adjust pitch to accomodate the placement of @@ -158,15 +158,15 @@ static void brw_layout_2d( struct brw_texture *tex ) * constraints of mipmap placement push the right edge of the * 2nd mipmap out past the width of its parent. */ - if (tex->base.last_level > 0) { + if (tex->b.b.last_level > 0) { GLuint mip1_width; if (tex->compressed) { - mip1_width = (align(u_minify(tex->base.width0, 1), align_w) + - align(u_minify(tex->base.width0, 2), align_w)); + mip1_width = (align(u_minify(tex->b.b.width0, 1), align_w) + + align(u_minify(tex->b.b.width0, 2), align_w)); } else { - mip1_width = (align(u_minify(tex->base.width0, 1), align_w) + - u_minify(tex->base.width0, 2)); + mip1_width = (align(u_minify(tex->b.b.width0, 1), align_w) + + u_minify(tex->b.b.width0, 2)); } if (mip1_width > tex->pitch) { @@ -180,7 +180,7 @@ static void brw_layout_2d( struct brw_texture *tex ) tex->pitch = brw_tex_pitch_align (tex, tex->pitch); tex->total_height = 0; - for ( level = 0 ; level <= tex->base.last_level ; level++ ) { + for ( level = 0 ; level <= tex->b.b.last_level ; level++ ) { GLuint img_height; brw_tex_set_level_info(tex, level, 1, x, y, width, height, 1); @@ -218,28 +218,28 @@ brw_layout_cubemap_idgng( struct brw_texture *tex ) GLuint level; GLuint x = 0; GLuint y = 0; - GLuint width = tex->base.width0; - GLuint height = tex->base.height0; + GLuint width = tex->b.b.width0; + GLuint height = tex->b.b.height0; GLuint qpitch = 0; GLuint y_pitch = 0; - tex->pitch = tex->base.width0; - brw_tex_alignment_unit(tex->base.format, &align_w, &align_h); + tex->pitch = tex->b.b.width0; + brw_tex_alignment_unit(tex->b.b.format, &align_w, &align_h); y_pitch = align(height, align_h); if (tex->compressed) { - tex->pitch = align(tex->base.width0, align_w); + tex->pitch = align(tex->b.b.width0, align_w); } - if (tex->base.last_level != 0) { + if (tex->b.b.last_level != 0) { GLuint mip1_width; if (tex->compressed) { - mip1_width = (align(u_minify(tex->base.width0, 1), align_w) + - align(u_minify(tex->base.width0, 2), align_w)); + mip1_width = (align(u_minify(tex->b.b.width0, 1), align_w) + + align(u_minify(tex->b.b.width0, 2), align_w)); } else { - mip1_width = (align(u_minify(tex->base.width0, 1), align_w) + - u_minify(tex->base.width0, 2)); + mip1_width = (align(u_minify(tex->b.b.width0, 1), align_w) + + u_minify(tex->b.b.width0, 2)); } if (mip1_width > tex->pitch) { @@ -267,7 +267,7 @@ brw_layout_cubemap_idgng( struct brw_texture *tex ) 11 * align_h) * 6; } - for (level = 0; level <= tex->base.last_level; level++) { + for (level = 0; level <= tex->b.b.last_level; level++) { GLuint img_height; GLuint nr_images = 6; GLuint q = 0; @@ -300,9 +300,9 @@ brw_layout_cubemap_idgng( struct brw_texture *tex ) static boolean brw_layout_3d_cube( struct brw_texture *tex ) { - GLuint width = tex->base.width0; - GLuint height = tex->base.height0; - GLuint depth = tex->base.depth0; + GLuint width = tex->b.b.width0; + GLuint height = tex->b.b.height0; + GLuint depth = tex->b.b.depth0; GLuint pack_x_pitch, pack_x_nr; GLuint pack_y_pitch; GLuint level; @@ -310,21 +310,21 @@ brw_layout_3d_cube( struct brw_texture *tex ) GLuint align_w = 4; tex->total_height = 0; - brw_tex_alignment_unit(tex->base.format, &align_w, &align_h); + brw_tex_alignment_unit(tex->b.b.format, &align_w, &align_h); if (tex->compressed) { tex->pitch = align(width, align_w); pack_y_pitch = (height + 3) / 4; } else { - tex->pitch = brw_tex_pitch_align(tex, tex->base.width0); - pack_y_pitch = align(tex->base.height0, align_h); + tex->pitch = brw_tex_pitch_align(tex, tex->b.b.width0); + pack_y_pitch = align(tex->b.b.height0, align_h); } pack_x_pitch = width; pack_x_nr = 1; - for (level = 0 ; level <= tex->base.last_level ; level++) { - GLuint nr_images = tex->base.target == PIPE_TEXTURE_3D ? depth : 6; + for (level = 0 ; level <= tex->b.b.last_level ; level++) { + GLuint nr_images = tex->b.b.target == PIPE_TEXTURE_3D ? depth : 6; GLint x = 0; GLint y = 0; GLint q, j; @@ -375,7 +375,7 @@ brw_layout_3d_cube( struct brw_texture *tex ) * memory. As a result, the docs say in Surface Padding Requirements: * Sampling Engine Surfaces that two extra rows of padding are required. */ - if (tex->base.target == PIPE_TEXTURE_CUBE) + if (tex->b.b.target == PIPE_TEXTURE_CUBE) tex->total_height += 2; return TRUE; @@ -386,7 +386,7 @@ brw_layout_3d_cube( struct brw_texture *tex ) GLboolean brw_texture_layout(struct brw_screen *brw_screen, struct brw_texture *tex ) { - switch (tex->base.target) { + switch (tex->b.b.target) { case PIPE_TEXTURE_CUBE: if (brw_screen->chipset.is_igdng) brw_layout_cubemap_idgng( tex ); diff --git a/src/gallium/drivers/i965/brw_screen.c b/src/gallium/drivers/i965/brw_screen.c index 66f3aad8b21..0a7151bde44 100644 --- a/src/gallium/drivers/i965/brw_screen.c +++ b/src/gallium/drivers/i965/brw_screen.c @@ -35,6 +35,7 @@ #include "brw_screen.h" #include "brw_winsys.h" #include "brw_debug.h" +#include "brw_resource.h" #ifdef DEBUG static const struct debug_named_value debug_names[] = { @@ -174,11 +175,11 @@ brw_get_param(struct pipe_screen *screen, int param) case PIPE_CAP_TEXTURE_SHADOW_MAP: return 1; case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: - return 11; /* max 1024x1024 */ + return BRW_MAX_TEXTURE_2D_LEVELS; case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: - return 8; /* max 128x128x128 */ + return BRW_MAX_TEXTURE_3D_LEVELS; case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: - return 11; /* max 1024x1024 */ + return BRW_MAX_TEXTURE_2D_LEVELS; case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: return 1; @@ -252,7 +253,7 @@ brw_is_format_supported(struct pipe_screen *screen, /* depth */ PIPE_FORMAT_Z32_FLOAT, PIPE_FORMAT_Z24X8_UNORM, - PIPE_FORMAT_Z24S8_UNORM, + PIPE_FORMAT_Z24_UNORM_S8_USCALED, PIPE_FORMAT_Z16_UNORM, /* signed */ PIPE_FORMAT_R8G8_SNORM, @@ -268,16 +269,16 @@ brw_is_format_supported(struct pipe_screen *screen, static const enum pipe_format depth_supported[] = { PIPE_FORMAT_Z32_FLOAT, PIPE_FORMAT_Z24X8_UNORM, - PIPE_FORMAT_Z24S8_UNORM, + PIPE_FORMAT_Z24_UNORM_S8_USCALED, PIPE_FORMAT_Z16_UNORM, PIPE_FORMAT_NONE /* list terminator */ }; const enum pipe_format *list; uint i; - if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) + if (tex_usage & PIPE_BIND_DEPTH_STENCIL) list = depth_supported; - else if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) + else if (tex_usage & PIPE_BIND_RENDER_TARGET) list = render_supported; else list = tex_supported; @@ -406,9 +407,8 @@ brw_create_screen(struct brw_winsys_screen *sws, uint pci_id) bscreen->base.fence_signalled = brw_fence_signalled; bscreen->base.fence_finish = brw_fence_finish; - brw_screen_tex_init(bscreen); + brw_init_screen_resource_functions(bscreen); brw_screen_tex_surface_init(bscreen); - brw_screen_buffer_init(bscreen); bscreen->no_tiling = debug_get_option("BRW_NO_TILING", FALSE) != NULL; diff --git a/src/gallium/drivers/i965/brw_screen.h b/src/gallium/drivers/i965/brw_screen.h index 7226d9228b7..522a3bf8995 100644 --- a/src/gallium/drivers/i965/brw_screen.h +++ b/src/gallium/drivers/i965/brw_screen.h @@ -48,30 +48,6 @@ struct brw_screen boolean no_tiling; }; -/** - * Subclass of pipe_transfer - */ -struct brw_transfer -{ - struct pipe_transfer base; - - unsigned offset; -}; - -struct brw_buffer -{ - struct pipe_buffer base; - - /* One of either bo or user_buffer will be non-null, depending on - * whether this is a hardware or user buffer. - */ - struct brw_winsys_buffer *bo; - void *user_buffer; - - /* Mapped pointer?? - */ - void *ptr; -}; union brw_surface_id { @@ -101,28 +77,6 @@ struct brw_surface -struct brw_texture -{ - struct pipe_texture base; - struct brw_winsys_buffer *bo; - struct brw_surface_state ss; - - unsigned *image_offset[PIPE_MAX_TEXTURE_LEVELS]; - unsigned nr_images[PIPE_MAX_TEXTURE_LEVELS]; - unsigned level_offset[PIPE_MAX_TEXTURE_LEVELS]; - - boolean compressed; - unsigned brw_target; - unsigned pitch; - unsigned tiling; - unsigned cpp; - unsigned total_height; - - struct brw_surface views[2]; -}; - - - /* * Cast wrappers */ @@ -132,11 +86,6 @@ brw_screen(struct pipe_screen *pscreen) return (struct brw_screen *) pscreen; } -static INLINE struct brw_transfer * -brw_transfer(struct pipe_transfer *transfer) -{ - return (struct brw_transfer *)transfer; -} static INLINE struct brw_surface * brw_surface(struct pipe_surface *surface) @@ -144,56 +93,10 @@ brw_surface(struct pipe_surface *surface) return (struct brw_surface *)surface; } -static INLINE struct brw_buffer * -brw_buffer(struct pipe_buffer *buffer) -{ - return (struct brw_buffer *)buffer; -} - -static INLINE struct brw_texture * -brw_texture(struct pipe_texture *texture) -{ - return (struct brw_texture *)texture; -} - - -/* Pipe buffer helpers - */ -static INLINE boolean -brw_buffer_is_user_buffer( const struct pipe_buffer *buf ) -{ - return ((const struct brw_buffer *)buf)->user_buffer != NULL; -} - unsigned brw_surface_pitch( const struct pipe_surface *surface ); -/*********************************************************************** - * Internal functions - */ -GLboolean brw_texture_layout(struct brw_screen *brw_screen, - struct brw_texture *tex ); - -void brw_update_texture( struct brw_screen *brw_screen, - struct brw_texture *tex ); - - -void brw_screen_tex_init( struct brw_screen *brw_screen ); void brw_screen_tex_surface_init( struct brw_screen *brw_screen ); -void brw_screen_buffer_init(struct brw_screen *brw_screen); - - -boolean brw_is_texture_referenced_by_bo( struct brw_screen *brw_screen, - struct pipe_texture *texture, - unsigned face, - unsigned level, - struct brw_winsys_buffer *bo ); - -boolean brw_is_buffer_referenced_by_bo( struct brw_screen *brw_screen, - struct pipe_buffer *buffer, - struct brw_winsys_buffer *bo ); - - #endif /* BRW_SCREEN_H */ diff --git a/src/gallium/drivers/i965/brw_screen_buffers.c b/src/gallium/drivers/i965/brw_screen_buffers.c deleted file mode 100644 index 0b38885f40c..00000000000 --- a/src/gallium/drivers/i965/brw_screen_buffers.c +++ /dev/null @@ -1,202 +0,0 @@ - -#include "util/u_memory.h" -#include "util/u_math.h" - -#include "pipe/p_state.h" -#include "pipe/p_defines.h" -#include "util/u_inlines.h" - -#include "brw_screen.h" -#include "brw_winsys.h" - - - -static void * -brw_buffer_map_range( struct pipe_screen *screen, - struct pipe_buffer *buffer, - unsigned offset, - unsigned length, - unsigned usage ) -{ - struct brw_screen *bscreen = brw_screen(screen); - struct brw_winsys_screen *sws = bscreen->sws; - struct brw_buffer *buf = brw_buffer( buffer ); - - if (buf->user_buffer) - return buf->user_buffer; - - return sws->bo_map( buf->bo, - BRW_DATA_OTHER, - offset, - length, - (usage & PIPE_BUFFER_USAGE_CPU_WRITE) ? TRUE : FALSE, - (usage & PIPE_BUFFER_USAGE_DISCARD) ? TRUE : FALSE, - (usage & PIPE_BUFFER_USAGE_FLUSH_EXPLICIT) ? TRUE : FALSE); -} - -static void * -brw_buffer_map( struct pipe_screen *screen, - struct pipe_buffer *buffer, - unsigned usage ) -{ - struct brw_screen *bscreen = brw_screen(screen); - struct brw_winsys_screen *sws = bscreen->sws; - struct brw_buffer *buf = brw_buffer( buffer ); - - if (buf->user_buffer) - return buf->user_buffer; - - return sws->bo_map( buf->bo, - BRW_DATA_OTHER, - 0, - buf->base.size, - (usage & PIPE_BUFFER_USAGE_CPU_WRITE) ? TRUE : FALSE, - FALSE, - FALSE); -} - - -static void -brw_buffer_flush_mapped_range( struct pipe_screen *screen, - struct pipe_buffer *buffer, - unsigned offset, - unsigned length ) -{ - struct brw_screen *bscreen = brw_screen(screen); - struct brw_winsys_screen *sws = bscreen->sws; - struct brw_buffer *buf = brw_buffer( buffer ); - - if (buf->user_buffer) - return; - - sws->bo_flush_range( buf->bo, - offset, - length ); -} - - -static void -brw_buffer_unmap( struct pipe_screen *screen, - struct pipe_buffer *buffer ) -{ - struct brw_screen *bscreen = brw_screen(screen); - struct brw_winsys_screen *sws = bscreen->sws; - struct brw_buffer *buf = brw_buffer( buffer ); - - if (buf->bo) - sws->bo_unmap(buf->bo); -} - -static void -brw_buffer_destroy( struct pipe_buffer *buffer ) -{ - struct brw_buffer *buf = brw_buffer( buffer ); - - assert(!p_atomic_read(&buffer->reference.count)); - - bo_reference(&buf->bo, NULL); - FREE(buf); -} - - -static struct pipe_buffer * -brw_buffer_create(struct pipe_screen *screen, - unsigned alignment, - unsigned usage, - unsigned size) -{ - struct brw_screen *bscreen = brw_screen(screen); - struct brw_winsys_screen *sws = bscreen->sws; - struct brw_buffer *buf; - unsigned buffer_type; - enum pipe_error ret; - - buf = CALLOC_STRUCT(brw_buffer); - if (!buf) - return NULL; - - pipe_reference_init(&buf->base.reference, 1); - buf->base.screen = screen; - buf->base.alignment = alignment; - buf->base.usage = usage; - buf->base.size = size; - - switch (usage & (PIPE_BUFFER_USAGE_VERTEX | - PIPE_BUFFER_USAGE_INDEX | - PIPE_BUFFER_USAGE_PIXEL | - PIPE_BUFFER_USAGE_CONSTANT)) - { - case PIPE_BUFFER_USAGE_VERTEX: - case PIPE_BUFFER_USAGE_INDEX: - case (PIPE_BUFFER_USAGE_VERTEX|PIPE_BUFFER_USAGE_INDEX): - buffer_type = BRW_BUFFER_TYPE_VERTEX; - break; - - case PIPE_BUFFER_USAGE_PIXEL: - buffer_type = BRW_BUFFER_TYPE_PIXEL; - break; - - case PIPE_BUFFER_USAGE_CONSTANT: - buffer_type = BRW_BUFFER_TYPE_SHADER_CONSTANTS; - break; - - default: - buffer_type = BRW_BUFFER_TYPE_GENERIC; - break; - } - - ret = sws->bo_alloc( sws, buffer_type, - size, alignment, - &buf->bo ); - if (ret != PIPE_OK) - return NULL; - - return &buf->base; -} - - -static struct pipe_buffer * -brw_user_buffer_create(struct pipe_screen *screen, - void *ptr, - unsigned bytes) -{ - struct brw_buffer *buf; - - buf = CALLOC_STRUCT(brw_buffer); - if (!buf) - return NULL; - - buf->user_buffer = ptr; - - pipe_reference_init(&buf->base.reference, 1); - buf->base.screen = screen; - buf->base.alignment = 1; - buf->base.usage = 0; - buf->base.size = bytes; - - return &buf->base; -} - - -boolean brw_is_buffer_referenced_by_bo( struct brw_screen *brw_screen, - struct pipe_buffer *buffer, - struct brw_winsys_buffer *bo ) -{ - struct brw_buffer *buf = brw_buffer(buffer); - if (buf->bo == NULL) - return FALSE; - - return brw_screen->sws->bo_references( bo, buf->bo ); -} - - -void brw_screen_buffer_init(struct brw_screen *brw_screen) -{ - brw_screen->base.buffer_create = brw_buffer_create; - brw_screen->base.user_buffer_create = brw_user_buffer_create; - brw_screen->base.buffer_map = brw_buffer_map; - brw_screen->base.buffer_map_range = brw_buffer_map_range; - brw_screen->base.buffer_flush_mapped_range = brw_buffer_flush_mapped_range; - brw_screen->base.buffer_unmap = brw_buffer_unmap; - brw_screen->base.buffer_destroy = brw_buffer_destroy; -} diff --git a/src/gallium/drivers/i965/brw_screen_surface.c b/src/gallium/drivers/i965/brw_screen_surface.c index 904df813dda..f288fdbcd37 100644 --- a/src/gallium/drivers/i965/brw_screen_surface.c +++ b/src/gallium/drivers/i965/brw_screen_surface.c @@ -36,6 +36,7 @@ #include "pipe/p_screen.h" #include "brw_screen.h" #include "brw_defines.h" +#include "brw_resource.h" #include "brw_winsys.h" enum { @@ -138,9 +139,9 @@ static struct brw_surface *create_in_place_view( struct brw_screen *brw_screen, */ assert(id.bits.zslice == 0); - surface->base.format = tex->base.format; - surface->base.width = u_minify(tex->base.width0, id.bits.level); - surface->base.height = u_minify(tex->base.height0, id.bits.level); + surface->base.format = tex->b.b.format; + surface->base.width = u_minify(tex->b.b.width0, id.bits.level); + surface->base.height = u_minify(tex->b.b.height0, id.bits.level); surface->base.offset = tex->image_offset[id.bits.level][id.bits.face]; surface->base.usage = usage; surface->base.zslice = id.bits.zslice; @@ -152,7 +153,7 @@ static struct brw_surface *create_in_place_view( struct brw_screen *brw_screen, surface->tiling = tex->tiling; bo_reference( &surface->bo, tex->bo ); - pipe_texture_reference( &surface->base.texture, &tex->base ); + pipe_resource_reference( &surface->base.texture, &tex->b.b ); surface->ss.ss0.surface_format = tex->ss.ss0.surface_format; surface->ss.ss0.surface_type = BRW_SURFACE_2D; @@ -198,7 +199,7 @@ static struct brw_surface *create_in_place_view( struct brw_screen *brw_screen, /* Get a surface which is view into a texture */ static struct pipe_surface *brw_get_tex_surface(struct pipe_screen *screen, - struct pipe_texture *pt, + struct pipe_resource *pt, unsigned face, unsigned level, unsigned zslice, unsigned usage ) @@ -246,7 +247,7 @@ static void brw_tex_surface_destroy( struct pipe_surface *surf ) */ remove_from_list(surface); bo_reference(&surface->bo, NULL); - pipe_texture_reference( &surface->base.texture, NULL ); + pipe_resource_reference( &surface->base.texture, NULL ); FREE(surface); diff --git a/src/gallium/drivers/i965/brw_state_batch.c b/src/gallium/drivers/i965/brw_state_batch.c index 7d212e5c247..ce5ed0a9ed2 100644 --- a/src/gallium/drivers/i965/brw_state_batch.c +++ b/src/gallium/drivers/i965/brw_state_batch.c @@ -84,8 +84,8 @@ void brw_clear_batch_cache( struct brw_context *brw ) while (item) { struct brw_cached_batch_item *next = item->next; - free((void *)item->header); - free(item); + FREE((void *)item->header); + FREE(item); item = next; } diff --git a/src/gallium/drivers/i965/brw_structs.h b/src/gallium/drivers/i965/brw_structs.h index bf10bc04de7..e97ddeb5e1c 100644 --- a/src/gallium/drivers/i965/brw_structs.h +++ b/src/gallium/drivers/i965/brw_structs.h @@ -28,7 +28,7 @@ * Authors: * Keith Whitwell <[email protected]> */ - + #ifndef BRW_STRUCTS_H #define BRW_STRUCTS_H @@ -1149,7 +1149,7 @@ struct brw_vertex_element_state GLuint valid:1; GLuint vertex_buffer_index:5; } ve0; - + struct { GLuint dst_offset:8; diff --git a/src/gallium/drivers/i965/brw_util.c b/src/gallium/drivers/i965/brw_util.c deleted file mode 100644 index 1fd2e297137..00000000000 --- a/src/gallium/drivers/i965/brw_util.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - Copyright (C) Intel Corp. 2006. All Rights Reserved. - Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to - develop this 3D driver. - - Permission is hereby granted, free of charge, to any person obtaining - a copy of this software and associated documentation files (the - "Software"), to deal in the Software without restriction, including - without limitation the rights to use, copy, modify, merge, publish, - distribute, sublicense, and/or sell copies of the Software, and to - permit persons to whom the Software is furnished to do so, subject to - the following conditions: - - The above copyright notice and this permission notice (including the - next paragraph) shall be included in all copies or substantial - portions of the Software. - - THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. - IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE - LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION - OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION - WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - - **********************************************************************/ - /* - * Authors: - * Keith Whitwell <[email protected]> - */ - - - - - - diff --git a/src/gallium/drivers/i965/brw_vs_surface_state.c b/src/gallium/drivers/i965/brw_vs_surface_state.c index 004e3cb4e6f..424bb0d0dfb 100644 --- a/src/gallium/drivers/i965/brw_vs_surface_state.c +++ b/src/gallium/drivers/i965/brw_vs_surface_state.c @@ -82,7 +82,7 @@ brw_update_vs_constant_surface( struct brw_context *brw, GLuint surf) { struct brw_surface_key key; - struct pipe_buffer *cb = brw->curr.vs_constants; + struct pipe_resource *cb = brw->curr.vs_constants; enum pipe_error ret; assert(surf == 0); diff --git a/src/gallium/drivers/i965/brw_winsys.h b/src/gallium/drivers/i965/brw_winsys.h index c82d00f4a47..f30c7f18132 100644 --- a/src/gallium/drivers/i965/brw_winsys.h +++ b/src/gallium/drivers/i965/brw_winsys.h @@ -162,6 +162,16 @@ struct brw_winsys_screen { unsigned alignment, struct brw_winsys_buffer **bo_out); + enum pipe_error (*bo_from_handle)(struct brw_winsys_screen *sws, + struct winsys_handle *whandle, + unsigned *stride, + unsigned *tiling, + struct brw_winsys_buffer **bo_out); + + enum pipe_error (*bo_get_handle)(struct brw_winsys_buffer *buffer, + struct winsys_handle *whandle, + unsigned stride); + /* Destroy a buffer when our refcount goes to zero: */ void (*bo_destroy)(struct brw_winsys_buffer *buffer); @@ -257,28 +267,6 @@ bo_reference(struct brw_winsys_buffer **ptr, struct brw_winsys_buffer *buf) struct pipe_screen *brw_create_screen(struct brw_winsys_screen *iws, unsigned pci_id); -/** - * Get the brw_winsys buffer backing the texture. - * - * TODO UGLY - */ -struct pipe_texture; -boolean brw_texture_get_winsys_buffer(struct pipe_texture *texture, - struct brw_winsys_buffer **buffer, - unsigned *stride); - -/** - * Wrap a brw_winsys buffer with a texture blanket. - * - * TODO UGLY - */ -struct pipe_texture * -brw_texture_blanket_winsys_buffer(struct pipe_screen *screen, - const struct pipe_texture *template, - unsigned pitch, - unsigned tiling, - struct brw_winsys_buffer *buffer); - /************************************************************************* * Cooperative dumping between winsys and driver. TODO: make this diff --git a/src/gallium/drivers/i965/brw_wm.c b/src/gallium/drivers/i965/brw_wm.c index dfb718e64fe..5d66e61fbc1 100644 --- a/src/gallium/drivers/i965/brw_wm.c +++ b/src/gallium/drivers/i965/brw_wm.c @@ -35,6 +35,7 @@ #include "brw_wm.h" #include "brw_state.h" #include "brw_debug.h" +#include "brw_resource.h" #include "brw_pipe_rast.h" @@ -251,13 +252,13 @@ static void brw_wm_populate_key( struct brw_context *brw, /* PIPE_NEW_BOUND_TEXTURES */ - for (i = 0; i < brw->curr.num_textures; i++) { - const struct brw_texture *tex = brw_texture(brw->curr.texture[i]); + for (i = 0; i < brw->curr.num_fragment_sampler_views; i++) { + const struct brw_texture *tex = brw_texture(brw->curr.fragment_sampler_views[i]->texture); - if (tex->base.format == PIPE_FORMAT_UYVY) + if (tex->b.b.format == PIPE_FORMAT_UYVY) key->yuvtex_mask |= 1 << i; - if (tex->base.format == PIPE_FORMAT_YUYV) + if (tex->b.b.format == PIPE_FORMAT_YUYV) key->yuvtex_swap_mask |= 1 << i; /* XXX: shadow texture diff --git a/src/gallium/drivers/i965/brw_wm_constant_buffer.c b/src/gallium/drivers/i965/brw_wm_constant_buffer.c index 6434c6acf73..df5cd0398c9 100644 --- a/src/gallium/drivers/i965/brw_wm_constant_buffer.c +++ b/src/gallium/drivers/i965/brw_wm_constant_buffer.c @@ -62,7 +62,7 @@ brw_update_wm_constant_surface( struct brw_context *brw, { struct brw_surface_key key; struct brw_fragment_shader *fp = brw->curr.fragment_shader; - struct pipe_buffer *cbuf = brw->curr.fragment_constants; + struct pipe_resource *cbuf = brw->curr.fragment_constants; int pitch = cbuf->size / (4 * sizeof(float)); enum pipe_error ret; diff --git a/src/gallium/drivers/i965/brw_wm_sampler_state.c b/src/gallium/drivers/i965/brw_wm_sampler_state.c index 6a6086fc51b..8406a1a9e20 100644 --- a/src/gallium/drivers/i965/brw_wm_sampler_state.c +++ b/src/gallium/drivers/i965/brw_wm_sampler_state.c @@ -35,7 +35,7 @@ #include "brw_context.h" #include "brw_state.h" #include "brw_defines.h" -#include "brw_screen.h" +#include "brw_resource.h" /* Samplers aren't strictly wm state from the hardware's perspective, @@ -78,11 +78,11 @@ brw_wm_sampler_populate_key(struct brw_context *brw, memset(key, 0, sizeof(*key)); - key->sampler_count = MIN2(brw->curr.num_textures, + key->sampler_count = MIN2(brw->curr.num_fragment_sampler_views, brw->curr.num_samplers); for (i = 0; i < key->sampler_count; i++) { - const struct brw_texture *tex = brw_texture(brw->curr.texture[i]); + const struct brw_texture *tex = brw_texture(brw->curr.fragment_sampler_views[i]->texture); const struct brw_sampler *sampler = brw->curr.sampler[i]; struct brw_sampler_state *entry = &key->sampler[i]; @@ -94,7 +94,7 @@ brw_wm_sampler_populate_key(struct brw_context *brw, /* Cube-maps on 965 and later must use the same wrap mode for all 3 * coordinate dimensions. Futher, only CUBE and CLAMP are valid. */ - if (tex->base.target == PIPE_TEXTURE_CUBE) { + if (tex->b.b.target == PIPE_TEXTURE_CUBE) { if (FALSE && (sampler->ss0.min_filter != BRW_MAPFILTER_NEAREST || sampler->ss0.mag_filter != BRW_MAPFILTER_NEAREST)) { @@ -106,7 +106,7 @@ brw_wm_sampler_populate_key(struct brw_context *brw, entry->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP; entry->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP; } - } else if (tex->base.target == PIPE_TEXTURE_1D) { + } else if (tex->b.b.target == PIPE_TEXTURE_1D) { /* There's a bug in 1D texture sampling - it actually pays * attention to the wrap_t value, though it should not. * Override the wrap_t value here to GL_REPEAT to keep @@ -122,12 +122,12 @@ static enum pipe_error brw_wm_sampler_update_default_colors(struct brw_context *brw) { enum pipe_error ret; - int nr = MIN2(brw->curr.num_textures, + int nr = MIN2(brw->curr.num_fragment_sampler_views, brw->curr.num_samplers); int i; for (i = 0; i < nr; i++) { - const struct brw_texture *tex = brw_texture(brw->curr.texture[i]); + const struct brw_texture *tex = brw_texture(brw->curr.fragment_sampler_views[i]->texture); const struct brw_sampler *sampler = brw->curr.sampler[i]; const float *bc; float bordercolor[4] = { @@ -137,7 +137,7 @@ brw_wm_sampler_update_default_colors(struct brw_context *brw) sampler->border_color[0] }; - if (util_format_is_depth_or_stencil(tex->base.format)) { + if (util_format_is_depth_or_stencil(tex->b.b.format)) { bc = bordercolor; } else { diff --git a/src/gallium/drivers/i965/brw_wm_surface_state.c b/src/gallium/drivers/i965/brw_wm_surface_state.c index b01a7f194b7..0d80a0114af 100644 --- a/src/gallium/drivers/i965/brw_wm_surface_state.c +++ b/src/gallium/drivers/i965/brw_wm_surface_state.c @@ -34,7 +34,7 @@ #include "brw_batchbuffer.h" #include "brw_context.h" #include "brw_state.h" -#include "brw_screen.h" +#include "brw_resource.h" @@ -242,9 +242,9 @@ static enum pipe_error prepare_wm_surfaces(struct brw_context *brw ) /* PIPE_NEW_TEXTURE */ - for (i = 0; i < brw->curr.num_textures; i++) { + for (i = 0; i < brw->curr.num_fragment_sampler_views; i++) { ret = brw_update_texture_surface(brw, - brw_texture(brw->curr.texture[i]), + brw_texture(brw->curr.fragment_sampler_views[i]->texture), &brw->wm.surf_bo[BTI_TEXTURE(i)]); if (ret) return ret; @@ -261,7 +261,7 @@ static enum pipe_error prepare_wm_surfaces(struct brw_context *brw ) bo_reference(&brw->wm.surf_bo[BTI_FRAGMENT_CONSTANTS], NULL); /* XXX: no pipe_max_textures define?? */ - for (i = brw->curr.num_textures; i < PIPE_MAX_SAMPLERS; i++) + for (i = brw->curr.num_fragment_sampler_views; i < PIPE_MAX_SAMPLERS; i++) bo_reference(&brw->wm.surf_bo[BTI_TEXTURE(i)], NULL); if (brw->wm.nr_surfaces != nr_surfaces) { diff --git a/src/gallium/drivers/i965/intel_decode.c b/src/gallium/drivers/i965/intel_decode.c index 3166958bad3..6c47415cac5 100644 --- a/src/gallium/drivers/i965/intel_decode.c +++ b/src/gallium/drivers/i965/intel_decode.c @@ -37,8 +37,8 @@ #include <stdio.h> #include <stdarg.h> +#include <stdint.h> #include <string.h> -#include <inttypes.h> #include "intel_decode.h" diff --git a/src/gallium/drivers/identity/SConscript b/src/gallium/drivers/identity/SConscript index 7f079dd0a8b..2a68891c284 100644 --- a/src/gallium/drivers/identity/SConscript +++ b/src/gallium/drivers/identity/SConscript @@ -5,9 +5,10 @@ env = env.Clone() identity = env.ConvenienceLibrary( target = 'identity', source = [ - 'id_screen.c', 'id_context.c', + 'id_drm.c', 'id_objects.c', + 'id_screen.c', ]) Export('identity') diff --git a/src/gallium/drivers/identity/id_context.c b/src/gallium/drivers/identity/id_context.c index 8248b2a4132..0bc8bf21966 100644 --- a/src/gallium/drivers/identity/id_context.c +++ b/src/gallium/drivers/identity/id_context.c @@ -28,6 +28,7 @@ #include "pipe/p_context.h" #include "util/u_memory.h" +#include "util/u_inlines.h" #include "id_context.h" #include "id_objects.h" @@ -41,7 +42,7 @@ identity_destroy(struct pipe_context *_pipe) pipe->destroy(pipe); - free(id_pipe); + FREE(id_pipe); } static void @@ -61,20 +62,22 @@ identity_draw_arrays(struct pipe_context *_pipe, static void identity_draw_elements(struct pipe_context *_pipe, - struct pipe_buffer *_indexBuffer, + struct pipe_resource *_indexResource, unsigned indexSize, + int indexBias, unsigned prim, unsigned start, unsigned count) { struct identity_context *id_pipe = identity_context(_pipe); - struct identity_buffer *id_buffer = identity_buffer(_indexBuffer); + struct identity_resource *id_resource = identity_resource(_indexResource); struct pipe_context *pipe = id_pipe->pipe; - struct pipe_buffer *indexBuffer = id_buffer->buffer; + struct pipe_resource *indexResource = id_resource->resource; pipe->draw_elements(pipe, - indexBuffer, + indexResource, indexSize, + indexBias, prim, start, count); @@ -82,8 +85,9 @@ identity_draw_elements(struct pipe_context *_pipe, static void identity_draw_range_elements(struct pipe_context *_pipe, - struct pipe_buffer *_indexBuffer, + struct pipe_resource *_indexResource, unsigned indexSize, + int indexBias, unsigned minIndex, unsigned maxIndex, unsigned mode, @@ -91,13 +95,14 @@ identity_draw_range_elements(struct pipe_context *_pipe, unsigned count) { struct identity_context *id_pipe = identity_context(_pipe); - struct identity_buffer *id_buffer = identity_buffer(_indexBuffer); + struct identity_resource *id_resource = identity_resource(_indexResource); struct pipe_context *pipe = id_pipe->pipe; - struct pipe_buffer *indexBuffer = id_buffer->buffer; + struct pipe_resource *indexResource = id_resource->resource; pipe->draw_range_elements(pipe, - indexBuffer, + indexResource, indexSize, + indexBias, minIndex, maxIndex, mode, @@ -377,6 +382,42 @@ identity_delete_vs_state(struct pipe_context *_pipe, vs); } + +static void * +identity_create_vertex_elements_state(struct pipe_context *_pipe, + unsigned num_elements, + const struct pipe_vertex_element *vertex_elements) +{ + struct identity_context *id_pipe = identity_context(_pipe); + struct pipe_context *pipe = id_pipe->pipe; + + return pipe->create_vertex_elements_state(pipe, + num_elements, + vertex_elements); +} + +static void +identity_bind_vertex_elements_state(struct pipe_context *_pipe, + void *velems) +{ + struct identity_context *id_pipe = identity_context(_pipe); + struct pipe_context *pipe = id_pipe->pipe; + + pipe->bind_vertex_elements_state(pipe, + velems); +} + +static void +identity_delete_vertex_elements_state(struct pipe_context *_pipe, + void *velems) +{ + struct identity_context *id_pipe = identity_context(_pipe); + struct pipe_context *pipe = id_pipe->pipe; + + pipe->delete_vertex_elements_state(pipe, + velems); +} + static void identity_set_blend_color(struct pipe_context *_pipe, const struct pipe_blend_color *blend_color) @@ -414,23 +455,23 @@ static void identity_set_constant_buffer(struct pipe_context *_pipe, uint shader, uint index, - struct pipe_buffer *_buffer) + struct pipe_resource *_resource) { struct identity_context *id_pipe = identity_context(_pipe); struct pipe_context *pipe = id_pipe->pipe; - struct pipe_buffer *unwrapped_buffer; - struct pipe_buffer *buffer = NULL; + struct pipe_resource *unwrapped_resource; + struct pipe_resource *resource = NULL; /* XXX hmm? unwrap the input state */ - if (_buffer) { - unwrapped_buffer = identity_buffer_unwrap(_buffer); - buffer = unwrapped_buffer; + if (_resource) { + unwrapped_resource = identity_resource_unwrap(_resource); + resource = unwrapped_resource; } pipe->set_constant_buffer(pipe, shader, index, - buffer); + resource); } static void @@ -492,53 +533,49 @@ identity_set_viewport_state(struct pipe_context *_pipe, } static void -identity_set_fragment_sampler_textures(struct pipe_context *_pipe, - unsigned num_textures, - struct pipe_texture **_textures) +identity_set_fragment_sampler_views(struct pipe_context *_pipe, + unsigned num, + struct pipe_sampler_view **_views) { struct identity_context *id_pipe = identity_context(_pipe); struct pipe_context *pipe = id_pipe->pipe; - struct pipe_texture *unwrapped_textures[PIPE_MAX_SAMPLERS]; - struct pipe_texture **textures = NULL; + struct pipe_sampler_view *unwrapped_views[PIPE_MAX_SAMPLERS]; + struct pipe_sampler_view **views = NULL; unsigned i; - if (_textures) { - for (i = 0; i < num_textures; i++) - unwrapped_textures[i] = identity_texture_unwrap(_textures[i]); + if (_views) { + for (i = 0; i < num; i++) + unwrapped_views[i] = identity_sampler_view_unwrap(_views[i]); for (; i < PIPE_MAX_SAMPLERS; i++) - unwrapped_textures[i] = NULL; + unwrapped_views[i] = NULL; - textures = unwrapped_textures; + views = unwrapped_views; } - pipe->set_fragment_sampler_textures(pipe, - num_textures, - textures); + pipe->set_fragment_sampler_views(pipe, num, views); } static void -identity_set_vertex_sampler_textures(struct pipe_context *_pipe, - unsigned num_textures, - struct pipe_texture **_textures) +identity_set_vertex_sampler_views(struct pipe_context *_pipe, + unsigned num, + struct pipe_sampler_view **_views) { struct identity_context *id_pipe = identity_context(_pipe); struct pipe_context *pipe = id_pipe->pipe; - struct pipe_texture *unwrapped_textures[PIPE_MAX_VERTEX_SAMPLERS]; - struct pipe_texture **textures = NULL; + struct pipe_sampler_view *unwrapped_views[PIPE_MAX_VERTEX_SAMPLERS]; + struct pipe_sampler_view **views = NULL; unsigned i; - if (_textures) { - for (i = 0; i < num_textures; i++) - unwrapped_textures[i] = identity_texture_unwrap(_textures[i]); + if (_views) { + for (i = 0; i < num; i++) + unwrapped_views[i] = identity_sampler_view_unwrap(_views[i]); for (; i < PIPE_MAX_VERTEX_SAMPLERS; i++) - unwrapped_textures[i] = NULL; + unwrapped_views[i] = NULL; - textures = unwrapped_textures; + views = unwrapped_views; } - pipe->set_vertex_sampler_textures(pipe, - num_textures, - textures); + pipe->set_vertex_sampler_views(pipe, num, views); } static void @@ -555,7 +592,7 @@ identity_set_vertex_buffers(struct pipe_context *_pipe, if (num_buffers) { memcpy(unwrapped_buffers, _buffers, num_buffers * sizeof(*_buffers)); for (i = 0; i < num_buffers; i++) - unwrapped_buffers[i].buffer = identity_buffer_unwrap(_buffers[i].buffer); + unwrapped_buffers[i].buffer = identity_resource_unwrap(_buffers[i].buffer); buffers = unwrapped_buffers; } @@ -563,20 +600,6 @@ identity_set_vertex_buffers(struct pipe_context *_pipe, num_buffers, buffers); } - -static void -identity_set_vertex_elements(struct pipe_context *_pipe, - unsigned num_elements, - const struct pipe_vertex_element *vertex_elements) -{ - struct identity_context *id_pipe = identity_context(_pipe); - struct pipe_context *pipe = id_pipe->pipe; - - pipe->set_vertex_elements(pipe, - num_elements, - vertex_elements); -} - static void identity_surface_copy(struct pipe_context *_pipe, struct pipe_surface *_dst, @@ -660,35 +683,165 @@ identity_flush(struct pipe_context *_pipe, } static unsigned int -identity_is_texture_referenced(struct pipe_context *_pipe, - struct pipe_texture *_texture, +identity_is_resource_referenced(struct pipe_context *_pipe, + struct pipe_resource *_resource, unsigned face, unsigned level) { struct identity_context *id_pipe = identity_context(_pipe); - struct identity_texture *id_texture = identity_texture(_texture); + struct identity_resource *id_resource = identity_resource(_resource); struct pipe_context *pipe = id_pipe->pipe; - struct pipe_texture *texture = id_texture->texture; + struct pipe_resource *texture = id_resource->resource; - return pipe->is_texture_referenced(pipe, + return pipe->is_resource_referenced(pipe, texture, face, level); } -static unsigned int -identity_is_buffer_referenced(struct pipe_context *_pipe, - struct pipe_buffer *_buffer) +static struct pipe_sampler_view * +identity_create_sampler_view(struct pipe_context *pipe, + struct pipe_resource *texture, + const struct pipe_sampler_view *templ) { - struct identity_context *id_pipe = identity_context(_pipe); - struct identity_buffer *id_buffer = identity_buffer(_buffer); - struct pipe_context *pipe = id_pipe->pipe; - struct pipe_buffer *buffer = id_buffer->buffer; + struct identity_context *id_pipe = identity_context(pipe); + struct identity_resource *id_resource = identity_resource(texture); + struct pipe_context *pipe_unwrapped = id_pipe->pipe; + struct pipe_resource *texture_unwrapped = id_resource->resource; + struct identity_sampler_view *view = MALLOC(sizeof(struct identity_sampler_view)); + + view->sampler_view = pipe_unwrapped->create_sampler_view(pipe_unwrapped, + texture_unwrapped, + templ); + + view->base = *templ; + view->base.reference.count = 1; + view->base.texture = NULL; + pipe_resource_reference(&view->base.texture, texture); + view->base.context = pipe; + + return &view->base; +} - return pipe->is_buffer_referenced(pipe, - buffer); +static void +identity_sampler_view_destroy(struct pipe_context *pipe, + struct pipe_sampler_view *view) +{ + struct identity_context *id_pipe = identity_context(pipe); + struct identity_sampler_view *id_view = identity_sampler_view(view); + struct pipe_context *pipe_unwrapped = id_pipe->pipe; + struct pipe_sampler_view *view_unwrapped = id_view->sampler_view; + + pipe_unwrapped->sampler_view_destroy(pipe_unwrapped, + view_unwrapped); + + pipe_resource_reference(&view->texture, NULL); + FREE(view); +} + +static struct pipe_transfer * +identity_context_get_transfer(struct pipe_context *_context, + struct pipe_resource *_resource, + struct pipe_subresource sr, + unsigned usage, + const struct pipe_box *box) +{ + struct identity_context *id_context = identity_context(_context); + struct identity_resource *id_resource = identity_resource(_resource); + struct pipe_context *context = id_context->pipe; + struct pipe_resource *texture = id_resource->resource; + struct pipe_transfer *result; + + result = context->get_transfer(context, + texture, + sr, + usage, + box); + + if (result) + return identity_transfer_create(id_context, id_resource, result); + return NULL; } +static void +identity_context_transfer_destroy(struct pipe_context *_pipe, + struct pipe_transfer *_transfer) +{ + identity_transfer_destroy(identity_context(_pipe), + identity_transfer(_transfer)); +} + +static void * +identity_context_transfer_map(struct pipe_context *_context, + struct pipe_transfer *_transfer) +{ + struct identity_context *id_context = identity_context(_context); + struct identity_transfer *id_transfer = identity_transfer(_transfer); + struct pipe_context *context = id_context->pipe; + struct pipe_transfer *transfer = id_transfer->transfer; + + return context->transfer_map(context, + transfer); +} + + + +static void +identity_context_transfer_flush_region( struct pipe_context *_context, + struct pipe_transfer *_transfer, + const struct pipe_box *box) +{ + struct identity_context *id_context = identity_context(_context); + struct identity_transfer *id_transfer = identity_transfer(_transfer); + struct pipe_context *context = id_context->pipe; + struct pipe_transfer *transfer = id_transfer->transfer; + + context->transfer_flush_region(context, + transfer, + box); +} + + +static void +identity_context_transfer_unmap(struct pipe_context *_context, + struct pipe_transfer *_transfer) +{ + struct identity_context *id_context = identity_context(_context); + struct identity_transfer *id_transfer = identity_transfer(_transfer); + struct pipe_context *context = id_context->pipe; + struct pipe_transfer *transfer = id_transfer->transfer; + + context->transfer_unmap(context, + transfer); +} + + +static void +identity_context_transfer_inline_write( struct pipe_context *_context, + struct pipe_resource *_resource, + struct pipe_subresource sr, + unsigned usage, + const struct pipe_box *box, + const void *data, + unsigned stride, + unsigned slice_stride) +{ + struct identity_context *id_context = identity_context(_context); + struct identity_resource *id_resource = identity_resource(_resource); + struct pipe_context *context = id_context->pipe; + struct pipe_resource *texture = id_resource->resource; + + context->transfer_inline_write(context, + texture, + sr, + usage, + box, + data, + stride, + slice_stride); +} + + struct pipe_context * identity_context_create(struct pipe_screen *_screen, struct pipe_context *pipe) { @@ -733,6 +886,9 @@ identity_context_create(struct pipe_screen *_screen, struct pipe_context *pipe) id_pipe->base.create_vs_state = identity_create_vs_state; id_pipe->base.bind_vs_state = identity_bind_vs_state; id_pipe->base.delete_vs_state = identity_delete_vs_state; + id_pipe->base.create_vertex_elements_state = identity_create_vertex_elements_state; + id_pipe->base.bind_vertex_elements_state = identity_bind_vertex_elements_state; + id_pipe->base.delete_vertex_elements_state = identity_delete_vertex_elements_state; id_pipe->base.set_blend_color = identity_set_blend_color; id_pipe->base.set_stencil_ref = identity_set_stencil_ref; id_pipe->base.set_clip_state = identity_set_clip_state; @@ -741,16 +897,22 @@ identity_context_create(struct pipe_screen *_screen, struct pipe_context *pipe) id_pipe->base.set_polygon_stipple = identity_set_polygon_stipple; id_pipe->base.set_scissor_state = identity_set_scissor_state; id_pipe->base.set_viewport_state = identity_set_viewport_state; - id_pipe->base.set_fragment_sampler_textures = identity_set_fragment_sampler_textures; - id_pipe->base.set_vertex_sampler_textures = identity_set_vertex_sampler_textures; + id_pipe->base.set_fragment_sampler_views = identity_set_fragment_sampler_views; + id_pipe->base.set_vertex_sampler_views = identity_set_vertex_sampler_views; id_pipe->base.set_vertex_buffers = identity_set_vertex_buffers; - id_pipe->base.set_vertex_elements = identity_set_vertex_elements; id_pipe->base.surface_copy = identity_surface_copy; id_pipe->base.surface_fill = identity_surface_fill; id_pipe->base.clear = identity_clear; id_pipe->base.flush = identity_flush; - id_pipe->base.is_texture_referenced = identity_is_texture_referenced; - id_pipe->base.is_buffer_referenced = identity_is_buffer_referenced; + id_pipe->base.is_resource_referenced = identity_is_resource_referenced; + id_pipe->base.create_sampler_view = identity_create_sampler_view; + id_pipe->base.sampler_view_destroy = identity_sampler_view_destroy; + id_pipe->base.get_transfer = identity_context_get_transfer; + id_pipe->base.transfer_destroy = identity_context_transfer_destroy; + id_pipe->base.transfer_map = identity_context_transfer_map; + id_pipe->base.transfer_unmap = identity_context_transfer_unmap; + id_pipe->base.transfer_flush_region = identity_context_transfer_flush_region; + id_pipe->base.transfer_inline_write = identity_context_transfer_inline_write; id_pipe->pipe = pipe; diff --git a/src/gallium/drivers/identity/id_drm.c b/src/gallium/drivers/identity/id_drm.c index f258c38cd71..a9d41af18c7 100644 --- a/src/gallium/drivers/identity/id_drm.c +++ b/src/gallium/drivers/identity/id_drm.c @@ -31,8 +31,6 @@ #include "id_drm.h" #include "id_screen.h" #include "id_public.h" -#include "id_screen.h" -#include "id_objects.h" struct identity_drm_api { @@ -63,62 +61,6 @@ identity_drm_create_screen(struct drm_api *_api, int fd, return identity_screen_create(screen); } - -static struct pipe_texture * -identity_drm_texture_from_shared_handle(struct drm_api *_api, - struct pipe_screen *_screen, - struct pipe_texture *templ, - const char *name, - unsigned stride, - unsigned handle) -{ - struct identity_screen *id_screen = identity_screen(_screen); - struct identity_drm_api *id_api = identity_drm_api(_api); - struct pipe_screen *screen = id_screen->screen; - struct drm_api *api = id_api->api; - struct pipe_texture *result; - - result = api->texture_from_shared_handle(api, screen, templ, name, stride, handle); - - result = identity_texture_create(identity_screen(_screen), result); - - return result; -} - -static boolean -identity_drm_shared_handle_from_texture(struct drm_api *_api, - struct pipe_screen *_screen, - struct pipe_texture *_texture, - unsigned *stride, - unsigned *handle) -{ - struct identity_screen *id_screen = identity_screen(_screen); - struct identity_texture *id_texture = identity_texture(_texture); - struct identity_drm_api *id_api = identity_drm_api(_api); - struct pipe_screen *screen = id_screen->screen; - struct pipe_texture *texture = id_texture->texture; - struct drm_api *api = id_api->api; - - return api->shared_handle_from_texture(api, screen, texture, stride, handle); -} - -static boolean -identity_drm_local_handle_from_texture(struct drm_api *_api, - struct pipe_screen *_screen, - struct pipe_texture *_texture, - unsigned *stride, - unsigned *handle) -{ - struct identity_screen *id_screen = identity_screen(_screen); - struct identity_texture *id_texture = identity_texture(_texture); - struct identity_drm_api *id_api = identity_drm_api(_api); - struct pipe_screen *screen = id_screen->screen; - struct pipe_texture *texture = id_texture->texture; - struct drm_api *api = id_api->api; - - return api->local_handle_from_texture(api, screen, texture, stride, handle); -} - static void identity_drm_destroy(struct drm_api *_api) { @@ -126,7 +68,7 @@ identity_drm_destroy(struct drm_api *_api) struct drm_api *api = id_api->api; api->destroy(api); - free(id_api); + FREE(id_api); } struct drm_api * @@ -145,9 +87,6 @@ identity_drm_create(struct drm_api *api) id_api->base.name = api->name; id_api->base.driver_name = api->driver_name; id_api->base.create_screen = identity_drm_create_screen; - id_api->base.texture_from_shared_handle = identity_drm_texture_from_shared_handle; - id_api->base.shared_handle_from_texture = identity_drm_shared_handle_from_texture; - id_api->base.local_handle_from_texture = identity_drm_local_handle_from_texture; id_api->base.destroy = identity_drm_destroy; id_api->api = api; diff --git a/src/gallium/drivers/identity/id_objects.c b/src/gallium/drivers/identity/id_objects.c index c65c6bf0056..d50914e7d5d 100644 --- a/src/gallium/drivers/identity/id_objects.c +++ b/src/gallium/drivers/identity/id_objects.c @@ -30,81 +30,48 @@ #include "id_screen.h" #include "id_objects.h" +#include "id_context.h" -struct pipe_buffer * -identity_buffer_create(struct identity_screen *id_screen, - struct pipe_buffer *buffer) -{ - struct identity_buffer *id_buffer; - - if(!buffer) - goto error; - - assert(buffer->screen == id_screen->screen); - - id_buffer = CALLOC_STRUCT(identity_buffer); - if(!id_buffer) - goto error; - - memcpy(&id_buffer->base, buffer, sizeof(struct pipe_buffer)); - - pipe_reference_init(&id_buffer->base.reference, 1); - id_buffer->base.screen = &id_screen->base; - id_buffer->buffer = buffer; - - return &id_buffer->base; - -error: - pipe_buffer_reference(&buffer, NULL); - return NULL; -} - -void -identity_buffer_destroy(struct identity_buffer *id_buffer) -{ - pipe_buffer_reference(&id_buffer->buffer, NULL); - FREE(id_buffer); -} -struct pipe_texture * -identity_texture_create(struct identity_screen *id_screen, - struct pipe_texture *texture) +struct pipe_resource * +identity_resource_create(struct identity_screen *id_screen, + struct pipe_resource *resource) { - struct identity_texture *id_texture; + struct identity_resource *id_resource; - if(!texture) + if(!resource) goto error; - assert(texture->screen == id_screen->screen); + assert(resource->screen == id_screen->screen); - id_texture = CALLOC_STRUCT(identity_texture); - if(!id_texture) + id_resource = CALLOC_STRUCT(identity_resource); + if(!id_resource) goto error; - memcpy(&id_texture->base, texture, sizeof(struct pipe_texture)); + memcpy(&id_resource->base, resource, sizeof(struct pipe_resource)); - pipe_reference_init(&id_texture->base.reference, 1); - id_texture->base.screen = &id_screen->base; - id_texture->texture = texture; + pipe_reference_init(&id_resource->base.reference, 1); + id_resource->base.screen = &id_screen->base; + id_resource->resource = resource; - return &id_texture->base; + return &id_resource->base; error: - pipe_texture_reference(&texture, NULL); + pipe_resource_reference(&resource, NULL); return NULL; } void -identity_texture_destroy(struct identity_texture *id_texture) +identity_resource_destroy(struct identity_resource *id_resource) { - pipe_texture_reference(&id_texture->texture, NULL); - FREE(id_texture); + pipe_resource_reference(&id_resource->resource, NULL); + FREE(id_resource); } struct pipe_surface * -identity_surface_create(struct identity_texture *id_texture, +identity_surface_create(struct identity_resource *id_resource, struct pipe_surface *surface) { struct identity_surface *id_surface; @@ -112,7 +79,7 @@ identity_surface_create(struct identity_texture *id_texture, if(!surface) goto error; - assert(surface->texture == id_texture->texture); + assert(surface->texture == id_resource->resource); id_surface = CALLOC_STRUCT(identity_surface); if(!id_surface) @@ -122,7 +89,7 @@ identity_surface_create(struct identity_texture *id_texture, pipe_reference_init(&id_surface->base.reference, 1); id_surface->base.texture = NULL; - pipe_texture_reference(&id_surface->base.texture, &id_texture->base); + pipe_resource_reference(&id_surface->base.texture, &id_resource->base); id_surface->surface = surface; return &id_surface->base; @@ -135,14 +102,15 @@ error: void identity_surface_destroy(struct identity_surface *id_surface) { - pipe_texture_reference(&id_surface->base.texture, NULL); + pipe_resource_reference(&id_surface->base.texture, NULL); pipe_surface_reference(&id_surface->surface, NULL); FREE(id_surface); } struct pipe_transfer * -identity_transfer_create(struct identity_texture *id_texture, +identity_transfer_create(struct identity_context *id_context, + struct identity_resource *id_resource, struct pipe_transfer *transfer) { struct identity_transfer *id_transfer; @@ -150,7 +118,7 @@ identity_transfer_create(struct identity_texture *id_texture, if(!transfer) goto error; - assert(transfer->texture == id_texture->texture); + assert(transfer->resource == id_resource->resource); id_transfer = CALLOC_STRUCT(identity_transfer); if(!id_transfer) @@ -158,25 +126,26 @@ identity_transfer_create(struct identity_texture *id_texture, memcpy(&id_transfer->base, transfer, sizeof(struct pipe_transfer)); - id_transfer->base.texture = NULL; - pipe_texture_reference(&id_transfer->base.texture, &id_texture->base); + id_transfer->base.resource = NULL; id_transfer->transfer = transfer; - assert(id_transfer->base.texture == &id_texture->base); + + pipe_resource_reference(&id_transfer->base.resource, &id_resource->base); + assert(id_transfer->base.resource == &id_resource->base); return &id_transfer->base; error: - transfer->texture->screen->tex_transfer_destroy(transfer); + id_context->pipe->transfer_destroy(id_context->pipe, transfer); return NULL; } void -identity_transfer_destroy(struct identity_transfer *id_transfer) +identity_transfer_destroy(struct identity_context *id_context, + struct identity_transfer *id_transfer) { - struct identity_screen *id_screen = identity_screen(id_transfer->base.texture->screen); - struct pipe_screen *screen = id_screen->screen; - - pipe_texture_reference(&id_transfer->base.texture, NULL); - screen->tex_transfer_destroy(id_transfer->transfer); + pipe_resource_reference(&id_transfer->base.resource, NULL); + id_context->pipe->transfer_destroy(id_context->pipe, + id_transfer->transfer); FREE(id_transfer); } + diff --git a/src/gallium/drivers/identity/id_objects.h b/src/gallium/drivers/identity/id_objects.h index e89cb2e78c4..058cf3009df 100644 --- a/src/gallium/drivers/identity/id_objects.h +++ b/src/gallium/drivers/identity/id_objects.h @@ -34,20 +34,22 @@ #include "id_screen.h" +struct identity_context; -struct identity_buffer + +struct identity_resource { - struct pipe_buffer base; + struct pipe_resource base; - struct pipe_buffer *buffer; + struct pipe_resource *resource; }; -struct identity_texture +struct identity_sampler_view { - struct pipe_texture base; + struct pipe_sampler_view base; - struct pipe_texture *texture; + struct pipe_sampler_view *sampler_view; }; @@ -63,26 +65,27 @@ struct identity_transfer { struct pipe_transfer base; + struct pipe_context *pipe; struct pipe_transfer *transfer; }; -static INLINE struct identity_buffer * -identity_buffer(struct pipe_buffer *_buffer) +static INLINE struct identity_resource * +identity_resource(struct pipe_resource *_resource) { - if(!_buffer) + if(!_resource) return NULL; - (void)identity_screen(_buffer->screen); - return (struct identity_buffer *)_buffer; + (void)identity_screen(_resource->screen); + return (struct identity_resource *)_resource; } -static INLINE struct identity_texture * -identity_texture(struct pipe_texture *_texture) +static INLINE struct identity_sampler_view * +identity_sampler_view(struct pipe_sampler_view *_sampler_view) { - if(!_texture) + if (!_sampler_view) { return NULL; - (void)identity_screen(_texture->screen); - return (struct identity_texture *)_texture; + } + return (struct identity_sampler_view *)_sampler_view; } static INLINE struct identity_surface * @@ -90,7 +93,7 @@ identity_surface(struct pipe_surface *_surface) { if(!_surface) return NULL; - (void)identity_texture(_surface->texture); + (void)identity_resource(_surface->texture); return (struct identity_surface *)_surface; } @@ -99,24 +102,25 @@ identity_transfer(struct pipe_transfer *_transfer) { if(!_transfer) return NULL; - (void)identity_texture(_transfer->texture); + (void)identity_resource(_transfer->resource); return (struct identity_transfer *)_transfer; } -static INLINE struct pipe_buffer * -identity_buffer_unwrap(struct pipe_buffer *_buffer) +static INLINE struct pipe_resource * +identity_resource_unwrap(struct pipe_resource *_resource) { - if(!_buffer) + if(!_resource) return NULL; - return identity_buffer(_buffer)->buffer; + return identity_resource(_resource)->resource; } -static INLINE struct pipe_texture * -identity_texture_unwrap(struct pipe_texture *_texture) +static INLINE struct pipe_sampler_view * +identity_sampler_view_unwrap(struct pipe_sampler_view *_sampler_view) { - if(!_texture) + if (!_sampler_view) { return NULL; - return identity_texture(_texture)->texture; + } + return identity_sampler_view(_sampler_view)->sampler_view; } static INLINE struct pipe_surface * @@ -136,33 +140,28 @@ identity_transfer_unwrap(struct pipe_transfer *_transfer) } -struct pipe_buffer * -identity_buffer_create(struct identity_screen *id_screen, - struct pipe_buffer *buffer); - -void -identity_buffer_destroy(struct identity_buffer *id_buffer); - -struct pipe_texture * -identity_texture_create(struct identity_screen *id_screen, - struct pipe_texture *texture); +struct pipe_resource * +identity_resource_create(struct identity_screen *id_screen, + struct pipe_resource *resource); void -identity_texture_destroy(struct identity_texture *id_texture); +identity_resource_destroy(struct identity_resource *id_resource); struct pipe_surface * -identity_surface_create(struct identity_texture *id_texture, +identity_surface_create(struct identity_resource *id_resource, struct pipe_surface *surface); void identity_surface_destroy(struct identity_surface *id_surface); struct pipe_transfer * -identity_transfer_create(struct identity_texture *id_texture, +identity_transfer_create(struct identity_context *id_context, + struct identity_resource *id_resource, struct pipe_transfer *transfer); void -identity_transfer_destroy(struct identity_transfer *id_transfer); +identity_transfer_destroy(struct identity_context *id_context, + struct identity_transfer *id_transfer); #endif /* ID_OBJECTS_H */ diff --git a/src/gallium/drivers/identity/id_screen.c b/src/gallium/drivers/identity/id_screen.c index 480ea802d04..52573b211fb 100644 --- a/src/gallium/drivers/identity/id_screen.c +++ b/src/gallium/drivers/identity/id_screen.c @@ -118,62 +118,76 @@ identity_screen_context_create(struct pipe_screen *_screen, return NULL; } -static struct pipe_texture * -identity_screen_texture_create(struct pipe_screen *_screen, - const struct pipe_texture *templat) +static struct pipe_resource * +identity_screen_resource_create(struct pipe_screen *_screen, + const struct pipe_resource *templat) { struct identity_screen *id_screen = identity_screen(_screen); struct pipe_screen *screen = id_screen->screen; - struct pipe_texture *result; + struct pipe_resource *result; - result = screen->texture_create(screen, + result = screen->resource_create(screen, templat); if (result) - return identity_texture_create(id_screen, result); + return identity_resource_create(id_screen, result); return NULL; } -static struct pipe_texture * -identity_screen_texture_blanket(struct pipe_screen *_screen, - const struct pipe_texture *templat, - const unsigned *stride, - struct pipe_buffer *_buffer) +static struct pipe_resource * +identity_screen_resource_from_handle(struct pipe_screen *_screen, + const struct pipe_resource *templ, + struct winsys_handle *handle) { struct identity_screen *id_screen = identity_screen(_screen); - struct identity_buffer *id_buffer = identity_buffer(_buffer); struct pipe_screen *screen = id_screen->screen; - struct pipe_buffer *buffer = id_buffer->buffer; - struct pipe_texture *result; + struct pipe_resource *result; - result = screen->texture_blanket(screen, - templat, - stride, - buffer); + /* TODO trace call */ - if (result) - return identity_texture_create(id_screen, result); - return NULL; + result = screen->resource_from_handle(screen, templ, handle); + + result = identity_resource_create(identity_screen(_screen), result); + + return result; } +static boolean +identity_screen_resource_get_handle(struct pipe_screen *_screen, + struct pipe_resource *_texture, + struct winsys_handle *handle) +{ + struct identity_screen *id_screen = identity_screen(_screen); + struct identity_resource *id_resource = identity_resource(_texture); + struct pipe_screen *screen = id_screen->screen; + struct pipe_resource *texture = id_resource->resource; + + /* TODO trace call */ + + return screen->resource_get_handle(screen, texture, handle); +} + + + static void -identity_screen_texture_destroy(struct pipe_texture *_texture) +identity_screen_resource_destroy(struct pipe_screen *screen, + struct pipe_resource *_texture) { - identity_texture_destroy(identity_texture(_texture)); + identity_resource_destroy(identity_resource(_texture)); } static struct pipe_surface * identity_screen_get_tex_surface(struct pipe_screen *_screen, - struct pipe_texture *_texture, + struct pipe_resource *_texture, unsigned face, unsigned level, unsigned zslice, unsigned usage) { struct identity_screen *id_screen = identity_screen(_screen); - struct identity_texture *id_texture = identity_texture(_texture); + struct identity_resource *id_resource = identity_resource(_texture); struct pipe_screen *screen = id_screen->screen; - struct pipe_texture *texture = id_texture->texture; + struct pipe_resource *texture = id_resource->resource; struct pipe_surface *result; result = screen->get_tex_surface(screen, @@ -184,7 +198,7 @@ identity_screen_get_tex_surface(struct pipe_screen *_screen, usage); if (result) - return identity_surface_create(id_texture, result); + return identity_surface_create(id_resource, result); return NULL; } @@ -194,205 +208,29 @@ identity_screen_tex_surface_destroy(struct pipe_surface *_surface) identity_surface_destroy(identity_surface(_surface)); } -static struct pipe_transfer * -identity_screen_get_tex_transfer(struct pipe_screen *_screen, - struct pipe_texture *_texture, - unsigned face, - unsigned level, - unsigned zslice, - enum pipe_transfer_usage usage, - unsigned x, - unsigned y, - unsigned w, - unsigned h) -{ - struct identity_screen *id_screen = identity_screen(_screen); - struct identity_texture *id_texture = identity_texture(_texture); - struct pipe_screen *screen = id_screen->screen; - struct pipe_texture *texture = id_texture->texture; - struct pipe_transfer *result; - - result = screen->get_tex_transfer(screen, - texture, - face, - level, - zslice, - usage, - x, - y, - w, - h); - - if (result) - return identity_transfer_create(id_texture, result); - return NULL; -} - -static void -identity_screen_tex_transfer_destroy(struct pipe_transfer *_transfer) -{ - identity_transfer_destroy(identity_transfer(_transfer)); -} - -static void * -identity_screen_transfer_map(struct pipe_screen *_screen, - struct pipe_transfer *_transfer) -{ - struct identity_screen *id_screen = identity_screen(_screen); - struct identity_transfer *id_transfer = identity_transfer(_transfer); - struct pipe_screen *screen = id_screen->screen; - struct pipe_transfer *transfer = id_transfer->transfer; - - return screen->transfer_map(screen, - transfer); -} - -static void -identity_screen_transfer_unmap(struct pipe_screen *_screen, - struct pipe_transfer *_transfer) -{ - struct identity_screen *id_screen = identity_screen(_screen); - struct identity_transfer *id_transfer = identity_transfer(_transfer); - struct pipe_screen *screen = id_screen->screen; - struct pipe_transfer *transfer = id_transfer->transfer; - - screen->transfer_unmap(screen, - transfer); -} - -static struct pipe_buffer * -identity_screen_buffer_create(struct pipe_screen *_screen, - unsigned alignment, - unsigned usage, - unsigned size) -{ - struct identity_screen *id_screen = identity_screen(_screen); - struct pipe_screen *screen = id_screen->screen; - struct pipe_buffer *result; - result = screen->buffer_create(screen, - alignment, - usage, - size); - if (result) - return identity_buffer_create(id_screen, result); - return NULL; -} - -static struct pipe_buffer * +static struct pipe_resource * identity_screen_user_buffer_create(struct pipe_screen *_screen, void *ptr, - unsigned bytes) + unsigned bytes, + unsigned usage) { struct identity_screen *id_screen = identity_screen(_screen); struct pipe_screen *screen = id_screen->screen; - struct pipe_buffer *result; + struct pipe_resource *result; result = screen->user_buffer_create(screen, ptr, - bytes); + bytes, + usage); if (result) - return identity_buffer_create(id_screen, result); + return identity_resource_create(id_screen, result); return NULL; } -static struct pipe_buffer * -identity_screen_surface_buffer_create(struct pipe_screen *_screen, - unsigned width, - unsigned height, - enum pipe_format format, - unsigned usage, - unsigned tex_usage, - unsigned *stride) -{ - struct identity_screen *id_screen = identity_screen(_screen); - struct pipe_screen *screen = id_screen->screen; - struct pipe_buffer *result; - - result = screen->surface_buffer_create(screen, - width, - height, - format, - usage, - tex_usage, - stride); - if (result) - return identity_buffer_create(id_screen, result); - return NULL; -} - -static void * -identity_screen_buffer_map(struct pipe_screen *_screen, - struct pipe_buffer *_buffer, - unsigned usage) -{ - struct identity_screen *id_screen = identity_screen(_screen); - struct identity_buffer *id_buffer = identity_buffer(_buffer); - struct pipe_screen *screen = id_screen->screen; - struct pipe_buffer *buffer = id_buffer->buffer; - - return screen->buffer_map(screen, - buffer, - usage); -} - -static void * -identity_screen_buffer_map_range(struct pipe_screen *_screen, - struct pipe_buffer *_buffer, - unsigned offset, - unsigned length, - unsigned usage) -{ - struct identity_screen *id_screen = identity_screen(_screen); - struct identity_buffer *id_buffer = identity_buffer(_buffer); - struct pipe_screen *screen = id_screen->screen; - struct pipe_buffer *buffer = id_buffer->buffer; - - return screen->buffer_map_range(screen, - buffer, - offset, - length, - usage); -} - -static void -identity_screen_buffer_flush_mapped_range(struct pipe_screen *_screen, - struct pipe_buffer *_buffer, - unsigned offset, - unsigned length) -{ - struct identity_screen *id_screen = identity_screen(_screen); - struct identity_buffer *id_buffer = identity_buffer(_buffer); - struct pipe_screen *screen = id_screen->screen; - struct pipe_buffer *buffer = id_buffer->buffer; - - screen->buffer_flush_mapped_range(screen, - buffer, - offset, - length); -} - -static void -identity_screen_buffer_unmap(struct pipe_screen *_screen, - struct pipe_buffer *_buffer) -{ - struct identity_screen *id_screen = identity_screen(_screen); - struct identity_buffer *id_buffer = identity_buffer(_buffer); - struct pipe_screen *screen = id_screen->screen; - struct pipe_buffer *buffer = id_buffer->buffer; - - screen->buffer_unmap(screen, - buffer); -} - -static void -identity_screen_buffer_destroy(struct pipe_buffer *_buffer) -{ - identity_buffer_destroy(identity_buffer(_buffer)); -} static void identity_screen_flush_frontbuffer(struct pipe_screen *_screen, @@ -467,27 +305,13 @@ identity_screen_create(struct pipe_screen *screen) id_screen->base.get_paramf = identity_screen_get_paramf; id_screen->base.is_format_supported = identity_screen_is_format_supported; id_screen->base.context_create = identity_screen_context_create; - id_screen->base.texture_create = identity_screen_texture_create; - id_screen->base.texture_blanket = identity_screen_texture_blanket; - id_screen->base.texture_destroy = identity_screen_texture_destroy; + id_screen->base.resource_create = identity_screen_resource_create; + id_screen->base.resource_from_handle = identity_screen_resource_from_handle; + id_screen->base.resource_get_handle = identity_screen_resource_get_handle; + id_screen->base.resource_destroy = identity_screen_resource_destroy; id_screen->base.get_tex_surface = identity_screen_get_tex_surface; id_screen->base.tex_surface_destroy = identity_screen_tex_surface_destroy; - id_screen->base.get_tex_transfer = identity_screen_get_tex_transfer; - id_screen->base.tex_transfer_destroy = identity_screen_tex_transfer_destroy; - id_screen->base.transfer_map = identity_screen_transfer_map; - id_screen->base.transfer_unmap = identity_screen_transfer_unmap; - id_screen->base.buffer_create = identity_screen_buffer_create; id_screen->base.user_buffer_create = identity_screen_user_buffer_create; - id_screen->base.surface_buffer_create = identity_screen_surface_buffer_create; - if (screen->buffer_map) - id_screen->base.buffer_map = identity_screen_buffer_map; - if (screen->buffer_map_range) - id_screen->base.buffer_map_range = identity_screen_buffer_map_range; - if (screen->buffer_flush_mapped_range) - id_screen->base.buffer_flush_mapped_range = identity_screen_buffer_flush_mapped_range; - if (screen->buffer_unmap) - id_screen->base.buffer_unmap = identity_screen_buffer_unmap; - id_screen->base.buffer_destroy = identity_screen_buffer_destroy; id_screen->base.flush_frontbuffer = identity_screen_flush_frontbuffer; id_screen->base.fence_reference = identity_screen_fence_reference; id_screen->base.fence_signalled = identity_screen_fence_signalled; diff --git a/src/gallium/drivers/llvmpipe/Makefile b/src/gallium/drivers/llvmpipe/Makefile index 41ac1cee72d..4ea367597e1 100644 --- a/src/gallium/drivers/llvmpipe/Makefile +++ b/src/gallium/drivers/llvmpipe/Makefile @@ -6,7 +6,12 @@ LIBNAME = llvmpipe DEFINES += -D__STDC_CONSTANT_MACROS -D__STDC_LIMIT_MACROS C_SOURCES = \ - lp_buffer.c \ + lp_bld_alpha.c \ + lp_bld_blend_aos.c \ + lp_bld_blend_logicop.c \ + lp_bld_blend_soa.c \ + lp_bld_depth.c \ + lp_bld_interp.c \ lp_clear.c \ lp_context.c \ lp_draw_arrays.c \ @@ -35,27 +40,27 @@ C_SOURCES = \ lp_state_vertex.c \ lp_state_vs.c \ lp_surface.c \ - lp_tex_sample_llvm.c \ + lp_tex_sample.c \ lp_texture.c \ lp_tile_image.c \ lp_tile_soa.c CPP_SOURCES = \ +PROGS := lp_test_format \ + lp_test_blend \ + lp_test_conv \ + lp_test_printf + include ../../Makefile.template -lp_tile_soa.c: lp_tile_soa.py ../../auxiliary/util/u_format_parse.py ../../auxiliary/util/u_format_access.py ../../auxiliary/util/u_format.csv +lp_tile_soa.c: lp_tile_soa.py ../../auxiliary/util/u_format_parse.py ../../auxiliary/util/u_format_pack.py ../../auxiliary/util/u_format.csv python lp_tile_soa.py ../../auxiliary/util/u_format.csv > $@ +LDFLAGS += $(LLVM_LDFLAGS) +LIBS += $(GL_LIB_DEPS) -L../../auxiliary/ -lgallium libllvmpipe.a $(LLVM_LIBS) +LD=g++ -testprogs := lp_test_format \ - lp_test_blend \ - lp_test_conv - -LIBS += $(GL_LIB_DEPS) -L. -lllvmpipe -L../../auxiliary/ -lgallium - -$(testprogs): lp_test_% : lp_test_%.o lp_test_main.o libllvmpipe.a - $(LD) $(filter %.o,$^) -o $@ -Wl,--start-group $(LIBS) -Wl,--end-group +$(PROGS): lp_test_main.o libllvmpipe.a -default: $(testprogs) diff --git a/src/gallium/drivers/llvmpipe/README b/src/gallium/drivers/llvmpipe/README index bf4c9a5727c..3c3fd386b52 100644 --- a/src/gallium/drivers/llvmpipe/README +++ b/src/gallium/drivers/llvmpipe/README @@ -12,7 +12,11 @@ Done so far is: - depth testing - - texture sampling (not all state/formats are supported) + - texture sampling + - 1D/2D/3D/cube maps supported + - all texture wrap modes supported + - all texture filtering modes supported + - perhaps not all texture formats yet supported - fragment shader TGSI translation - same level of support as the TGSI SSE2 exec machine, with the exception @@ -37,8 +41,6 @@ To do (probably by this order): - code generate stipple and stencil testing - - translate the remaining bits of texture sampling state - - translate TGSI control flow instructions, and all other remaining opcodes - integrate with the draw module for VS code generation @@ -57,7 +59,7 @@ Requirements See /proc/cpuinfo to know what your CPU supports. - - LLVM 2.6. + - LLVM 2.6 (or later) For Linux, on a recent Debian based distribution do: @@ -67,6 +69,9 @@ Requirements http://people.freedesktop.org/~jrfonseca/llvm/ and set the LLVM environment variable to the extracted path. + The version of LLVM from SVN ("2.7svn") from mid-March 2010 seems pretty + stable and has some features not in version 2.6. + - scons (optional) - udis86, http://udis86.sourceforge.net/ (optional): @@ -140,11 +145,13 @@ Development Notes then skim through the lp_bld_* functions called in there, and the comments at the top of the lp_bld_*.c functions. -- All lp_bld_*.[ch] are isolated from the rest of the driver, and could/may be - put in a stand-alone Gallium state -> LLVM IR translation module. +- The driver-independent parts of the LLVM / Gallium code are found in + src/gallium/auxiliary/gallivm/. The filenames and function prefixes + need to be renamed from "lp_bld_" to something else though. - We use LLVM-C bindings for now. They are not documented, but follow the C++ interfaces very closely, and appear to be complete enough for code generation. See http://npcontemplation.blogspot.com/2008/06/secret-of-llvm-c-bindings.html for a stand-alone example. + See the llvm-c/Core.h file for reference. diff --git a/src/gallium/drivers/llvmpipe/SConscript b/src/gallium/drivers/llvmpipe/SConscript index 13c1a13e87a..2911cf2179a 100644 --- a/src/gallium/drivers/llvmpipe/SConscript +++ b/src/gallium/drivers/llvmpipe/SConscript @@ -1,12 +1,11 @@ Import('*') -env = env.Clone() - -env.Tool('llvm') -if not env.has_key('LLVM_VERSION'): - print 'warning: LLVM not found: not building llvmpipe' +if not env['llvm']: + print 'warning: LLVM disabled: not building llvmpipe' Return() +env = env.Clone() + env.Tool('udis86') env.Append(CPPPATH = ['.']) @@ -22,13 +21,17 @@ env.CodeGenerate( env.Depends('lp_tile_soa.c', [ '#src/gallium/auxiliary/util/u_format_parse.py', '#src/gallium/auxiliary/util/u_format_pack.py', - '#src/gallium/auxiliary/util/u_format_access.py', ]) llvmpipe = env.ConvenienceLibrary( target = 'llvmpipe', source = [ - 'lp_buffer.c', + 'lp_bld_alpha.c', + 'lp_bld_blend_aos.c', + 'lp_bld_blend_logicop.c', + 'lp_bld_blend_soa.c', + 'lp_bld_depth.c', + 'lp_bld_interp.c', 'lp_clear.c', 'lp_context.c', 'lp_draw_arrays.c', @@ -57,7 +60,7 @@ llvmpipe = env.ConvenienceLibrary( 'lp_state_vertex.c', 'lp_state_vs.c', 'lp_surface.c', - 'lp_tex_sample_llvm.c', + 'lp_tex_sample.c', 'lp_texture.c', 'lp_tile_image.c', 'lp_tile_soa.c', diff --git a/src/gallium/drivers/trace/tr_buffer.h b/src/gallium/drivers/llvmpipe/lp_bld_alpha.c index 1a2d0b9aeae..8514030cde4 100644 --- a/src/gallium/drivers/trace/tr_buffer.h +++ b/src/gallium/drivers/llvmpipe/lp_bld_alpha.c @@ -18,53 +18,47 @@ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. * **************************************************************************/ -#ifndef TR_BUFFER_H_ -#define TR_BUFFER_H_ - +/** + * Alpha testing to LLVM IR translation. + * + * @author Jose Fonseca <[email protected]> + */ -#include "pipe/p_compiler.h" #include "pipe/p_state.h" -#include "tr_screen.h" - - -struct trace_buffer -{ - struct pipe_buffer base; - - struct pipe_buffer *buffer; +#include "gallivm/lp_bld_type.h" +#include "gallivm/lp_bld_const.h" +#include "gallivm/lp_bld_logic.h" +#include "gallivm/lp_bld_flow.h" +#include "gallivm/lp_bld_debug.h" - struct tr_list list; +#include "lp_bld_alpha.h" - void *map; - boolean range_flushed; -}; - -static INLINE struct trace_buffer * -trace_buffer(struct pipe_buffer *buffer) +void +lp_build_alpha_test(LLVMBuilderRef builder, + const struct pipe_alpha_state *state, + struct lp_type type, + struct lp_build_mask_context *mask, + LLVMValueRef alpha, + LLVMValueRef ref) { - if(!buffer) - return NULL; - (void)trace_screen(buffer->screen); - return (struct trace_buffer *)buffer; -} + struct lp_build_context bld; + lp_build_context_init(&bld, builder, type); -struct pipe_buffer * -trace_buffer_create(struct trace_screen *tr_scr, - struct pipe_buffer *buffer); - -void -trace_buffer_destroy(struct trace_screen *tr_scr, - struct pipe_buffer *buffer); + if(state->enabled) { + LLVMValueRef test = lp_build_cmp(&bld, state->func, alpha, ref); + lp_build_name(test, "alpha_mask"); -#endif + lp_build_mask_update(mask, test); + } +} diff --git a/src/gallium/drivers/llvmpipe/lp_buffer.h b/src/gallium/drivers/llvmpipe/lp_bld_alpha.h index d6b8184a0b9..0f99fec65ed 100644 --- a/src/gallium/drivers/llvmpipe/lp_buffer.h +++ b/src/gallium/drivers/llvmpipe/lp_bld_alpha.h @@ -25,31 +25,30 @@ * **************************************************************************/ -#ifndef LP_BUFFER_H -#define LP_BUFFER_H - -#include "pipe/p_compiler.h" -#include "pipe/p_state.h" +/** + * Alpha testing to LLVM IR translation. + * + * @author Jose Fonseca <[email protected]> + */ +#ifndef LP_BLD_ALPHA_H +#define LP_BLD_ALPHA_H -struct llvmpipe_buffer -{ - struct pipe_buffer base; - boolean userBuffer; /** Is this a user-space buffer? */ - void *data; -}; +#include "gallivm/lp_bld.h" -/** Cast wrapper */ -static INLINE struct llvmpipe_buffer * -llvmpipe_buffer( struct pipe_buffer *buf ) -{ - return (struct llvmpipe_buffer *)buf; -} +struct pipe_alpha_state; +struct lp_type; +struct lp_build_mask_context; void -llvmpipe_init_screen_buffer_funcs(struct pipe_screen *screen); +lp_build_alpha_test(LLVMBuilderRef builder, + const struct pipe_alpha_state *state, + struct lp_type type, + struct lp_build_mask_context *mask, + LLVMValueRef alpha, + LLVMValueRef ref); -#endif /* LP_BUFFER_H */ +#endif /* !LP_BLD_ALPHA_H */ diff --git a/src/gallium/drivers/llvmpipe/lp_bld_blend.h b/src/gallium/drivers/llvmpipe/lp_bld_blend.h new file mode 100644 index 00000000000..ebbdb1a604c --- /dev/null +++ b/src/gallium/drivers/llvmpipe/lp_bld_blend.h @@ -0,0 +1,107 @@ +/************************************************************************** + * + * Copyright 2009 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +#ifndef LP_BLD_BLEND_H +#define LP_BLD_BLEND_H + + +/** + * @file + * LLVM IR building helpers interfaces. + * + * We use LLVM-C bindings for now. They are not documented, but follow the C++ + * interfaces very closely, and appear to be complete enough for code + * genration. See + * http://npcontemplation.blogspot.com/2008/06/secret-of-llvm-c-bindings.html + * for a standalone example. + */ + +#include "gallivm/lp_bld.h" + +#include "pipe/p_format.h" + + +struct pipe_blend_state; +struct lp_type; +struct lp_build_context; + + +/** + * Whether the blending function is commutative or not. + */ +boolean +lp_build_blend_func_commutative(unsigned func); + + +/** + * Whether the blending functions are the reverse of each other. + */ +boolean +lp_build_blend_func_reverse(unsigned rgb_func, unsigned alpha_func); + + +LLVMValueRef +lp_build_blend_func(struct lp_build_context *bld, + unsigned func, + LLVMValueRef term1, + LLVMValueRef term2); + + +LLVMValueRef +lp_build_blend_aos(LLVMBuilderRef builder, + const struct pipe_blend_state *blend, + struct lp_type type, + LLVMValueRef src, + LLVMValueRef dst, + LLVMValueRef const_, + unsigned alpha_swizzle); + + +void +lp_build_blend_soa(LLVMBuilderRef builder, + const struct pipe_blend_state *blend, + struct lp_type type, + LLVMValueRef src[4], + LLVMValueRef dst[4], + LLVMValueRef const_[4], + LLVMValueRef res[4]); + + +/** + * Apply a logic op. + * + * src/dst parameters are packed values. It should work regardless the inputs + * are scalars, or a vector. + */ +LLVMValueRef +lp_build_logicop(LLVMBuilderRef builder, + unsigned logicop_func, + LLVMValueRef src, + LLVMValueRef dst); + + +#endif /* !LP_BLD_BLEND_H */ diff --git a/src/gallium/drivers/llvmpipe/lp_bld_blend_aos.c b/src/gallium/drivers/llvmpipe/lp_bld_blend_aos.c new file mode 100644 index 00000000000..3fa5e51cac5 --- /dev/null +++ b/src/gallium/drivers/llvmpipe/lp_bld_blend_aos.c @@ -0,0 +1,360 @@ +/************************************************************************** + * + * Copyright 2009 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + + +/** + * @file + * Blend LLVM IR generation -- AoS layout. + * + * AoS blending is in general much slower than SoA, but there are some cases + * where it might be faster. In particular, if a pixel is rendered only once + * then the overhead of tiling and untiling will dominate over the speedup that + * SoA gives. So we might want to detect such cases and fallback to AoS in the + * future, but for now this function is here for historical/benchmarking + * purposes. + * + * Run lp_blend_test after any change to this file. + * + * @author Jose Fonseca <[email protected]> + */ + + +#include "pipe/p_state.h" +#include "util/u_debug.h" + +#include "gallivm/lp_bld_type.h" +#include "gallivm/lp_bld_const.h" +#include "gallivm/lp_bld_arit.h" +#include "gallivm/lp_bld_logic.h" +#include "gallivm/lp_bld_swizzle.h" +#include "gallivm/lp_bld_debug.h" + +#include "lp_bld_blend.h" + + +/** + * We may the same values several times, so we keep them here to avoid + * recomputing them. Also reusing the values allows us to do simplifications + * that LLVM optimization passes wouldn't normally be able to do. + */ +struct lp_build_blend_aos_context +{ + struct lp_build_context base; + + LLVMValueRef src; + LLVMValueRef dst; + LLVMValueRef const_; + + LLVMValueRef inv_src; + LLVMValueRef inv_dst; + LLVMValueRef inv_const; + LLVMValueRef saturate; + + LLVMValueRef rgb_src_factor; + LLVMValueRef alpha_src_factor; + LLVMValueRef rgb_dst_factor; + LLVMValueRef alpha_dst_factor; +}; + + +static LLVMValueRef +lp_build_blend_factor_unswizzled(struct lp_build_blend_aos_context *bld, + unsigned factor, + boolean alpha) +{ + switch (factor) { + case PIPE_BLENDFACTOR_ZERO: + return bld->base.zero; + case PIPE_BLENDFACTOR_ONE: + return bld->base.one; + case PIPE_BLENDFACTOR_SRC_COLOR: + case PIPE_BLENDFACTOR_SRC_ALPHA: + return bld->src; + case PIPE_BLENDFACTOR_DST_COLOR: + case PIPE_BLENDFACTOR_DST_ALPHA: + return bld->dst; + case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE: + if(alpha) + return bld->base.one; + else { + if(!bld->inv_dst) + bld->inv_dst = lp_build_comp(&bld->base, bld->dst); + if(!bld->saturate) + bld->saturate = lp_build_min(&bld->base, bld->src, bld->inv_dst); + return bld->saturate; + } + case PIPE_BLENDFACTOR_CONST_COLOR: + case PIPE_BLENDFACTOR_CONST_ALPHA: + return bld->const_; + case PIPE_BLENDFACTOR_SRC1_COLOR: + case PIPE_BLENDFACTOR_SRC1_ALPHA: + /* TODO */ + assert(0); + return bld->base.zero; + case PIPE_BLENDFACTOR_INV_SRC_COLOR: + case PIPE_BLENDFACTOR_INV_SRC_ALPHA: + if(!bld->inv_src) + bld->inv_src = lp_build_comp(&bld->base, bld->src); + return bld->inv_src; + case PIPE_BLENDFACTOR_INV_DST_COLOR: + case PIPE_BLENDFACTOR_INV_DST_ALPHA: + if(!bld->inv_dst) + bld->inv_dst = lp_build_comp(&bld->base, bld->dst); + return bld->inv_dst; + case PIPE_BLENDFACTOR_INV_CONST_COLOR: + case PIPE_BLENDFACTOR_INV_CONST_ALPHA: + if(!bld->inv_const) + bld->inv_const = lp_build_comp(&bld->base, bld->const_); + return bld->inv_const; + case PIPE_BLENDFACTOR_INV_SRC1_COLOR: + case PIPE_BLENDFACTOR_INV_SRC1_ALPHA: + /* TODO */ + assert(0); + return bld->base.zero; + default: + assert(0); + return bld->base.zero; + } +} + + +enum lp_build_blend_swizzle { + LP_BUILD_BLEND_SWIZZLE_RGBA = 0, + LP_BUILD_BLEND_SWIZZLE_AAAA = 1 +}; + + +/** + * How should we shuffle the base factor. + */ +static enum lp_build_blend_swizzle +lp_build_blend_factor_swizzle(unsigned factor) +{ + switch (factor) { + case PIPE_BLENDFACTOR_ONE: + case PIPE_BLENDFACTOR_ZERO: + case PIPE_BLENDFACTOR_SRC_COLOR: + case PIPE_BLENDFACTOR_DST_COLOR: + case PIPE_BLENDFACTOR_CONST_COLOR: + case PIPE_BLENDFACTOR_SRC1_COLOR: + case PIPE_BLENDFACTOR_INV_SRC_COLOR: + case PIPE_BLENDFACTOR_INV_DST_COLOR: + case PIPE_BLENDFACTOR_INV_CONST_COLOR: + case PIPE_BLENDFACTOR_INV_SRC1_COLOR: + return LP_BUILD_BLEND_SWIZZLE_RGBA; + case PIPE_BLENDFACTOR_SRC_ALPHA: + case PIPE_BLENDFACTOR_DST_ALPHA: + case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE: + case PIPE_BLENDFACTOR_SRC1_ALPHA: + case PIPE_BLENDFACTOR_CONST_ALPHA: + case PIPE_BLENDFACTOR_INV_SRC_ALPHA: + case PIPE_BLENDFACTOR_INV_DST_ALPHA: + case PIPE_BLENDFACTOR_INV_CONST_ALPHA: + case PIPE_BLENDFACTOR_INV_SRC1_ALPHA: + return LP_BUILD_BLEND_SWIZZLE_AAAA; + default: + assert(0); + return LP_BUILD_BLEND_SWIZZLE_RGBA; + } +} + + +static LLVMValueRef +lp_build_blend_swizzle(struct lp_build_blend_aos_context *bld, + LLVMValueRef rgb, + LLVMValueRef alpha, + enum lp_build_blend_swizzle rgb_swizzle, + unsigned alpha_swizzle) +{ + if(rgb == alpha) { + if(rgb_swizzle == LP_BUILD_BLEND_SWIZZLE_RGBA) + return rgb; + if(rgb_swizzle == LP_BUILD_BLEND_SWIZZLE_AAAA) + return lp_build_broadcast_aos(&bld->base, rgb, alpha_swizzle); + } + else { + if(rgb_swizzle == LP_BUILD_BLEND_SWIZZLE_RGBA) { + boolean cond[4] = {0, 0, 0, 0}; + cond[alpha_swizzle] = 1; + return lp_build_select_aos(&bld->base, alpha, rgb, cond); + } + if(rgb_swizzle == LP_BUILD_BLEND_SWIZZLE_AAAA) { + unsigned char swizzle[4]; + swizzle[0] = alpha_swizzle; + swizzle[1] = alpha_swizzle; + swizzle[2] = alpha_swizzle; + swizzle[3] = alpha_swizzle; + swizzle[alpha_swizzle] += 4; + return lp_build_swizzle2_aos(&bld->base, rgb, alpha, swizzle); + } + } + assert(0); + return bld->base.undef; +} + + +/** + * @sa http://www.opengl.org/sdk/docs/man/xhtml/glBlendFuncSeparate.xml + */ +static LLVMValueRef +lp_build_blend_factor(struct lp_build_blend_aos_context *bld, + LLVMValueRef factor1, + unsigned rgb_factor, + unsigned alpha_factor, + unsigned alpha_swizzle) +{ + LLVMValueRef rgb_factor_; + LLVMValueRef alpha_factor_; + LLVMValueRef factor2; + enum lp_build_blend_swizzle rgb_swizzle; + + rgb_factor_ = lp_build_blend_factor_unswizzled(bld, rgb_factor, FALSE); + alpha_factor_ = lp_build_blend_factor_unswizzled(bld, alpha_factor, TRUE); + + rgb_swizzle = lp_build_blend_factor_swizzle(rgb_factor); + + factor2 = lp_build_blend_swizzle(bld, rgb_factor_, alpha_factor_, rgb_swizzle, alpha_swizzle); + + return lp_build_mul(&bld->base, factor1, factor2); +} + + +boolean +lp_build_blend_func_commutative(unsigned func) +{ + switch (func) { + case PIPE_BLEND_ADD: + case PIPE_BLEND_MIN: + case PIPE_BLEND_MAX: + return TRUE; + case PIPE_BLEND_SUBTRACT: + case PIPE_BLEND_REVERSE_SUBTRACT: + return FALSE; + default: + assert(0); + return TRUE; + } +} + + +boolean +lp_build_blend_func_reverse(unsigned rgb_func, unsigned alpha_func) +{ + if(rgb_func == alpha_func) + return FALSE; + if(rgb_func == PIPE_BLEND_SUBTRACT && alpha_func == PIPE_BLEND_REVERSE_SUBTRACT) + return TRUE; + if(rgb_func == PIPE_BLEND_REVERSE_SUBTRACT && alpha_func == PIPE_BLEND_SUBTRACT) + return TRUE; + return FALSE; +} + + +/** + * @sa http://www.opengl.org/sdk/docs/man/xhtml/glBlendEquationSeparate.xml + */ +LLVMValueRef +lp_build_blend_func(struct lp_build_context *bld, + unsigned func, + LLVMValueRef term1, + LLVMValueRef term2) +{ + switch (func) { + case PIPE_BLEND_ADD: + return lp_build_add(bld, term1, term2); + case PIPE_BLEND_SUBTRACT: + return lp_build_sub(bld, term1, term2); + case PIPE_BLEND_REVERSE_SUBTRACT: + return lp_build_sub(bld, term2, term1); + case PIPE_BLEND_MIN: + return lp_build_min(bld, term1, term2); + case PIPE_BLEND_MAX: + return lp_build_max(bld, term1, term2); + default: + assert(0); + return bld->zero; + } +} + + +LLVMValueRef +lp_build_blend_aos(LLVMBuilderRef builder, + const struct pipe_blend_state *blend, + struct lp_type type, + LLVMValueRef src, + LLVMValueRef dst, + LLVMValueRef const_, + unsigned alpha_swizzle) +{ + struct lp_build_blend_aos_context bld; + LLVMValueRef src_term; + LLVMValueRef dst_term; + + /* FIXME */ + assert(blend->independent_blend_enable == 0); + assert(blend->rt[0].colormask == 0xf); + + if(!blend->rt[0].blend_enable) + return src; + + /* It makes no sense to blend unless values are normalized */ + assert(type.norm); + + /* Setup build context */ + memset(&bld, 0, sizeof bld); + lp_build_context_init(&bld.base, builder, type); + bld.src = src; + bld.dst = dst; + bld.const_ = const_; + + /* TODO: There are still a few optimization opportunities here. For certain + * combinations it is possible to reorder the operations and therefore saving + * some instructions. */ + + src_term = lp_build_blend_factor(&bld, src, blend->rt[0].rgb_src_factor, + blend->rt[0].alpha_src_factor, alpha_swizzle); + dst_term = lp_build_blend_factor(&bld, dst, blend->rt[0].rgb_dst_factor, + blend->rt[0].alpha_dst_factor, alpha_swizzle); + + lp_build_name(src_term, "src_term"); + lp_build_name(dst_term, "dst_term"); + + if(blend->rt[0].rgb_func == blend->rt[0].alpha_func) { + return lp_build_blend_func(&bld.base, blend->rt[0].rgb_func, src_term, dst_term); + } + else { + /* Seperate RGB / A functions */ + + LLVMValueRef rgb; + LLVMValueRef alpha; + + rgb = lp_build_blend_func(&bld.base, blend->rt[0].rgb_func, src_term, dst_term); + alpha = lp_build_blend_func(&bld.base, blend->rt[0].alpha_func, src_term, dst_term); + + return lp_build_blend_swizzle(&bld, rgb, alpha, LP_BUILD_BLEND_SWIZZLE_RGBA, alpha_swizzle); + } +} diff --git a/src/gallium/drivers/llvmpipe/lp_bld_blend_logicop.c b/src/gallium/drivers/llvmpipe/lp_bld_blend_logicop.c new file mode 100644 index 00000000000..1eac0a5c891 --- /dev/null +++ b/src/gallium/drivers/llvmpipe/lp_bld_blend_logicop.c @@ -0,0 +1,109 @@ +/************************************************************************** + * + * Copyright 2009 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + + +/** + * @file + * Blend LLVM IR generation -- logic ops. + * + * @author Jose Fonseca <[email protected]> + */ + + +#include "pipe/p_state.h" +#include "util/u_debug.h" + +#include "lp_bld_blend.h" + + +LLVMValueRef +lp_build_logicop(LLVMBuilderRef builder, + unsigned logicop_func, + LLVMValueRef src, + LLVMValueRef dst) +{ + LLVMTypeRef type; + LLVMValueRef res; + + type = LLVMTypeOf(src); + + switch (logicop_func) { + case PIPE_LOGICOP_CLEAR: + res = LLVMConstNull(type); + break; + case PIPE_LOGICOP_NOR: + res = LLVMBuildNot(builder, LLVMBuildOr(builder, src, dst, ""), ""); + break; + case PIPE_LOGICOP_AND_INVERTED: + res = LLVMBuildAnd(builder, LLVMBuildNot(builder, src, ""), dst, ""); + break; + case PIPE_LOGICOP_COPY_INVERTED: + res = LLVMBuildNot(builder, src, ""); + break; + case PIPE_LOGICOP_AND_REVERSE: + res = LLVMBuildAnd(builder, src, LLVMBuildNot(builder, dst, ""), ""); + break; + case PIPE_LOGICOP_INVERT: + res = LLVMBuildNot(builder, dst, ""); + break; + case PIPE_LOGICOP_XOR: + res = LLVMBuildXor(builder, src, dst, ""); + break; + case PIPE_LOGICOP_NAND: + res = LLVMBuildNot(builder, LLVMBuildAnd(builder, src, dst, ""), ""); + break; + case PIPE_LOGICOP_AND: + res = LLVMBuildAnd(builder, src, dst, ""); + break; + case PIPE_LOGICOP_EQUIV: + res = LLVMBuildNot(builder, LLVMBuildXor(builder, src, dst, ""), ""); + break; + case PIPE_LOGICOP_NOOP: + res = dst; + break; + case PIPE_LOGICOP_OR_INVERTED: + res = LLVMBuildOr(builder, LLVMBuildNot(builder, src, ""), dst, ""); + break; + case PIPE_LOGICOP_COPY: + res = src; + break; + case PIPE_LOGICOP_OR_REVERSE: + res = LLVMBuildOr(builder, src, LLVMBuildNot(builder, dst, ""), ""); + break; + case PIPE_LOGICOP_OR: + res = LLVMBuildOr(builder, src, dst, ""); + break; + case PIPE_LOGICOP_SET: + res = LLVMConstAllOnes(type); + break; + default: + assert(0); + res = src; + } + + return res; +} diff --git a/src/gallium/drivers/llvmpipe/lp_bld_blend_soa.c b/src/gallium/drivers/llvmpipe/lp_bld_blend_soa.c new file mode 100644 index 00000000000..b7523eb9c13 --- /dev/null +++ b/src/gallium/drivers/llvmpipe/lp_bld_blend_soa.c @@ -0,0 +1,315 @@ +/************************************************************************** + * + * Copyright 2009 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + + +/** + * @file + * Blend LLVM IR generation -- SoA layout. + * + * Blending in SoA is much faster than AoS, especially when separate rgb/alpha + * factors/functions are used, since no channel masking/shuffling is necessary + * and we can achieve the full throughput of the SIMD operations. Furthermore + * the fragment shader output is also in SoA, so it fits nicely with the rest of + * the fragment pipeline. + * + * The drawback is that to be displayed the color buffer needs to be in AoS + * layout, so we need to tile/untile the color buffer before/after rendering. + * A color buffer like + * + * R11 G11 B11 A11 R12 G12 B12 A12 R13 G13 B13 A13 R14 G14 B14 A14 ... + * R21 G21 B21 A21 R22 G22 B22 A22 R23 G23 B23 A23 R24 G24 B24 A24 ... + * + * R31 G31 B31 A31 R32 G32 B32 A32 R33 G33 B33 A33 R34 G34 B34 A34 ... + * R41 G41 B41 A41 R42 G42 B42 A42 R43 G43 B43 A43 R44 G44 B44 A44 ... + * + * ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... + * + * will actually be stored in memory as + * + * R11 R12 R21 R22 R13 R14 R23 R24 ... G11 G12 G21 G22 G13 G14 G23 G24 ... B11 B12 B21 B22 B13 B14 B23 B24 ... A11 A12 A21 A22 A13 A14 A23 A24 ... + * R31 R32 R41 R42 R33 R34 R43 R44 ... G31 G32 G41 G42 G33 G34 G43 G44 ... B31 B32 B41 B42 B33 B34 B43 B44 ... A31 A32 A41 A42 A33 A34 A43 A44 ... + * ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... ... + * + * NOTE: Run lp_blend_test after any change to this file. + * + * You can also run lp_blend_test to obtain AoS vs SoA benchmarks. Invoking it + * as: + * + * lp_blend_test -o blend.tsv + * + * will generate a tab-seperated-file with the test results and performance + * measurements. + * + * @author Jose Fonseca <[email protected]> + */ + + +#include "pipe/p_state.h" +#include "util/u_debug.h" + +#include "gallivm/lp_bld_type.h" +#include "gallivm/lp_bld_arit.h" +#include "lp_bld_blend.h" + + +/** + * We may the same values several times, so we keep them here to avoid + * recomputing them. Also reusing the values allows us to do simplifications + * that LLVM optimization passes wouldn't normally be able to do. + */ +struct lp_build_blend_soa_context +{ + struct lp_build_context base; + + LLVMValueRef src[4]; + LLVMValueRef dst[4]; + LLVMValueRef con[4]; + + LLVMValueRef inv_src[4]; + LLVMValueRef inv_dst[4]; + LLVMValueRef inv_con[4]; + + LLVMValueRef src_alpha_saturate; + + /** + * We store all factors in a table in order to eliminate redundant + * multiplications later. + */ + LLVMValueRef factor[2][2][4]; + + /** + * Table with all terms. + */ + LLVMValueRef term[2][4]; +}; + + +static LLVMValueRef +lp_build_blend_soa_factor(struct lp_build_blend_soa_context *bld, + unsigned factor, unsigned i) +{ + /* + * Compute src/first term RGB + */ + switch (factor) { + case PIPE_BLENDFACTOR_ONE: + return bld->base.one; + case PIPE_BLENDFACTOR_SRC_COLOR: + return bld->src[i]; + case PIPE_BLENDFACTOR_SRC_ALPHA: + return bld->src[3]; + case PIPE_BLENDFACTOR_DST_COLOR: + return bld->dst[i]; + case PIPE_BLENDFACTOR_DST_ALPHA: + return bld->dst[3]; + case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE: + if(i == 3) + return bld->base.one; + else { + if(!bld->inv_dst[3]) + bld->inv_dst[3] = lp_build_comp(&bld->base, bld->dst[3]); + if(!bld->src_alpha_saturate) + bld->src_alpha_saturate = lp_build_min(&bld->base, bld->src[3], bld->inv_dst[3]); + return bld->src_alpha_saturate; + } + case PIPE_BLENDFACTOR_CONST_COLOR: + return bld->con[i]; + case PIPE_BLENDFACTOR_CONST_ALPHA: + return bld->con[3]; + case PIPE_BLENDFACTOR_SRC1_COLOR: + /* TODO */ + assert(0); + return bld->base.zero; + case PIPE_BLENDFACTOR_SRC1_ALPHA: + /* TODO */ + assert(0); + return bld->base.zero; + case PIPE_BLENDFACTOR_ZERO: + return bld->base.zero; + case PIPE_BLENDFACTOR_INV_SRC_COLOR: + if(!bld->inv_src[i]) + bld->inv_src[i] = lp_build_comp(&bld->base, bld->src[i]); + return bld->inv_src[i]; + case PIPE_BLENDFACTOR_INV_SRC_ALPHA: + if(!bld->inv_src[3]) + bld->inv_src[3] = lp_build_comp(&bld->base, bld->src[3]); + return bld->inv_src[3]; + case PIPE_BLENDFACTOR_INV_DST_COLOR: + if(!bld->inv_dst[i]) + bld->inv_dst[i] = lp_build_comp(&bld->base, bld->dst[i]); + return bld->inv_dst[i]; + case PIPE_BLENDFACTOR_INV_DST_ALPHA: + if(!bld->inv_dst[3]) + bld->inv_dst[3] = lp_build_comp(&bld->base, bld->dst[3]); + return bld->inv_dst[3]; + case PIPE_BLENDFACTOR_INV_CONST_COLOR: + if(!bld->inv_con[i]) + bld->inv_con[i] = lp_build_comp(&bld->base, bld->con[i]); + return bld->inv_con[i]; + case PIPE_BLENDFACTOR_INV_CONST_ALPHA: + if(!bld->inv_con[3]) + bld->inv_con[3] = lp_build_comp(&bld->base, bld->con[3]); + return bld->inv_con[3]; + case PIPE_BLENDFACTOR_INV_SRC1_COLOR: + /* TODO */ + assert(0); + return bld->base.zero; + case PIPE_BLENDFACTOR_INV_SRC1_ALPHA: + /* TODO */ + assert(0); + return bld->base.zero; + default: + assert(0); + return bld->base.zero; + } +} + + +/** + * Generate blend code in SOA mode. + * \param src src/fragment color + * \param dst dst/framebuffer color + * \param con constant blend color + * \param res the result/output + */ +void +lp_build_blend_soa(LLVMBuilderRef builder, + const struct pipe_blend_state *blend, + struct lp_type type, + LLVMValueRef src[4], + LLVMValueRef dst[4], + LLVMValueRef con[4], + LLVMValueRef res[4]) +{ + struct lp_build_blend_soa_context bld; + unsigned i, j, k; + + /* Setup build context */ + memset(&bld, 0, sizeof bld); + lp_build_context_init(&bld.base, builder, type); + for (i = 0; i < 4; ++i) { + bld.src[i] = src[i]; + bld.dst[i] = dst[i]; + bld.con[i] = con[i]; + } + + for (i = 0; i < 4; ++i) { + if (blend->rt[0].colormask & (1 << i)) { + if (blend->logicop_enable) { + if(!type.floating) { + res[i] = lp_build_logicop(builder, blend->logicop_func, src[i], dst[i]); + } + else + res[i] = dst[i]; + } + else if (blend->rt[0].blend_enable) { + unsigned src_factor = i < 3 ? blend->rt[0].rgb_src_factor : blend->rt[0].alpha_src_factor; + unsigned dst_factor = i < 3 ? blend->rt[0].rgb_dst_factor : blend->rt[0].alpha_dst_factor; + unsigned func = i < 3 ? blend->rt[0].rgb_func : blend->rt[0].alpha_func; + boolean func_commutative = lp_build_blend_func_commutative(func); + + /* It makes no sense to blend unless values are normalized */ + assert(type.norm); + + /* + * Compute src/dst factors. + */ + + bld.factor[0][0][i] = src[i]; + bld.factor[0][1][i] = lp_build_blend_soa_factor(&bld, src_factor, i); + bld.factor[1][0][i] = dst[i]; + bld.factor[1][1][i] = lp_build_blend_soa_factor(&bld, dst_factor, i); + + /* + * Compute src/dst terms + */ + + for(k = 0; k < 2; ++k) { + /* See if this multiplication has been previously computed */ + for(j = 0; j < i; ++j) { + if((bld.factor[k][0][j] == bld.factor[k][0][i] && + bld.factor[k][1][j] == bld.factor[k][1][i]) || + (bld.factor[k][0][j] == bld.factor[k][1][i] && + bld.factor[k][1][j] == bld.factor[k][0][i])) + break; + } + + if(j < i) + bld.term[k][i] = bld.term[k][j]; + else + bld.term[k][i] = lp_build_mul(&bld.base, bld.factor[k][0][i], bld.factor[k][1][i]); + + if (src_factor == PIPE_BLENDFACTOR_ZERO && + (dst_factor == PIPE_BLENDFACTOR_DST_ALPHA || + dst_factor == PIPE_BLENDFACTOR_INV_DST_ALPHA)) { + /* XXX special case these combos to work around an apparent + * bug in LLVM. + * This hack disables the check for multiplication by zero + * in lp_bld_mul(). When we optimize away the multiplication, + * something goes wrong during code generation and we segfault + * at runtime. + */ + LLVMValueRef zeroSave = bld.base.zero; + bld.base.zero = NULL; + bld.term[k][i] = lp_build_mul(&bld.base, bld.factor[k][0][i], + bld.factor[k][1][i]); + bld.base.zero = zeroSave; + } + } + + /* + * Combine terms + */ + + /* See if this function has been previously applied */ + for(j = 0; j < i; ++j) { + unsigned prev_func = j < 3 ? blend->rt[0].rgb_func : blend->rt[0].alpha_func; + unsigned func_reverse = lp_build_blend_func_reverse(func, prev_func); + + if((!func_reverse && + bld.term[0][j] == bld.term[0][i] && + bld.term[1][j] == bld.term[1][i]) || + ((func_commutative || func_reverse) && + bld.term[0][j] == bld.term[1][i] && + bld.term[1][j] == bld.term[0][i])) + break; + } + + if(j < i) + res[i] = res[j]; + else + res[i] = lp_build_blend_func(&bld.base, func, bld.term[0][i], bld.term[1][i]); + } + else { + res[i] = src[i]; + } + } + else { + res[i] = dst[i]; + } + } +} diff --git a/src/gallium/drivers/llvmpipe/lp_bld_depth.c b/src/gallium/drivers/llvmpipe/lp_bld_depth.c new file mode 100644 index 00000000000..1b59a13c946 --- /dev/null +++ b/src/gallium/drivers/llvmpipe/lp_bld_depth.c @@ -0,0 +1,685 @@ +/************************************************************************** + * + * Copyright 2009 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +/** + * @file + * Depth/stencil testing to LLVM IR translation. + * + * To be done accurately/efficiently the depth/stencil test must be done with + * the same type/format of the depth/stencil buffer, which implies massaging + * the incoming depths to fit into place. Using a more straightforward + * type/format for depth/stencil values internally and only convert when + * flushing would avoid this, but it would most likely result in depth fighting + * artifacts. + * + * We are free to use a different pixel layout though. Since our basic + * processing unit is a quad (2x2 pixel block) we store the depth/stencil + * values tiled, a quad at time. That is, a depth buffer containing + * + * Z11 Z12 Z13 Z14 ... + * Z21 Z22 Z23 Z24 ... + * Z31 Z32 Z33 Z34 ... + * Z41 Z42 Z43 Z44 ... + * ... ... ... ... ... + * + * will actually be stored in memory as + * + * Z11 Z12 Z21 Z22 Z13 Z14 Z23 Z24 ... + * Z31 Z32 Z41 Z42 Z33 Z34 Z43 Z44 ... + * ... ... ... ... ... ... ... ... ... + * + * + * Stencil test: + * Two-sided stencil test is supported but probably not as efficient as + * it could be. Currently, we use if/then/else constructs to do the + * operations for front vs. back-facing polygons. We could probably do + * both the front and back arithmetic then use a Select() instruction to + * choose the result depending on polyon orientation. We'd have to + * measure performance both ways and see which is better. + * + * @author Jose Fonseca <[email protected]> + */ + +#include "pipe/p_state.h" +#include "util/u_format.h" + +#include "gallivm/lp_bld_type.h" +#include "gallivm/lp_bld_arit.h" +#include "gallivm/lp_bld_const.h" +#include "gallivm/lp_bld_logic.h" +#include "gallivm/lp_bld_flow.h" +#include "gallivm/lp_bld_debug.h" +#include "gallivm/lp_bld_swizzle.h" + +#include "lp_bld_depth.h" + + +/** Used to select fields from pipe_stencil_state */ +enum stencil_op { + S_FAIL_OP, + Z_FAIL_OP, + Z_PASS_OP +}; + + + +/** + * Do the stencil test comparison (compare FB stencil values against ref value). + * This will be used twice when generating two-sided stencil code. + * \param stencil the front/back stencil state + * \param stencilRef the stencil reference value, replicated as a vector + * \param stencilVals vector of stencil values from framebuffer + * \return vector mask of pass/fail values (~0 or 0) + */ +static LLVMValueRef +lp_build_stencil_test_single(struct lp_build_context *bld, + const struct pipe_stencil_state *stencil, + LLVMValueRef stencilRef, + LLVMValueRef stencilVals) +{ + const unsigned stencilMax = 255; /* XXX fix */ + struct lp_type type = bld->type; + LLVMValueRef res; + + assert(type.sign); + + assert(stencil->enabled); + + if (stencil->valuemask != stencilMax) { + /* compute stencilRef = stencilRef & valuemask */ + LLVMValueRef valuemask = lp_build_const_int_vec(type, stencil->valuemask); + stencilRef = LLVMBuildAnd(bld->builder, stencilRef, valuemask, ""); + /* compute stencilVals = stencilVals & valuemask */ + stencilVals = LLVMBuildAnd(bld->builder, stencilVals, valuemask, ""); + } + + res = lp_build_cmp(bld, stencil->func, stencilRef, stencilVals); + + return res; +} + + +/** + * Do the one or two-sided stencil test comparison. + * \sa lp_build_stencil_test_single + * \param face an integer indicating front (+) or back (-) facing polygon. + * If NULL, assume front-facing. + */ +static LLVMValueRef +lp_build_stencil_test(struct lp_build_context *bld, + const struct pipe_stencil_state stencil[2], + LLVMValueRef stencilRefs[2], + LLVMValueRef stencilVals, + LLVMValueRef face) +{ + LLVMValueRef res; + + assert(stencil[0].enabled); + + if (stencil[1].enabled && face) { + /* do two-sided test */ + struct lp_build_flow_context *flow_ctx; + struct lp_build_if_state if_ctx; + LLVMValueRef front_facing; + LLVMValueRef zero = LLVMConstReal(LLVMFloatType(), 0.0); + LLVMValueRef result = bld->undef; + + flow_ctx = lp_build_flow_create(bld->builder); + lp_build_flow_scope_begin(flow_ctx); + + lp_build_flow_scope_declare(flow_ctx, &result); + + /* front_facing = face > 0.0 */ + front_facing = LLVMBuildFCmp(bld->builder, LLVMRealUGT, face, zero, ""); + + lp_build_if(&if_ctx, flow_ctx, bld->builder, front_facing); + { + result = lp_build_stencil_test_single(bld, &stencil[0], + stencilRefs[0], stencilVals); + } + lp_build_else(&if_ctx); + { + result = lp_build_stencil_test_single(bld, &stencil[1], + stencilRefs[1], stencilVals); + } + lp_build_endif(&if_ctx); + + lp_build_flow_scope_end(flow_ctx); + lp_build_flow_destroy(flow_ctx); + + res = result; + } + else { + /* do single-side test */ + res = lp_build_stencil_test_single(bld, &stencil[0], + stencilRefs[0], stencilVals); + } + + return res; +} + + +/** + * Apply the stencil operator (add/sub/keep/etc) to the given vector + * of stencil values. + * \return new stencil values vector + */ +static LLVMValueRef +lp_build_stencil_op_single(struct lp_build_context *bld, + const struct pipe_stencil_state *stencil, + enum stencil_op op, + LLVMValueRef stencilRef, + LLVMValueRef stencilVals, + LLVMValueRef mask) + +{ + const unsigned stencilMax = 255; /* XXX fix */ + struct lp_type type = bld->type; + LLVMValueRef res; + LLVMValueRef max = lp_build_const_int_vec(type, stencilMax); + unsigned stencil_op; + + assert(type.sign); + + switch (op) { + case S_FAIL_OP: + stencil_op = stencil->fail_op; + break; + case Z_FAIL_OP: + stencil_op = stencil->zfail_op; + break; + case Z_PASS_OP: + stencil_op = stencil->zpass_op; + break; + default: + assert(0 && "Invalid stencil_op mode"); + stencil_op = PIPE_STENCIL_OP_KEEP; + } + + switch (stencil_op) { + case PIPE_STENCIL_OP_KEEP: + res = stencilVals; + /* we can return early for this case */ + return res; + case PIPE_STENCIL_OP_ZERO: + res = bld->zero; + break; + case PIPE_STENCIL_OP_REPLACE: + res = stencilRef; + break; + case PIPE_STENCIL_OP_INCR: + res = lp_build_add(bld, stencilVals, bld->one); + res = lp_build_min(bld, res, max); + break; + case PIPE_STENCIL_OP_DECR: + res = lp_build_sub(bld, stencilVals, bld->one); + res = lp_build_max(bld, res, bld->zero); + break; + case PIPE_STENCIL_OP_INCR_WRAP: + res = lp_build_add(bld, stencilVals, bld->one); + res = LLVMBuildAnd(bld->builder, res, max, ""); + break; + case PIPE_STENCIL_OP_DECR_WRAP: + res = lp_build_sub(bld, stencilVals, bld->one); + res = LLVMBuildAnd(bld->builder, res, max, ""); + break; + case PIPE_STENCIL_OP_INVERT: + res = LLVMBuildNot(bld->builder, stencilVals, ""); + res = LLVMBuildAnd(bld->builder, res, max, ""); + break; + default: + assert(0 && "bad stencil op mode"); + res = NULL; + } + + if (stencil->writemask != stencilMax) { + /* compute res = (res & mask) | (stencilVals & ~mask) */ + LLVMValueRef mask = lp_build_const_int_vec(type, stencil->writemask); + LLVMValueRef cmask = LLVMBuildNot(bld->builder, mask, "notWritemask"); + LLVMValueRef t1 = LLVMBuildAnd(bld->builder, res, mask, "t1"); + LLVMValueRef t2 = LLVMBuildAnd(bld->builder, stencilVals, cmask, "t2"); + res = LLVMBuildOr(bld->builder, t1, t2, "t1_or_t2"); + } + + /* only the update the vector elements enabled by 'mask' */ + res = lp_build_select(bld, mask, res, stencilVals); + + return res; +} + + +/** + * Do the one or two-sided stencil test op/update. + */ +static LLVMValueRef +lp_build_stencil_op(struct lp_build_context *bld, + const struct pipe_stencil_state stencil[2], + enum stencil_op op, + LLVMValueRef stencilRefs[2], + LLVMValueRef stencilVals, + LLVMValueRef mask, + LLVMValueRef face) + +{ + assert(stencil[0].enabled); + + if (stencil[1].enabled && face) { + /* do two-sided op */ + struct lp_build_flow_context *flow_ctx; + struct lp_build_if_state if_ctx; + LLVMValueRef front_facing; + LLVMValueRef zero = LLVMConstReal(LLVMFloatType(), 0.0); + LLVMValueRef result = bld->undef; + + flow_ctx = lp_build_flow_create(bld->builder); + lp_build_flow_scope_begin(flow_ctx); + + lp_build_flow_scope_declare(flow_ctx, &result); + + /* front_facing = face > 0.0 */ + front_facing = LLVMBuildFCmp(bld->builder, LLVMRealUGT, face, zero, ""); + + lp_build_if(&if_ctx, flow_ctx, bld->builder, front_facing); + { + result = lp_build_stencil_op_single(bld, &stencil[0], op, + stencilRefs[0], stencilVals, mask); + } + lp_build_else(&if_ctx); + { + result = lp_build_stencil_op_single(bld, &stencil[1], op, + stencilRefs[1], stencilVals, mask); + } + lp_build_endif(&if_ctx); + + lp_build_flow_scope_end(flow_ctx); + lp_build_flow_destroy(flow_ctx); + + return result; + } + else { + /* do single-sided op */ + return lp_build_stencil_op_single(bld, &stencil[0], op, + stencilRefs[0], stencilVals, mask); + } +} + + + +/** + * Return a type appropriate for depth/stencil testing. + */ +struct lp_type +lp_depth_type(const struct util_format_description *format_desc, + unsigned length) +{ + struct lp_type type; + unsigned swizzle; + + assert(format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS); + assert(format_desc->block.width == 1); + assert(format_desc->block.height == 1); + + swizzle = format_desc->swizzle[0]; + assert(swizzle < 4); + + memset(&type, 0, sizeof type); + type.width = format_desc->block.bits; + + if(format_desc->channel[swizzle].type == UTIL_FORMAT_TYPE_FLOAT) { + type.floating = TRUE; + assert(swizzle == 0); + assert(format_desc->channel[swizzle].size == format_desc->block.bits); + } + else if(format_desc->channel[swizzle].type == UTIL_FORMAT_TYPE_UNSIGNED) { + assert(format_desc->block.bits <= 32); + if(format_desc->channel[swizzle].normalized) + type.norm = TRUE; + } + else + assert(0); + + assert(type.width <= length); + type.length = length / type.width; + + return type; +} + + +/** + * Compute bitmask and bit shift to apply to the incoming fragment Z values + * and the Z buffer values needed before doing the Z comparison. + * + * Note that we leave the Z bits in the position that we find them + * in the Z buffer (typically 0xffffff00 or 0x00ffffff). That lets us + * get by with fewer bit twiddling steps. + */ +static boolean +get_z_shift_and_mask(const struct util_format_description *format_desc, + unsigned *shift, unsigned *mask) +{ + const unsigned total_bits = format_desc->block.bits; + unsigned z_swizzle; + unsigned chan; + unsigned padding_left, padding_right; + + assert(format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS); + assert(format_desc->block.width == 1); + assert(format_desc->block.height == 1); + + z_swizzle = format_desc->swizzle[0]; + + if (z_swizzle == UTIL_FORMAT_SWIZZLE_NONE) + return FALSE; + + padding_right = 0; + for (chan = 0; chan < z_swizzle; ++chan) + padding_right += format_desc->channel[chan].size; + + padding_left = + total_bits - (padding_right + format_desc->channel[z_swizzle].size); + + if (padding_left || padding_right) { + unsigned long long mask_left = (1ULL << (total_bits - padding_left)) - 1; + unsigned long long mask_right = (1ULL << (padding_right)) - 1; + *mask = mask_left ^ mask_right; + } + else { + *mask = 0xffffffff; + } + + *shift = padding_left; + + return TRUE; +} + + +/** + * Compute bitmask and bit shift to apply to the framebuffer pixel values + * to put the stencil bits in the least significant position. + * (i.e. 0x000000ff) + */ +static boolean +get_s_shift_and_mask(const struct util_format_description *format_desc, + unsigned *shift, unsigned *mask) +{ + unsigned s_swizzle; + unsigned chan, sz; + + s_swizzle = format_desc->swizzle[1]; + + if (s_swizzle == UTIL_FORMAT_SWIZZLE_NONE) + return FALSE; + + *shift = 0; + for (chan = 0; chan < s_swizzle; chan++) + *shift += format_desc->channel[chan].size; + + sz = format_desc->channel[s_swizzle].size; + *mask = (1U << sz) - 1U; + + return TRUE; +} + + + +/** + * Generate code for performing depth and/or stencil tests. + * We operate on a vector of values (typically a 2x2 quad). + * + * \param depth the depth test state + * \param stencil the front/back stencil state + * \param type the data type of the fragment depth/stencil values + * \param format_desc description of the depth/stencil surface + * \param mask the alive/dead pixel mask for the quad (vector) + * \param stencil_refs the front/back stencil ref values (scalar) + * \param z_src the incoming depth/stencil values (a 2x2 quad) + * \param zs_dst_ptr pointer to depth/stencil values in framebuffer + * \param facing contains float value indicating front/back facing polygon + */ +void +lp_build_depth_stencil_test(LLVMBuilderRef builder, + const struct pipe_depth_state *depth, + const struct pipe_stencil_state stencil[2], + struct lp_type type, + const struct util_format_description *format_desc, + struct lp_build_mask_context *mask, + LLVMValueRef stencil_refs[2], + LLVMValueRef z_src, + LLVMValueRef zs_dst_ptr, + LLVMValueRef face) +{ + struct lp_build_context bld; + struct lp_build_context sbld; + struct lp_type s_type; + LLVMValueRef zs_dst, z_dst = NULL; + LLVMValueRef stencil_vals = NULL; + LLVMValueRef z_bitmask = NULL, stencil_shift = NULL; + LLVMValueRef z_pass = NULL, s_pass_mask = NULL; + LLVMValueRef orig_mask = mask->value; + + /* Sanity checking */ + { + const unsigned z_swizzle = format_desc->swizzle[0]; + const unsigned s_swizzle = format_desc->swizzle[1]; + + assert(z_swizzle != UTIL_FORMAT_SWIZZLE_NONE || + s_swizzle != UTIL_FORMAT_SWIZZLE_NONE); + + assert(depth->enabled || stencil[0].enabled); + + assert(format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS); + assert(format_desc->block.width == 1); + assert(format_desc->block.height == 1); + + if (stencil[0].enabled) { + assert(format_desc->format == PIPE_FORMAT_Z24_UNORM_S8_USCALED || + format_desc->format == PIPE_FORMAT_S8_USCALED_Z24_UNORM); + } + + assert(z_swizzle < 4); + assert(format_desc->block.bits == type.width); + if (type.floating) { + assert(z_swizzle == 0); + assert(format_desc->channel[z_swizzle].type == + UTIL_FORMAT_TYPE_FLOAT); + assert(format_desc->channel[z_swizzle].size == + format_desc->block.bits); + } + else { + assert(format_desc->channel[z_swizzle].type == + UTIL_FORMAT_TYPE_UNSIGNED); + assert(format_desc->channel[z_swizzle].normalized); + assert(!type.fixed); + assert(!type.sign); + assert(type.norm); + } + } + + + /* Setup build context for Z vals */ + lp_build_context_init(&bld, builder, type); + + /* Setup build context for stencil vals */ + s_type = lp_type_int_vec(type.width); + lp_build_context_init(&sbld, builder, s_type); + + /* Load current z/stencil value from z/stencil buffer */ + zs_dst = LLVMBuildLoad(builder, zs_dst_ptr, ""); + + lp_build_name(zs_dst, "zsbufval"); + + + /* Compute and apply the Z/stencil bitmasks and shifts. + */ + { + unsigned z_shift, z_mask; + unsigned s_shift, s_mask; + + if (get_z_shift_and_mask(format_desc, &z_shift, &z_mask)) { + if (z_shift) { + LLVMValueRef shift = lp_build_const_int_vec(type, z_shift); + z_src = LLVMBuildLShr(builder, z_src, shift, ""); + } + + if (z_mask != 0xffffffff) { + LLVMValueRef mask = lp_build_const_int_vec(type, z_mask); + z_src = LLVMBuildAnd(builder, z_src, mask, ""); + z_dst = LLVMBuildAnd(builder, zs_dst, mask, ""); + z_bitmask = mask; /* used below */ + } + else { + z_dst = zs_dst; + } + + lp_build_name(z_dst, "zsbuf.z"); + } + + if (get_s_shift_and_mask(format_desc, &s_shift, &s_mask)) { + if (s_shift) { + LLVMValueRef shift = lp_build_const_int_vec(type, s_shift); + stencil_vals = LLVMBuildLShr(builder, zs_dst, shift, ""); + stencil_shift = shift; /* used below */ + } + else { + stencil_vals = zs_dst; + } + + if (s_mask != 0xffffffff) { + LLVMValueRef mask = lp_build_const_int_vec(type, s_mask); + stencil_vals = LLVMBuildAnd(builder, stencil_vals, mask, ""); + } + + lp_build_name(stencil_vals, "stencil"); + } + } + + + if (stencil[0].enabled) { + /* convert scalar stencil refs into vectors */ + stencil_refs[0] = lp_build_broadcast_scalar(&bld, stencil_refs[0]); + stencil_refs[1] = lp_build_broadcast_scalar(&bld, stencil_refs[1]); + + s_pass_mask = lp_build_stencil_test(&sbld, stencil, + stencil_refs, stencil_vals, face); + + /* apply stencil-fail operator */ + { + LLVMValueRef s_fail_mask = lp_build_andc(&bld, orig_mask, s_pass_mask); + stencil_vals = lp_build_stencil_op(&sbld, stencil, S_FAIL_OP, + stencil_refs, stencil_vals, + s_fail_mask, face); + } + } + + if (depth->enabled) { + /* compare src Z to dst Z, returning 'pass' mask */ + z_pass = lp_build_cmp(&bld, depth->func, z_src, z_dst); + + if (!stencil[0].enabled) { + /* We can potentially skip all remaining operations here, but only + * if stencil is disabled because we still need to update the stencil + * buffer values. Don't need to update Z buffer values. + */ + lp_build_mask_update(mask, z_pass); + } + + if (depth->writemask) { + LLVMValueRef zselectmask = mask->value; + + /* mask off bits that failed Z test */ + zselectmask = LLVMBuildAnd(builder, zselectmask, z_pass, ""); + + /* mask off bits that failed stencil test */ + if (s_pass_mask) { + zselectmask = LLVMBuildAnd(builder, zselectmask, s_pass_mask, ""); + } + + /* if combined Z/stencil format, mask off the stencil bits */ + if (z_bitmask) { + zselectmask = LLVMBuildAnd(builder, zselectmask, z_bitmask, ""); + } + + /* Mix the old and new Z buffer values. + * z_dst[i] = zselectmask[i] ? z_src[i] : z_dst[i] + */ + z_dst = lp_build_select(&bld, zselectmask, z_src, z_dst); + } + + if (stencil[0].enabled) { + /* update stencil buffer values according to z pass/fail result */ + LLVMValueRef z_fail_mask, z_pass_mask; + + /* apply Z-fail operator */ + z_fail_mask = lp_build_andc(&bld, orig_mask, z_pass); + stencil_vals = lp_build_stencil_op(&sbld, stencil, Z_FAIL_OP, + stencil_refs, stencil_vals, + z_fail_mask, face); + + /* apply Z-pass operator */ + z_pass_mask = LLVMBuildAnd(bld.builder, orig_mask, z_pass, ""); + stencil_vals = lp_build_stencil_op(&sbld, stencil, Z_PASS_OP, + stencil_refs, stencil_vals, + z_pass_mask, face); + } + } + else { + /* No depth test: apply Z-pass operator to stencil buffer values which + * passed the stencil test. + */ + s_pass_mask = LLVMBuildAnd(bld.builder, orig_mask, s_pass_mask, ""); + stencil_vals = lp_build_stencil_op(&sbld, stencil, Z_PASS_OP, + stencil_refs, stencil_vals, + s_pass_mask, face); + } + + /* The Z bits are already in the right place but we may need to shift the + * stencil bits before ORing Z with Stencil to make the final pixel value. + */ + if (stencil_vals && stencil_shift) + stencil_vals = LLVMBuildShl(bld.builder, stencil_vals, + stencil_shift, ""); + + /* Finally, merge/store the z/stencil values */ + if ((depth->enabled && depth->writemask) || + (stencil[0].enabled && stencil[0].writemask)) { + + if (z_dst && stencil_vals) + zs_dst = LLVMBuildOr(bld.builder, z_dst, stencil_vals, ""); + else if (z_dst) + zs_dst = z_dst; + else + zs_dst = stencil_vals; + + LLVMBuildStore(builder, zs_dst, zs_dst_ptr); + } + + if (s_pass_mask) + lp_build_mask_update(mask, s_pass_mask); + + if (depth->enabled && stencil[0].enabled) + lp_build_mask_update(mask, z_pass); +} diff --git a/src/gallium/drivers/trace/tr_buffer.c b/src/gallium/drivers/llvmpipe/lp_bld_depth.h index fa2ac068ebc..27dd46b625d 100644 --- a/src/gallium/drivers/trace/tr_buffer.c +++ b/src/gallium/drivers/llvmpipe/lp_bld_depth.h @@ -18,7 +18,7 @@ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. @@ -26,51 +26,41 @@ **************************************************************************/ -#include "util/u_inlines.h" -#include "util/u_memory.h" -#include "util/u_simple_list.h" - -#include "tr_buffer.h" - -struct pipe_buffer * -trace_buffer_create(struct trace_screen *tr_scr, - struct pipe_buffer *buffer) -{ - struct trace_buffer *tr_buf; - - if(!buffer) - goto error; - - assert(buffer->screen == tr_scr->screen); +/** + * Depth/stencil testing to LLVM IR translation. + * + * @author Jose Fonseca <[email protected]> + */ - tr_buf = CALLOC_STRUCT(trace_buffer); - if(!tr_buf) - goto error; +#ifndef LP_BLD_DEPTH_H +#define LP_BLD_DEPTH_H - memcpy(&tr_buf->base, buffer, sizeof(struct pipe_buffer)); - pipe_reference_init(&tr_buf->base.reference, 1); - tr_buf->base.screen = &tr_scr->base; - tr_buf->buffer = buffer; +#include "gallivm/lp_bld.h" - trace_screen_add_to_list(tr_scr, buffers, tr_buf); + +struct pipe_depth_state; +struct util_format_description; +struct lp_type; +struct lp_build_mask_context; - return &tr_buf->base; -error: - pipe_buffer_reference(&buffer, NULL); - return NULL; -} +struct lp_type +lp_depth_type(const struct util_format_description *format_desc, + unsigned length); void -trace_buffer_destroy(struct trace_screen *tr_scr, - struct pipe_buffer *buffer) -{ - struct trace_buffer *tr_buf = trace_buffer(buffer); - - trace_screen_remove_from_list(tr_scr, buffers, tr_buf); - - pipe_buffer_reference(&tr_buf->buffer, NULL); - FREE(tr_buf); -} +lp_build_depth_stencil_test(LLVMBuilderRef builder, + const struct pipe_depth_state *depth, + const struct pipe_stencil_state stencil[2], + struct lp_type type, + const struct util_format_description *format_desc, + struct lp_build_mask_context *mask, + LLVMValueRef stencil_refs[2], + LLVMValueRef zs_src, + LLVMValueRef zs_dst_ptr, + LLVMValueRef facing); + + +#endif /* !LP_BLD_DEPTH_H */ diff --git a/src/gallium/drivers/llvmpipe/lp_bld_interp.c b/src/gallium/drivers/llvmpipe/lp_bld_interp.c new file mode 100644 index 00000000000..838691e14b0 --- /dev/null +++ b/src/gallium/drivers/llvmpipe/lp_bld_interp.c @@ -0,0 +1,408 @@ +/************************************************************************** + * + * Copyright 2009 VMware, Inc. + * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +/** + * @file + * Position and shader input interpolation. + * + * @author Jose Fonseca <[email protected]> + */ + +#include "pipe/p_shader_tokens.h" +#include "util/u_debug.h" +#include "util/u_memory.h" +#include "util/u_math.h" +#include "tgsi/tgsi_parse.h" +#include "gallivm/lp_bld_debug.h" +#include "gallivm/lp_bld_const.h" +#include "gallivm/lp_bld_arit.h" +#include "gallivm/lp_bld_swizzle.h" +#include "lp_bld_interp.h" + + +/* + * The shader JIT function operates on blocks of quads. + * Each block has 2x2 quads and each quad has 2x2 pixels. + * + * We iterate over the quads in order 0, 1, 2, 3: + * + * ################# + * # | # | # + * #---0---#---1---# + * # | # | # + * ################# + * # | # | # + * #---2---#---3---# + * # | # | # + * ################# + * + * Within each quad, we have four pixels which are represented in SOA + * order: + * + * ######### + * # 0 | 1 # + * #---+---# + * # 2 | 3 # + * ######### + * + * So the green channel (for example) of the four pixels is stored in + * a single vector register: {g0, g1, g2, g3}. + */ + + +static void +attrib_name(LLVMValueRef val, unsigned attrib, unsigned chan, const char *suffix) +{ + if(attrib == 0) + lp_build_name(val, "pos.%c%s", "xyzw"[chan], suffix); + else + lp_build_name(val, "input%u.%c%s", attrib - 1, "xyzw"[chan], suffix); +} + + +/** + * Initialize the bld->a0, dadx, dady fields. This involves fetching + * those values from the arrays which are passed into the JIT function. + */ +static void +coeffs_init(struct lp_build_interp_soa_context *bld, + LLVMValueRef a0_ptr, + LLVMValueRef dadx_ptr, + LLVMValueRef dady_ptr) +{ + LLVMBuilderRef builder = bld->base.builder; + unsigned attrib; + unsigned chan; + + for(attrib = 0; attrib < bld->num_attribs; ++attrib) { + const unsigned mask = bld->mask[attrib]; + const unsigned interp = bld->interp[attrib]; + for(chan = 0; chan < NUM_CHANNELS; ++chan) { + if(mask & (1 << chan)) { + LLVMValueRef index = LLVMConstInt(LLVMInt32Type(), attrib*NUM_CHANNELS + chan, 0); + LLVMValueRef a0 = NULL; + LLVMValueRef dadx = NULL; + LLVMValueRef dady = NULL; + + switch( interp ) { + case TGSI_INTERPOLATE_PERSPECTIVE: + /* fall-through */ + + case TGSI_INTERPOLATE_LINEAR: + dadx = LLVMBuildLoad(builder, LLVMBuildGEP(builder, dadx_ptr, &index, 1, ""), ""); + dady = LLVMBuildLoad(builder, LLVMBuildGEP(builder, dady_ptr, &index, 1, ""), ""); + dadx = lp_build_broadcast_scalar(&bld->base, dadx); + dady = lp_build_broadcast_scalar(&bld->base, dady); + attrib_name(dadx, attrib, chan, ".dadx"); + attrib_name(dady, attrib, chan, ".dady"); + /* fall-through */ + + case TGSI_INTERPOLATE_CONSTANT: + a0 = LLVMBuildLoad(builder, LLVMBuildGEP(builder, a0_ptr, &index, 1, ""), ""); + a0 = lp_build_broadcast_scalar(&bld->base, a0); + attrib_name(a0, attrib, chan, ".a0"); + break; + + default: + assert(0); + break; + } + + bld->a0 [attrib][chan] = a0; + bld->dadx[attrib][chan] = dadx; + bld->dady[attrib][chan] = dady; + } + } + } +} + + +/** + * Emit LLVM code to compute the fragment shader input attribute values. + * For example, for a color input, we'll compute red, green, blue and alpha + * values for the four pixels in a quad. + * Recall that we're operating on 4-element vectors so each arithmetic + * operation is operating on the four pixels in a quad. + */ +static void +attribs_init(struct lp_build_interp_soa_context *bld) +{ + LLVMValueRef x = bld->pos[0]; + LLVMValueRef y = bld->pos[1]; + LLVMValueRef oow = NULL; + unsigned attrib; + unsigned chan; + + for(attrib = 0; attrib < bld->num_attribs; ++attrib) { + const unsigned mask = bld->mask[attrib]; + const unsigned interp = bld->interp[attrib]; + for(chan = 0; chan < NUM_CHANNELS; ++chan) { + if(mask & (1 << chan)) { + LLVMValueRef a0 = bld->a0 [attrib][chan]; + LLVMValueRef dadx = bld->dadx[attrib][chan]; + LLVMValueRef dady = bld->dady[attrib][chan]; + LLVMValueRef res; + + res = a0; + + if (interp != TGSI_INTERPOLATE_CONSTANT) { + /* res = res + x * dadx */ + res = lp_build_add(&bld->base, res, lp_build_mul(&bld->base, x, dadx)); + /* res = res + y * dady */ + res = lp_build_add(&bld->base, res, lp_build_mul(&bld->base, y, dady)); + } + + /* Keep the value of the attribute before perspective divide + * for faster updates. + */ + bld->attribs_pre[attrib][chan] = res; + + if (interp == TGSI_INTERPOLATE_PERSPECTIVE) { + LLVMValueRef w = bld->pos[3]; + assert(attrib != 0); + if(!oow) + oow = lp_build_rcp(&bld->base, w); + res = lp_build_mul(&bld->base, res, oow); + } + + attrib_name(res, attrib, chan, ""); + + bld->attribs[attrib][chan] = res; + } + } + } +} + + +/** + * Increment the shader input attribute values. + * This is called when we move from one quad to the next. + */ +static void +attribs_update(struct lp_build_interp_soa_context *bld, int quad_index) +{ + LLVMValueRef oow = NULL; + unsigned attrib; + unsigned chan; + + assert(quad_index < 4); + + for(attrib = 0; attrib < bld->num_attribs; ++attrib) { + const unsigned mask = bld->mask[attrib]; + const unsigned interp = bld->interp[attrib]; + + if (interp != TGSI_INTERPOLATE_CONSTANT) { + for(chan = 0; chan < NUM_CHANNELS; ++chan) { + if(mask & (1 << chan)) { + LLVMValueRef dadx = bld->dadx[attrib][chan]; + LLVMValueRef dady = bld->dady[attrib][chan]; + LLVMValueRef res; + + res = bld->attribs_pre[attrib][chan]; + + if (quad_index == 1 || quad_index == 3) { + /* top-right or bottom-right quad */ + /* build res = res + dadx + dadx */ + res = lp_build_add(&bld->base, res, dadx); + res = lp_build_add(&bld->base, res, dadx); + } + + if (quad_index == 2 || quad_index == 3) { + /* bottom-left or bottom-right quad */ + /* build res = res + dady + dady */ + res = lp_build_add(&bld->base, res, dady); + res = lp_build_add(&bld->base, res, dady); + } + + if (interp == TGSI_INTERPOLATE_PERSPECTIVE) { + LLVMValueRef w = bld->pos[3]; + assert(attrib != 0); + if(!oow) + oow = lp_build_rcp(&bld->base, w); + res = lp_build_mul(&bld->base, res, oow); + } + + attrib_name(res, attrib, chan, ""); + + bld->attribs[attrib][chan] = res; + } + } + } + } +} + + +/** + * Generate the position vectors. + * + * Parameter x0, y0 are the integer values with the quad upper left coordinates. + */ +static void +pos_init(struct lp_build_interp_soa_context *bld, + LLVMValueRef x0, + LLVMValueRef y0) +{ + lp_build_name(x0, "pos.x"); + lp_build_name(y0, "pos.y"); + + bld->attribs[0][0] = x0; + bld->attribs[0][1] = y0; +} + + +/** + * Update quad position values when moving to the next quad. + */ +static void +pos_update(struct lp_build_interp_soa_context *bld, int quad_index) +{ + LLVMValueRef x = bld->attribs[0][0]; + LLVMValueRef y = bld->attribs[0][1]; + const int xstep = 2, ystep = 2; + + if (quad_index == 1 || quad_index == 3) { + /* top-right or bottom-right quad in block */ + /* build x += xstep */ + x = lp_build_add(&bld->base, x, + lp_build_const_vec(bld->base.type, xstep)); + } + + if (quad_index == 2) { + /* bottom-left quad in block */ + /* build y += ystep */ + y = lp_build_add(&bld->base, y, + lp_build_const_vec(bld->base.type, ystep)); + /* build x -= xstep */ + x = lp_build_sub(&bld->base, x, + lp_build_const_vec(bld->base.type, xstep)); + } + + lp_build_name(x, "pos.x"); + lp_build_name(y, "pos.y"); + + bld->attribs[0][0] = x; + bld->attribs[0][1] = y; +} + + +/** + * Initialize fragment shader input attribute info. + */ +void +lp_build_interp_soa_init(struct lp_build_interp_soa_context *bld, + const struct tgsi_token *tokens, + boolean flatshade, + LLVMBuilderRef builder, + struct lp_type type, + LLVMValueRef a0_ptr, + LLVMValueRef dadx_ptr, + LLVMValueRef dady_ptr, + LLVMValueRef x0, + LLVMValueRef y0) +{ + struct tgsi_parse_context parse; + struct tgsi_full_declaration *decl; + + memset(bld, 0, sizeof *bld); + + lp_build_context_init(&bld->base, builder, type); + + /* For convenience */ + bld->pos = bld->attribs[0]; + bld->inputs = (const LLVMValueRef (*)[NUM_CHANNELS]) bld->attribs[1]; + + /* Position */ + bld->num_attribs = 1; + bld->mask[0] = TGSI_WRITEMASK_ZW; + bld->interp[0] = TGSI_INTERPOLATE_LINEAR; + + /* Inputs */ + tgsi_parse_init( &parse, tokens ); + while( !tgsi_parse_end_of_tokens( &parse ) ) { + tgsi_parse_token( &parse ); + + switch( parse.FullToken.Token.Type ) { + case TGSI_TOKEN_TYPE_DECLARATION: + decl = &parse.FullToken.FullDeclaration; + if( decl->Declaration.File == TGSI_FILE_INPUT ) { + unsigned first, last, mask; + unsigned attrib; + + first = decl->Range.First; + last = decl->Range.Last; + mask = decl->Declaration.UsageMask; + + for( attrib = first; attrib <= last; ++attrib ) { + bld->mask[1 + attrib] = mask; + + /* XXX: have mesa set INTERP_CONSTANT in the fragment + * shader. + */ + if (decl->Semantic.Name == TGSI_SEMANTIC_COLOR && + flatshade) + bld->interp[1 + attrib] = TGSI_INTERPOLATE_CONSTANT; + else + bld->interp[1 + attrib] = decl->Declaration.Interpolate; + } + + bld->num_attribs = MAX2(bld->num_attribs, 1 + last + 1); + } + break; + + case TGSI_TOKEN_TYPE_INSTRUCTION: + case TGSI_TOKEN_TYPE_IMMEDIATE: + case TGSI_TOKEN_TYPE_PROPERTY: + break; + + default: + assert( 0 ); + } + } + tgsi_parse_free( &parse ); + + coeffs_init(bld, a0_ptr, dadx_ptr, dady_ptr); + + pos_init(bld, x0, y0); + + attribs_init(bld); +} + + +/** + * Advance the position and inputs to the given quad within the block. + */ +void +lp_build_interp_soa_update(struct lp_build_interp_soa_context *bld, + int quad_index) +{ + assert(quad_index < 4); + + pos_update(bld, quad_index); + + attribs_update(bld, quad_index); +} diff --git a/src/gallium/drivers/llvmpipe/lp_bld_interp.h b/src/gallium/drivers/llvmpipe/lp_bld_interp.h new file mode 100644 index 00000000000..99a432957ce --- /dev/null +++ b/src/gallium/drivers/llvmpipe/lp_bld_interp.h @@ -0,0 +1,96 @@ +/************************************************************************** + * + * Copyright 2009 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + +/** + * @file + * Position and shader input interpolation. + * + * Special attention is given to the interpolation of side by side quads. + * Multiplications are made only for the first quad. Interpolation of + * inputs for posterior quads are done exclusively with additions, and + * perspective divide if necessary. + * + * @author Jose Fonseca <[email protected]> + */ + +#ifndef LP_BLD_INTERP_H +#define LP_BLD_INTERP_H + + +#include "gallivm/lp_bld.h" +#include "gallivm/lp_bld_type.h" + +#include "tgsi/tgsi_exec.h" + + + +struct tgsi_token; + + +struct lp_build_interp_soa_context +{ + struct lp_build_context base; + + unsigned num_attribs; + unsigned mask[1 + PIPE_MAX_SHADER_INPUTS]; /**< TGSI_WRITE_MASK_x */ + unsigned interp[1 + PIPE_MAX_SHADER_INPUTS]; /**< TGSI_INTERPOLATE_x */ + + LLVMValueRef a0 [1 + PIPE_MAX_SHADER_INPUTS][NUM_CHANNELS]; + LLVMValueRef dadx[1 + PIPE_MAX_SHADER_INPUTS][NUM_CHANNELS]; + LLVMValueRef dady[1 + PIPE_MAX_SHADER_INPUTS][NUM_CHANNELS]; + + /* Attribute values before perspective divide */ + LLVMValueRef attribs_pre[1 + PIPE_MAX_SHADER_INPUTS][NUM_CHANNELS]; + + LLVMValueRef attribs[1 + PIPE_MAX_SHADER_INPUTS][NUM_CHANNELS]; + + /* + * Convenience pointers. Callers may access this one. + */ + const LLVMValueRef *pos; + const LLVMValueRef (*inputs)[NUM_CHANNELS]; +}; + + +void +lp_build_interp_soa_init(struct lp_build_interp_soa_context *bld, + const struct tgsi_token *tokens, + boolean flatshade, + LLVMBuilderRef builder, + struct lp_type type, + LLVMValueRef a0_ptr, + LLVMValueRef dadx_ptr, + LLVMValueRef dady_ptr, + LLVMValueRef x0, + LLVMValueRef y0); + +void +lp_build_interp_soa_update(struct lp_build_interp_soa_context *bld, + int quad_index); + + +#endif /* LP_BLD_INTERP_H */ diff --git a/src/gallium/drivers/llvmpipe/lp_buffer.c b/src/gallium/drivers/llvmpipe/lp_buffer.c deleted file mode 100644 index 9eda9720818..00000000000 --- a/src/gallium/drivers/llvmpipe/lp_buffer.c +++ /dev/null @@ -1,119 +0,0 @@ -/************************************************************************** - * - * Copyright 2009 VMware, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - - -#include "util/u_inlines.h" -#include "util/u_memory.h" -#include "util/u_math.h" - -#include "lp_winsys.h" -#include "lp_screen.h" -#include "lp_buffer.h" - - -static void * -llvmpipe_buffer_map(struct pipe_screen *screen, - struct pipe_buffer *buf, - unsigned flags) -{ - struct llvmpipe_buffer *llvmpipe_buf = llvmpipe_buffer(buf); - return llvmpipe_buf->data; -} - - -static void -llvmpipe_buffer_unmap(struct pipe_screen *screen, - struct pipe_buffer *buf) -{ -} - - -static void -llvmpipe_buffer_destroy(struct pipe_buffer *buf) -{ - struct llvmpipe_buffer *sbuf = llvmpipe_buffer(buf); - - if (!sbuf->userBuffer) - align_free(sbuf->data); - - FREE(sbuf); -} - - -static struct pipe_buffer * -llvmpipe_buffer_create(struct pipe_screen *screen, - unsigned alignment, - unsigned usage, - unsigned size) -{ - struct llvmpipe_buffer *buffer = CALLOC_STRUCT(llvmpipe_buffer); - - pipe_reference_init(&buffer->base.reference, 1); - buffer->base.screen = screen; - buffer->base.alignment = MAX2(alignment, 16); - buffer->base.usage = usage; - buffer->base.size = size; - - buffer->data = align_malloc(size, alignment); - - return &buffer->base; -} - - -/** - * Create buffer which wraps user-space data. - */ -static struct pipe_buffer * -llvmpipe_user_buffer_create(struct pipe_screen *screen, - void *ptr, - unsigned bytes) -{ - struct llvmpipe_buffer *buffer; - - buffer = CALLOC_STRUCT(llvmpipe_buffer); - if(!buffer) - return NULL; - - pipe_reference_init(&buffer->base.reference, 1); - buffer->base.screen = screen; - buffer->base.size = bytes; - buffer->userBuffer = TRUE; - buffer->data = ptr; - - return &buffer->base; -} - - -void -llvmpipe_init_screen_buffer_funcs(struct pipe_screen *screen) -{ - screen->buffer_create = llvmpipe_buffer_create; - screen->user_buffer_create = llvmpipe_user_buffer_create; - screen->buffer_map = llvmpipe_buffer_map; - screen->buffer_unmap = llvmpipe_buffer_unmap; - screen->buffer_destroy = llvmpipe_buffer_destroy; -} diff --git a/src/gallium/drivers/llvmpipe/lp_context.c b/src/gallium/drivers/llvmpipe/lp_context.c index e31ae6a3fc1..32b80d3a9f6 100644 --- a/src/gallium/drivers/llvmpipe/lp_context.c +++ b/src/gallium/drivers/llvmpipe/lp_context.c @@ -45,10 +45,6 @@ #include "lp_query.h" #include "lp_setup.h" - - - - static void llvmpipe_destroy( struct pipe_context *pipe ) { struct llvmpipe_context *llvmpipe = llvmpipe_context( pipe ); @@ -68,38 +64,22 @@ static void llvmpipe_destroy( struct pipe_context *pipe ) pipe_surface_reference(&llvmpipe->framebuffer.zsbuf, NULL); for (i = 0; i < PIPE_MAX_SAMPLERS; i++) { - pipe_texture_reference(&llvmpipe->texture[i], NULL); + pipe_sampler_view_reference(&llvmpipe->fragment_sampler_views[i], NULL); } for (i = 0; i < PIPE_MAX_VERTEX_SAMPLERS; i++) { - pipe_texture_reference(&llvmpipe->vertex_textures[i], NULL); + pipe_sampler_view_reference(&llvmpipe->vertex_sampler_views[i], NULL); } for (i = 0; i < Elements(llvmpipe->constants); i++) { if (llvmpipe->constants[i]) { - pipe_buffer_reference(&llvmpipe->constants[i], NULL); + pipe_resource_reference(&llvmpipe->constants[i], NULL); } } align_free( llvmpipe ); } -static unsigned int -llvmpipe_is_texture_referenced( struct pipe_context *pipe, - struct pipe_texture *texture, - unsigned face, unsigned level) -{ - struct llvmpipe_context *llvmpipe = llvmpipe_context( pipe ); - - return lp_setup_is_texture_referenced(llvmpipe->setup, texture); -} - -static unsigned int -llvmpipe_is_buffer_referenced( struct pipe_context *pipe, - struct pipe_buffer *buf) -{ - return PIPE_UNREFERENCED; -} struct pipe_context * llvmpipe_create_context( struct pipe_screen *screen, void *priv ) @@ -117,65 +97,30 @@ llvmpipe_create_context( struct pipe_screen *screen, void *priv ) llvmpipe->pipe.winsys = screen->winsys; llvmpipe->pipe.screen = screen; llvmpipe->pipe.priv = priv; - llvmpipe->pipe.destroy = llvmpipe_destroy; - - /* state setters */ - llvmpipe->pipe.create_blend_state = llvmpipe_create_blend_state; - llvmpipe->pipe.bind_blend_state = llvmpipe_bind_blend_state; - llvmpipe->pipe.delete_blend_state = llvmpipe_delete_blend_state; - llvmpipe->pipe.create_sampler_state = llvmpipe_create_sampler_state; - llvmpipe->pipe.bind_fragment_sampler_states = llvmpipe_bind_sampler_states; - llvmpipe->pipe.bind_vertex_sampler_states = llvmpipe_bind_vertex_sampler_states; - llvmpipe->pipe.delete_sampler_state = llvmpipe_delete_sampler_state; - - llvmpipe->pipe.create_depth_stencil_alpha_state = llvmpipe_create_depth_stencil_state; - llvmpipe->pipe.bind_depth_stencil_alpha_state = llvmpipe_bind_depth_stencil_state; - llvmpipe->pipe.delete_depth_stencil_alpha_state = llvmpipe_delete_depth_stencil_state; - - llvmpipe->pipe.create_rasterizer_state = llvmpipe_create_rasterizer_state; - llvmpipe->pipe.bind_rasterizer_state = llvmpipe_bind_rasterizer_state; - llvmpipe->pipe.delete_rasterizer_state = llvmpipe_delete_rasterizer_state; - - llvmpipe->pipe.create_fs_state = llvmpipe_create_fs_state; - llvmpipe->pipe.bind_fs_state = llvmpipe_bind_fs_state; - llvmpipe->pipe.delete_fs_state = llvmpipe_delete_fs_state; - - llvmpipe->pipe.create_vs_state = llvmpipe_create_vs_state; - llvmpipe->pipe.bind_vs_state = llvmpipe_bind_vs_state; - llvmpipe->pipe.delete_vs_state = llvmpipe_delete_vs_state; - - llvmpipe->pipe.set_blend_color = llvmpipe_set_blend_color; - llvmpipe->pipe.set_stencil_ref = llvmpipe_set_stencil_ref; - llvmpipe->pipe.set_clip_state = llvmpipe_set_clip_state; - llvmpipe->pipe.set_constant_buffer = llvmpipe_set_constant_buffer; + /* Init the pipe context methods */ + llvmpipe->pipe.destroy = llvmpipe_destroy; llvmpipe->pipe.set_framebuffer_state = llvmpipe_set_framebuffer_state; - llvmpipe->pipe.set_polygon_stipple = llvmpipe_set_polygon_stipple; - llvmpipe->pipe.set_scissor_state = llvmpipe_set_scissor_state; - llvmpipe->pipe.set_fragment_sampler_textures = llvmpipe_set_sampler_textures; - llvmpipe->pipe.set_vertex_sampler_textures = llvmpipe_set_vertex_sampler_textures; - llvmpipe->pipe.set_viewport_state = llvmpipe_set_viewport_state; - - llvmpipe->pipe.set_vertex_buffers = llvmpipe_set_vertex_buffers; - llvmpipe->pipe.set_vertex_elements = llvmpipe_set_vertex_elements; - - llvmpipe->pipe.draw_arrays = llvmpipe_draw_arrays; - llvmpipe->pipe.draw_elements = llvmpipe_draw_elements; - llvmpipe->pipe.draw_range_elements = llvmpipe_draw_range_elements; - llvmpipe->pipe.clear = llvmpipe_clear; llvmpipe->pipe.flush = llvmpipe_flush; - llvmpipe->pipe.is_texture_referenced = llvmpipe_is_texture_referenced; - llvmpipe->pipe.is_buffer_referenced = llvmpipe_is_buffer_referenced; - + llvmpipe_init_blend_funcs(llvmpipe); + llvmpipe_init_clip_funcs(llvmpipe); + llvmpipe_init_draw_funcs(llvmpipe); + llvmpipe_init_sampler_funcs(llvmpipe); llvmpipe_init_query_funcs( llvmpipe ); + llvmpipe_init_vertex_funcs(llvmpipe); + llvmpipe_init_fs_funcs(llvmpipe); + llvmpipe_init_vs_funcs(llvmpipe); + llvmpipe_init_rasterizer_funcs(llvmpipe); + llvmpipe_init_context_resource_funcs( &llvmpipe->pipe ); + llvmpipe_init_surface_functions(llvmpipe); /* * Create drawing context and plug our rendering stage into it. */ - llvmpipe->draw = draw_create(); - if (!llvmpipe->draw) + llvmpipe->draw = draw_create(&llvmpipe->pipe); + if (!llvmpipe->draw) goto fail; /* FIXME: devise alternative to draw_texture_samplers */ @@ -191,14 +136,17 @@ llvmpipe_create_context( struct pipe_screen *screen, void *priv ) /* plug in AA line/point stages */ draw_install_aaline_stage(llvmpipe->draw, &llvmpipe->pipe); draw_install_aapoint_stage(llvmpipe->draw, &llvmpipe->pipe); + draw_install_pstipple_stage(llvmpipe->draw, &llvmpipe->pipe); + + /* convert points and lines into triangles: */ + draw_wide_point_threshold(llvmpipe->draw, 0.0); + draw_wide_line_threshold(llvmpipe->draw, 0.0); #if USE_DRAW_STAGE_PSTIPPLE /* Do polygon stipple w/ texture map + frag prog? */ draw_install_pstipple_stage(llvmpipe->draw, &llvmpipe->pipe); #endif - lp_init_surface_functions(llvmpipe); - lp_reset_counters(); return &llvmpipe->pipe; diff --git a/src/gallium/drivers/llvmpipe/lp_context.h b/src/gallium/drivers/llvmpipe/lp_context.h index 955c7eb8e0e..4e597b24796 100644 --- a/src/gallium/drivers/llvmpipe/lp_context.h +++ b/src/gallium/drivers/llvmpipe/lp_context.h @@ -45,7 +45,8 @@ struct draw_stage; struct lp_fragment_shader; struct lp_vertex_shader; struct lp_blend_state; -struct setup_context; +struct lp_setup_context; +struct lp_velems_state; struct llvmpipe_context { struct pipe_context pipe; /**< base class */ @@ -58,26 +59,25 @@ struct llvmpipe_context { const struct pipe_rasterizer_state *rasterizer; struct lp_fragment_shader *fs; const struct lp_vertex_shader *vs; + const struct lp_velems_state *velems; /** Other rendering state */ struct pipe_blend_color blend_color; struct pipe_stencil_ref stencil_ref; struct pipe_clip_state clip; - struct pipe_buffer *constants[PIPE_SHADER_TYPES]; + struct pipe_resource *constants[PIPE_SHADER_TYPES]; struct pipe_framebuffer_state framebuffer; struct pipe_poly_stipple poly_stipple; struct pipe_scissor_state scissor; - struct pipe_texture *texture[PIPE_MAX_SAMPLERS]; - struct pipe_texture *vertex_textures[PIPE_MAX_VERTEX_SAMPLERS]; + struct pipe_sampler_view *fragment_sampler_views[PIPE_MAX_SAMPLERS]; + struct pipe_sampler_view *vertex_sampler_views[PIPE_MAX_VERTEX_SAMPLERS]; struct pipe_viewport_state viewport; struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS]; - struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS]; unsigned num_samplers; - unsigned num_textures; + unsigned num_fragment_sampler_views; unsigned num_vertex_samplers; - unsigned num_vertex_textures; - unsigned num_vertex_elements; + unsigned num_vertex_sampler_views; unsigned num_vertex_buffers; unsigned dirty; /**< Mask of LP_NEW_x flags */ @@ -94,11 +94,8 @@ struct llvmpipe_context { /** Vertex format */ struct vertex_info vertex_info; - /** Which vertex shader output slot contains point size */ - int psize_slot; - /** The tiling engine */ - struct setup_context *setup; + struct lp_setup_context *setup; /** The primitive drawing context */ struct draw_context *draw; diff --git a/src/gallium/drivers/llvmpipe/lp_draw_arrays.c b/src/gallium/drivers/llvmpipe/lp_draw_arrays.c index 3dd68d5794e..98780d7631b 100644 --- a/src/gallium/drivers/llvmpipe/lp_draw_arrays.c +++ b/src/gallium/drivers/llvmpipe/lp_draw_arrays.c @@ -35,7 +35,6 @@ #include "pipe/p_context.h" #include "util/u_prim.h" -#include "lp_buffer.h" #include "lp_context.h" #include "lp_state.h" @@ -43,23 +42,16 @@ -void -llvmpipe_draw_arrays(struct pipe_context *pipe, unsigned mode, - unsigned start, unsigned count) -{ - llvmpipe_draw_elements(pipe, NULL, 0, mode, start, count); -} - - /** * Draw vertex arrays, with optional indexing. * Basically, map the vertex buffers (and drawing surfaces), then hand off * the drawing to the 'draw' module. */ -void +static void llvmpipe_draw_range_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, + struct pipe_resource *indexBuffer, unsigned indexSize, + int indexBias, unsigned min_index, unsigned max_index, unsigned mode, unsigned start, unsigned count) @@ -75,21 +67,21 @@ llvmpipe_draw_range_elements(struct pipe_context *pipe, * Map vertex buffers */ for (i = 0; i < lp->num_vertex_buffers; i++) { - void *buf = llvmpipe_buffer(lp->vertex_buffer[i].buffer)->data; + void *buf = llvmpipe_resource_data(lp->vertex_buffer[i].buffer); draw_set_mapped_vertex_buffer(draw, i, buf); } /* Map index buffer, if present */ if (indexBuffer) { - void *mapped_indexes = llvmpipe_buffer(indexBuffer)->data; - draw_set_mapped_element_buffer_range(draw, indexSize, + void *mapped_indexes = llvmpipe_resource_data(indexBuffer); + draw_set_mapped_element_buffer_range(draw, indexSize, indexBias, min_index, max_index, mapped_indexes); } else { /* no index/element buffer */ - draw_set_mapped_element_buffer_range(draw, 0, start, + draw_set_mapped_element_buffer_range(draw, 0, 0, start, start + count - 1, NULL); } @@ -103,7 +95,7 @@ llvmpipe_draw_range_elements(struct pipe_context *pipe, draw_set_mapped_vertex_buffer(draw, i, NULL); } if (indexBuffer) { - draw_set_mapped_element_buffer(draw, 0, NULL); + draw_set_mapped_element_buffer(draw, 0, 0, NULL); } /* @@ -115,15 +107,32 @@ llvmpipe_draw_range_elements(struct pipe_context *pipe, } -void +static void llvmpipe_draw_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, + struct pipe_resource *indexBuffer, unsigned indexSize, + int indexBias, unsigned mode, unsigned start, unsigned count) { llvmpipe_draw_range_elements( pipe, indexBuffer, - indexSize, + indexSize, indexBias, 0, 0xffffffff, mode, start, count ); } + +static void +llvmpipe_draw_arrays(struct pipe_context *pipe, unsigned mode, + unsigned start, unsigned count) +{ + llvmpipe_draw_elements(pipe, NULL, 0, 0, mode, start, count); +} + + +void +llvmpipe_init_draw_funcs(struct llvmpipe_context *llvmpipe) +{ + llvmpipe->pipe.draw_arrays = llvmpipe_draw_arrays; + llvmpipe->pipe.draw_elements = llvmpipe_draw_elements; + llvmpipe->pipe.draw_range_elements = llvmpipe_draw_range_elements; +} diff --git a/src/gallium/drivers/llvmpipe/lp_fence.c b/src/gallium/drivers/llvmpipe/lp_fence.c index 525c117f316..75d8d2b8251 100644 --- a/src/gallium/drivers/llvmpipe/lp_fence.c +++ b/src/gallium/drivers/llvmpipe/lp_fence.c @@ -29,9 +29,19 @@ #include "pipe/p_screen.h" #include "util/u_memory.h" #include "util/u_inlines.h" +#include "lp_debug.h" #include "lp_fence.h" +/** + * Create a new fence object. + * + * The rank will be the number of bins in the scene. Whenever a rendering + * thread hits a fence command, it'll increment the fence counter. When + * the counter == the rank, the fence is finished. + * + * \param rank the expected finished value of the fence counter. + */ struct lp_fence * lp_fence_create(unsigned rank) { @@ -48,6 +58,7 @@ lp_fence_create(unsigned rank) } +/** Destroy a fence. Called when refcount hits zero. */ static void lp_fence_destroy(struct lp_fence *fence) { @@ -57,6 +68,10 @@ lp_fence_destroy(struct lp_fence *fence) } +/** + * For reference counting. + * This is a Gallium API function. + */ static void llvmpipe_fence_reference(struct pipe_screen *screen, struct pipe_fence_handle **ptr, @@ -71,6 +86,10 @@ llvmpipe_fence_reference(struct pipe_screen *screen, } +/** + * Has the fence been executed/finished? + * This is a Gallium API function. + */ static int llvmpipe_fence_signalled(struct pipe_screen *screen, struct pipe_fence_handle *fence, @@ -82,6 +101,10 @@ llvmpipe_fence_signalled(struct pipe_screen *screen, } +/** + * Wait for the fence to finish. + * This is a Gallium API function. + */ static int llvmpipe_fence_finish(struct pipe_screen *screen, struct pipe_fence_handle *fence_handle, @@ -99,6 +122,25 @@ llvmpipe_fence_finish(struct pipe_screen *screen, } +/** + * Called by the rendering threads to increment the fence counter. + * When the counter == the rank, the fence is finished. + */ +void +lp_fence_signal(struct lp_fence *fence) +{ + pipe_mutex_lock(fence->mutex); + + fence->count++; + assert(fence->count <= fence->rank); + + LP_DBG(DEBUG_RAST, "%s count=%u rank=%u\n", __FUNCTION__, + fence->count, fence->rank); + + pipe_condvar_signal(fence->signalled); + + pipe_mutex_unlock(fence->mutex); +} void diff --git a/src/gallium/drivers/llvmpipe/lp_fence.h b/src/gallium/drivers/llvmpipe/lp_fence.h index c90e6de423b..d9270f5784a 100644 --- a/src/gallium/drivers/llvmpipe/lp_fence.h +++ b/src/gallium/drivers/llvmpipe/lp_fence.h @@ -54,6 +54,10 @@ lp_fence_create(unsigned rank); void +lp_fence_signal(struct lp_fence *fence); + + +void llvmpipe_init_screen_fence_funcs(struct pipe_screen *screen); diff --git a/src/gallium/drivers/llvmpipe/lp_flush.c b/src/gallium/drivers/llvmpipe/lp_flush.c index bf832433be1..644b821957a 100644 --- a/src/gallium/drivers/llvmpipe/lp_flush.c +++ b/src/gallium/drivers/llvmpipe/lp_flush.c @@ -37,6 +37,10 @@ #include "lp_setup.h" +/** + * \param flags bitmask of PIPE_FLUSH_x flags + * \param fence if non-null, returns pointer to a fench which can be waited on + */ void llvmpipe_flush( struct pipe_context *pipe, unsigned flags, @@ -60,14 +64,10 @@ llvmpipe_flush( struct pipe_context *pipe, } } - /* XXX the lp_setup_flush(flags) param is not a bool, and it's ignored - * at this time! - */ - if (flags & PIPE_FLUSH_SWAPBUFFERS) { - lp_setup_flush( llvmpipe->setup, FALSE ); - } - else if (flags & PIPE_FLUSH_RENDER_CACHE) { - lp_setup_flush( llvmpipe->setup, TRUE ); + /* ask the setup module to flush */ + if (flags & (PIPE_FLUSH_SWAPBUFFERS | PIPE_FLUSH_RENDER_CACHE | + PIPE_FLUSH_TEXTURE_CACHE)) { + lp_setup_flush(llvmpipe->setup, flags); } /* Enable to dump BMPs of the color/depth buffers each frame */ @@ -79,12 +79,12 @@ llvmpipe_flush( struct pipe_context *pipe, for (i = 0; i < llvmpipe->framebuffer.nr_cbufs; i++) { util_snprintf(filename, sizeof(filename), "cbuf%u_%u", i, frame_no); - debug_dump_surface(filename, llvmpipe->framebuffer.cbufs[i]); + debug_dump_surface_bmp(&llvmpipe->pipe, filename, llvmpipe->framebuffer.cbufs[0]); } if (0) { util_snprintf(filename, sizeof(filename), "zsbuf_%u", frame_no); - debug_dump_surface(filename, llvmpipe->framebuffer.zsbuf); + debug_dump_surface_bmp(&llvmpipe->pipe, filename, llvmpipe->framebuffer.zsbuf); } ++frame_no; @@ -92,3 +92,69 @@ llvmpipe_flush( struct pipe_context *pipe, #endif } + +/** + * Flush context if necessary. + * + * Returns FALSE if it would have block, but do_not_block was set, TRUE + * otherwise. + * + * TODO: move this logic to an auxiliary library? + */ +boolean +llvmpipe_flush_resource(struct pipe_context *pipe, + struct pipe_resource *resource, + unsigned face, + unsigned level, + unsigned flush_flags, + boolean read_only, + boolean cpu_access, + boolean do_not_block) +{ + unsigned referenced; + + referenced = pipe->is_resource_referenced(pipe, resource, face, level); + + if ((referenced & PIPE_REFERENCED_FOR_WRITE) || + ((referenced & PIPE_REFERENCED_FOR_READ) && !read_only)) { + + if (resource->target != PIPE_BUFFER) { + /* + * TODO: The semantics of these flush flags are too obtuse. They should + * disappear and the pipe driver should just ensure that all visible + * side-effects happen when they need to happen. + */ + if (referenced & PIPE_REFERENCED_FOR_WRITE) + flush_flags |= PIPE_FLUSH_RENDER_CACHE; + + if (referenced & PIPE_REFERENCED_FOR_READ) + flush_flags |= PIPE_FLUSH_TEXTURE_CACHE; + } + + if (cpu_access) { + /* + * Flush and wait. + */ + + struct pipe_fence_handle *fence = NULL; + + if (do_not_block) + return FALSE; + + pipe->flush(pipe, flush_flags, &fence); + + if (fence) { + pipe->screen->fence_finish(pipe->screen, fence, 0); + pipe->screen->fence_reference(pipe->screen, &fence, NULL); + } + } else { + /* + * Just flush. + */ + + pipe->flush(pipe, flush_flags, NULL); + } + } + + return TRUE; +} diff --git a/src/gallium/drivers/llvmpipe/lp_flush.h b/src/gallium/drivers/llvmpipe/lp_flush.h index 10b2b525836..7b605681a93 100644 --- a/src/gallium/drivers/llvmpipe/lp_flush.h +++ b/src/gallium/drivers/llvmpipe/lp_flush.h @@ -28,10 +28,23 @@ #ifndef LP_FLUSH_H #define LP_FLUSH_H +#include "pipe/p_compiler.h" + struct pipe_context; struct pipe_fence_handle; -void llvmpipe_flush(struct pipe_context *pipe, unsigned flags, - struct pipe_fence_handle **fence); +void +llvmpipe_flush(struct pipe_context *pipe, unsigned flags, + struct pipe_fence_handle **fence); + +boolean +llvmpipe_flush_resource(struct pipe_context *pipe, + struct pipe_resource *resource, + unsigned face, + unsigned level, + unsigned flush_flags, + boolean read_only, + boolean cpu_access, + boolean do_not_block); #endif diff --git a/src/gallium/drivers/llvmpipe/lp_jit.c b/src/gallium/drivers/llvmpipe/lp_jit.c index b666ffc8043..466a2f54fbe 100644 --- a/src/gallium/drivers/llvmpipe/lp_jit.c +++ b/src/gallium/drivers/llvmpipe/lp_jit.c @@ -51,12 +51,19 @@ lp_jit_init_globals(struct llvmpipe_screen *screen) /* struct lp_jit_texture */ { - LLVMTypeRef elem_types[4]; + LLVMTypeRef elem_types[LP_JIT_TEXTURE_NUM_FIELDS]; elem_types[LP_JIT_TEXTURE_WIDTH] = LLVMInt32Type(); elem_types[LP_JIT_TEXTURE_HEIGHT] = LLVMInt32Type(); - elem_types[LP_JIT_TEXTURE_STRIDE] = LLVMInt32Type(); - elem_types[LP_JIT_TEXTURE_DATA] = LLVMPointerType(LLVMInt8Type(), 0); + elem_types[LP_JIT_TEXTURE_DEPTH] = LLVMInt32Type(); + elem_types[LP_JIT_TEXTURE_LAST_LEVEL] = LLVMInt32Type(); + elem_types[LP_JIT_TEXTURE_ROW_STRIDE] = + LLVMArrayType(LLVMInt32Type(), LP_MAX_TEXTURE_LEVELS); + elem_types[LP_JIT_TEXTURE_IMG_STRIDE] = + LLVMArrayType(LLVMInt32Type(), LP_MAX_TEXTURE_LEVELS); + elem_types[LP_JIT_TEXTURE_DATA] = + LLVMArrayType(LLVMPointerType(LLVMInt8Type(), 0), + LP_MAX_TEXTURE_LEVELS); texture_type = LLVMStructType(elem_types, Elements(elem_types), 0); @@ -66,9 +73,18 @@ lp_jit_init_globals(struct llvmpipe_screen *screen) LP_CHECK_MEMBER_OFFSET(struct lp_jit_texture, height, screen->target, texture_type, LP_JIT_TEXTURE_HEIGHT); - LP_CHECK_MEMBER_OFFSET(struct lp_jit_texture, stride, + LP_CHECK_MEMBER_OFFSET(struct lp_jit_texture, depth, screen->target, texture_type, - LP_JIT_TEXTURE_STRIDE); + LP_JIT_TEXTURE_DEPTH); + LP_CHECK_MEMBER_OFFSET(struct lp_jit_texture, last_level, + screen->target, texture_type, + LP_JIT_TEXTURE_LAST_LEVEL); + LP_CHECK_MEMBER_OFFSET(struct lp_jit_texture, row_stride, + screen->target, texture_type, + LP_JIT_TEXTURE_ROW_STRIDE); + LP_CHECK_MEMBER_OFFSET(struct lp_jit_texture, img_stride, + screen->target, texture_type, + LP_JIT_TEXTURE_IMG_STRIDE); LP_CHECK_MEMBER_OFFSET(struct lp_jit_texture, data, screen->target, texture_type, LP_JIT_TEXTURE_DATA); @@ -80,36 +96,53 @@ lp_jit_init_globals(struct llvmpipe_screen *screen) /* struct lp_jit_context */ { - LLVMTypeRef elem_types[8]; + LLVMTypeRef elem_types[LP_JIT_CTX_COUNT]; LLVMTypeRef context_type; - elem_types[0] = LLVMPointerType(LLVMFloatType(), 0); /* constants */ - elem_types[1] = LLVMFloatType(); /* alpha_ref_value */ elem_types[2] = LLVMFloatType(); /* scissor_xmin */ - elem_types[3] = LLVMFloatType(); /* scissor_ymin */ - elem_types[4] = LLVMFloatType(); /* scissor_xmax */ - elem_types[5] = LLVMFloatType(); /* scissor_ymax */ - elem_types[6] = LLVMPointerType(LLVMInt8Type(), 0); /* blend_color */ - elem_types[7] = LLVMArrayType(texture_type, PIPE_MAX_SAMPLERS); /* textures */ + elem_types[LP_JIT_CTX_CONSTANTS] = LLVMPointerType(LLVMFloatType(), 0); + elem_types[LP_JIT_CTX_ALPHA_REF] = LLVMFloatType(); + elem_types[LP_JIT_CTX_STENCIL_REF_FRONT] = LLVMInt32Type(); + elem_types[LP_JIT_CTX_STENCIL_REF_BACK] = LLVMInt32Type(); + elem_types[LP_JIT_CTX_SCISSOR_XMIN] = LLVMFloatType(); + elem_types[LP_JIT_CTX_SCISSOR_YMIN] = LLVMFloatType(); + elem_types[LP_JIT_CTX_SCISSOR_XMAX] = LLVMFloatType(); + elem_types[LP_JIT_CTX_SCISSOR_YMAX] = LLVMFloatType(); + elem_types[LP_JIT_CTX_BLEND_COLOR] = LLVMPointerType(LLVMInt8Type(), 0); + elem_types[LP_JIT_CTX_TEXTURES] = LLVMArrayType(texture_type, + PIPE_MAX_SAMPLERS); context_type = LLVMStructType(elem_types, Elements(elem_types), 0); LP_CHECK_MEMBER_OFFSET(struct lp_jit_context, constants, - screen->target, context_type, 0); + screen->target, context_type, + LP_JIT_CTX_CONSTANTS); LP_CHECK_MEMBER_OFFSET(struct lp_jit_context, alpha_ref_value, - screen->target, context_type, 1); + screen->target, context_type, + LP_JIT_CTX_ALPHA_REF); + LP_CHECK_MEMBER_OFFSET(struct lp_jit_context, stencil_ref_front, + screen->target, context_type, + LP_JIT_CTX_STENCIL_REF_FRONT); + LP_CHECK_MEMBER_OFFSET(struct lp_jit_context, stencil_ref_back, + screen->target, context_type, + LP_JIT_CTX_STENCIL_REF_BACK); LP_CHECK_MEMBER_OFFSET(struct lp_jit_context, scissor_xmin, - screen->target, context_type, 2); + screen->target, context_type, + LP_JIT_CTX_SCISSOR_XMIN); LP_CHECK_MEMBER_OFFSET(struct lp_jit_context, scissor_ymin, - screen->target, context_type, 3); + screen->target, context_type, + LP_JIT_CTX_SCISSOR_YMIN); LP_CHECK_MEMBER_OFFSET(struct lp_jit_context, scissor_xmax, - screen->target, context_type, 4); + screen->target, context_type, + LP_JIT_CTX_SCISSOR_XMAX); LP_CHECK_MEMBER_OFFSET(struct lp_jit_context, scissor_ymax, - screen->target, context_type, 5); + screen->target, context_type, + LP_JIT_CTX_SCISSOR_YMAX); LP_CHECK_MEMBER_OFFSET(struct lp_jit_context, blend_color, - screen->target, context_type, 6); + screen->target, context_type, + LP_JIT_CTX_BLEND_COLOR); LP_CHECK_MEMBER_OFFSET(struct lp_jit_context, textures, screen->target, context_type, - LP_JIT_CONTEXT_TEXTURES_INDEX); + LP_JIT_CTX_TEXTURES); LP_CHECK_STRUCT_SIZE(struct lp_jit_context, screen->target, context_type); @@ -138,30 +171,12 @@ lp_jit_screen_cleanup(struct llvmpipe_screen *screen) void lp_jit_screen_init(struct llvmpipe_screen *screen) { - char *error = NULL; - - util_cpu_detect(); - -#if 0 - /* For simulating less capable machines */ - util_cpu_caps.has_sse3 = 0; - util_cpu_caps.has_ssse3 = 0; - util_cpu_caps.has_sse4_1 = 0; -#endif - lp_build_init(); - screen->module = LLVMModuleCreateWithName("llvmpipe"); - - screen->provider = LLVMCreateModuleProviderForExistingModule(screen->module); - - if (LLVMCreateJITCompiler(&screen->engine, screen->provider, 1, &error)) { - _debug_printf("%s\n", error); - LLVMDisposeMessage(error); - assert(0); - } - - screen->target = LLVMGetExecutionEngineTargetData(screen->engine); + screen->module = lp_build_module; + screen->provider = lp_build_provider; + screen->engine = lp_build_engine; + screen->target = lp_build_target; screen->pass = LLVMCreateFunctionPassManager(screen->provider); LLVMAddTargetData(screen->target, screen->pass); diff --git a/src/gallium/drivers/llvmpipe/lp_jit.h b/src/gallium/drivers/llvmpipe/lp_jit.h index 8df3015d4b4..5d0268c68c4 100644 --- a/src/gallium/drivers/llvmpipe/lp_jit.h +++ b/src/gallium/drivers/llvmpipe/lp_jit.h @@ -39,6 +39,7 @@ #include "gallivm/lp_bld_struct.h" #include "pipe/p_state.h" +#include "lp_texture.h" struct llvmpipe_screen; @@ -48,16 +49,23 @@ struct lp_jit_texture { uint32_t width; uint32_t height; - uint32_t stride; - const void *data; + uint32_t depth; + uint32_t last_level; + uint32_t row_stride[LP_MAX_TEXTURE_LEVELS]; + uint32_t img_stride[LP_MAX_TEXTURE_LEVELS]; + const void *data[LP_MAX_TEXTURE_LEVELS]; }; enum { LP_JIT_TEXTURE_WIDTH = 0, LP_JIT_TEXTURE_HEIGHT, - LP_JIT_TEXTURE_STRIDE, - LP_JIT_TEXTURE_DATA + LP_JIT_TEXTURE_DEPTH, + LP_JIT_TEXTURE_LAST_LEVEL, + LP_JIT_TEXTURE_ROW_STRIDE, + LP_JIT_TEXTURE_IMG_STRIDE, + LP_JIT_TEXTURE_DATA, + LP_JIT_TEXTURE_NUM_FIELDS /* number of fields above */ }; @@ -79,6 +87,8 @@ struct lp_jit_context float alpha_ref_value; + uint32_t stencil_ref_front, stencil_ref_back; + /** floats, not ints */ float scissor_xmin, scissor_ymin, scissor_xmax, scissor_ymax; @@ -89,37 +99,66 @@ struct lp_jit_context }; +/** + * These enum values must match the position of the fields in the + * lp_jit_context struct above. + */ +enum { + LP_JIT_CTX_CONSTANTS = 0, + LP_JIT_CTX_ALPHA_REF, + LP_JIT_CTX_STENCIL_REF_FRONT, + LP_JIT_CTX_STENCIL_REF_BACK, + LP_JIT_CTX_SCISSOR_XMIN, + LP_JIT_CTX_SCISSOR_YMIN, + LP_JIT_CTX_SCISSOR_XMAX, + LP_JIT_CTX_SCISSOR_YMAX, + LP_JIT_CTX_BLEND_COLOR, + LP_JIT_CTX_TEXTURES, + LP_JIT_CTX_COUNT +}; + + #define lp_jit_context_constants(_builder, _ptr) \ - lp_build_struct_get(_builder, _ptr, 0, "constants") + lp_build_struct_get(_builder, _ptr, LP_JIT_CTX_CONSTANTS, "constants") #define lp_jit_context_alpha_ref_value(_builder, _ptr) \ - lp_build_struct_get(_builder, _ptr, 1, "alpha_ref_value") + lp_build_struct_get(_builder, _ptr, LP_JIT_CTX_ALPHA_REF, "alpha_ref_value") + +#define lp_jit_context_stencil_ref_front_value(_builder, _ptr) \ + lp_build_struct_get(_builder, _ptr, LP_JIT_CTX_STENCIL_REF_FRONT, "stencil_ref_front") + +#define lp_jit_context_stencil_ref_back_value(_builder, _ptr) \ + lp_build_struct_get(_builder, _ptr, LP_JIT_CTX_STENCIL_REF_BACK, "stencil_ref_back") #define lp_jit_context_scissor_xmin_value(_builder, _ptr) \ - lp_build_struct_get(_builder, _ptr, 2, "scissor_xmin") + lp_build_struct_get(_builder, _ptr, LP_JIT_CTX_SCISSOR_XMIN, "scissor_xmin") #define lp_jit_context_scissor_ymin_value(_builder, _ptr) \ - lp_build_struct_get(_builder, _ptr, 3, "scissor_ymin") + lp_build_struct_get(_builder, _ptr, LP_JIT_CTX_SCISSOR_YMIN, "scissor_ymin") #define lp_jit_context_scissor_xmax_value(_builder, _ptr) \ - lp_build_struct_get(_builder, _ptr, 4, "scissor_xmax") + lp_build_struct_get(_builder, _ptr, LP_JIT_CTX_SCISSOR_XMAX, "scissor_xmax") #define lp_jit_context_scissor_ymax_value(_builder, _ptr) \ - lp_build_struct_get(_builder, _ptr, 5, "scissor_ymax") + lp_build_struct_get(_builder, _ptr, LP_JIT_CTX_SCISSOR_YMAX, "scissor_ymax") #define lp_jit_context_blend_color(_builder, _ptr) \ - lp_build_struct_get(_builder, _ptr, 6, "blend_color") - -#define LP_JIT_CONTEXT_TEXTURES_INDEX 7 + lp_build_struct_get(_builder, _ptr, LP_JIT_CTX_BLEND_COLOR, "blend_color") #define lp_jit_context_textures(_builder, _ptr) \ - lp_build_struct_get_ptr(_builder, _ptr, LP_JIT_CONTEXT_TEXTURES_INDEX, "textures") + lp_build_struct_get_ptr(_builder, _ptr, LP_JIT_CONTEXT_TEXTURES, "textures") + + +/** Indexes into jit_function[] array */ +#define RAST_WHOLE 0 +#define RAST_EDGE_TEST 1 typedef void (*lp_jit_frag_func)(const struct lp_jit_context *context, uint32_t x, uint32_t y, + float facing, const void *a0, const void *dadx, const void *dady, diff --git a/src/gallium/drivers/llvmpipe/lp_tile_size.h b/src/gallium/drivers/llvmpipe/lp_limits.h index f0b983c0632..4102a9df67c 100644 --- a/src/gallium/drivers/llvmpipe/lp_tile_size.h +++ b/src/gallium/drivers/llvmpipe/lp_limits.h @@ -25,8 +25,12 @@ * **************************************************************************/ -#ifndef LP_TILE_SIZE_H -#define LP_TILE_SIZE_H +/** + * Implementation limits for LLVMpipe driver. + */ + +#ifndef LP_LIMITS_H +#define LP_LIMITS_H /** @@ -36,4 +40,31 @@ #define TILE_SIZE (1 << TILE_ORDER) -#endif +/** + * Max texture sizes + */ +#define LP_MAX_TEXTURE_2D_LEVELS 13 /* 4K x 4K for now */ +#define LP_MAX_TEXTURE_3D_LEVELS 10 /* 512 x 512 x 512 for now */ + + +/** This must be the larger of LP_MAX_TEXTURE_2D/3D_LEVELS */ +#define LP_MAX_TEXTURE_LEVELS LP_MAX_TEXTURE_2D_LEVELS + + +/** + * Max drawing surface size is the max texture size + */ +#define LP_MAX_HEIGHT (1 << (LP_MAX_TEXTURE_LEVELS - 1)) +#define LP_MAX_WIDTH (1 << (LP_MAX_TEXTURE_LEVELS - 1)) + + +#define LP_MAX_THREADS 8 + + +/** + * Max bytes per scene. This may be replaced by a runtime parameter. + */ +#define LP_MAX_SCENE_SIZE (512 * 1024 * 1024) + + +#endif /* LP_LIMITS_H */ diff --git a/src/gallium/drivers/llvmpipe/lp_public.h b/src/gallium/drivers/llvmpipe/lp_public.h new file mode 100644 index 00000000000..ec6b660b48e --- /dev/null +++ b/src/gallium/drivers/llvmpipe/lp_public.h @@ -0,0 +1,10 @@ +#ifndef LP_PUBLIC_H +#define LP_PUBLIC_H + +struct pipe_screen; +struct sw_winsys; + +struct pipe_screen * +llvmpipe_create_screen(struct sw_winsys *winsys); + +#endif diff --git a/src/gallium/drivers/llvmpipe/lp_rast.c b/src/gallium/drivers/llvmpipe/lp_rast.c index 0f83eea6853..a00a592f2fe 100644 --- a/src/gallium/drivers/llvmpipe/lp_rast.c +++ b/src/gallium/drivers/llvmpipe/lp_rast.c @@ -28,7 +28,6 @@ #include <limits.h> #include "util/u_memory.h" #include "util/u_math.h" -#include "util/u_cpu_detect.h" #include "util/u_surface.h" #include "lp_scene_queue.h" @@ -42,15 +41,15 @@ #include "lp_scene.h" -/* Begin rasterizing a scene: +/** + * Begin rasterizing a scene. + * Called once per scene by one thread. */ -static boolean +static void lp_rast_begin( struct lp_rasterizer *rast, struct lp_scene *scene ) { const struct pipe_framebuffer_state *fb = &scene->fb; - boolean write_color = fb->nr_cbufs != 0; - boolean write_zstencil = fb->zsbuf != NULL; int i; rast->curr_scene = scene; @@ -58,57 +57,149 @@ lp_rast_begin( struct lp_rasterizer *rast, LP_DBG(DEBUG_RAST, "%s\n", __FUNCTION__); rast->state.nr_cbufs = scene->fb.nr_cbufs; - rast->state.write_zstencil = write_zstencil; - rast->state.write_color = write_color; for (i = 0; i < rast->state.nr_cbufs; i++) { - rast->cbuf[i].map = scene->cbuf_map[i]; - rast->cbuf[i].format = scene->cbuf_transfer[i]->texture->format; - rast->cbuf[i].width = scene->cbuf_transfer[i]->width; - rast->cbuf[i].height = scene->cbuf_transfer[i]->height; - rast->cbuf[i].stride = scene->cbuf_transfer[i]->stride; + struct pipe_surface *cbuf = scene->fb.cbufs[i]; + rast->cbuf[i].format = cbuf->texture->format; + rast->cbuf[i].tiles_per_row = align(cbuf->width, TILE_SIZE) / TILE_SIZE; + rast->cbuf[i].blocksize = + util_format_get_blocksize(cbuf->texture->format); + rast->cbuf[i].map = llvmpipe_resource_map(cbuf->texture, + cbuf->face, + cbuf->level, + cbuf->zslice, + LP_TEX_USAGE_READ_WRITE, + LP_TEX_LAYOUT_NONE); } - if (write_zstencil) { - rast->zsbuf.map = scene->zsbuf_map; - rast->zsbuf.stride = scene->zsbuf_transfer->stride; + if (fb->zsbuf) { + struct pipe_surface *zsbuf = scene->fb.zsbuf; + rast->zsbuf.stride = llvmpipe_resource_stride(zsbuf->texture, zsbuf->level); rast->zsbuf.blocksize = - util_format_get_blocksize(scene->zsbuf_transfer->texture->format); + util_format_get_blocksize(zsbuf->texture->format); + + rast->zsbuf.map = llvmpipe_resource_map(zsbuf->texture, + zsbuf->face, + zsbuf->level, + zsbuf->zslice, + LP_TEX_USAGE_READ_WRITE, + LP_TEX_LAYOUT_NONE); + assert(rast->zsbuf.map); } lp_scene_bin_iter_begin( scene ); - - return TRUE; } static void lp_rast_end( struct lp_rasterizer *rast ) { - int i; - - lp_scene_reset( rast->curr_scene ); + struct lp_scene *scene = rast->curr_scene; + unsigned i; - for (i = 0; i < rast->state.nr_cbufs; i++) + /* Unmap color buffers */ + for (i = 0; i < rast->state.nr_cbufs; i++) { + struct pipe_surface *cbuf = scene->fb.cbufs[i]; + llvmpipe_resource_unmap(cbuf->texture, + cbuf->face, + cbuf->level, + cbuf->zslice); rast->cbuf[i].map = NULL; + } + + /* Unmap z/stencil buffer */ + if (rast->zsbuf.map) { + struct pipe_surface *zsbuf = scene->fb.zsbuf; + llvmpipe_resource_unmap(zsbuf->texture, + zsbuf->face, + zsbuf->level, + zsbuf->zslice); + rast->zsbuf.map = NULL; + } + + lp_scene_reset( rast->curr_scene ); - rast->zsbuf.map = NULL; rast->curr_scene = NULL; + +#ifdef DEBUG + if (0) + debug_printf("Post render scene: tile unswizzle: %u tile swizzle: %u\n", + lp_tile_unswizzle_count, lp_tile_swizzle_count); +#endif } + /** * Begining rasterization of a tile. * \param x window X position of the tile, in pixels * \param y window Y position of the tile, in pixels */ static void -lp_rast_start_tile(struct lp_rasterizer_task *task, +lp_rast_tile_begin(struct lp_rasterizer_task *task, unsigned x, unsigned y) { + struct lp_rasterizer *rast = task->rast; + struct lp_scene *scene = rast->curr_scene; + enum lp_texture_usage usage; + unsigned buf; + LP_DBG(DEBUG_RAST, "%s %d,%d\n", __FUNCTION__, x, y); + assert(x % TILE_SIZE == 0); + assert(y % TILE_SIZE == 0); + task->x = x; task->y = y; + + if (scene->has_color_clear) + usage = LP_TEX_USAGE_WRITE_ALL; + else + usage = LP_TEX_USAGE_READ_WRITE; + + /* get pointers to color tile(s) */ + for (buf = 0; buf < rast->state.nr_cbufs; buf++) { + struct pipe_surface *cbuf = rast->curr_scene->fb.cbufs[buf]; + struct llvmpipe_resource *lpt; + assert(cbuf); + lpt = llvmpipe_resource(cbuf->texture); + task->color_tiles[buf] = llvmpipe_get_texture_tile(lpt, + cbuf->face + cbuf->zslice, + cbuf->level, + usage, + x, y); + assert(task->color_tiles[buf]); + } + + /* get pointer to depth/stencil tile */ + { + struct pipe_surface *zsbuf = rast->curr_scene->fb.zsbuf; + if (zsbuf) { + struct llvmpipe_resource *lpt = llvmpipe_resource(zsbuf->texture); + + if (scene->has_depth_clear) + usage = LP_TEX_USAGE_WRITE_ALL; + else + usage = LP_TEX_USAGE_READ_WRITE; + + /* "prime" the tile: convert data from linear to tiled if necessary + * and update the tile's layout info. + */ + (void) llvmpipe_get_texture_tile(lpt, + zsbuf->face + zsbuf->zslice, + zsbuf->level, + usage, + x, y); + /* Get actual pointer to the tile data. Note that depth/stencil + * data is tiled differently than color data. + */ + task->depth_tile = lp_rast_get_depth_block_pointer(rast, x, y); + + assert(task->depth_tile); + } + else { + task->depth_tile = NULL; + } + } } @@ -122,7 +213,7 @@ lp_rast_clear_color(struct lp_rasterizer_task *task, { struct lp_rasterizer *rast = task->rast; const uint8_t *clear_color = arg.clear_color; - uint8_t **color_tile = task->tile.color; + unsigned i; LP_DBG(DEBUG_RAST, "%s 0x%x,0x%x,0x%x,0x%x\n", __FUNCTION__, @@ -136,7 +227,8 @@ lp_rast_clear_color(struct lp_rasterizer_task *task, clear_color[2] == clear_color[3]) { /* clear to grayscale value {x, x, x, x} */ for (i = 0; i < rast->state.nr_cbufs; i++) { - memset(color_tile[i], clear_color[0], TILE_SIZE * TILE_SIZE * 4); + uint8_t *ptr = task->color_tiles[i]; + memset(ptr, clear_color[0], TILE_SIZE * TILE_SIZE * 4); } } else { @@ -147,8 +239,9 @@ lp_rast_clear_color(struct lp_rasterizer_task *task, */ const unsigned chunk = TILE_SIZE / 4; for (i = 0; i < rast->state.nr_cbufs; i++) { - uint8_t *c = color_tile[i]; + uint8_t *c = task->color_tiles[i]; unsigned j; + for (j = 0; j < 4 * TILE_SIZE; j++) { memset(c, clear_color[0], chunk); c += chunk; @@ -159,7 +252,6 @@ lp_rast_clear_color(struct lp_rasterizer_task *task, memset(c, clear_color[3], chunk); c += chunk; } - assert(c - color_tile[i] == TILE_SIZE * TILE_SIZE * 4); } } @@ -176,23 +268,15 @@ lp_rast_clear_zstencil(struct lp_rasterizer_task *task, const union lp_rast_cmd_arg arg) { struct lp_rasterizer *rast = task->rast; - const unsigned tile_x = task->x; - const unsigned tile_y = task->y; const unsigned height = TILE_SIZE / TILE_VECTOR_HEIGHT; const unsigned width = TILE_SIZE * TILE_VECTOR_HEIGHT; - unsigned block_size = rast->zsbuf.blocksize; + const unsigned block_size = rast->zsbuf.blocksize; + const unsigned dst_stride = rast->zsbuf.stride * TILE_VECTOR_HEIGHT; uint8_t *dst; - unsigned dst_stride = rast->zsbuf.stride * TILE_VECTOR_HEIGHT; unsigned i, j; LP_DBG(DEBUG_RAST, "%s 0x%x\n", __FUNCTION__, arg.clear_zstencil); - assert(rast->zsbuf.map); - if (!rast->zsbuf.map) - return; - - LP_DBG(DEBUG_RAST, "%s\n", __FUNCTION__); - /* * Clear the aera of the swizzled depth/depth buffer matching this tile, in * stripes of TILE_VECTOR_HEIGHT x TILE_SIZE at a time. @@ -201,7 +285,9 @@ lp_rast_clear_zstencil(struct lp_rasterizer_task *task, * TILE_VECTOR_HEIGHT x TILE_VECTOR_WIDTH pixels have consecutive offsets. */ - dst = lp_rast_depth_pointer(rast, tile_x, tile_y); + dst = task->depth_tile; + + assert(dst == lp_rast_get_depth_block_pointer(rast, task->x, task->y)); switch (block_size) { case 1: @@ -234,32 +320,73 @@ lp_rast_clear_zstencil(struct lp_rasterizer_task *task, * Load tile color from the framebuffer surface. * This is a bin command called during bin processing. */ +#if 0 void lp_rast_load_color(struct lp_rasterizer_task *task, const union lp_rast_cmd_arg arg) { struct lp_rasterizer *rast = task->rast; - const unsigned x = task->x, y = task->y; - unsigned i; + unsigned buf; + enum lp_texture_usage usage; LP_DBG(DEBUG_RAST, "%s at %u, %u\n", __FUNCTION__, x, y); - for (i = 0; i < rast->state.nr_cbufs; i++) { - if (x >= rast->cbuf[i].width || y >= rast->cbuf[i].height) - continue; + if (scene->has_color_clear) + usage = LP_TEX_USAGE_WRITE_ALL; + else + usage = LP_TEX_USAGE_READ_WRITE; + + /* Get pointers to color tile(s). + * This will convert linear data to tiled if needed. + */ + for (buf = 0; buf < rast->state.nr_cbufs; buf++) { + struct pipe_surface *cbuf = rast->curr_scene->fb.cbufs[buf]; + struct llvmpipe_texture *lpt; + assert(cbuf); + lpt = llvmpipe_texture(cbuf->texture); + task->color_tiles[buf] = llvmpipe_get_texture_tile(lpt, + cbuf->face + cbuf->zslice, + cbuf->level, + usage, + task->x, task->y); + assert(task->color_tiles[buf]); + } +} +#endif - lp_tile_read_4ub(rast->cbuf[i].format, - task->tile.color[i], - rast->cbuf[i].map, - rast->cbuf[i].stride, - x, y, - TILE_SIZE, TILE_SIZE); - LP_COUNT(nr_color_tile_load); +/** + * Convert the color tile from tiled to linear layout. + * This is generally only done when we're flushing the scene just prior to + * SwapBuffers. If we didn't do this here, we'd have to convert the entire + * tiled color buffer to linear layout in the llvmpipe_texture_unmap() + * function. It's better to do it here to take advantage of + * threading/parallelism. + * This is a bin command which is stored in all bins. + */ +void +lp_rast_store_color( struct lp_rasterizer_task *task, + const union lp_rast_cmd_arg arg) +{ + struct lp_rasterizer *rast = task->rast; + struct lp_scene *scene = rast->curr_scene; + unsigned buf; + + for (buf = 0; buf < rast->state.nr_cbufs; buf++) { + struct pipe_surface *cbuf = scene->fb.cbufs[buf]; + const unsigned face = cbuf->face, level = cbuf->level; + struct llvmpipe_resource *lpt = llvmpipe_resource(cbuf->texture); + /* this will convert the tiled data to linear if needed */ + (void) llvmpipe_get_texture_tile_linear(lpt, face, level, + LP_TEX_USAGE_READ, + task->x, task->y); } } +/** + * This is a bin command called during bin processing. + */ void lp_rast_set_state(struct lp_rasterizer_task *task, const union lp_rast_cmd_arg arg) @@ -273,7 +400,6 @@ lp_rast_set_state(struct lp_rasterizer_task *task, } - /** * Run the shader on all blocks in a tile. This is used when a tile is * completely contained inside a triangle. @@ -285,7 +411,6 @@ lp_rast_shade_tile(struct lp_rasterizer_task *task, { struct lp_rasterizer *rast = task->rast; const struct lp_rast_state *state = task->current_state; - struct lp_rast_tile *tile = &task->tile; const struct lp_rast_shader_inputs *inputs = arg.shade_tile; const unsigned tile_x = task->x, tile_y = task->y; unsigned x, y; @@ -297,28 +422,27 @@ lp_rast_shade_tile(struct lp_rasterizer_task *task, for (x = 0; x < TILE_SIZE; x += 4) { uint8_t *color[PIPE_MAX_COLOR_BUFS]; uint32_t *depth; - unsigned block_offset, i; - - /* offset of the 16x16 pixel block within the tile */ - block_offset = ((y / 4) * (16 * 16) + (x / 4) * 16); + unsigned i; /* color buffer */ for (i = 0; i < rast->state.nr_cbufs; i++) - color[i] = tile->color[i] + 4 * block_offset; + color[i] = lp_rast_get_color_block_pointer(task, i, + tile_x + x, tile_y + y); /* depth buffer */ - depth = lp_rast_depth_pointer(rast, tile_x + x, tile_y + y); - - /* run shader */ - state->jit_function[0]( &state->jit_context, - tile_x + x, tile_y + y, - inputs->a0, - inputs->dadx, - inputs->dady, - color, - depth, - INT_MIN, INT_MIN, INT_MIN, - NULL, NULL, NULL ); + depth = lp_rast_get_depth_block_pointer(rast, tile_x + x, tile_y + y); + + /* run shader on 4x4 block */ + state->jit_function[RAST_WHOLE]( &state->jit_context, + tile_x + x, tile_y + y, + inputs->facing, + inputs->a0, + inputs->dadx, + inputs->dady, + color, + depth, + INT_MIN, INT_MIN, INT_MIN, + NULL, NULL, NULL ); } } } @@ -327,6 +451,8 @@ lp_rast_shade_tile(struct lp_rasterizer_task *task, /** * Compute shading for a 4x4 block of pixels. * This is a bin command called during bin processing. + * \param x X position of quad in window coords + * \param y Y position of quad in window coords */ void lp_rast_shade_quads( struct lp_rasterizer_task *task, const struct lp_rast_shader_inputs *inputs, @@ -335,12 +461,9 @@ void lp_rast_shade_quads( struct lp_rasterizer_task *task, { const struct lp_rast_state *state = task->current_state; struct lp_rasterizer *rast = task->rast; - struct lp_rast_tile *tile = &task->tile; uint8_t *color[PIPE_MAX_COLOR_BUFS]; void *depth; unsigned i; - unsigned ix, iy; - int block_offset; assert(state); @@ -351,37 +474,35 @@ void lp_rast_shade_quads( struct lp_rasterizer_task *task, assert((x % 4) == 0); assert((y % 4) == 0); - ix = x % TILE_SIZE; - iy = y % TILE_SIZE; - - /* offset of the 16x16 pixel block within the tile */ - block_offset = ((iy / 4) * (16 * 16) + (ix / 4) * 16); - /* color buffer */ - for (i = 0; i < rast->state.nr_cbufs; i++) - color[i] = tile->color[i] + 4 * block_offset; + for (i = 0; i < rast->state.nr_cbufs; i++) { + color[i] = lp_rast_get_color_block_pointer(task, i, x, y); + assert(lp_check_alignment(color[i], 16)); + } /* depth buffer */ - depth = lp_rast_depth_pointer(rast, x, y); + depth = lp_rast_get_depth_block_pointer(rast, x, y); - assert(lp_check_alignment(tile->color[0], 16)); assert(lp_check_alignment(state->jit_context.blend_color, 16)); assert(lp_check_alignment(inputs->step[0], 16)); assert(lp_check_alignment(inputs->step[1], 16)); assert(lp_check_alignment(inputs->step[2], 16)); - /* run shader */ - state->jit_function[1]( &state->jit_context, - x, y, - inputs->a0, - inputs->dadx, - inputs->dady, - color, - depth, - c1, c2, c3, - inputs->step[0], inputs->step[1], inputs->step[2]); + /* run shader on 4x4 block */ + state->jit_function[RAST_EDGE_TEST]( &state->jit_context, + x, y, + inputs->facing, + inputs->a0, + inputs->dadx, + inputs->dady, + color, + depth, + c1, c2, c3, + inputs->step[0], + inputs->step[1], + inputs->step[2]); } @@ -439,39 +560,31 @@ outline_subtiles(uint8_t *tile) /** - * Write the rasterizer's color tile to the framebuffer. + * Called when we're done writing to a color tile. */ static void -lp_rast_store_color(struct lp_rasterizer_task *task) +lp_rast_tile_end(struct lp_rasterizer_task *task) { +#if DEBUG struct lp_rasterizer *rast = task->rast; - const unsigned x = task->x, y = task->y; - unsigned i; - - for (i = 0; i < rast->state.nr_cbufs; i++) { - if (x >= rast->cbuf[i].width) - continue; + unsigned buf; - if (y >= rast->cbuf[i].height) - continue; - - LP_DBG(DEBUG_RAST, "%s [%u] %d,%d\n", __FUNCTION__, - task->thread_index, x, y); + for (buf = 0; buf < rast->state.nr_cbufs; buf++) { + uint8_t *color = lp_rast_get_color_block_pointer(task, buf, + task->x, task->y); if (LP_DEBUG & DEBUG_SHOW_SUBTILES) - outline_subtiles(task->tile.color[i]); + outline_subtiles(color); else if (LP_DEBUG & DEBUG_SHOW_TILES) - outline_tile(task->tile.color[i]); - - lp_tile_write_4ub(rast->cbuf[i].format, - task->tile.color[i], - rast->cbuf[i].map, - rast->cbuf[i].stride, - x, y, - TILE_SIZE, TILE_SIZE); - - LP_COUNT(nr_color_tile_store); + outline_tile(color); } +#else + (void) outline_subtiles; +#endif + + /* debug */ + memset(task->color_tiles, 0, sizeof(task->color_tiles)); + task->depth_tile = NULL; } @@ -485,18 +598,7 @@ lp_rast_fence(struct lp_rasterizer_task *task, const union lp_rast_cmd_arg arg) { struct lp_fence *fence = arg.fence; - - pipe_mutex_lock( fence->mutex ); - - fence->count++; - assert(fence->count <= fence->rank); - - LP_DBG(DEBUG_RAST, "%s count=%u rank=%u\n", __FUNCTION__, - fence->count, fence->rank); - - pipe_condvar_signal( fence->signalled ); - - pipe_mutex_unlock( fence->mutex ); + lp_fence_signal(fence); } @@ -517,7 +619,7 @@ rasterize_bin(struct lp_rasterizer_task *task, struct cmd_block *block; unsigned k; - lp_rast_start_tile( task, x * TILE_SIZE, y * TILE_SIZE ); + lp_rast_tile_begin( task, x * TILE_SIZE, y * TILE_SIZE ); /* simply execute each of the commands in the block list */ for (block = commands->head; block; block = block->next) { @@ -526,10 +628,7 @@ rasterize_bin(struct lp_rasterizer_task *task, } } - /* Write the rasterizer's tiles to the framebuffer. - */ - if (task->rast->state.write_color) - lp_rast_store_color(task); + lp_rast_tile_end(task); /* Free data for this bin. */ @@ -544,12 +643,12 @@ static struct { const char *name; } cmd_names[] = { - RAST(load_color), RAST(clear_color), RAST(clear_zstencil), RAST(triangle), RAST(shade_tile), RAST(set_state), + RAST(store_color), RAST(fence), }; @@ -602,8 +701,7 @@ is_empty_bin( const struct cmd_bin *bin ) } for (i = 0; i < head->count; i++) - if (head->cmd[i] != lp_rast_load_color && - head->cmd[i] != lp_rast_set_state) { + if (head->cmd[i] != lp_rast_set_state) { return FALSE; } @@ -663,6 +761,9 @@ lp_rast_queue_scene( struct lp_rasterizer *rast, rasterize_scene( &rast->tasks[0], scene ); lp_scene_reset( scene ); + + lp_rast_end( rast ); + rast->curr_scene = NULL; } else { @@ -769,16 +870,6 @@ create_rast_threads(struct lp_rasterizer *rast) { unsigned i; -#ifdef PIPE_OS_WINDOWS - /* Multithreading not supported on windows until conditions and barriers are - * properly implemented. */ - rast->num_threads = 0; -#else - rast->num_threads = util_cpu_caps.nr_cpus; - rast->num_threads = debug_get_num_option("LP_NUM_THREADS", rast->num_threads); - rast->num_threads = MIN2(rast->num_threads, MAX_THREADS); -#endif - /* NOTE: if num_threads is zero, we won't use any threads */ for (i = 0; i < rast->num_threads; i++) { pipe_semaphore_init(&rast->tasks[i].work_ready, 0); @@ -791,15 +882,15 @@ create_rast_threads(struct lp_rasterizer *rast) /** - * Create new lp_rasterizer. - * \param empty the queue to put empty scenes on after we've finished - * processing them. + * Create new lp_rasterizer. If num_threads is zero, don't create any + * new threads, do rendering synchronously. + * \param num_threads number of rasterizer threads to create */ struct lp_rasterizer * -lp_rast_create( void ) +lp_rast_create( unsigned num_threads ) { struct lp_rasterizer *rast; - unsigned i, cbuf; + unsigned i; rast = CALLOC_STRUCT(lp_rasterizer); if(!rast) @@ -809,14 +900,12 @@ lp_rast_create( void ) for (i = 0; i < Elements(rast->tasks); i++) { struct lp_rasterizer_task *task = &rast->tasks[i]; - - for (cbuf = 0; cbuf < PIPE_MAX_COLOR_BUFS; cbuf++ ) - task->tile.color[cbuf] = align_malloc(TILE_SIZE * TILE_SIZE * 4, 16); - task->rast = rast; task->thread_index = i; } + rast->num_threads = num_threads; + create_rast_threads(rast); /* for synchronizing rasterization threads */ @@ -830,12 +919,7 @@ lp_rast_create( void ) */ void lp_rast_destroy( struct lp_rasterizer *rast ) { - unsigned i, cbuf; - - for (i = 0; i < Elements(rast->tasks); i++) { - for (cbuf = 0; cbuf < PIPE_MAX_COLOR_BUFS; cbuf++ ) - align_free(rast->tasks[i].tile.color[cbuf]); - } + unsigned i; /* Set exit_flag and signal each thread's work_ready semaphore. * Each thread will be woken up, notice that the exit_flag is set and @@ -846,6 +930,12 @@ void lp_rast_destroy( struct lp_rasterizer *rast ) pipe_semaphore_signal(&rast->tasks[i].work_ready); } + /* Wait for threads to terminate before cleaning up per-thread data */ + for (i = 0; i < rast->num_threads; i++) { + pipe_thread_wait(rast->threads[i]); + } + + /* Clean up per-thread data */ for (i = 0; i < rast->num_threads; i++) { pipe_semaphore_destroy(&rast->tasks[i].work_ready); pipe_semaphore_destroy(&rast->tasks[i].work_done); @@ -854,6 +944,8 @@ void lp_rast_destroy( struct lp_rasterizer *rast ) /* for synchronizing rasterization threads */ pipe_barrier_destroy( &rast->barrier ); + lp_scene_queue_destroy(rast->full_scenes); + FREE(rast); } diff --git a/src/gallium/drivers/llvmpipe/lp_rast.h b/src/gallium/drivers/llvmpipe/lp_rast.h index dc5fc5fc7d6..e2f6f926779 100644 --- a/src/gallium/drivers/llvmpipe/lp_rast.h +++ b/src/gallium/drivers/llvmpipe/lp_rast.h @@ -82,6 +82,8 @@ struct lp_rast_state { * These pointers point into the bin data buffer. */ struct lp_rast_shader_inputs { + float facing; /** Positive for front-facing, negative for back-facing */ + float (*a0)[4]; float (*dadx)[4]; float (*dady)[4]; @@ -95,7 +97,7 @@ struct lp_rast_shader_inputs { * Rasterization information for a triangle known to be in this bin, * plus inputs to run the shader: * These fields are tile- and bin-independent. - * Objects of this type are put into the setup_context::data buffer. + * Objects of this type are put into the lp_setup_context::data buffer. */ struct lp_rast_triangle { #ifdef DEBUG @@ -132,7 +134,7 @@ struct lp_rast_triangle { struct lp_rasterizer * -lp_rast_create( void ); +lp_rast_create( unsigned num_threads ); void lp_rast_destroy( struct lp_rasterizer * ); @@ -215,9 +217,6 @@ void lp_rast_clear_color( struct lp_rasterizer_task *, void lp_rast_clear_zstencil( struct lp_rasterizer_task *, const union lp_rast_cmd_arg ); -void lp_rast_load_color( struct lp_rasterizer_task *, - const union lp_rast_cmd_arg ); - void lp_rast_set_state( struct lp_rasterizer_task *, const union lp_rast_cmd_arg ); @@ -230,4 +229,8 @@ void lp_rast_shade_tile( struct lp_rasterizer_task *, void lp_rast_fence( struct lp_rasterizer_task *, const union lp_rast_cmd_arg ); +void lp_rast_store_color( struct lp_rasterizer_task *, + const union lp_rast_cmd_arg ); + + #endif diff --git a/src/gallium/drivers/llvmpipe/lp_rast_priv.h b/src/gallium/drivers/llvmpipe/lp_rast_priv.h index 39bf2c25879..5884d12721e 100644 --- a/src/gallium/drivers/llvmpipe/lp_rast_priv.h +++ b/src/gallium/drivers/llvmpipe/lp_rast_priv.h @@ -32,34 +32,25 @@ #include "util/u_format.h" #include "gallivm/lp_bld_debug.h" #include "lp_rast.h" +#include "lp_scene.h" +#include "lp_texture.h" #include "lp_tile_soa.h" - - -#define MAX_THREADS 8 /* XXX probably temporary here */ +#include "lp_limits.h" struct lp_rasterizer; /** - * A tile's color and depth memory. - * We can choose whatever layout for the internal tile storage we prefer. - */ -struct lp_rast_tile -{ - uint8_t *color[PIPE_MAX_COLOR_BUFS]; -}; - - -/** * Per-thread rasterization state */ struct lp_rasterizer_task { - struct lp_rast_tile tile; /** Tile color/z/stencil memory */ - unsigned x, y; /**< Pos of this tile in framebuffer, in pixels */ + uint8_t *color_tiles[PIPE_MAX_COLOR_BUFS]; + uint8_t *depth_tile; + const struct lp_rast_state *current_state; /** "back" pointer */ @@ -86,9 +77,8 @@ struct lp_rasterizer */ struct { void *map; - unsigned stride; - unsigned width; - unsigned height; + unsigned tiles_per_row; + unsigned blocksize; enum pipe_format format; } cbuf[PIPE_MAX_COLOR_BUFS]; @@ -100,8 +90,6 @@ struct lp_rasterizer struct { unsigned nr_cbufs; - boolean write_color; - boolean write_zstencil; unsigned clear_color; unsigned clear_depth; char clear_stencil; @@ -117,16 +105,16 @@ struct lp_rasterizer * (potentially) shared, these empty scenes should be returned to * the context which created them rather than retained here. */ - struct lp_scene_queue *empty_scenes; + /* struct lp_scene_queue *empty_scenes; */ /** The scene currently being rasterized by the threads */ struct lp_scene *curr_scene; /** A task object for each rasterization thread */ - struct lp_rasterizer_task tasks[MAX_THREADS]; + struct lp_rasterizer_task tasks[LP_MAX_THREADS]; unsigned num_threads; - pipe_thread threads[MAX_THREADS]; + pipe_thread threads[LP_MAX_THREADS]; /** For synchronizing the rasterization threads */ pipe_barrier barrier; @@ -140,18 +128,23 @@ void lp_rast_shade_quads( struct lp_rasterizer_task *task, /** - * Get the pointer to the depth buffer for a block. + * Get the pointer to a 4x4 depth/stencil block. + * We'll map the z/stencil buffer on demand here. + * Note that this may be called even when there's no z/stencil buffer - return + * NULL in that case. * \param x, y location of 4x4 block in window coords */ static INLINE void * -lp_rast_depth_pointer( struct lp_rasterizer *rast, - unsigned x, unsigned y ) +lp_rast_get_depth_block_pointer(const struct lp_rasterizer *rast, + unsigned x, unsigned y) { - void * depth; + void *depth; assert((x % TILE_VECTOR_WIDTH) == 0); assert((y % TILE_VECTOR_HEIGHT) == 0); + assert(rast->zsbuf.map || !rast->curr_scene->fb.zsbuf); + if (!rast->zsbuf.map) return NULL; @@ -164,6 +157,37 @@ lp_rast_depth_pointer( struct lp_rasterizer *rast, } +/** + * Get the pointer to a 4x4 color block (within a 64x64 tile). + * We'll map the color buffer on demand here. + * Note that this may be called even when there's no color buffers - return + * NULL in that case. + * \param x, y location of 4x4 block in window coords + */ +static INLINE uint8_t * +lp_rast_get_color_block_pointer(struct lp_rasterizer_task *task, + unsigned buf, unsigned x, unsigned y) +{ + unsigned px, py, pixel_offset; + uint8_t *color; + + assert((x % TILE_VECTOR_WIDTH) == 0); + assert((y % TILE_VECTOR_HEIGHT) == 0); + + color = task->color_tiles[buf]; + assert(color); + + px = x % TILE_SIZE; + py = y % TILE_SIZE; + pixel_offset = tile_pixel_offset(px, py, 0); + + color = color + pixel_offset; + + assert(lp_check_alignment(color, 16)); + return color; +} + + /** * Shade all pixels in a 4x4 block. The fragment code omits the @@ -177,31 +201,27 @@ lp_rast_shade_quads_all( struct lp_rasterizer_task *task, { struct lp_rasterizer *rast = task->rast; const struct lp_rast_state *state = task->current_state; - struct lp_rast_tile *tile = &task->tile; - const unsigned ix = x % TILE_SIZE, iy = y % TILE_SIZE; uint8_t *color[PIPE_MAX_COLOR_BUFS]; void *depth; - unsigned block_offset, i; - - /* offset of the containing 16x16 pixel block within the tile */ - block_offset = (iy / 4) * (16 * 16) + (ix / 4) * 16; + unsigned i; /* color buffer */ for (i = 0; i < rast->state.nr_cbufs; i++) - color[i] = tile->color[i] + 4 * block_offset; - - depth = lp_rast_depth_pointer(rast, x, y); - - /* run shader */ - state->jit_function[0]( &state->jit_context, - x, y, - inputs->a0, - inputs->dadx, - inputs->dady, - color, - depth, - INT_MIN, INT_MIN, INT_MIN, - NULL, NULL, NULL ); + color[i] = lp_rast_get_color_block_pointer(task, i, x, y); + + depth = lp_rast_get_depth_block_pointer(rast, x, y); + + /* run shader on 4x4 block */ + state->jit_function[RAST_WHOLE]( &state->jit_context, + x, y, + inputs->facing, + inputs->a0, + inputs->dadx, + inputs->dady, + color, + depth, + INT_MIN, INT_MIN, INT_MIN, + NULL, NULL, NULL ); } diff --git a/src/gallium/drivers/llvmpipe/lp_scene.c b/src/gallium/drivers/llvmpipe/lp_scene.c index 72492c0f0ca..1482a777ff8 100644 --- a/src/gallium/drivers/llvmpipe/lp_scene.c +++ b/src/gallium/drivers/llvmpipe/lp_scene.c @@ -32,9 +32,20 @@ #include "util/u_surface.h" #include "lp_scene.h" #include "lp_scene_queue.h" -#include "lp_debug.h" +/** List of texture references */ +struct texture_ref { + struct pipe_resource *texture; + struct texture_ref *prev, *next; /**< linked list w/ u_simple_list.h */ +}; + + + +/** + * Create a new scene object. + * \param queue the queue to put newly rendered/emptied scenes into + */ struct lp_scene * lp_scene_create( struct pipe_context *pipe, struct lp_scene_queue *queue ) @@ -57,7 +68,7 @@ lp_scene_create( struct pipe_context *pipe, scene->data.head = scene->data.tail = CALLOC_STRUCT(data_block); - make_empty_list(&scene->textures); + make_empty_list(&scene->resources); pipe_mutex_init(scene->mutex); @@ -66,7 +77,7 @@ lp_scene_create( struct pipe_context *pipe, /** - * Free all data associated with the given scene, and free(scene). + * Free all data associated with the given scene, and the scene itself. */ void lp_scene_destroy(struct lp_scene *scene) @@ -178,14 +189,19 @@ lp_scene_reset(struct lp_scene *scene ) /* Release texture refs */ { - struct texture_ref *ref, *next, *ref_list = &scene->textures; + struct resource_ref *ref, *next, *ref_list = &scene->resources; for (ref = ref_list->next; ref != ref_list; ref = next) { next = next_elem(ref); - pipe_texture_reference(&ref->texture, NULL); + pipe_resource_reference(&ref->resource, NULL); FREE(ref); } make_empty_list(ref_list); } + + scene->scene_size = 0; + + scene->has_color_clear = FALSE; + scene->has_depth_clear = FALSE; } @@ -215,7 +231,10 @@ lp_bin_new_data_block( struct data_block_list *list ) } -/** Return number of bytes used for all bin data within a scene */ +/** + * Return number of bytes used for all bin data within a scene. + * This does not include resources (textures) referenced by the scene. + */ unsigned lp_scene_data_size( const struct lp_scene *scene ) { @@ -244,32 +263,34 @@ lp_scene_bin_size( const struct lp_scene *scene, unsigned x, unsigned y ) /** - * Add a reference to a texture by the scene. + * Add a reference to a resource by the scene. */ void -lp_scene_texture_reference( struct lp_scene *scene, - struct pipe_texture *texture ) +lp_scene_add_resource_reference(struct lp_scene *scene, + struct pipe_resource *resource) { - struct texture_ref *ref = CALLOC_STRUCT(texture_ref); + struct resource_ref *ref = CALLOC_STRUCT(resource_ref); if (ref) { - struct texture_ref *ref_list = &scene->textures; - pipe_texture_reference(&ref->texture, texture); + struct resource_ref *ref_list = &scene->resources; + pipe_resource_reference(&ref->resource, resource); insert_at_tail(ref_list, ref); } + + scene->scene_size += llvmpipe_resource_size(resource); } /** - * Does this scene have a reference to the given texture? + * Does this scene have a reference to the given resource? */ boolean -lp_scene_is_texture_referenced( const struct lp_scene *scene, - const struct pipe_texture *texture ) +lp_scene_is_resource_referenced(const struct lp_scene *scene, + const struct pipe_resource *resource) { - const struct texture_ref *ref_list = &scene->textures; - const struct texture_ref *ref; + const struct resource_ref *ref_list = &scene->resources; + const struct resource_ref *ref; foreach (ref, ref_list) { - if (ref->texture == texture) + if (ref->resource == resource) return TRUE; } return FALSE; @@ -390,112 +411,6 @@ end: } -/** - * Prepare this scene for the rasterizer. - * Map the framebuffer surfaces. Initialize the 'rast' state. - */ -static boolean -lp_scene_map_buffers( struct lp_scene *scene ) -{ - struct pipe_screen *screen = scene->pipe->screen; - struct pipe_surface *cbuf, *zsbuf; - int i; - - LP_DBG(DEBUG_RAST, "%s\n", __FUNCTION__); - - - /* Map all color buffers - */ - for (i = 0; i < scene->fb.nr_cbufs; i++) { - cbuf = scene->fb.cbufs[i]; - if (cbuf) { - scene->cbuf_transfer[i] = screen->get_tex_transfer(screen, - cbuf->texture, - cbuf->face, - cbuf->level, - cbuf->zslice, - PIPE_TRANSFER_READ_WRITE, - 0, 0, - cbuf->width, - cbuf->height); - if (!scene->cbuf_transfer[i]) - goto fail; - - scene->cbuf_map[i] = screen->transfer_map(screen, - scene->cbuf_transfer[i]); - if (!scene->cbuf_map[i]) - goto fail; - } - } - - /* Map the zsbuffer - */ - zsbuf = scene->fb.zsbuf; - if (zsbuf) { - scene->zsbuf_transfer = screen->get_tex_transfer(screen, - zsbuf->texture, - zsbuf->face, - zsbuf->level, - zsbuf->zslice, - PIPE_TRANSFER_READ_WRITE, - 0, 0, - zsbuf->width, - zsbuf->height); - if (!scene->zsbuf_transfer) - goto fail; - - scene->zsbuf_map = screen->transfer_map(screen, - scene->zsbuf_transfer); - if (!scene->zsbuf_map) - goto fail; - } - - return TRUE; - -fail: - /* Unmap and release transfers? - */ - return FALSE; -} - - - -/** - * Called after rasterizer as finished rasterizing a scene. - * - * We want to call this from the pipe_context's current thread to - * avoid having to have mutexes on the transfer functions. - */ -static void -lp_scene_unmap_buffers( struct lp_scene *scene ) -{ - struct pipe_screen *screen = scene->pipe->screen; - unsigned i; - - for (i = 0; i < scene->fb.nr_cbufs; i++) { - if (scene->cbuf_map[i]) - screen->transfer_unmap(screen, scene->cbuf_transfer[i]); - - if (scene->cbuf_transfer[i]) - screen->tex_transfer_destroy(scene->cbuf_transfer[i]); - - scene->cbuf_transfer[i] = NULL; - scene->cbuf_map[i] = NULL; - } - - if (scene->zsbuf_map) - screen->transfer_unmap(screen, scene->zsbuf_transfer); - - if (scene->zsbuf_transfer) - screen->tex_transfer_destroy(scene->zsbuf_transfer); - - scene->zsbuf_transfer = NULL; - scene->zsbuf_map = NULL; - - util_unreference_framebuffer_state( &scene->fb ); -} - - void lp_scene_begin_binning( struct lp_scene *scene, struct pipe_framebuffer_state *fb ) { @@ -505,12 +420,14 @@ void lp_scene_begin_binning( struct lp_scene *scene, scene->tiles_x = align(fb->width, TILE_SIZE) / TILE_SIZE; scene->tiles_y = align(fb->height, TILE_SIZE) / TILE_SIZE; + + assert(scene->tiles_x <= TILES_X); + assert(scene->tiles_y <= TILES_Y); } void lp_scene_rasterize( struct lp_scene *scene, - struct lp_rasterizer *rast, - boolean write_depth ) + struct lp_rasterizer *rast ) { if (0) { unsigned x, y; @@ -524,12 +441,6 @@ void lp_scene_rasterize( struct lp_scene *scene, } } - - scene->write_depth = (scene->fb.zsbuf != NULL && - write_depth); - - lp_scene_map_buffers( scene ); - /* Enqueue the scene for rasterization, then immediately wait for * it to finish. */ @@ -540,6 +451,9 @@ void lp_scene_rasterize( struct lp_scene *scene, * transfers become per-context: */ lp_rast_finish( rast ); - lp_scene_unmap_buffers( scene ); + + util_unreference_framebuffer_state( &scene->fb ); + + /* put scene into the empty list */ lp_scene_enqueue( scene->empty_queue, scene ); } diff --git a/src/gallium/drivers/llvmpipe/lp_scene.h b/src/gallium/drivers/llvmpipe/lp_scene.h index 739ac229089..9467cd6f16d 100644 --- a/src/gallium/drivers/llvmpipe/lp_scene.h +++ b/src/gallium/drivers/llvmpipe/lp_scene.h @@ -44,10 +44,8 @@ struct lp_scene_queue; /* We're limited to 2K by 2K for 32bit fixed point rasterization. * Will need a 64-bit version for larger framebuffers. */ -#define MAXHEIGHT 2048 -#define MAXWIDTH 2048 -#define TILES_X (MAXWIDTH / TILE_SIZE) -#define TILES_Y (MAXHEIGHT / TILE_SIZE) +#define TILES_X (LP_MAX_WIDTH / TILE_SIZE) +#define TILES_Y (LP_MAX_HEIGHT / TILE_SIZE) #define CMD_BLOCK_MAX 128 @@ -97,10 +95,10 @@ struct data_block_list { }; -/** List of texture references */ -struct texture_ref { - struct pipe_texture *texture; - struct texture_ref *prev, *next; /**< linked list w/ u_simple_list.h */ +/** List of resource references */ +struct resource_ref { + struct pipe_resource *resource; + struct resource_ref *prev, *next; /**< linked list w/ u_simple_list.h */ }; @@ -114,21 +112,20 @@ struct texture_ref { */ struct lp_scene { struct pipe_context *pipe; - struct pipe_transfer *cbuf_transfer[PIPE_MAX_COLOR_BUFS]; - struct pipe_transfer *zsbuf_transfer; - - /* Scene's buffers are mapped at the time the scene is enqueued: - */ - void *cbuf_map[PIPE_MAX_COLOR_BUFS]; - uint8_t *zsbuf_map; /** the framebuffer to render the scene into */ struct pipe_framebuffer_state fb; - /** list of textures referenced by the scene commands */ - struct texture_ref textures; + /** list of resources referenced by the scene commands */ + struct resource_ref resources; + + /** Approx memory used by the scene (in bytes). This includes the + * shared and per-tile bins plus any referenced resources/textures. + */ + unsigned scene_size; - boolean write_depth; + boolean has_color_clear; + boolean has_depth_clear; /** * Number of active tiles in each dimension. @@ -169,11 +166,11 @@ unsigned lp_scene_data_size( const struct lp_scene *scene ); unsigned lp_scene_bin_size( const struct lp_scene *scene, unsigned x, unsigned y ); -void lp_scene_texture_reference( struct lp_scene *scene, - struct pipe_texture *texture ); +void lp_scene_add_resource_reference(struct lp_scene *scene, + struct pipe_resource *resource); -boolean lp_scene_is_texture_referenced( const struct lp_scene *scene, - const struct pipe_texture *texture ); +boolean lp_scene_is_resource_referenced(const struct lp_scene *scene, + const struct pipe_resource *resource ); /** @@ -189,6 +186,8 @@ lp_scene_alloc( struct lp_scene *scene, unsigned size) lp_bin_new_data_block( list ); } + scene->scene_size += size; + { struct data_block *tail = list->tail; ubyte *data = tail->data + tail->used; @@ -211,6 +210,8 @@ lp_scene_alloc_aligned( struct lp_scene *scene, unsigned size, lp_bin_new_data_block( list ); } + scene->scene_size += size; + { struct data_block *tail = list->tail; ubyte *data = tail->data + tail->used; @@ -227,6 +228,7 @@ static INLINE void lp_scene_putback_data( struct lp_scene *scene, unsigned size) { struct data_block_list *list = &scene->data; + scene->scene_size -= size; assert(list->tail->used >= size); list->tail->used -= size; } @@ -306,13 +308,21 @@ lp_scene_bin_iter_begin( struct lp_scene *scene ); struct cmd_bin * lp_scene_bin_iter_next( struct lp_scene *scene, int *bin_x, int *bin_y ); + void lp_scene_rasterize( struct lp_scene *scene, - struct lp_rasterizer *rast, - boolean write_depth ); + struct lp_rasterizer *rast ); void lp_scene_begin_binning( struct lp_scene *scene, struct pipe_framebuffer_state *fb ); + +static INLINE unsigned +lp_scene_get_size(const struct lp_scene *scene) +{ + return scene->scene_size; +} + + #endif /* LP_BIN_H */ diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c b/src/gallium/drivers/llvmpipe/lp_screen.c index f84ede675b3..00a897c86f8 100644 --- a/src/gallium/drivers/llvmpipe/lp_screen.c +++ b/src/gallium/drivers/llvmpipe/lp_screen.c @@ -27,18 +27,23 @@ #include "util/u_memory.h" +#include "util/u_math.h" +#include "util/u_cpu_detect.h" #include "util/u_format.h" +#include "util/u_format_s3tc.h" #include "pipe/p_defines.h" #include "pipe/p_screen.h" #include "lp_texture.h" -#include "lp_buffer.h" #include "lp_fence.h" -#include "lp_winsys.h" #include "lp_jit.h" #include "lp_screen.h" #include "lp_context.h" #include "lp_debug.h" +#include "lp_public.h" +#include "lp_limits.h" + +#include "state_tracker/sw_winsys.h" #ifdef DEBUG int LP_DEBUG = 0; @@ -107,11 +112,11 @@ llvmpipe_get_param(struct pipe_screen *screen, int param) case PIPE_CAP_TEXTURE_SHADOW_MAP: return 1; case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: - return 13; /* max 4Kx4K */ + return LP_MAX_TEXTURE_2D_LEVELS; case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: - return 9; /* max 256x256x256 */ + return LP_MAX_TEXTURE_3D_LEVELS; case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: - return 13; /* max 4Kx4K */ + return LP_MAX_TEXTURE_2D_LEVELS; case PIPE_CAP_TGSI_CONT_SUPPORTED: return 1; case PIPE_CAP_BLEND_EQUATION_SEPARATE: @@ -163,15 +168,15 @@ static boolean llvmpipe_is_format_supported( struct pipe_screen *_screen, enum pipe_format format, enum pipe_texture_target target, - unsigned tex_usage, + unsigned bind, unsigned geom_flags ) { struct llvmpipe_screen *screen = llvmpipe_screen(_screen); - struct llvmpipe_winsys *winsys = screen->winsys; + struct sw_winsys *winsys = screen->winsys; const struct util_format_description *format_desc; format_desc = util_format_description(format); - if(!format_desc) + if (!format_desc) return FALSE; assert(target == PIPE_TEXTURE_1D || @@ -179,77 +184,46 @@ llvmpipe_is_format_supported( struct pipe_screen *_screen, target == PIPE_TEXTURE_3D || target == PIPE_TEXTURE_CUBE); - switch(format) { - case PIPE_FORMAT_DXT1_RGB: - case PIPE_FORMAT_DXT1_RGBA: - case PIPE_FORMAT_DXT3_RGBA: - case PIPE_FORMAT_DXT5_RGBA: - return FALSE; - default: - break; - } - - if(tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) { - if(format_desc->block.width != 1 || - format_desc->block.height != 1) + if (bind & PIPE_BIND_RENDER_TARGET) { + if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS) return FALSE; - if(format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN) + if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN) return FALSE; - if(format_desc->colorspace != UTIL_FORMAT_COLORSPACE_RGB && - format_desc->colorspace != UTIL_FORMAT_COLORSPACE_SRGB) + if (format_desc->block.width != 1 || + format_desc->block.height != 1) return FALSE; } - if(tex_usage & PIPE_TEXTURE_USAGE_DISPLAY_TARGET) { - if(!winsys->is_displaytarget_format_supported(winsys, format)) - return FALSE; - } - - if(tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) { - if(format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS) - return FALSE; - - /* FIXME: Temporary restriction. See lp_state_fs.c. */ - if(format_desc->block.bits != 32) + if (bind & PIPE_BIND_DISPLAY_TARGET) { + if(!winsys->is_displaytarget_format_supported(winsys, bind, format)) return FALSE; } - /* FIXME: Temporary restrictions. See lp_bld_sample_soa.c */ - if(tex_usage & PIPE_TEXTURE_USAGE_SAMPLER) { - if(format_desc->block.width != 1 || - format_desc->block.height != 1) + if (bind & PIPE_BIND_DEPTH_STENCIL) { + if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN) return FALSE; - if(format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN) + if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS) return FALSE; - if(format_desc->colorspace != UTIL_FORMAT_COLORSPACE_RGB && - format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS) + /* FIXME: Temporary restriction. See lp_state_fs.c. */ + if (format_desc->block.bits != 32) return FALSE; + } - /* not supported yet */ - if (format == PIPE_FORMAT_Z16_UNORM) - return FALSE; + if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) { + return util_format_s3tc_enabled; } + /* + * Everything else should be supported by u_format. + */ return TRUE; } -static struct pipe_buffer * -llvmpipe_surface_buffer_create(struct pipe_screen *screen, - unsigned width, unsigned height, - enum pipe_format format, - unsigned tex_usage, - unsigned usage, - unsigned *stride) -{ - /* This function should never be used */ - assert(0); - return NULL; -} static void @@ -258,8 +232,8 @@ llvmpipe_flush_frontbuffer(struct pipe_screen *_screen, void *context_private) { struct llvmpipe_screen *screen = llvmpipe_screen(_screen); - struct llvmpipe_winsys *winsys = screen->winsys; - struct llvmpipe_texture *texture = llvmpipe_texture(surface->texture); + struct sw_winsys *winsys = screen->winsys; + struct llvmpipe_resource *texture = llvmpipe_resource(surface->texture); assert(texture->dt); if (texture->dt) @@ -271,7 +245,7 @@ static void llvmpipe_destroy_screen( struct pipe_screen *_screen ) { struct llvmpipe_screen *screen = llvmpipe_screen(_screen); - struct llvmpipe_winsys *winsys = screen->winsys; + struct sw_winsys *winsys = screen->winsys; lp_jit_screen_cleanup(screen); @@ -288,7 +262,7 @@ llvmpipe_destroy_screen( struct pipe_screen *_screen ) * Note: we're not presently subclassing pipe_screen (no llvmpipe_screen). */ struct pipe_screen * -llvmpipe_create_screen(struct llvmpipe_winsys *winsys) +llvmpipe_create_screen(struct sw_winsys *winsys) { struct llvmpipe_screen *screen = CALLOC_STRUCT(llvmpipe_screen); @@ -309,15 +283,29 @@ llvmpipe_create_screen(struct llvmpipe_winsys *winsys) screen->base.get_paramf = llvmpipe_get_paramf; screen->base.is_format_supported = llvmpipe_is_format_supported; - screen->base.surface_buffer_create = llvmpipe_surface_buffer_create; screen->base.context_create = llvmpipe_create_context; screen->base.flush_frontbuffer = llvmpipe_flush_frontbuffer; - llvmpipe_init_screen_texture_funcs(&screen->base); - llvmpipe_init_screen_buffer_funcs(&screen->base); + llvmpipe_init_screen_resource_funcs(&screen->base); llvmpipe_init_screen_fence_funcs(&screen->base); lp_jit_screen_init(screen); +#ifdef PIPE_OS_WINDOWS + /* Multithreading not supported on windows until conditions and barriers are + * properly implemented. */ + screen->num_threads = 0; +#else +#ifdef PIPE_OS_EMBEDDED + screen->num_threads = 0; +#else + screen->num_threads = util_cpu_caps.nr_cpus; +#endif + screen->num_threads = debug_get_num_option("LP_NUM_THREADS", screen->num_threads); + screen->num_threads = MIN2(screen->num_threads, LP_MAX_THREADS); +#endif + + util_format_s3tc_init(); + return &screen->base; } diff --git a/src/gallium/drivers/llvmpipe/lp_screen.h b/src/gallium/drivers/llvmpipe/lp_screen.h index 4a1b4d6f3e2..4f394326103 100644 --- a/src/gallium/drivers/llvmpipe/lp_screen.h +++ b/src/gallium/drivers/llvmpipe/lp_screen.h @@ -34,23 +34,21 @@ #ifndef LP_SCREEN_H #define LP_SCREEN_H -#include <llvm-c/Core.h> -#include <llvm-c/Analysis.h> -#include <llvm-c/Target.h> +#include "gallivm/lp_bld.h" #include <llvm-c/ExecutionEngine.h> #include "pipe/p_screen.h" #include "pipe/p_defines.h" -struct llvmpipe_winsys; +struct sw_winsys; struct llvmpipe_screen { struct pipe_screen base; - struct llvmpipe_winsys *winsys; + struct sw_winsys *winsys; LLVMModuleRef module; LLVMExecutionEngineRef engine; @@ -60,6 +58,8 @@ struct llvmpipe_screen LLVMTypeRef context_ptr_type; + unsigned num_threads; + /* Increments whenever textures are modified. Contexts can track * this. */ @@ -76,4 +76,5 @@ llvmpipe_screen( struct pipe_screen *pipe ) } + #endif /* LP_SCREEN_H */ diff --git a/src/gallium/drivers/llvmpipe/lp_setup.c b/src/gallium/drivers/llvmpipe/lp_setup.c index aebed85fbbd..21509560084 100644 --- a/src/gallium/drivers/llvmpipe/lp_setup.c +++ b/src/gallium/drivers/llvmpipe/lp_setup.c @@ -37,26 +37,27 @@ #include "util/u_memory.h" #include "util/u_pack_color.h" #include "util/u_surface.h" +#include "lp_context.h" #include "lp_scene.h" #include "lp_scene_queue.h" -#include "lp_buffer.h" #include "lp_texture.h" #include "lp_debug.h" #include "lp_fence.h" #include "lp_rast.h" #include "lp_setup_context.h" #include "lp_screen.h" -#include "lp_winsys.h" +#include "lp_state.h" +#include "state_tracker/sw_winsys.h" #include "draw/draw_context.h" #include "draw/draw_vbuf.h" -static void set_scene_state( struct setup_context *, unsigned ); +static void set_scene_state( struct lp_setup_context *, enum setup_state ); struct lp_scene * -lp_setup_get_current_scene(struct setup_context *setup) +lp_setup_get_current_scene(struct lp_setup_context *setup) { if (!setup->scene) { @@ -73,8 +74,28 @@ lp_setup_get_current_scene(struct setup_context *setup) } +/** + * Check if the size of the current scene has exceeded the limit. + * If so, flush/render it. + */ +static void +setup_check_scene_size_and_flush(struct lp_setup_context *setup) +{ + if (setup->scene) { + struct lp_scene *scene = lp_setup_get_current_scene(setup); + unsigned size = lp_scene_get_size(scene); + + if (size > LP_MAX_SCENE_SIZE) { + /*printf("LLVMPIPE: scene size = %u, flushing.\n", size);*/ + set_scene_state( setup, SETUP_FLUSHED ); + /*assert(lp_scene_get_size(scene) == 0);*/ + } + } +} + + static void -first_triangle( struct setup_context *setup, +first_triangle( struct lp_setup_context *setup, const float (*v0)[4], const float (*v1)[4], const float (*v2)[4]) @@ -85,7 +106,7 @@ first_triangle( struct setup_context *setup, } static void -first_line( struct setup_context *setup, +first_line( struct lp_setup_context *setup, const float (*v0)[4], const float (*v1)[4]) { @@ -95,7 +116,7 @@ first_line( struct setup_context *setup, } static void -first_point( struct setup_context *setup, +first_point( struct lp_setup_context *setup, const float (*v0)[4]) { set_scene_state( setup, SETUP_ACTIVE ); @@ -103,7 +124,7 @@ first_point( struct setup_context *setup, setup->point( setup, v0 ); } -static void reset_context( struct setup_context *setup ) +static void reset_context( struct lp_setup_context *setup ) { LP_DBG(DEBUG_SETUP, "%s\n", __FUNCTION__); @@ -131,14 +152,11 @@ static void reset_context( struct setup_context *setup ) /** Rasterize all scene's bins */ static void -lp_setup_rasterize_scene( struct setup_context *setup, - boolean write_depth ) +lp_setup_rasterize_scene( struct lp_setup_context *setup ) { struct lp_scene *scene = lp_setup_get_current_scene(setup); - lp_scene_rasterize(scene, - setup->rast, - write_depth); + lp_scene_rasterize(scene, setup->rast); reset_context( setup ); @@ -148,7 +166,7 @@ lp_setup_rasterize_scene( struct setup_context *setup, static void -begin_binning( struct setup_context *setup ) +begin_binning( struct lp_setup_context *setup ) { struct lp_scene *scene = lp_setup_get_current_scene(setup); @@ -157,21 +175,21 @@ begin_binning( struct setup_context *setup ) (setup->clear.flags & PIPE_CLEAR_DEPTHSTENCIL) ? "clear": "load"); if (setup->fb.nr_cbufs) { - if (setup->clear.flags & PIPE_CLEAR_COLOR) + if (setup->clear.flags & PIPE_CLEAR_COLOR) { lp_scene_bin_everywhere( scene, lp_rast_clear_color, setup->clear.color ); - else - lp_scene_bin_everywhere( scene, - lp_rast_load_color, - lp_rast_arg_null() ); + scene->has_color_clear = TRUE; + } } if (setup->fb.zsbuf) { - if (setup->clear.flags & PIPE_CLEAR_DEPTHSTENCIL) + if (setup->clear.flags & PIPE_CLEAR_DEPTHSTENCIL) { lp_scene_bin_everywhere( scene, lp_rast_clear_zstencil, setup->clear.zstencil ); + scene->has_depth_clear = TRUE; + } } LP_DBG(DEBUG_SETUP, "%s done\n", __FUNCTION__); @@ -184,18 +202,18 @@ begin_binning( struct setup_context *setup ) * TODO: fast path for fullscreen clears and no triangles. */ static void -execute_clears( struct setup_context *setup ) +execute_clears( struct lp_setup_context *setup ) { LP_DBG(DEBUG_SETUP, "%s\n", __FUNCTION__); begin_binning( setup ); - lp_setup_rasterize_scene( setup, TRUE ); + lp_setup_rasterize_scene( setup ); } static void -set_scene_state( struct setup_context *setup, - unsigned new_state ) +set_scene_state( struct lp_setup_context *setup, + enum setup_state new_state ) { unsigned old_state = setup->state; @@ -220,26 +238,47 @@ set_scene_state( struct setup_context *setup, if (old_state == SETUP_CLEARED) execute_clears( setup ); else - lp_setup_rasterize_scene( setup, TRUE ); + lp_setup_rasterize_scene( setup ); break; + + default: + assert(0 && "invalid setup state mode"); } setup->state = new_state; } +/** + * \param flags bitmask of PIPE_FLUSH_x flags + */ void -lp_setup_flush( struct setup_context *setup, +lp_setup_flush( struct lp_setup_context *setup, unsigned flags ) { LP_DBG(DEBUG_SETUP, "%s\n", __FUNCTION__); + if (setup->scene) { + struct lp_scene *scene = lp_setup_get_current_scene(setup); + union lp_rast_cmd_arg dummy = {0}; + + if (flags & (PIPE_FLUSH_SWAPBUFFERS | + PIPE_FLUSH_FRAME)) { + /* Store colors in the linear color buffer(s). + * If we don't do this here, we'll end up converting the tiled + * data to linear in the texture_unmap() function, which will + * not be a parallel/threaded operation as here. + */ + lp_scene_bin_everywhere(scene, lp_rast_store_color, dummy); + } + } + set_scene_state( setup, SETUP_FLUSHED ); } void -lp_setup_bind_framebuffer( struct setup_context *setup, +lp_setup_bind_framebuffer( struct lp_setup_context *setup, const struct pipe_framebuffer_state *fb ) { LP_DBG(DEBUG_SETUP, "%s\n", __FUNCTION__); @@ -256,7 +295,7 @@ lp_setup_bind_framebuffer( struct setup_context *setup, void -lp_setup_clear( struct setup_context *setup, +lp_setup_clear( struct lp_setup_context *setup, const float *color, double depth, unsigned stencil, @@ -287,15 +326,20 @@ lp_setup_clear( struct setup_context *setup, * binned scene and start again, but I don't see that as being * a common usage. */ - if (flags & PIPE_CLEAR_COLOR) + if (flags & PIPE_CLEAR_COLOR) { lp_scene_bin_everywhere( scene, lp_rast_clear_color, setup->clear.color ); + scene->has_color_clear = TRUE; + } - if (setup->clear.flags & PIPE_CLEAR_DEPTHSTENCIL) + if (setup->clear.flags & PIPE_CLEAR_DEPTHSTENCIL) { lp_scene_bin_everywhere( scene, lp_rast_clear_zstencil, setup->clear.zstencil ); + scene->has_depth_clear = TRUE; + } + } else { /* Put ourselves into the 'pre-clear' state, specifically to try @@ -314,30 +358,36 @@ lp_setup_clear( struct setup_context *setup, * Emit a fence. */ struct pipe_fence_handle * -lp_setup_fence( struct setup_context *setup ) +lp_setup_fence( struct lp_setup_context *setup ) { - struct lp_scene *scene = lp_setup_get_current_scene(setup); - const unsigned rank = lp_scene_get_num_bins( scene ); /* xxx */ - struct lp_fence *fence = lp_fence_create(rank); + if (setup->num_threads == 0) { + return NULL; + } + else { + struct lp_scene *scene = lp_setup_get_current_scene(setup); + const unsigned rank = lp_scene_get_num_bins( scene ); /* xxx */ + struct lp_fence *fence = lp_fence_create(rank); - LP_DBG(DEBUG_SETUP, "%s rank %u\n", __FUNCTION__, rank); + LP_DBG(DEBUG_SETUP, "%s rank %u\n", __FUNCTION__, rank); - set_scene_state( setup, SETUP_ACTIVE ); + set_scene_state( setup, SETUP_ACTIVE ); - /* insert the fence into all command bins */ - lp_scene_bin_everywhere( scene, - lp_rast_fence, - lp_rast_arg_fence(fence) ); + /* insert the fence into all command bins */ + lp_scene_bin_everywhere( scene, + lp_rast_fence, + lp_rast_arg_fence(fence) ); - return (struct pipe_fence_handle *) fence; + return (struct pipe_fence_handle *) fence; + } } void -lp_setup_set_triangle_state( struct setup_context *setup, +lp_setup_set_triangle_state( struct lp_setup_context *setup, unsigned cull_mode, boolean ccw_is_frontface, - boolean scissor ) + boolean scissor, + boolean gl_rasterization_rules) { LP_DBG(DEBUG_SETUP, "%s\n", __FUNCTION__); @@ -345,12 +395,13 @@ lp_setup_set_triangle_state( struct setup_context *setup, setup->cullmode = cull_mode; setup->triangle = first_triangle; setup->scissor_test = scissor; + setup->pixel_offset = gl_rasterization_rules ? 0.5f : 0.0f; } void -lp_setup_set_fs_inputs( struct setup_context *setup, +lp_setup_set_fs_inputs( struct lp_setup_context *setup, const struct lp_shader_input *input, unsigned nr ) { @@ -361,7 +412,7 @@ lp_setup_set_fs_inputs( struct setup_context *setup, } void -lp_setup_set_fs_functions( struct setup_context *setup, +lp_setup_set_fs_functions( struct lp_setup_context *setup, lp_jit_frag_func jit_function0, lp_jit_frag_func jit_function1, boolean opaque ) @@ -376,19 +427,19 @@ lp_setup_set_fs_functions( struct setup_context *setup, } void -lp_setup_set_fs_constants(struct setup_context *setup, - struct pipe_buffer *buffer) +lp_setup_set_fs_constants(struct lp_setup_context *setup, + struct pipe_resource *buffer) { LP_DBG(DEBUG_SETUP, "%s %p\n", __FUNCTION__, (void *) buffer); - pipe_buffer_reference(&setup->constants.current, buffer); + pipe_resource_reference(&setup->constants.current, buffer); setup->dirty |= LP_SETUP_NEW_CONSTANTS; } void -lp_setup_set_alpha_ref_value( struct setup_context *setup, +lp_setup_set_alpha_ref_value( struct lp_setup_context *setup, float alpha_ref_value ) { LP_DBG(DEBUG_SETUP, "%s %f\n", __FUNCTION__, alpha_ref_value); @@ -400,7 +451,21 @@ lp_setup_set_alpha_ref_value( struct setup_context *setup, } void -lp_setup_set_blend_color( struct setup_context *setup, +lp_setup_set_stencil_ref_values( struct lp_setup_context *setup, + const ubyte refs[2] ) +{ + LP_DBG(DEBUG_SETUP, "%s %d %d\n", __FUNCTION__, refs[0], refs[1]); + + if (setup->fs.current.jit_context.stencil_ref_front != refs[0] || + setup->fs.current.jit_context.stencil_ref_back != refs[1]) { + setup->fs.current.jit_context.stencil_ref_front = refs[0]; + setup->fs.current.jit_context.stencil_ref_back = refs[1]; + setup->dirty |= LP_SETUP_NEW_FS; + } +} + +void +lp_setup_set_blend_color( struct lp_setup_context *setup, const struct pipe_blend_color *blend_color ) { LP_DBG(DEBUG_SETUP, "%s\n", __FUNCTION__); @@ -415,7 +480,7 @@ lp_setup_set_blend_color( struct setup_context *setup, void -lp_setup_set_scissor( struct setup_context *setup, +lp_setup_set_scissor( struct lp_setup_context *setup, const struct pipe_scissor_state *scissor ) { LP_DBG(DEBUG_SETUP, "%s\n", __FUNCTION__); @@ -430,7 +495,7 @@ lp_setup_set_scissor( struct setup_context *setup, void -lp_setup_set_flatshade_first( struct setup_context *setup, +lp_setup_set_flatshade_first( struct lp_setup_context *setup, boolean flatshade_first ) { setup->flatshade_first = flatshade_first; @@ -438,7 +503,7 @@ lp_setup_set_flatshade_first( struct setup_context *setup, void -lp_setup_set_vertex_info( struct setup_context *setup, +lp_setup_set_vertex_info( struct lp_setup_context *setup, struct vertex_info *vertex_info ) { /* XXX: just silently holding onto the pointer: @@ -448,11 +513,12 @@ lp_setup_set_vertex_info( struct setup_context *setup, /** - * Called during state validation when LP_NEW_TEXTURE is set. + * Called during state validation when LP_NEW_SAMPLER_VIEW is set. */ void -lp_setup_set_sampler_textures( struct setup_context *setup, - unsigned num, struct pipe_texture **texture) +lp_setup_set_fragment_sampler_views(struct lp_setup_context *setup, + unsigned num, + struct pipe_sampler_view **views) { unsigned i; @@ -461,34 +527,47 @@ lp_setup_set_sampler_textures( struct setup_context *setup, assert(num <= PIPE_MAX_SAMPLERS); for (i = 0; i < PIPE_MAX_SAMPLERS; i++) { - struct pipe_texture *tex = i < num ? texture[i] : NULL; + struct pipe_sampler_view *view = i < num ? views[i] : NULL; - if(tex) { - struct llvmpipe_texture *lp_tex = llvmpipe_texture(tex); + if(view) { + struct pipe_resource *tex = view->texture; + struct llvmpipe_resource *lp_tex = llvmpipe_resource(tex); struct lp_jit_texture *jit_tex; jit_tex = &setup->fs.current.jit_context.textures[i]; jit_tex->width = tex->width0; jit_tex->height = tex->height0; - jit_tex->stride = lp_tex->stride[0]; - if(!lp_tex->dt) { - jit_tex->data = lp_tex->data; + jit_tex->depth = tex->depth0; + jit_tex->last_level = tex->last_level; + + /* We're referencing the texture's internal data, so save a + * reference to it. + */ + pipe_resource_reference(&setup->fs.current_tex[i], tex); + + if (!lp_tex->dt) { + /* regular texture - setup array of mipmap level pointers */ + int j; + for (j = 0; j <= tex->last_level; j++) { + jit_tex->data[j] = + llvmpipe_get_texture_image_all(lp_tex, j, LP_TEX_USAGE_READ, + LP_TEX_LAYOUT_LINEAR); + jit_tex->row_stride[j] = lp_tex->row_stride[j]; + jit_tex->img_stride[j] = lp_tex->img_stride[j]; + } } else { + /* display target texture/surface */ /* * XXX: Where should this be unmapped? */ struct llvmpipe_screen *screen = llvmpipe_screen(tex->screen); - struct llvmpipe_winsys *winsys = screen->winsys; - jit_tex->data = winsys->displaytarget_map(winsys, lp_tex->dt, - PIPE_BUFFER_USAGE_CPU_READ); - assert(jit_tex->data); - } - - /* the scene references this texture */ - { - struct lp_scene *scene = lp_setup_get_current_scene(setup); - lp_scene_texture_reference(scene, tex); + struct sw_winsys *winsys = screen->winsys; + jit_tex->data[0] = winsys->displaytarget_map(winsys, lp_tex->dt, + PIPE_TRANSFER_READ); + jit_tex->row_stride[0] = lp_tex->row_stride[0]; + jit_tex->img_stride[0] = lp_tex->img_stride[0]; + assert(jit_tex->data[0]); } } } @@ -503,8 +582,8 @@ lp_setup_set_sampler_textures( struct setup_context *setup, * being rendered and the current scene being built. */ unsigned -lp_setup_is_texture_referenced( const struct setup_context *setup, - const struct pipe_texture *texture ) +lp_setup_is_resource_referenced( const struct lp_setup_context *setup, + const struct pipe_resource *texture ) { unsigned i; @@ -519,7 +598,7 @@ lp_setup_is_texture_referenced( const struct setup_context *setup, /* check textures referenced by the scene */ for (i = 0; i < Elements(setup->scenes); i++) { - if (lp_scene_is_texture_referenced(setup->scenes[i], texture)) { + if (lp_scene_is_resource_referenced(setup->scenes[i], texture)) { return PIPE_REFERENCED_FOR_READ; } } @@ -532,14 +611,32 @@ lp_setup_is_texture_referenced( const struct setup_context *setup, * Called by vbuf code when we're about to draw something. */ void -lp_setup_update_state( struct setup_context *setup ) +lp_setup_update_state( struct lp_setup_context *setup ) { - struct lp_scene *scene = lp_setup_get_current_scene(setup); + struct lp_scene *scene; LP_DBG(DEBUG_SETUP, "%s\n", __FUNCTION__); + setup_check_scene_size_and_flush(setup); + + scene = lp_setup_get_current_scene(setup); + assert(setup->fs.current.jit_function); + /* Some of the 'draw' pipeline stages may have changed some driver state. + * Make sure we've processed those state changes before anything else. + * + * XXX this is the only place where llvmpipe_context is used in the + * setup code. This may get refactored/changed... + */ + { + struct llvmpipe_context *lp = llvmpipe_context(scene->pipe); + if (lp->dirty) { + llvmpipe_update_derived(lp); + } + assert(lp->dirty == 0); + } + if(setup->dirty & LP_SETUP_NEW_BLEND_COLOR) { uint8_t *stored; unsigned i, j; @@ -580,11 +677,11 @@ lp_setup_update_state( struct setup_context *setup ) } if(setup->dirty & LP_SETUP_NEW_CONSTANTS) { - struct pipe_buffer *buffer = setup->constants.current; + struct pipe_resource *buffer = setup->constants.current; if(buffer) { - unsigned current_size = buffer->size; - const void *current_data = llvmpipe_buffer(buffer)->data; + unsigned current_size = buffer->width0; + const void *current_data = llvmpipe_resource_data(buffer); /* TODO: copy only the actually used constants? */ @@ -624,6 +721,7 @@ lp_setup_update_state( struct setup_context *setup ) * the new, current state. So allocate a new lp_rast_state object * and append it to the bin's setup data buffer. */ + uint i; struct lp_rast_state *stored = (struct lp_rast_state *) lp_scene_alloc(scene, sizeof *stored); if(stored) { @@ -637,6 +735,14 @@ lp_setup_update_state( struct setup_context *setup ) lp_rast_set_state, lp_rast_arg_state(setup->fs.stored) ); } + + /* The scene now references the textures in the rasterization + * state record. Note that now. + */ + for (i = 0; i < Elements(setup->fs.current_tex); i++) { + if (setup->fs.current_tex[i]) + lp_scene_add_resource_reference(scene, setup->fs.current_tex[i]); + } } } @@ -650,11 +756,19 @@ lp_setup_update_state( struct setup_context *setup ) /* Only caller is lp_setup_vbuf_destroy() */ void -lp_setup_destroy( struct setup_context *setup ) +lp_setup_destroy( struct lp_setup_context *setup ) { + uint i; + reset_context( setup ); - pipe_buffer_reference(&setup->constants.current, NULL); + util_unreference_framebuffer_state(&setup->fb); + + for (i = 0; i < Elements(setup->fs.current_tex); i++) { + pipe_resource_reference(&setup->fs.current_tex[i], NULL); + } + + pipe_resource_reference(&setup->constants.current, NULL); /* free the scenes in the 'empty' queue */ while (1) { @@ -664,6 +778,8 @@ lp_setup_destroy( struct setup_context *setup ) lp_scene_destroy(scene); } + lp_scene_queue_destroy(setup->empty_scenes); + lp_rast_destroy( setup->rast ); FREE( setup ); @@ -675,12 +791,13 @@ lp_setup_destroy( struct setup_context *setup ) * the draw module. Currently also creates a rasterizer to use with * it. */ -struct setup_context * +struct lp_setup_context * lp_setup_create( struct pipe_context *pipe, struct draw_context *draw ) { + struct llvmpipe_screen *screen = llvmpipe_screen(pipe->screen); + struct lp_setup_context *setup = CALLOC_STRUCT(lp_setup_context); unsigned i; - struct setup_context *setup = CALLOC_STRUCT(setup_context); if (!setup) return NULL; @@ -693,7 +810,8 @@ lp_setup_create( struct pipe_context *pipe, /* XXX: move this to the screen and share between contexts: */ - setup->rast = lp_rast_create(); + setup->num_threads = screen->num_threads; + setup->rast = lp_rast_create(screen->num_threads); if (!setup->rast) goto fail; diff --git a/src/gallium/drivers/llvmpipe/lp_setup.h b/src/gallium/drivers/llvmpipe/lp_setup.h index 17c112b5289..e10d37d8d04 100644 --- a/src/gallium/drivers/llvmpipe/lp_setup.h +++ b/src/gallium/drivers/llvmpipe/lp_setup.h @@ -52,87 +52,92 @@ struct lp_shader_input { unsigned src_index; /* where to find values in incoming vertices */ }; -struct pipe_texture; +struct pipe_resource; struct pipe_surface; -struct pipe_buffer; struct pipe_blend_color; struct pipe_screen; struct pipe_framebuffer_state; struct lp_fragment_shader; struct lp_jit_context; -struct setup_context * +struct lp_setup_context * lp_setup_create( struct pipe_context *pipe, struct draw_context *draw ); void -lp_setup_clear(struct setup_context *setup, +lp_setup_clear(struct lp_setup_context *setup, const float *clear_color, double clear_depth, unsigned clear_stencil, unsigned flags); struct pipe_fence_handle * -lp_setup_fence( struct setup_context *setup ); +lp_setup_fence( struct lp_setup_context *setup ); void -lp_setup_flush( struct setup_context *setup, +lp_setup_flush( struct lp_setup_context *setup, unsigned flags ); void -lp_setup_bind_framebuffer( struct setup_context *setup, +lp_setup_bind_framebuffer( struct lp_setup_context *setup, const struct pipe_framebuffer_state *fb ); void -lp_setup_set_triangle_state( struct setup_context *setup, +lp_setup_set_triangle_state( struct lp_setup_context *setup, unsigned cullmode, boolean front_is_ccw, - boolean scissor ); + boolean scissor, + boolean gl_rasterization_rules ); void -lp_setup_set_fs_inputs( struct setup_context *setup, +lp_setup_set_fs_inputs( struct lp_setup_context *setup, const struct lp_shader_input *interp, unsigned nr ); void -lp_setup_set_fs_functions( struct setup_context *setup, +lp_setup_set_fs_functions( struct lp_setup_context *setup, lp_jit_frag_func jit_function0, lp_jit_frag_func jit_function1, boolean opaque ); void -lp_setup_set_fs_constants(struct setup_context *setup, - struct pipe_buffer *buffer); +lp_setup_set_fs_constants(struct lp_setup_context *setup, + struct pipe_resource *buffer); void -lp_setup_set_alpha_ref_value( struct setup_context *setup, +lp_setup_set_alpha_ref_value( struct lp_setup_context *setup, float alpha_ref_value ); void -lp_setup_set_blend_color( struct setup_context *setup, +lp_setup_set_stencil_ref_values( struct lp_setup_context *setup, + const ubyte refs[2] ); + +void +lp_setup_set_blend_color( struct lp_setup_context *setup, const struct pipe_blend_color *blend_color ); void -lp_setup_set_scissor( struct setup_context *setup, +lp_setup_set_scissor( struct lp_setup_context *setup, const struct pipe_scissor_state *scissor ); void -lp_setup_set_sampler_textures( struct setup_context *setup, - unsigned num, struct pipe_texture **texture); +lp_setup_set_fragment_sampler_views(struct lp_setup_context *setup, + unsigned num, + struct pipe_sampler_view **views); unsigned -lp_setup_is_texture_referenced( const struct setup_context *setup, - const struct pipe_texture *texture ); +lp_setup_is_resource_referenced( const struct lp_setup_context *setup, + const struct pipe_resource *texture ); void -lp_setup_set_flatshade_first( struct setup_context *setup, +lp_setup_set_flatshade_first( struct lp_setup_context *setup, boolean flatshade_first ); void -lp_setup_set_vertex_info( struct setup_context *setup, +lp_setup_set_vertex_info( struct lp_setup_context *setup, struct vertex_info *info ); diff --git a/src/gallium/drivers/llvmpipe/lp_setup_context.h b/src/gallium/drivers/llvmpipe/lp_setup_context.h index a5fc34e54a2..584764ce8ac 100644 --- a/src/gallium/drivers/llvmpipe/lp_setup_context.h +++ b/src/gallium/drivers/llvmpipe/lp_setup_context.h @@ -65,7 +65,7 @@ struct lp_scene_queue; * Subclass of vbuf_render, plugged directly into the draw module as * the rendering backend. */ -struct setup_context +struct lp_setup_context { struct vbuf_render base; @@ -80,6 +80,7 @@ struct setup_context * create/install this itself now. */ struct draw_stage *vbuf; + unsigned num_threads; struct lp_rasterizer *rast; struct lp_scene *scenes[MAX_SCENES]; /**< all the scenes */ struct lp_scene *scene; /**< current scene being built */ @@ -89,6 +90,7 @@ struct setup_context boolean ccw_is_frontface; boolean scissor_test; unsigned cullmode; + float pixel_offset; struct pipe_framebuffer_state fb; @@ -98,7 +100,7 @@ struct setup_context union lp_rast_cmd_arg zstencil; /**< lp_rast_clear_zstencil() cmd */ } clear; - enum { + enum setup_state { SETUP_FLUSHED, SETUP_CLEARED, SETUP_ACTIVE @@ -110,11 +112,12 @@ struct setup_context const struct lp_rast_state *stored; /**< what's in the scene */ struct lp_rast_state current; /**< currently set state */ + struct pipe_resource *current_tex[PIPE_MAX_SAMPLERS]; } fs; /** fragment shader constants */ struct { - struct pipe_buffer *current; + struct pipe_resource *current; unsigned stored_size; const void *stored_data; } constants; @@ -131,29 +134,29 @@ struct setup_context unsigned dirty; /**< bitmask of LP_SETUP_NEW_x bits */ - void (*point)( struct setup_context *, + void (*point)( struct lp_setup_context *, const float (*v0)[4]); - void (*line)( struct setup_context *, + void (*line)( struct lp_setup_context *, const float (*v0)[4], const float (*v1)[4]); - void (*triangle)( struct setup_context *, + void (*triangle)( struct lp_setup_context *, const float (*v0)[4], const float (*v1)[4], const float (*v2)[4]); }; -void lp_setup_choose_triangle( struct setup_context *setup ); -void lp_setup_choose_line( struct setup_context *setup ); -void lp_setup_choose_point( struct setup_context *setup ); +void lp_setup_choose_triangle( struct lp_setup_context *setup ); +void lp_setup_choose_line( struct lp_setup_context *setup ); +void lp_setup_choose_point( struct lp_setup_context *setup ); -struct lp_scene *lp_setup_get_current_scene(struct setup_context *setup); +struct lp_scene *lp_setup_get_current_scene(struct lp_setup_context *setup); -void lp_setup_init_vbuf(struct setup_context *setup); +void lp_setup_init_vbuf(struct lp_setup_context *setup); -void lp_setup_update_state( struct setup_context *setup ); +void lp_setup_update_state( struct lp_setup_context *setup ); -void lp_setup_destroy( struct setup_context *setup ); +void lp_setup_destroy( struct lp_setup_context *setup ); #endif diff --git a/src/gallium/drivers/llvmpipe/lp_setup_line.c b/src/gallium/drivers/llvmpipe/lp_setup_line.c index feea79d3943..be41c44e6f5 100644 --- a/src/gallium/drivers/llvmpipe/lp_setup_line.c +++ b/src/gallium/drivers/llvmpipe/lp_setup_line.c @@ -31,7 +31,7 @@ #include "lp_setup_context.h" -static void line_nop( struct setup_context *setup, +static void line_nop( struct lp_setup_context *setup, const float (*v0)[4], const float (*v1)[4] ) { @@ -39,7 +39,7 @@ static void line_nop( struct setup_context *setup, void -lp_setup_choose_line( struct setup_context *setup ) +lp_setup_choose_line( struct lp_setup_context *setup ) { setup->line = line_nop; } diff --git a/src/gallium/drivers/llvmpipe/lp_setup_point.c b/src/gallium/drivers/llvmpipe/lp_setup_point.c index f03ca729b24..9f69e6c5ce2 100644 --- a/src/gallium/drivers/llvmpipe/lp_setup_point.c +++ b/src/gallium/drivers/llvmpipe/lp_setup_point.c @@ -31,14 +31,14 @@ #include "lp_setup_context.h" -static void point_nop( struct setup_context *setup, +static void point_nop( struct lp_setup_context *setup, const float (*v0)[4] ) { } void -lp_setup_choose_point( struct setup_context *setup ) +lp_setup_choose_point( struct lp_setup_context *setup ) { setup->point = point_nop; } diff --git a/src/gallium/drivers/llvmpipe/lp_setup_tri.c b/src/gallium/drivers/llvmpipe/lp_setup_tri.c index e75412ac9aa..f8a58165733 100644 --- a/src/gallium/drivers/llvmpipe/lp_setup_tri.c +++ b/src/gallium/drivers/llvmpipe/lp_setup_tri.c @@ -41,7 +41,8 @@ /** * Compute a0 for a constant-valued coefficient (GL_FLAT shading). */ -static void constant_coef( struct lp_rast_triangle *tri, +static void constant_coef( struct lp_setup_context *setup, + struct lp_rast_triangle *tri, unsigned slot, const float value, unsigned i ) @@ -56,7 +57,8 @@ static void constant_coef( struct lp_rast_triangle *tri, * Compute a0, dadx and dady for a linearly interpolated coefficient, * for a triangle. */ -static void linear_coef( struct lp_rast_triangle *tri, +static void linear_coef( struct lp_setup_context *setup, + struct lp_rast_triangle *tri, float oneoverarea, unsigned slot, const float (*v1)[4], @@ -90,8 +92,8 @@ static void linear_coef( struct lp_rast_triangle *tri, * instead - i'll switch to this later. */ tri->inputs.a0[slot][i] = (a1 - - (dadx * (v1[0][0] - 0.5f) + - dady * (v1[0][1] - 0.5f))); + (dadx * (v1[0][0] - setup->pixel_offset) + + dady * (v1[0][1] - setup->pixel_offset))); } @@ -103,7 +105,8 @@ static void linear_coef( struct lp_rast_triangle *tri, * Later, when we compute the value at a particular fragment position we'll * divide the interpolated value by the interpolated W at that fragment. */ -static void perspective_coef( struct lp_rast_triangle *tri, +static void perspective_coef( struct lp_setup_context *setup, + struct lp_rast_triangle *tri, float oneoverarea, unsigned slot, const float (*v1)[4], @@ -125,8 +128,8 @@ static void perspective_coef( struct lp_rast_triangle *tri, tri->inputs.dadx[slot][i] = dadx; tri->inputs.dady[slot][i] = dady; tri->inputs.a0[slot][i] = (a1 - - (dadx * (v1[0][0] - 0.5f) + - dady * (v1[0][1] - 0.5f))); + (dadx * (v1[0][0] - setup->pixel_offset) + + dady * (v1[0][1] - setup->pixel_offset))); } @@ -137,7 +140,8 @@ static void perspective_coef( struct lp_rast_triangle *tri, * We could do a bit less work if we'd examine gl_FragCoord's swizzle mask. */ static void -setup_fragcoord_coef(struct lp_rast_triangle *tri, +setup_fragcoord_coef(struct lp_setup_context *setup, + struct lp_rast_triangle *tri, float oneoverarea, unsigned slot, const float (*v1)[4], @@ -153,27 +157,33 @@ setup_fragcoord_coef(struct lp_rast_triangle *tri, tri->inputs.dadx[slot][1] = 0.0; tri->inputs.dady[slot][1] = 1.0; /*Z*/ - linear_coef(tri, oneoverarea, slot, v1, v2, v3, 0, 2); + linear_coef(setup, tri, oneoverarea, slot, v1, v2, v3, 0, 2); /*W*/ - linear_coef(tri, oneoverarea, slot, v1, v2, v3, 0, 3); + linear_coef(setup, tri, oneoverarea, slot, v1, v2, v3, 0, 3); } -static void setup_facing_coef( struct lp_rast_triangle *tri, +/** + * Setup the fragment input attribute with the front-facing value. + * \param frontface is the triangle front facing? + */ +static void setup_facing_coef( struct lp_setup_context *setup, + struct lp_rast_triangle *tri, unsigned slot, boolean frontface ) { - constant_coef( tri, slot, 1.0f - frontface, 0 ); - constant_coef( tri, slot, 0.0f, 1 ); /* wasted */ - constant_coef( tri, slot, 0.0f, 2 ); /* wasted */ - constant_coef( tri, slot, 0.0f, 3 ); /* wasted */ + /* convert TRUE to 1.0 and FALSE to -1.0 */ + constant_coef( setup, tri, slot, 2.0f * frontface - 1.0f, 0 ); + constant_coef( setup, tri, slot, 0.0f, 1 ); /* wasted */ + constant_coef( setup, tri, slot, 0.0f, 2 ); /* wasted */ + constant_coef( setup, tri, slot, 0.0f, 3 ); /* wasted */ } /** * Compute the tri->coef[] array dadx, dady, a0 values. */ -static void setup_tri_coefficients( struct setup_context *setup, +static void setup_tri_coefficients( struct lp_setup_context *setup, struct lp_rast_triangle *tri, float oneoverarea, const float (*v1)[4], @@ -185,7 +195,7 @@ static void setup_tri_coefficients( struct setup_context *setup, /* The internal position input is in slot zero: */ - setup_fragcoord_coef(tri, oneoverarea, 0, v1, v2, v3); + setup_fragcoord_coef(setup, tri, oneoverarea, 0, v1, v2, v3); /* setup interpolation for all the remaining attributes: */ @@ -196,27 +206,27 @@ static void setup_tri_coefficients( struct setup_context *setup, switch (setup->fs.input[slot].interp) { case LP_INTERP_CONSTANT: for (i = 0; i < NUM_CHANNELS; i++) - constant_coef(tri, slot+1, v3[vert_attr][i], i); + constant_coef(setup, tri, slot+1, v3[vert_attr][i], i); break; case LP_INTERP_LINEAR: for (i = 0; i < NUM_CHANNELS; i++) - linear_coef(tri, oneoverarea, slot+1, v1, v2, v3, vert_attr, i); + linear_coef(setup, tri, oneoverarea, slot+1, v1, v2, v3, vert_attr, i); break; case LP_INTERP_PERSPECTIVE: for (i = 0; i < NUM_CHANNELS; i++) - perspective_coef(tri, oneoverarea, slot+1, v1, v2, v3, vert_attr, i); + perspective_coef(setup, tri, oneoverarea, slot+1, v1, v2, v3, vert_attr, i); break; case LP_INTERP_POSITION: /* XXX: fix me - duplicates the values in slot zero. */ - setup_fragcoord_coef(tri, oneoverarea, slot+1, v1, v2, v3); + setup_fragcoord_coef(setup, tri, oneoverarea, slot+1, v1, v2, v3); break; case LP_INTERP_FACING: - setup_facing_coef(tri, slot+1, frontface); + setup_facing_coef(setup, tri, slot+1, frontface); break; default: @@ -267,6 +277,32 @@ alloc_triangle(struct lp_scene *scene, unsigned nr_inputs, unsigned *tri_size) } +/** + * Print triangle vertex attribs (for debug). + */ +static void +print_triangle(struct lp_setup_context *setup, + const float (*v1)[4], + const float (*v2)[4], + const float (*v3)[4]) +{ + uint i; + + debug_printf("llvmpipe triangle\n"); + for (i = 0; i < setup->fs.nr_inputs; i++) { + debug_printf(" v1[%d]: %f %f %f %f\n", i, + v1[i][0], v1[i][1], v1[i][2], v1[i][3]); + } + for (i = 0; i < setup->fs.nr_inputs; i++) { + debug_printf(" v2[%d]: %f %f %f %f\n", i, + v2[i][0], v2[i][1], v2[i][2], v2[i][3]); + } + for (i = 0; i < setup->fs.nr_inputs; i++) { + debug_printf(" v3[%d]: %f %f %f %f\n", i, + v3[i][0], v3[i][1], v3[i][2], v3[i][3]); + } +} + /** * Do basic setup for triangle rasterization and determine which @@ -274,19 +310,19 @@ alloc_triangle(struct lp_scene *scene, unsigned nr_inputs, unsigned *tri_size) * bins for the tiles which we overlap. */ static void -do_triangle_ccw(struct setup_context *setup, +do_triangle_ccw(struct lp_setup_context *setup, const float (*v1)[4], const float (*v2)[4], const float (*v3)[4], boolean frontfacing ) { /* x/y positions in fixed point */ - const int x1 = subpixel_snap(v1[0][0]); - const int x2 = subpixel_snap(v2[0][0]); - const int x3 = subpixel_snap(v3[0][0]); - const int y1 = subpixel_snap(v1[0][1]); - const int y2 = subpixel_snap(v2[0][1]); - const int y3 = subpixel_snap(v3[0][1]); + const int x1 = subpixel_snap(v1[0][0] + 0.5 - setup->pixel_offset); + const int x2 = subpixel_snap(v2[0][0] + 0.5 - setup->pixel_offset); + const int x3 = subpixel_snap(v3[0][0] + 0.5 - setup->pixel_offset); + const int y1 = subpixel_snap(v1[0][1] + 0.5 - setup->pixel_offset); + const int y2 = subpixel_snap(v2[0][1] + 0.5 - setup->pixel_offset); + const int y3 = subpixel_snap(v3[0][1] + 0.5 - setup->pixel_offset); struct lp_scene *scene = lp_setup_get_current_scene(setup); struct lp_rast_triangle *tri; @@ -295,6 +331,9 @@ do_triangle_ccw(struct setup_context *setup, int minx, maxx, miny, maxy; unsigned tri_bytes; + if (0) + print_triangle(setup, v1, v2, v3); + tri = alloc_triangle(scene, setup->fs.nr_inputs, &tri_bytes); #ifdef DEBUG @@ -356,6 +395,8 @@ do_triangle_ccw(struct setup_context *setup, */ setup_tri_coefficients( setup, tri, oneoverarea, v1, v2, v3, frontfacing ); + tri->inputs.facing = frontfacing ? 1.0F : -1.0F; + /* half-edge constants, will be interated over the whole render target. */ tri->c1 = tri->dy12 * x1 - tri->dx12 * y1; @@ -565,7 +606,10 @@ do_triangle_ccw(struct setup_context *setup, } -static void triangle_cw( struct setup_context *setup, +/** + * Draw triangle if it's CW, cull otherwise. + */ +static void triangle_cw( struct lp_setup_context *setup, const float (*v0)[4], const float (*v1)[4], const float (*v2)[4] ) @@ -574,7 +618,10 @@ static void triangle_cw( struct setup_context *setup, } -static void triangle_ccw( struct setup_context *setup, +/** + * Draw triangle if it's CCW, cull otherwise. + */ +static void triangle_ccw( struct lp_setup_context *setup, const float (*v0)[4], const float (*v1)[4], const float (*v2)[4] ) @@ -583,7 +630,11 @@ static void triangle_ccw( struct setup_context *setup, } -static void triangle_both( struct setup_context *setup, + +/** + * Draw triangle whether it's CW or CCW. + */ +static void triangle_both( struct lp_setup_context *setup, const float (*v0)[4], const float (*v1)[4], const float (*v2)[4] ) @@ -602,7 +653,7 @@ static void triangle_both( struct setup_context *setup, } -static void triangle_nop( struct setup_context *setup, +static void triangle_nop( struct lp_setup_context *setup, const float (*v0)[4], const float (*v1)[4], const float (*v2)[4] ) @@ -611,7 +662,7 @@ static void triangle_nop( struct setup_context *setup, void -lp_setup_choose_triangle( struct setup_context *setup ) +lp_setup_choose_triangle( struct lp_setup_context *setup ) { switch (setup->cullmode) { case PIPE_WINDING_NONE: diff --git a/src/gallium/drivers/llvmpipe/lp_setup_vbuf.c b/src/gallium/drivers/llvmpipe/lp_setup_vbuf.c index 24291da91e4..5d3122e8ba2 100644 --- a/src/gallium/drivers/llvmpipe/lp_setup_vbuf.c +++ b/src/gallium/drivers/llvmpipe/lp_setup_vbuf.c @@ -48,10 +48,10 @@ /** cast wrapper */ -static struct setup_context * -setup_context(struct vbuf_render *vbr) +static struct lp_setup_context * +lp_setup_context(struct vbuf_render *vbr) { - return (struct setup_context *) vbr; + return (struct lp_setup_context *) vbr; } @@ -59,7 +59,11 @@ setup_context(struct vbuf_render *vbr) static const struct vertex_info * lp_setup_get_vertex_info(struct vbuf_render *vbr) { - struct setup_context *setup = setup_context(vbr); + struct lp_setup_context *setup = lp_setup_context(vbr); + + /* vertex size/info depends on the latest state */ + lp_setup_update_state(setup); + return setup->vertex_info; } @@ -68,7 +72,7 @@ static boolean lp_setup_allocate_vertices(struct vbuf_render *vbr, ushort vertex_size, ushort nr_vertices) { - struct setup_context *setup = setup_context(vbr); + struct lp_setup_context *setup = lp_setup_context(vbr); unsigned size = vertex_size * nr_vertices; if (setup->vertex_buffer_size < size) { @@ -92,7 +96,7 @@ lp_setup_release_vertices(struct vbuf_render *vbr) static void * lp_setup_map_vertices(struct vbuf_render *vbr) { - struct setup_context *setup = setup_context(vbr); + struct lp_setup_context *setup = lp_setup_context(vbr); return setup->vertex_buffer; } @@ -101,7 +105,7 @@ lp_setup_unmap_vertices(struct vbuf_render *vbr, ushort min_index, ushort max_index ) { - struct setup_context *setup = setup_context(vbr); + struct lp_setup_context *setup = lp_setup_context(vbr); assert( setup->vertex_buffer_size >= (max_index+1) * setup->vertex_size ); /* do nothing */ } @@ -110,7 +114,7 @@ lp_setup_unmap_vertices(struct vbuf_render *vbr, static boolean lp_setup_set_primitive(struct vbuf_render *vbr, unsigned prim) { - setup_context(vbr)->prim = prim; + lp_setup_context(vbr)->prim = prim; return TRUE; } @@ -129,7 +133,7 @@ static INLINE const_float4_ptr get_vert( const void *vertex_buffer, static void lp_setup_draw(struct vbuf_render *vbr, const ushort *indices, uint nr) { - struct setup_context *setup = setup_context(vbr); + struct lp_setup_context *setup = lp_setup_context(vbr); const unsigned stride = setup->vertex_info->size * sizeof(float); const void *vertex_buffer = setup->vertex_buffer; unsigned i; @@ -231,57 +235,29 @@ lp_setup_draw(struct vbuf_render *vbr, const ushort *indices, uint nr) break; case PIPE_PRIM_QUADS: - if (setup->flatshade_first) { - for (i = 3; i < nr; i += 4) { - setup->triangle( setup, - get_vert(vertex_buffer, indices[i-2], stride), - get_vert(vertex_buffer, indices[i-1], stride), - get_vert(vertex_buffer, indices[i-3], stride) ); - setup->triangle( setup, - get_vert(vertex_buffer, indices[i-1], stride), - get_vert(vertex_buffer, indices[i-0], stride), - get_vert(vertex_buffer, indices[i-3], stride) ); - } - } - else { - for (i = 3; i < nr; i += 4) { - setup->triangle( setup, - get_vert(vertex_buffer, indices[i-3], stride), - get_vert(vertex_buffer, indices[i-2], stride), - get_vert(vertex_buffer, indices[i-0], stride) ); + for (i = 3; i < nr; i += 4) { + setup->triangle( setup, + get_vert(vertex_buffer, indices[i-3], stride), + get_vert(vertex_buffer, indices[i-2], stride), + get_vert(vertex_buffer, indices[i-0], stride) ); - setup->triangle( setup, - get_vert(vertex_buffer, indices[i-2], stride), - get_vert(vertex_buffer, indices[i-1], stride), - get_vert(vertex_buffer, indices[i-0], stride) ); - } + setup->triangle( setup, + get_vert(vertex_buffer, indices[i-2], stride), + get_vert(vertex_buffer, indices[i-1], stride), + get_vert(vertex_buffer, indices[i-0], stride) ); } break; case PIPE_PRIM_QUAD_STRIP: - if (setup->flatshade_first) { - for (i = 3; i < nr; i += 2) { - setup->triangle( setup, - get_vert(vertex_buffer, indices[i-0], stride), - get_vert(vertex_buffer, indices[i-1], stride), - get_vert(vertex_buffer, indices[i-3], stride)); - setup->triangle( setup, - get_vert(vertex_buffer, indices[i-2], stride), - get_vert(vertex_buffer, indices[i-0], stride), - get_vert(vertex_buffer, indices[i-3], stride) ); - } - } - else { - for (i = 3; i < nr; i += 2) { - setup->triangle( setup, - get_vert(vertex_buffer, indices[i-3], stride), - get_vert(vertex_buffer, indices[i-2], stride), - get_vert(vertex_buffer, indices[i-0], stride) ); - setup->triangle( setup, - get_vert(vertex_buffer, indices[i-1], stride), - get_vert(vertex_buffer, indices[i-3], stride), - get_vert(vertex_buffer, indices[i-0], stride) ); - } + for (i = 3; i < nr; i += 2) { + setup->triangle( setup, + get_vert(vertex_buffer, indices[i-3], stride), + get_vert(vertex_buffer, indices[i-2], stride), + get_vert(vertex_buffer, indices[i-0], stride) ); + setup->triangle( setup, + get_vert(vertex_buffer, indices[i-1], stride), + get_vert(vertex_buffer, indices[i-3], stride), + get_vert(vertex_buffer, indices[i-0], stride) ); } break; @@ -312,7 +288,7 @@ lp_setup_draw(struct vbuf_render *vbr, const ushort *indices, uint nr) static void lp_setup_draw_arrays(struct vbuf_render *vbr, uint start, uint nr) { - struct setup_context *setup = setup_context(vbr); + struct lp_setup_context *setup = lp_setup_context(vbr); const unsigned stride = setup->vertex_info->size * sizeof(float); const void *vertex_buffer = (void *) get_vert(setup->vertex_buffer, start, stride); @@ -415,57 +391,28 @@ lp_setup_draw_arrays(struct vbuf_render *vbr, uint start, uint nr) break; case PIPE_PRIM_QUADS: - if (setup->flatshade_first) { - for (i = 3; i < nr; i += 4) { - setup->triangle( setup, - get_vert(vertex_buffer, i-2, stride), - get_vert(vertex_buffer, i-1, stride), - get_vert(vertex_buffer, i-3, stride) ); - setup->triangle( setup, - get_vert(vertex_buffer, i-1, stride), - get_vert(vertex_buffer, i-0, stride), - get_vert(vertex_buffer, i-3, stride) ); - } - } - else { - for (i = 3; i < nr; i += 4) { - setup->triangle( setup, - get_vert(vertex_buffer, i-3, stride), - get_vert(vertex_buffer, i-2, stride), - get_vert(vertex_buffer, i-0, stride) ); - setup->triangle( setup, - get_vert(vertex_buffer, i-2, stride), - get_vert(vertex_buffer, i-1, stride), - get_vert(vertex_buffer, i-0, stride) ); - } + for (i = 3; i < nr; i += 4) { + setup->triangle( setup, + get_vert(vertex_buffer, i-3, stride), + get_vert(vertex_buffer, i-2, stride), + get_vert(vertex_buffer, i-0, stride) ); + setup->triangle( setup, + get_vert(vertex_buffer, i-2, stride), + get_vert(vertex_buffer, i-1, stride), + get_vert(vertex_buffer, i-0, stride) ); } break; case PIPE_PRIM_QUAD_STRIP: - if (setup->flatshade_first) { - for (i = 3; i < nr; i += 2) { - setup->triangle( setup, - get_vert(vertex_buffer, i-0, stride), - get_vert(vertex_buffer, i-1, stride), - get_vert(vertex_buffer, i-3, stride) ); - setup->triangle( setup, - - get_vert(vertex_buffer, i-2, stride), - get_vert(vertex_buffer, i-0, stride), - get_vert(vertex_buffer, i-3, stride) ); - } - } - else { - for (i = 3; i < nr; i += 2) { - setup->triangle( setup, - get_vert(vertex_buffer, i-3, stride), - get_vert(vertex_buffer, i-2, stride), - get_vert(vertex_buffer, i-0, stride) ); - setup->triangle( setup, - get_vert(vertex_buffer, i-1, stride), - get_vert(vertex_buffer, i-3, stride), - get_vert(vertex_buffer, i-0, stride) ); - } + for (i = 3; i < nr; i += 2) { + setup->triangle( setup, + get_vert(vertex_buffer, i-3, stride), + get_vert(vertex_buffer, i-2, stride), + get_vert(vertex_buffer, i-0, stride) ); + setup->triangle( setup, + get_vert(vertex_buffer, i-1, stride), + get_vert(vertex_buffer, i-3, stride), + get_vert(vertex_buffer, i-0, stride) ); } break; @@ -493,7 +440,12 @@ lp_setup_draw_arrays(struct vbuf_render *vbr, uint start, uint nr) static void lp_setup_vbuf_destroy(struct vbuf_render *vbr) { - lp_setup_destroy(setup_context(vbr)); + struct lp_setup_context *setup = lp_setup_context(vbr); + if (setup->vertex_buffer) { + align_free(setup->vertex_buffer); + setup->vertex_buffer = NULL; + } + lp_setup_destroy(setup); } @@ -501,7 +453,7 @@ lp_setup_vbuf_destroy(struct vbuf_render *vbr) * Create the post-transform vertex handler for the given context. */ void -lp_setup_init_vbuf(struct setup_context *setup) +lp_setup_init_vbuf(struct lp_setup_context *setup) { setup->base.max_indices = LP_MAX_VBUF_INDEXES; setup->base.max_vertex_buffer_bytes = LP_MAX_VBUF_SIZE; diff --git a/src/gallium/drivers/llvmpipe/lp_state.h b/src/gallium/drivers/llvmpipe/lp_state.h index 9beba32271f..18143807c91 100644 --- a/src/gallium/drivers/llvmpipe/lp_state.h +++ b/src/gallium/drivers/llvmpipe/lp_state.h @@ -31,11 +31,10 @@ #ifndef LP_STATE_H #define LP_STATE_H -#include <llvm-c/Core.h> - #include "pipe/p_state.h" #include "tgsi/tgsi_scan.h" #include "lp_jit.h" +#include "gallivm/lp_bld.h" #include "gallivm/lp_bld_sample.h" /* for struct lp_sampler_static_state */ @@ -50,7 +49,7 @@ #define LP_NEW_DEPTH_STENCIL_ALPHA 0x100 #define LP_NEW_CONSTANTS 0x200 #define LP_NEW_SAMPLER 0x400 -#define LP_NEW_TEXTURE 0x800 +#define LP_NEW_SAMPLER_VIEW 0x800 #define LP_NEW_VERTEX 0x1000 #define LP_NEW_VS 0x2000 #define LP_NEW_QUERY 0x4000 @@ -67,6 +66,7 @@ struct lp_fragment_shader; struct lp_fragment_shader_variant_key { struct pipe_depth_state depth; + struct pipe_stencil_state stencil[2]; struct pipe_alpha_state alpha; struct pipe_blend_state blend; enum pipe_format zsbuf_format; @@ -84,8 +84,6 @@ struct lp_fragment_shader_variant_key struct lp_fragment_shader_variant { - struct lp_fragment_shader *shader; - struct lp_fragment_shader_variant_key key; LLVMValueRef function[2]; @@ -96,11 +94,7 @@ struct lp_fragment_shader_variant }; -/** - * Subclass of pipe_shader_state (though it doesn't really need to be). - * - * This is starting to look an awful lot like a quad pipeline stage... - */ +/** Subclass of pipe_shader_state */ struct lp_fragment_shader { struct pipe_shader_state base; @@ -108,125 +102,58 @@ struct lp_fragment_shader struct tgsi_shader_info info; struct lp_fragment_shader_variant *variants; - - struct lp_fragment_shader_variant *current; }; /** Subclass of pipe_shader_state */ -struct lp_vertex_shader { +struct lp_vertex_shader +{ struct pipe_shader_state shader; struct draw_vertex_shader *draw_data; }; +/** Vertex element state */ +struct lp_velems_state +{ + unsigned count; + struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS]; +}; -void * -llvmpipe_create_blend_state(struct pipe_context *, - const struct pipe_blend_state *); -void llvmpipe_bind_blend_state(struct pipe_context *, - void *); -void llvmpipe_delete_blend_state(struct pipe_context *, - void *); -void * -llvmpipe_create_sampler_state(struct pipe_context *, - const struct pipe_sampler_state *); -void llvmpipe_bind_sampler_states(struct pipe_context *, unsigned, void **); void -llvmpipe_bind_vertex_sampler_states(struct pipe_context *, - unsigned num_samplers, - void **samplers); -void llvmpipe_delete_sampler_state(struct pipe_context *, void *); - -void * -llvmpipe_create_depth_stencil_state(struct pipe_context *, - const struct pipe_depth_stencil_alpha_state *); -void llvmpipe_bind_depth_stencil_state(struct pipe_context *, void *); -void llvmpipe_delete_depth_stencil_state(struct pipe_context *, void *); - -void * -llvmpipe_create_rasterizer_state(struct pipe_context *, - const struct pipe_rasterizer_state *); -void llvmpipe_bind_rasterizer_state(struct pipe_context *, void *); -void llvmpipe_delete_rasterizer_state(struct pipe_context *, void *); - -void llvmpipe_set_framebuffer_state( struct pipe_context *, - const struct pipe_framebuffer_state * ); - -void llvmpipe_set_blend_color( struct pipe_context *pipe, - const struct pipe_blend_color *blend_color ); - -void llvmpipe_set_stencil_ref( struct pipe_context *pipe, - const struct pipe_stencil_ref *stencil_ref ); - -void llvmpipe_set_clip_state( struct pipe_context *, - const struct pipe_clip_state * ); - -void llvmpipe_set_constant_buffer(struct pipe_context *, - uint shader, uint index, - struct pipe_buffer *buf); - -void *llvmpipe_create_fs_state(struct pipe_context *, - const struct pipe_shader_state *); -void llvmpipe_bind_fs_state(struct pipe_context *, void *); -void llvmpipe_delete_fs_state(struct pipe_context *, void *); -void *llvmpipe_create_vs_state(struct pipe_context *, - const struct pipe_shader_state *); -void llvmpipe_bind_vs_state(struct pipe_context *, void *); -void llvmpipe_delete_vs_state(struct pipe_context *, void *); - -void llvmpipe_set_polygon_stipple( struct pipe_context *, - const struct pipe_poly_stipple * ); - -void llvmpipe_set_scissor_state( struct pipe_context *, - const struct pipe_scissor_state * ); - -void llvmpipe_set_sampler_textures( struct pipe_context *, - unsigned num, - struct pipe_texture ** ); +llvmpipe_set_framebuffer_state(struct pipe_context *, + const struct pipe_framebuffer_state *); void -llvmpipe_set_vertex_sampler_textures(struct pipe_context *, - unsigned num_textures, - struct pipe_texture **); - -void llvmpipe_set_viewport_state( struct pipe_context *, - const struct pipe_viewport_state * ); +llvmpipe_update_fs(struct llvmpipe_context *lp); -void llvmpipe_set_vertex_elements(struct pipe_context *, - unsigned count, - const struct pipe_vertex_element *); +void +llvmpipe_update_derived(struct llvmpipe_context *llvmpipe); -void llvmpipe_set_vertex_buffers(struct pipe_context *, - unsigned count, - const struct pipe_vertex_buffer *); +void +llvmpipe_init_sampler_funcs(struct llvmpipe_context *llvmpipe); -void llvmpipe_update_fs(struct llvmpipe_context *lp); +void +llvmpipe_init_blend_funcs(struct llvmpipe_context *llvmpipe); -void llvmpipe_update_derived( struct llvmpipe_context *llvmpipe ); +void +llvmpipe_init_vertex_funcs(struct llvmpipe_context *llvmpipe); +void +llvmpipe_init_draw_funcs(struct llvmpipe_context *llvmpipe); -void llvmpipe_draw_arrays(struct pipe_context *pipe, unsigned mode, - unsigned start, unsigned count); +void +llvmpipe_init_clip_funcs(struct llvmpipe_context *llvmpipe); -void llvmpipe_draw_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, - unsigned indexSize, - unsigned mode, unsigned start, unsigned count); void -llvmpipe_draw_range_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, - unsigned indexSize, - unsigned min_index, - unsigned max_index, - unsigned mode, unsigned start, unsigned count); +llvmpipe_init_fs_funcs(struct llvmpipe_context *llvmpipe); void -llvmpipe_map_texture_surfaces(struct llvmpipe_context *lp); +llvmpipe_init_vs_funcs(struct llvmpipe_context *llvmpipe); void -llvmpipe_unmap_texture_surfaces(struct llvmpipe_context *lp); +llvmpipe_init_rasterizer_funcs(struct llvmpipe_context *llvmpipe); #endif diff --git a/src/gallium/drivers/llvmpipe/lp_state_blend.c b/src/gallium/drivers/llvmpipe/lp_state_blend.c index 4ee28473e80..8569507f4e5 100644 --- a/src/gallium/drivers/llvmpipe/lp_state_blend.c +++ b/src/gallium/drivers/llvmpipe/lp_state_blend.c @@ -40,15 +40,16 @@ #include "lp_state.h" -void * +static void * llvmpipe_create_blend_state(struct pipe_context *pipe, const struct pipe_blend_state *blend) { return mem_dup(blend, sizeof(*blend)); } -void llvmpipe_bind_blend_state( struct pipe_context *pipe, - void *blend ) + +static void +llvmpipe_bind_blend_state(struct pipe_context *pipe, void *blend) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); @@ -62,15 +63,17 @@ void llvmpipe_bind_blend_state( struct pipe_context *pipe, llvmpipe->dirty |= LP_NEW_BLEND; } -void llvmpipe_delete_blend_state(struct pipe_context *pipe, - void *blend) + +static void +llvmpipe_delete_blend_state(struct pipe_context *pipe, void *blend) { FREE( blend ); } -void llvmpipe_set_blend_color( struct pipe_context *pipe, - const struct pipe_blend_color *blend_color ) +static void +llvmpipe_set_blend_color(struct pipe_context *pipe, + const struct pipe_blend_color *blend_color) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); @@ -93,14 +96,15 @@ void llvmpipe_set_blend_color( struct pipe_context *pipe, */ -void * +static void * llvmpipe_create_depth_stencil_state(struct pipe_context *pipe, const struct pipe_depth_stencil_alpha_state *depth_stencil) { return mem_dup(depth_stencil, sizeof(*depth_stencil)); } -void + +static void llvmpipe_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil) { @@ -116,14 +120,17 @@ llvmpipe_bind_depth_stencil_state(struct pipe_context *pipe, llvmpipe->dirty |= LP_NEW_DEPTH_STENCIL_ALPHA; } -void + +static void llvmpipe_delete_depth_stencil_state(struct pipe_context *pipe, void *depth) { FREE( depth ); } -void llvmpipe_set_stencil_ref( struct pipe_context *pipe, - const struct pipe_stencil_ref *stencil_ref ) + +static void +llvmpipe_set_stencil_ref(struct pipe_context *pipe, + const struct pipe_stencil_ref *stencil_ref) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); @@ -142,3 +149,18 @@ void llvmpipe_set_stencil_ref( struct pipe_context *pipe, } +void +llvmpipe_init_blend_funcs(struct llvmpipe_context *llvmpipe) +{ + llvmpipe->pipe.create_blend_state = llvmpipe_create_blend_state; + llvmpipe->pipe.bind_blend_state = llvmpipe_bind_blend_state; + llvmpipe->pipe.delete_blend_state = llvmpipe_delete_blend_state; + + llvmpipe->pipe.create_depth_stencil_alpha_state = llvmpipe_create_depth_stencil_state; + llvmpipe->pipe.bind_depth_stencil_alpha_state = llvmpipe_bind_depth_stencil_state; + llvmpipe->pipe.delete_depth_stencil_alpha_state = llvmpipe_delete_depth_stencil_state; + + llvmpipe->pipe.set_blend_color = llvmpipe_set_blend_color; + + llvmpipe->pipe.set_stencil_ref = llvmpipe_set_stencil_ref; +} diff --git a/src/gallium/drivers/llvmpipe/lp_state_clip.c b/src/gallium/drivers/llvmpipe/lp_state_clip.c index df68f27acc9..32ae079cc15 100644 --- a/src/gallium/drivers/llvmpipe/lp_state_clip.c +++ b/src/gallium/drivers/llvmpipe/lp_state_clip.c @@ -32,8 +32,9 @@ #include "draw/draw_context.h" -void llvmpipe_set_clip_state( struct pipe_context *pipe, - const struct pipe_clip_state *clip ) +static void +llvmpipe_set_clip_state(struct pipe_context *pipe, + const struct pipe_clip_state *clip) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); @@ -42,8 +43,9 @@ void llvmpipe_set_clip_state( struct pipe_context *pipe, } -void llvmpipe_set_viewport_state( struct pipe_context *pipe, - const struct pipe_viewport_state *viewport ) +static void +llvmpipe_set_viewport_state(struct pipe_context *pipe, + const struct pipe_viewport_state *viewport) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); @@ -55,8 +57,9 @@ void llvmpipe_set_viewport_state( struct pipe_context *pipe, } -void llvmpipe_set_scissor_state( struct pipe_context *pipe, - const struct pipe_scissor_state *scissor ) +static void +llvmpipe_set_scissor_state(struct pipe_context *pipe, + const struct pipe_scissor_state *scissor) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); @@ -67,8 +70,9 @@ void llvmpipe_set_scissor_state( struct pipe_context *pipe, } -void llvmpipe_set_polygon_stipple( struct pipe_context *pipe, - const struct pipe_poly_stipple *stipple ) +static void +llvmpipe_set_polygon_stipple(struct pipe_context *pipe, + const struct pipe_poly_stipple *stipple) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); @@ -77,3 +81,14 @@ void llvmpipe_set_polygon_stipple( struct pipe_context *pipe, llvmpipe->poly_stipple = *stipple; /* struct copy */ llvmpipe->dirty |= LP_NEW_STIPPLE; } + + + +void +llvmpipe_init_clip_funcs(struct llvmpipe_context *llvmpipe) +{ + llvmpipe->pipe.set_clip_state = llvmpipe_set_clip_state; + llvmpipe->pipe.set_polygon_stipple = llvmpipe_set_polygon_stipple; + llvmpipe->pipe.set_scissor_state = llvmpipe_set_scissor_state; + llvmpipe->pipe.set_viewport_state = llvmpipe_set_viewport_state; +} diff --git a/src/gallium/drivers/llvmpipe/lp_state_derived.c b/src/gallium/drivers/llvmpipe/lp_state_derived.c index bdd906e1a73..113d77ab788 100644 --- a/src/gallium/drivers/llvmpipe/lp_state_derived.c +++ b/src/gallium/drivers/llvmpipe/lp_state_derived.c @@ -50,88 +50,87 @@ compute_vertex_info(struct llvmpipe_context *llvmpipe) { const struct lp_fragment_shader *lpfs = llvmpipe->fs; struct vertex_info *vinfo = &llvmpipe->vertex_info; - const uint num = draw_num_shader_outputs(llvmpipe->draw); + struct lp_shader_input inputs[1 + PIPE_MAX_SHADER_INPUTS]; + unsigned vs_index; uint i; - /* Tell setup to tell the draw module to simply emit the whole - * post-xform vertex as-is. - * - * Not really sure if this is the best approach. + /* + * Match FS inputs against VS outputs, emitting the necessary attributes. */ - vinfo->num_attribs = 0; - for (i = 0; i < num; i++) { - draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE, i); - } - draw_compute_vertex_size(vinfo); - - - lp_setup_set_vertex_info(llvmpipe->setup, vinfo); -/* - llvmpipe->psize_slot = draw_find_vs_output(llvmpipe->draw, - TGSI_SEMANTIC_PSIZE, 0); -*/ - - /* Now match FS inputs against emitted vertex data. It's also - * entirely possible to just have a fixed layout for FS input, - * determined by the fragment shader itself, and adjust the draw - * outputs to match that. - */ - { - struct lp_shader_input inputs[PIPE_MAX_SHADER_INPUTS]; - - for (i = 0; i < lpfs->info.num_inputs; i++) { + vinfo->num_attribs = 0; - /* This can be precomputed, except for flatshade: + vs_index = draw_find_shader_output(llvmpipe->draw, + TGSI_SEMANTIC_POSITION, + 0); + + draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE, vs_index); + + for (i = 0; i < lpfs->info.num_inputs; i++) { + /* + * Search for each input in current vs output: + */ + + vs_index = draw_find_shader_output(llvmpipe->draw, + lpfs->info.input_semantic_name[i], + lpfs->info.input_semantic_index[i]); + + /* This can be pre-computed, except for flatshade: + */ + switch (lpfs->info.input_semantic_name[i]) { + case TGSI_SEMANTIC_FACE: + inputs[i].interp = LP_INTERP_FACING; + break; + case TGSI_SEMANTIC_POSITION: + /* Position was already emitted above + */ + inputs[i].interp = LP_INTERP_POSITION; + inputs[i].src_index = 0; + continue; + case TGSI_SEMANTIC_COLOR: + /* Colors are linearly inputs[i].interpolated in the fragment shader + * even when flatshading is active. This just tells the + * setup module to use coefficients with ddx==0 and + * ddy==0. */ - switch (lpfs->info.input_semantic_name[i]) { - case TGSI_SEMANTIC_FACE: - inputs[i].interp = LP_INTERP_FACING; + if (llvmpipe->rasterizer->flatshade) + inputs[i].interp = LP_INTERP_CONSTANT; + else + inputs[i].interp = LP_INTERP_LINEAR; + break; + + default: + switch (lpfs->info.input_interpolate[i]) { + case TGSI_INTERPOLATE_CONSTANT: + inputs[i].interp = LP_INTERP_CONSTANT; break; - case TGSI_SEMANTIC_POSITION: - inputs[i].interp = LP_INTERP_POSITION; + case TGSI_INTERPOLATE_LINEAR: + inputs[i].interp = LP_INTERP_LINEAR; break; - case TGSI_SEMANTIC_COLOR: - /* Colors are linearly interpolated in the fragment shader - * even when flatshading is active. This just tells the - * setup module to use coefficients with ddx==0 and - * ddy==0. - */ - if (llvmpipe->rasterizer->flatshade) - inputs[i].interp = LP_INTERP_CONSTANT; - else - inputs[i].interp = LP_INTERP_LINEAR; + case TGSI_INTERPOLATE_PERSPECTIVE: + inputs[i].interp = LP_INTERP_PERSPECTIVE; break; - default: - switch (lpfs->info.input_interpolate[i]) { - case TGSI_INTERPOLATE_CONSTANT: - inputs[i].interp = LP_INTERP_CONSTANT; - break; - case TGSI_INTERPOLATE_LINEAR: - inputs[i].interp = LP_INTERP_LINEAR; - break; - case TGSI_INTERPOLATE_PERSPECTIVE: - inputs[i].interp = LP_INTERP_PERSPECTIVE; - break; - default: - assert(0); - break; - } + assert(0); + break; } - - /* Search for each input in current vs output: - */ - inputs[i].src_index = - draw_find_shader_output(llvmpipe->draw, - lpfs->info.input_semantic_name[i], - lpfs->info.input_semantic_index[i]); } - lp_setup_set_fs_inputs(llvmpipe->setup, - inputs, - lpfs->info.num_inputs); + /* + * Emit the requested fs attribute for all but position. + */ + + inputs[i].src_index = vinfo->num_attribs; + draw_emit_vertex_attr(vinfo, EMIT_4F, INTERP_PERSPECTIVE, vs_index); } + + draw_compute_vertex_size(vinfo); + + lp_setup_set_vertex_info(llvmpipe->setup, vinfo); + + lp_setup_set_fs_inputs(llvmpipe->setup, + inputs, + lpfs->info.num_inputs); } @@ -150,7 +149,7 @@ void llvmpipe_update_derived( struct llvmpipe_context *llvmpipe ) */ if (llvmpipe->tex_timestamp != lp_screen->timestamp) { llvmpipe->tex_timestamp = lp_screen->timestamp; - llvmpipe->dirty |= LP_NEW_TEXTURE; + llvmpipe->dirty |= LP_NEW_SAMPLER_VIEW; } if (llvmpipe->dirty & (LP_NEW_RASTERIZER | @@ -164,7 +163,7 @@ void llvmpipe_update_derived( struct llvmpipe_context *llvmpipe ) LP_NEW_DEPTH_STENCIL_ALPHA | LP_NEW_RASTERIZER | LP_NEW_SAMPLER | - LP_NEW_TEXTURE)) + LP_NEW_SAMPLER_VIEW)) llvmpipe_update_fs( llvmpipe ); if (llvmpipe->dirty & LP_NEW_BLEND_COLOR) @@ -174,18 +173,21 @@ void llvmpipe_update_derived( struct llvmpipe_context *llvmpipe ) if (llvmpipe->dirty & LP_NEW_SCISSOR) lp_setup_set_scissor(llvmpipe->setup, &llvmpipe->scissor); - if (llvmpipe->dirty & LP_NEW_DEPTH_STENCIL_ALPHA) + if (llvmpipe->dirty & LP_NEW_DEPTH_STENCIL_ALPHA) { lp_setup_set_alpha_ref_value(llvmpipe->setup, llvmpipe->depth_stencil->alpha.ref_value); + lp_setup_set_stencil_ref_values(llvmpipe->setup, + llvmpipe->stencil_ref.ref_value); + } if (llvmpipe->dirty & LP_NEW_CONSTANTS) lp_setup_set_fs_constants(llvmpipe->setup, llvmpipe->constants[PIPE_SHADER_FRAGMENT]); - if (llvmpipe->dirty & LP_NEW_TEXTURE) - lp_setup_set_sampler_textures(llvmpipe->setup, - llvmpipe->num_textures, - llvmpipe->texture); + if (llvmpipe->dirty & LP_NEW_SAMPLER_VIEW) + lp_setup_set_fragment_sampler_views(llvmpipe->setup, + llvmpipe->num_fragment_sampler_views, + llvmpipe->fragment_sampler_views); llvmpipe->dirty = 0; } diff --git a/src/gallium/drivers/llvmpipe/lp_state_fs.c b/src/gallium/drivers/llvmpipe/lp_state_fs.c index c4b79dd4156..965777b6411 100644 --- a/src/gallium/drivers/llvmpipe/lp_state_fs.c +++ b/src/gallium/drivers/llvmpipe/lp_state_fs.c @@ -37,10 +37,10 @@ * - early depth test * - fragment shader * - alpha test - * - depth/stencil test (stencil TBI) + * - depth/stencil test * - blending * - * This file has only the glue to assembly the fragment pipeline. The actual + * This file has only the glue to assemble the fragment pipeline. The actual * plumbing of converting Gallium state into LLVM IR is done elsewhere, in the * lp_bld_*.[ch] files, and in a complete generic and reusable way. Here we * muster the LLVM JIT execution engine to create a function that follows an @@ -77,15 +77,15 @@ #include "gallivm/lp_bld_conv.h" #include "gallivm/lp_bld_intr.h" #include "gallivm/lp_bld_logic.h" -#include "gallivm/lp_bld_depth.h" -#include "gallivm/lp_bld_interp.h" #include "gallivm/lp_bld_tgsi.h" -#include "gallivm/lp_bld_alpha.h" -#include "gallivm/lp_bld_blend.h" #include "gallivm/lp_bld_swizzle.h" #include "gallivm/lp_bld_flow.h" #include "gallivm/lp_bld_debug.h" -#include "lp_buffer.h" + +#include "lp_bld_alpha.h" +#include "lp_bld_blend.h" +#include "lp_bld_depth.h" +#include "lp_bld_interp.h" #include "lp_context.h" #include "lp_debug.h" #include "lp_perf.h" @@ -95,6 +95,9 @@ #include "lp_tex_sample.h" +#include <llvm-c/Analysis.h> + + static const unsigned char quad_offset_x[4] = {0, 1, 0, 1}; static const unsigned char quad_offset_y[4] = {0, 0, 1, 1}; @@ -135,20 +138,22 @@ generate_pos0(LLVMBuilderRef builder, /** - * Generate the depth test. + * Generate the depth /stencil test code. */ static void -generate_depth(LLVMBuilderRef builder, - const struct lp_fragment_shader_variant_key *key, - struct lp_type src_type, - struct lp_build_mask_context *mask, - LLVMValueRef src, - LLVMValueRef dst_ptr) +generate_depth_stencil(LLVMBuilderRef builder, + const struct lp_fragment_shader_variant_key *key, + struct lp_type src_type, + struct lp_build_mask_context *mask, + LLVMValueRef stencil_refs[2], + LLVMValueRef src, + LLVMValueRef dst_ptr, + LLVMValueRef facing) { const struct util_format_description *format_desc; struct lp_type dst_type; - if(!key->depth.enabled) + if (!key->depth.enabled && !key->stencil[0].enabled && !key->stencil[1].enabled) return; format_desc = util_format_description(key->zsbuf_format); @@ -175,19 +180,22 @@ generate_depth(LLVMBuilderRef builder, assert(dst_type.width == src_type.width); assert(dst_type.length == src_type.length); + /* Convert fragment Z from float to integer */ lp_build_conv(builder, src_type, dst_type, &src, 1, &src, 1); dst_ptr = LLVMBuildBitCast(builder, dst_ptr, LLVMPointerType(lp_build_vec_type(dst_type), 0), ""); - - lp_build_depth_test(builder, - &key->depth, - dst_type, - format_desc, - mask, - src, - dst_ptr); + lp_build_depth_stencil_test(builder, + &key->depth, + key->stencil, + dst_type, + format_desc, + mask, + stencil_refs, + src, + dst_ptr, + facing); } @@ -215,7 +223,7 @@ generate_tri_edge_mask(LLVMBuilderRef builder, #endif struct lp_build_flow_context *flow; struct lp_type i32_type; - LLVMTypeRef i32vec4_type, mask_type; + LLVMTypeRef i32vec4_type; LLVMValueRef c0_vec, c1_vec, c2_vec; LLVMValueRef in_out_mask; @@ -231,8 +239,6 @@ generate_tri_edge_mask(LLVMBuilderRef builder, i32vec4_type = lp_build_int32_vec4_type(); - mask_type = LLVMIntType(32 * 4); - /* * Use a conditional here to do detailed pixel in/out testing. * We only have to do this if c0 != INT_MIN. @@ -249,7 +255,7 @@ generate_tri_edge_mask(LLVMBuilderRef builder, LLVMConstInt(LLVMInt32Type(), INT_MIN, 0), ""); - in_out_mask = lp_build_int_const_scalar(i32_type, ~0); + in_out_mask = lp_build_const_int_vec(i32_type, ~0); lp_build_flow_scope_declare(flow, &in_out_mask); @@ -364,7 +370,7 @@ build_int32_vec_const(int value) i32_type.norm = FALSE; /* values are not normalized */ i32_type.width = 32; /* 32-bit int values */ i32_type.length = 4; /* 4 elements per vector */ - return lp_build_int_const_scalar(i32_type, value); + return lp_build_const_int_vec(i32_type, value); } @@ -387,6 +393,7 @@ generate_fs(struct llvmpipe_context *lp, LLVMValueRef *pmask, LLVMValueRef (*color)[4], LLVMValueRef depth_ptr, + LLVMValueRef facing, unsigned do_tri_test, LLVMValueRef c0, LLVMValueRef c1, @@ -396,24 +403,24 @@ generate_fs(struct llvmpipe_context *lp, LLVMValueRef step2_ptr) { const struct tgsi_token *tokens = shader->base.tokens; - LLVMTypeRef elem_type; LLVMTypeRef vec_type; - LLVMTypeRef int_vec_type; LLVMValueRef consts_ptr; LLVMValueRef outputs[PIPE_MAX_SHADER_OUTPUTS][NUM_CHANNELS]; LLVMValueRef z = interp->pos[2]; + LLVMValueRef stencil_refs[2]; struct lp_build_flow_context *flow; struct lp_build_mask_context mask; - boolean early_depth_test; + boolean early_depth_stencil_test; unsigned attrib; unsigned chan; unsigned cbuf; assert(i < 4); - elem_type = lp_build_elem_type(type); + stencil_refs[0] = lp_jit_context_stencil_ref_front_value(builder, context_ptr); + stencil_refs[1] = lp_jit_context_stencil_ref_back_value(builder, context_ptr); + vec_type = lp_build_vec_type(type); - int_vec_type = lp_build_int_vec_type(type); consts_ptr = lp_jit_context_constants(builder, context_ptr); @@ -450,20 +457,20 @@ generate_fs(struct llvmpipe_context *lp, lp_build_mask_update(&mask, smask); } - early_depth_test = - key->depth.enabled && + early_depth_stencil_test = + (key->depth.enabled || key->stencil[0].enabled) && !key->alpha.enabled && !shader->info.uses_kill && !shader->info.writes_z; - if(early_depth_test) - generate_depth(builder, key, - type, &mask, - z, depth_ptr); + if (early_depth_stencil_test) + generate_depth_stencil(builder, key, + type, &mask, + stencil_refs, z, depth_ptr, facing); lp_build_tgsi_soa(builder, tokens, type, &mask, consts_ptr, interp->pos, interp->inputs, - outputs, sampler); + outputs, sampler, &shader->info); for (attrib = 0; attrib < shader->info.num_outputs; ++attrib) { for(chan = 0; chan < NUM_CHANNELS; ++chan) { @@ -503,10 +510,10 @@ generate_fs(struct llvmpipe_context *lp, } } - if(!early_depth_test) - generate_depth(builder, key, - type, &mask, - z, depth_ptr); + if (!early_depth_stencil_test) + generate_depth_stencil(builder, key, + type, &mask, + stencil_refs, z, depth_ptr, facing); lp_build_mask_end(&mask); @@ -535,7 +542,6 @@ generate_blend(const struct pipe_blend_state *blend, struct lp_build_flow_context *flow; struct lp_build_mask_context mask_ctx; LLVMTypeRef vec_type; - LLVMTypeRef int_vec_type; LLVMValueRef const_ptr; LLVMValueRef con[4]; LLVMValueRef dst[4]; @@ -550,7 +556,6 @@ generate_blend(const struct pipe_blend_state *blend, lp_build_mask_begin(&mask_ctx, flow, type, mask); vec_type = lp_build_vec_type(type); - int_vec_type = lp_build_int_vec_type(type); const_ptr = lp_jit_context_blend_color(builder, context_ptr); const_ptr = LLVMBuildBitCast(builder, const_ptr, @@ -582,6 +587,20 @@ generate_blend(const struct pipe_blend_state *blend, } +/** casting function to avoid compiler warnings */ +static lp_jit_frag_func +cast_voidptr_to_lp_jit_frag_func(void *p) +{ + union { + void *v; + lp_jit_frag_func f; + } tmp; + assert(sizeof(tmp.v) == sizeof(tmp.f)); + tmp.v = p; + return tmp.f; +} + + /** * Generate the runtime callable function for the whole fragment pipeline. * Note that the function which we generate operates on a block of 16 @@ -602,8 +621,7 @@ generate_fragment(struct llvmpipe_context *lp, LLVMTypeRef fs_vec_type; LLVMTypeRef fs_int_vec_type; LLVMTypeRef blend_vec_type; - LLVMTypeRef blend_int_vec_type; - LLVMTypeRef arg_types[14]; + LLVMTypeRef arg_types[15]; LLVMTypeRef func_type; LLVMTypeRef int32_vec4_type = lp_build_int32_vec4_type(); LLVMValueRef context_ptr; @@ -626,6 +644,7 @@ generate_fragment(struct llvmpipe_context *lp, LLVMValueRef blend_mask; LLVMValueRef blend_in_color[NUM_CHANNELS]; LLVMValueRef function; + LLVMValueRef facing; unsigned num_fs; unsigned i; unsigned chan; @@ -660,25 +679,25 @@ generate_fragment(struct llvmpipe_context *lp, fs_int_vec_type = lp_build_int_vec_type(fs_type); blend_vec_type = lp_build_vec_type(blend_type); - blend_int_vec_type = lp_build_int_vec_type(blend_type); arg_types[0] = screen->context_ptr_type; /* context */ arg_types[1] = LLVMInt32Type(); /* x */ arg_types[2] = LLVMInt32Type(); /* y */ - arg_types[3] = LLVMPointerType(fs_elem_type, 0); /* a0 */ - arg_types[4] = LLVMPointerType(fs_elem_type, 0); /* dadx */ - arg_types[5] = LLVMPointerType(fs_elem_type, 0); /* dady */ - arg_types[6] = LLVMPointerType(LLVMPointerType(blend_vec_type, 0), 0); /* color */ - arg_types[7] = LLVMPointerType(fs_int_vec_type, 0); /* depth */ - arg_types[8] = LLVMInt32Type(); /* c0 */ - arg_types[9] = LLVMInt32Type(); /* c1 */ - arg_types[10] = LLVMInt32Type(); /* c2 */ + arg_types[3] = LLVMFloatType(); /* facing */ + arg_types[4] = LLVMPointerType(fs_elem_type, 0); /* a0 */ + arg_types[5] = LLVMPointerType(fs_elem_type, 0); /* dadx */ + arg_types[6] = LLVMPointerType(fs_elem_type, 0); /* dady */ + arg_types[7] = LLVMPointerType(LLVMPointerType(blend_vec_type, 0), 0); /* color */ + arg_types[8] = LLVMPointerType(fs_int_vec_type, 0); /* depth */ + arg_types[9] = LLVMInt32Type(); /* c0 */ + arg_types[10] = LLVMInt32Type(); /* c1 */ + arg_types[11] = LLVMInt32Type(); /* c2 */ /* Note: the step arrays are built as int32[16] but we interpret * them here as int32_vec4[4]. */ - arg_types[11] = LLVMPointerType(int32_vec4_type, 0);/* step0 */ - arg_types[12] = LLVMPointerType(int32_vec4_type, 0);/* step1 */ - arg_types[13] = LLVMPointerType(int32_vec4_type, 0);/* step2 */ + arg_types[12] = LLVMPointerType(int32_vec4_type, 0);/* step0 */ + arg_types[13] = LLVMPointerType(int32_vec4_type, 0);/* step1 */ + arg_types[14] = LLVMPointerType(int32_vec4_type, 0);/* step2 */ func_type = LLVMFunctionType(LLVMVoidType(), arg_types, Elements(arg_types), 0); @@ -698,17 +717,18 @@ generate_fragment(struct llvmpipe_context *lp, context_ptr = LLVMGetParam(function, 0); x = LLVMGetParam(function, 1); y = LLVMGetParam(function, 2); - a0_ptr = LLVMGetParam(function, 3); - dadx_ptr = LLVMGetParam(function, 4); - dady_ptr = LLVMGetParam(function, 5); - color_ptr_ptr = LLVMGetParam(function, 6); - depth_ptr = LLVMGetParam(function, 7); - c0 = LLVMGetParam(function, 8); - c1 = LLVMGetParam(function, 9); - c2 = LLVMGetParam(function, 10); - step0_ptr = LLVMGetParam(function, 11); - step1_ptr = LLVMGetParam(function, 12); - step2_ptr = LLVMGetParam(function, 13); + facing = LLVMGetParam(function, 3); + a0_ptr = LLVMGetParam(function, 4); + dadx_ptr = LLVMGetParam(function, 5); + dady_ptr = LLVMGetParam(function, 6); + color_ptr_ptr = LLVMGetParam(function, 7); + depth_ptr = LLVMGetParam(function, 8); + c0 = LLVMGetParam(function, 9); + c1 = LLVMGetParam(function, 10); + c2 = LLVMGetParam(function, 11); + step0_ptr = LLVMGetParam(function, 12); + step1_ptr = LLVMGetParam(function, 13); + step2_ptr = LLVMGetParam(function, 14); lp_build_name(context_ptr, "context"); lp_build_name(x, "x"); @@ -750,7 +770,6 @@ generate_fragment(struct llvmpipe_context *lp, LLVMValueRef index = LLVMConstInt(LLVMInt32Type(), i, 0); LLVMValueRef out_color[PIPE_MAX_COLOR_BUFS][NUM_CHANNELS]; LLVMValueRef depth_ptr_i; - int cbuf; if(i != 0) lp_build_interp_soa_update(&interp, i); @@ -767,6 +786,7 @@ generate_fragment(struct llvmpipe_context *lp, &fs_mask[i], /* output */ out_color, depth_ptr_i, + facing, do_tri_test, c0, c1, c2, step0_ptr, step1_ptr, step2_ptr); @@ -842,10 +862,14 @@ generate_fragment(struct llvmpipe_context *lp, /* * Translate the LLVM IR into machine code. */ - variant->jit_function[do_tri_test] = (lp_jit_frag_func)LLVMGetPointerToGlobal(screen->engine, function); + { + void *f = LLVMGetPointerToGlobal(screen->engine, function); + + variant->jit_function[do_tri_test] = cast_voidptr_to_lp_jit_frag_func(f); - if (LP_DEBUG & DEBUG_ASM) - lp_disassemble(variant->jit_function[do_tri_test]); + if (LP_DEBUG & DEBUG_ASM) + lp_disassemble(f); + } } @@ -913,7 +937,6 @@ generate_variant(struct llvmpipe_context *lp, if(!variant) return NULL; - variant->shader = shader; memcpy(&variant->key, key, sizeof *key); generate_fragment(lp, shader, variant, 0); @@ -927,7 +950,7 @@ generate_variant(struct llvmpipe_context *lp, } -void * +static void * llvmpipe_create_fs_state(struct pipe_context *pipe, const struct pipe_shader_state *templ) { @@ -943,11 +966,16 @@ llvmpipe_create_fs_state(struct pipe_context *pipe, /* we need to keep a local copy of the tokens */ shader->base.tokens = tgsi_dup_tokens(templ->tokens); + if (LP_DEBUG & DEBUG_TGSI) { + debug_printf("llvmpipe: Create fragment shader %p:\n", (void *) shader); + tgsi_dump(templ->tokens, 0); + } + return shader; } -void +static void llvmpipe_bind_fs_state(struct pipe_context *pipe, void *fs) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); @@ -963,7 +991,7 @@ llvmpipe_bind_fs_state(struct pipe_context *pipe, void *fs) } -void +static void llvmpipe_delete_fs_state(struct pipe_context *pipe, void *fs) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); @@ -1006,14 +1034,14 @@ llvmpipe_delete_fs_state(struct pipe_context *pipe, void *fs) -void +static void llvmpipe_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_buffer *constants) + struct pipe_resource *constants) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); - unsigned size = constants ? constants->size : 0; - const void *data = constants ? llvmpipe_buffer(constants)->data : NULL; + unsigned size = constants ? constants->width0 : 0; + const void *data = constants ? llvmpipe_resource_data(constants) : NULL; assert(shader < PIPE_SHADER_TYPES); assert(index == 0); @@ -1024,7 +1052,7 @@ llvmpipe_set_constant_buffer(struct pipe_context *pipe, draw_flush(llvmpipe->draw); /* note: reference counting */ - pipe_buffer_reference(&llvmpipe->constants[shader], constants); + pipe_resource_reference(&llvmpipe->constants[shader], constants); if(shader == PIPE_SHADER_VERTEX) { draw_set_mapped_constant_buffer(llvmpipe->draw, PIPE_SHADER_VERTEX, 0, @@ -1051,10 +1079,15 @@ make_variant_key(struct llvmpipe_context *lp, memset(key, 0, sizeof *key); - if(lp->framebuffer.zsbuf && - lp->depth_stencil->depth.enabled) { - key->zsbuf_format = lp->framebuffer.zsbuf->format; - memcpy(&key->depth, &lp->depth_stencil->depth, sizeof key->depth); + if (lp->framebuffer.zsbuf) { + if (lp->depth_stencil->depth.enabled) { + key->zsbuf_format = lp->framebuffer.zsbuf->format; + memcpy(&key->depth, &lp->depth_stencil->depth, sizeof key->depth); + } + if (lp->depth_stencil->stencil[0].enabled) { + key->zsbuf_format = lp->framebuffer.zsbuf->format; + memcpy(&key->stencil, &lp->depth_stencil->stencil, sizeof key->stencil); + } } key->alpha.enabled = lp->depth_stencil->alpha.enabled; @@ -1075,8 +1108,10 @@ make_variant_key(struct llvmpipe_context *lp, unsigned chan; format_desc = util_format_description(lp->framebuffer.cbufs[i]->format); - assert(format_desc->layout == UTIL_FORMAT_COLORSPACE_RGB || - format_desc->layout == UTIL_FORMAT_COLORSPACE_SRGB); + assert(format_desc->colorspace == UTIL_FORMAT_COLORSPACE_RGB || + format_desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB); + + key->blend.rt[i].colormask = lp->blend->rt[i].colormask; /* mask out color channels not present in the color buffer. * Should be simple to incorporate per-cbuf writemasks: @@ -1084,14 +1119,14 @@ make_variant_key(struct llvmpipe_context *lp, for(chan = 0; chan < 4; ++chan) { enum util_format_swizzle swizzle = format_desc->swizzle[chan]; - if(swizzle <= UTIL_FORMAT_SWIZZLE_W) - key->blend.rt[0].colormask |= (1 << chan); + if(swizzle > UTIL_FORMAT_SWIZZLE_W) + key->blend.rt[i].colormask &= ~(1 << chan); } } for(i = 0; i < PIPE_MAX_SAMPLERS; ++i) if(shader->info.file_mask[TGSI_FILE_SAMPLER] & (1 << i)) - lp_sampler_static_state(&key->sampler[i], lp->texture[i], lp->sampler[i]); + lp_sampler_static_state(&key->sampler[i], lp->fragment_sampler_views[i], lp->sampler[i]); } @@ -1130,13 +1165,12 @@ llvmpipe_update_fs(struct llvmpipe_context *lp) LP_COUNT_ADD(nr_llvm_compiles, 2); /* emit vs. omit in/out test */ } - shader->current = variant; - /* TODO: put this in the variant */ /* TODO: most of these can be relaxed, in particular the colormask */ opaque = !key.blend.logicop_enable && !key.blend.rt[0].blend_enable && key.blend.rt[0].colormask == 0xf && + !key.stencil[0].enabled && !key.alpha.enabled && !key.depth.enabled && !key.scissor && @@ -1144,7 +1178,19 @@ llvmpipe_update_fs(struct llvmpipe_context *lp) ? TRUE : FALSE; lp_setup_set_fs_functions(lp->setup, - shader->current->jit_function[0], - shader->current->jit_function[1], + variant->jit_function[RAST_WHOLE], + variant->jit_function[RAST_EDGE_TEST], opaque); } + + + +void +llvmpipe_init_fs_funcs(struct llvmpipe_context *llvmpipe) +{ + llvmpipe->pipe.create_fs_state = llvmpipe_create_fs_state; + llvmpipe->pipe.bind_fs_state = llvmpipe_bind_fs_state; + llvmpipe->pipe.delete_fs_state = llvmpipe_delete_fs_state; + + llvmpipe->pipe.set_constant_buffer = llvmpipe_set_constant_buffer; +} diff --git a/src/gallium/drivers/llvmpipe/lp_state_rasterizer.c b/src/gallium/drivers/llvmpipe/lp_state_rasterizer.c index feb012816c9..622eb47ff45 100644 --- a/src/gallium/drivers/llvmpipe/lp_state_rasterizer.c +++ b/src/gallium/drivers/llvmpipe/lp_state_rasterizer.c @@ -34,23 +34,30 @@ -void * +static void * llvmpipe_create_rasterizer_state(struct pipe_context *pipe, const struct pipe_rasterizer_state *rast) { + /* We do nothing special with rasterizer state. + * The CSO handle is just a pointer to a pipe_rasterizer_state object. + */ return mem_dup(rast, sizeof(*rast)); } -void llvmpipe_bind_rasterizer_state(struct pipe_context *pipe, - void *rasterizer) + + +static void +llvmpipe_bind_rasterizer_state(struct pipe_context *pipe, void *handle) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); + const struct pipe_rasterizer_state *rasterizer = + (const struct pipe_rasterizer_state *) handle; if (llvmpipe->rasterizer == rasterizer) return; /* pass-through to draw module */ - draw_set_rasterizer_state(llvmpipe->draw, rasterizer); + draw_set_rasterizer_state(llvmpipe->draw, rasterizer, handle); llvmpipe->rasterizer = rasterizer; @@ -62,16 +69,29 @@ void llvmpipe_bind_rasterizer_state(struct pipe_context *pipe, lp_setup_set_triangle_state( llvmpipe->setup, llvmpipe->rasterizer->cull_mode, llvmpipe->rasterizer->front_winding == PIPE_WINDING_CCW, - llvmpipe->rasterizer->scissor); + llvmpipe->rasterizer->scissor, + llvmpipe->rasterizer->gl_rasterization_rules); + lp_setup_set_flatshade_first( llvmpipe->setup, + llvmpipe->rasterizer->flatshade_first); } llvmpipe->dirty |= LP_NEW_RASTERIZER; } -void llvmpipe_delete_rasterizer_state(struct pipe_context *pipe, - void *rasterizer) + +static void +llvmpipe_delete_rasterizer_state(struct pipe_context *pipe, + void *rasterizer) { FREE( rasterizer ); } + +void +llvmpipe_init_rasterizer_funcs(struct llvmpipe_context *llvmpipe) +{ + llvmpipe->pipe.create_rasterizer_state = llvmpipe_create_rasterizer_state; + llvmpipe->pipe.bind_rasterizer_state = llvmpipe_bind_rasterizer_state; + llvmpipe->pipe.delete_rasterizer_state = llvmpipe_delete_rasterizer_state; +} diff --git a/src/gallium/drivers/llvmpipe/lp_state_sampler.c b/src/gallium/drivers/llvmpipe/lp_state_sampler.c index b30a0757768..55d43368a3e 100644 --- a/src/gallium/drivers/llvmpipe/lp_state_sampler.c +++ b/src/gallium/drivers/llvmpipe/lp_state_sampler.c @@ -41,7 +41,7 @@ -void * +static void * llvmpipe_create_sampler_state(struct pipe_context *pipe, const struct pipe_sampler_state *sampler) { @@ -49,7 +49,7 @@ llvmpipe_create_sampler_state(struct pipe_context *pipe, } -void +static void llvmpipe_bind_sampler_states(struct pipe_context *pipe, unsigned num, void **sampler) { @@ -76,7 +76,7 @@ llvmpipe_bind_sampler_states(struct pipe_context *pipe, } -void +static void llvmpipe_bind_vertex_sampler_states(struct pipe_context *pipe, unsigned num_samplers, void **samplers) @@ -104,9 +104,10 @@ llvmpipe_bind_vertex_sampler_states(struct pipe_context *pipe, } -void -llvmpipe_set_sampler_textures(struct pipe_context *pipe, - unsigned num, struct pipe_texture **texture) +static void +llvmpipe_set_fragment_sampler_views(struct pipe_context *pipe, + unsigned num, + struct pipe_sampler_view **views) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); uint i; @@ -114,55 +115,83 @@ llvmpipe_set_sampler_textures(struct pipe_context *pipe, assert(num <= PIPE_MAX_SAMPLERS); /* Check for no-op */ - if (num == llvmpipe->num_textures && - !memcmp(llvmpipe->texture, texture, num * sizeof(struct pipe_texture *))) + if (num == llvmpipe->num_fragment_sampler_views && + !memcmp(llvmpipe->fragment_sampler_views, views, num * sizeof(struct pipe_sampler_view *))) return; draw_flush(llvmpipe->draw); for (i = 0; i < PIPE_MAX_SAMPLERS; i++) { - struct pipe_texture *tex = i < num ? texture[i] : NULL; + struct pipe_sampler_view *view = i < num ? views[i] : NULL; - pipe_texture_reference(&llvmpipe->texture[i], tex); + pipe_sampler_view_reference(&llvmpipe->fragment_sampler_views[i], view); } - llvmpipe->num_textures = num; + llvmpipe->num_fragment_sampler_views = num; - llvmpipe->dirty |= LP_NEW_TEXTURE; + llvmpipe->dirty |= LP_NEW_SAMPLER_VIEW; } -void -llvmpipe_set_vertex_sampler_textures(struct pipe_context *pipe, - unsigned num_textures, - struct pipe_texture **textures) +static void +llvmpipe_set_vertex_sampler_views(struct pipe_context *pipe, + unsigned num, + struct pipe_sampler_view **views) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); uint i; - assert(num_textures <= PIPE_MAX_VERTEX_SAMPLERS); + assert(num <= PIPE_MAX_VERTEX_SAMPLERS); /* Check for no-op */ - if (num_textures == llvmpipe->num_vertex_textures && - !memcmp(llvmpipe->vertex_textures, textures, num_textures * sizeof(struct pipe_texture *))) { + if (num == llvmpipe->num_vertex_sampler_views && + !memcmp(llvmpipe->vertex_sampler_views, views, num * sizeof(struct pipe_sampler_view *))) { return; } draw_flush(llvmpipe->draw); for (i = 0; i < PIPE_MAX_VERTEX_SAMPLERS; i++) { - struct pipe_texture *tex = i < num_textures ? textures[i] : NULL; + struct pipe_sampler_view *view = i < num ? views[i] : NULL; - pipe_texture_reference(&llvmpipe->vertex_textures[i], tex); + pipe_sampler_view_reference(&llvmpipe->vertex_sampler_views[i], view); } - llvmpipe->num_vertex_textures = num_textures; + llvmpipe->num_vertex_sampler_views = num; - llvmpipe->dirty |= LP_NEW_TEXTURE; + llvmpipe->dirty |= LP_NEW_SAMPLER_VIEW; } -void +static struct pipe_sampler_view * +llvmpipe_create_sampler_view(struct pipe_context *pipe, + struct pipe_resource *texture, + const struct pipe_sampler_view *templ) +{ + struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view); + + if (view) { + *view = *templ; + view->reference.count = 1; + view->texture = NULL; + pipe_resource_reference(&view->texture, texture); + view->context = pipe; + } + + return view; +} + + +static void +llvmpipe_sampler_view_destroy(struct pipe_context *pipe, + struct pipe_sampler_view *view) +{ + pipe_resource_reference(&view->texture, NULL); + FREE(view); +} + + +static void llvmpipe_delete_sampler_state(struct pipe_context *pipe, void *sampler) { @@ -170,4 +199,16 @@ llvmpipe_delete_sampler_state(struct pipe_context *pipe, } - +void +llvmpipe_init_sampler_funcs(struct llvmpipe_context *llvmpipe) +{ + llvmpipe->pipe.create_sampler_state = llvmpipe_create_sampler_state; + + llvmpipe->pipe.bind_fragment_sampler_states = llvmpipe_bind_sampler_states; + llvmpipe->pipe.bind_vertex_sampler_states = llvmpipe_bind_vertex_sampler_states; + llvmpipe->pipe.set_fragment_sampler_views = llvmpipe_set_fragment_sampler_views; + llvmpipe->pipe.set_vertex_sampler_views = llvmpipe_set_vertex_sampler_views; + llvmpipe->pipe.create_sampler_view = llvmpipe_create_sampler_view; + llvmpipe->pipe.sampler_view_destroy = llvmpipe_sampler_view_destroy; + llvmpipe->pipe.delete_sampler_state = llvmpipe_delete_sampler_state; +} diff --git a/src/gallium/drivers/llvmpipe/lp_state_surface.c b/src/gallium/drivers/llvmpipe/lp_state_surface.c index 048ac5b968b..63b8f27b39c 100644 --- a/src/gallium/drivers/llvmpipe/lp_state_surface.c +++ b/src/gallium/drivers/llvmpipe/lp_state_surface.c @@ -32,6 +32,7 @@ #include "util/u_inlines.h" #include "util/u_surface.h" #include "lp_context.h" +#include "lp_scene.h" #include "lp_state.h" #include "lp_setup.h" @@ -51,6 +52,9 @@ llvmpipe_set_framebuffer_state(struct pipe_context *pipe, boolean changed = !util_framebuffer_state_equal(&lp->framebuffer, fb); + assert(fb->width <= LP_MAX_WIDTH); + assert(fb->height <= LP_MAX_HEIGHT); + if (changed) { util_copy_framebuffer_state(&lp->framebuffer, fb); diff --git a/src/gallium/drivers/llvmpipe/lp_state_vertex.c b/src/gallium/drivers/llvmpipe/lp_state_vertex.c index 57ac25ea0cb..113f13db018 100644 --- a/src/gallium/drivers/llvmpipe/lp_state_vertex.c +++ b/src/gallium/drivers/llvmpipe/lp_state_vertex.c @@ -35,26 +35,43 @@ #include "draw/draw_context.h" -void -llvmpipe_set_vertex_elements(struct pipe_context *pipe, - unsigned count, - const struct pipe_vertex_element *attribs) +static void * +llvmpipe_create_vertex_elements_state(struct pipe_context *pipe, + unsigned count, + const struct pipe_vertex_element *attribs) { - struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); - + struct lp_velems_state *velems; assert(count <= PIPE_MAX_ATTRIBS); + velems = (struct lp_velems_state *) MALLOC(sizeof(struct lp_velems_state)); + if (velems) { + velems->count = count; + memcpy(velems->velem, attribs, sizeof(*attribs) * count); + } + return velems; +} - memcpy(llvmpipe->vertex_element, attribs, - count * sizeof(struct pipe_vertex_element)); - llvmpipe->num_vertex_elements = count; +static void +llvmpipe_bind_vertex_elements_state(struct pipe_context *pipe, + void *velems) +{ + struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); + struct lp_velems_state *lp_velems = (struct lp_velems_state *) velems; + + llvmpipe->velems = lp_velems; llvmpipe->dirty |= LP_NEW_VERTEX; - draw_set_vertex_elements(llvmpipe->draw, count, attribs); + if (velems) + draw_set_vertex_elements(llvmpipe->draw, lp_velems->count, lp_velems->velem); } +static void +llvmpipe_delete_vertex_elements_state(struct pipe_context *pipe, void *velems) +{ + FREE( velems ); +} -void +static void llvmpipe_set_vertex_buffers(struct pipe_context *pipe, unsigned count, const struct pipe_vertex_buffer *buffers) @@ -70,3 +87,15 @@ llvmpipe_set_vertex_buffers(struct pipe_context *pipe, draw_set_vertex_buffers(llvmpipe->draw, count, buffers); } + + + +void +llvmpipe_init_vertex_funcs(struct llvmpipe_context *llvmpipe) +{ + llvmpipe->pipe.create_vertex_elements_state = llvmpipe_create_vertex_elements_state; + llvmpipe->pipe.bind_vertex_elements_state = llvmpipe_bind_vertex_elements_state; + llvmpipe->pipe.delete_vertex_elements_state = llvmpipe_delete_vertex_elements_state; + + llvmpipe->pipe.set_vertex_buffers = llvmpipe_set_vertex_buffers; +} diff --git a/src/gallium/drivers/llvmpipe/lp_state_vs.c b/src/gallium/drivers/llvmpipe/lp_state_vs.c index 884e3878e62..f2d88089906 100644 --- a/src/gallium/drivers/llvmpipe/lp_state_vs.c +++ b/src/gallium/drivers/llvmpipe/lp_state_vs.c @@ -28,15 +28,17 @@ #include "pipe/p_defines.h" +#include "tgsi/tgsi_dump.h" #include "tgsi/tgsi_parse.h" #include "util/u_memory.h" #include "draw/draw_context.h" #include "lp_context.h" +#include "lp_debug.h" #include "lp_state.h" -void * +static void * llvmpipe_create_vs_state(struct pipe_context *pipe, const struct pipe_shader_state *templ) { @@ -57,6 +59,11 @@ llvmpipe_create_vs_state(struct pipe_context *pipe, if (state->draw_data == NULL) goto fail; + if (LP_DEBUG & DEBUG_TGSI) { + debug_printf("llvmpipe: Create vertex shader %p:\n", (void *) state); + tgsi_dump(templ->tokens, 0); + } + return state; fail: @@ -69,7 +76,7 @@ fail: } -void +static void llvmpipe_bind_vs_state(struct pipe_context *pipe, void *_vs) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); @@ -87,7 +94,7 @@ llvmpipe_bind_vs_state(struct pipe_context *pipe, void *_vs) } -void +static void llvmpipe_delete_vs_state(struct pipe_context *pipe, void *vs) { struct llvmpipe_context *llvmpipe = llvmpipe_context(pipe); @@ -99,3 +106,13 @@ llvmpipe_delete_vs_state(struct pipe_context *pipe, void *vs) FREE( (void *)state->shader.tokens ); FREE( state ); } + + + +void +llvmpipe_init_vs_funcs(struct llvmpipe_context *llvmpipe) +{ + llvmpipe->pipe.create_vs_state = llvmpipe_create_vs_state; + llvmpipe->pipe.bind_vs_state = llvmpipe_bind_vs_state; + llvmpipe->pipe.delete_vs_state = llvmpipe_delete_vs_state; +} diff --git a/src/gallium/drivers/llvmpipe/lp_surface.c b/src/gallium/drivers/llvmpipe/lp_surface.c index 6110b0a193e..8bd83f576f4 100644 --- a/src/gallium/drivers/llvmpipe/lp_surface.c +++ b/src/gallium/drivers/llvmpipe/lp_surface.c @@ -27,23 +27,126 @@ #include "util/u_rect.h" #include "lp_context.h" +#include "lp_flush.h" +#include "lp_limits.h" #include "lp_surface.h" +#include "lp_texture.h" + + +/** + * Adjust x, y, width, height to lie on tile bounds. + */ +static void +adjust_to_tile_bounds(unsigned x, unsigned y, unsigned width, unsigned height, + unsigned *x_tile, unsigned *y_tile, + unsigned *w_tile, unsigned *h_tile) +{ + *x_tile = x & ~(TILE_SIZE - 1); + *y_tile = y & ~(TILE_SIZE - 1); + *w_tile = ((x + width + TILE_SIZE - 1) & ~(TILE_SIZE - 1)) - *x_tile; + *h_tile = ((y + height + TILE_SIZE - 1) & ~(TILE_SIZE - 1)) - *y_tile; +} + static void lp_surface_copy(struct pipe_context *pipe, - struct pipe_surface *dest, unsigned destx, unsigned desty, + struct pipe_surface *dst, unsigned dstx, unsigned dsty, struct pipe_surface *src, unsigned srcx, unsigned srcy, unsigned width, unsigned height) { - util_surface_copy(pipe, FALSE, - dest, destx, desty, - src, srcx, srcy, - width, height); + struct llvmpipe_resource *src_tex = llvmpipe_resource(src->texture); + struct llvmpipe_resource *dst_tex = llvmpipe_resource(dst->texture); + const enum pipe_format format = src_tex->base.format; + + llvmpipe_flush_resource(pipe, + dst->texture, dst->face, dst->level, + 0, /* flush_flags */ + FALSE, /* read_only */ + FALSE, /* cpu_access */ + FALSE); /* do_not_block */ + + llvmpipe_flush_resource(pipe, + src->texture, src->face, src->level, + 0, /* flush_flags */ + TRUE, /* read_only */ + FALSE, /* cpu_access */ + FALSE); /* do_not_block */ + + /* + printf("surface copy from %u to %u: %u,%u to %u,%u %u x %u\n", + src_tex->id, dst_tex->id, + srcx, srcy, dstx, dsty, width, height); + */ + + /* set src tiles to linear layout */ + { + unsigned tx, ty, tw, th; + unsigned x, y; + + adjust_to_tile_bounds(srcx, srcy, width, height, &tx, &ty, &tw, &th); + + for (y = 0; y < th; y += TILE_SIZE) { + for (x = 0; x < tw; x += TILE_SIZE) { + (void) llvmpipe_get_texture_tile_linear(src_tex, + src->face, src->level, + LP_TEX_USAGE_READ, + tx + x, ty + y); + } + } + } + + /* set dst tiles to linear layout */ + { + unsigned tx, ty, tw, th; + unsigned x, y; + enum lp_texture_usage usage; + + /* XXX for the tiles which are completely contained by the + * dest rectangle, we could set the usage mode to WRITE_ALL. + * Just test for the case of replacing the whole dest region for now. + */ + if (width == dst_tex->base.width0 && height == dst_tex->base.height0) + usage = LP_TEX_USAGE_WRITE_ALL; + else + usage = LP_TEX_USAGE_READ_WRITE; + + adjust_to_tile_bounds(dstx, dsty, width, height, &tx, &ty, &tw, &th); + + for (y = 0; y < th; y += TILE_SIZE) { + for (x = 0; x < tw; x += TILE_SIZE) { + (void) llvmpipe_get_texture_tile_linear(dst_tex, + dst->face, dst->level, + usage, + tx + x, ty + y); + } + } + } + + /* copy */ + { + const ubyte *src_linear_ptr + = llvmpipe_get_texture_image_address(src_tex, src->face, + src->level, + LP_TEX_LAYOUT_LINEAR); + ubyte *dst_linear_ptr + = llvmpipe_get_texture_image_address(dst_tex, dst->face, + dst->level, + LP_TEX_LAYOUT_LINEAR); + + util_copy_rect(dst_linear_ptr, format, + llvmpipe_resource_stride(&dst_tex->base, dst->level), + dstx, dsty, + width, height, + src_linear_ptr, + llvmpipe_resource_stride(&src_tex->base, src->level), + srcx, srcy); + } } + void -lp_init_surface_functions(struct llvmpipe_context *lp) +llvmpipe_init_surface_functions(struct llvmpipe_context *lp) { lp->pipe.surface_copy = lp_surface_copy; lp->pipe.surface_fill = util_surface_fill; diff --git a/src/gallium/drivers/llvmpipe/lp_surface.h b/src/gallium/drivers/llvmpipe/lp_surface.h index 4d78a53c4f5..b1b896ebd90 100644 --- a/src/gallium/drivers/llvmpipe/lp_surface.h +++ b/src/gallium/drivers/llvmpipe/lp_surface.h @@ -36,7 +36,7 @@ struct llvmpipe_context; extern void -lp_init_surface_functions(struct llvmpipe_context *lp); +llvmpipe_init_surface_functions(struct llvmpipe_context *lp); #endif /* LP_SURFACE_H */ diff --git a/src/gallium/drivers/llvmpipe/lp_test.h b/src/gallium/drivers/llvmpipe/lp_test.h index a9b99945f92..338a04a4878 100644 --- a/src/gallium/drivers/llvmpipe/lp_test.h +++ b/src/gallium/drivers/llvmpipe/lp_test.h @@ -41,7 +41,7 @@ #include <stdio.h> #include <float.h> -#include <llvm-c/Core.h> +#include "gallivm/lp_bld.h" #include <llvm-c/Analysis.h> #include <llvm-c/ExecutionEngine.h> #include <llvm-c/Target.h> diff --git a/src/gallium/drivers/llvmpipe/lp_test_blend.c b/src/gallium/drivers/llvmpipe/lp_test_blend.c index 5c9d4183440..fae7bf3fcf2 100644 --- a/src/gallium/drivers/llvmpipe/lp_test_blend.c +++ b/src/gallium/drivers/llvmpipe/lp_test_blend.c @@ -38,8 +38,8 @@ #include "gallivm/lp_bld_type.h" -#include "gallivm/lp_bld_blend.h" #include "gallivm/lp_bld_debug.h" +#include "lp_bld_blend.h" #include "lp_test.h" @@ -154,7 +154,6 @@ add_blend_test(LLVMModuleRef module, enum vector_mode mode, struct lp_type type) { - LLVMTypeRef ret_type; LLVMTypeRef vec_type; LLVMTypeRef args[4]; LLVMValueRef func; @@ -165,7 +164,6 @@ add_blend_test(LLVMModuleRef module, LLVMBasicBlockRef block; LLVMBuilderRef builder; - ret_type = LLVMInt64Type(); vec_type = lp_build_vec_type(type); args[3] = args[2] = args[1] = args[0] = LLVMPointerType(vec_type, 0); diff --git a/src/gallium/drivers/llvmpipe/lp_test_format.c b/src/gallium/drivers/llvmpipe/lp_test_format.c index d05157991bb..fbac815d107 100644 --- a/src/gallium/drivers/llvmpipe/lp_test_format.c +++ b/src/gallium/drivers/llvmpipe/lp_test_format.c @@ -28,68 +28,23 @@ #include <stdlib.h> #include <stdio.h> +#include <float.h> -#include <llvm-c/Core.h> +#include "gallivm/lp_bld.h" +#include "gallivm/lp_bld_init.h" #include <llvm-c/Analysis.h> -#include <llvm-c/ExecutionEngine.h> #include <llvm-c/Target.h> #include <llvm-c/Transforms/Scalar.h> -#include "util/u_cpu_detect.h" +#include "util/u_memory.h" #include "util/u_format.h" +#include "util/u_format_tests.h" +#include "util/u_format_s3tc.h" #include "gallivm/lp_bld_format.h" #include "lp_test.h" -struct pixel_test_case -{ - enum pipe_format format; - uint32_t packed; - double unpacked[4]; -}; - - -struct pixel_test_case test_cases[] = -{ - {PIPE_FORMAT_B5G6R5_UNORM, 0x0000, {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_B5G6R5_UNORM, 0x001f, {0.0, 0.0, 1.0, 1.0}}, - {PIPE_FORMAT_B5G6R5_UNORM, 0x07e0, {0.0, 1.0, 0.0, 1.0}}, - {PIPE_FORMAT_B5G6R5_UNORM, 0xf800, {1.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_B5G6R5_UNORM, 0xffff, {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_B5G5R5A1_UNORM, 0x0000, {0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_B5G5R5A1_UNORM, 0x001f, {0.0, 0.0, 1.0, 0.0}}, - {PIPE_FORMAT_B5G5R5A1_UNORM, 0x03e0, {0.0, 1.0, 0.0, 0.0}}, - {PIPE_FORMAT_B5G5R5A1_UNORM, 0x7c00, {1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_B5G5R5A1_UNORM, 0x8000, {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_B5G5R5A1_UNORM, 0xffff, {1.0, 1.0, 1.0, 1.0}}, - - {PIPE_FORMAT_B8G8R8A8_UNORM, 0x00000000, {0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_B8G8R8A8_UNORM, 0x000000ff, {0.0, 0.0, 1.0, 0.0}}, - {PIPE_FORMAT_B8G8R8A8_UNORM, 0x0000ff00, {0.0, 1.0, 0.0, 0.0}}, - {PIPE_FORMAT_B8G8R8A8_UNORM, 0x00ff0000, {1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_B8G8R8A8_UNORM, 0xff000000, {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_B8G8R8A8_UNORM, 0xffffffff, {1.0, 1.0, 1.0, 1.0}}, - -#if 0 - {PIPE_FORMAT_R8G8B8A8_UNORM, 0x00000000, {0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_UNORM, 0x000000ff, {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_R8G8B8A8_UNORM, 0x0000ff00, {0.0, 0.0, 1.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_UNORM, 0x00ff0000, {0.0, 1.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_UNORM, 0xff000000, {1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_R8G8B8A8_UNORM, 0xffffffff, {1.0, 1.0, 1.0, 1.0}}, -#endif - - {PIPE_FORMAT_A8R8G8B8_UNORM, 0x00000000, {0.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_A8R8G8B8_UNORM, 0x000000ff, {0.0, 0.0, 0.0, 1.0}}, - {PIPE_FORMAT_A8R8G8B8_UNORM, 0x0000ff00, {1.0, 0.0, 0.0, 0.0}}, - {PIPE_FORMAT_A8R8G8B8_UNORM, 0x00ff0000, {0.0, 1.0, 0.0, 0.0}}, - {PIPE_FORMAT_A8R8G8B8_UNORM, 0xff000000, {0.0, 0.0, 1.0, 0.0}}, - {PIPE_FORMAT_A8R8G8B8_UNORM, 0xffffffff, {1.0, 1.0, 1.0, 1.0}}, -}; - - void write_tsv_header(FILE *fp) { @@ -114,83 +69,43 @@ write_tsv_row(FILE *fp, } -typedef void (*load_ptr_t)(const uint32_t packed, float *); +typedef void +(*fetch_ptr_t)(float *, const void *packed, + unsigned i, unsigned j); static LLVMValueRef -add_load_rgba_test(LLVMModuleRef module, - const struct util_format_description *desc) -{ - LLVMTypeRef args[2]; - LLVMValueRef func; - LLVMValueRef packed; - LLVMValueRef rgba_ptr; - LLVMBasicBlockRef block; - LLVMBuilderRef builder; - LLVMValueRef rgba; - - args[0] = LLVMInt32Type(); - args[1] = LLVMPointerType(LLVMVectorType(LLVMFloatType(), 4), 0); - - func = LLVMAddFunction(module, "load", LLVMFunctionType(LLVMVoidType(), args, 2, 0)); - LLVMSetFunctionCallConv(func, LLVMCCallConv); - packed = LLVMGetParam(func, 0); - rgba_ptr = LLVMGetParam(func, 1); - - block = LLVMAppendBasicBlock(func, "entry"); - builder = LLVMCreateBuilder(); - LLVMPositionBuilderAtEnd(builder, block); - - if(desc->block.bits < 32) - packed = LLVMBuildTrunc(builder, packed, LLVMIntType(desc->block.bits), ""); - - rgba = lp_build_unpack_rgba_aos(builder, desc, packed); - - LLVMBuildStore(builder, rgba, rgba_ptr); - - LLVMBuildRetVoid(builder); - - LLVMDisposeBuilder(builder); - return func; -} - - -typedef void (*store_ptr_t)(uint32_t *, const float *); - - -static LLVMValueRef -add_store_rgba_test(LLVMModuleRef module, +add_fetch_rgba_test(LLVMModuleRef lp_build_module, const struct util_format_description *desc) { - LLVMTypeRef args[2]; + LLVMTypeRef args[4]; LLVMValueRef func; LLVMValueRef packed_ptr; LLVMValueRef rgba_ptr; + LLVMValueRef i; + LLVMValueRef j; LLVMBasicBlockRef block; LLVMBuilderRef builder; LLVMValueRef rgba; - LLVMValueRef packed; - args[0] = LLVMPointerType(LLVMInt32Type(), 0); - args[1] = LLVMPointerType(LLVMVectorType(LLVMFloatType(), 4), 0); + args[0] = LLVMPointerType(LLVMVectorType(LLVMFloatType(), 4), 0); + args[1] = LLVMPointerType(LLVMInt8Type(), 0); + args[3] = args[2] = LLVMInt32Type(); - func = LLVMAddFunction(module, "store", LLVMFunctionType(LLVMVoidType(), args, 2, 0)); + func = LLVMAddFunction(lp_build_module, "fetch", LLVMFunctionType(LLVMVoidType(), args, Elements(args), 0)); LLVMSetFunctionCallConv(func, LLVMCCallConv); - packed_ptr = LLVMGetParam(func, 0); - rgba_ptr = LLVMGetParam(func, 1); + rgba_ptr = LLVMGetParam(func, 0); + packed_ptr = LLVMGetParam(func, 1); + i = LLVMGetParam(func, 2); + j = LLVMGetParam(func, 3); block = LLVMAppendBasicBlock(func, "entry"); builder = LLVMCreateBuilder(); LLVMPositionBuilderAtEnd(builder, block); - rgba = LLVMBuildLoad(builder, rgba_ptr, ""); - - packed = lp_build_pack_rgba_aos(builder, desc, rgba); - - if(desc->block.bits < 32) - packed = LLVMBuildZExt(builder, packed, LLVMInt32Type(), ""); + rgba = lp_build_fetch_rgba_aos(builder, desc, packed_ptr, i, j); - LLVMBuildStore(builder, packed, packed_ptr); + LLVMBuildStore(builder, rgba, rgba_ptr); LLVMBuildRetVoid(builder); @@ -201,47 +116,27 @@ add_store_rgba_test(LLVMModuleRef module, PIPE_ALIGN_STACK static boolean -test_format(unsigned verbose, FILE *fp, const struct pixel_test_case *test) +test_format(unsigned verbose, FILE *fp, + const struct util_format_description *desc, + const struct util_format_test_case *test) { - LLVMModuleRef module = NULL; - LLVMValueRef load = NULL; - LLVMValueRef store = NULL; - LLVMExecutionEngineRef engine = NULL; - LLVMModuleProviderRef provider = NULL; + LLVMValueRef fetch = NULL; LLVMPassManagerRef pass = NULL; - char *error = NULL; - const struct util_format_description *desc; - load_ptr_t load_ptr; - store_ptr_t store_ptr; + fetch_ptr_t fetch_ptr; float unpacked[4]; - unsigned packed; boolean success; unsigned i; - desc = util_format_description(test->format); - fprintf(stderr, "%s\n", desc->name); - - module = LLVMModuleCreateWithName("test"); - - load = add_load_rgba_test(module, desc); - store = add_store_rgba_test(module, desc); - - if(LLVMVerifyModule(module, LLVMPrintMessageAction, &error)) { - LLVMDumpModule(module); - abort(); - } - LLVMDisposeMessage(error); + fetch = add_fetch_rgba_test(lp_build_module, desc); - provider = LLVMCreateModuleProviderForExistingModule(module); - if (LLVMCreateJITCompiler(&engine, provider, 1, &error)) { - fprintf(stderr, "%s\n", error); - LLVMDisposeMessage(error); + if (LLVMVerifyFunction(fetch, LLVMPrintMessageAction)) { + LLVMDumpValue(fetch); abort(); } #if 0 pass = LLVMCreatePassManager(); - LLVMAddTargetData(LLVMGetExecutionEngineTargetData(engine), pass); + LLVMAddTargetData(LLVMGetExecutionEngineTargetData(lp_build_engine), pass); /* These are the passes currently listed in llvm-c/Transforms/Scalar.h, * but there are more on SVN. */ LLVMAddConstantPropagationPass(pass); @@ -249,40 +144,39 @@ test_format(unsigned verbose, FILE *fp, const struct pixel_test_case *test) LLVMAddPromoteMemoryToRegisterPass(pass); LLVMAddGVNPass(pass); LLVMAddCFGSimplificationPass(pass); - LLVMRunPassManager(pass, module); + LLVMRunPassManager(pass, lp_build_module); #else (void)pass; #endif - load_ptr = (load_ptr_t) LLVMGetPointerToGlobal(engine, load); - store_ptr = (store_ptr_t)LLVMGetPointerToGlobal(engine, store); + fetch_ptr = (fetch_ptr_t) LLVMGetPointerToGlobal(lp_build_engine, fetch); memset(unpacked, 0, sizeof unpacked); - packed = 0; - load_ptr(test->packed, unpacked); - store_ptr(&packed, unpacked); + fetch_ptr(unpacked, test->packed, 0, 0); success = TRUE; - if(test->packed != packed) - success = FALSE; for(i = 0; i < 4; ++i) - if(test->unpacked[i] != unpacked[i]) + if (fabs((float)test->unpacked[0][0][i] - unpacked[i]) > FLT_EPSILON) success = FALSE; if (!success) { printf("FAILED\n"); - printf(" Packed: %08x\n", test->packed); - printf(" %08x\n", packed); - printf(" Unpacked: %f %f %f %f\n", unpacked[0], unpacked[1], unpacked[2], unpacked[3]); - printf(" %f %f %f %f\n", test->unpacked[0], test->unpacked[1], test->unpacked[2], test->unpacked[3]); - LLVMDumpModule(module); + printf(" Packed: %02x %02x %02x %02x\n", + test->packed[0], test->packed[1], test->packed[2], test->packed[3]); + printf(" Unpacked: %f %f %f %f obtained\n", + unpacked[0], unpacked[1], unpacked[2], unpacked[3]); + printf(" %f %f %f %f expected\n", + test->unpacked[0][0][0], + test->unpacked[0][0][1], + test->unpacked[0][0][2], + test->unpacked[0][0][3]); + LLVMDumpValue(fetch); } - LLVMFreeMachineCodeForFunction(engine, store); - LLVMFreeMachineCodeForFunction(engine, load); + LLVMFreeMachineCodeForFunction(lp_build_engine, fetch); + LLVMDeleteFunction(fetch); - LLVMDisposeExecutionEngine(engine); if(pass) LLVMDisposePassManager(pass); @@ -293,15 +187,66 @@ test_format(unsigned verbose, FILE *fp, const struct pixel_test_case *test) } + +static boolean +test_one(unsigned verbose, FILE *fp, + const struct util_format_description *format_desc) +{ + unsigned i; + bool success = TRUE; + + printf("Testing %s ...\n", + format_desc->name); + + for (i = 0; i < util_format_nr_test_cases; ++i) { + const struct util_format_test_case *test = &util_format_test_cases[i]; + + if (test->format == format_desc->format) { + + if (!test_format(verbose, fp, format_desc, test)) { + success = FALSE; + } + + } + } + + return success; +} + + boolean test_all(unsigned verbose, FILE *fp) { - unsigned i; + enum pipe_format format; bool success = TRUE; - for (i = 0; i < sizeof(test_cases)/sizeof(test_cases[0]); ++i) - if(!test_format(verbose, fp, &test_cases[i])) - success = FALSE; + for (format = 1; format < PIPE_FORMAT_COUNT; ++format) { + const struct util_format_description *format_desc; + + format_desc = util_format_description(format); + if (!format_desc) { + continue; + } + + /* + * TODO: test more + */ + + if (format_desc->block.width != 1 || + format_desc->block.height != 1 || + format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS) { + continue; + } + + if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC && + !util_format_s3tc_enabled) { + continue; + } + + if (!test_one(verbose, fp, format_desc)) { + success = FALSE; + } + } return success; } diff --git a/src/gallium/drivers/llvmpipe/lp_test_printf.c b/src/gallium/drivers/llvmpipe/lp_test_printf.c new file mode 100644 index 00000000000..e5e5925012a --- /dev/null +++ b/src/gallium/drivers/llvmpipe/lp_test_printf.c @@ -0,0 +1,162 @@ +/************************************************************************** + * + * Copyright 2010 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + + +#include <stdlib.h> +#include <stdio.h> + +#include "gallivm/lp_bld.h" +#include "gallivm/lp_bld_printf.h" + +#include <llvm-c/Analysis.h> +#include <llvm-c/ExecutionEngine.h> +#include <llvm-c/Target.h> +#include <llvm-c/Transforms/Scalar.h> + +#include "lp_test.h" + + +struct printf_test_case { +}; + +void +write_tsv_header(FILE *fp) +{ + fprintf(fp, + "result\t" + "format\n"); + + fflush(fp); +} + + + +typedef void (*test_printf_t)(int i); + +static LLVMValueRef +add_printf_test(LLVMModuleRef module) +{ + LLVMTypeRef args[1] = { LLVMIntType(32) }; + LLVMValueRef func = LLVMAddFunction(module, "test_printf", LLVMFunctionType(LLVMVoidType(), args, 1, 0)); + LLVMBuilderRef builder = LLVMCreateBuilder(); + LLVMBasicBlockRef block = LLVMAppendBasicBlock(func, "entry"); + + LLVMSetFunctionCallConv(func, LLVMCCallConv); + + LLVMPositionBuilderAtEnd(builder, block); + lp_build_printf(builder, "hello, world\n"); + lp_build_printf(builder, "print 5 6: %d %d\n", LLVMConstInt(LLVMInt32Type(), 5, 0), + LLVMConstInt(LLVMInt32Type(), 6, 0)); + LLVMBuildRetVoid(builder); + LLVMDisposeBuilder(builder); + return func; +} + + +PIPE_ALIGN_STACK +static boolean +test_printf(unsigned verbose, FILE *fp, const struct printf_test_case *testcase) +{ + LLVMModuleRef module = NULL; + LLVMValueRef test = NULL; + LLVMExecutionEngineRef engine = NULL; + LLVMModuleProviderRef provider = NULL; + LLVMPassManagerRef pass = NULL; + char *error = NULL; + test_printf_t test_printf; + float unpacked[4]; + unsigned packed; + boolean success = TRUE; + + module = LLVMModuleCreateWithName("test"); + + test = add_printf_test(module); + + if(LLVMVerifyModule(module, LLVMPrintMessageAction, &error)) { + LLVMDumpModule(module); + abort(); + } + LLVMDisposeMessage(error); + + provider = LLVMCreateModuleProviderForExistingModule(module); + if (LLVMCreateJITCompiler(&engine, provider, 1, &error)) { + fprintf(stderr, "%s\n", error); + LLVMDisposeMessage(error); + abort(); + } + +#if 0 + pass = LLVMCreatePassManager(); + LLVMAddTargetData(LLVMGetExecutionEngineTargetData(engine), pass); + /* These are the passes currently listed in llvm-c/Transforms/Scalar.h, + * but there are more on SVN. */ + LLVMAddConstantPropagationPass(pass); + LLVMAddInstructionCombiningPass(pass); + LLVMAddPromoteMemoryToRegisterPass(pass); + LLVMAddGVNPass(pass); + LLVMAddCFGSimplificationPass(pass); + LLVMRunPassManager(pass, module); +#else + (void)pass; +#endif + + test_printf = (test_printf_t)LLVMGetPointerToGlobal(engine, test); + + memset(unpacked, 0, sizeof unpacked); + packed = 0; + + + // LLVMDumpModule(module); + + test_printf(0); + + LLVMFreeMachineCodeForFunction(engine, test); + + LLVMDisposeExecutionEngine(engine); + if(pass) + LLVMDisposePassManager(pass); + + return success; +} + + +boolean +test_all(unsigned verbose, FILE *fp) +{ + bool success = TRUE; + + test_printf(verbose, fp, NULL); + + return success; +} + + +boolean +test_some(unsigned verbose, FILE *fp, unsigned long n) +{ + return test_all(verbose, fp); +} diff --git a/src/gallium/drivers/llvmpipe/lp_tex_sample_llvm.c b/src/gallium/drivers/llvmpipe/lp_tex_sample.c index 515c9089dd5..74b7393e4ec 100644 --- a/src/gallium/drivers/llvmpipe/lp_tex_sample_llvm.c +++ b/src/gallium/drivers/llvmpipe/lp_tex_sample.c @@ -51,10 +51,11 @@ /** - * This provides the bridge between the sampler state store in lp_jit_context - * and lp_jit_texture and the sampler code generator. It provides the - * texture layout information required by the texture sampler code generator - * in terms of the state stored in lp_jit_context and lp_jit_texture in runtime. + * This provides the bridge between the sampler state store in + * lp_jit_context and lp_jit_texture and the sampler code + * generator. It provides the texture layout information required by + * the texture sampler code generator in terms of the state stored in + * lp_jit_context and lp_jit_texture in runtime. */ struct llvmpipe_sampler_dynamic_state { @@ -79,6 +80,9 @@ struct lp_llvm_sampler_soa /** * Fetch the specified member of the lp_jit_texture structure. + * \param emit_load if TRUE, emit the LLVM load instruction to actually + * fetch the field's value. Otherwise, just emit the + * GEP code to address the field. * * @sa http://llvm.org/docs/GetElementPtr.html */ @@ -87,9 +91,11 @@ lp_llvm_texture_member(struct lp_sampler_dynamic_state *base, LLVMBuilderRef builder, unsigned unit, unsigned member_index, - const char *member_name) + const char *member_name, + boolean emit_load) { - struct llvmpipe_sampler_dynamic_state *state = (struct llvmpipe_sampler_dynamic_state *)base; + struct llvmpipe_sampler_dynamic_state *state = + (struct llvmpipe_sampler_dynamic_state *)base; LLVMValueRef indices[4]; LLVMValueRef ptr; LLVMValueRef res; @@ -99,7 +105,7 @@ lp_llvm_texture_member(struct lp_sampler_dynamic_state *base, /* context[0] */ indices[0] = LLVMConstInt(LLVMInt32Type(), 0, 0); /* context[0].textures */ - indices[1] = LLVMConstInt(LLVMInt32Type(), LP_JIT_CONTEXT_TEXTURES_INDEX, 0); + indices[1] = LLVMConstInt(LLVMInt32Type(), LP_JIT_CTX_TEXTURES, 0); /* context[0].textures[unit] */ indices[2] = LLVMConstInt(LLVMInt32Type(), unit, 0); /* context[0].textures[unit].member */ @@ -107,7 +113,10 @@ lp_llvm_texture_member(struct lp_sampler_dynamic_state *base, ptr = LLVMBuildGEP(builder, state->context_ptr, indices, Elements(indices), ""); - res = LLVMBuildLoad(builder, ptr, ""); + if (emit_load) + res = LLVMBuildLoad(builder, ptr, ""); + else + res = ptr; lp_build_name(res, "context.texture%u.%s", unit, member_name); @@ -116,26 +125,31 @@ lp_llvm_texture_member(struct lp_sampler_dynamic_state *base, /** - * Helper macro to instantiate the functions that generate the code to fetch - * the members of lp_jit_texture to fulfill the sampler code generator requests. + * Helper macro to instantiate the functions that generate the code to + * fetch the members of lp_jit_texture to fulfill the sampler code + * generator requests. * - * This complexity is the price we have to pay to keep the texture sampler code - * generator a reusable module without dependencies to llvmpipe internals. + * This complexity is the price we have to pay to keep the texture + * sampler code generator a reusable module without dependencies to + * llvmpipe internals. */ -#define LP_LLVM_TEXTURE_MEMBER(_name, _index) \ +#define LP_LLVM_TEXTURE_MEMBER(_name, _index, _emit_load) \ static LLVMValueRef \ lp_llvm_texture_##_name( struct lp_sampler_dynamic_state *base, \ LLVMBuilderRef builder, \ unsigned unit) \ { \ - return lp_llvm_texture_member(base, builder, unit, _index, #_name ); \ + return lp_llvm_texture_member(base, builder, unit, _index, #_name, _emit_load ); \ } -LP_LLVM_TEXTURE_MEMBER(width, LP_JIT_TEXTURE_WIDTH) -LP_LLVM_TEXTURE_MEMBER(height, LP_JIT_TEXTURE_HEIGHT) -LP_LLVM_TEXTURE_MEMBER(stride, LP_JIT_TEXTURE_STRIDE) -LP_LLVM_TEXTURE_MEMBER(data_ptr, LP_JIT_TEXTURE_DATA) +LP_LLVM_TEXTURE_MEMBER(width, LP_JIT_TEXTURE_WIDTH, TRUE) +LP_LLVM_TEXTURE_MEMBER(height, LP_JIT_TEXTURE_HEIGHT, TRUE) +LP_LLVM_TEXTURE_MEMBER(depth, LP_JIT_TEXTURE_DEPTH, TRUE) +LP_LLVM_TEXTURE_MEMBER(last_level, LP_JIT_TEXTURE_LAST_LEVEL, TRUE) +LP_LLVM_TEXTURE_MEMBER(row_stride, LP_JIT_TEXTURE_ROW_STRIDE, FALSE) +LP_LLVM_TEXTURE_MEMBER(img_stride, LP_JIT_TEXTURE_IMG_STRIDE, FALSE) +LP_LLVM_TEXTURE_MEMBER(data_ptr, LP_JIT_TEXTURE_DATA, FALSE) static void @@ -189,7 +203,10 @@ lp_llvm_sampler_soa_create(const struct lp_sampler_static_state *static_state, sampler->base.emit_fetch_texel = lp_llvm_sampler_soa_emit_fetch_texel; sampler->dynamic_state.base.width = lp_llvm_texture_width; sampler->dynamic_state.base.height = lp_llvm_texture_height; - sampler->dynamic_state.base.stride = lp_llvm_texture_stride; + sampler->dynamic_state.base.depth = lp_llvm_texture_depth; + sampler->dynamic_state.base.last_level = lp_llvm_texture_last_level; + sampler->dynamic_state.base.row_stride = lp_llvm_texture_row_stride; + sampler->dynamic_state.base.img_stride = lp_llvm_texture_img_stride; sampler->dynamic_state.base.data_ptr = lp_llvm_texture_data_ptr; sampler->dynamic_state.static_state = static_state; sampler->dynamic_state.context_ptr = context_ptr; diff --git a/src/gallium/drivers/llvmpipe/lp_tex_sample.h b/src/gallium/drivers/llvmpipe/lp_tex_sample.h index cb59a94464a..1228a831f3b 100644 --- a/src/gallium/drivers/llvmpipe/lp_tex_sample.h +++ b/src/gallium/drivers/llvmpipe/lp_tex_sample.h @@ -29,7 +29,7 @@ #define LP_TEX_SAMPLE_H -#include <llvm-c/Core.h> +#include "gallivm/lp_bld.h" struct lp_sampler_static_state; diff --git a/src/gallium/drivers/llvmpipe/lp_texture.c b/src/gallium/drivers/llvmpipe/lp_texture.c index 7f456355428..3468fbfb1f3 100644 --- a/src/gallium/drivers/llvmpipe/lp_texture.c +++ b/src/gallium/drivers/llvmpipe/lp_texture.c @@ -30,182 +30,423 @@ * Michel Dänzer <[email protected]> */ +#include <stdio.h> + #include "pipe/p_context.h" #include "pipe/p_defines.h" -#include "util/u_inlines.h" +#include "util/u_inlines.h" #include "util/u_format.h" #include "util/u_math.h" #include "util/u_memory.h" +#include "util/u_transfer.h" #include "lp_context.h" +#include "lp_flush.h" #include "lp_screen.h" +#include "lp_tile_image.h" #include "lp_texture.h" -#include "lp_tile_size.h" -#include "lp_winsys.h" +#include "lp_setup.h" + +#include "state_tracker/sw_winsys.h" + + +static INLINE boolean +resource_is_texture(const struct pipe_resource *resource) +{ + switch (resource->target) { + case PIPE_BUFFER: + return FALSE; + case PIPE_TEXTURE_1D: + case PIPE_TEXTURE_2D: + case PIPE_TEXTURE_3D: + case PIPE_TEXTURE_CUBE: + return TRUE; + default: + assert(0); + return FALSE; + } +} + + + +/** + * Allocate storage for llvmpipe_texture::layout array. + * The number of elements is width_in_tiles * height_in_tiles. + */ +static enum lp_texture_layout * +alloc_layout_array(unsigned num_slices, unsigned width, unsigned height) +{ + const unsigned tx = align(width, TILE_SIZE) / TILE_SIZE; + const unsigned ty = align(height, TILE_SIZE) / TILE_SIZE; + + assert(num_slices * tx * ty > 0); + assert(LP_TEX_LAYOUT_NONE == 0); /* calloc'ing LP_TEX_LAYOUT_NONE here */ + + return (enum lp_texture_layout *) + CALLOC(num_slices * tx * ty, sizeof(enum lp_texture_layout)); +} + /** * Conventional allocation path for non-display textures: - * Simple, maximally packed layout. + * Just compute row strides here. Storage is allocated on demand later. */ static boolean llvmpipe_texture_layout(struct llvmpipe_screen *screen, - struct llvmpipe_texture *lpt) + struct llvmpipe_resource *lpr) { - struct pipe_texture *pt = &lpt->base; + struct pipe_resource *pt = &lpr->base; unsigned level; unsigned width = pt->width0; unsigned height = pt->height0; unsigned depth = pt->depth0; - unsigned buffer_size = 0; + + assert(LP_MAX_TEXTURE_2D_LEVELS <= LP_MAX_TEXTURE_LEVELS); + assert(LP_MAX_TEXTURE_3D_LEVELS <= LP_MAX_TEXTURE_LEVELS); for (level = 0; level <= pt->last_level; level++) { - unsigned nblocksx, nblocksy; + const unsigned width_t = align(width, TILE_SIZE) / TILE_SIZE; + const unsigned height_t = align(height, TILE_SIZE) / TILE_SIZE; + unsigned nblocksx, num_slices; + + if (lpr->base.target == PIPE_TEXTURE_CUBE) + num_slices = 6; + else if (lpr->base.target == PIPE_TEXTURE_3D) + num_slices = depth; + else + num_slices = 1; /* Allocate storage for whole quads. This is particularly important * for depth surfaces, which are currently stored in a swizzled format. */ nblocksx = util_format_get_nblocksx(pt->format, align(width, TILE_SIZE)); - nblocksy = util_format_get_nblocksy(pt->format, align(height, TILE_SIZE)); - lpt->stride[level] = align(nblocksx * util_format_get_blocksize(pt->format), 16); + lpr->row_stride[level] = + align(nblocksx * util_format_get_blocksize(pt->format), 16); - lpt->level_offset[level] = buffer_size; + lpr->img_stride[level] = lpr->row_stride[level] * align(height, TILE_SIZE); - buffer_size += (nblocksy * - ((pt->target == PIPE_TEXTURE_CUBE) ? 6 : depth) * - lpt->stride[level]); + lpr->tiles_per_row[level] = width_t; + lpr->tiles_per_image[level] = width_t * height_t; + lpr->num_slices_faces[level] = num_slices; + lpr->layout[level] = alloc_layout_array(num_slices, width, height); width = u_minify(width, 1); height = u_minify(height, 1); depth = u_minify(depth, 1); } - lpt->data = align_malloc(buffer_size, 16); - - return lpt->data != NULL; + return TRUE; } static boolean llvmpipe_displaytarget_layout(struct llvmpipe_screen *screen, - struct llvmpipe_texture *lpt) + struct llvmpipe_resource *lpr) { - struct llvmpipe_winsys *winsys = screen->winsys; + struct sw_winsys *winsys = screen->winsys; /* Round up the surface size to a multiple of the tile size to * avoid tile clipping. */ - unsigned width = align(lpt->base.width0, TILE_SIZE); - unsigned height = align(lpt->base.height0, TILE_SIZE); - - lpt->dt = winsys->displaytarget_create(winsys, - lpt->base.format, + const unsigned width = align(lpr->base.width0, TILE_SIZE); + const unsigned height = align(lpr->base.height0, TILE_SIZE); + const unsigned width_t = align(width, TILE_SIZE) / TILE_SIZE; + const unsigned height_t = align(height, TILE_SIZE) / TILE_SIZE; + + lpr->tiles_per_row[0] = width_t; + lpr->tiles_per_image[0] = width_t * height_t; + lpr->num_slices_faces[0] = 1; + lpr->img_stride[0] = 0; + + lpr->layout[0] = alloc_layout_array(1, width, height); + //lpr->layout[0][0] = LP_TEX_LAYOUT_LINEAR; + + lpr->dt = winsys->displaytarget_create(winsys, + lpr->base.bind, + lpr->base.format, width, height, 16, - &lpt->stride[0] ); + &lpr->row_stride[0] ); - return lpt->dt != NULL; + return lpr->dt != NULL; } -static struct pipe_texture * -llvmpipe_texture_create(struct pipe_screen *_screen, - const struct pipe_texture *templat) +static struct pipe_resource * +llvmpipe_resource_create(struct pipe_screen *_screen, + const struct pipe_resource *templat) { + static unsigned id_counter = 0; struct llvmpipe_screen *screen = llvmpipe_screen(_screen); - struct llvmpipe_texture *lpt = CALLOC_STRUCT(llvmpipe_texture); - if (!lpt) + struct llvmpipe_resource *lpr = CALLOC_STRUCT(llvmpipe_resource); + if (!lpr) return NULL; - lpt->base = *templat; - pipe_reference_init(&lpt->base.reference, 1); - lpt->base.screen = &screen->base; + lpr->base = *templat; + pipe_reference_init(&lpr->base.reference, 1); + lpr->base.screen = &screen->base; - if (lpt->base.tex_usage & (PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_PRIMARY)) { - if (!llvmpipe_displaytarget_layout(screen, lpt)) - goto fail; + assert(lpr->base.bind); + + if (resource_is_texture(&lpr->base)) { + if (lpr->base.bind & PIPE_BIND_DISPLAY_TARGET) { + /* displayable surface */ + if (!llvmpipe_displaytarget_layout(screen, lpr)) + goto fail; + assert(lpr->layout[0][0] == LP_TEX_LAYOUT_NONE); + } + else { + /* texture map */ + if (!llvmpipe_texture_layout(screen, lpr)) + goto fail; + assert(lpr->layout[0][0] == LP_TEX_LAYOUT_NONE); + } + assert(lpr->layout[0]); } else { - if (!llvmpipe_texture_layout(screen, lpt)) + /* other data (vertex buffer, const buffer, etc) */ + const enum pipe_format format = templat->format; + const uint w = templat->width0 / util_format_get_blockheight(format); + const uint h = templat->height0 / util_format_get_blockwidth(format); + const uint d = templat->depth0; + const uint bpp = util_format_get_blocksize(format); + const uint bytes = w * h * d * bpp; + lpr->data = align_malloc(bytes, 16); + if (!lpr->data) goto fail; } - - return &lpt->base; + + lpr->id = id_counter++; + + return &lpr->base; fail: - FREE(lpt); + FREE(lpr); return NULL; } -static struct pipe_texture * -llvmpipe_texture_blanket(struct pipe_screen * screen, - const struct pipe_texture *base, - const unsigned *stride, - struct pipe_buffer *buffer) +static void +llvmpipe_resource_destroy(struct pipe_screen *pscreen, + struct pipe_resource *pt) { - /* FIXME */ -#if 0 - struct llvmpipe_texture *lpt; - assert(screen); + struct llvmpipe_screen *screen = llvmpipe_screen(pscreen); + struct llvmpipe_resource *lpr = llvmpipe_resource(pt); - /* Only supports one type */ - if (base->target != PIPE_TEXTURE_2D || - base->last_level != 0 || - base->depth0 != 1) { - return NULL; - } + if (lpr->dt) { + /* display target */ + struct sw_winsys *winsys = screen->winsys; + winsys->displaytarget_destroy(winsys, lpr->dt); - lpt = CALLOC_STRUCT(llvmpipe_texture); - if (!lpt) - return NULL; + FREE(lpr->layout[0]); + } + else if (resource_is_texture(pt)) { + /* regular texture */ + uint level; + + /* free linear image data */ + for (level = 0; level < Elements(lpr->linear); level++) { + if (lpr->linear[level].data) { + align_free(lpr->linear[level].data); + lpr->linear[level].data = NULL; + } + } - lpt->base = *base; - pipe_reference_init(&lpt->base.reference, 1); - lpt->base.screen = screen; - lpt->stride[0] = stride[0]; + /* free tiled image data */ + for (level = 0; level < Elements(lpr->tiled); level++) { + if (lpr->tiled[level].data) { + align_free(lpr->tiled[level].data); + lpr->tiled[level].data = NULL; + } + } - pipe_buffer_reference(&lpt->buffer, buffer); + /* free layout flag arrays */ + for (level = 0; level < Elements(lpr->tiled); level++) { + FREE(lpr->layout[level]); + lpr->layout[level] = NULL; + } + } + else if (!lpr->userBuffer) { + assert(lpr->data); + align_free(lpr->data); + } - return &lpt->base; -#else - debug_printf("llvmpipe_texture_blanket() not implemented!"); - return NULL; -#endif + FREE(lpr); } -static void -llvmpipe_texture_destroy(struct pipe_texture *pt) +/** + * Map a resource for read/write. + */ +void * +llvmpipe_resource_map(struct pipe_resource *resource, + unsigned face, + unsigned level, + unsigned zslice, + enum lp_texture_usage tex_usage, + enum lp_texture_layout layout) { - struct llvmpipe_screen *screen = llvmpipe_screen(pt->screen); - struct llvmpipe_texture *lpt = llvmpipe_texture(pt); + struct llvmpipe_resource *lpr = llvmpipe_resource(resource); + uint8_t *map; - if (lpt->dt) { + assert(face < 6); + assert(level < LP_MAX_TEXTURE_LEVELS); + + assert(tex_usage == LP_TEX_USAGE_READ || + tex_usage == LP_TEX_USAGE_READ_WRITE || + tex_usage == LP_TEX_USAGE_WRITE_ALL); + + assert(layout == LP_TEX_LAYOUT_NONE || + layout == LP_TEX_LAYOUT_TILED || + layout == LP_TEX_LAYOUT_LINEAR); + + if (lpr->dt) { /* display target */ - struct llvmpipe_winsys *winsys = screen->winsys; - winsys->displaytarget_destroy(winsys, lpt->dt); + struct llvmpipe_screen *screen = llvmpipe_screen(resource->screen); + struct sw_winsys *winsys = screen->winsys; + unsigned dt_usage; + uint8_t *map2; + + if (tex_usage == LP_TEX_USAGE_READ) { + dt_usage = PIPE_TRANSFER_READ; + } + else { + dt_usage = PIPE_TRANSFER_READ_WRITE; + } + + assert(face == 0); + assert(level == 0); + assert(zslice == 0); + + /* FIXME: keep map count? */ + map = winsys->displaytarget_map(winsys, lpr->dt, dt_usage); + + /* install this linear image in texture data structure */ + lpr->linear[level].data = map; + + /* make sure tiled data gets converted to linear data */ + map2 = llvmpipe_get_texture_image(lpr, 0, 0, tex_usage, layout); + if (layout == LP_TEX_LAYOUT_LINEAR) + assert(map == map2); + + return map2; } - else { + else if (resource_is_texture(resource)) { /* regular texture */ - align_free(lpt->data); + if (resource->target != PIPE_TEXTURE_CUBE) { + assert(face == 0); + } + if (resource->target != PIPE_TEXTURE_3D) { + assert(zslice == 0); + } + + map = llvmpipe_get_texture_image(lpr, face + zslice, level, + tex_usage, layout); + assert(map); + return map; + } + else { + return lpr->data; + } +} + + +/** + * Unmap a resource. + */ +void +llvmpipe_resource_unmap(struct pipe_resource *resource, + unsigned face, + unsigned level, + unsigned zslice) +{ + struct llvmpipe_resource *lpr = llvmpipe_resource(resource); + + if (lpr->dt) { + /* display target */ + struct llvmpipe_screen *lp_screen = llvmpipe_screen(resource->screen); + struct sw_winsys *winsys = lp_screen->winsys; + + assert(face == 0); + assert(level == 0); + assert(zslice == 0); + + /* make sure linear image is up to date */ + (void) llvmpipe_get_texture_image(lpr, face + zslice, level, + LP_TEX_USAGE_READ, + LP_TEX_LAYOUT_LINEAR); + + winsys->displaytarget_unmap(winsys, lpr->dt); } +} + - FREE(lpt); +void * +llvmpipe_resource_data(struct pipe_resource *resource) +{ + struct llvmpipe_resource *lpr = llvmpipe_resource(resource); + + assert(!resource_is_texture(resource)); + + return lpr->data; +} + + +static struct pipe_resource * +llvmpipe_resource_from_handle(struct pipe_screen *screen, + const struct pipe_resource *template, + struct winsys_handle *whandle) +{ + struct sw_winsys *winsys = llvmpipe_screen(screen)->winsys; + struct llvmpipe_resource *lpr = CALLOC_STRUCT(llvmpipe_resource); + if (!lpr) + return NULL; + + lpr->base = *template; + pipe_reference_init(&lpr->base.reference, 1); + lpr->base.screen = screen; + + lpr->dt = winsys->displaytarget_from_handle(winsys, + template, + whandle, + &lpr->row_stride[0]); + if (!lpr->dt) + goto fail; + + return &lpr->base; + + fail: + FREE(lpr); + return NULL; +} + + +static boolean +llvmpipe_resource_get_handle(struct pipe_screen *screen, + struct pipe_resource *pt, + struct winsys_handle *whandle) +{ + struct sw_winsys *winsys = llvmpipe_screen(screen)->winsys; + struct llvmpipe_resource *lpr = llvmpipe_resource(pt); + + assert(lpr->dt); + if (!lpr->dt) + return FALSE; + + return winsys->displaytarget_get_handle(winsys, lpr->dt, whandle); } static struct pipe_surface * llvmpipe_get_tex_surface(struct pipe_screen *screen, - struct pipe_texture *pt, + struct pipe_resource *pt, unsigned face, unsigned level, unsigned zslice, - unsigned usage) + enum lp_texture_usage usage) { - struct llvmpipe_texture *lpt = llvmpipe_texture(pt); struct pipe_surface *ps; assert(level <= pt->last_level); @@ -213,53 +454,15 @@ llvmpipe_get_tex_surface(struct pipe_screen *screen, ps = CALLOC_STRUCT(pipe_surface); if (ps) { pipe_reference_init(&ps->reference, 1); - pipe_texture_reference(&ps->texture, pt); + pipe_resource_reference(&ps->texture, pt); ps->format = pt->format; ps->width = u_minify(pt->width0, level); ps->height = u_minify(pt->height0, level); - ps->offset = lpt->level_offset[level]; ps->usage = usage; - /* Because we are llvmpipe, anything that the state tracker - * thought was going to be done with the GPU will actually get - * done with the CPU. Let's adjust the flags to take that into - * account. - */ - if (ps->usage & PIPE_BUFFER_USAGE_GPU_WRITE) { - /* GPU_WRITE means "render" and that can involve reads (blending) */ - ps->usage |= PIPE_BUFFER_USAGE_CPU_WRITE | PIPE_BUFFER_USAGE_CPU_READ; - } - - if (ps->usage & PIPE_BUFFER_USAGE_GPU_READ) - ps->usage |= PIPE_BUFFER_USAGE_CPU_READ; - - if (ps->usage & (PIPE_BUFFER_USAGE_CPU_WRITE | - PIPE_BUFFER_USAGE_GPU_WRITE)) { - /* Mark the surface as dirty. */ - lpt->timestamp++; - llvmpipe_screen(screen)->timestamp++; - } - ps->face = face; ps->level = level; ps->zslice = zslice; - - /* XXX shouldn't that rather be - tex_height = align(ps->height, 2); - to account for alignment done in llvmpipe_texture_layout ? - */ - if (pt->target == PIPE_TEXTURE_CUBE) { - unsigned tex_height = ps->height; - ps->offset += face * util_format_get_nblocksy(pt->format, tex_height) * lpt->stride[level]; - } - else if (pt->target == PIPE_TEXTURE_3D) { - unsigned tex_height = ps->height; - ps->offset += zslice * util_format_get_nblocksy(pt->format, tex_height) * lpt->stride[level]; - } - else { - assert(face == 0); - assert(zslice == 0); - } } return ps; } @@ -273,56 +476,54 @@ llvmpipe_tex_surface_destroy(struct pipe_surface *surf) * where it would happen. For llvmpipe, nothing to do. */ assert(surf->texture); - pipe_texture_reference(&surf->texture, NULL); + pipe_resource_reference(&surf->texture, NULL); FREE(surf); } static struct pipe_transfer * -llvmpipe_get_tex_transfer(struct pipe_screen *screen, - struct pipe_texture *texture, - unsigned face, unsigned level, unsigned zslice, - enum pipe_transfer_usage usage, - unsigned x, unsigned y, unsigned w, unsigned h) -{ - struct llvmpipe_texture *lptex = llvmpipe_texture(texture); - struct llvmpipe_transfer *lpt; - - assert(texture); - assert(level <= texture->last_level); - - lpt = CALLOC_STRUCT(llvmpipe_transfer); - if (lpt) { - struct pipe_transfer *pt = &lpt->base; - pipe_texture_reference(&pt->texture, texture); - pt->x = x; - pt->y = y; - pt->width = align(w, TILE_SIZE); - pt->height = align(h, TILE_SIZE); - pt->stride = lptex->stride[level]; - pt->usage = usage; - pt->face = face; - pt->level = level; - pt->zslice = zslice; - - lpt->offset = lptex->level_offset[level]; - - /* XXX shouldn't that rather be - tex_height = align(u_minify(texture->height0, level), 2) - to account for alignment done in llvmpipe_texture_layout ? - */ - if (texture->target == PIPE_TEXTURE_CUBE) { - unsigned tex_height = u_minify(texture->height0, level); - lpt->offset += face * util_format_get_nblocksy(texture->format, tex_height) * pt->stride; - } - else if (texture->target == PIPE_TEXTURE_3D) { - unsigned tex_height = u_minify(texture->height0, level); - lpt->offset += zslice * util_format_get_nblocksy(texture->format, tex_height) * pt->stride; - } - else { - assert(face == 0); - assert(zslice == 0); +llvmpipe_get_transfer(struct pipe_context *pipe, + struct pipe_resource *resource, + struct pipe_subresource sr, + unsigned usage, + const struct pipe_box *box) +{ + struct llvmpipe_resource *lprex = llvmpipe_resource(resource); + struct llvmpipe_transfer *lpr; + + assert(resource); + assert(sr.level <= resource->last_level); + + /* + * Transfers, like other pipe operations, must happen in order, so flush the + * context if necessary. + */ + if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) { + boolean read_only = !(usage & PIPE_TRANSFER_WRITE); + boolean do_not_block = !!(usage & PIPE_TRANSFER_DONTBLOCK); + if (!llvmpipe_flush_resource(pipe, resource, + sr.face, sr.level, + 0, /* flush_flags */ + read_only, + TRUE, /* cpu_access */ + do_not_block)) { + /* + * It would have blocked, but state tracker requested no to. + */ + assert(do_not_block); + return NULL; } + } + + lpr = CALLOC_STRUCT(llvmpipe_transfer); + if (lpr) { + struct pipe_transfer *pt = &lpr->base; + pipe_resource_reference(&pt->resource, resource); + pt->box = *box; + pt->sr = sr; + pt->stride = lprex->row_stride[sr.level]; + pt->usage = usage; + return pt; } return NULL; @@ -330,92 +531,681 @@ llvmpipe_get_tex_transfer(struct pipe_screen *screen, static void -llvmpipe_tex_transfer_destroy(struct pipe_transfer *transfer) +llvmpipe_transfer_destroy(struct pipe_context *pipe, + struct pipe_transfer *transfer) { /* Effectively do the texture_update work here - if texture images * needed post-processing to put them into hardware layout, this is * where it would happen. For llvmpipe, nothing to do. */ - assert (transfer->texture); - pipe_texture_reference(&transfer->texture, NULL); + assert (transfer->resource); + pipe_resource_reference(&transfer->resource, NULL); FREE(transfer); } static void * -llvmpipe_transfer_map( struct pipe_screen *_screen, +llvmpipe_transfer_map( struct pipe_context *pipe, struct pipe_transfer *transfer ) { - struct llvmpipe_screen *screen = llvmpipe_screen(_screen); - ubyte *map, *xfer_map; - struct llvmpipe_texture *lpt; + struct llvmpipe_screen *screen = llvmpipe_screen(pipe->screen); + ubyte *map; + struct llvmpipe_resource *lpr; enum pipe_format format; - - assert(transfer->texture); - lpt = llvmpipe_texture(transfer->texture); - format = lpt->base.format; - - if (lpt->dt) { - /* display target */ - struct llvmpipe_winsys *winsys = screen->winsys; - - map = winsys->displaytarget_map(winsys, lpt->dt, - pipe_transfer_buffer_flags(transfer)); - if (map == NULL) - return NULL; + enum lp_texture_usage tex_usage; + const char *mode; + + assert(transfer->sr.face < 6); + assert(transfer->sr.level < LP_MAX_TEXTURE_LEVELS); + + /* + printf("tex_transfer_map(%d, %d %d x %d of %d x %d, usage %d )\n", + transfer->x, transfer->y, transfer->width, transfer->height, + transfer->texture->width0, + transfer->texture->height0, + transfer->usage); + */ + + if (transfer->usage == PIPE_TRANSFER_READ) { + tex_usage = LP_TEX_USAGE_READ; + mode = "read"; } else { - /* regular texture */ - map = lpt->data; + tex_usage = LP_TEX_USAGE_READ_WRITE; + mode = "read/write"; } - /* May want to different things here depending on read/write nature + if (0) { + struct llvmpipe_resource *lpr = llvmpipe_resource(transfer->resource); + printf("transfer map tex %u mode %s\n", lpr->id, mode); + } + + + assert(transfer->resource); + lpr = llvmpipe_resource(transfer->resource); + format = lpr->base.format; + + map = llvmpipe_resource_map(transfer->resource, + transfer->sr.face, + transfer->sr.level, + transfer->box.z, + tex_usage, LP_TEX_LAYOUT_LINEAR); + + + /* May want to do different things here depending on read/write nature * of the map: */ - if (transfer->texture && (transfer->usage & PIPE_TRANSFER_WRITE)) { + if (transfer->usage & PIPE_TRANSFER_WRITE) { /* Do something to notify sharing contexts of a texture change. */ screen->timestamp++; } - xfer_map = map + llvmpipe_transfer(transfer)->offset + - transfer->y / util_format_get_blockheight(format) * transfer->stride + - transfer->x / util_format_get_blockwidth(format) * util_format_get_blocksize(format); - /*printf("map = %p xfer map = %p\n", map, xfer_map);*/ - return xfer_map; + map += + transfer->box.y / util_format_get_blockheight(format) * transfer->stride + + transfer->box.x / util_format_get_blockwidth(format) * util_format_get_blocksize(format); + + return map; } static void -llvmpipe_transfer_unmap(struct pipe_screen *screen, - struct pipe_transfer *transfer) +llvmpipe_transfer_unmap(struct pipe_context *pipe, + struct pipe_transfer *transfer) { - struct llvmpipe_screen *lp_screen = llvmpipe_screen(screen); - struct llvmpipe_texture *lpt; + assert(transfer->resource); - assert(transfer->texture); - lpt = llvmpipe_texture(transfer->texture); + llvmpipe_resource_unmap(transfer->resource, + transfer->sr.face, + transfer->sr.level, + transfer->box.z); +} - if (lpt->dt) { - /* display target */ - struct llvmpipe_winsys *winsys = lp_screen->winsys; - winsys->displaytarget_unmap(winsys, lpt->dt); +static unsigned int +llvmpipe_is_resource_referenced( struct pipe_context *pipe, + struct pipe_resource *presource, + unsigned face, unsigned level) +{ + struct llvmpipe_context *llvmpipe = llvmpipe_context( pipe ); + + if (presource->target == PIPE_BUFFER) + return PIPE_UNREFERENCED; + + return lp_setup_is_resource_referenced(llvmpipe->setup, presource); +} + + + +/** + * Create buffer which wraps user-space data. + */ +static struct pipe_resource * +llvmpipe_user_buffer_create(struct pipe_screen *screen, + void *ptr, + unsigned bytes, + unsigned bind_flags) +{ + struct llvmpipe_resource *buffer; + + buffer = CALLOC_STRUCT(llvmpipe_resource); + if(!buffer) + return NULL; + + pipe_reference_init(&buffer->base.reference, 1); + buffer->base.screen = screen; + buffer->base.format = PIPE_FORMAT_R8_UNORM; /* ?? */ + buffer->base.bind = bind_flags; + buffer->base.usage = PIPE_USAGE_IMMUTABLE; + buffer->base.flags = 0; + buffer->base.width0 = bytes; + buffer->base.height0 = 1; + buffer->base.depth0 = 1; + buffer->userBuffer = TRUE; + buffer->data = ptr; + + return &buffer->base; +} + + +/** + * Compute size (in bytes) need to store a texture image / mipmap level, + * for just one cube face or one 3D texture slice + */ +static unsigned +tex_image_face_size(const struct llvmpipe_resource *lpr, unsigned level, + enum lp_texture_layout layout) +{ + const unsigned width = u_minify(lpr->base.width0, level); + const unsigned height = u_minify(lpr->base.height0, level); + + assert(layout == LP_TEX_LAYOUT_TILED || + layout == LP_TEX_LAYOUT_LINEAR); + + if (layout == LP_TEX_LAYOUT_TILED) { + /* for tiled layout, force a 32bpp format */ + const enum pipe_format format = PIPE_FORMAT_B8G8R8A8_UNORM; + const unsigned block_size = util_format_get_blocksize(format); + const unsigned nblocksy = + util_format_get_nblocksy(format, align(height, TILE_SIZE)); + const unsigned nblocksx = + util_format_get_nblocksx(format, align(width, TILE_SIZE)); + const unsigned buffer_size = block_size * nblocksy * nblocksx; + return buffer_size; + } + else { + const enum pipe_format format = lpr->base.format; + const unsigned nblocksy = + util_format_get_nblocksy(format, align(height, TILE_SIZE)); + const unsigned buffer_size = nblocksy * lpr->row_stride[level]; + return buffer_size; + } +} + + +/** + * Compute size (in bytes) need to store a texture image / mipmap level, + * including all cube faces or 3D image slices + */ +static unsigned +tex_image_size(const struct llvmpipe_resource *lpr, unsigned level, + enum lp_texture_layout layout) +{ + const unsigned buf_size = tex_image_face_size(lpr, level, layout); + return buf_size * lpr->num_slices_faces[level]; +} + + +/** + * This function encapsulates some complicated logic for determining + * how to convert a tile of image data from linear layout to tiled + * layout, or vice versa. + * \param cur_layout the current tile layout + * \param target_layout the desired tile layout + * \param usage how the tile will be accessed (R/W vs. read-only, etc) + * \param new_layout_return returns the new layout mode + * \param convert_return returns TRUE if image conversion is needed + */ +static void +layout_logic(enum lp_texture_layout cur_layout, + enum lp_texture_layout target_layout, + enum lp_texture_usage usage, + enum lp_texture_layout *new_layout_return, + boolean *convert) +{ + enum lp_texture_layout other_layout, new_layout; + + *convert = FALSE; + + new_layout = 99; /* debug check */ + + if (target_layout == LP_TEX_LAYOUT_LINEAR) { + other_layout = LP_TEX_LAYOUT_TILED; + } + else { + assert(target_layout == LP_TEX_LAYOUT_TILED); + other_layout = LP_TEX_LAYOUT_LINEAR; + } + + new_layout = target_layout; /* may get changed below */ + + if (cur_layout == LP_TEX_LAYOUT_BOTH) { + if (usage == LP_TEX_USAGE_READ) { + new_layout = LP_TEX_LAYOUT_BOTH; + } + } + else if (cur_layout == other_layout) { + if (usage != LP_TEX_USAGE_WRITE_ALL) { + /* need to convert tiled data to linear or vice versa */ + *convert = TRUE; + + if (usage == LP_TEX_USAGE_READ) + new_layout = LP_TEX_LAYOUT_BOTH; + } + } + else { + assert(cur_layout == LP_TEX_LAYOUT_NONE || + cur_layout == target_layout); + } + + assert(new_layout == LP_TEX_LAYOUT_BOTH || + new_layout == target_layout); + + *new_layout_return = new_layout; +} + + +/** + * Return pointer to a 2D texture image/face/slice. + * No tiled/linear conversion is done. + */ +ubyte * +llvmpipe_get_texture_image_address(struct llvmpipe_resource *lpr, + unsigned face_slice, unsigned level, + enum lp_texture_layout layout) +{ + struct llvmpipe_texture_image *img; + unsigned offset; + + if (layout == LP_TEX_LAYOUT_LINEAR) { + img = &lpr->linear[level]; + } + else { + assert (layout == LP_TEX_LAYOUT_TILED); + img = &lpr->tiled[level]; + } + + if (face_slice > 0) + offset = face_slice * tex_image_face_size(lpr, level, layout); + else + offset = 0; + + return (ubyte *) img->data + offset; +} + + +static INLINE enum lp_texture_layout +llvmpipe_get_texture_tile_layout(const struct llvmpipe_resource *lpr, + unsigned face_slice, unsigned level, + unsigned x, unsigned y) +{ + uint i; + assert(resource_is_texture(&lpr->base)); + assert(x < lpr->tiles_per_row[level]); + i = face_slice * lpr->tiles_per_image[level] + + y * lpr->tiles_per_row[level] + x; + return lpr->layout[level][i]; +} + + +static INLINE void +llvmpipe_set_texture_tile_layout(struct llvmpipe_resource *lpr, + unsigned face_slice, unsigned level, + unsigned x, unsigned y, + enum lp_texture_layout layout) +{ + uint i; + assert(resource_is_texture(&lpr->base)); + assert(x < lpr->tiles_per_row[level]); + i = face_slice * lpr->tiles_per_image[level] + + y * lpr->tiles_per_row[level] + x; + lpr->layout[level][i] = layout; +} + + +/** + * Set the layout mode for all tiles in a particular image. + */ +static INLINE void +llvmpipe_set_texture_image_layout(struct llvmpipe_resource *lpr, + unsigned face_slice, unsigned level, + unsigned width_t, unsigned height_t, + enum lp_texture_layout layout) +{ + const unsigned start = face_slice * lpr->tiles_per_image[level]; + unsigned i; + + for (i = 0; i < width_t * height_t; i++) { + lpr->layout[level][start + i] = layout; + } +} + + +/** + * Allocate storage for a linear or tile texture image (all cube + * faces and all 3D slices. + */ +static void +alloc_image_data(struct llvmpipe_resource *lpr, unsigned level, + enum lp_texture_layout layout) +{ + if (lpr->dt) + assert(level == 0); + + if (layout == LP_TEX_LAYOUT_TILED) { + /* tiled data is stored in regular memory */ + uint buffer_size = tex_image_size(lpr, level, layout); + lpr->tiled[level].data = align_malloc(buffer_size, 16); + } + else { + assert(layout == LP_TEX_LAYOUT_LINEAR); + if (lpr->dt) { + /* we get the linear memory from the winsys */ + struct llvmpipe_screen *screen = llvmpipe_screen(lpr->base.screen); + struct sw_winsys *winsys = screen->winsys; + + lpr->linear[0].data = + winsys->displaytarget_map(winsys, lpr->dt, + PIPE_TRANSFER_READ_WRITE); + } + else { + /* not a display target - allocate regular memory */ + uint buffer_size = tex_image_size(lpr, level, LP_TEX_LAYOUT_LINEAR); + lpr->linear[level].data = align_malloc(buffer_size, 16); + } + } +} + + + +/** + * Return pointer to texture image data (either linear or tiled layout) + * for a particular cube face or 3D texture slice. + * + * \param face_slice the cube face or 3D slice of interest + * \param usage one of LP_TEX_USAGE_READ/WRITE_ALL/READ_WRITE + * \param layout either LP_TEX_LAYOUT_LINEAR or _TILED or _NONE + */ +void * +llvmpipe_get_texture_image(struct llvmpipe_resource *lpr, + unsigned face_slice, unsigned level, + enum lp_texture_usage usage, + enum lp_texture_layout layout) +{ + /* + * 'target' refers to the image which we're retrieving (either in + * tiled or linear layout). + * 'other' refers to the same image but in the other layout. (it may + * or may not exist. + */ + struct llvmpipe_texture_image *target_img; + struct llvmpipe_texture_image *other_img; + void *target_data; + void *other_data; + const unsigned width = u_minify(lpr->base.width0, level); + const unsigned height = u_minify(lpr->base.height0, level); + const unsigned width_t = align(width, TILE_SIZE) / TILE_SIZE; + const unsigned height_t = align(height, TILE_SIZE) / TILE_SIZE; + enum lp_texture_layout other_layout; + boolean only_allocate; + + assert(layout == LP_TEX_LAYOUT_NONE || + layout == LP_TEX_LAYOUT_TILED || + layout == LP_TEX_LAYOUT_LINEAR); + + assert(usage == LP_TEX_USAGE_READ || + usage == LP_TEX_USAGE_READ_WRITE || + usage == LP_TEX_USAGE_WRITE_ALL); + + /* check for the special case of layout == LP_TEX_LAYOUT_NONE */ + if (layout == LP_TEX_LAYOUT_NONE) { + only_allocate = TRUE; + layout = LP_TEX_LAYOUT_TILED; + } + else { + only_allocate = FALSE; + } + + if (lpr->dt) { + assert(lpr->linear[level].data); + } + + /* which is target? which is other? */ + if (layout == LP_TEX_LAYOUT_LINEAR) { + target_img = &lpr->linear[level]; + other_img = &lpr->tiled[level]; + other_layout = LP_TEX_LAYOUT_TILED; + } + else { + target_img = &lpr->tiled[level]; + other_img = &lpr->linear[level]; + other_layout = LP_TEX_LAYOUT_LINEAR; + } + + target_data = target_img->data; + other_data = other_img->data; + + if (!target_data) { + /* allocate memory for the target image now */ + alloc_image_data(lpr, level, layout); + target_data = target_img->data; + } + + if (face_slice > 0) { + unsigned target_offset, other_offset; + + target_offset = face_slice * tex_image_face_size(lpr, level, layout); + other_offset = face_slice * tex_image_face_size(lpr, level, other_layout); + if (target_data) { + target_data = (uint8_t *) target_data + target_offset; + } + if (other_data) { + other_data = (uint8_t *) other_data + other_offset; + } } + + if (only_allocate) { + /* Just allocating tiled memory. Don't initialize it from the + * linear data if it exists. + */ + return target_data; + } + + if (other_data) { + /* may need to convert other data to the requested layout */ + enum lp_texture_layout new_layout; + unsigned x, y; + + /* loop over all image tiles, doing layout conversion where needed */ + for (y = 0; y < height_t; y++) { + for (x = 0; x < width_t; x++) { + enum lp_texture_layout cur_layout = + llvmpipe_get_texture_tile_layout(lpr, face_slice, level, x, y); + boolean convert; + + layout_logic(cur_layout, layout, usage, &new_layout, &convert); + + if (convert) { + if (layout == LP_TEX_LAYOUT_TILED) { + lp_linear_to_tiled(other_data, target_data, + x * TILE_SIZE, y * TILE_SIZE, + TILE_SIZE, TILE_SIZE, + lpr->base.format, + lpr->row_stride[level], + lpr->tiles_per_row[level]); + } + else { + lp_tiled_to_linear(other_data, target_data, + x * TILE_SIZE, y * TILE_SIZE, + TILE_SIZE, TILE_SIZE, + lpr->base.format, + lpr->row_stride[level], + lpr->tiles_per_row[level]); + } + } + + llvmpipe_set_texture_tile_layout(lpr, face_slice, level, x, y, + new_layout); + } + } + } + else { + /* no other data */ + llvmpipe_set_texture_image_layout(lpr, face_slice, level, + width_t, height_t, layout); + } + + assert(target_data); + + return target_data; +} + + +/** + * Return pointer to start of a texture image (1D, 2D, 3D, CUBE). + * All cube faces and 3D slices will be converted to the requested + * layout if needed. + * This is typically used when we're about to sample from a texture. + */ +void * +llvmpipe_get_texture_image_all(struct llvmpipe_resource *lpr, + unsigned level, + enum lp_texture_usage usage, + enum lp_texture_layout layout) +{ + const int slices = lpr->num_slices_faces[level]; + int slice; + void *map = NULL; + + assert(slices > 0); + + for (slice = slices - 1; slice >= 0; slice--) { + map = llvmpipe_get_texture_image(lpr, slice, level, usage, layout); + } + + return map; +} + + +/** + * Get pointer to a linear image (not the tile!) where the tile at (x,y) + * is known to be in linear layout. + * Conversion from tiled to linear will be done if necessary. + * \return pointer to start of image/face (not the tile) + */ +ubyte * +llvmpipe_get_texture_tile_linear(struct llvmpipe_resource *lpr, + unsigned face_slice, unsigned level, + enum lp_texture_usage usage, + unsigned x, unsigned y) +{ + struct llvmpipe_texture_image *linear_img = &lpr->linear[level]; + enum lp_texture_layout cur_layout, new_layout; + const unsigned tx = x / TILE_SIZE, ty = y / TILE_SIZE; + boolean convert; + uint8_t *tiled_image, *linear_image; + + assert(resource_is_texture(&lpr->base)); + assert(x % TILE_SIZE == 0); + assert(y % TILE_SIZE == 0); + + if (!linear_img->data) { + /* allocate memory for the linear image now */ + alloc_image_data(lpr, level, LP_TEX_LAYOUT_LINEAR); + } + + /* compute address of the slice/face of the image that contains the tile */ + tiled_image = llvmpipe_get_texture_image_address(lpr, face_slice, level, + LP_TEX_LAYOUT_TILED); + linear_image = llvmpipe_get_texture_image_address(lpr, face_slice, level, + LP_TEX_LAYOUT_LINEAR); + + /* get current tile layout and determine if data conversion is needed */ + cur_layout = llvmpipe_get_texture_tile_layout(lpr, face_slice, level, tx, ty); + + layout_logic(cur_layout, LP_TEX_LAYOUT_LINEAR, usage, + &new_layout, &convert); + + if (convert) { + lp_tiled_to_linear(tiled_image, linear_image, + x, y, TILE_SIZE, TILE_SIZE, lpr->base.format, + lpr->row_stride[level], + lpr->tiles_per_row[level]); + } + + if (new_layout != cur_layout) + llvmpipe_set_texture_tile_layout(lpr, face_slice, level, tx, ty, new_layout); + + return linear_image; +} + + +/** + * Get pointer to tiled data for rendering. + * \return pointer to the tiled data at the given tile position + */ +ubyte * +llvmpipe_get_texture_tile(struct llvmpipe_resource *lpr, + unsigned face_slice, unsigned level, + enum lp_texture_usage usage, + unsigned x, unsigned y) +{ + struct llvmpipe_texture_image *tiled_img = &lpr->tiled[level]; + enum lp_texture_layout cur_layout, new_layout; + const unsigned tx = x / TILE_SIZE, ty = y / TILE_SIZE; + boolean convert; + uint8_t *tiled_image, *linear_image; + unsigned tile_offset; + + assert(x % TILE_SIZE == 0); + assert(y % TILE_SIZE == 0); + + if (!tiled_img->data) { + /* allocate memory for the tiled image now */ + alloc_image_data(lpr, level, LP_TEX_LAYOUT_TILED); + } + + /* compute address of the slice/face of the image that contains the tile */ + tiled_image = llvmpipe_get_texture_image_address(lpr, face_slice, level, + LP_TEX_LAYOUT_TILED); + linear_image = llvmpipe_get_texture_image_address(lpr, face_slice, level, + LP_TEX_LAYOUT_LINEAR); + + /* get current tile layout and see if we need to convert the data */ + cur_layout = llvmpipe_get_texture_tile_layout(lpr, face_slice, level, tx, ty); + + layout_logic(cur_layout, LP_TEX_LAYOUT_TILED, usage, &new_layout, &convert); + if (convert) { + lp_linear_to_tiled(linear_image, tiled_image, + x, y, TILE_SIZE, TILE_SIZE, lpr->base.format, + lpr->row_stride[level], + lpr->tiles_per_row[level]); + } + + if (new_layout != cur_layout) + llvmpipe_set_texture_tile_layout(lpr, face_slice, level, tx, ty, new_layout); + + /* compute, return address of the 64x64 tile */ + tile_offset = (ty * lpr->tiles_per_row[level] + tx) + * TILE_SIZE * TILE_SIZE * 4; + + return (ubyte *) tiled_image + tile_offset; +} + + +/** + * Return size of resource in bytes + */ +unsigned +llvmpipe_resource_size(const struct pipe_resource *resource) +{ + const struct llvmpipe_resource *lpr = llvmpipe_resource_const(resource); + unsigned lvl, size = 0; + + for (lvl = 0; lvl <= lpr->base.last_level; lvl++) { + if (lpr->linear[lvl].data) + size += tex_image_size(lpr, lvl, LP_TEX_LAYOUT_LINEAR); + + if (lpr->tiled[lvl].data) + size += tex_image_size(lpr, lvl, LP_TEX_LAYOUT_TILED); + } + + return size; } void -llvmpipe_init_screen_texture_funcs(struct pipe_screen *screen) +llvmpipe_init_screen_resource_funcs(struct pipe_screen *screen) { - screen->texture_create = llvmpipe_texture_create; - screen->texture_blanket = llvmpipe_texture_blanket; - screen->texture_destroy = llvmpipe_texture_destroy; + screen->resource_create = llvmpipe_resource_create; + screen->resource_destroy = llvmpipe_resource_destroy; + screen->resource_from_handle = llvmpipe_resource_from_handle; + screen->resource_get_handle = llvmpipe_resource_get_handle; + screen->user_buffer_create = llvmpipe_user_buffer_create; screen->get_tex_surface = llvmpipe_get_tex_surface; screen->tex_surface_destroy = llvmpipe_tex_surface_destroy; +} + - screen->get_tex_transfer = llvmpipe_get_tex_transfer; - screen->tex_transfer_destroy = llvmpipe_tex_transfer_destroy; - screen->transfer_map = llvmpipe_transfer_map; - screen->transfer_unmap = llvmpipe_transfer_unmap; +void +llvmpipe_init_context_resource_funcs(struct pipe_context *pipe) +{ + pipe->get_transfer = llvmpipe_get_transfer; + pipe->transfer_destroy = llvmpipe_transfer_destroy; + pipe->transfer_map = llvmpipe_transfer_map; + pipe->transfer_unmap = llvmpipe_transfer_unmap; + pipe->is_resource_referenced = llvmpipe_is_resource_referenced; + + pipe->transfer_flush_region = u_default_transfer_flush_region; + pipe->transfer_inline_write = u_default_transfer_inline_write; } diff --git a/src/gallium/drivers/llvmpipe/lp_texture.h b/src/gallium/drivers/llvmpipe/lp_texture.h index 87c905bc027..a8d08d6247f 100644 --- a/src/gallium/drivers/llvmpipe/lp_texture.h +++ b/src/gallium/drivers/llvmpipe/lp_texture.h @@ -30,33 +30,95 @@ #include "pipe/p_state.h" +#include "util/u_debug.h" +#include "lp_limits.h" + + +enum lp_texture_usage +{ + LP_TEX_USAGE_READ = 100, + LP_TEX_USAGE_READ_WRITE, + LP_TEX_USAGE_WRITE_ALL +}; + + +/** Per-tile layout mode */ +enum lp_texture_layout +{ + LP_TEX_LAYOUT_NONE = 0, /**< no layout for the tile data yet */ + LP_TEX_LAYOUT_TILED, /**< the tile data is in tiled layout */ + LP_TEX_LAYOUT_LINEAR, /**< the tile data is in linear layout */ + LP_TEX_LAYOUT_BOTH /**< the tile data is in both modes */ +}; struct pipe_context; struct pipe_screen; struct llvmpipe_context; -struct llvmpipe_displaytarget; + +struct sw_displaytarget; + + +/** + * We keep one or two copies of the texture image data: one in a simple + * linear layout (for texture sampling) and another in a tiled layout (for + * render targets). We keep track of whether each image tile is linear + * or tiled on a per-tile basis. + */ -struct llvmpipe_texture +/** A 1D/2D/3D image, one mipmap level */ +struct llvmpipe_texture_image { - struct pipe_texture base; + void *data; +}; + + +/** + * llvmpipe subclass of pipe_resource. A texture, drawing surface, + * vertex buffer, const buffer, etc. + * Textures are stored differently than othere types of objects such as + * vertex buffers and const buffers. + * The former are tiled and have per-tile layout flags. + * The later are simple malloc'd blocks of memory. + */ +struct llvmpipe_resource +{ + struct pipe_resource base; - unsigned long level_offset[PIPE_MAX_TEXTURE_LEVELS]; - unsigned stride[PIPE_MAX_TEXTURE_LEVELS]; + /** Row stride in bytes */ + unsigned row_stride[LP_MAX_TEXTURE_LEVELS]; + /** Image stride (for cube maps or 3D textures) in bytes */ + unsigned img_stride[LP_MAX_TEXTURE_LEVELS]; + unsigned tiles_per_row[LP_MAX_TEXTURE_LEVELS]; + unsigned tiles_per_image[LP_MAX_TEXTURE_LEVELS]; + /** Number of 3D slices or cube faces per level */ + unsigned num_slices_faces[LP_MAX_TEXTURE_LEVELS]; /** - * Display target, for textures with the PIPE_TEXTURE_USAGE_DISPLAY_TARGET + * Display target, for textures with the PIPE_BIND_DISPLAY_TARGET * usage. */ - struct llvmpipe_displaytarget *dt; + struct sw_displaytarget *dt; /** * Malloc'ed data for regular textures, or a mapping to dt above. */ + struct llvmpipe_texture_image tiled[LP_MAX_TEXTURE_LEVELS]; + struct llvmpipe_texture_image linear[LP_MAX_TEXTURE_LEVELS]; + + /** + * Data for non-texture resources. + */ void *data; + /** array [level][face or slice][tile_y][tile_x] of layout values) */ + enum lp_texture_layout *layout[LP_MAX_TEXTURE_LEVELS]; + + boolean userBuffer; /** Is this a user-space buffer? */ unsigned timestamp; + + unsigned id; /**< temporary, for debugging */ }; @@ -69,17 +131,17 @@ struct llvmpipe_transfer /** cast wrappers */ -static INLINE struct llvmpipe_texture * -llvmpipe_texture(struct pipe_texture *pt) +static INLINE struct llvmpipe_resource * +llvmpipe_resource(struct pipe_resource *pt) { - return (struct llvmpipe_texture *) pt; + return (struct llvmpipe_resource *) pt; } -static INLINE const struct llvmpipe_texture * -llvmpipe_texture_const(const struct pipe_texture *pt) +static INLINE const struct llvmpipe_resource * +llvmpipe_resource_const(const struct pipe_resource *pt) { - return (const struct llvmpipe_texture *) pt; + return (const struct llvmpipe_resource *) pt; } @@ -90,8 +152,77 @@ llvmpipe_transfer(struct pipe_transfer *pt) } +void llvmpipe_init_screen_resource_funcs(struct pipe_screen *screen); +void llvmpipe_init_context_resource_funcs(struct pipe_context *pipe); + +static INLINE unsigned +llvmpipe_resource_stride(struct pipe_resource *resource, + unsigned level) +{ + struct llvmpipe_resource *lpr = llvmpipe_resource(resource); + assert(level < LP_MAX_TEXTURE_2D_LEVELS); + return lpr->row_stride[level]; +} + + +void * +llvmpipe_resource_map(struct pipe_resource *resource, + unsigned face_slice, + unsigned level, + unsigned zslice, + enum lp_texture_usage tex_usage, + enum lp_texture_layout layout); + +void +llvmpipe_resource_unmap(struct pipe_resource *resource, + unsigned face_slice, + unsigned level, + unsigned zslice); + + +void * +llvmpipe_resource_data(struct pipe_resource *resource); + + +unsigned +llvmpipe_resource_size(const struct pipe_resource *resource); + + +ubyte * +llvmpipe_get_texture_image_address(struct llvmpipe_resource *lpr, + unsigned face_slice, unsigned level, + enum lp_texture_layout layout); + +void * +llvmpipe_get_texture_image(struct llvmpipe_resource *resource, + unsigned face_slice, unsigned level, + enum lp_texture_usage usage, + enum lp_texture_layout layout); + +void * +llvmpipe_get_texture_image_all(struct llvmpipe_resource *lpr, + unsigned level, + enum lp_texture_usage usage, + enum lp_texture_layout layout); + +ubyte * +llvmpipe_get_texture_tile_linear(struct llvmpipe_resource *lpr, + unsigned face_slice, unsigned level, + enum lp_texture_usage usage, + unsigned x, unsigned y); + +ubyte * +llvmpipe_get_texture_tile(struct llvmpipe_resource *lpr, + unsigned face_slice, unsigned level, + enum lp_texture_usage usage, + unsigned x, unsigned y); + + + extern void llvmpipe_init_screen_texture_funcs(struct pipe_screen *screen); +extern void +llvmpipe_init_context_texture_funcs(struct pipe_context *pipe); #endif /* LP_TEXTURE_H */ diff --git a/src/gallium/drivers/llvmpipe/lp_tile_image.c b/src/gallium/drivers/llvmpipe/lp_tile_image.c index c1980b316d5..2b63992dd70 100644 --- a/src/gallium/drivers/llvmpipe/lp_tile_image.c +++ b/src/gallium/drivers/llvmpipe/lp_tile_image.c @@ -25,6 +25,14 @@ **************************************************************************/ +/** + * Code to convert images from tiled to linear and back. + * XXX there are quite a few assumptions about color and z/stencil being + * 32bpp. + */ + + +#include "util/u_format.h" #include "lp_tile_soa.h" #include "lp_tile_image.h" @@ -33,33 +41,171 @@ /** + * Untile a 4x4 block of 32-bit words (all contiguous) to linear layout + * at dst, with dst_stride words between rows. + */ +static void +untile_4_4_uint32(const uint32_t *src, uint32_t *dst, unsigned dst_stride) +{ + uint32_t *d0 = dst; + uint32_t *d1 = d0 + dst_stride; + uint32_t *d2 = d1 + dst_stride; + uint32_t *d3 = d2 + dst_stride; + + d0[0] = src[0]; d0[1] = src[1]; d0[2] = src[4]; d0[3] = src[5]; + d1[0] = src[2]; d1[1] = src[3]; d1[2] = src[6]; d1[3] = src[7]; + d2[0] = src[8]; d2[1] = src[9]; d2[2] = src[12]; d2[3] = src[13]; + d3[0] = src[10]; d3[1] = src[11]; d3[2] = src[14]; d3[3] = src[15]; +} + + + +/** + * Untile a 4x4 block of 16-bit words (all contiguous) to linear layout + * at dst, with dst_stride words between rows. + */ +static void +untile_4_4_uint16(const uint16_t *src, uint16_t *dst, unsigned dst_stride) +{ + uint16_t *d0 = dst; + uint16_t *d1 = d0 + dst_stride; + uint16_t *d2 = d1 + dst_stride; + uint16_t *d3 = d2 + dst_stride; + + d0[0] = src[0]; d0[1] = src[1]; d0[2] = src[4]; d0[3] = src[5]; + d1[0] = src[2]; d1[1] = src[3]; d1[2] = src[6]; d1[3] = src[7]; + d2[0] = src[8]; d2[1] = src[9]; d2[2] = src[12]; d2[3] = src[13]; + d3[0] = src[10]; d3[1] = src[11]; d3[2] = src[14]; d3[3] = src[15]; +} + + + +/** + * Convert a 4x4 rect of 32-bit words from a linear layout into tiled + * layout (in which all 16 words are contiguous). + */ +static void +tile_4_4_uint32(const uint32_t *src, uint32_t *dst, unsigned src_stride) +{ + const uint32_t *s0 = src; + const uint32_t *s1 = s0 + src_stride; + const uint32_t *s2 = s1 + src_stride; + const uint32_t *s3 = s2 + src_stride; + + dst[0] = s0[0]; dst[1] = s0[1]; dst[4] = s0[2]; dst[5] = s0[3]; + dst[2] = s1[0]; dst[3] = s1[1]; dst[6] = s1[2]; dst[7] = s1[3]; + dst[8] = s2[0]; dst[9] = s2[1]; dst[12] = s2[2]; dst[13] = s2[3]; + dst[10] = s3[0]; dst[11] = s3[1]; dst[14] = s3[2]; dst[15] = s3[3]; +} + + + +/** + * Convert a 4x4 rect of 16-bit words from a linear layout into tiled + * layout (in which all 16 words are contiguous). + */ +static void +tile_4_4_uint16(const uint16_t *src, uint16_t *dst, unsigned src_stride) +{ + const uint16_t *s0 = src; + const uint16_t *s1 = s0 + src_stride; + const uint16_t *s2 = s1 + src_stride; + const uint16_t *s3 = s2 + src_stride; + + dst[0] = s0[0]; dst[1] = s0[1]; dst[4] = s0[2]; dst[5] = s0[3]; + dst[2] = s1[0]; dst[3] = s1[1]; dst[6] = s1[2]; dst[7] = s1[3]; + dst[8] = s2[0]; dst[9] = s2[1]; dst[12] = s2[2]; dst[13] = s2[3]; + dst[10] = s3[0]; dst[11] = s3[1]; dst[14] = s3[2]; dst[15] = s3[3]; +} + + + +/** * Convert a tiled image into a linear image. - * \param src_stride source row stride in bytes (bytes per row of tiles) * \param dst_stride dest row stride in bytes */ void -lp_tiled_to_linear(const uint8_t *src, - uint8_t *dst, +lp_tiled_to_linear(const void *src, void *dst, + unsigned x, unsigned y, unsigned width, unsigned height, enum pipe_format format, - unsigned src_stride, - unsigned dst_stride) + unsigned dst_stride, + unsigned tiles_per_row) { - const unsigned tiles_per_row = src_stride / BYTES_PER_TILE; - unsigned i, j; - - for (j = 0; j < height; j += TILE_SIZE) { - for (i = 0; i < width; i += TILE_SIZE) { - unsigned tile_offset = - ((j / TILE_SIZE) * tiles_per_row + i / TILE_SIZE); - unsigned byte_offset = tile_offset * BYTES_PER_TILE; - const uint8_t *src_tile = src + byte_offset; - - lp_tile_write_4ub(format, - src_tile, - dst, - dst_stride, - i, j, TILE_SIZE, TILE_SIZE); + assert(x % TILE_SIZE == 0); + assert(y % TILE_SIZE == 0); + /*assert(width % TILE_SIZE == 0); + assert(height % TILE_SIZE == 0);*/ + + /* Note that Z/stencil surfaces use a different tiling size than + * color surfaces. + */ + if (util_format_is_depth_or_stencil(format)) { + const uint bpp = util_format_get_blocksize(format); + const uint src_stride = dst_stride * TILE_VECTOR_WIDTH; + const uint tile_w = TILE_VECTOR_WIDTH, tile_h = TILE_VECTOR_HEIGHT; + const uint tiles_per_row = src_stride / (tile_w * tile_h * bpp); + + dst_stride /= bpp; /* convert from bytes to words */ + + if (bpp == 4) { + const uint32_t *src32 = (const uint32_t *) src; + uint32_t *dst32 = (uint32_t *) dst; + uint i, j; + + for (j = 0; j < height; j += tile_h) { + for (i = 0; i < width; i += tile_w) { + /* compute offsets in 32-bit words */ + uint ii = i + x, jj = j + y; + uint src_offset = (jj / tile_h * tiles_per_row + ii / tile_w) + * (tile_w * tile_h); + uint dst_offset = jj * dst_stride + ii; + untile_4_4_uint32(src32 + src_offset, + dst32 + dst_offset, + dst_stride); + } + } + } + else { + const uint16_t *src16 = (const uint16_t *) src; + uint16_t *dst16 = (uint16_t *) dst; + uint i, j; + + assert(bpp == 2); + + for (j = 0; j < height; j += tile_h) { + for (i = 0; i < width; i += tile_w) { + /* compute offsets in 16-bit words */ + uint ii = i + x, jj = j + y; + uint src_offset = (jj / tile_h * tiles_per_row + ii / tile_w) + * (tile_w * tile_h); + uint dst_offset = jj * dst_stride + ii; + untile_4_4_uint16(src16 + src_offset, + dst16 + dst_offset, + dst_stride); + } + } + } + } + else { + /* color image */ + const uint bpp = 4; + const uint tile_w = TILE_SIZE, tile_h = TILE_SIZE; + const uint bytes_per_tile = tile_w * tile_h * bpp; + uint i, j; + + for (j = 0; j < height; j += tile_h) { + for (i = 0; i < width; i += tile_w) { + uint ii = i + x, jj = j + y; + uint tile_offset = ((jj / tile_h) * tiles_per_row + ii / tile_w); + uint byte_offset = tile_offset * bytes_per_tile; + const uint8_t *src_tile = (uint8_t *) src + byte_offset; + + lp_tile_unswizzle_4ub(format, + src_tile, + dst, dst_stride, + ii, jj, tile_w, tile_h); + } } } } @@ -68,31 +214,87 @@ lp_tiled_to_linear(const uint8_t *src, /** * Convert a linear image into a tiled image. * \param src_stride source row stride in bytes - * \param dst_stride dest row stride in bytes (bytes per row of tiles) */ void -lp_linear_to_tiled(const uint8_t *src, - uint8_t *dst, +lp_linear_to_tiled(const void *src, void *dst, + unsigned x, unsigned y, unsigned width, unsigned height, enum pipe_format format, unsigned src_stride, - unsigned dst_stride) + unsigned tiles_per_row) { - const unsigned tiles_per_row = dst_stride / BYTES_PER_TILE; - unsigned i, j; - - for (j = 0; j < height; j += TILE_SIZE) { - for (i = 0; i < width; i += TILE_SIZE) { - unsigned tile_offset = - ((j / TILE_SIZE) * tiles_per_row + i / TILE_SIZE); - unsigned byte_offset = tile_offset * BYTES_PER_TILE; - uint8_t *dst_tile = dst + byte_offset; - - lp_tile_read_4ub(format, - dst_tile, - src, - src_stride, - i, j, TILE_SIZE, TILE_SIZE); + assert(x % TILE_SIZE == 0); + assert(y % TILE_SIZE == 0); + /* + assert(width % TILE_SIZE == 0); + assert(height % TILE_SIZE == 0); + */ + + if (util_format_is_depth_or_stencil(format)) { + const uint bpp = util_format_get_blocksize(format); + const uint dst_stride = src_stride * TILE_VECTOR_WIDTH; + const uint tile_w = TILE_VECTOR_WIDTH, tile_h = TILE_VECTOR_HEIGHT; + const uint tiles_per_row = dst_stride / (tile_w * tile_h * bpp); + + src_stride /= bpp; /* convert from bytes to words */ + + if (bpp == 4) { + const uint32_t *src32 = (const uint32_t *) src; + uint32_t *dst32 = (uint32_t *) dst; + uint i, j; + + for (j = 0; j < height; j += tile_h) { + for (i = 0; i < width; i += tile_w) { + /* compute offsets in 32-bit words */ + uint ii = i + x, jj = j + y; + uint src_offset = jj * src_stride + ii; + uint dst_offset = (jj / tile_h * tiles_per_row + ii / tile_w) + * (tile_w * tile_h); + tile_4_4_uint32(src32 + src_offset, + dst32 + dst_offset, + src_stride); + } + } + } + else { + const uint16_t *src16 = (const uint16_t *) src; + uint16_t *dst16 = (uint16_t *) dst; + uint i, j; + + assert(bpp == 2); + + for (j = 0; j < height; j += tile_h) { + for (i = 0; i < width; i += tile_w) { + /* compute offsets in 16-bit words */ + uint ii = i + x, jj = j + y; + uint src_offset = jj * src_stride + ii; + uint dst_offset = (jj / tile_h * tiles_per_row + ii / tile_w) + * (tile_w * tile_h); + tile_4_4_uint16(src16 + src_offset, + dst16 + dst_offset, + src_stride); + } + } + } + } + else { + const uint bpp = 4; + const uint tile_w = TILE_SIZE, tile_h = TILE_SIZE; + const uint bytes_per_tile = tile_w * tile_h * bpp; + uint i, j; + + for (j = 0; j < height; j += TILE_SIZE) { + for (i = 0; i < width; i += TILE_SIZE) { + uint ii = i + x, jj = j + y; + uint tile_offset = ((jj / tile_h) * tiles_per_row + ii / tile_w); + uint byte_offset = tile_offset * bytes_per_tile; + uint8_t *dst_tile = (uint8_t *) dst + byte_offset; + + lp_tile_swizzle_4ub(format, + dst_tile, + src, src_stride, + ii, jj, tile_w, tile_h); + } } } } @@ -102,7 +304,7 @@ lp_linear_to_tiled(const uint8_t *src, * For testing only. */ void -test_tiled_linear_conversion(uint8_t *data, +test_tiled_linear_conversion(void *data, enum pipe_format format, unsigned width, unsigned height, unsigned stride) @@ -113,13 +315,13 @@ test_tiled_linear_conversion(uint8_t *data, uint8_t *tiled = malloc(wt * ht * TILE_SIZE * TILE_SIZE * 4); - unsigned tiled_stride = wt * TILE_SIZE * TILE_SIZE * 4; + /*unsigned tiled_stride = wt * TILE_SIZE * TILE_SIZE * 4;*/ - lp_linear_to_tiled(data, tiled, width, height, format, - stride, tiled_stride); + lp_linear_to_tiled(data, tiled, 0, 0, width, height, format, + stride, wt); - lp_tiled_to_linear(tiled, data, width, height, format, - tiled_stride, stride); + lp_tiled_to_linear(tiled, data, 0, 0, width, height, format, + stride, wt); free(tiled); } diff --git a/src/gallium/drivers/llvmpipe/lp_tile_image.h b/src/gallium/drivers/llvmpipe/lp_tile_image.h index 60d472e8c5b..8de8efc6c16 100644 --- a/src/gallium/drivers/llvmpipe/lp_tile_image.h +++ b/src/gallium/drivers/llvmpipe/lp_tile_image.h @@ -30,25 +30,25 @@ void -lp_tiled_to_linear(const uint8_t *src, - uint8_t *dst, +lp_tiled_to_linear(const void *src, void *dst, + unsigned x, unsigned y, unsigned width, unsigned height, enum pipe_format format, - unsigned src_stride, - unsigned dst_stride); + unsigned dst_stride, + unsigned tiles_per_row); void -lp_linear_to_tiled(const uint8_t *src, - uint8_t *dst, +lp_linear_to_tiled(const void *src, void *dst, + unsigned x, unsigned y, unsigned width, unsigned height, enum pipe_format format, unsigned src_stride, - unsigned dst_stride); + unsigned tiles_per_row); void -test_tiled_linear_conversion(uint8_t *data, +test_tiled_linear_conversion(void *data, enum pipe_format format, unsigned width, unsigned height, unsigned stride); diff --git a/src/gallium/drivers/llvmpipe/lp_tile_soa.h b/src/gallium/drivers/llvmpipe/lp_tile_soa.h index eea3ab84990..07f71b8411a 100644 --- a/src/gallium/drivers/llvmpipe/lp_tile_soa.h +++ b/src/gallium/drivers/llvmpipe/lp_tile_soa.h @@ -30,7 +30,7 @@ #include "pipe/p_compiler.h" #include "tgsi/tgsi_exec.h" /* for NUM_CHANNELS */ -#include "lp_tile_size.h" +#include "lp_limits.h" #ifdef __cplusplus extern "C" { @@ -50,22 +50,40 @@ tile_offset[TILE_VECTOR_HEIGHT][TILE_VECTOR_WIDTH]; #define TILE_X_STRIDE (NUM_CHANNELS * TILE_C_STRIDE) //64 #define TILE_Y_STRIDE (TILE_VECTOR_HEIGHT * TILE_SIZE * NUM_CHANNELS) //1024 -#define TILE_PIXEL(_p, _x, _y, _c) \ - ((_p)[((_y) / TILE_VECTOR_HEIGHT) * TILE_Y_STRIDE + \ - ((_x) / TILE_VECTOR_WIDTH) * TILE_X_STRIDE + \ - (_c) * TILE_C_STRIDE + \ - tile_offset[(_y) % TILE_VECTOR_HEIGHT][(_x) % TILE_VECTOR_WIDTH]]) + +#ifdef DEBUG +extern unsigned lp_tile_unswizzle_count; +extern unsigned lp_tile_swizzle_count; +#endif + + +/** + * Return offset of the given pixel (and color channel) from the start + * of a tile, in bytes. + */ +static INLINE unsigned +tile_pixel_offset(unsigned x, unsigned y, unsigned c) +{ + unsigned ix = (x / TILE_VECTOR_WIDTH) * TILE_X_STRIDE; + unsigned iy = (y / TILE_VECTOR_HEIGHT) * TILE_Y_STRIDE; + unsigned offset = iy + ix + c * TILE_C_STRIDE + + tile_offset[y % TILE_VECTOR_HEIGHT][x % TILE_VECTOR_WIDTH]; + return offset; +} + + +#define TILE_PIXEL(_p, _x, _y, _c) ((_p)[tile_pixel_offset(_x, _y, _c)]) void -lp_tile_read_4ub(enum pipe_format format, +lp_tile_swizzle_4ub(enum pipe_format format, uint8_t *dst, const void *src, unsigned src_stride, unsigned x, unsigned y, unsigned w, unsigned h); void -lp_tile_write_4ub(enum pipe_format format, +lp_tile_unswizzle_4ub(enum pipe_format format, const uint8_t *src, void *dst, unsigned dst_stride, unsigned x, unsigned y, unsigned w, unsigned h); diff --git a/src/gallium/drivers/llvmpipe/lp_tile_soa.py b/src/gallium/drivers/llvmpipe/lp_tile_soa.py index 00b8d4fc382..5ab63cbac67 100644 --- a/src/gallium/drivers/llvmpipe/lp_tile_soa.py +++ b/src/gallium/drivers/llvmpipe/lp_tile_soa.py @@ -42,7 +42,29 @@ import os.path sys.path.insert(0, os.path.join(os.path.dirname(sys.argv[0]), '../../auxiliary/util')) -from u_format_access import * +from u_format_pack import * + + +def is_format_supported(format): + '''Determines whether we actually have the plumbing necessary to generate the + to read/write to/from this format.''' + + # FIXME: Ideally we would support any format combination here. + + if format.layout != PLAIN: + return False + + for i in range(4): + channel = format.channels[i] + if channel.type not in (VOID, UNSIGNED, SIGNED, FLOAT): + return False + if channel.type == FLOAT and channel.size not in (16, 32 ,64): + return False + + if format.colorspace not in ('rgb', 'srgb'): + return False + + return True def generate_format_read(format, dst_channel, dst_native_type, dst_suffix): @@ -53,7 +75,7 @@ def generate_format_read(format, dst_channel, dst_native_type, dst_suffix): src_native_type = native_type(format) print 'static void' - print 'lp_tile_%s_read_%s(%s *dst, const uint8_t *src, unsigned src_stride, unsigned x0, unsigned y0, unsigned w, unsigned h)' % (name, dst_suffix, dst_native_type) + print 'lp_tile_%s_swizzle_%s(%s *dst, const uint8_t *src, unsigned src_stride, unsigned x0, unsigned y0, unsigned w, unsigned h)' % (name, dst_suffix, dst_native_type) print '{' print ' unsigned x, y;' print ' const uint8_t *src_row = src + y0*src_stride;' @@ -62,7 +84,7 @@ def generate_format_read(format, dst_channel, dst_native_type, dst_suffix): print ' for (x = 0; x < w; ++x) {' names = ['']*4 - if format.colorspace == 'rgb': + if format.colorspace in ('rgb', 'srgb'): for i in range(4): swizzle = format.swizzles[i] if swizzle < 4: @@ -95,16 +117,21 @@ def generate_format_read(format, dst_channel, dst_native_type, dst_suffix): shift += width else: for i in range(4): + if names[i]: + print ' %s %s;' % (dst_native_type, names[i]) + for i in range(4): src_channel = format.channels[i] if names[i]: value = '(*src_pixel++)' value = conversion_expr(src_channel, dst_channel, dst_native_type, value, clamp=False) - print ' %s %s = %s;' % (dst_native_type, names[i], value) + print ' %s = %s;' % (names[i], value) + elif src_channel.size: + print ' ++src_pixel;' else: assert False for i in range(4): - if format.colorspace == 'rgb': + if format.colorspace in ('rgb', 'srgb'): swizzle = format.swizzles[i] if swizzle < 4: value = names[swizzle] @@ -134,7 +161,7 @@ def pack_rgba(format, src_channel, r, g, b, a): """Return an expression for packing r, g, b, a into a pixel of the given format. Ex: '(b << 24) | (g << 16) | (r << 8) | (a << 0)' """ - assert format.colorspace == 'rgb' + assert format.colorspace in ('rgb', 'srgb') inv_swizzle = format.inv_swizzles() shift = 0 expr = None @@ -166,7 +193,7 @@ def pack_rgba(format, src_channel, r, g, b, a): return expr -def emit_unrolled_write_code(format, src_channel): +def emit_unrolled_unswizzle_code(format, src_channel): '''Emit code for writing a block based on unrolled loops. This is considerably faster than the TILE_PIXEL-based code below. ''' @@ -196,7 +223,7 @@ def emit_unrolled_write_code(format, src_channel): print ' }' -def emit_tile_pixel_write_code(format, src_channel): +def emit_tile_pixel_unswizzle_code(format, src_channel): '''Emit code for writing a block based on the TILE_PIXEL macro.''' dst_native_type = native_type(format) @@ -230,6 +257,8 @@ def emit_tile_pixel_write_code(format, src_channel): value = 'TILE_PIXEL(src, x, y, %u)' % inv_swizzle[i] value = conversion_expr(src_channel, dst_channel, dst_native_type, value, clamp=False) print ' *dst_pixel++ = %s;' % value + elif dst_channel.size: + print ' ++dst_pixel;' else: assert False @@ -244,22 +273,23 @@ def generate_format_write(format, src_channel, src_native_type, src_suffix): name = format.short_name() print 'static void' - print 'lp_tile_%s_write_%s(const %s *src, uint8_t *dst, unsigned dst_stride, unsigned x0, unsigned y0, unsigned w, unsigned h)' % (name, src_suffix, src_native_type) + print 'lp_tile_%s_unswizzle_%s(const %s *src, uint8_t *dst, unsigned dst_stride, unsigned x0, unsigned y0, unsigned w, unsigned h)' % (name, src_suffix, src_native_type) print '{' if format.layout == PLAIN \ and format.colorspace == 'rgb' \ and format.block_size() <= 32 \ and format.is_pot() \ and not format.is_mixed() \ - and format.channels[0].type == UNSIGNED: - emit_unrolled_write_code(format, src_channel) + and (format.channels[0].type == UNSIGNED \ + or format.channels[1].type == UNSIGNED): + emit_unrolled_unswizzle_code(format, src_channel) else: - emit_tile_pixel_write_code(format, src_channel) + emit_tile_pixel_unswizzle_code(format, src_channel) print '}' print -def generate_read(formats, dst_channel, dst_native_type, dst_suffix): +def generate_swizzle(formats, dst_channel, dst_native_type, dst_suffix): '''Generate the dispatch function to read pixels from any format''' for format in formats: @@ -267,17 +297,20 @@ def generate_read(formats, dst_channel, dst_native_type, dst_suffix): generate_format_read(format, dst_channel, dst_native_type, dst_suffix) print 'void' - print 'lp_tile_read_%s(enum pipe_format format, %s *dst, const void *src, unsigned src_stride, unsigned x, unsigned y, unsigned w, unsigned h)' % (dst_suffix, dst_native_type) + print 'lp_tile_swizzle_%s(enum pipe_format format, %s *dst, const void *src, unsigned src_stride, unsigned x, unsigned y, unsigned w, unsigned h)' % (dst_suffix, dst_native_type) print '{' print ' void (*func)(%s *dst, const uint8_t *src, unsigned src_stride, unsigned x0, unsigned y0, unsigned w, unsigned h);' % dst_native_type + print '#ifdef DEBUG' + print ' lp_tile_swizzle_count += 1;' + print '#endif' print ' switch(format) {' for format in formats: if is_format_supported(format): print ' case %s:' % format.name - print ' func = &lp_tile_%s_read_%s;' % (format.short_name(), dst_suffix) + print ' func = &lp_tile_%s_swizzle_%s;' % (format.short_name(), dst_suffix) print ' break;' print ' default:' - print ' debug_printf("unsupported format\\n");' + print ' debug_printf("%s: unsupported format %s\\n", __FUNCTION__, util_format_name(format));' print ' return;' print ' }' print ' func(dst, (const uint8_t *)src, src_stride, x, y, w, h);' @@ -285,7 +318,7 @@ def generate_read(formats, dst_channel, dst_native_type, dst_suffix): print -def generate_write(formats, src_channel, src_native_type, src_suffix): +def generate_unswizzle(formats, src_channel, src_native_type, src_suffix): '''Generate the dispatch function to write pixels to any format''' for format in formats: @@ -293,18 +326,21 @@ def generate_write(formats, src_channel, src_native_type, src_suffix): generate_format_write(format, src_channel, src_native_type, src_suffix) print 'void' - print 'lp_tile_write_%s(enum pipe_format format, const %s *src, void *dst, unsigned dst_stride, unsigned x, unsigned y, unsigned w, unsigned h)' % (src_suffix, src_native_type) + print 'lp_tile_unswizzle_%s(enum pipe_format format, const %s *src, void *dst, unsigned dst_stride, unsigned x, unsigned y, unsigned w, unsigned h)' % (src_suffix, src_native_type) print '{' print ' void (*func)(const %s *src, uint8_t *dst, unsigned dst_stride, unsigned x0, unsigned y0, unsigned w, unsigned h);' % src_native_type + print '#ifdef DEBUG' + print ' lp_tile_unswizzle_count += 1;' + print '#endif' print ' switch(format) {' for format in formats: if is_format_supported(format): print ' case %s:' % format.name - print ' func = &lp_tile_%s_write_%s;' % (format.short_name(), src_suffix) + print ' func = &lp_tile_%s_unswizzle_%s;' % (format.short_name(), src_suffix) print ' break;' print ' default:' - print ' debug_printf("unsupported format\\n");' + print ' debug_printf("%s: unsupported format %s\\n", __FUNCTION__, util_format_name(format));' print ' return;' print ' }' print ' func(src, (uint8_t *)dst, dst_stride, x, y, w, h);' @@ -325,8 +361,14 @@ def main(): print '#include "pipe/p_compiler.h"' print '#include "util/u_format.h"' print '#include "util/u_math.h"' + print '#include "util/u_half.h"' print '#include "lp_tile_soa.h"' print + print '#ifdef DEBUG' + print 'unsigned lp_tile_unswizzle_count = 0;' + print 'unsigned lp_tile_swizzle_count = 0;' + print '#endif' + print print 'const unsigned char' print 'tile_offset[TILE_VECTOR_HEIGHT][TILE_VECTOR_WIDTH] = {' print ' { 0, 1, 4, 5},' @@ -349,14 +391,12 @@ def main(): print '};' print - generate_clamp() - channel = Channel(UNSIGNED, True, 8) native_type = 'uint8_t' suffix = '4ub' - generate_read(formats, channel, native_type, suffix) - generate_write(formats, channel, native_type, suffix) + generate_swizzle(formats, channel, native_type, suffix) + generate_unswizzle(formats, channel, native_type, suffix) if __name__ == '__main__': diff --git a/src/gallium/drivers/llvmpipe/lp_winsys.h b/src/gallium/drivers/llvmpipe/lp_winsys.h deleted file mode 100644 index ce11fa93041..00000000000 --- a/src/gallium/drivers/llvmpipe/lp_winsys.h +++ /dev/null @@ -1,125 +0,0 @@ -/************************************************************************** - * - * Copyright 2007-2009 VMware, Inc. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -/** - * @file - * llvmpipe public interface. - */ - - -#ifndef LP_WINSYS_H -#define LP_WINSYS_H - - -#include "pipe/p_compiler.h" /* for boolean */ -#include "pipe/p_format.h" - - -#ifdef __cplusplus -extern "C" { -#endif - - -struct pipe_screen; -struct pipe_context; - - -/** - * Opaque pointer. - */ -struct llvmpipe_displaytarget; - - -/** - * This is the interface that llvmpipe expects any window system - * hosting it to implement. - * - * llvmpipe is for the most part a self sufficient driver. The only thing it - * does not know is how to display a surface. - */ -struct llvmpipe_winsys -{ - void - (*destroy)( struct llvmpipe_winsys *ws ); - - boolean - (*is_displaytarget_format_supported)( struct llvmpipe_winsys *ws, - enum pipe_format format ); - - /** - * Allocate storage for a render target. - * - * Often surfaces which are meant to be blitted to the front screen (i.e., - * display targets) must be allocated with special characteristics, memory - * pools, or obtained directly from the windowing system. - * - * This callback is invoked by the pipe_screen when creating a texture marked - * with the PIPE_TEXTURE_USAGE_DISPLAY_TARGET flag to get the underlying - * storage. - */ - struct llvmpipe_displaytarget * - (*displaytarget_create)( struct llvmpipe_winsys *ws, - enum pipe_format format, - unsigned width, unsigned height, - unsigned alignment, - unsigned *stride ); - - void * - (*displaytarget_map)( struct llvmpipe_winsys *ws, - struct llvmpipe_displaytarget *dt, - unsigned flags ); - - void - (*displaytarget_unmap)( struct llvmpipe_winsys *ws, - struct llvmpipe_displaytarget *dt ); - - /** - * @sa pipe_screen:flush_frontbuffer. - * - * This call will likely become asynchronous eventually. - */ - void - (*displaytarget_display)( struct llvmpipe_winsys *ws, - struct llvmpipe_displaytarget *dt, - void *context_private ); - - void - (*displaytarget_destroy)( struct llvmpipe_winsys *ws, - struct llvmpipe_displaytarget *dt ); -}; - - - -struct pipe_screen * -llvmpipe_create_screen( struct llvmpipe_winsys * ); - - -#ifdef __cplusplus -} -#endif - -#endif /* LP_WINSYS_H */ diff --git a/src/gallium/drivers/llvmpipe/sp2lp.sh b/src/gallium/drivers/llvmpipe/sp2lp.sh deleted file mode 100755 index c45a81ce3cf..00000000000 --- a/src/gallium/drivers/llvmpipe/sp2lp.sh +++ /dev/null @@ -1,34 +0,0 @@ -#!/bin/sh -# -# Port changes from softpipe to llvmpipe. Invoke as -# -# sp2lp.sh <commit> -# -# Note that this will only affect llvmpipe -- you still need to actually -# cherry-pick/merge the softpipe changes themselves if they affect directories -# outside src/gallium/drivers/softpipe - -git format-patch \ - --keep-subject \ - --relative=src/gallium/drivers/softpipe \ - --src-prefix=a/src/gallium/drivers/llvmpipe/ \ - --dst-prefix=b/src/gallium/drivers/llvmpipe/ \ - --stdout "$1^1..$1" \ -| sed \ - -e 's/\<softpipe\>/llvmpipe/g' \ - -e 's/\<sp\>/lp/g' \ - -e 's/\<softpipe_/llvmpipe_/g' \ - -e 's/\<sp_/lp_/g' \ - -e 's/\<SP_/LP_/g' \ - -e 's/\<SOFTPIPE_/LLVMPIPE_/g' \ - -e 's/\<spt\>/lpt/g' \ - -e 's/\<sps\>/lps/g' \ - -e 's/\<spfs\>/lpfs/g' \ - -e 's/\<sptex\>/lptex/g' \ - -e 's/\<setup_\(point\|line\|tri\)\>/llvmpipe_\0/g' \ - -e 's/\<llvmpipe_cached_tile\>/llvmpipe_cached_tex_tile/g' \ - -e 's/_get_cached_tile_tex\>/_get_cached_tex_tile/g' \ - -e 's/\<TILE_SIZE\>/TEX_TILE_SIZE/g' \ - -e 's/\<tile_address\>/tex_tile_address/g' \ - -e 's/\<tile->data\.color\>/tile->color/g' \ -| patch -p1 diff --git a/src/gallium/drivers/nouveau/Makefile b/src/gallium/drivers/nouveau/Makefile index 0e02680bc63..db591b756c4 100644 --- a/src/gallium/drivers/nouveau/Makefile +++ b/src/gallium/drivers/nouveau/Makefile @@ -3,8 +3,9 @@ include $(TOP)/configs/current LIBNAME = nouveau -C_SOURCES = nouveau_screen.c \ - nouveau_context.c \ - nv04_surface_2d.c +LIBRARY_INCLUDES = \ + -I$(TOP)/src/gallium/drivers/nouveau/include + +C_SOURCES = nouveau_screen.c include ../../Makefile.template diff --git a/src/gallium/drivers/nouveau/SConscript b/src/gallium/drivers/nouveau/SConscript new file mode 100644 index 00000000000..fe7af4d2ae8 --- /dev/null +++ b/src/gallium/drivers/nouveau/SConscript @@ -0,0 +1,11 @@ +Import('*') + +env = env.Clone() + +nouveau = env.ConvenienceLibrary( + target = 'nouveau', + source = [ + 'nouveau_screen.c', + ]) + +Export('nouveau') diff --git a/src/gallium/drivers/nouveau/nouveau_class.h b/src/gallium/drivers/nouveau/nouveau_class.h new file mode 100644 index 00000000000..adfdd37b1b6 --- /dev/null +++ b/src/gallium/drivers/nouveau/nouveau_class.h @@ -0,0 +1,9025 @@ +/************************************************************************* + + Autogenerated file, do not edit ! + + This file was generated by renouveau-gen from renouveau.xml, the + XML database of nvidia objects and methods. renouveau-gen and + renouveau.xml can be found in CVS module renouveau of sourceforge.net + project nouveau: + +cvs -z3 -d:pserver:[email protected]:/cvsroot/nouveau co -P renouveau + +************************************************************************** + + Copyright (C) 2006-2008 : + Dmitry Baryshkov, + Laurent Carlier, + Matthieu Castet, + Dawid Gajownik, + Jeremy Kolb, + Stephane Loeuillet, + Patrice Mandin, + Stephane Marchesin, + Serge Martin, + Sylvain Munaut, + Simon Raffeiner, + Ben Skeggs, + Erik Waling, + koala_br, + +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining +a copy of this software and associated documentation files (the +"Software"), to deal in the Software without restriction, including +without limitation the rights to use, copy, modify, merge, publish, +distribute, sublicense, and/or sell copies of the Software, and to +permit persons to whom the Software is furnished to do so, subject to +the following conditions: + +The above copyright notice and this permission notice (including the +next paragraph) shall be included in all copies or substantial +portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, +EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF +MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. +IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE +LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION +OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION +WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + +*************************************************************************/ + + +#ifndef NOUVEAU_REG_H +#define NOUVEAU_REG_H 1 + + +#define NV01_ROOT 0x00000001 + + + +#define NV01_CONTEXT_DMA 0x00000002 + + + +#define NV01_DEVICE 0x00000003 + + + +#define NV01_TIMER 0x00000004 + +#define NV01_TIMER_SYNCHRONIZE 0x00000100 +#define NV01_TIMER_STOP_ALARM 0x00000104 +#define NV01_TIMER_DMA_NOTIFY 0x00000180 +#define NV01_TIMER_TIME(x) (0x00000300+((x)*4)) +#define NV01_TIMER_TIME__SIZE 0x00000002 +#define NV01_TIMER_ALARM_NOTIFY 0x00000308 + + +#define NV01_CONTEXT_BETA1 0x00000012 + +#define NV01_CONTEXT_BETA1_NOP 0x00000100 +#define NV01_CONTEXT_BETA1_NOTIFY 0x00000104 +#define NV01_CONTEXT_BETA1_DMA_NOTIFY 0x00000180 +#define NV01_CONTEXT_BETA1_BETA_1D31 0x00000300 + + +#define NV01_CONTEXT_COLOR_KEY 0x00000017 + +#define NV01_CONTEXT_COLOR_KEY_NOP 0x00000100 +#define NV01_CONTEXT_COLOR_KEY_NOTIFY 0x00000104 +#define NV01_CONTEXT_COLOR_KEY_DMA_NOTIFY 0x00000180 +#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT 0x00000300 +#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X16A8Y8 0x00000001 +#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X24Y8 0x00000002 +#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X16A1R5G5B5 0x00000003 +#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X17R5G5B5 0x00000004 +#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_A8R8G8B8 0x00000005 +#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X8R8G8B8 0x00000006 +#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_A16Y16 0x00000007 +#define NV01_CONTEXT_COLOR_KEY_COLOR_FORMAT_X16Y16 0x00000008 +#define NV01_CONTEXT_COLOR_KEY_COLOR 0x00000304 + + +#define NV04_CONTEXT_COLOR_KEY 0x00000057 + + + +#define NV01_CONTEXT_PATTERN 0x00000018 + +#define NV01_CONTEXT_PATTERN_NOP 0x00000100 +#define NV01_CONTEXT_PATTERN_NOTIFY 0x00000104 +#define NV01_CONTEXT_PATTERN_DMA_NOTIFY 0x00000180 +#define NV01_CONTEXT_PATTERN_COLOR_FORMAT 0x00000300 +#define NV01_CONTEXT_PATTERN_MONOCHROME_FORMAT 0x00000304 +#define NV01_CONTEXT_PATTERN_SHAPE 0x00000308 +#define NV01_CONTEXT_PATTERN_COLOR(x) (0x00000310+((x)*4)) +#define NV01_CONTEXT_PATTERN_COLOR__SIZE 0x00000002 +#define NV01_CONTEXT_PATTERN_PATTERN(x) (0x00000318+((x)*4)) +#define NV01_CONTEXT_PATTERN_PATTERN__SIZE 0x00000002 + + +#define NV01_CONTEXT_CLIP_RECTANGLE 0x00000019 + +#define NV01_CONTEXT_CLIP_RECTANGLE_NOP 0x00000100 +#define NV01_CONTEXT_CLIP_RECTANGLE_NOTIFY 0x00000104 +#define NV01_CONTEXT_CLIP_RECTANGLE_DMA_NOTIFY 0x00000180 +#define NV01_CONTEXT_CLIP_RECTANGLE_POINT 0x00000300 +#define NV01_CONTEXT_CLIP_RECTANGLE_POINT_X_SHIFT 0 +#define NV01_CONTEXT_CLIP_RECTANGLE_POINT_X_MASK 0x0000ffff +#define NV01_CONTEXT_CLIP_RECTANGLE_POINT_Y_SHIFT 16 +#define NV01_CONTEXT_CLIP_RECTANGLE_POINT_Y_MASK 0xffff0000 +#define NV01_CONTEXT_CLIP_RECTANGLE_SIZE 0x00000304 +#define NV01_CONTEXT_CLIP_RECTANGLE_SIZE_W_SHIFT 0 +#define NV01_CONTEXT_CLIP_RECTANGLE_SIZE_W_MASK 0x0000ffff +#define NV01_CONTEXT_CLIP_RECTANGLE_SIZE_H_SHIFT 16 +#define NV01_CONTEXT_CLIP_RECTANGLE_SIZE_H_MASK 0xffff0000 + + +#define NV01_RENDER_SOLID_LINE 0x0000001c + +#define NV01_RENDER_SOLID_LINE_NOP 0x00000100 +#define NV01_RENDER_SOLID_LINE_NOTIFY 0x00000104 +#define NV01_RENDER_SOLID_LINE_PATCH 0x0000010c +#define NV01_RENDER_SOLID_LINE_DMA_NOTIFY 0x00000180 +#define NV01_RENDER_SOLID_LINE_CLIP_RECTANGLE 0x00000184 +#define NV01_RENDER_SOLID_LINE_PATTERN 0x00000188 +#define NV01_RENDER_SOLID_LINE_ROP 0x0000018c +#define NV01_RENDER_SOLID_LINE_BETA1 0x00000190 +#define NV01_RENDER_SOLID_LINE_SURFACE 0x00000194 +#define NV01_RENDER_SOLID_LINE_OPERATION 0x000002fc +#define NV01_RENDER_SOLID_LINE_OPERATION_SRCCOPY_AND 0x00000000 +#define NV01_RENDER_SOLID_LINE_OPERATION_ROP_AND 0x00000001 +#define NV01_RENDER_SOLID_LINE_OPERATION_BLEND_AND 0x00000002 +#define NV01_RENDER_SOLID_LINE_OPERATION_SRCCOPY 0x00000003 +#define NV01_RENDER_SOLID_LINE_OPERATION_SRCCOPY_PREMULT 0x00000004 +#define NV01_RENDER_SOLID_LINE_OPERATION_BLEND_PREMULT 0x00000005 +#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT 0x00000300 +#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X16A8Y8 0x00000001 +#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X24Y8 0x00000002 +#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X16A1R5G5B5 0x00000003 +#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X17R5G5B5 0x00000004 +#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_A8R8G8B8 0x00000005 +#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X8R8G8B8 0x00000006 +#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_A16Y16 0x00000007 +#define NV01_RENDER_SOLID_LINE_COLOR_FORMAT_X16Y16 0x00000008 +#define NV01_RENDER_SOLID_LINE_COLOR 0x00000304 +#define NV01_RENDER_SOLID_LINE_LINE_POINT0(x) (0x00000400+((x)*8)) +#define NV01_RENDER_SOLID_LINE_LINE_POINT0__SIZE 0x00000010 +#define NV01_RENDER_SOLID_LINE_LINE_POINT0_X_SHIFT 0 +#define NV01_RENDER_SOLID_LINE_LINE_POINT0_X_MASK 0x0000ffff +#define NV01_RENDER_SOLID_LINE_LINE_POINT0_Y_SHIFT 16 +#define NV01_RENDER_SOLID_LINE_LINE_POINT0_Y_MASK 0xffff0000 +#define NV01_RENDER_SOLID_LINE_LINE_POINT1(x) (0x00000404+((x)*8)) +#define NV01_RENDER_SOLID_LINE_LINE_POINT1__SIZE 0x00000010 +#define NV01_RENDER_SOLID_LINE_LINE_POINT1_X_SHIFT 0 +#define NV01_RENDER_SOLID_LINE_LINE_POINT1_X_MASK 0x0000ffff +#define NV01_RENDER_SOLID_LINE_LINE_POINT1_Y_SHIFT 16 +#define NV01_RENDER_SOLID_LINE_LINE_POINT1_Y_MASK 0xffff0000 +#define NV01_RENDER_SOLID_LINE_LINE32_POINT0_X(x) (0x00000480+((x)*16)) +#define NV01_RENDER_SOLID_LINE_LINE32_POINT0_X__SIZE 0x00000010 +#define NV01_RENDER_SOLID_LINE_LINE32_POINT0_Y(x) (0x00000484+((x)*16)) +#define NV01_RENDER_SOLID_LINE_LINE32_POINT0_Y__SIZE 0x00000010 +#define NV01_RENDER_SOLID_LINE_LINE32_POINT1_X(x) (0x00000488+((x)*16)) +#define NV01_RENDER_SOLID_LINE_LINE32_POINT1_X__SIZE 0x00000010 +#define NV01_RENDER_SOLID_LINE_LINE32_POINT1_Y(x) (0x0000048c+((x)*16)) +#define NV01_RENDER_SOLID_LINE_LINE32_POINT1_Y__SIZE 0x00000010 +#define NV01_RENDER_SOLID_LINE_POLYLINE(x) (0x00000500+((x)*4)) +#define NV01_RENDER_SOLID_LINE_POLYLINE__SIZE 0x00000020 +#define NV01_RENDER_SOLID_LINE_POLYLINE_X_SHIFT 0 +#define NV01_RENDER_SOLID_LINE_POLYLINE_X_MASK 0x0000ffff +#define NV01_RENDER_SOLID_LINE_POLYLINE_Y_SHIFT 16 +#define NV01_RENDER_SOLID_LINE_POLYLINE_Y_MASK 0xffff0000 +#define NV01_RENDER_SOLID_LINE_POLYLINE32_POINT_X(x) (0x00000580+((x)*8)) +#define NV01_RENDER_SOLID_LINE_POLYLINE32_POINT_X__SIZE 0x00000010 +#define NV01_RENDER_SOLID_LINE_POLYLINE32_POINT_Y(x) (0x00000584+((x)*8)) +#define NV01_RENDER_SOLID_LINE_POLYLINE32_POINT_Y__SIZE 0x00000010 +#define NV01_RENDER_SOLID_LINE_CPOLYLINE_COLOR(x) (0x00000600+((x)*8)) +#define NV01_RENDER_SOLID_LINE_CPOLYLINE_COLOR__SIZE 0x00000010 +#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT(x) (0x00000604+((x)*8)) +#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT__SIZE 0x00000010 +#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT_X_SHIFT 0 +#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT_X_MASK 0x0000ffff +#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT_Y_SHIFT 16 +#define NV01_RENDER_SOLID_LINE_CPOLYLINE_POINT_Y_MASK 0xffff0000 + + +#define NV04_RENDER_SOLID_LINE 0x0000005c + +#define NV04_RENDER_SOLID_LINE_BETA4 0x00000194 +#define NV04_RENDER_SOLID_LINE_SURFACE 0x00000198 + + +#define NV01_RENDER_SOLID_TRIANGLE 0x0000001d + +#define NV01_RENDER_SOLID_TRIANGLE_NOP 0x00000100 +#define NV01_RENDER_SOLID_TRIANGLE_NOTIFY 0x00000104 +#define NV01_RENDER_SOLID_TRIANGLE_PATCH 0x0000010c +#define NV01_RENDER_SOLID_TRIANGLE_DMA_NOTIFY 0x00000180 +#define NV01_RENDER_SOLID_TRIANGLE_CLIP_RECTANGLE 0x00000184 +#define NV01_RENDER_SOLID_TRIANGLE_PATTERN 0x00000188 +#define NV01_RENDER_SOLID_TRIANGLE_ROP 0x0000018c +#define NV01_RENDER_SOLID_TRIANGLE_BETA1 0x00000190 +#define NV01_RENDER_SOLID_TRIANGLE_SURFACE 0x00000194 +#define NV01_RENDER_SOLID_TRIANGLE_OPERATION 0x000002fc +#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_SRCCOPY_AND 0x00000000 +#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_ROP_AND 0x00000001 +#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_BLEND_AND 0x00000002 +#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_SRCCOPY 0x00000003 +#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_SRCCOPY_PREMULT 0x00000004 +#define NV01_RENDER_SOLID_TRIANGLE_OPERATION_BLEND_PREMULT 0x00000005 +#define NV01_RENDER_SOLID_TRIANGLE_COLOR_FORMAT 0x00000300 +#define NV01_RENDER_SOLID_TRIANGLE_COLOR 0x00000304 +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0 0x00000310 +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0_X_SHIFT 0 +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0_X_MASK 0x0000ffff +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0_Y_SHIFT 16 +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT0_Y_MASK 0xffff0000 +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1 0x00000314 +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1_X_SHIFT 0 +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1_X_MASK 0x0000ffff +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1_Y_SHIFT 16 +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT1_Y_MASK 0xffff0000 +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2 0x00000318 +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2_X_SHIFT 0 +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2_X_MASK 0x0000ffff +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2_Y_SHIFT 16 +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE_POINT2_Y_MASK 0xffff0000 +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT0_X 0x00000320 +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT0_Y 0x00000324 +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT1_X 0x00000328 +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT1_Y 0x0000032c +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT2_X 0x00000330 +#define NV01_RENDER_SOLID_TRIANGLE_TRIANGLE32_POINT2_Y 0x00000334 +#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH(x) (0x00000400+((x)*4)) +#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH__SIZE 0x00000020 +#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH_X_SHIFT 0 +#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH_X_MASK 0x0000ffff +#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH_Y_SHIFT 16 +#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH_Y_MASK 0xffff0000 +#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH32_POINT_X(x) (0x00000480+((x)*8)) +#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH32_POINT_X__SIZE 0x00000010 +#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH32_POINT_Y(x) (0x00000484+((x)*8)) +#define NV01_RENDER_SOLID_TRIANGLE_TRIMESH32_POINT_Y__SIZE 0x00000010 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_COLOR(x) (0x00000500+((x)*16)) +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_COLOR__SIZE 0x00000008 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0(x) (0x00000504+((x)*16)) +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0__SIZE 0x00000008 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0_X_SHIFT 0 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0_X_MASK 0x0000ffff +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0_Y_SHIFT 16 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT0_Y_MASK 0xffff0000 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1(x) (0x00000508+((x)*16)) +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1__SIZE 0x00000008 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1_X_SHIFT 0 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1_X_MASK 0x0000ffff +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1_Y_SHIFT 16 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT1_Y_MASK 0xffff0000 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2(x) (0x0000050c+((x)*16)) +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2__SIZE 0x00000008 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2_X_SHIFT 0 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2_X_MASK 0x0000ffff +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2_Y_SHIFT 16 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIANGLE_POINT2_Y_MASK 0xffff0000 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_COLOR(x) (0x00000580+((x)*8)) +#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_COLOR__SIZE 0x00000010 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT(x) (0x00000584+((x)*8)) +#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT__SIZE 0x00000010 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT_X_SHIFT 0 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT_X_MASK 0x0000ffff +#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT_Y_SHIFT 16 +#define NV01_RENDER_SOLID_TRIANGLE_CTRIMESH_POINT_Y_MASK 0xffff0000 + + +#define NV04_RENDER_SOLID_TRIANGLE 0x0000005d + +#define NV04_RENDER_SOLID_TRIANGLE_BETA4 0x00000194 +#define NV04_RENDER_SOLID_TRIANGLE_SURFACE 0x00000198 + + +#define NV01_RENDER_SOLID_RECTANGLE 0x0000001e + +#define NV01_RENDER_SOLID_RECTANGLE_NOP 0x00000100 +#define NV01_RENDER_SOLID_RECTANGLE_NOTIFY 0x00000104 +#define NV01_RENDER_SOLID_RECTANGLE_PATCH 0x0000010c +#define NV01_RENDER_SOLID_RECTANGLE_DMA_NOTIFY 0x00000180 +#define NV01_RENDER_SOLID_RECTANGLE_CLIP_RECTANGLE 0x00000184 +#define NV01_RENDER_SOLID_RECTANGLE_PATTERN 0x00000188 +#define NV01_RENDER_SOLID_RECTANGLE_ROP 0x0000018c +#define NV01_RENDER_SOLID_RECTANGLE_BETA1 0x00000190 +#define NV01_RENDER_SOLID_RECTANGLE_SURFACE 0x00000194 +#define NV01_RENDER_SOLID_RECTANGLE_OPERATION 0x000002fc +#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_SRCCOPY_AND 0x00000000 +#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_ROP_AND 0x00000001 +#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_BLEND_AND 0x00000002 +#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_SRCCOPY 0x00000003 +#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_SRCCOPY_PREMULT 0x00000004 +#define NV01_RENDER_SOLID_RECTANGLE_OPERATION_BLEND_PREMULT 0x00000005 +#define NV01_RENDER_SOLID_RECTANGLE_COLOR_FORMAT 0x00000300 +#define NV01_RENDER_SOLID_RECTANGLE_COLOR 0x00000304 +#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT(x) (0x00000400+((x)*8)) +#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT__SIZE 0x00000010 +#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT_X_SHIFT 0 +#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT_X_MASK 0x0000ffff +#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT_Y_SHIFT 16 +#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_POINT_Y_MASK 0xffff0000 +#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE(x) (0x00000404+((x)*8)) +#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE__SIZE 0x00000010 +#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE_W_SHIFT 0 +#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE_W_MASK 0x0000ffff +#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE_H_SHIFT 16 +#define NV01_RENDER_SOLID_RECTANGLE_RECTANGLE_SIZE_H_MASK 0xffff0000 + + +#define NV04_RENDER_SOLID_RECTANGLE 0x0000005e + +#define NV04_RENDER_SOLID_RECTANGLE_BETA4 0x00000194 +#define NV04_RENDER_SOLID_RECTANGLE_SURFACE 0x00000198 + + +#define NV01_IMAGE_BLIT 0x0000001f + +#define NV01_IMAGE_BLIT_NOP 0x00000100 +#define NV01_IMAGE_BLIT_NOTIFY 0x00000104 +#define NV01_IMAGE_BLIT_PATCH 0x0000010c +#define NV01_IMAGE_BLIT_DMA_NOTIFY 0x00000180 +#define NV01_IMAGE_BLIT_COLOR_KEY 0x00000184 +#define NV01_IMAGE_BLIT_CLIP_RECTANGLE 0x00000188 +#define NV01_IMAGE_BLIT_PATTERN 0x0000018c +#define NV01_IMAGE_BLIT_ROP 0x00000190 +#define NV01_IMAGE_BLIT_BETA1 0x00000194 +#define NV01_IMAGE_BLIT_SURFACE 0x0000019c +#define NV01_IMAGE_BLIT_OPERATION 0x000002fc +#define NV01_IMAGE_BLIT_OPERATION_SRCCOPY_AND 0x00000000 +#define NV01_IMAGE_BLIT_OPERATION_ROP_AND 0x00000001 +#define NV01_IMAGE_BLIT_OPERATION_BLEND_AND 0x00000002 +#define NV01_IMAGE_BLIT_OPERATION_SRCCOPY 0x00000003 +#define NV01_IMAGE_BLIT_OPERATION_SRCCOPY_PREMULT 0x00000004 +#define NV01_IMAGE_BLIT_OPERATION_BLEND_PREMULT 0x00000005 +#define NV01_IMAGE_BLIT_IMAGE_INPUT 0x00000204 +#define NV01_IMAGE_BLIT_POINT_IN 0x00000300 +#define NV01_IMAGE_BLIT_POINT_IN_X_SHIFT 0 +#define NV01_IMAGE_BLIT_POINT_IN_X_MASK 0x0000ffff +#define NV01_IMAGE_BLIT_POINT_IN_Y_SHIFT 16 +#define NV01_IMAGE_BLIT_POINT_IN_Y_MASK 0xffff0000 +#define NV01_IMAGE_BLIT_POINT_OUT 0x00000304 +#define NV01_IMAGE_BLIT_POINT_OUT_X_SHIFT 0 +#define NV01_IMAGE_BLIT_POINT_OUT_X_MASK 0x0000ffff +#define NV01_IMAGE_BLIT_POINT_OUT_Y_SHIFT 16 +#define NV01_IMAGE_BLIT_POINT_OUT_Y_MASK 0xffff0000 +#define NV01_IMAGE_BLIT_SIZE 0x00000308 +#define NV01_IMAGE_BLIT_SIZE_W_SHIFT 0 +#define NV01_IMAGE_BLIT_SIZE_W_MASK 0x0000ffff +#define NV01_IMAGE_BLIT_SIZE_H_SHIFT 16 +#define NV01_IMAGE_BLIT_SIZE_H_MASK 0xffff0000 + + +#define NV04_IMAGE_BLIT 0x0000005f + +#define NV04_IMAGE_BLIT_ROP 0x00000190 +#define NV04_IMAGE_BLIT_BETA4 0x00000198 +#define NV04_IMAGE_BLIT_SURFACE 0x0000019c + + +#define NV12_IMAGE_BLIT 0x0000009f + +#define NV12_IMAGE_BLIT_WAIT_FOR_IDLE 0x00000108 + + +#define NV01_IMAGE_FROM_CPU 0x00000021 + +#define NV01_IMAGE_FROM_CPU_NOP 0x00000100 +#define NV01_IMAGE_FROM_CPU_NOTIFY 0x00000104 +#define NV01_IMAGE_FROM_CPU_PATCH 0x0000010c +#define NV01_IMAGE_FROM_CPU_DMA_NOTIFY 0x00000180 +#define NV01_IMAGE_FROM_CPU_COLOR_KEY 0x00000184 +#define NV01_IMAGE_FROM_CPU_CLIP_RECTANGLE 0x00000188 +#define NV01_IMAGE_FROM_CPU_PATTERN 0x0000018c +#define NV01_IMAGE_FROM_CPU_ROP 0x00000190 +#define NV01_IMAGE_FROM_CPU_BETA1 0x00000194 +#define NV01_IMAGE_FROM_CPU_SURFACE 0x00000198 +#define NV01_IMAGE_FROM_CPU_OPERATION 0x000002fc +#define NV01_IMAGE_FROM_CPU_OPERATION_SRCCOPY_AND 0x00000000 +#define NV01_IMAGE_FROM_CPU_OPERATION_ROP_AND 0x00000001 +#define NV01_IMAGE_FROM_CPU_OPERATION_BLEND_AND 0x00000002 +#define NV01_IMAGE_FROM_CPU_OPERATION_SRCCOPY 0x00000003 +#define NV01_IMAGE_FROM_CPU_OPERATION_SRCCOPY_PREMULT 0x00000004 +#define NV01_IMAGE_FROM_CPU_OPERATION_BLEND_PREMULT 0x00000005 +#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT 0x00000300 +#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT_Y8 0x00000001 +#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT_A1R5G5B5 0x00000002 +#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT_X1R5G5B5 0x00000003 +#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT_A8R8G8B8 0x00000004 +#define NV01_IMAGE_FROM_CPU_COLOR_FORMAT_X8R8G8B8 0x00000005 +#define NV01_IMAGE_FROM_CPU_POINT 0x00000304 +#define NV01_IMAGE_FROM_CPU_POINT_X_SHIFT 0 +#define NV01_IMAGE_FROM_CPU_POINT_X_MASK 0x0000ffff +#define NV01_IMAGE_FROM_CPU_POINT_Y_SHIFT 16 +#define NV01_IMAGE_FROM_CPU_POINT_Y_MASK 0xffff0000 +#define NV01_IMAGE_FROM_CPU_SIZE_OUT 0x00000308 +#define NV01_IMAGE_FROM_CPU_SIZE_OUT_W_SHIFT 0 +#define NV01_IMAGE_FROM_CPU_SIZE_OUT_W_MASK 0x0000ffff +#define NV01_IMAGE_FROM_CPU_SIZE_OUT_H_SHIFT 16 +#define NV01_IMAGE_FROM_CPU_SIZE_OUT_H_MASK 0xffff0000 +#define NV01_IMAGE_FROM_CPU_SIZE_IN 0x0000030c +#define NV01_IMAGE_FROM_CPU_SIZE_IN_W_SHIFT 0 +#define NV01_IMAGE_FROM_CPU_SIZE_IN_W_MASK 0x0000ffff +#define NV01_IMAGE_FROM_CPU_SIZE_IN_H_SHIFT 16 +#define NV01_IMAGE_FROM_CPU_SIZE_IN_H_MASK 0xffff0000 +#define NV01_IMAGE_FROM_CPU_COLOR(x) (0x00000400+((x)*4)) +#define NV01_IMAGE_FROM_CPU_COLOR__SIZE 0x00000020 + + +#define NV04_IMAGE_FROM_CPU 0x00000061 + +#define NV04_IMAGE_FROM_CPU_BETA4 0x00000198 +#define NV04_IMAGE_FROM_CPU_SURFACE 0x0000019c + + +#define NV05_IMAGE_FROM_CPU 0x00000065 + +#define NV05_IMAGE_FROM_CPU_COLOR_CONVERSION 0x000002f8 + + +#define NV10_IMAGE_FROM_CPU 0x0000008a + +#define NV10_IMAGE_FROM_CPU_WAIT_FOR_IDLE 0x00000108 + + +#define NV30_IMAGE_FROM_CPU 0x0000038a + + + +#define NV40_IMAGE_FROM_CPU 0x0000308a + + + +#define NV01_NULL 0x00000030 + + + +#define NV03_STRETCHED_IMAGE_FROM_CPU 0x00000036 + +#define NV03_STRETCHED_IMAGE_FROM_CPU_NOP 0x00000100 +#define NV03_STRETCHED_IMAGE_FROM_CPU_NOTIFY 0x00000104 +#define NV03_STRETCHED_IMAGE_FROM_CPU_PATCH 0x0000010c +#define NV03_STRETCHED_IMAGE_FROM_CPU_DMA_NOTIFY 0x00000180 +#define NV03_STRETCHED_IMAGE_FROM_CPU_COLOR_KEY 0x00000184 +#define NV03_STRETCHED_IMAGE_FROM_CPU_PATTERN 0x00000188 +#define NV03_STRETCHED_IMAGE_FROM_CPU_ROP 0x0000018c +#define NV03_STRETCHED_IMAGE_FROM_CPU_BETA1 0x00000190 +#define NV03_STRETCHED_IMAGE_FROM_CPU_SURFACE 0x00000194 +#define NV03_STRETCHED_IMAGE_FROM_CPU_OPERATION 0x000002fc +#define NV03_STRETCHED_IMAGE_FROM_CPU_COLOR_FORMAT 0x00000300 +#define NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN 0x00000304 +#define NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN_W_SHIFT 0 +#define NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN_W_MASK 0x0000ffff +#define NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN_H_SHIFT 16 +#define NV03_STRETCHED_IMAGE_FROM_CPU_SIZE_IN_H_MASK 0xffff0000 +#define NV03_STRETCHED_IMAGE_FROM_CPU_DX_DU 0x00000308 +#define NV03_STRETCHED_IMAGE_FROM_CPU_DY_DV 0x0000030c +#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT 0x00000310 +#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT_X_SHIFT 0 +#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT_X_MASK 0x0000ffff +#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT_Y_SHIFT 16 +#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_POINT_Y_MASK 0xffff0000 +#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE 0x00000314 +#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE_W_SHIFT 0 +#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE_W_MASK 0x0000ffff +#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE_H_SHIFT 16 +#define NV03_STRETCHED_IMAGE_FROM_CPU_CLIP_SIZE_H_MASK 0xffff0000 +#define NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4 0x00000318 +#define NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4_X_SHIFT 0 +#define NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4_X_MASK 0x0000ffff +#define NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4_Y_SHIFT 16 +#define NV03_STRETCHED_IMAGE_FROM_CPU_POINT12D4_Y_MASK 0xffff0000 +#define NV03_STRETCHED_IMAGE_FROM_CPU_COLOR(x) (0x00000400+((x)*4)) +#define NV03_STRETCHED_IMAGE_FROM_CPU_COLOR__SIZE 0x00000020 + + +#define NV04_STRETCHED_IMAGE_FROM_CPU 0x00000076 + +#define NV04_STRETCHED_IMAGE_FROM_CPU_BETA4 0x00000194 +#define NV04_STRETCHED_IMAGE_FROM_CPU_SURFACE 0x00000198 + + +#define NV05_STRETCHED_IMAGE_FROM_CPU 0x00000066 + +#define NV05_STRETCHED_IMAGE_FROM_CPU_COLOR_CONVERSION 0x000002f8 + + +#define NV30_STRETCHED_IMAGE_FROM_CPU 0x00000366 + + + +#define NV40_STRETCHED_IMAGE_FROM_CPU 0x00003066 + + + +#define NV03_SCALED_IMAGE_FROM_MEMORY 0x00000037 + +#define NV03_SCALED_IMAGE_FROM_MEMORY_NOP 0x00000100 +#define NV03_SCALED_IMAGE_FROM_MEMORY_NOTIFY 0x00000104 +#define NV03_SCALED_IMAGE_FROM_MEMORY_DMA_NOTIFY 0x00000180 +#define NV03_SCALED_IMAGE_FROM_MEMORY_DMA_IMAGE 0x00000184 +#define NV03_SCALED_IMAGE_FROM_MEMORY_PATTERN 0x00000188 +#define NV03_SCALED_IMAGE_FROM_MEMORY_ROP 0x0000018c +#define NV03_SCALED_IMAGE_FROM_MEMORY_BETA1 0x00000190 +#define NV03_SCALED_IMAGE_FROM_MEMORY_SURFACE 0x00000194 +#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT 0x00000300 +#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A1R5G5B5 0x00000001 +#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X1R5G5B5 0x00000002 +#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_A8R8G8B8 0x00000003 +#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_X8R8G8B8 0x00000004 +#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_V8YB8U8YA8 0x00000005 +#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_YB8V8YA8U8 0x00000006 +#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_R5G6B5 0x00000007 +#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_Y8 0x00000008 +#define NV03_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT_AY8 0x00000009 +#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION 0x00000304 +#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY_AND 0x00000000 +#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_ROP_AND 0x00000001 +#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_BLEND_AND 0x00000002 +#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY 0x00000003 +#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_SRCCOPY_PREMULT 0x00000004 +#define NV03_SCALED_IMAGE_FROM_MEMORY_OPERATION_BLEND_PREMULT 0x00000005 +#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT 0x00000308 +#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_X_SHIFT 0 +#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_X_MASK 0x0000ffff +#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_Y_SHIFT 16 +#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_POINT_Y_MASK 0xffff0000 +#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE 0x0000030c +#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_W_SHIFT 0 +#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_W_MASK 0x0000ffff +#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_H_SHIFT 16 +#define NV03_SCALED_IMAGE_FROM_MEMORY_CLIP_SIZE_H_MASK 0xffff0000 +#define NV03_SCALED_IMAGE_FROM_MEMORY_OUT_POINT 0x00000310 +#define NV03_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_X_SHIFT 0 +#define NV03_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_X_MASK 0x0000ffff +#define NV03_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_Y_SHIFT 16 +#define NV03_SCALED_IMAGE_FROM_MEMORY_OUT_POINT_Y_MASK 0xffff0000 +#define NV03_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE 0x00000314 +#define NV03_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_W_SHIFT 0 +#define NV03_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_W_MASK 0x0000ffff +#define NV03_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_H_SHIFT 16 +#define NV03_SCALED_IMAGE_FROM_MEMORY_OUT_SIZE_H_MASK 0xffff0000 +#define NV03_SCALED_IMAGE_FROM_MEMORY_DU_DX 0x00000318 +#define NV03_SCALED_IMAGE_FROM_MEMORY_DV_DY 0x0000031c +#define NV03_SCALED_IMAGE_FROM_MEMORY_SIZE 0x00000400 +#define NV03_SCALED_IMAGE_FROM_MEMORY_SIZE_W_SHIFT 0 +#define NV03_SCALED_IMAGE_FROM_MEMORY_SIZE_W_MASK 0x0000ffff +#define NV03_SCALED_IMAGE_FROM_MEMORY_SIZE_H_SHIFT 16 +#define NV03_SCALED_IMAGE_FROM_MEMORY_SIZE_H_MASK 0xffff0000 +#define NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT 0x00000404 +#define NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_PITCH_SHIFT 0 +#define NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_PITCH_MASK 0x0000ffff +#define NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_SHIFT 16 +#define NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_MASK 0x00ff0000 +#define NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CENTER 0x00010000 +#define NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_ORIGIN_CORNER 0x00020000 +#define NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_SHIFT 24 +#define NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_MASK 0xff000000 +#define NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_POINT_SAMPLE 0x00000000 +#define NV03_SCALED_IMAGE_FROM_MEMORY_FORMAT_FILTER_BILINEAR 0x01000000 +#define NV03_SCALED_IMAGE_FROM_MEMORY_OFFSET 0x00000408 +#define NV03_SCALED_IMAGE_FROM_MEMORY_POINT 0x0000040c +#define NV03_SCALED_IMAGE_FROM_MEMORY_POINT_U_SHIFT 0 +#define NV03_SCALED_IMAGE_FROM_MEMORY_POINT_U_MASK 0x0000ffff +#define NV03_SCALED_IMAGE_FROM_MEMORY_POINT_V_SHIFT 16 +#define NV03_SCALED_IMAGE_FROM_MEMORY_POINT_V_MASK 0xffff0000 + + +#define NV04_SCALED_IMAGE_FROM_MEMORY 0x00000077 + +#define NV04_SCALED_IMAGE_FROM_MEMORY_BETA4 0x00000194 +#define NV04_SCALED_IMAGE_FROM_MEMORY_SURFACE 0x00000198 + + +#define NV05_SCALED_IMAGE_FROM_MEMORY 0x00000063 + +#define NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION 0x000002fc +#define NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_DITHER 0x00000000 +#define NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_TRUNCATE 0x00000001 +#define NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_SUBTR_TRUNCATE 0x00000002 + + +#define NV10_SCALED_IMAGE_FROM_MEMORY 0x00000089 + +#define NV10_SCALED_IMAGE_FROM_MEMORY_WAIT_FOR_IDLE 0x00000108 + + +#define NV30_SCALED_IMAGE_FROM_MEMORY 0x00000389 + + + +#define NV40_SCALED_IMAGE_FROM_MEMORY 0x00003089 + + + +#define NV04_DVD_SUBPICTURE 0x00000038 + +#define NV04_DVD_SUBPICTURE_NOP 0x00000100 +#define NV04_DVD_SUBPICTURE_NOTIFY 0x00000104 +#define NV04_DVD_SUBPICTURE_DMA_NOTIFY 0x00000180 +#define NV04_DVD_SUBPICTURE_DMA_OVERLAY 0x00000184 +#define NV04_DVD_SUBPICTURE_DMA_IMAGEIN 0x00000188 +#define NV04_DVD_SUBPICTURE_DMA_IMAGEOUT 0x0000018c +#define NV04_DVD_SUBPICTURE_IMAGEOUT_POINT 0x00000300 +#define NV04_DVD_SUBPICTURE_IMAGEOUT_POINT_X_SHIFT 0 +#define NV04_DVD_SUBPICTURE_IMAGEOUT_POINT_X_MASK 0x0000ffff +#define NV04_DVD_SUBPICTURE_IMAGEOUT_POINT_Y_SHIFT 16 +#define NV04_DVD_SUBPICTURE_IMAGEOUT_POINT_Y_MASK 0xffff0000 +#define NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE 0x00000304 +#define NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE_W_SHIFT 0 +#define NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE_W_MASK 0x0000ffff +#define NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE_H_SHIFT 16 +#define NV04_DVD_SUBPICTURE_IMAGEOUT_SIZE_H_MASK 0xffff0000 +#define NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT 0x00000308 +#define NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT_PITCH_SHIFT 0 +#define NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT_PITCH_MASK 0x0000ffff +#define NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT_COLOR_SHIFT 16 +#define NV04_DVD_SUBPICTURE_IMAGEOUT_FORMAT_COLOR_MASK 0xffff0000 +#define NV04_DVD_SUBPICTURE_IMAGEOUT_OFFSET 0x0000030c +#define NV04_DVD_SUBPICTURE_IMAGEIN_DELTA_DU_DX 0x00000310 +#define NV04_DVD_SUBPICTURE_IMAGEIN_DELTA_DV_DY 0x00000314 +#define NV04_DVD_SUBPICTURE_IMAGEIN_SIZE 0x00000318 +#define NV04_DVD_SUBPICTURE_IMAGEIN_SIZE_W_SHIFT 0 +#define NV04_DVD_SUBPICTURE_IMAGEIN_SIZE_W_MASK 0x0000ffff +#define NV04_DVD_SUBPICTURE_IMAGEIN_SIZE_H_SHIFT 16 +#define NV04_DVD_SUBPICTURE_IMAGEIN_SIZE_H_MASK 0xffff0000 +#define NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT 0x0000031c +#define NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT_PITCH_SHIFT 0 +#define NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT_PITCH_MASK 0x0000ffff +#define NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT_COLOR_SHIFT 16 +#define NV04_DVD_SUBPICTURE_IMAGEIN_FORMAT_COLOR_MASK 0xffff0000 +#define NV04_DVD_SUBPICTURE_IMAGEIN_OFFSET 0x00000320 +#define NV04_DVD_SUBPICTURE_IMAGEIN_POINT 0x00000324 +#define NV04_DVD_SUBPICTURE_IMAGEIN_POINT_U_SHIFT 0 +#define NV04_DVD_SUBPICTURE_IMAGEIN_POINT_U_MASK 0x0000ffff +#define NV04_DVD_SUBPICTURE_IMAGEIN_POINT_V_SHIFT 16 +#define NV04_DVD_SUBPICTURE_IMAGEIN_POINT_V_MASK 0xffff0000 +#define NV04_DVD_SUBPICTURE_OVERLAY_DELTA_DU_DX 0x00000328 +#define NV04_DVD_SUBPICTURE_OVERLAY_DELTA_DV_DY 0x0000032c +#define NV04_DVD_SUBPICTURE_OVERLAY_SIZE 0x00000330 +#define NV04_DVD_SUBPICTURE_OVERLAY_SIZE_W_SHIFT 0 +#define NV04_DVD_SUBPICTURE_OVERLAY_SIZE_W_MASK 0x0000ffff +#define NV04_DVD_SUBPICTURE_OVERLAY_SIZE_H_SHIFT 16 +#define NV04_DVD_SUBPICTURE_OVERLAY_SIZE_H_MASK 0xffff0000 +#define NV04_DVD_SUBPICTURE_OVERLAY_FORMAT 0x00000334 +#define NV04_DVD_SUBPICTURE_OVERLAY_FORMAT_PITCH_SHIFT 0 +#define NV04_DVD_SUBPICTURE_OVERLAY_FORMAT_PITCH_MASK 0x0000ffff +#define NV04_DVD_SUBPICTURE_OVERLAY_FORMAT_COLOR_SHIFT 16 +#define NV04_DVD_SUBPICTURE_OVERLAY_FORMAT_COLOR_MASK 0xffff0000 +#define NV04_DVD_SUBPICTURE_OVERLAY_OFFSET 0x00000338 +#define NV04_DVD_SUBPICTURE_OVERLAY_POINT 0x0000033c +#define NV04_DVD_SUBPICTURE_OVERLAY_POINT_U_SHIFT 0 +#define NV04_DVD_SUBPICTURE_OVERLAY_POINT_U_MASK 0x0000ffff +#define NV04_DVD_SUBPICTURE_OVERLAY_POINT_V_SHIFT 16 +#define NV04_DVD_SUBPICTURE_OVERLAY_POINT_V_MASK 0xffff0000 + + +#define NV10_DVD_SUBPICTURE 0x00000088 + +#define NV10_DVD_SUBPICTURE_WAIT_FOR_IDLE 0x00000108 + + +#define NV04_MEMORY_TO_MEMORY_FORMAT 0x00000039 + +#define NV04_MEMORY_TO_MEMORY_FORMAT_NOP 0x00000100 +#define NV04_MEMORY_TO_MEMORY_FORMAT_NOTIFY 0x00000104 +#define NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY 0x00000180 +#define NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_IN 0x00000184 +#define NV04_MEMORY_TO_MEMORY_FORMAT_DMA_BUFFER_OUT 0x00000188 +#define NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN 0x0000030c +#define NV04_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT 0x00000310 +#define NV04_MEMORY_TO_MEMORY_FORMAT_PITCH_IN 0x00000314 +#define NV04_MEMORY_TO_MEMORY_FORMAT_PITCH_OUT 0x00000318 +#define NV04_MEMORY_TO_MEMORY_FORMAT_LINE_LENGTH_IN 0x0000031c +#define NV04_MEMORY_TO_MEMORY_FORMAT_LINE_COUNT 0x00000320 +#define NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT 0x00000324 +#define NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT_INPUT_INC_SHIFT 0 +#define NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT_INPUT_INC_MASK 0x000000ff +#define NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT_OUTPUT_INC_SHIFT 8 +#define NV04_MEMORY_TO_MEMORY_FORMAT_FORMAT_OUTPUT_INC_MASK 0x0000ff00 +#define NV04_MEMORY_TO_MEMORY_FORMAT_BUF_NOTIFY 0x00000328 + + +#define NV50_MEMORY_TO_MEMORY_FORMAT 0x00005039 + +#define NV50_MEMORY_TO_MEMORY_FORMAT_SERIALIZE 0x00000110 +#define NV50_MEMORY_TO_MEMORY_FORMAT_LINEAR_IN 0x00000200 +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_MODE_IN 0x00000204 +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_PITCH_IN 0x00000208 +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_HEIGHT_IN 0x0000020c +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_DEPTH_IN 0x00000210 +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_IN_Z 0x00000214 +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_IN 0x00000218 +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_IN_X_SHIFT 0 +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_IN_X_MASK 0x0000ffff +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_IN_Y_SHIFT 16 +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_IN_Y_MASK 0xffff0000 +#define NV50_MEMORY_TO_MEMORY_FORMAT_LINEAR_OUT 0x0000021c +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_MODE_OUT 0x00000220 +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_PITCH_OUT 0x00000224 +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_HEIGHT_OUT 0x00000228 +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_DEPTH_OUT 0x0000022c +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_OUT_Z 0x00000230 +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_OUT 0x00000234 +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_OUT_X_SHIFT 0 +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_OUT_X_MASK 0x0000ffff +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_OUT_Y_SHIFT 16 +#define NV50_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_OUT_Y_MASK 0xffff0000 +#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN_HIGH 0x00000238 +#define NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_OUT_HIGH 0x0000023c + + +#define NV01_MEMORY_LOCAL_BANKED 0x0000003d + + + +#define NV01_MAPPING_SYSTEM 0x0000003e + + + +#define NV03_MEMORY_LOCAL_CURSOR 0x0000003f + + + +#define NV01_MEMORY_LOCAL_LINEAR 0x00000040 + + + +#define NV01_MAPPING_LOCAL 0x00000041 + + + +#define NV04_CONTEXT_SURFACES_2D 0x00000042 + +#define NV04_CONTEXT_SURFACES_2D_NOP 0x00000100 +#define NV04_CONTEXT_SURFACES_2D_NOTIFY 0x00000104 +#define NV04_CONTEXT_SURFACES_2D_PM_TRIGGER 0x00000140 +#define NV04_CONTEXT_SURFACES_2D_DMA_NOTIFY 0x00000180 +#define NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_SOURCE 0x00000184 +#define NV04_CONTEXT_SURFACES_2D_DMA_IMAGE_DESTIN 0x00000188 +#define NV04_CONTEXT_SURFACES_2D_FORMAT 0x00000300 +#define NV04_CONTEXT_SURFACES_2D_FORMAT_Y8 0x00000001 +#define NV04_CONTEXT_SURFACES_2D_FORMAT_X1R5G5B5_Z1R5G5B5 0x00000002 +#define NV04_CONTEXT_SURFACES_2D_FORMAT_X1R5G5B5_X1R5G5B5 0x00000003 +#define NV04_CONTEXT_SURFACES_2D_FORMAT_R5G6B5 0x00000004 +#define NV04_CONTEXT_SURFACES_2D_FORMAT_Y16 0x00000005 +#define NV04_CONTEXT_SURFACES_2D_FORMAT_X8R8G8B8_Z8R8G8B8 0x00000006 +#define NV04_CONTEXT_SURFACES_2D_FORMAT_X8R8G8B8_X8R8G8B8 0x00000007 +#define NV04_CONTEXT_SURFACES_2D_FORMAT_X1A7R8G8B8_Z1A7R8G8B8 0x00000008 +#define NV04_CONTEXT_SURFACES_2D_FORMAT_X1A7R8G8B8_X1A7R8G8B8 0x00000009 +#define NV04_CONTEXT_SURFACES_2D_FORMAT_A8R8G8B8 0x0000000a +#define NV04_CONTEXT_SURFACES_2D_FORMAT_Y32 0x0000000b +#define NV04_CONTEXT_SURFACES_2D_PITCH 0x00000304 +#define NV04_CONTEXT_SURFACES_2D_PITCH_SOURCE_SHIFT 0 +#define NV04_CONTEXT_SURFACES_2D_PITCH_SOURCE_MASK 0x0000ffff +#define NV04_CONTEXT_SURFACES_2D_PITCH_DESTIN_SHIFT 16 +#define NV04_CONTEXT_SURFACES_2D_PITCH_DESTIN_MASK 0xffff0000 +#define NV04_CONTEXT_SURFACES_2D_OFFSET_SOURCE 0x00000308 +#define NV04_CONTEXT_SURFACES_2D_OFFSET_DESTIN 0x0000030c + + +#define NV10_CONTEXT_SURFACES_2D 0x00000062 + + + +#define NV30_CONTEXT_SURFACES_2D 0x00000362 + + + +#define NV40_CONTEXT_SURFACES_2D 0x00003062 + + + +#define NV03_CONTEXT_ROP 0x00000043 + +#define NV03_CONTEXT_ROP_NOP 0x00000100 +#define NV03_CONTEXT_ROP_NOTIFY 0x00000104 +#define NV03_CONTEXT_ROP_DMA_NOTIFY 0x00000180 +#define NV03_CONTEXT_ROP_ROP 0x00000300 +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_SHIFT 0 +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_MASK 0x0000000f +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_CLEAR 0x00000000 +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_NOR 0x00000001 +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_AND_INVERTED 0x00000002 +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_COPY_INVERTED 0x00000003 +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_AND_REVERSE 0x00000004 +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_INVERT 0x00000005 +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_XOR 0x00000006 +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_NAND 0x00000007 +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_AND 0x00000008 +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_EQUI 0x00000009 +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_NOOP 0x0000000a +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_OR_INVERTED 0x0000000b +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_COPY 0x0000000c +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_OR_REVERSE 0x0000000d +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_OR 0x0000000e +#define NV03_CONTEXT_ROP_ROP_DST_LOGIC_OP_SET 0x0000000f +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_SHIFT 4 +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_MASK 0x000000f0 +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_CLEAR 0x00000000 +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_NOR 0x00000010 +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_AND_INVERTED 0x00000020 +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_COPY_INVERTED 0x00000030 +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_AND_REVERSE 0x00000040 +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_INVERT 0x00000050 +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_XOR 0x00000060 +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_NAND 0x00000070 +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_AND 0x00000080 +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_EQUI 0x00000090 +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_NOOP 0x000000a0 +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_OR_INVERTED 0x000000b0 +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_COPY 0x000000c0 +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_OR_REVERSE 0x000000d0 +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_OR 0x000000e0 +#define NV03_CONTEXT_ROP_ROP_SRC_LOGIC_OP_SET 0x000000f0 + + +#define NV04_IMAGE_PATTERN 0x00000044 + +#define NV04_IMAGE_PATTERN_NOP 0x00000100 +#define NV04_IMAGE_PATTERN_NOTIFY 0x00000104 +#define NV04_IMAGE_PATTERN_DMA_NOTIFY 0x00000180 +#define NV04_IMAGE_PATTERN_COLOR_FORMAT 0x00000300 +#define NV04_IMAGE_PATTERN_COLOR_FORMAT_A16R5G6B5 0x00000001 +#define NV04_IMAGE_PATTERN_COLOR_FORMAT_X16A1R5G5B5 0x00000002 +#define NV04_IMAGE_PATTERN_COLOR_FORMAT_A8R8G8B8 0x00000003 +#define NV04_IMAGE_PATTERN_MONOCHROME_FORMAT 0x00000304 +#define NV04_IMAGE_PATTERN_MONOCHROME_FORMAT_CGA6 0x00000001 +#define NV04_IMAGE_PATTERN_MONOCHROME_FORMAT_LE 0x00000002 +#define NV04_IMAGE_PATTERN_MONOCHROME_SHAPE 0x00000308 +#define NV04_IMAGE_PATTERN_MONOCHROME_SHAPE_8X8 0x00000000 +#define NV04_IMAGE_PATTERN_MONOCHROME_SHAPE_64X1 0x00000001 +#define NV04_IMAGE_PATTERN_MONOCHROME_SHAPE_1X64 0x00000002 +#define NV04_IMAGE_PATTERN_PATTERN_SELECT 0x0000030c +#define NV04_IMAGE_PATTERN_PATTERN_SELECT_MONO 0x00000001 +#define NV04_IMAGE_PATTERN_PATTERN_SELECT_COLOR 0x00000002 +#define NV04_IMAGE_PATTERN_MONOCHROME_COLOR0 0x00000310 +#define NV04_IMAGE_PATTERN_MONOCHROME_COLOR1 0x00000314 +#define NV04_IMAGE_PATTERN_MONOCHROME_PATTERN0 0x00000318 +#define NV04_IMAGE_PATTERN_MONOCHROME_PATTERN1 0x0000031c +#define NV04_IMAGE_PATTERN_PATTERN_Y8(x) (0x00000400+((x)*4)) +#define NV04_IMAGE_PATTERN_PATTERN_Y8__SIZE 0x00000010 +#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y0_SHIFT 0 +#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y0_MASK 0x000000ff +#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y1_SHIFT 8 +#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y1_MASK 0x0000ff00 +#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y2_SHIFT 16 +#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y2_MASK 0x00ff0000 +#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y3_SHIFT 24 +#define NV04_IMAGE_PATTERN_PATTERN_Y8_Y3_MASK 0xff000000 +#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5(x) (0x00000500+((x)*4)) +#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5__SIZE 0x00000020 +#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_B0_SHIFT 0 +#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_B0_MASK 0x0000001f +#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_G0_SHIFT 5 +#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_G0_MASK 0x000007e0 +#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_R0_SHIFT 11 +#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_R0_MASK 0x0000f800 +#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_B1_SHIFT 16 +#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_B1_MASK 0x001f0000 +#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_G1_SHIFT 21 +#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_G1_MASK 0x07e00000 +#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_R1_SHIFT 27 +#define NV04_IMAGE_PATTERN_PATTERN_R5G6B5_R1_MASK 0xf8000000 +#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5(x) (0x00000600+((x)*4)) +#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5__SIZE 0x00000020 +#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_B0_SHIFT 0 +#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_B0_MASK 0x0000001f +#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_G0_SHIFT 5 +#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_G0_MASK 0x000003e0 +#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_R0_SHIFT 10 +#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_R0_MASK 0x00007c00 +#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_B1_SHIFT 16 +#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_B1_MASK 0x001f0000 +#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_G1_SHIFT 21 +#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_G1_MASK 0x03e00000 +#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_R1_SHIFT 26 +#define NV04_IMAGE_PATTERN_PATTERN_X1R5G5B5_R1_MASK 0x7c000000 +#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8(x) (0x00000700+((x)*4)) +#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8__SIZE 0x00000040 +#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_B_SHIFT 0 +#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_B_MASK 0x000000ff +#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_G_SHIFT 8 +#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_G_MASK 0x0000ff00 +#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_R_SHIFT 16 +#define NV04_IMAGE_PATTERN_PATTERN_X8R8G8B8_R_MASK 0x00ff0000 + + +#define NV03_VIDEO_LUT_CURSOR_DAC 0x00000046 + +#define NV03_VIDEO_LUT_CURSOR_DAC_SYNCHRONIZE 0x00000100 +#define NV03_VIDEO_LUT_CURSOR_DAC_STOP_IMAGE 0x00000104 +#define NV03_VIDEO_LUT_CURSOR_DAC_STOP_CURSOR 0x00000108 +#define NV03_VIDEO_LUT_CURSOR_DAC_STOP_DAC 0x0000010c +#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_NOTIFY 0x00000180 +#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_IMAGE(x) (0x00000184+((x)*4)) +#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_IMAGE__SIZE 0x00000002 +#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_LUT(x) (0x0000018c+((x)*4)) +#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_LUT__SIZE 0x00000002 +#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_CURSOR(x) (0x00000194+((x)*4)) +#define NV03_VIDEO_LUT_CURSOR_DAC_DMA_CURSOR__SIZE 0x00000002 +#define NV03_VIDEO_LUT_CURSOR_DAC_GET 0x000002fc +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_OFFSET(x) (0x00000300+((x)*8)) +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_OFFSET__SIZE 0x00000002 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT(x) (0x00000304+((x)*8)) +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT__SIZE 0x00000002 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_PITCH_SHIFT 0 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_PITCH_MASK 0x0000ffff +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_COLOR_SHIFT 16 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_COLOR_MASK 0x0fff0000 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_NOTIFY_SHIFT 28 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_IMAGE_FORMAT_NOTIFY_MASK 0xf0000000 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_OFFSET(x) (0x00000340+((x)*12)) +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_OFFSET__SIZE 0x00000002 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT(x) (0x00000344+((x)*12)) +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT__SIZE 0x00000002 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_X_SHIFT 0 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_X_MASK 0x0000ffff +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_Y_SHIFT 16 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_Y_MASK 0xffff0000 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_FORMAT(x) (0x00000348+((x)*12)) +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_FORMAT__SIZE 0x00000002 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A 0x00000358 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A_X_SHIFT 0 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A_X_MASK 0x0000ffff +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A_Y_SHIFT 16 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_CURSOR_POINT_OUT_A_Y_MASK 0xffff0000 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE(x) (0x00000380+((x)*16)) +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE__SIZE 0x00000002 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE_W_SHIFT 0 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE_W_MASK 0x0000ffff +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE_H_SHIFT 16 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_IMAGE_SIZE_H_MASK 0xffff0000 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC(x) (0x00000384+((x)*16)) +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC__SIZE 0x00000002 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_START_SHIFT 0 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_START_MASK 0x0000ffff +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_WIDTH_SHIFT 16 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_WIDTH_MASK 0x0fff0000 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_POLARITY_SHIFT 28 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_HSYNC_POLARITY_MASK 0xf0000000 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC(x) (0x00000388+((x)*16)) +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC__SIZE 0x00000002 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_START_SHIFT 0 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_START_MASK 0x0000ffff +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_WIDTH_SHIFT 16 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_WIDTH_MASK 0x0fff0000 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_POLARITY_SHIFT 28 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_VSYNC_POLARITY_MASK 0xf0000000 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE(x) (0x0000038c+((x)*16)) +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE__SIZE 0x00000002 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_WIDTH_SHIFT 0 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_WIDTH_MASK 0x0000ffff +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_HEIGHT_SHIFT 16 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_HEIGHT_MASK 0x0fff0000 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_NOTIFY_SHIFT 28 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_DAC_TOTAL_SIZE_NOTIFY_MASK 0xf0000000 +#define NV03_VIDEO_LUT_CURSOR_DAC_SET_PIXEL_CLOCK 0x000003a0 + + +#define NV03_TEXTURED_TRIANGLE 0x00000048 + +#define NV03_TEXTURED_TRIANGLE_NOP 0x00000100 +#define NV03_TEXTURED_TRIANGLE_NOTIFY 0x00000104 +#define NV03_TEXTURED_TRIANGLE_PATCH 0x0000010c +#define NV03_TEXTURED_TRIANGLE_DMA_NOTIFY 0x00000180 +#define NV03_TEXTURED_TRIANGLE_DMA_TEXTURE 0x00000184 +#define NV03_TEXTURED_TRIANGLE_CLIP_RECTANGLE 0x00000188 +#define NV03_TEXTURED_TRIANGLE_SURFACE 0x0000018c +#define NV03_TEXTURED_TRIANGLE_TEXTURE_OFFSET 0x00000304 +#define NV03_TEXTURED_TRIANGLE_TEXTURE_FORMAT 0x00000308 +#define NV03_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_KEY_MASK_SHIFT 0 +#define NV03_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_KEY_MASK_MASK 0x0000ffff +#define NV03_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_KEY_ENABLE_SHIFT 16 +#define NV03_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_KEY_ENABLE_MASK 0x000f0000 +#define NV03_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_SHIFT 20 +#define NV03_TEXTURED_TRIANGLE_TEXTURE_FORMAT_COLOR_MASK 0x00f00000 +#define NV03_TEXTURED_TRIANGLE_TEXTURE_FORMAT_SIZE_MIN_SHIFT 24 +#define NV03_TEXTURED_TRIANGLE_TEXTURE_FORMAT_SIZE_MIN_MASK 0x0f000000 +#define NV03_TEXTURED_TRIANGLE_TEXTURE_FORMAT_SIZE_MAX_SHIFT 28 +#define NV03_TEXTURED_TRIANGLE_TEXTURE_FORMAT_SIZE_MAX_MASK 0xf0000000 +#define NV03_TEXTURED_TRIANGLE_FILTER 0x0000030c +#define NV03_TEXTURED_TRIANGLE_FILTER_SPREAD_X_SHIFT 0 +#define NV03_TEXTURED_TRIANGLE_FILTER_SPREAD_X_MASK 0x0000001f +#define NV03_TEXTURED_TRIANGLE_FILTER_SPREAD_Y_SHIFT 8 +#define NV03_TEXTURED_TRIANGLE_FILTER_SPREAD_Y_MASK 0x00001f00 +#define NV03_TEXTURED_TRIANGLE_FILTER_SIZE_ADJUST_SHIFT 16 +#define NV03_TEXTURED_TRIANGLE_FILTER_SIZE_ADJUST_MASK 0x00ff0000 +#define NV03_TEXTURED_TRIANGLE_FOG_COLOR 0x00000310 +#define NV03_TEXTURED_TRIANGLE_FOG_COLOR_B_SHIFT 0 +#define NV03_TEXTURED_TRIANGLE_FOG_COLOR_B_MASK 0x000000ff +#define NV03_TEXTURED_TRIANGLE_FOG_COLOR_G_SHIFT 8 +#define NV03_TEXTURED_TRIANGLE_FOG_COLOR_G_MASK 0x0000ff00 +#define NV03_TEXTURED_TRIANGLE_FOG_COLOR_R_SHIFT 16 +#define NV03_TEXTURED_TRIANGLE_FOG_COLOR_R_MASK 0x00ff0000 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT 0x00000314 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_INTERPOLATOR_SHIFT 0 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_INTERPOLATOR_MASK 0x0000000f +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_U_SHIFT 4 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_U_MASK 0x00000030 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_V_SHIFT 6 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_WRAP_V_MASK 0x000000c0 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_SOURCE_COLOR_SHIFT 8 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_SOURCE_COLOR_MASK 0x00000f00 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_CULLING_SHIFT 12 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_CULLING_MASK 0x00007000 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_Z_PERSPECTIVE_ENABLE (1 << 15) +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_Z_FUNC_SHIFT 16 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_Z_FUNC_MASK 0x000f0000 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_Z_WRITE_ENABLE_SHIFT 20 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_Z_WRITE_ENABLE_MASK 0x00f00000 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_COLOR_WRITE_ENABLE_SHIFT 24 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_COLOR_WRITE_ENABLE_MASK 0x07000000 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_ROP_SHIFT 27 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_ROP_MASK 0x18000000 +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_BETA (1 << 29) +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_DST_BLEND (1 << 30) +#define NV03_TEXTURED_TRIANGLE_CONTROL_OUT_SRC_BLEND (1 << 31) +#define NV03_TEXTURED_TRIANGLE_ALPHA_CONTROL 0x00000318 +#define NV03_TEXTURED_TRIANGLE_ALPHA_CONTROL_ALPHA_REF_SHIFT 0 +#define NV03_TEXTURED_TRIANGLE_ALPHA_CONTROL_ALPHA_REF_MASK 0x000000ff +#define NV03_TEXTURED_TRIANGLE_ALPHA_CONTROL_ALPHA_FUNC_SHIFT 8 +#define NV03_TEXTURED_TRIANGLE_ALPHA_CONTROL_ALPHA_FUNC_MASK 0xffffff00 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR(x) (0x00001000+((x)*32)) +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR__SIZE 0x00000080 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_I0_SHIFT 0 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_I0_MASK 0x0000000f +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_I1_SHIFT 4 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_I1_MASK 0x000000f0 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_I2_SHIFT 8 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_I2_MASK 0x00000f00 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_I3_SHIFT 12 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_I3_MASK 0x0000f000 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_I4_SHIFT 16 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_I4_MASK 0x000f0000 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_I5_SHIFT 20 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_I5_MASK 0x00f00000 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_FOG_SHIFT 24 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_FOG_MASK 0xff000000 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_COLOR(x) (0x00001004+((x)*32)) +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_COLOR__SIZE 0x00000080 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SX(x) (0x00001008+((x)*32)) +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SX__SIZE 0x00000080 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SY(x) (0x0000100c+((x)*32)) +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SY__SIZE 0x00000080 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SZ(x) (0x00001010+((x)*32)) +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_SZ__SIZE 0x00000080 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_RHW(x) (0x00001014+((x)*32)) +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_RHW__SIZE 0x00000080 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_TU(x) (0x00001018+((x)*32)) +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_TU__SIZE 0x00000080 +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_TV(x) (0x0000101c+((x)*32)) +#define NV03_TEXTURED_TRIANGLE_TLVERTEX_TV__SIZE 0x00000080 + + +#define NV04_GDI_RECTANGLE_TEXT 0x0000004a + +#define NV04_GDI_RECTANGLE_TEXT_NOP 0x00000100 +#define NV04_GDI_RECTANGLE_TEXT_NOTIFY 0x00000104 +#define NV04_GDI_RECTANGLE_TEXT_PATCH 0x0000010c +#define NV04_GDI_RECTANGLE_TEXT_PM_TRIGGER 0x00000140 +#define NV04_GDI_RECTANGLE_TEXT_DMA_NOTIFY 0x00000180 +#define NV04_GDI_RECTANGLE_TEXT_DMA_FONTS 0x00000184 +#define NV04_GDI_RECTANGLE_TEXT_PATTERN 0x00000188 +#define NV04_GDI_RECTANGLE_TEXT_ROP 0x0000018c +#define NV04_GDI_RECTANGLE_TEXT_BETA1 0x00000190 +#define NV04_GDI_RECTANGLE_TEXT_BETA4 0x00000194 +#define NV04_GDI_RECTANGLE_TEXT_SURFACE 0x00000198 +#define NV04_GDI_RECTANGLE_TEXT_OPERATION 0x000002fc +#define NV04_GDI_RECTANGLE_TEXT_OPERATION_SRCCOPY_AND 0x00000000 +#define NV04_GDI_RECTANGLE_TEXT_OPERATION_ROP_AND 0x00000001 +#define NV04_GDI_RECTANGLE_TEXT_OPERATION_BLEND_AND 0x00000002 +#define NV04_GDI_RECTANGLE_TEXT_OPERATION_SRCCOPY 0x00000003 +#define NV04_GDI_RECTANGLE_TEXT_OPERATION_SRCCOPY_PREMULT 0x00000004 +#define NV04_GDI_RECTANGLE_TEXT_OPERATION_BLEND_PREMULT 0x00000005 +#define NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT 0x00000300 +#define NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A16R5G6B5 0x00000001 +#define NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_X16A1R5G5B5 0x00000002 +#define NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8 0x00000003 +#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT 0x00000304 +#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT_CGA6 0x00000001 +#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT_LE 0x00000002 +#define NV04_GDI_RECTANGLE_TEXT_COLOR1_A 0x000003fc +#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT(x) (0x00000400+((x)*8)) +#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT__SIZE 0x00000020 +#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_Y_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_Y_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_X_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_X_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE(x) (0x00000404+((x)*8)) +#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE__SIZE 0x00000020 +#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_H_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_H_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_W_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_W_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0 0x000005f4 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0_L_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0_L_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0_T_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT0_T_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1 0x000005f8 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1_R_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1_R_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1_B_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_B_POINT1_B_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_COLOR1_B 0x000005fc +#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0(x) (0x00000600+((x)*8)) +#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0__SIZE 0x00000020 +#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_L_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_L_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_T_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_T_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1(x) (0x00000604+((x)*8)) +#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1__SIZE 0x00000020 +#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_R_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_R_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_B_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_B_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0 0x000007ec +#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_L_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_L_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_T_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_T_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1 0x000007f0 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_R_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_R_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_B_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_B_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_COLOR1_C 0x000007f4 +#define NV04_GDI_RECTANGLE_TEXT_SIZE_C 0x000007f8 +#define NV04_GDI_RECTANGLE_TEXT_SIZE_C_W_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_SIZE_C_W_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_SIZE_C_H_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_SIZE_C_H_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_POINT_C 0x000007fc +#define NV04_GDI_RECTANGLE_TEXT_POINT_C_X_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_POINT_C_X_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_POINT_C_Y_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_POINT_C_Y_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_C(x) (0x00000800+((x)*4)) +#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_C__SIZE 0x00000080 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0 0x00000be4 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_L_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_L_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_T_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_T_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1 0x00000be8 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_R_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_R_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_B_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_B_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_COLOR0_E 0x00000bec +#define NV04_GDI_RECTANGLE_TEXT_COLOR1_E 0x00000bf0 +#define NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E 0x00000bf4 +#define NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E_W_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E_W_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E_H_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_SIZE_IN_E_H_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E 0x00000bf8 +#define NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E_W_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E_W_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E_H_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_SIZE_OUT_E_H_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_POINT_E 0x00000bfc +#define NV04_GDI_RECTANGLE_TEXT_POINT_E_X_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_POINT_E_X_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_POINT_E_Y_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_POINT_E_Y_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR01_E(x) (0x00000c00+((x)*4)) +#define NV04_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR01_E__SIZE 0x00000080 +#define NV04_GDI_RECTANGLE_TEXT_FONT_F 0x00000ff0 +#define NV04_GDI_RECTANGLE_TEXT_FONT_F_OFFSET_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_FONT_F_OFFSET_MASK 0x0fffffff +#define NV04_GDI_RECTANGLE_TEXT_FONT_F_PITCH_SHIFT 28 +#define NV04_GDI_RECTANGLE_TEXT_FONT_F_PITCH_MASK 0xf0000000 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0 0x00000ff4 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0_L_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0_L_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0_T_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT0_T_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1 0x00000ff8 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1_R_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1_R_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1_B_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_F_POINT1_B_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_COLOR1_F 0x00000ffc +#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F(x) (0x00001000+((x)*4)) +#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F__SIZE 0x00000100 +#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_INDEX_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_INDEX_MASK 0x000000ff +#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_X_SHIFT 8 +#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_X_MASK 0x000fff00 +#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_Y_SHIFT 20 +#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_F_Y_MASK 0xfff00000 +#define NV04_GDI_RECTANGLE_TEXT_FONT_G 0x000017f0 +#define NV04_GDI_RECTANGLE_TEXT_FONT_G_OFFSET_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_FONT_G_OFFSET_MASK 0x0fffffff +#define NV04_GDI_RECTANGLE_TEXT_FONT_G_PITCH_SHIFT 28 +#define NV04_GDI_RECTANGLE_TEXT_FONT_G_PITCH_MASK 0xf0000000 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0 0x000017f4 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0_L_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0_L_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0_T_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT0_T_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1 0x000017f8 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1_R_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1_R_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1_B_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_CLIP_G_POINT1_B_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_COLOR1_G 0x000017fc +#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT(x) (0x00001800+((x)*8)) +#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT__SIZE 0x00000100 +#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT_X_SHIFT 0 +#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT_X_MASK 0x0000ffff +#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT_Y_SHIFT 16 +#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_POINT_Y_MASK 0xffff0000 +#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_INDEX(x) (0x00001804+((x)*8)) +#define NV04_GDI_RECTANGLE_TEXT_CHARACTER_COLOR1_G_INDEX__SIZE 0x00000100 + + +#define NV03_GDI_RECTANGLE_TEXT 0x0000004b + +#define NV03_GDI_RECTANGLE_TEXT_NOP 0x00000100 +#define NV03_GDI_RECTANGLE_TEXT_NOTIFY 0x00000104 +#define NV03_GDI_RECTANGLE_TEXT_DMA_NOTIFY 0x00000180 +#define NV03_GDI_RECTANGLE_TEXT_PATTERN 0x00000184 +#define NV03_GDI_RECTANGLE_TEXT_ROP 0x00000188 +#define NV03_GDI_RECTANGLE_TEXT_BETA1 0x0000018c +#define NV03_GDI_RECTANGLE_TEXT_SURFACE 0x00000190 +#define NV03_GDI_RECTANGLE_TEXT_OPERATION 0x000002fc +#define NV03_GDI_RECTANGLE_TEXT_COLOR_FORMAT 0x00000300 +#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_FORMAT 0x00000304 +#define NV03_GDI_RECTANGLE_TEXT_COLOR1_A 0x000003fc +#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT 0x00000400 +#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_Y_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_Y_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_X_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_POINT_X_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE 0x00000404 +#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_H_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_H_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_W_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_UNCLIPPED_RECTANGLE_SIZE_W_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B 0x000007f4 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B_L_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B_L_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B_T_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT0_B_T_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B 0x000007f8 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B_R_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B_R_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B_B_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_POINT1_B_B_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_COLOR1_B 0x000007fc +#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0 0x00000800 +#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_L_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_L_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_T_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_0_T_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1 0x00000804 +#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_R_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_R_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_B_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_CLIPPED_RECTANGLE_POINT_1_B_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0 0x00000bec +#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_L_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_L_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_T_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT0_T_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1 0x00000bf0 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_R_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_R_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_B_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_C_POINT1_B_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_COLOR1_C 0x00000bf4 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_C 0x00000bf8 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_C_W_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_C_W_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_SIZE_C_H_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_C_H_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_POINT_C 0x00000bfc +#define NV03_GDI_RECTANGLE_TEXT_POINT_C_X_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_POINT_C_X_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_POINT_C_Y_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_POINT_C_Y_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_C(x) (0x00000c00+((x)*4)) +#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_C__SIZE 0x00000020 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0 0x00000fe8 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0_L_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0_L_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0_T_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT0_T_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1 0x00000fec +#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1_R_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1_R_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1_B_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_D_POINT1_B_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_COLOR1_D 0x00000ff0 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D 0x00000ff4 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D_W_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D_W_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D_H_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_D_H_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D 0x00000ff8 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D_W_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D_W_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D_H_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_D_H_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_POINT_D 0x00000ffc +#define NV03_GDI_RECTANGLE_TEXT_POINT_D_X_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_POINT_D_X_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_POINT_D_Y_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_POINT_D_Y_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_D(x) (0x00001000+((x)*4)) +#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR1_D__SIZE 0x00000020 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0 0x000013e4 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_L_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_L_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_T_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT0_T_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1 0x000013e8 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_R_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_R_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_B_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_CLIP_E_POINT1_B_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_COLOR0_E 0x000013ec +#define NV03_GDI_RECTANGLE_TEXT_COLOR1_E 0x000013f0 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E 0x000013f4 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E_W_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E_W_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E_H_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_IN_E_H_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E 0x000013f8 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E_W_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E_W_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E_H_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_SIZE_OUT_E_H_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_POINT_E 0x000013fc +#define NV03_GDI_RECTANGLE_TEXT_POINT_E_X_SHIFT 0 +#define NV03_GDI_RECTANGLE_TEXT_POINT_E_X_MASK 0x0000ffff +#define NV03_GDI_RECTANGLE_TEXT_POINT_E_Y_SHIFT 16 +#define NV03_GDI_RECTANGLE_TEXT_POINT_E_Y_MASK 0xffff0000 +#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR01_E(x) (0x00001400+((x)*4)) +#define NV03_GDI_RECTANGLE_TEXT_MONOCHROME_COLOR01_E__SIZE 0x00000020 + + +#define NV04_SWIZZLED_SURFACE 0x00000052 + +#define NV04_SWIZZLED_SURFACE_NOP 0x00000100 +#define NV04_SWIZZLED_SURFACE_NOTIFY 0x00000104 +#define NV04_SWIZZLED_SURFACE_DMA_NOTIFY 0x00000180 +#define NV04_SWIZZLED_SURFACE_DMA_IMAGE 0x00000184 +#define NV04_SWIZZLED_SURFACE_FORMAT 0x00000300 +#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_SHIFT 0 +#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_MASK 0x000000ff +#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_Y8 0x00000001 +#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X1R5G5B5_Z1R5G5B5 0x00000002 +#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X1R5G5B5_X1R5G5B5 0x00000003 +#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_R5G6B5 0x00000004 +#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_Y16 0x00000005 +#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X8R8G8B8_Z8R8G8B8 0x00000006 +#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X8R8G8B8_X8R8G8B8 0x00000007 +#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X1A7R8G8B8_Z1A7R8G8B8 0x00000008 +#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_X1A7R8G8B8_X1A7R8G8B8 0x00000009 +#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_A8R8G8B8 0x0000000a +#define NV04_SWIZZLED_SURFACE_FORMAT_COLOR_Y32 0x0000000b +#define NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_SHIFT 16 +#define NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_U_MASK 0x00ff0000 +#define NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_SHIFT 24 +#define NV04_SWIZZLED_SURFACE_FORMAT_BASE_SIZE_V_MASK 0xff000000 +#define NV04_SWIZZLED_SURFACE_OFFSET 0x00000304 + + +#define NV20_SWIZZLED_SURFACE 0x0000009e + + + +#define NV30_SWIZZLED_SURFACE 0x0000039e + + + +#define NV40_SWIZZLED_SURFACE 0x0000309e + + + +#define NV04_CONTEXT_SURFACES_3D 0x00000053 + +#define NV04_CONTEXT_SURFACES_3D_NOP 0x00000100 +#define NV04_CONTEXT_SURFACES_3D_NOTIFY 0x00000104 +#define NV04_CONTEXT_SURFACES_3D_DMA_NOTIFY 0x00000180 +#define NV04_CONTEXT_SURFACES_3D_DMA_COLOR 0x00000184 +#define NV04_CONTEXT_SURFACES_3D_DMA_ZETA 0x00000188 +#define NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL 0x000002f8 +#define NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL_X_SHIFT 0 +#define NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL_X_MASK 0x0000ffff +#define NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL_W_SHIFT 16 +#define NV04_CONTEXT_SURFACES_3D_CLIP_HORIZONTAL_W_MASK 0xffff0000 +#define NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL 0x000002fc +#define NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL_Y_SHIFT 0 +#define NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL_Y_MASK 0x0000ffff +#define NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL_H_SHIFT 16 +#define NV04_CONTEXT_SURFACES_3D_CLIP_VERTICAL_H_MASK 0xffff0000 +#define NV04_CONTEXT_SURFACES_3D_FORMAT 0x00000300 +#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_SHIFT 0 +#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_MASK 0x000000ff +#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X1R5G5B5_Z1R5G5B5 0x00000001 +#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X1R5G5B5_X1R5G5B5 0x00000002 +#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_R5G6B5 0x00000003 +#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X8R8G8B8_Z8R8G8B8 0x00000004 +#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X8R8G8B8_X8R8G8B8 0x00000005 +#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X1A7R8G8B8_Z1A7R8G8B8 0x00000006 +#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_X1A7R8G8B8_X1A7R8G8B8 0x00000007 +#define NV04_CONTEXT_SURFACES_3D_FORMAT_COLOR_A8R8G8B8 0x00000008 +#define NV04_CONTEXT_SURFACES_3D_FORMAT_TYPE_SHIFT 8 +#define NV04_CONTEXT_SURFACES_3D_FORMAT_TYPE_MASK 0x0000ff00 +#define NV04_CONTEXT_SURFACES_3D_FORMAT_TYPE_PITCH 0x00000100 +#define NV04_CONTEXT_SURFACES_3D_FORMAT_TYPE_SWIZZLE 0x00000200 +#define NV04_CONTEXT_SURFACES_3D_FORMAT_BASE_SIZE_U_SHIFT 16 +#define NV04_CONTEXT_SURFACES_3D_FORMAT_BASE_SIZE_U_MASK 0x00ff0000 +#define NV04_CONTEXT_SURFACES_3D_FORMAT_BASE_SIZE_V_SHIFT 24 +#define NV04_CONTEXT_SURFACES_3D_FORMAT_BASE_SIZE_V_MASK 0xff000000 +#define NV04_CONTEXT_SURFACES_3D_CLIP_SIZE 0x00000304 +#define NV04_CONTEXT_SURFACES_3D_CLIP_SIZE_W_SHIFT 0 +#define NV04_CONTEXT_SURFACES_3D_CLIP_SIZE_W_MASK 0x0000ffff +#define NV04_CONTEXT_SURFACES_3D_CLIP_SIZE_H_SHIFT 16 +#define NV04_CONTEXT_SURFACES_3D_CLIP_SIZE_H_MASK 0xffff0000 +#define NV04_CONTEXT_SURFACES_3D_PITCH 0x00000308 +#define NV04_CONTEXT_SURFACES_3D_PITCH_COLOR_SHIFT 0 +#define NV04_CONTEXT_SURFACES_3D_PITCH_COLOR_MASK 0x0000ffff +#define NV04_CONTEXT_SURFACES_3D_PITCH_ZETA_SHIFT 16 +#define NV04_CONTEXT_SURFACES_3D_PITCH_ZETA_MASK 0xffff0000 +#define NV04_CONTEXT_SURFACES_3D_OFFSET_COLOR 0x0000030c +#define NV04_CONTEXT_SURFACES_3D_OFFSET_ZETA 0x00000310 + + +#define NV10_CONTEXT_SURFACES_3D 0x00000093 + + + +#define NV04_TEXTURED_TRIANGLE 0x00000054 + +#define NV04_TEXTURED_TRIANGLE_NOP 0x00000100 +#define NV04_TEXTURED_TRIANGLE_NOTIFY 0x00000104 +#define NV04_TEXTURED_TRIANGLE_DMA_NOTIFY 0x00000180 +#define NV04_TEXTURED_TRIANGLE_DMA_A 0x00000184 +#define NV04_TEXTURED_TRIANGLE_DMA_B 0x00000188 +#define NV04_TEXTURED_TRIANGLE_SURFACE 0x0000018c +#define NV04_TEXTURED_TRIANGLE_COLORKEY 0x00000300 +#define NV04_TEXTURED_TRIANGLE_OFFSET 0x00000304 +#define NV04_TEXTURED_TRIANGLE_FORMAT 0x00000308 +#define NV04_TEXTURED_TRIANGLE_FORMAT_DMA_A (1 << 0) +#define NV04_TEXTURED_TRIANGLE_FORMAT_DMA_B (1 << 1) +#define NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_KEY_MATCH_SHIFT 2 +#define NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_KEY_MATCH_MASK 0x0000000c +#define NV04_TEXTURED_TRIANGLE_FORMAT_ORIGIN_ZOH_SHIFT 4 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ORIGIN_ZOH_MASK 0x00000030 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ORIGIN_ZOH_CENTER 0x00000010 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ORIGIN_ZOH_CORNER 0x00000020 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ORIGIN_FOH_SHIFT 6 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ORIGIN_FOH_MASK 0x000000c0 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ORIGIN_FOH_CENTER 0x00000040 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ORIGIN_FOH_CORNER 0x00000080 +#define NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_SHIFT 8 +#define NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_MASK 0x00000f00 +#define NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_Y8 0x00000100 +#define NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_A1R5G5B5 0x00000200 +#define NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_X1R5G5B5 0x00000300 +#define NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_A4R4G4B4 0x00000400 +#define NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_R5G6B5 0x00000500 +#define NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_A8R8G8B8 0x00000600 +#define NV04_TEXTURED_TRIANGLE_FORMAT_COLOR_X8R8G8B8 0x00000700 +#define NV04_TEXTURED_TRIANGLE_FORMAT_MIPMAP_LEVELS_SHIFT 12 +#define NV04_TEXTURED_TRIANGLE_FORMAT_MIPMAP_LEVELS_MASK 0x0000f000 +#define NV04_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_U_SHIFT 16 +#define NV04_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_U_MASK 0x000f0000 +#define NV04_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_V_SHIFT 20 +#define NV04_TEXTURED_TRIANGLE_FORMAT_BASE_SIZE_V_MASK 0x00f00000 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_SHIFT 24 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_MASK 0x07000000 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_REPEAT 0x01000000 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_MIRRORED_REPEAT 0x02000000 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_CLAMP_TO_EDGE 0x03000000 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_CLAMP_TO_BORDER 0x04000000 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ADDRESSU_CLAMP 0x05000000 +#define NV04_TEXTURED_TRIANGLE_FORMAT_WRAPU (1 << 27) +#define NV04_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_SHIFT 28 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_MASK 0x70000000 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_REPEAT 0x10000000 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_MIRRORED_REPEAT 0x20000000 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_CLAMP_TO_EDGE 0x30000000 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_CLAMP_TO_BORDER 0x40000000 +#define NV04_TEXTURED_TRIANGLE_FORMAT_ADDRESSV_CLAMP 0x50000000 +#define NV04_TEXTURED_TRIANGLE_FORMAT_WRAPV (1 << 31) +#define NV04_TEXTURED_TRIANGLE_FILTER 0x0000030c +#define NV04_TEXTURED_TRIANGLE_FILTER_KERNEL_SIZE_X_SHIFT 0 +#define NV04_TEXTURED_TRIANGLE_FILTER_KERNEL_SIZE_X_MASK 0x000000ff +#define NV04_TEXTURED_TRIANGLE_FILTER_KERNEL_SIZE_Y_SHIFT 8 +#define NV04_TEXTURED_TRIANGLE_FILTER_KERNEL_SIZE_Y_MASK 0x00007f00 +#define NV04_TEXTURED_TRIANGLE_FILTER_MIPMAP_DITHER_ENABLE (1 << 15) +#define NV04_TEXTURED_TRIANGLE_FILTER_MIPMAP_LODBIAS_SHIFT 16 +#define NV04_TEXTURED_TRIANGLE_FILTER_MIPMAP_LODBIAS_MASK 0x00ff0000 +#define NV04_TEXTURED_TRIANGLE_FILTER_MINIFY_SHIFT 24 +#define NV04_TEXTURED_TRIANGLE_FILTER_MINIFY_MASK 0x07000000 +#define NV04_TEXTURED_TRIANGLE_FILTER_MINIFY_NEAREST 0x01000000 +#define NV04_TEXTURED_TRIANGLE_FILTER_MINIFY_LINEAR 0x02000000 +#define NV04_TEXTURED_TRIANGLE_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST 0x03000000 +#define NV04_TEXTURED_TRIANGLE_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST 0x04000000 +#define NV04_TEXTURED_TRIANGLE_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR 0x05000000 +#define NV04_TEXTURED_TRIANGLE_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR 0x06000000 +#define NV04_TEXTURED_TRIANGLE_FILTER_ANISOTROPIC_MINIFY_ENABLE (1 << 27) +#define NV04_TEXTURED_TRIANGLE_FILTER_MAGNIFY_SHIFT 28 +#define NV04_TEXTURED_TRIANGLE_FILTER_MAGNIFY_MASK 0x70000000 +#define NV04_TEXTURED_TRIANGLE_FILTER_MAGNIFY_NEAREST 0x10000000 +#define NV04_TEXTURED_TRIANGLE_FILTER_MAGNIFY_LINEAR 0x20000000 +#define NV04_TEXTURED_TRIANGLE_FILTER_ANISOTROPIC_MAGNIFY_ENABLE (1 << 31) +#define NV04_TEXTURED_TRIANGLE_BLEND 0x00000310 +#define NV04_TEXTURED_TRIANGLE_BLEND_TEXTURE_MAP_SHIFT 0 +#define NV04_TEXTURED_TRIANGLE_BLEND_TEXTURE_MAP_MASK 0x0000000f +#define NV04_TEXTURED_TRIANGLE_BLEND_MASK_BIT_SHIFT 4 +#define NV04_TEXTURED_TRIANGLE_BLEND_MASK_BIT_MASK 0x00000030 +#define NV04_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_SHIFT 6 +#define NV04_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_MASK 0x000000c0 +#define NV04_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_FLAT 0x00000040 +#define NV04_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_GOURAUD 0x00000080 +#define NV04_TEXTURED_TRIANGLE_BLEND_SHADE_MODE_PHONG 0x000000c0 +#define NV04_TEXTURED_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE (1 << 8) +#define NV04_TEXTURED_TRIANGLE_BLEND_SPECULAR_ENABLE (1 << 12) +#define NV04_TEXTURED_TRIANGLE_BLEND_FOG_ENABLE (1 << 16) +#define NV04_TEXTURED_TRIANGLE_BLEND_BLEND_ENABLE (1 << 20) +#define NV04_TEXTURED_TRIANGLE_BLEND_SRC_SHIFT 24 +#define NV04_TEXTURED_TRIANGLE_BLEND_SRC_MASK 0x0f000000 +#define NV04_TEXTURED_TRIANGLE_BLEND_DST_SHIFT 28 +#define NV04_TEXTURED_TRIANGLE_BLEND_DST_MASK 0xf0000000 +#define NV04_TEXTURED_TRIANGLE_CONTROL 0x00000314 +#define NV04_TEXTURED_TRIANGLE_CONTROL_ALPHA_REF_SHIFT 0 +#define NV04_TEXTURED_TRIANGLE_CONTROL_ALPHA_REF_MASK 0x000000ff +#define NV04_TEXTURED_TRIANGLE_CONTROL_ALPHA_FUNC_SHIFT 8 +#define NV04_TEXTURED_TRIANGLE_CONTROL_ALPHA_FUNC_MASK 0x00000f00 +#define NV04_TEXTURED_TRIANGLE_CONTROL_ALPHA_ENABLE (1 << 12) +#define NV04_TEXTURED_TRIANGLE_CONTROL_ORIGIN (1 << 13) +#define NV04_TEXTURED_TRIANGLE_CONTROL_Z_ENABLE (1 << 14) +#define NV04_TEXTURED_TRIANGLE_CONTROL_Z_FUNC_SHIFT 16 +#define NV04_TEXTURED_TRIANGLE_CONTROL_Z_FUNC_MASK 0x000f0000 +#define NV04_TEXTURED_TRIANGLE_CONTROL_CULL_MODE_SHIFT 20 +#define NV04_TEXTURED_TRIANGLE_CONTROL_CULL_MODE_MASK 0x00300000 +#define NV04_TEXTURED_TRIANGLE_CONTROL_CULL_MODE_BOTH 0x00000000 +#define NV04_TEXTURED_TRIANGLE_CONTROL_CULL_MODE_NONE 0x00100000 +#define NV04_TEXTURED_TRIANGLE_CONTROL_CULL_MODE_CW 0x00200000 +#define NV04_TEXTURED_TRIANGLE_CONTROL_CULL_MODE_CCW 0x00300000 +#define NV04_TEXTURED_TRIANGLE_CONTROL_DITHER_ENABLE (1 << 22) +#define NV04_TEXTURED_TRIANGLE_CONTROL_Z_PERSPECTIVE_ENABLE (1 << 23) +#define NV04_TEXTURED_TRIANGLE_CONTROL_Z_WRITE (1 << 24) +#define NV04_TEXTURED_TRIANGLE_CONTROL_Z_FORMAT_SHIFT 30 +#define NV04_TEXTURED_TRIANGLE_CONTROL_Z_FORMAT_MASK 0xc0000000 +#define NV04_TEXTURED_TRIANGLE_FOGCOLOR 0x00000318 +#define NV04_TEXTURED_TRIANGLE_FOGCOLOR_B_SHIFT 0 +#define NV04_TEXTURED_TRIANGLE_FOGCOLOR_B_MASK 0x000000ff +#define NV04_TEXTURED_TRIANGLE_FOGCOLOR_G_SHIFT 8 +#define NV04_TEXTURED_TRIANGLE_FOGCOLOR_G_MASK 0x0000ff00 +#define NV04_TEXTURED_TRIANGLE_FOGCOLOR_R_SHIFT 16 +#define NV04_TEXTURED_TRIANGLE_FOGCOLOR_R_MASK 0x00ff0000 +#define NV04_TEXTURED_TRIANGLE_FOGCOLOR_A_SHIFT 24 +#define NV04_TEXTURED_TRIANGLE_FOGCOLOR_A_MASK 0xff000000 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_SX(x) (0x00000400+((x)*32)) +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_SX__SIZE 0x00000010 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_SY(x) (0x00000404+((x)*32)) +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_SY__SIZE 0x00000010 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_SZ(x) (0x00000408+((x)*32)) +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_SZ__SIZE 0x00000010 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_RHW(x) (0x0000040c+((x)*32)) +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_RHW__SIZE 0x00000010 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_COLOR(x) (0x00000410+((x)*32)) +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_COLOR__SIZE 0x00000010 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_COLOR_B_SHIFT 0 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_COLOR_B_MASK 0x000000ff +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_COLOR_G_SHIFT 8 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_COLOR_G_MASK 0x0000ff00 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_COLOR_R_SHIFT 16 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_COLOR_R_MASK 0x00ff0000 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_COLOR_A_SHIFT 24 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_COLOR_A_MASK 0xff000000 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR(x) (0x00000414+((x)*32)) +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR__SIZE 0x00000010 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_B_SHIFT 0 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_B_MASK 0x000000ff +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_G_SHIFT 8 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_G_MASK 0x0000ff00 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_R_SHIFT 16 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_R_MASK 0x00ff0000 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_FOG_SHIFT 24 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_SPECULAR_FOG_MASK 0xff000000 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_TU(x) (0x00000418+((x)*32)) +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_TU__SIZE 0x00000010 +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_TV(x) (0x0000041c+((x)*32)) +#define NV04_TEXTURED_TRIANGLE_TLVERTEX_TV__SIZE 0x00000010 +#define NV04_TEXTURED_TRIANGLE_DRAWPRIMITIVE(x) (0x00000600+((x)*4)) +#define NV04_TEXTURED_TRIANGLE_DRAWPRIMITIVE__SIZE 0x00000040 +#define NV04_TEXTURED_TRIANGLE_DRAWPRIMITIVE_I0_SHIFT 0 +#define NV04_TEXTURED_TRIANGLE_DRAWPRIMITIVE_I0_MASK 0x0000000f +#define NV04_TEXTURED_TRIANGLE_DRAWPRIMITIVE_I1_SHIFT 4 +#define NV04_TEXTURED_TRIANGLE_DRAWPRIMITIVE_I1_MASK 0x000000f0 +#define NV04_TEXTURED_TRIANGLE_DRAWPRIMITIVE_I2_SHIFT 8 +#define NV04_TEXTURED_TRIANGLE_DRAWPRIMITIVE_I2_MASK 0x00000f00 +#define NV04_TEXTURED_TRIANGLE_DRAWPRIMITIVE_I3_SHIFT 12 +#define NV04_TEXTURED_TRIANGLE_DRAWPRIMITIVE_I3_MASK 0x0000f000 +#define NV04_TEXTURED_TRIANGLE_DRAWPRIMITIVE_I4_SHIFT 16 +#define NV04_TEXTURED_TRIANGLE_DRAWPRIMITIVE_I4_MASK 0x000f0000 +#define NV04_TEXTURED_TRIANGLE_DRAWPRIMITIVE_I5_SHIFT 20 +#define NV04_TEXTURED_TRIANGLE_DRAWPRIMITIVE_I5_MASK 0x00f00000 + + +#define NV10_TEXTURED_TRIANGLE 0x00000094 + + + +#define NV04_MULTITEX_TRIANGLE 0x00000055 + +#define NV04_MULTITEX_TRIANGLE_NOP 0x00000100 +#define NV04_MULTITEX_TRIANGLE_NOTIFY 0x00000104 +#define NV04_MULTITEX_TRIANGLE_DMA_NOTIFY 0x00000180 +#define NV04_MULTITEX_TRIANGLE_DMA_A 0x00000184 +#define NV04_MULTITEX_TRIANGLE_DMA_B 0x00000188 +#define NV04_MULTITEX_TRIANGLE_SURFACE 0x0000018c +#define NV04_MULTITEX_TRIANGLE_OFFSET(x) (0x00000308+((x)*4)) +#define NV04_MULTITEX_TRIANGLE_OFFSET__SIZE 0x00000002 +#define NV04_MULTITEX_TRIANGLE_FORMAT(x) (0x00000310+((x)*4)) +#define NV04_MULTITEX_TRIANGLE_FORMAT__SIZE 0x00000002 +#define NV04_MULTITEX_TRIANGLE_FORMAT_DMA_A (1 << 0) +#define NV04_MULTITEX_TRIANGLE_FORMAT_DMA_B (1 << 1) +#define NV04_MULTITEX_TRIANGLE_FORMAT_ORIGIN_ZOH_SHIFT 4 +#define NV04_MULTITEX_TRIANGLE_FORMAT_ORIGIN_ZOH_MASK 0x00000030 +#define NV04_MULTITEX_TRIANGLE_FORMAT_ORIGIN_FOH_SHIFT 6 +#define NV04_MULTITEX_TRIANGLE_FORMAT_ORIGIN_FOH_MASK 0x000000c0 +#define NV04_MULTITEX_TRIANGLE_FORMAT_COLOR_SHIFT 8 +#define NV04_MULTITEX_TRIANGLE_FORMAT_COLOR_MASK 0x00000f00 +#define NV04_MULTITEX_TRIANGLE_FORMAT_MIPMAP_LEVELS_SHIFT 12 +#define NV04_MULTITEX_TRIANGLE_FORMAT_MIPMAP_LEVELS_MASK 0x0000f000 +#define NV04_MULTITEX_TRIANGLE_FORMAT_BASE_SIZE_U_SHIFT 16 +#define NV04_MULTITEX_TRIANGLE_FORMAT_BASE_SIZE_U_MASK 0x000f0000 +#define NV04_MULTITEX_TRIANGLE_FORMAT_BASE_SIZE_V_SHIFT 20 +#define NV04_MULTITEX_TRIANGLE_FORMAT_BASE_SIZE_V_MASK 0x00f00000 +#define NV04_MULTITEX_TRIANGLE_FORMAT_ADDRESSU_SHIFT 24 +#define NV04_MULTITEX_TRIANGLE_FORMAT_ADDRESSU_MASK 0x07000000 +#define NV04_MULTITEX_TRIANGLE_FORMAT_WRAPU (1 << 27) +#define NV04_MULTITEX_TRIANGLE_FORMAT_ADDRESSV_SHIFT 28 +#define NV04_MULTITEX_TRIANGLE_FORMAT_ADDRESSV_MASK 0x70000000 +#define NV04_MULTITEX_TRIANGLE_FORMAT_WRAPV (1 << 31) +#define NV04_MULTITEX_TRIANGLE_FILTER(x) (0x00000318+((x)*4)) +#define NV04_MULTITEX_TRIANGLE_FILTER__SIZE 0x00000002 +#define NV04_MULTITEX_TRIANGLE_FILTER_KERNEL_SIZE_X_SHIFT 0 +#define NV04_MULTITEX_TRIANGLE_FILTER_KERNEL_SIZE_X_MASK 0x000000ff +#define NV04_MULTITEX_TRIANGLE_FILTER_KERNEL_SIZE_Y_SHIFT 8 +#define NV04_MULTITEX_TRIANGLE_FILTER_KERNEL_SIZE_Y_MASK 0x00007f00 +#define NV04_MULTITEX_TRIANGLE_FILTER_MIPMAP_DITHER_ENABLE (1 << 15) +#define NV04_MULTITEX_TRIANGLE_FILTER_MIPMAP_LODBIAS_SHIFT 16 +#define NV04_MULTITEX_TRIANGLE_FILTER_MIPMAP_LODBIAS_MASK 0x00ff0000 +#define NV04_MULTITEX_TRIANGLE_FILTER_MINIFY_SHIFT 24 +#define NV04_MULTITEX_TRIANGLE_FILTER_MINIFY_MASK 0x07000000 +#define NV04_MULTITEX_TRIANGLE_FILTER_ANISOTROPIC_MINIFY_ENABLE (1 << 27) +#define NV04_MULTITEX_TRIANGLE_FILTER_MAGNIFY_SHIFT 28 +#define NV04_MULTITEX_TRIANGLE_FILTER_MAGNIFY_MASK 0x70000000 +#define NV04_MULTITEX_TRIANGLE_FILTER_ANISOTROPIC_MAGNIFY_ENABLE (1 << 31) +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA(x) (0x00000320+((x)*12)) +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA__SIZE 0x00000002 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_INVERSE0 (1 << 0) +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT0_SHIFT 2 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT0_MASK 0x000000fc +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT0_ZERO 0x00000004 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT0_CONSTANT 0x00000008 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT0_PRIMARY_COLOR 0x0000000c +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT0_PREVIOUS 0x00000010 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT0_TEXTURE0 0x00000014 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT0_TEXTURE1 0x00000018 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_INVERSE1 (1 << 8) +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT1_SHIFT 10 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT1_MASK 0x0000fc00 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT1_ZERO 0x00000400 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT1_CONSTANT 0x00000800 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT1_PRIMARY_COLOR 0x00000c00 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT1_PREVIOUS 0x00001000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT1_TEXTURE0 0x00001400 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT1_TEXTURE1 0x00001800 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_INVERSE2 (1 << 16) +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT2_SHIFT 18 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT2_MASK 0x00fc0000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT2_ZERO 0x00040000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT2_CONSTANT 0x00080000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT2_PRIMARY_COLOR 0x000c0000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT2_PREVIOUS 0x00100000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT2_TEXTURE0 0x00140000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT2_TEXTURE1 0x00180000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_INVERSE3 (1 << 24) +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT3_SHIFT 26 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT3_MASK 0x1c000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT3_ZERO 0x04000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT3_CONSTANT 0x08000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT3_PRIMARY_COLOR 0x0c000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT3_PREVIOUS 0x10000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT3_TEXTURE0 0x14000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_ARGUMENT3_TEXTURE1 0x18000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_MAP_SHIFT 29 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_MAP_MASK 0xe0000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_MAP_IDENTITY 0x20000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_MAP_SCALE2 0x40000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_MAP_SCALE4 0x60000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_MAP_BIAS 0x80000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_ALPHA_MAP_BIAS_SCALE2 0xe0000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR(x) (0x00000324+((x)*12)) +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR__SIZE 0x00000002 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_INVERSE0 (1 << 0) +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ALPHA0 (1 << 1) +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT0_SHIFT 2 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT0_MASK 0x000000fc +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT0_ZERO 0x00000004 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT0_CONSTANT 0x00000008 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT0_PRIMARY_COLOR 0x0000000c +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT0_PREVIOUS 0x00000010 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT0_TEXTURE0 0x00000014 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT0_TEXTURE1 0x00000018 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_INVERSE1 (1 << 8) +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ALPHA1 (1 << 9) +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT1_SHIFT 10 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT1_MASK 0x0000fc00 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT1_ZERO 0x00000400 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT1_CONSTANT 0x00000800 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT1_PRIMARY_COLOR 0x00000c00 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT1_PREVIOUS 0x00001000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT1_TEXTURE0 0x00001400 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT1_TEXTURE1 0x00001800 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_INVERSE2 (1 << 16) +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ALPHA2 (1 << 17) +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT2_SHIFT 18 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT2_MASK 0x00fc0000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT2_ZERO 0x00040000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT2_CONSTANT 0x00080000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT2_PRIMARY_COLOR 0x000c0000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT2_PREVIOUS 0x00100000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT2_TEXTURE0 0x00140000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT2_TEXTURE1 0x00180000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_INVERSE3 (1 << 24) +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ALPHA3 (1 << 25) +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT3_SHIFT 26 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT3_MASK 0x1c000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT3_ZERO 0x04000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT3_CONSTANT 0x08000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT3_PRIMARY_COLOR 0x0c000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT3_PREVIOUS 0x10000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT3_TEXTURE0 0x14000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_ARGUMENT3_TEXTURE1 0x18000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_MAP_SHIFT 29 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_MAP_MASK 0xe0000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_MAP_IDENTITY 0x20000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_MAP_SCALE2 0x40000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_MAP_SCALE4 0x60000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_MAP_BIAS 0x80000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_COLOR_MAP_BIAS_SCALE2 0xe0000000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_FACTOR 0x00000334 +#define NV04_MULTITEX_TRIANGLE_COMBINE_FACTOR_B_SHIFT 0 +#define NV04_MULTITEX_TRIANGLE_COMBINE_FACTOR_B_MASK 0x000000ff +#define NV04_MULTITEX_TRIANGLE_COMBINE_FACTOR_G_SHIFT 8 +#define NV04_MULTITEX_TRIANGLE_COMBINE_FACTOR_G_MASK 0x0000ff00 +#define NV04_MULTITEX_TRIANGLE_COMBINE_FACTOR_R_SHIFT 16 +#define NV04_MULTITEX_TRIANGLE_COMBINE_FACTOR_R_MASK 0x00ff0000 +#define NV04_MULTITEX_TRIANGLE_COMBINE_FACTOR_A_SHIFT 24 +#define NV04_MULTITEX_TRIANGLE_COMBINE_FACTOR_A_MASK 0xff000000 +#define NV04_MULTITEX_TRIANGLE_BLEND 0x00000338 +#define NV04_MULTITEX_TRIANGLE_BLEND_MASK_BIT_SHIFT 4 +#define NV04_MULTITEX_TRIANGLE_BLEND_MASK_BIT_MASK 0x00000030 +#define NV04_MULTITEX_TRIANGLE_BLEND_SHADE_MODE_SHIFT 6 +#define NV04_MULTITEX_TRIANGLE_BLEND_SHADE_MODE_MASK 0x000000c0 +#define NV04_MULTITEX_TRIANGLE_BLEND_SHADE_MODE_FLAT 0x00000040 +#define NV04_MULTITEX_TRIANGLE_BLEND_SHADE_MODE_GOURAUD 0x00000080 +#define NV04_MULTITEX_TRIANGLE_BLEND_SHADE_MODE_PHONG 0x000000c0 +#define NV04_MULTITEX_TRIANGLE_BLEND_TEXTURE_PERSPECTIVE_ENABLE (1 << 8) +#define NV04_MULTITEX_TRIANGLE_BLEND_SPECULAR_ENABLE (1 << 12) +#define NV04_MULTITEX_TRIANGLE_BLEND_FOG_ENABLE (1 << 16) +#define NV04_MULTITEX_TRIANGLE_BLEND_BLEND_ENABLE (1 << 20) +#define NV04_MULTITEX_TRIANGLE_BLEND_SRC_SHIFT 24 +#define NV04_MULTITEX_TRIANGLE_BLEND_SRC_MASK 0x0f000000 +#define NV04_MULTITEX_TRIANGLE_BLEND_DST_SHIFT 28 +#define NV04_MULTITEX_TRIANGLE_BLEND_DST_MASK 0xf0000000 +#define NV04_MULTITEX_TRIANGLE_CONTROL0 0x0000033c +#define NV04_MULTITEX_TRIANGLE_CONTROL0_ALPHA_REF_SHIFT 0 +#define NV04_MULTITEX_TRIANGLE_CONTROL0_ALPHA_REF_MASK 0x000000ff +#define NV04_MULTITEX_TRIANGLE_CONTROL0_ALPHA_FUNC_SHIFT 8 +#define NV04_MULTITEX_TRIANGLE_CONTROL0_ALPHA_FUNC_MASK 0x00000f00 +#define NV04_MULTITEX_TRIANGLE_CONTROL0_ALPHA_ENABLE (1 << 12) +#define NV04_MULTITEX_TRIANGLE_CONTROL0_ORIGIN (1 << 13) +#define NV04_MULTITEX_TRIANGLE_CONTROL0_Z_ENABLE (1 << 14) +#define NV04_MULTITEX_TRIANGLE_CONTROL0_Z_FUNC_SHIFT 16 +#define NV04_MULTITEX_TRIANGLE_CONTROL0_Z_FUNC_MASK 0x000f0000 +#define NV04_MULTITEX_TRIANGLE_CONTROL0_CULL_MODE_SHIFT 20 +#define NV04_MULTITEX_TRIANGLE_CONTROL0_CULL_MODE_MASK 0x00300000 +#define NV04_MULTITEX_TRIANGLE_CONTROL0_CULL_MODE_BOTH 0x00000000 +#define NV04_MULTITEX_TRIANGLE_CONTROL0_CULL_MODE_NONE 0x00100000 +#define NV04_MULTITEX_TRIANGLE_CONTROL0_CULL_MODE_CW 0x00200000 +#define NV04_MULTITEX_TRIANGLE_CONTROL0_CULL_MODE_CCW 0x00300000 +#define NV04_MULTITEX_TRIANGLE_CONTROL0_DITHER_ENABLE (1 << 22) +#define NV04_MULTITEX_TRIANGLE_CONTROL0_Z_PERSPECTIVE_ENABLE (1 << 23) +#define NV04_MULTITEX_TRIANGLE_CONTROL0_Z_WRITE (1 << 24) +#define NV04_MULTITEX_TRIANGLE_CONTROL0_STENCIL_WRITE (1 << 25) +#define NV04_MULTITEX_TRIANGLE_CONTROL0_ALPHA_WRITE (1 << 26) +#define NV04_MULTITEX_TRIANGLE_CONTROL0_RED_WRITE (1 << 27) +#define NV04_MULTITEX_TRIANGLE_CONTROL0_GREEN_WRITE (1 << 28) +#define NV04_MULTITEX_TRIANGLE_CONTROL0_BLUE_WRITE (1 << 29) +#define NV04_MULTITEX_TRIANGLE_CONTROL0_Z_FORMAT_SHIFT 30 +#define NV04_MULTITEX_TRIANGLE_CONTROL0_Z_FORMAT_MASK 0xc0000000 +#define NV04_MULTITEX_TRIANGLE_CONTROL1 0x00000340 +#define NV04_MULTITEX_TRIANGLE_CONTROL1_STENCIL_ENABLE (1 << 0) +#define NV04_MULTITEX_TRIANGLE_CONTROL1_STENCIL_FUNC_SHIFT 4 +#define NV04_MULTITEX_TRIANGLE_CONTROL1_STENCIL_FUNC_MASK 0x000000f0 +#define NV04_MULTITEX_TRIANGLE_CONTROL1_STENCIL_REF_SHIFT 8 +#define NV04_MULTITEX_TRIANGLE_CONTROL1_STENCIL_REF_MASK 0x0000ff00 +#define NV04_MULTITEX_TRIANGLE_CONTROL1_STENCIL_MASK_READ_SHIFT 16 +#define NV04_MULTITEX_TRIANGLE_CONTROL1_STENCIL_MASK_READ_MASK 0x00ff0000 +#define NV04_MULTITEX_TRIANGLE_CONTROL1_STENCIL_MASK_WRITE_SHIFT 24 +#define NV04_MULTITEX_TRIANGLE_CONTROL1_STENCIL_MASK_WRITE_MASK 0xff000000 +#define NV04_MULTITEX_TRIANGLE_CONTROL2 0x00000344 +#define NV04_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_FAIL_SHIFT 0 +#define NV04_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_FAIL_MASK 0x0000000f +#define NV04_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_ZFAIL_SHIFT 4 +#define NV04_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_ZFAIL_MASK 0x000000f0 +#define NV04_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_ZPASS_SHIFT 8 +#define NV04_MULTITEX_TRIANGLE_CONTROL2_STENCIL_OP_ZPASS_MASK 0x00000f00 +#define NV04_MULTITEX_TRIANGLE_FOGCOLOR 0x00000348 +#define NV04_MULTITEX_TRIANGLE_FOGCOLOR_B_SHIFT 0 +#define NV04_MULTITEX_TRIANGLE_FOGCOLOR_B_MASK 0x000000ff +#define NV04_MULTITEX_TRIANGLE_FOGCOLOR_G_SHIFT 8 +#define NV04_MULTITEX_TRIANGLE_FOGCOLOR_G_MASK 0x0000ff00 +#define NV04_MULTITEX_TRIANGLE_FOGCOLOR_R_SHIFT 16 +#define NV04_MULTITEX_TRIANGLE_FOGCOLOR_R_MASK 0x00ff0000 +#define NV04_MULTITEX_TRIANGLE_FOGCOLOR_A_SHIFT 24 +#define NV04_MULTITEX_TRIANGLE_FOGCOLOR_A_MASK 0xff000000 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_SX(x) (0x00000400+((x)*40)) +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_SX__SIZE 0x00000008 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_SY(x) (0x00000404+((x)*40)) +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_SY__SIZE 0x00000008 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_SZ(x) (0x00000408+((x)*40)) +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_SZ__SIZE 0x00000008 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_RHW(x) (0x0000040c+((x)*40)) +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_RHW__SIZE 0x00000008 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR(x) (0x00000410+((x)*40)) +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR__SIZE 0x00000008 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_B_SHIFT 0 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_B_MASK 0x000000ff +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_G_SHIFT 8 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_G_MASK 0x0000ff00 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_R_SHIFT 16 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_R_MASK 0x00ff0000 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_A_SHIFT 24 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_COLOR_A_MASK 0xff000000 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR(x) (0x00000414+((x)*40)) +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR__SIZE 0x00000008 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_B_SHIFT 0 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_B_MASK 0x000000ff +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_G_SHIFT 8 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_G_MASK 0x0000ff00 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_R_SHIFT 16 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_R_MASK 0x00ff0000 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_FOG_SHIFT 24 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_SPECULAR_FOG_MASK 0xff000000 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_TU0(x) (0x00000418+((x)*40)) +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_TU0__SIZE 0x00000008 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_TV0(x) (0x0000041c+((x)*40)) +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_TV0__SIZE 0x00000008 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_TU1(x) (0x00000420+((x)*40)) +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_TU1__SIZE 0x00000008 +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_TV1(x) (0x00000424+((x)*40)) +#define NV04_MULTITEX_TRIANGLE_TLMTVERTEX_TV1__SIZE 0x00000008 +#define NV04_MULTITEX_TRIANGLE_DRAWPRIMITIVE(x) (0x00000540+((x)*4)) +#define NV04_MULTITEX_TRIANGLE_DRAWPRIMITIVE__SIZE 0x00000030 +#define NV04_MULTITEX_TRIANGLE_DRAWPRIMITIVE_I0_SHIFT 0 +#define NV04_MULTITEX_TRIANGLE_DRAWPRIMITIVE_I0_MASK 0x0000000f +#define NV04_MULTITEX_TRIANGLE_DRAWPRIMITIVE_I1_SHIFT 4 +#define NV04_MULTITEX_TRIANGLE_DRAWPRIMITIVE_I1_MASK 0x000000f0 +#define NV04_MULTITEX_TRIANGLE_DRAWPRIMITIVE_I2_SHIFT 8 +#define NV04_MULTITEX_TRIANGLE_DRAWPRIMITIVE_I2_MASK 0x00000f00 +#define NV04_MULTITEX_TRIANGLE_DRAWPRIMITIVE_I3_SHIFT 12 +#define NV04_MULTITEX_TRIANGLE_DRAWPRIMITIVE_I3_MASK 0x0000f000 +#define NV04_MULTITEX_TRIANGLE_DRAWPRIMITIVE_I4_SHIFT 16 +#define NV04_MULTITEX_TRIANGLE_DRAWPRIMITIVE_I4_MASK 0x000f0000 +#define NV04_MULTITEX_TRIANGLE_DRAWPRIMITIVE_I5_SHIFT 20 +#define NV04_MULTITEX_TRIANGLE_DRAWPRIMITIVE_I5_MASK 0x00f00000 + + +#define NV10_MULTITEX_TRIANGLE 0x00000095 + + + +#define NV10TCL 0x00000056 + +#define NV10TCL_NOP 0x00000100 +#define NV10TCL_NOTIFY 0x00000104 +#define NV10TCL_DMA_NOTIFY 0x00000180 +#define NV10TCL_DMA_IN_MEMORY0 0x00000184 +#define NV10TCL_DMA_IN_MEMORY1 0x00000188 +#define NV10TCL_DMA_VTXBUF0 0x0000018c +#define NV10TCL_DMA_IN_MEMORY2 0x00000194 +#define NV10TCL_DMA_IN_MEMORY3 0x00000198 +#define NV10TCL_RT_HORIZ 0x00000200 +#define NV10TCL_RT_HORIZ_X_SHIFT 0 +#define NV10TCL_RT_HORIZ_X_MASK 0x0000ffff +#define NV10TCL_RT_HORIZ_W_SHIFT 16 +#define NV10TCL_RT_HORIZ_W_MASK 0xffff0000 +#define NV10TCL_RT_VERT 0x00000204 +#define NV10TCL_RT_VERT_Y_SHIFT 0 +#define NV10TCL_RT_VERT_Y_MASK 0x0000ffff +#define NV10TCL_RT_VERT_H_SHIFT 16 +#define NV10TCL_RT_VERT_H_MASK 0xffff0000 +#define NV10TCL_RT_FORMAT 0x00000208 +#define NV10TCL_RT_FORMAT_TYPE_SHIFT 8 +#define NV10TCL_RT_FORMAT_TYPE_MASK 0x00000f00 +#define NV10TCL_RT_FORMAT_TYPE_LINEAR 0x00000100 +#define NV10TCL_RT_FORMAT_TYPE_SWIZZLED 0x00000200 +#define NV10TCL_RT_FORMAT_COLOR_SHIFT 0 +#define NV10TCL_RT_FORMAT_COLOR_MASK 0x0000001f +#define NV10TCL_RT_FORMAT_COLOR_R5G6B5 0x00000003 +#define NV10TCL_RT_FORMAT_COLOR_X8R8G8B8 0x00000005 +#define NV10TCL_RT_FORMAT_COLOR_A8R8G8B8 0x00000008 +#define NV10TCL_RT_FORMAT_COLOR_B8 0x00000009 +#define NV10TCL_RT_FORMAT_COLOR_UNKNOWN 0x0000000d +#define NV10TCL_RT_FORMAT_COLOR_X8B8G8R8 0x0000000f +#define NV10TCL_RT_FORMAT_COLOR_A8B8G8R8 0x00000010 +#define NV10TCL_RT_PITCH 0x0000020c +#define NV10TCL_RT_PITCH_COLOR_PITCH_SHIFT 0 +#define NV10TCL_RT_PITCH_COLOR_PITCH_MASK 0x0000ffff +#define NV10TCL_RT_PITCH_ZETA_PITCH_SHIFT 16 +#define NV10TCL_RT_PITCH_ZETA_PITCH_MASK 0xffff0000 +#define NV10TCL_COLOR_OFFSET 0x00000210 +#define NV10TCL_ZETA_OFFSET 0x00000214 +#define NV10TCL_TX_OFFSET(x) (0x00000218+((x)*4)) +#define NV10TCL_TX_OFFSET__SIZE 0x00000002 +#define NV10TCL_TX_FORMAT(x) (0x00000220+((x)*4)) +#define NV10TCL_TX_FORMAT__SIZE 0x00000002 +#define NV10TCL_TX_FORMAT_DMA0 (1 << 0) +#define NV10TCL_TX_FORMAT_DMA1 (1 << 1) +#define NV10TCL_TX_FORMAT_CUBE_MAP (1 << 2) +#define NV10TCL_TX_FORMAT_FORMAT_SHIFT 7 +#define NV10TCL_TX_FORMAT_FORMAT_MASK 0x00000f80 +#define NV10TCL_TX_FORMAT_FORMAT_L8 0x00000000 +#define NV10TCL_TX_FORMAT_FORMAT_A8 0x00000080 +#define NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5 0x00000100 +#define NV10TCL_TX_FORMAT_FORMAT_A4R4G4B4 0x00000200 +#define NV10TCL_TX_FORMAT_FORMAT_R5G6B5 0x00000280 +#define NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8 0x00000300 +#define NV10TCL_TX_FORMAT_FORMAT_X8R8G8B8 0x00000380 +#define NV10TCL_TX_FORMAT_FORMAT_INDEX8 0x00000580 +#define NV10TCL_TX_FORMAT_FORMAT_DXT1 0x00000600 +#define NV10TCL_TX_FORMAT_FORMAT_DXT3 0x00000700 +#define NV10TCL_TX_FORMAT_FORMAT_DXT5 0x00000780 +#define NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT 0x00000800 +#define NV10TCL_TX_FORMAT_FORMAT_R5G6B5_RECT 0x00000880 +#define NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT 0x00000900 +#define NV10TCL_TX_FORMAT_FORMAT_A8_RECT 0x00000980 +#define NV10TCL_TX_FORMAT_MIPMAP (1 << 15) +#define NV10TCL_TX_FORMAT_BASE_SIZE_U_SHIFT 16 +#define NV10TCL_TX_FORMAT_BASE_SIZE_U_MASK 0x000f0000 +#define NV10TCL_TX_FORMAT_BASE_SIZE_V_SHIFT 20 +#define NV10TCL_TX_FORMAT_BASE_SIZE_V_MASK 0x00f00000 +#define NV10TCL_TX_FORMAT_WRAP_S_SHIFT 24 +#define NV10TCL_TX_FORMAT_WRAP_S_MASK 0x0f000000 +#define NV10TCL_TX_FORMAT_WRAP_S_REPEAT 0x01000000 +#define NV10TCL_TX_FORMAT_WRAP_S_MIRRORED_REPEAT 0x02000000 +#define NV10TCL_TX_FORMAT_WRAP_S_CLAMP_TO_EDGE 0x03000000 +#define NV10TCL_TX_FORMAT_WRAP_S_CLAMP_TO_BORDER 0x04000000 +#define NV10TCL_TX_FORMAT_WRAP_S_CLAMP 0x05000000 +#define NV10TCL_TX_FORMAT_WRAP_T_SHIFT 28 +#define NV10TCL_TX_FORMAT_WRAP_T_MASK 0xf0000000 +#define NV10TCL_TX_FORMAT_WRAP_T_REPEAT 0x10000000 +#define NV10TCL_TX_FORMAT_WRAP_T_MIRRORED_REPEAT 0x20000000 +#define NV10TCL_TX_FORMAT_WRAP_T_CLAMP_TO_EDGE 0x30000000 +#define NV10TCL_TX_FORMAT_WRAP_T_CLAMP_TO_BORDER 0x40000000 +#define NV10TCL_TX_FORMAT_WRAP_T_CLAMP 0x50000000 +#define NV10TCL_TX_ENABLE(x) (0x00000228+((x)*4)) +#define NV10TCL_TX_ENABLE__SIZE 0x00000002 +#define NV10TCL_TX_ENABLE_CULL_SHIFT 0 +#define NV10TCL_TX_ENABLE_CULL_MASK 0x0000000f +#define NV10TCL_TX_ENABLE_CULL_DISABLED 0x00000000 +#define NV10TCL_TX_ENABLE_CULL_TEST_ALL 0x00000003 +#define NV10TCL_TX_ENABLE_CULL_TEST_ALPHA 0x00000004 +#define NV10TCL_TX_ENABLE_ANISOTROPY_SHIFT 4 +#define NV10TCL_TX_ENABLE_ANISOTROPY_MASK 0x00000030 +#define NV10TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT 14 +#define NV10TCL_TX_ENABLE_MIPMAP_MAX_LOD_MASK 0x0003c000 +#define NV10TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT 26 +#define NV10TCL_TX_ENABLE_MIPMAP_MIN_LOD_MASK 0x3c000000 +#define NV10TCL_TX_ENABLE_ENABLE (1 << 30) +#define NV10TCL_TX_NPOT_PITCH(x) (0x00000230+((x)*4)) +#define NV10TCL_TX_NPOT_PITCH__SIZE 0x00000002 +#define NV10TCL_TX_NPOT_PITCH_PITCH_SHIFT 16 +#define NV10TCL_TX_NPOT_PITCH_PITCH_MASK 0xffff0000 +#define NV10TCL_TX_NPOT_SIZE(x) (0x00000240+((x)*4)) +#define NV10TCL_TX_NPOT_SIZE__SIZE 0x00000002 +#define NV10TCL_TX_NPOT_SIZE_H_SHIFT 0 +#define NV10TCL_TX_NPOT_SIZE_H_MASK 0x0000ffff +#define NV10TCL_TX_NPOT_SIZE_W_SHIFT 16 +#define NV10TCL_TX_NPOT_SIZE_W_MASK 0xffff0000 +#define NV10TCL_TX_FILTER(x) (0x00000248+((x)*4)) +#define NV10TCL_TX_FILTER__SIZE 0x00000002 +#define NV10TCL_TX_FILTER_LOD_BIAS_SHIFT 8 +#define NV10TCL_TX_FILTER_LOD_BIAS_MASK 0x00000f00 +#define NV10TCL_TX_FILTER_MINIFY_SHIFT 24 +#define NV10TCL_TX_FILTER_MINIFY_MASK 0x0f000000 +#define NV10TCL_TX_FILTER_MINIFY_NEAREST 0x01000000 +#define NV10TCL_TX_FILTER_MINIFY_LINEAR 0x02000000 +#define NV10TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST 0x03000000 +#define NV10TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST 0x04000000 +#define NV10TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR 0x05000000 +#define NV10TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR 0x06000000 +#define NV10TCL_TX_FILTER_MAGNIFY_SHIFT 28 +#define NV10TCL_TX_FILTER_MAGNIFY_MASK 0xf0000000 +#define NV10TCL_TX_FILTER_MAGNIFY_NEAREST 0x10000000 +#define NV10TCL_TX_FILTER_MAGNIFY_LINEAR 0x20000000 +#define NV10TCL_TX_PALETTE_OFFSET(x) (0x00000250+((x)*4)) +#define NV10TCL_TX_PALETTE_OFFSET__SIZE 0x00000002 +#define NV10TCL_RC_IN_ALPHA(x) (0x00000260+((x)*4)) +#define NV10TCL_RC_IN_ALPHA__SIZE 0x00000002 +#define NV10TCL_RC_IN_ALPHA_D_INPUT_SHIFT 0 +#define NV10TCL_RC_IN_ALPHA_D_INPUT_MASK 0x0000000f +#define NV10TCL_RC_IN_ALPHA_D_INPUT_ZERO 0x00000000 +#define NV10TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR0 0x00000001 +#define NV10TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR1 0x00000002 +#define NV10TCL_RC_IN_ALPHA_D_INPUT_FOG 0x00000003 +#define NV10TCL_RC_IN_ALPHA_D_INPUT_PRIMARY_COLOR 0x00000004 +#define NV10TCL_RC_IN_ALPHA_D_INPUT_SECONDARY_COLOR 0x00000005 +#define NV10TCL_RC_IN_ALPHA_D_INPUT_TEXTURE0 0x00000008 +#define NV10TCL_RC_IN_ALPHA_D_INPUT_TEXTURE1 0x00000009 +#define NV10TCL_RC_IN_ALPHA_D_INPUT_SPARE0 0x0000000c +#define NV10TCL_RC_IN_ALPHA_D_INPUT_SPARE1 0x0000000d +#define NV10TCL_RC_IN_ALPHA_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0000000e +#define NV10TCL_RC_IN_ALPHA_D_INPUT_E_TIMES_F 0x0000000f +#define NV10TCL_RC_IN_ALPHA_D_INPUT_TEXTURE2 0x0000000a +#define NV10TCL_RC_IN_ALPHA_D_INPUT_TEXTURE3 0x0000000b +#define NV10TCL_RC_IN_ALPHA_D_COMPONENT_USAGE (1 << 4) +#define NV10TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_BLUE 0x00000000 +#define NV10TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_ALPHA 0x00000010 +#define NV10TCL_RC_IN_ALPHA_D_MAPPING_SHIFT 5 +#define NV10TCL_RC_IN_ALPHA_D_MAPPING_MASK 0x000000e0 +#define NV10TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV10TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_INVERT 0x00000020 +#define NV10TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NORMAL 0x00000040 +#define NV10TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NEGATE 0x00000060 +#define NV10TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NORMAL 0x00000080 +#define NV10TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NEGATE 0x000000a0 +#define NV10TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_IDENTITY 0x000000c0 +#define NV10TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_NEGATE 0x000000e0 +#define NV10TCL_RC_IN_ALPHA_C_INPUT_SHIFT 8 +#define NV10TCL_RC_IN_ALPHA_C_INPUT_MASK 0x00000f00 +#define NV10TCL_RC_IN_ALPHA_C_INPUT_ZERO 0x00000000 +#define NV10TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR0 0x00000100 +#define NV10TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR1 0x00000200 +#define NV10TCL_RC_IN_ALPHA_C_INPUT_FOG 0x00000300 +#define NV10TCL_RC_IN_ALPHA_C_INPUT_PRIMARY_COLOR 0x00000400 +#define NV10TCL_RC_IN_ALPHA_C_INPUT_SECONDARY_COLOR 0x00000500 +#define NV10TCL_RC_IN_ALPHA_C_INPUT_TEXTURE0 0x00000800 +#define NV10TCL_RC_IN_ALPHA_C_INPUT_TEXTURE1 0x00000900 +#define NV10TCL_RC_IN_ALPHA_C_INPUT_SPARE0 0x00000c00 +#define NV10TCL_RC_IN_ALPHA_C_INPUT_SPARE1 0x00000d00 +#define NV10TCL_RC_IN_ALPHA_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV10TCL_RC_IN_ALPHA_C_INPUT_E_TIMES_F 0x00000f00 +#define NV10TCL_RC_IN_ALPHA_C_INPUT_TEXTURE2 0x00000a00 +#define NV10TCL_RC_IN_ALPHA_C_INPUT_TEXTURE3 0x00000b00 +#define NV10TCL_RC_IN_ALPHA_C_COMPONENT_USAGE (1 << 12) +#define NV10TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_BLUE 0x00000000 +#define NV10TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_ALPHA 0x00001000 +#define NV10TCL_RC_IN_ALPHA_C_MAPPING_SHIFT 13 +#define NV10TCL_RC_IN_ALPHA_C_MAPPING_MASK 0x0000e000 +#define NV10TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV10TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_INVERT 0x00002000 +#define NV10TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NORMAL 0x00004000 +#define NV10TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NEGATE 0x00006000 +#define NV10TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NORMAL 0x00008000 +#define NV10TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NEGATE 0x0000a000 +#define NV10TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_IDENTITY 0x0000c000 +#define NV10TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_NEGATE 0x0000e000 +#define NV10TCL_RC_IN_ALPHA_B_INPUT_SHIFT 16 +#define NV10TCL_RC_IN_ALPHA_B_INPUT_MASK 0x000f0000 +#define NV10TCL_RC_IN_ALPHA_B_INPUT_ZERO 0x00000000 +#define NV10TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR0 0x00010000 +#define NV10TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR1 0x00020000 +#define NV10TCL_RC_IN_ALPHA_B_INPUT_FOG 0x00030000 +#define NV10TCL_RC_IN_ALPHA_B_INPUT_PRIMARY_COLOR 0x00040000 +#define NV10TCL_RC_IN_ALPHA_B_INPUT_SECONDARY_COLOR 0x00050000 +#define NV10TCL_RC_IN_ALPHA_B_INPUT_TEXTURE0 0x00080000 +#define NV10TCL_RC_IN_ALPHA_B_INPUT_TEXTURE1 0x00090000 +#define NV10TCL_RC_IN_ALPHA_B_INPUT_SPARE0 0x000c0000 +#define NV10TCL_RC_IN_ALPHA_B_INPUT_SPARE1 0x000d0000 +#define NV10TCL_RC_IN_ALPHA_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000e0000 +#define NV10TCL_RC_IN_ALPHA_B_INPUT_E_TIMES_F 0x000f0000 +#define NV10TCL_RC_IN_ALPHA_B_INPUT_TEXTURE2 0x000a0000 +#define NV10TCL_RC_IN_ALPHA_B_INPUT_TEXTURE3 0x000b0000 +#define NV10TCL_RC_IN_ALPHA_B_COMPONENT_USAGE (1 << 20) +#define NV10TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_BLUE 0x00000000 +#define NV10TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_ALPHA 0x00100000 +#define NV10TCL_RC_IN_ALPHA_B_MAPPING_SHIFT 21 +#define NV10TCL_RC_IN_ALPHA_B_MAPPING_MASK 0x00e00000 +#define NV10TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV10TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_INVERT 0x00200000 +#define NV10TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NORMAL 0x00400000 +#define NV10TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NEGATE 0x00600000 +#define NV10TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NORMAL 0x00800000 +#define NV10TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NEGATE 0x00a00000 +#define NV10TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_IDENTITY 0x00c00000 +#define NV10TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_NEGATE 0x00e00000 +#define NV10TCL_RC_IN_ALPHA_A_INPUT_SHIFT 24 +#define NV10TCL_RC_IN_ALPHA_A_INPUT_MASK 0x0f000000 +#define NV10TCL_RC_IN_ALPHA_A_INPUT_ZERO 0x00000000 +#define NV10TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR0 0x01000000 +#define NV10TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR1 0x02000000 +#define NV10TCL_RC_IN_ALPHA_A_INPUT_FOG 0x03000000 +#define NV10TCL_RC_IN_ALPHA_A_INPUT_PRIMARY_COLOR 0x04000000 +#define NV10TCL_RC_IN_ALPHA_A_INPUT_SECONDARY_COLOR 0x05000000 +#define NV10TCL_RC_IN_ALPHA_A_INPUT_TEXTURE0 0x08000000 +#define NV10TCL_RC_IN_ALPHA_A_INPUT_TEXTURE1 0x09000000 +#define NV10TCL_RC_IN_ALPHA_A_INPUT_SPARE0 0x0c000000 +#define NV10TCL_RC_IN_ALPHA_A_INPUT_SPARE1 0x0d000000 +#define NV10TCL_RC_IN_ALPHA_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0e000000 +#define NV10TCL_RC_IN_ALPHA_A_INPUT_E_TIMES_F 0x0f000000 +#define NV10TCL_RC_IN_ALPHA_A_INPUT_TEXTURE2 0x0a000000 +#define NV10TCL_RC_IN_ALPHA_A_INPUT_TEXTURE3 0x0b000000 +#define NV10TCL_RC_IN_ALPHA_A_COMPONENT_USAGE (1 << 28) +#define NV10TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_BLUE 0x00000000 +#define NV10TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_ALPHA 0x10000000 +#define NV10TCL_RC_IN_ALPHA_A_MAPPING_SHIFT 29 +#define NV10TCL_RC_IN_ALPHA_A_MAPPING_MASK 0xe0000000 +#define NV10TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV10TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_INVERT 0x20000000 +#define NV10TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NORMAL 0x40000000 +#define NV10TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NEGATE 0x60000000 +#define NV10TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NORMAL 0x80000000 +#define NV10TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NEGATE 0xa0000000 +#define NV10TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_IDENTITY 0xc0000000 +#define NV10TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_NEGATE 0xe0000000 +#define NV10TCL_RC_IN_RGB(x) (0x00000268+((x)*4)) +#define NV10TCL_RC_IN_RGB__SIZE 0x00000002 +#define NV10TCL_RC_IN_RGB_D_INPUT_SHIFT 0 +#define NV10TCL_RC_IN_RGB_D_INPUT_MASK 0x0000000f +#define NV10TCL_RC_IN_RGB_D_INPUT_ZERO 0x00000000 +#define NV10TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR0 0x00000001 +#define NV10TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR1 0x00000002 +#define NV10TCL_RC_IN_RGB_D_INPUT_FOG 0x00000003 +#define NV10TCL_RC_IN_RGB_D_INPUT_PRIMARY_COLOR 0x00000004 +#define NV10TCL_RC_IN_RGB_D_INPUT_SECONDARY_COLOR 0x00000005 +#define NV10TCL_RC_IN_RGB_D_INPUT_TEXTURE0 0x00000008 +#define NV10TCL_RC_IN_RGB_D_INPUT_TEXTURE1 0x00000009 +#define NV10TCL_RC_IN_RGB_D_INPUT_SPARE0 0x0000000c +#define NV10TCL_RC_IN_RGB_D_INPUT_SPARE1 0x0000000d +#define NV10TCL_RC_IN_RGB_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0000000e +#define NV10TCL_RC_IN_RGB_D_INPUT_E_TIMES_F 0x0000000f +#define NV10TCL_RC_IN_RGB_D_INPUT_TEXTURE2 0x0000000a +#define NV10TCL_RC_IN_RGB_D_INPUT_TEXTURE3 0x0000000b +#define NV10TCL_RC_IN_RGB_D_COMPONENT_USAGE (1 << 4) +#define NV10TCL_RC_IN_RGB_D_COMPONENT_USAGE_RGB 0x00000000 +#define NV10TCL_RC_IN_RGB_D_COMPONENT_USAGE_ALPHA 0x00000010 +#define NV10TCL_RC_IN_RGB_D_MAPPING_SHIFT 5 +#define NV10TCL_RC_IN_RGB_D_MAPPING_MASK 0x000000e0 +#define NV10TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV10TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_INVERT 0x00000020 +#define NV10TCL_RC_IN_RGB_D_MAPPING_EXPAND_NORMAL 0x00000040 +#define NV10TCL_RC_IN_RGB_D_MAPPING_EXPAND_NEGATE 0x00000060 +#define NV10TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NORMAL 0x00000080 +#define NV10TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NEGATE 0x000000a0 +#define NV10TCL_RC_IN_RGB_D_MAPPING_SIGNED_IDENTITY 0x000000c0 +#define NV10TCL_RC_IN_RGB_D_MAPPING_SIGNED_NEGATE 0x000000e0 +#define NV10TCL_RC_IN_RGB_C_INPUT_SHIFT 8 +#define NV10TCL_RC_IN_RGB_C_INPUT_MASK 0x00000f00 +#define NV10TCL_RC_IN_RGB_C_INPUT_ZERO 0x00000000 +#define NV10TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR0 0x00000100 +#define NV10TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR1 0x00000200 +#define NV10TCL_RC_IN_RGB_C_INPUT_FOG 0x00000300 +#define NV10TCL_RC_IN_RGB_C_INPUT_PRIMARY_COLOR 0x00000400 +#define NV10TCL_RC_IN_RGB_C_INPUT_SECONDARY_COLOR 0x00000500 +#define NV10TCL_RC_IN_RGB_C_INPUT_TEXTURE0 0x00000800 +#define NV10TCL_RC_IN_RGB_C_INPUT_TEXTURE1 0x00000900 +#define NV10TCL_RC_IN_RGB_C_INPUT_SPARE0 0x00000c00 +#define NV10TCL_RC_IN_RGB_C_INPUT_SPARE1 0x00000d00 +#define NV10TCL_RC_IN_RGB_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV10TCL_RC_IN_RGB_C_INPUT_E_TIMES_F 0x00000f00 +#define NV10TCL_RC_IN_RGB_C_INPUT_TEXTURE2 0x00000a00 +#define NV10TCL_RC_IN_RGB_C_INPUT_TEXTURE3 0x00000b00 +#define NV10TCL_RC_IN_RGB_C_COMPONENT_USAGE (1 << 12) +#define NV10TCL_RC_IN_RGB_C_COMPONENT_USAGE_RGB 0x00000000 +#define NV10TCL_RC_IN_RGB_C_COMPONENT_USAGE_ALPHA 0x00001000 +#define NV10TCL_RC_IN_RGB_C_MAPPING_SHIFT 13 +#define NV10TCL_RC_IN_RGB_C_MAPPING_MASK 0x0000e000 +#define NV10TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV10TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_INVERT 0x00002000 +#define NV10TCL_RC_IN_RGB_C_MAPPING_EXPAND_NORMAL 0x00004000 +#define NV10TCL_RC_IN_RGB_C_MAPPING_EXPAND_NEGATE 0x00006000 +#define NV10TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NORMAL 0x00008000 +#define NV10TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NEGATE 0x0000a000 +#define NV10TCL_RC_IN_RGB_C_MAPPING_SIGNED_IDENTITY 0x0000c000 +#define NV10TCL_RC_IN_RGB_C_MAPPING_SIGNED_NEGATE 0x0000e000 +#define NV10TCL_RC_IN_RGB_B_INPUT_SHIFT 16 +#define NV10TCL_RC_IN_RGB_B_INPUT_MASK 0x000f0000 +#define NV10TCL_RC_IN_RGB_B_INPUT_ZERO 0x00000000 +#define NV10TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR0 0x00010000 +#define NV10TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR1 0x00020000 +#define NV10TCL_RC_IN_RGB_B_INPUT_FOG 0x00030000 +#define NV10TCL_RC_IN_RGB_B_INPUT_PRIMARY_COLOR 0x00040000 +#define NV10TCL_RC_IN_RGB_B_INPUT_SECONDARY_COLOR 0x00050000 +#define NV10TCL_RC_IN_RGB_B_INPUT_TEXTURE0 0x00080000 +#define NV10TCL_RC_IN_RGB_B_INPUT_TEXTURE1 0x00090000 +#define NV10TCL_RC_IN_RGB_B_INPUT_SPARE0 0x000c0000 +#define NV10TCL_RC_IN_RGB_B_INPUT_SPARE1 0x000d0000 +#define NV10TCL_RC_IN_RGB_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000e0000 +#define NV10TCL_RC_IN_RGB_B_INPUT_E_TIMES_F 0x000f0000 +#define NV10TCL_RC_IN_RGB_B_INPUT_TEXTURE2 0x000a0000 +#define NV10TCL_RC_IN_RGB_B_INPUT_TEXTURE3 0x000b0000 +#define NV10TCL_RC_IN_RGB_B_COMPONENT_USAGE (1 << 20) +#define NV10TCL_RC_IN_RGB_B_COMPONENT_USAGE_RGB 0x00000000 +#define NV10TCL_RC_IN_RGB_B_COMPONENT_USAGE_ALPHA 0x00100000 +#define NV10TCL_RC_IN_RGB_B_MAPPING_SHIFT 21 +#define NV10TCL_RC_IN_RGB_B_MAPPING_MASK 0x00e00000 +#define NV10TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV10TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_INVERT 0x00200000 +#define NV10TCL_RC_IN_RGB_B_MAPPING_EXPAND_NORMAL 0x00400000 +#define NV10TCL_RC_IN_RGB_B_MAPPING_EXPAND_NEGATE 0x00600000 +#define NV10TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NORMAL 0x00800000 +#define NV10TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NEGATE 0x00a00000 +#define NV10TCL_RC_IN_RGB_B_MAPPING_SIGNED_IDENTITY 0x00c00000 +#define NV10TCL_RC_IN_RGB_B_MAPPING_SIGNED_NEGATE 0x00e00000 +#define NV10TCL_RC_IN_RGB_A_INPUT_SHIFT 24 +#define NV10TCL_RC_IN_RGB_A_INPUT_MASK 0x0f000000 +#define NV10TCL_RC_IN_RGB_A_INPUT_ZERO 0x00000000 +#define NV10TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR0 0x01000000 +#define NV10TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR1 0x02000000 +#define NV10TCL_RC_IN_RGB_A_INPUT_FOG 0x03000000 +#define NV10TCL_RC_IN_RGB_A_INPUT_PRIMARY_COLOR 0x04000000 +#define NV10TCL_RC_IN_RGB_A_INPUT_SECONDARY_COLOR 0x05000000 +#define NV10TCL_RC_IN_RGB_A_INPUT_TEXTURE0 0x08000000 +#define NV10TCL_RC_IN_RGB_A_INPUT_TEXTURE1 0x09000000 +#define NV10TCL_RC_IN_RGB_A_INPUT_SPARE0 0x0c000000 +#define NV10TCL_RC_IN_RGB_A_INPUT_SPARE1 0x0d000000 +#define NV10TCL_RC_IN_RGB_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0e000000 +#define NV10TCL_RC_IN_RGB_A_INPUT_E_TIMES_F 0x0f000000 +#define NV10TCL_RC_IN_RGB_A_INPUT_TEXTURE2 0x0a000000 +#define NV10TCL_RC_IN_RGB_A_INPUT_TEXTURE3 0x0b000000 +#define NV10TCL_RC_IN_RGB_A_COMPONENT_USAGE (1 << 28) +#define NV10TCL_RC_IN_RGB_A_COMPONENT_USAGE_RGB 0x00000000 +#define NV10TCL_RC_IN_RGB_A_COMPONENT_USAGE_ALPHA 0x10000000 +#define NV10TCL_RC_IN_RGB_A_MAPPING_SHIFT 29 +#define NV10TCL_RC_IN_RGB_A_MAPPING_MASK 0xe0000000 +#define NV10TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV10TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_INVERT 0x20000000 +#define NV10TCL_RC_IN_RGB_A_MAPPING_EXPAND_NORMAL 0x40000000 +#define NV10TCL_RC_IN_RGB_A_MAPPING_EXPAND_NEGATE 0x60000000 +#define NV10TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NORMAL 0x80000000 +#define NV10TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NEGATE 0xa0000000 +#define NV10TCL_RC_IN_RGB_A_MAPPING_SIGNED_IDENTITY 0xc0000000 +#define NV10TCL_RC_IN_RGB_A_MAPPING_SIGNED_NEGATE 0xe0000000 +#define NV10TCL_RC_COLOR(x) (0x00000270+((x)*4)) +#define NV10TCL_RC_COLOR__SIZE 0x00000002 +#define NV10TCL_RC_COLOR_B_SHIFT 0 +#define NV10TCL_RC_COLOR_B_MASK 0x000000ff +#define NV10TCL_RC_COLOR_G_SHIFT 8 +#define NV10TCL_RC_COLOR_G_MASK 0x0000ff00 +#define NV10TCL_RC_COLOR_R_SHIFT 16 +#define NV10TCL_RC_COLOR_R_MASK 0x00ff0000 +#define NV10TCL_RC_COLOR_A_SHIFT 24 +#define NV10TCL_RC_COLOR_A_MASK 0xff000000 +#define NV10TCL_RC_OUT_ALPHA(x) (0x00000278+((x)*4)) +#define NV10TCL_RC_OUT_ALPHA__SIZE 0x00000002 +#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SHIFT 0 +#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_MASK 0x0000000f +#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_ZERO 0x00000000 +#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR0 0x00000001 +#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR1 0x00000002 +#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_FOG 0x00000003 +#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_PRIMARY_COLOR 0x00000004 +#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SECONDARY_COLOR 0x00000005 +#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE0 0x00000008 +#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE1 0x00000009 +#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0 0x0000000c +#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE1 0x0000000d +#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0000000e +#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_E_TIMES_F 0x0000000f +#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE2 0x0000000a +#define NV10TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE3 0x0000000b +#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SHIFT 4 +#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_MASK 0x000000f0 +#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_ZERO 0x00000000 +#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR0 0x00000010 +#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR1 0x00000020 +#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_FOG 0x00000030 +#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_PRIMARY_COLOR 0x00000040 +#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SECONDARY_COLOR 0x00000050 +#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE0 0x00000080 +#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE1 0x00000090 +#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0 0x000000c0 +#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE1 0x000000d0 +#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000000e0 +#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_E_TIMES_F 0x000000f0 +#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE2 0x000000a0 +#define NV10TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE3 0x000000b0 +#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SHIFT 8 +#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_MASK 0x00000f00 +#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_ZERO 0x00000000 +#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR0 0x00000100 +#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR1 0x00000200 +#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_FOG 0x00000300 +#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_PRIMARY_COLOR 0x00000400 +#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SECONDARY_COLOR 0x00000500 +#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE0 0x00000800 +#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE1 0x00000900 +#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0 0x00000c00 +#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE1 0x00000d00 +#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_E_TIMES_F 0x00000f00 +#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE2 0x00000a00 +#define NV10TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE3 0x00000b00 +#define NV10TCL_RC_OUT_ALPHA_CD_DOT_PRODUCT (1 << 12) +#define NV10TCL_RC_OUT_ALPHA_AB_DOT_PRODUCT (1 << 13) +#define NV10TCL_RC_OUT_ALPHA_MUX_SUM (1 << 14) +#define NV10TCL_RC_OUT_ALPHA_BIAS (1 << 15) +#define NV10TCL_RC_OUT_ALPHA_BIAS_NONE 0x00000000 +#define NV10TCL_RC_OUT_ALPHA_BIAS_BIAS_BY_NEGATIVE_ONE_HALF 0x00008000 +#define NV10TCL_RC_OUT_ALPHA_SCALE_SHIFT 17 +#define NV10TCL_RC_OUT_ALPHA_SCALE_MASK 0x00000000 +#define NV10TCL_RC_OUT_ALPHA_SCALE_NONE 0x00000000 +#define NV10TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_TWO 0x00020000 +#define NV10TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_FOUR 0x00040000 +#define NV10TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_ONE_HALF 0x00060000 +#define NV10TCL_RC_OUT_RGB(x) (0x00000280+((x)*4)) +#define NV10TCL_RC_OUT_RGB__SIZE 0x00000002 +#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_SHIFT 0 +#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_MASK 0x0000000f +#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_ZERO 0x00000000 +#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR0 0x00000001 +#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR1 0x00000002 +#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_FOG 0x00000003 +#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_PRIMARY_COLOR 0x00000004 +#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_SECONDARY_COLOR 0x00000005 +#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE0 0x00000008 +#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE1 0x00000009 +#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0 0x0000000c +#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_SPARE1 0x0000000d +#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0000000e +#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_E_TIMES_F 0x0000000f +#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE2 0x0000000a +#define NV10TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE3 0x0000000b +#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_SHIFT 4 +#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_MASK 0x000000f0 +#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_ZERO 0x00000000 +#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR0 0x00000010 +#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR1 0x00000020 +#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_FOG 0x00000030 +#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_PRIMARY_COLOR 0x00000040 +#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_SECONDARY_COLOR 0x00000050 +#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE0 0x00000080 +#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE1 0x00000090 +#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0 0x000000c0 +#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_SPARE1 0x000000d0 +#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000000e0 +#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_E_TIMES_F 0x000000f0 +#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE2 0x000000a0 +#define NV10TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE3 0x000000b0 +#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SHIFT 8 +#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_MASK 0x00000f00 +#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_ZERO 0x00000000 +#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR0 0x00000100 +#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR1 0x00000200 +#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_FOG 0x00000300 +#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_PRIMARY_COLOR 0x00000400 +#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SECONDARY_COLOR 0x00000500 +#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE0 0x00000800 +#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE1 0x00000900 +#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0 0x00000c00 +#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE1 0x00000d00 +#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_E_TIMES_F 0x00000f00 +#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE2 0x00000a00 +#define NV10TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE3 0x00000b00 +#define NV10TCL_RC_OUT_RGB_CD_DOT_PRODUCT (1 << 12) +#define NV10TCL_RC_OUT_RGB_AB_DOT_PRODUCT (1 << 13) +#define NV10TCL_RC_OUT_RGB_MUX_SUM (1 << 14) +#define NV10TCL_RC_OUT_RGB_BIAS (1 << 15) +#define NV10TCL_RC_OUT_RGB_BIAS_NONE 0x00000000 +#define NV10TCL_RC_OUT_RGB_BIAS_BIAS_BY_NEGATIVE_ONE_HALF 0x00008000 +#define NV10TCL_RC_OUT_RGB_SCALE_SHIFT 17 +#define NV10TCL_RC_OUT_RGB_SCALE_MASK 0x00000000 +#define NV10TCL_RC_OUT_RGB_SCALE_NONE 0x00000000 +#define NV10TCL_RC_OUT_RGB_SCALE_SCALE_BY_TWO 0x00020000 +#define NV10TCL_RC_OUT_RGB_SCALE_SCALE_BY_FOUR 0x00040000 +#define NV10TCL_RC_OUT_RGB_SCALE_SCALE_BY_ONE_HALF 0x00060000 +#define NV10TCL_RC_OUT_RGB_OPERATION_SHIFT 27 +#define NV10TCL_RC_OUT_RGB_OPERATION_MASK 0x38000000 +#define NV10TCL_RC_FINAL0 0x00000288 +#define NV10TCL_RC_FINAL0_D_INPUT_SHIFT 0 +#define NV10TCL_RC_FINAL0_D_INPUT_MASK 0x0000000f +#define NV10TCL_RC_FINAL0_D_INPUT_ZERO 0x00000000 +#define NV10TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR0 0x00000001 +#define NV10TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR1 0x00000002 +#define NV10TCL_RC_FINAL0_D_INPUT_FOG 0x00000003 +#define NV10TCL_RC_FINAL0_D_INPUT_PRIMARY_COLOR 0x00000004 +#define NV10TCL_RC_FINAL0_D_INPUT_SECONDARY_COLOR 0x00000005 +#define NV10TCL_RC_FINAL0_D_INPUT_TEXTURE0 0x00000008 +#define NV10TCL_RC_FINAL0_D_INPUT_TEXTURE1 0x00000009 +#define NV10TCL_RC_FINAL0_D_INPUT_SPARE0 0x0000000c +#define NV10TCL_RC_FINAL0_D_INPUT_SPARE1 0x0000000d +#define NV10TCL_RC_FINAL0_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0000000e +#define NV10TCL_RC_FINAL0_D_INPUT_E_TIMES_F 0x0000000f +#define NV10TCL_RC_FINAL0_D_INPUT_TEXTURE2 0x0000000a +#define NV10TCL_RC_FINAL0_D_INPUT_TEXTURE3 0x0000000b +#define NV10TCL_RC_FINAL0_D_COMPONENT_USAGE (1 << 4) +#define NV10TCL_RC_FINAL0_D_COMPONENT_USAGE_RGB 0x00000000 +#define NV10TCL_RC_FINAL0_D_COMPONENT_USAGE_ALPHA 0x00000010 +#define NV10TCL_RC_FINAL0_D_MAPPING_SHIFT 5 +#define NV10TCL_RC_FINAL0_D_MAPPING_MASK 0x000000e0 +#define NV10TCL_RC_FINAL0_D_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV10TCL_RC_FINAL0_D_MAPPING_UNSIGNED_INVERT 0x00000020 +#define NV10TCL_RC_FINAL0_D_MAPPING_EXPAND_NORMAL 0x00000040 +#define NV10TCL_RC_FINAL0_D_MAPPING_EXPAND_NEGATE 0x00000060 +#define NV10TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NORMAL 0x00000080 +#define NV10TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NEGATE 0x000000a0 +#define NV10TCL_RC_FINAL0_D_MAPPING_SIGNED_IDENTITY 0x000000c0 +#define NV10TCL_RC_FINAL0_D_MAPPING_SIGNED_NEGATE 0x000000e0 +#define NV10TCL_RC_FINAL0_C_INPUT_SHIFT 8 +#define NV10TCL_RC_FINAL0_C_INPUT_MASK 0x00000f00 +#define NV10TCL_RC_FINAL0_C_INPUT_ZERO 0x00000000 +#define NV10TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR0 0x00000100 +#define NV10TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR1 0x00000200 +#define NV10TCL_RC_FINAL0_C_INPUT_FOG 0x00000300 +#define NV10TCL_RC_FINAL0_C_INPUT_PRIMARY_COLOR 0x00000400 +#define NV10TCL_RC_FINAL0_C_INPUT_SECONDARY_COLOR 0x00000500 +#define NV10TCL_RC_FINAL0_C_INPUT_TEXTURE0 0x00000800 +#define NV10TCL_RC_FINAL0_C_INPUT_TEXTURE1 0x00000900 +#define NV10TCL_RC_FINAL0_C_INPUT_SPARE0 0x00000c00 +#define NV10TCL_RC_FINAL0_C_INPUT_SPARE1 0x00000d00 +#define NV10TCL_RC_FINAL0_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV10TCL_RC_FINAL0_C_INPUT_E_TIMES_F 0x00000f00 +#define NV10TCL_RC_FINAL0_C_INPUT_TEXTURE2 0x00000a00 +#define NV10TCL_RC_FINAL0_C_INPUT_TEXTURE3 0x00000b00 +#define NV10TCL_RC_FINAL0_C_COMPONENT_USAGE (1 << 12) +#define NV10TCL_RC_FINAL0_C_COMPONENT_USAGE_RGB 0x00000000 +#define NV10TCL_RC_FINAL0_C_COMPONENT_USAGE_ALPHA 0x00001000 +#define NV10TCL_RC_FINAL0_C_MAPPING_SHIFT 13 +#define NV10TCL_RC_FINAL0_C_MAPPING_MASK 0x0000e000 +#define NV10TCL_RC_FINAL0_C_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV10TCL_RC_FINAL0_C_MAPPING_UNSIGNED_INVERT 0x00002000 +#define NV10TCL_RC_FINAL0_C_MAPPING_EXPAND_NORMAL 0x00004000 +#define NV10TCL_RC_FINAL0_C_MAPPING_EXPAND_NEGATE 0x00006000 +#define NV10TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NORMAL 0x00008000 +#define NV10TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NEGATE 0x0000a000 +#define NV10TCL_RC_FINAL0_C_MAPPING_SIGNED_IDENTITY 0x0000c000 +#define NV10TCL_RC_FINAL0_C_MAPPING_SIGNED_NEGATE 0x0000e000 +#define NV10TCL_RC_FINAL0_B_INPUT_SHIFT 16 +#define NV10TCL_RC_FINAL0_B_INPUT_MASK 0x000f0000 +#define NV10TCL_RC_FINAL0_B_INPUT_ZERO 0x00000000 +#define NV10TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR0 0x00010000 +#define NV10TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR1 0x00020000 +#define NV10TCL_RC_FINAL0_B_INPUT_FOG 0x00030000 +#define NV10TCL_RC_FINAL0_B_INPUT_PRIMARY_COLOR 0x00040000 +#define NV10TCL_RC_FINAL0_B_INPUT_SECONDARY_COLOR 0x00050000 +#define NV10TCL_RC_FINAL0_B_INPUT_TEXTURE0 0x00080000 +#define NV10TCL_RC_FINAL0_B_INPUT_TEXTURE1 0x00090000 +#define NV10TCL_RC_FINAL0_B_INPUT_SPARE0 0x000c0000 +#define NV10TCL_RC_FINAL0_B_INPUT_SPARE1 0x000d0000 +#define NV10TCL_RC_FINAL0_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000e0000 +#define NV10TCL_RC_FINAL0_B_INPUT_E_TIMES_F 0x000f0000 +#define NV10TCL_RC_FINAL0_B_INPUT_TEXTURE2 0x000a0000 +#define NV10TCL_RC_FINAL0_B_INPUT_TEXTURE3 0x000b0000 +#define NV10TCL_RC_FINAL0_B_COMPONENT_USAGE (1 << 20) +#define NV10TCL_RC_FINAL0_B_COMPONENT_USAGE_RGB 0x00000000 +#define NV10TCL_RC_FINAL0_B_COMPONENT_USAGE_ALPHA 0x00100000 +#define NV10TCL_RC_FINAL0_B_MAPPING_SHIFT 21 +#define NV10TCL_RC_FINAL0_B_MAPPING_MASK 0x00e00000 +#define NV10TCL_RC_FINAL0_B_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV10TCL_RC_FINAL0_B_MAPPING_UNSIGNED_INVERT 0x00200000 +#define NV10TCL_RC_FINAL0_B_MAPPING_EXPAND_NORMAL 0x00400000 +#define NV10TCL_RC_FINAL0_B_MAPPING_EXPAND_NEGATE 0x00600000 +#define NV10TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NORMAL 0x00800000 +#define NV10TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NEGATE 0x00a00000 +#define NV10TCL_RC_FINAL0_B_MAPPING_SIGNED_IDENTITY 0x00c00000 +#define NV10TCL_RC_FINAL0_B_MAPPING_SIGNED_NEGATE 0x00e00000 +#define NV10TCL_RC_FINAL0_A_INPUT_SHIFT 24 +#define NV10TCL_RC_FINAL0_A_INPUT_MASK 0x0f000000 +#define NV10TCL_RC_FINAL0_A_INPUT_ZERO 0x00000000 +#define NV10TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR0 0x01000000 +#define NV10TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR1 0x02000000 +#define NV10TCL_RC_FINAL0_A_INPUT_FOG 0x03000000 +#define NV10TCL_RC_FINAL0_A_INPUT_PRIMARY_COLOR 0x04000000 +#define NV10TCL_RC_FINAL0_A_INPUT_SECONDARY_COLOR 0x05000000 +#define NV10TCL_RC_FINAL0_A_INPUT_TEXTURE0 0x08000000 +#define NV10TCL_RC_FINAL0_A_INPUT_TEXTURE1 0x09000000 +#define NV10TCL_RC_FINAL0_A_INPUT_SPARE0 0x0c000000 +#define NV10TCL_RC_FINAL0_A_INPUT_SPARE1 0x0d000000 +#define NV10TCL_RC_FINAL0_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0e000000 +#define NV10TCL_RC_FINAL0_A_INPUT_E_TIMES_F 0x0f000000 +#define NV10TCL_RC_FINAL0_A_INPUT_TEXTURE2 0x0a000000 +#define NV10TCL_RC_FINAL0_A_INPUT_TEXTURE3 0x0b000000 +#define NV10TCL_RC_FINAL0_A_COMPONENT_USAGE (1 << 28) +#define NV10TCL_RC_FINAL0_A_COMPONENT_USAGE_RGB 0x00000000 +#define NV10TCL_RC_FINAL0_A_COMPONENT_USAGE_ALPHA 0x10000000 +#define NV10TCL_RC_FINAL0_A_MAPPING_SHIFT 29 +#define NV10TCL_RC_FINAL0_A_MAPPING_MASK 0xe0000000 +#define NV10TCL_RC_FINAL0_A_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV10TCL_RC_FINAL0_A_MAPPING_UNSIGNED_INVERT 0x20000000 +#define NV10TCL_RC_FINAL0_A_MAPPING_EXPAND_NORMAL 0x40000000 +#define NV10TCL_RC_FINAL0_A_MAPPING_EXPAND_NEGATE 0x60000000 +#define NV10TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NORMAL 0x80000000 +#define NV10TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NEGATE 0xa0000000 +#define NV10TCL_RC_FINAL0_A_MAPPING_SIGNED_IDENTITY 0xc0000000 +#define NV10TCL_RC_FINAL0_A_MAPPING_SIGNED_NEGATE 0xe0000000 +#define NV10TCL_RC_FINAL1 0x0000028c +#define NV10TCL_RC_FINAL1_COLOR_SUM_CLAMP (1 << 7) +#define NV10TCL_RC_FINAL1_G_INPUT_SHIFT 8 +#define NV10TCL_RC_FINAL1_G_INPUT_MASK 0x00000f00 +#define NV10TCL_RC_FINAL1_G_INPUT_ZERO 0x00000000 +#define NV10TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR0 0x00000100 +#define NV10TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR1 0x00000200 +#define NV10TCL_RC_FINAL1_G_INPUT_FOG 0x00000300 +#define NV10TCL_RC_FINAL1_G_INPUT_PRIMARY_COLOR 0x00000400 +#define NV10TCL_RC_FINAL1_G_INPUT_SECONDARY_COLOR 0x00000500 +#define NV10TCL_RC_FINAL1_G_INPUT_TEXTURE0 0x00000800 +#define NV10TCL_RC_FINAL1_G_INPUT_TEXTURE1 0x00000900 +#define NV10TCL_RC_FINAL1_G_INPUT_SPARE0 0x00000c00 +#define NV10TCL_RC_FINAL1_G_INPUT_SPARE1 0x00000d00 +#define NV10TCL_RC_FINAL1_G_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV10TCL_RC_FINAL1_G_INPUT_E_TIMES_F 0x00000f00 +#define NV10TCL_RC_FINAL1_G_INPUT_TEXTURE2 0x00000a00 +#define NV10TCL_RC_FINAL1_G_INPUT_TEXTURE3 0x00000b00 +#define NV10TCL_RC_FINAL1_G_COMPONENT_USAGE (1 << 12) +#define NV10TCL_RC_FINAL1_G_COMPONENT_USAGE_RGB 0x00000000 +#define NV10TCL_RC_FINAL1_G_COMPONENT_USAGE_ALPHA 0x00001000 +#define NV10TCL_RC_FINAL1_G_MAPPING_SHIFT 13 +#define NV10TCL_RC_FINAL1_G_MAPPING_MASK 0x0000e000 +#define NV10TCL_RC_FINAL1_G_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV10TCL_RC_FINAL1_G_MAPPING_UNSIGNED_INVERT 0x00002000 +#define NV10TCL_RC_FINAL1_G_MAPPING_EXPAND_NORMAL 0x00004000 +#define NV10TCL_RC_FINAL1_G_MAPPING_EXPAND_NEGATE 0x00006000 +#define NV10TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NORMAL 0x00008000 +#define NV10TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NEGATE 0x0000a000 +#define NV10TCL_RC_FINAL1_G_MAPPING_SIGNED_IDENTITY 0x0000c000 +#define NV10TCL_RC_FINAL1_G_MAPPING_SIGNED_NEGATE 0x0000e000 +#define NV10TCL_RC_FINAL1_F_INPUT_SHIFT 16 +#define NV10TCL_RC_FINAL1_F_INPUT_MASK 0x000f0000 +#define NV10TCL_RC_FINAL1_F_INPUT_ZERO 0x00000000 +#define NV10TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR0 0x00010000 +#define NV10TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR1 0x00020000 +#define NV10TCL_RC_FINAL1_F_INPUT_FOG 0x00030000 +#define NV10TCL_RC_FINAL1_F_INPUT_PRIMARY_COLOR 0x00040000 +#define NV10TCL_RC_FINAL1_F_INPUT_SECONDARY_COLOR 0x00050000 +#define NV10TCL_RC_FINAL1_F_INPUT_TEXTURE0 0x00080000 +#define NV10TCL_RC_FINAL1_F_INPUT_TEXTURE1 0x00090000 +#define NV10TCL_RC_FINAL1_F_INPUT_SPARE0 0x000c0000 +#define NV10TCL_RC_FINAL1_F_INPUT_SPARE1 0x000d0000 +#define NV10TCL_RC_FINAL1_F_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000e0000 +#define NV10TCL_RC_FINAL1_F_INPUT_E_TIMES_F 0x000f0000 +#define NV10TCL_RC_FINAL1_F_INPUT_TEXTURE2 0x000a0000 +#define NV10TCL_RC_FINAL1_F_INPUT_TEXTURE3 0x000b0000 +#define NV10TCL_RC_FINAL1_F_COMPONENT_USAGE (1 << 20) +#define NV10TCL_RC_FINAL1_F_COMPONENT_USAGE_RGB 0x00000000 +#define NV10TCL_RC_FINAL1_F_COMPONENT_USAGE_ALPHA 0x00100000 +#define NV10TCL_RC_FINAL1_F_MAPPING_SHIFT 21 +#define NV10TCL_RC_FINAL1_F_MAPPING_MASK 0x00e00000 +#define NV10TCL_RC_FINAL1_F_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV10TCL_RC_FINAL1_F_MAPPING_UNSIGNED_INVERT 0x00200000 +#define NV10TCL_RC_FINAL1_F_MAPPING_EXPAND_NORMAL 0x00400000 +#define NV10TCL_RC_FINAL1_F_MAPPING_EXPAND_NEGATE 0x00600000 +#define NV10TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NORMAL 0x00800000 +#define NV10TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NEGATE 0x00a00000 +#define NV10TCL_RC_FINAL1_F_MAPPING_SIGNED_IDENTITY 0x00c00000 +#define NV10TCL_RC_FINAL1_F_MAPPING_SIGNED_NEGATE 0x00e00000 +#define NV10TCL_RC_FINAL1_E_INPUT_SHIFT 24 +#define NV10TCL_RC_FINAL1_E_INPUT_MASK 0x0f000000 +#define NV10TCL_RC_FINAL1_E_INPUT_ZERO 0x00000000 +#define NV10TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR0 0x01000000 +#define NV10TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR1 0x02000000 +#define NV10TCL_RC_FINAL1_E_INPUT_FOG 0x03000000 +#define NV10TCL_RC_FINAL1_E_INPUT_PRIMARY_COLOR 0x04000000 +#define NV10TCL_RC_FINAL1_E_INPUT_SECONDARY_COLOR 0x05000000 +#define NV10TCL_RC_FINAL1_E_INPUT_TEXTURE0 0x08000000 +#define NV10TCL_RC_FINAL1_E_INPUT_TEXTURE1 0x09000000 +#define NV10TCL_RC_FINAL1_E_INPUT_SPARE0 0x0c000000 +#define NV10TCL_RC_FINAL1_E_INPUT_SPARE1 0x0d000000 +#define NV10TCL_RC_FINAL1_E_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0e000000 +#define NV10TCL_RC_FINAL1_E_INPUT_E_TIMES_F 0x0f000000 +#define NV10TCL_RC_FINAL1_E_INPUT_TEXTURE2 0x0a000000 +#define NV10TCL_RC_FINAL1_E_INPUT_TEXTURE3 0x0b000000 +#define NV10TCL_RC_FINAL1_E_COMPONENT_USAGE (1 << 28) +#define NV10TCL_RC_FINAL1_E_COMPONENT_USAGE_RGB 0x00000000 +#define NV10TCL_RC_FINAL1_E_COMPONENT_USAGE_ALPHA 0x10000000 +#define NV10TCL_RC_FINAL1_E_MAPPING_SHIFT 29 +#define NV10TCL_RC_FINAL1_E_MAPPING_MASK 0xe0000000 +#define NV10TCL_RC_FINAL1_E_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV10TCL_RC_FINAL1_E_MAPPING_UNSIGNED_INVERT 0x20000000 +#define NV10TCL_RC_FINAL1_E_MAPPING_EXPAND_NORMAL 0x40000000 +#define NV10TCL_RC_FINAL1_E_MAPPING_EXPAND_NEGATE 0x60000000 +#define NV10TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NORMAL 0x80000000 +#define NV10TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NEGATE 0xa0000000 +#define NV10TCL_RC_FINAL1_E_MAPPING_SIGNED_IDENTITY 0xc0000000 +#define NV10TCL_RC_FINAL1_E_MAPPING_SIGNED_NEGATE 0xe0000000 +#define NV10TCL_LIGHT_MODEL 0x00000294 +#define NV10TCL_LIGHT_MODEL_VERTEX_SPECULAR (1 << 0) +#define NV10TCL_LIGHT_MODEL_SEPARATE_SPECULAR (1 << 1) +#define NV10TCL_LIGHT_MODEL_LOCAL_VIEWER (1 << 16) +#define NV10TCL_COLOR_MATERIAL 0x00000298 +#define NV10TCL_COLOR_MATERIAL_EMISSION (1 << 0) +#define NV10TCL_COLOR_MATERIAL_AMBIENT (1 << 1) +#define NV10TCL_COLOR_MATERIAL_DIFFUSE (1 << 2) +#define NV10TCL_COLOR_MATERIAL_SPECULAR (1 << 3) +#define NV10TCL_FOG_MODE 0x0000029c +#define NV10TCL_FOG_MODE_LINEAR 0x00002601 +#define NV10TCL_FOG_MODE_EXP 0x00000800 +#define NV10TCL_FOG_MODE_EXP_ABS 0x00000802 +#define NV10TCL_FOG_MODE_EXP2 0x00000803 +#define NV10TCL_FOG_COORD 0x000002a0 +#define NV10TCL_FOG_COORD_FOG 0x00000000 +#define NV10TCL_FOG_COORD_DIST_RADIAL 0x00000001 +#define NV10TCL_FOG_COORD_DIST_ORTHOGONAL 0x00000002 +#define NV10TCL_FOG_COORD_DIST_ORTHOGONAL_ABS 0x00000003 +#define NV10TCL_FOG_ENABLE 0x000002a4 +#define NV10TCL_FOG_COLOR 0x000002a8 +#define NV10TCL_FOG_COLOR_R_SHIFT 0 +#define NV10TCL_FOG_COLOR_R_MASK 0x000000ff +#define NV10TCL_FOG_COLOR_G_SHIFT 8 +#define NV10TCL_FOG_COLOR_G_MASK 0x0000ff00 +#define NV10TCL_FOG_COLOR_B_SHIFT 16 +#define NV10TCL_FOG_COLOR_B_MASK 0x00ff0000 +#define NV10TCL_FOG_COLOR_A_SHIFT 24 +#define NV10TCL_FOG_COLOR_A_MASK 0xff000000 +#define NV10TCL_VIEWPORT_CLIP_MODE 0x000002b4 +#define NV10TCL_VIEWPORT_CLIP_HORIZ(x) (0x000002c0+((x)*4)) +#define NV10TCL_VIEWPORT_CLIP_HORIZ__SIZE 0x00000008 +#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_L_SHIFT 0 +#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_L_MASK 0x000007ff +#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_LEFT_ENABLE (1 << 11) +#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_R_SHIFT 16 +#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_R_MASK 0x07ff0000 +#define NV10TCL_VIEWPORT_CLIP_HORIZ_CLIP_RIGHT_ENABLE (1 << 27) +#define NV10TCL_VIEWPORT_CLIP_VERT(x) (0x000002e0+((x)*4)) +#define NV10TCL_VIEWPORT_CLIP_VERT__SIZE 0x00000008 +#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_T_SHIFT 0 +#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_T_MASK 0x000007ff +#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_TOP_ENABLE (1 << 11) +#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_B_SHIFT 16 +#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_B_MASK 0x07ff0000 +#define NV10TCL_VIEWPORT_CLIP_VERT_CLIP_BOTTOM_ENABLE (1 << 27) +#define NV10TCL_ALPHA_FUNC_ENABLE 0x00000300 +#define NV10TCL_BLEND_FUNC_ENABLE 0x00000304 +#define NV10TCL_CULL_FACE_ENABLE 0x00000308 +#define NV10TCL_DEPTH_TEST_ENABLE 0x0000030c +#define NV10TCL_DITHER_ENABLE 0x00000310 +#define NV10TCL_LIGHTING_ENABLE 0x00000314 +#define NV10TCL_POINT_PARAMETERS_ENABLE 0x00000318 +#define NV10TCL_POINT_SMOOTH_ENABLE 0x0000031c +#define NV10TCL_LINE_SMOOTH_ENABLE 0x00000320 +#define NV10TCL_POLYGON_SMOOTH_ENABLE 0x00000324 +#define NV10TCL_VERTEX_WEIGHT_ENABLE 0x00000328 +#define NV10TCL_STENCIL_ENABLE 0x0000032c +#define NV10TCL_POLYGON_OFFSET_POINT_ENABLE 0x00000330 +#define NV10TCL_POLYGON_OFFSET_LINE_ENABLE 0x00000334 +#define NV10TCL_POLYGON_OFFSET_FILL_ENABLE 0x00000338 +#define NV10TCL_ALPHA_FUNC_FUNC 0x0000033c +#define NV10TCL_ALPHA_FUNC_FUNC_NEVER 0x00000200 +#define NV10TCL_ALPHA_FUNC_FUNC_LESS 0x00000201 +#define NV10TCL_ALPHA_FUNC_FUNC_EQUAL 0x00000202 +#define NV10TCL_ALPHA_FUNC_FUNC_LEQUAL 0x00000203 +#define NV10TCL_ALPHA_FUNC_FUNC_GREATER 0x00000204 +#define NV10TCL_ALPHA_FUNC_FUNC_NOTEQUAL 0x00000205 +#define NV10TCL_ALPHA_FUNC_FUNC_GEQUAL 0x00000206 +#define NV10TCL_ALPHA_FUNC_FUNC_ALWAYS 0x00000207 +#define NV10TCL_ALPHA_FUNC_REF 0x00000340 +#define NV10TCL_BLEND_FUNC_SRC 0x00000344 +#define NV10TCL_BLEND_FUNC_SRC_ZERO 0x00000000 +#define NV10TCL_BLEND_FUNC_SRC_ONE 0x00000001 +#define NV10TCL_BLEND_FUNC_SRC_SRC_COLOR 0x00000300 +#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_SRC_COLOR 0x00000301 +#define NV10TCL_BLEND_FUNC_SRC_SRC_ALPHA 0x00000302 +#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_SRC_ALPHA 0x00000303 +#define NV10TCL_BLEND_FUNC_SRC_DST_ALPHA 0x00000304 +#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_DST_ALPHA 0x00000305 +#define NV10TCL_BLEND_FUNC_SRC_DST_COLOR 0x00000306 +#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_DST_COLOR 0x00000307 +#define NV10TCL_BLEND_FUNC_SRC_SRC_ALPHA_SATURATE 0x00000308 +#define NV10TCL_BLEND_FUNC_SRC_CONSTANT_COLOR 0x00008001 +#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_CONSTANT_COLOR 0x00008002 +#define NV10TCL_BLEND_FUNC_SRC_CONSTANT_ALPHA 0x00008003 +#define NV10TCL_BLEND_FUNC_SRC_ONE_MINUS_CONSTANT_ALPHA 0x00008004 +#define NV10TCL_BLEND_FUNC_DST 0x00000348 +#define NV10TCL_BLEND_FUNC_DST_ZERO 0x00000000 +#define NV10TCL_BLEND_FUNC_DST_ONE 0x00000001 +#define NV10TCL_BLEND_FUNC_DST_SRC_COLOR 0x00000300 +#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_SRC_COLOR 0x00000301 +#define NV10TCL_BLEND_FUNC_DST_SRC_ALPHA 0x00000302 +#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_SRC_ALPHA 0x00000303 +#define NV10TCL_BLEND_FUNC_DST_DST_ALPHA 0x00000304 +#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_DST_ALPHA 0x00000305 +#define NV10TCL_BLEND_FUNC_DST_DST_COLOR 0x00000306 +#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_DST_COLOR 0x00000307 +#define NV10TCL_BLEND_FUNC_DST_SRC_ALPHA_SATURATE 0x00000308 +#define NV10TCL_BLEND_FUNC_DST_CONSTANT_COLOR 0x00008001 +#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_CONSTANT_COLOR 0x00008002 +#define NV10TCL_BLEND_FUNC_DST_CONSTANT_ALPHA 0x00008003 +#define NV10TCL_BLEND_FUNC_DST_ONE_MINUS_CONSTANT_ALPHA 0x00008004 +#define NV10TCL_BLEND_COLOR 0x0000034c +#define NV10TCL_BLEND_COLOR_B_SHIFT 0 +#define NV10TCL_BLEND_COLOR_B_MASK 0x000000ff +#define NV10TCL_BLEND_COLOR_G_SHIFT 8 +#define NV10TCL_BLEND_COLOR_G_MASK 0x0000ff00 +#define NV10TCL_BLEND_COLOR_R_SHIFT 16 +#define NV10TCL_BLEND_COLOR_R_MASK 0x00ff0000 +#define NV10TCL_BLEND_COLOR_A_SHIFT 24 +#define NV10TCL_BLEND_COLOR_A_MASK 0xff000000 +#define NV10TCL_BLEND_EQUATION 0x00000350 +#define NV10TCL_BLEND_EQUATION_FUNC_ADD 0x00008006 +#define NV10TCL_BLEND_EQUATION_MIN 0x00008007 +#define NV10TCL_BLEND_EQUATION_MAX 0x00008008 +#define NV10TCL_BLEND_EQUATION_FUNC_SUBTRACT 0x0000800a +#define NV10TCL_BLEND_EQUATION_FUNC_REVERSE_SUBTRACT 0x0000800b +#define NV10TCL_DEPTH_FUNC 0x00000354 +#define NV10TCL_DEPTH_FUNC_NEVER 0x00000200 +#define NV10TCL_DEPTH_FUNC_LESS 0x00000201 +#define NV10TCL_DEPTH_FUNC_EQUAL 0x00000202 +#define NV10TCL_DEPTH_FUNC_LEQUAL 0x00000203 +#define NV10TCL_DEPTH_FUNC_GREATER 0x00000204 +#define NV10TCL_DEPTH_FUNC_NOTEQUAL 0x00000205 +#define NV10TCL_DEPTH_FUNC_GEQUAL 0x00000206 +#define NV10TCL_DEPTH_FUNC_ALWAYS 0x00000207 +#define NV10TCL_COLOR_MASK 0x00000358 +#define NV10TCL_COLOR_MASK_B (1 << 0) +#define NV10TCL_COLOR_MASK_G (1 << 8) +#define NV10TCL_COLOR_MASK_R (1 << 16) +#define NV10TCL_COLOR_MASK_A (1 << 24) +#define NV10TCL_DEPTH_WRITE_ENABLE 0x0000035c +#define NV10TCL_STENCIL_MASK 0x00000360 +#define NV10TCL_STENCIL_FUNC_FUNC 0x00000364 +#define NV10TCL_STENCIL_FUNC_FUNC_NEVER 0x00000200 +#define NV10TCL_STENCIL_FUNC_FUNC_LESS 0x00000201 +#define NV10TCL_STENCIL_FUNC_FUNC_EQUAL 0x00000202 +#define NV10TCL_STENCIL_FUNC_FUNC_LEQUAL 0x00000203 +#define NV10TCL_STENCIL_FUNC_FUNC_GREATER 0x00000204 +#define NV10TCL_STENCIL_FUNC_FUNC_NOTEQUAL 0x00000205 +#define NV10TCL_STENCIL_FUNC_FUNC_GEQUAL 0x00000206 +#define NV10TCL_STENCIL_FUNC_FUNC_ALWAYS 0x00000207 +#define NV10TCL_STENCIL_FUNC_REF 0x00000368 +#define NV10TCL_STENCIL_FUNC_MASK 0x0000036c +#define NV10TCL_STENCIL_OP_FAIL 0x00000370 +#define NV10TCL_STENCIL_OP_FAIL_ZERO 0x00000000 +#define NV10TCL_STENCIL_OP_FAIL_INVERT 0x0000150a +#define NV10TCL_STENCIL_OP_FAIL_KEEP 0x00001e00 +#define NV10TCL_STENCIL_OP_FAIL_REPLACE 0x00001e01 +#define NV10TCL_STENCIL_OP_FAIL_INCR 0x00001e02 +#define NV10TCL_STENCIL_OP_FAIL_DECR 0x00001e03 +#define NV10TCL_STENCIL_OP_FAIL_INCR_WRAP 0x00008507 +#define NV10TCL_STENCIL_OP_FAIL_DECR_WRAP 0x00008508 +#define NV10TCL_STENCIL_OP_ZFAIL 0x00000374 +#define NV10TCL_STENCIL_OP_ZFAIL_ZERO 0x00000000 +#define NV10TCL_STENCIL_OP_ZFAIL_INVERT 0x0000150a +#define NV10TCL_STENCIL_OP_ZFAIL_KEEP 0x00001e00 +#define NV10TCL_STENCIL_OP_ZFAIL_REPLACE 0x00001e01 +#define NV10TCL_STENCIL_OP_ZFAIL_INCR 0x00001e02 +#define NV10TCL_STENCIL_OP_ZFAIL_DECR 0x00001e03 +#define NV10TCL_STENCIL_OP_ZFAIL_INCR_WRAP 0x00008507 +#define NV10TCL_STENCIL_OP_ZFAIL_DECR_WRAP 0x00008508 +#define NV10TCL_STENCIL_OP_ZPASS 0x00000378 +#define NV10TCL_STENCIL_OP_ZPASS_ZERO 0x00000000 +#define NV10TCL_STENCIL_OP_ZPASS_INVERT 0x0000150a +#define NV10TCL_STENCIL_OP_ZPASS_KEEP 0x00001e00 +#define NV10TCL_STENCIL_OP_ZPASS_REPLACE 0x00001e01 +#define NV10TCL_STENCIL_OP_ZPASS_INCR 0x00001e02 +#define NV10TCL_STENCIL_OP_ZPASS_DECR 0x00001e03 +#define NV10TCL_STENCIL_OP_ZPASS_INCR_WRAP 0x00008507 +#define NV10TCL_STENCIL_OP_ZPASS_DECR_WRAP 0x00008508 +#define NV10TCL_SHADE_MODEL 0x0000037c +#define NV10TCL_SHADE_MODEL_FLAT 0x00001d00 +#define NV10TCL_SHADE_MODEL_SMOOTH 0x00001d01 +#define NV10TCL_LINE_WIDTH 0x00000380 +#define NV10TCL_POLYGON_OFFSET_FACTOR 0x00000384 +#define NV10TCL_POLYGON_OFFSET_UNITS 0x00000388 +#define NV10TCL_POLYGON_MODE_FRONT 0x0000038c +#define NV10TCL_POLYGON_MODE_FRONT_POINT 0x00001b00 +#define NV10TCL_POLYGON_MODE_FRONT_LINE 0x00001b01 +#define NV10TCL_POLYGON_MODE_FRONT_FILL 0x00001b02 +#define NV10TCL_POLYGON_MODE_BACK 0x00000390 +#define NV10TCL_POLYGON_MODE_BACK_POINT 0x00001b00 +#define NV10TCL_POLYGON_MODE_BACK_LINE 0x00001b01 +#define NV10TCL_POLYGON_MODE_BACK_FILL 0x00001b02 +#define NV10TCL_DEPTH_RANGE_NEAR 0x00000394 +#define NV10TCL_DEPTH_RANGE_FAR 0x00000398 +#define NV10TCL_CULL_FACE 0x0000039c +#define NV10TCL_CULL_FACE_FRONT 0x00000404 +#define NV10TCL_CULL_FACE_BACK 0x00000405 +#define NV10TCL_CULL_FACE_FRONT_AND_BACK 0x00000408 +#define NV10TCL_FRONT_FACE 0x000003a0 +#define NV10TCL_FRONT_FACE_CW 0x00000900 +#define NV10TCL_FRONT_FACE_CCW 0x00000901 +#define NV10TCL_NORMALIZE_ENABLE 0x000003a4 +#define NV10TCL_MATERIAL_FACTOR_R 0x000003a8 +#define NV10TCL_MATERIAL_FACTOR_G 0x000003ac +#define NV10TCL_MATERIAL_FACTOR_B 0x000003b0 +#define NV10TCL_MATERIAL_FACTOR_A 0x000003b4 +#define NV10TCL_SEPARATE_SPECULAR_ENABLE 0x000003b8 +#define NV10TCL_ENABLED_LIGHTS 0x000003bc +#define NV10TCL_ENABLED_LIGHTS_0_SHIFT 0 +#define NV10TCL_ENABLED_LIGHTS_0_MASK 0x00000003 +#define NV10TCL_ENABLED_LIGHTS_0_DISABLED 0x00000000 +#define NV10TCL_ENABLED_LIGHTS_0_NONPOSITIONAL 0x00000001 +#define NV10TCL_ENABLED_LIGHTS_0_POSITIONAL 0x00000002 +#define NV10TCL_ENABLED_LIGHTS_0_DIRECTIONAL 0x00000003 +#define NV10TCL_ENABLED_LIGHTS_1_SHIFT 2 +#define NV10TCL_ENABLED_LIGHTS_1_MASK 0x0000000c +#define NV10TCL_ENABLED_LIGHTS_1_DISABLED 0x00000000 +#define NV10TCL_ENABLED_LIGHTS_1_NONPOSITIONAL 0x00000004 +#define NV10TCL_ENABLED_LIGHTS_1_POSITIONAL 0x00000008 +#define NV10TCL_ENABLED_LIGHTS_1_DIRECTIONAL 0x0000000c +#define NV10TCL_ENABLED_LIGHTS_2_SHIFT 4 +#define NV10TCL_ENABLED_LIGHTS_2_MASK 0x00000030 +#define NV10TCL_ENABLED_LIGHTS_2_DISABLED 0x00000000 +#define NV10TCL_ENABLED_LIGHTS_2_NONPOSITIONAL 0x00000010 +#define NV10TCL_ENABLED_LIGHTS_2_POSITIONAL 0x00000020 +#define NV10TCL_ENABLED_LIGHTS_2_DIRECTIONAL 0x00000030 +#define NV10TCL_ENABLED_LIGHTS_3_SHIFT 6 +#define NV10TCL_ENABLED_LIGHTS_3_MASK 0x000000c0 +#define NV10TCL_ENABLED_LIGHTS_3_DISABLED 0x00000000 +#define NV10TCL_ENABLED_LIGHTS_3_NONPOSITIONAL 0x00000040 +#define NV10TCL_ENABLED_LIGHTS_3_POSITIONAL 0x00000080 +#define NV10TCL_ENABLED_LIGHTS_3_DIRECTIONAL 0x000000c0 +#define NV10TCL_ENABLED_LIGHTS_4_SHIFT 8 +#define NV10TCL_ENABLED_LIGHTS_4_MASK 0x00000300 +#define NV10TCL_ENABLED_LIGHTS_4_DISABLED 0x00000000 +#define NV10TCL_ENABLED_LIGHTS_4_NONPOSITIONAL 0x00000100 +#define NV10TCL_ENABLED_LIGHTS_4_POSITIONAL 0x00000200 +#define NV10TCL_ENABLED_LIGHTS_4_DIRECTIONAL 0x00000300 +#define NV10TCL_ENABLED_LIGHTS_5_SHIFT 10 +#define NV10TCL_ENABLED_LIGHTS_5_MASK 0x00000c00 +#define NV10TCL_ENABLED_LIGHTS_5_DISABLED 0x00000000 +#define NV10TCL_ENABLED_LIGHTS_5_NONPOSITIONAL 0x00000400 +#define NV10TCL_ENABLED_LIGHTS_5_POSITIONAL 0x00000800 +#define NV10TCL_ENABLED_LIGHTS_5_DIRECTIONAL 0x00000c00 +#define NV10TCL_ENABLED_LIGHTS_6_SHIFT 12 +#define NV10TCL_ENABLED_LIGHTS_6_MASK 0x00003000 +#define NV10TCL_ENABLED_LIGHTS_6_DISABLED 0x00000000 +#define NV10TCL_ENABLED_LIGHTS_6_NONPOSITIONAL 0x00001000 +#define NV10TCL_ENABLED_LIGHTS_6_POSITIONAL 0x00002000 +#define NV10TCL_ENABLED_LIGHTS_6_DIRECTIONAL 0x00003000 +#define NV10TCL_ENABLED_LIGHTS_7_SHIFT 14 +#define NV10TCL_ENABLED_LIGHTS_7_MASK 0x0000c000 +#define NV10TCL_ENABLED_LIGHTS_7_DISABLED 0x00000000 +#define NV10TCL_ENABLED_LIGHTS_7_NONPOSITIONAL 0x00004000 +#define NV10TCL_ENABLED_LIGHTS_7_POSITIONAL 0x00008000 +#define NV10TCL_ENABLED_LIGHTS_7_DIRECTIONAL 0x0000c000 +#define NV10TCL_TX_GEN_MODE_S(x) (0x000003c0+((x)*16)) +#define NV10TCL_TX_GEN_MODE_S__SIZE 0x00000002 +#define NV10TCL_TX_GEN_MODE_S_FALSE 0x00000000 +#define NV10TCL_TX_GEN_MODE_S_EYE_LINEAR 0x00002400 +#define NV10TCL_TX_GEN_MODE_S_OBJECT_LINEAR 0x00002401 +#define NV10TCL_TX_GEN_MODE_S_SPHERE_MAP 0x00002402 +#define NV10TCL_TX_GEN_MODE_S_NORMAL_MAP 0x00008511 +#define NV10TCL_TX_GEN_MODE_S_REFLECTION_MAP 0x00008512 +#define NV10TCL_TX_GEN_MODE_T(x) (0x000003c4+((x)*16)) +#define NV10TCL_TX_GEN_MODE_T__SIZE 0x00000002 +#define NV10TCL_TX_GEN_MODE_T_FALSE 0x00000000 +#define NV10TCL_TX_GEN_MODE_T_EYE_LINEAR 0x00002400 +#define NV10TCL_TX_GEN_MODE_T_OBJECT_LINEAR 0x00002401 +#define NV10TCL_TX_GEN_MODE_T_SPHERE_MAP 0x00002402 +#define NV10TCL_TX_GEN_MODE_T_NORMAL_MAP 0x00008511 +#define NV10TCL_TX_GEN_MODE_T_REFLECTION_MAP 0x00008512 +#define NV10TCL_TX_GEN_MODE_R(x) (0x000003c8+((x)*16)) +#define NV10TCL_TX_GEN_MODE_R__SIZE 0x00000002 +#define NV10TCL_TX_GEN_MODE_R_FALSE 0x00000000 +#define NV10TCL_TX_GEN_MODE_R_EYE_LINEAR 0x00002400 +#define NV10TCL_TX_GEN_MODE_R_OBJECT_LINEAR 0x00002401 +#define NV10TCL_TX_GEN_MODE_R_SPHERE_MAP 0x00002402 +#define NV10TCL_TX_GEN_MODE_R_NORMAL_MAP 0x00008511 +#define NV10TCL_TX_GEN_MODE_R_REFLECTION_MAP 0x00008512 +#define NV10TCL_TX_GEN_MODE_Q(x) (0x000003cc+((x)*16)) +#define NV10TCL_TX_GEN_MODE_Q__SIZE 0x00000002 +#define NV10TCL_TX_GEN_MODE_Q_FALSE 0x00000000 +#define NV10TCL_TX_GEN_MODE_Q_EYE_LINEAR 0x00002400 +#define NV10TCL_TX_GEN_MODE_Q_OBJECT_LINEAR 0x00002401 +#define NV10TCL_TX_GEN_MODE_Q_SPHERE_MAP 0x00002402 +#define NV10TCL_TX_GEN_MODE_Q_NORMAL_MAP 0x00008511 +#define NV10TCL_TX_GEN_MODE_Q_REFLECTION_MAP 0x00008512 +#define NV10TCL_TX_MATRIX_ENABLE(x) (0x000003e0+((x)*4)) +#define NV10TCL_TX_MATRIX_ENABLE__SIZE 0x00000002 +#define NV10TCL_VIEW_MATRIX_ENABLE 0x000003e8 +#define NV10TCL_VIEW_MATRIX_ENABLE_MODELVIEW1 (1 << 0) +#define NV10TCL_VIEW_MATRIX_ENABLE_MODELVIEW0 (1 << 1) +#define NV10TCL_VIEW_MATRIX_ENABLE_PROJECTION (1 << 2) +#define NV10TCL_POINT_SIZE 0x000003ec +#define NV10TCL_MODELVIEW0_MATRIX(x) (0x00000400+((x)*4)) +#define NV10TCL_MODELVIEW0_MATRIX__SIZE 0x00000010 +#define NV10TCL_MODELVIEW1_MATRIX(x) (0x00000440+((x)*4)) +#define NV10TCL_MODELVIEW1_MATRIX__SIZE 0x00000010 +#define NV10TCL_INVERSE_MODELVIEW0_MATRIX(x) (0x00000480+((x)*4)) +#define NV10TCL_INVERSE_MODELVIEW0_MATRIX__SIZE 0x00000010 +#define NV10TCL_INVERSE_MODELVIEW1_MATRIX(x) (0x000004c0+((x)*4)) +#define NV10TCL_INVERSE_MODELVIEW1_MATRIX__SIZE 0x00000010 +#define NV10TCL_PROJECTION_MATRIX(x) (0x00000500+((x)*4)) +#define NV10TCL_PROJECTION_MATRIX__SIZE 0x00000010 +#define NV10TCL_TX0_MATRIX(x) (0x00000540+((x)*4)) +#define NV10TCL_TX0_MATRIX__SIZE 0x00000010 +#define NV10TCL_TX1_MATRIX(x) (0x00000580+((x)*4)) +#define NV10TCL_TX1_MATRIX__SIZE 0x00000010 +#define NV10TCL_TX_GEN_COEFF_S_A(x) (0x00000600+((x)*64)) +#define NV10TCL_TX_GEN_COEFF_S_A__SIZE 0x00000002 +#define NV10TCL_TX_GEN_COEFF_S_B(x) (0x00000604+((x)*64)) +#define NV10TCL_TX_GEN_COEFF_S_B__SIZE 0x00000002 +#define NV10TCL_TX_GEN_COEFF_S_C(x) (0x00000608+((x)*64)) +#define NV10TCL_TX_GEN_COEFF_S_C__SIZE 0x00000002 +#define NV10TCL_TX_GEN_COEFF_S_D(x) (0x0000060c+((x)*64)) +#define NV10TCL_TX_GEN_COEFF_S_D__SIZE 0x00000002 +#define NV10TCL_TX_GEN_COEFF_T_A(x) (0x00000610+((x)*64)) +#define NV10TCL_TX_GEN_COEFF_T_A__SIZE 0x00000002 +#define NV10TCL_TX_GEN_COEFF_T_B(x) (0x00000614+((x)*64)) +#define NV10TCL_TX_GEN_COEFF_T_B__SIZE 0x00000002 +#define NV10TCL_TX_GEN_COEFF_T_C(x) (0x00000618+((x)*64)) +#define NV10TCL_TX_GEN_COEFF_T_C__SIZE 0x00000002 +#define NV10TCL_TX_GEN_COEFF_T_D(x) (0x0000061c+((x)*64)) +#define NV10TCL_TX_GEN_COEFF_T_D__SIZE 0x00000002 +#define NV10TCL_TX_GEN_COEFF_R_A(x) (0x00000620+((x)*64)) +#define NV10TCL_TX_GEN_COEFF_R_A__SIZE 0x00000002 +#define NV10TCL_TX_GEN_COEFF_R_B(x) (0x00000624+((x)*64)) +#define NV10TCL_TX_GEN_COEFF_R_B__SIZE 0x00000002 +#define NV10TCL_TX_GEN_COEFF_R_C(x) (0x00000628+((x)*64)) +#define NV10TCL_TX_GEN_COEFF_R_C__SIZE 0x00000002 +#define NV10TCL_TX_GEN_COEFF_R_D(x) (0x0000062c+((x)*64)) +#define NV10TCL_TX_GEN_COEFF_R_D__SIZE 0x00000002 +#define NV10TCL_TX_GEN_COEFF_Q_A(x) (0x00000630+((x)*64)) +#define NV10TCL_TX_GEN_COEFF_Q_A__SIZE 0x00000002 +#define NV10TCL_TX_GEN_COEFF_Q_B(x) (0x00000634+((x)*64)) +#define NV10TCL_TX_GEN_COEFF_Q_B__SIZE 0x00000002 +#define NV10TCL_TX_GEN_COEFF_Q_C(x) (0x00000638+((x)*64)) +#define NV10TCL_TX_GEN_COEFF_Q_C__SIZE 0x00000002 +#define NV10TCL_TX_GEN_COEFF_Q_D(x) (0x0000063c+((x)*64)) +#define NV10TCL_TX_GEN_COEFF_Q_D__SIZE 0x00000002 +#define NV10TCL_FOG_EQUATION_CONSTANT 0x00000680 +#define NV10TCL_FOG_EQUATION_LINEAR 0x00000684 +#define NV10TCL_FOG_EQUATION_QUADRATIC 0x00000688 +#define NV10TCL_MATERIAL_SHININESS(x) (0x000006a0+((x)*4)) +#define NV10TCL_MATERIAL_SHININESS__SIZE 0x00000006 +#define NV10TCL_LIGHT_MODEL_AMBIENT_R 0x000006c4 +#define NV10TCL_LIGHT_MODEL_AMBIENT_G 0x000006c8 +#define NV10TCL_LIGHT_MODEL_AMBIENT_B 0x000006cc +#define NV10TCL_VIEWPORT_TRANSLATE_X 0x000006e8 +#define NV10TCL_VIEWPORT_TRANSLATE_Y 0x000006ec +#define NV10TCL_VIEWPORT_TRANSLATE_Z 0x000006f0 +#define NV10TCL_VIEWPORT_TRANSLATE_W 0x000006f4 +#define NV10TCL_POINT_PARAMETER(x) (0x000006f8+((x)*4)) +#define NV10TCL_POINT_PARAMETER__SIZE 0x00000008 +#define NV10TCL_LIGHT_AMBIENT_R(x) (0x00000800+((x)*128)) +#define NV10TCL_LIGHT_AMBIENT_R__SIZE 0x00000008 +#define NV10TCL_LIGHT_AMBIENT_G(x) (0x00000804+((x)*128)) +#define NV10TCL_LIGHT_AMBIENT_G__SIZE 0x00000008 +#define NV10TCL_LIGHT_AMBIENT_B(x) (0x00000808+((x)*128)) +#define NV10TCL_LIGHT_AMBIENT_B__SIZE 0x00000008 +#define NV10TCL_LIGHT_DIFFUSE_R(x) (0x0000080c+((x)*128)) +#define NV10TCL_LIGHT_DIFFUSE_R__SIZE 0x00000008 +#define NV10TCL_LIGHT_DIFFUSE_G(x) (0x00000810+((x)*128)) +#define NV10TCL_LIGHT_DIFFUSE_G__SIZE 0x00000008 +#define NV10TCL_LIGHT_DIFFUSE_B(x) (0x00000814+((x)*128)) +#define NV10TCL_LIGHT_DIFFUSE_B__SIZE 0x00000008 +#define NV10TCL_LIGHT_SPECULAR_R(x) (0x00000818+((x)*128)) +#define NV10TCL_LIGHT_SPECULAR_R__SIZE 0x00000008 +#define NV10TCL_LIGHT_SPECULAR_G(x) (0x0000081c+((x)*128)) +#define NV10TCL_LIGHT_SPECULAR_G__SIZE 0x00000008 +#define NV10TCL_LIGHT_SPECULAR_B(x) (0x00000820+((x)*128)) +#define NV10TCL_LIGHT_SPECULAR_B__SIZE 0x00000008 +#define NV10TCL_LIGHT_HALF_VECTOR_X(x) (0x00000828+((x)*128)) +#define NV10TCL_LIGHT_HALF_VECTOR_X__SIZE 0x00000008 +#define NV10TCL_LIGHT_HALF_VECTOR_Y(x) (0x0000082c+((x)*128)) +#define NV10TCL_LIGHT_HALF_VECTOR_Y__SIZE 0x00000008 +#define NV10TCL_LIGHT_HALF_VECTOR_Z(x) (0x00000830+((x)*128)) +#define NV10TCL_LIGHT_HALF_VECTOR_Z__SIZE 0x00000008 +#define NV10TCL_LIGHT_DIRECTION_X(x) (0x00000834+((x)*128)) +#define NV10TCL_LIGHT_DIRECTION_X__SIZE 0x00000008 +#define NV10TCL_LIGHT_DIRECTION_Y(x) (0x00000838+((x)*128)) +#define NV10TCL_LIGHT_DIRECTION_Y__SIZE 0x00000008 +#define NV10TCL_LIGHT_DIRECTION_Z(x) (0x0000083c+((x)*128)) +#define NV10TCL_LIGHT_DIRECTION_Z__SIZE 0x00000008 +#define NV10TCL_LIGHT_SPOT_CUTOFF_A(x) (0x00000840+((x)*128)) +#define NV10TCL_LIGHT_SPOT_CUTOFF_A__SIZE 0x00000008 +#define NV10TCL_LIGHT_SPOT_CUTOFF_B(x) (0x00000844+((x)*128)) +#define NV10TCL_LIGHT_SPOT_CUTOFF_B__SIZE 0x00000008 +#define NV10TCL_LIGHT_SPOT_CUTOFF_C(x) (0x00000848+((x)*128)) +#define NV10TCL_LIGHT_SPOT_CUTOFF_C__SIZE 0x00000008 +#define NV10TCL_LIGHT_SPOT_DIR_X(x) (0x0000084c+((x)*128)) +#define NV10TCL_LIGHT_SPOT_DIR_X__SIZE 0x00000008 +#define NV10TCL_LIGHT_SPOT_DIR_Y(x) (0x00000850+((x)*128)) +#define NV10TCL_LIGHT_SPOT_DIR_Y__SIZE 0x00000008 +#define NV10TCL_LIGHT_SPOT_DIR_Z(x) (0x00000854+((x)*128)) +#define NV10TCL_LIGHT_SPOT_DIR_Z__SIZE 0x00000008 +#define NV10TCL_LIGHT_SPOT_CUTOFF_D(x) (0x00000858+((x)*128)) +#define NV10TCL_LIGHT_SPOT_CUTOFF_D__SIZE 0x00000008 +#define NV10TCL_LIGHT_POSITION_X(x) (0x0000085c+((x)*128)) +#define NV10TCL_LIGHT_POSITION_X__SIZE 0x00000008 +#define NV10TCL_LIGHT_POSITION_Y(x) (0x00000860+((x)*128)) +#define NV10TCL_LIGHT_POSITION_Y__SIZE 0x00000008 +#define NV10TCL_LIGHT_POSITION_Z(x) (0x00000864+((x)*128)) +#define NV10TCL_LIGHT_POSITION_Z__SIZE 0x00000008 +#define NV10TCL_LIGHT_ATTENUATION_CONSTANT(x) (0x00000868+((x)*128)) +#define NV10TCL_LIGHT_ATTENUATION_CONSTANT__SIZE 0x00000008 +#define NV10TCL_LIGHT_ATTENUATION_LINEAR(x) (0x0000086c+((x)*128)) +#define NV10TCL_LIGHT_ATTENUATION_LINEAR__SIZE 0x00000008 +#define NV10TCL_LIGHT_ATTENUATION_QUADRATIC(x) (0x00000870+((x)*128)) +#define NV10TCL_LIGHT_ATTENUATION_QUADRATIC__SIZE 0x00000008 +#define NV10TCL_VERTEX_POS_3F_X 0x00000c00 +#define NV10TCL_VERTEX_POS_3F_Y 0x00000c04 +#define NV10TCL_VERTEX_POS_3F_Z 0x00000c08 +#define NV10TCL_VERTEX_POS_4F_X 0x00000c18 +#define NV10TCL_VERTEX_POS_4F_Y 0x00000c1c +#define NV10TCL_VERTEX_POS_4F_Z 0x00000c20 +#define NV10TCL_VERTEX_POS_4F_W 0x00000c24 +#define NV10TCL_VERTEX_NOR_3F_X 0x00000c30 +#define NV10TCL_VERTEX_NOR_3F_Y 0x00000c34 +#define NV10TCL_VERTEX_NOR_3F_Z 0x00000c38 +#define NV10TCL_VERTEX_NOR_3I_XY 0x00000c40 +#define NV10TCL_VERTEX_NOR_3I_XY_X_SHIFT 0 +#define NV10TCL_VERTEX_NOR_3I_XY_X_MASK 0x0000ffff +#define NV10TCL_VERTEX_NOR_3I_XY_Y_SHIFT 16 +#define NV10TCL_VERTEX_NOR_3I_XY_Y_MASK 0xffff0000 +#define NV10TCL_VERTEX_NOR_3I_Z 0x00000c44 +#define NV10TCL_VERTEX_NOR_3I_Z_Z_SHIFT 0 +#define NV10TCL_VERTEX_NOR_3I_Z_Z_MASK 0x0000ffff +#define NV10TCL_VERTEX_COL_4F_R 0x00000c50 +#define NV10TCL_VERTEX_COL_4F_G 0x00000c54 +#define NV10TCL_VERTEX_COL_4F_B 0x00000c58 +#define NV10TCL_VERTEX_COL_4F_A 0x00000c5c +#define NV10TCL_VERTEX_COL_3F_R 0x00000c60 +#define NV10TCL_VERTEX_COL_3F_G 0x00000c64 +#define NV10TCL_VERTEX_COL_3F_B 0x00000c68 +#define NV10TCL_VERTEX_COL_4I 0x00000c6c +#define NV10TCL_VERTEX_COL_4I_R_SHIFT 0 +#define NV10TCL_VERTEX_COL_4I_R_MASK 0x000000ff +#define NV10TCL_VERTEX_COL_4I_G_SHIFT 8 +#define NV10TCL_VERTEX_COL_4I_G_MASK 0x0000ff00 +#define NV10TCL_VERTEX_COL_4I_B_SHIFT 16 +#define NV10TCL_VERTEX_COL_4I_B_MASK 0x00ff0000 +#define NV10TCL_VERTEX_COL_4I_A_SHIFT 24 +#define NV10TCL_VERTEX_COL_4I_A_MASK 0xff000000 +#define NV10TCL_VERTEX_COL2_3F_R 0x00000c80 +#define NV10TCL_VERTEX_COL2_3F_G 0x00000c84 +#define NV10TCL_VERTEX_COL2_3F_B 0x00000c88 +#define NV10TCL_VERTEX_COL2_3I 0x00000c8c +#define NV10TCL_VERTEX_COL2_3I_R_SHIFT 0 +#define NV10TCL_VERTEX_COL2_3I_R_MASK 0x000000ff +#define NV10TCL_VERTEX_COL2_3I_G_SHIFT 8 +#define NV10TCL_VERTEX_COL2_3I_G_MASK 0x0000ff00 +#define NV10TCL_VERTEX_COL2_3I_B_SHIFT 16 +#define NV10TCL_VERTEX_COL2_3I_B_MASK 0x00ff0000 +#define NV10TCL_VERTEX_TX0_2F_S 0x00000c90 +#define NV10TCL_VERTEX_TX0_2F_T 0x00000c94 +#define NV10TCL_VERTEX_TX0_2I 0x00000c98 +#define NV10TCL_VERTEX_TX0_2I_S_SHIFT 0 +#define NV10TCL_VERTEX_TX0_2I_S_MASK 0x0000ffff +#define NV10TCL_VERTEX_TX0_2I_T_SHIFT 16 +#define NV10TCL_VERTEX_TX0_2I_T_MASK 0xffff0000 +#define NV10TCL_VERTEX_TX0_4F_S 0x00000ca0 +#define NV10TCL_VERTEX_TX0_4F_T 0x00000ca4 +#define NV10TCL_VERTEX_TX0_4F_R 0x00000ca8 +#define NV10TCL_VERTEX_TX0_4F_Q 0x00000cac +#define NV10TCL_VERTEX_TX0_4I_ST 0x00000cb0 +#define NV10TCL_VERTEX_TX0_4I_ST_S_SHIFT 0 +#define NV10TCL_VERTEX_TX0_4I_ST_S_MASK 0x0000ffff +#define NV10TCL_VERTEX_TX0_4I_ST_T_SHIFT 16 +#define NV10TCL_VERTEX_TX0_4I_ST_T_MASK 0xffff0000 +#define NV10TCL_VERTEX_TX0_4I_RQ 0x00000cb4 +#define NV10TCL_VERTEX_TX0_4I_RQ_R_SHIFT 0 +#define NV10TCL_VERTEX_TX0_4I_RQ_R_MASK 0x0000ffff +#define NV10TCL_VERTEX_TX0_4I_RQ_Q_SHIFT 16 +#define NV10TCL_VERTEX_TX0_4I_RQ_Q_MASK 0xffff0000 +#define NV10TCL_VERTEX_TX1_2F_S 0x00000cb8 +#define NV10TCL_VERTEX_TX1_2F_T 0x00000cbc +#define NV10TCL_VERTEX_TX1_2I 0x00000cc0 +#define NV10TCL_VERTEX_TX1_2I_S_SHIFT 0 +#define NV10TCL_VERTEX_TX1_2I_S_MASK 0x0000ffff +#define NV10TCL_VERTEX_TX1_2I_T_SHIFT 16 +#define NV10TCL_VERTEX_TX1_2I_T_MASK 0xffff0000 +#define NV10TCL_VERTEX_TX1_4F_S 0x00000cc8 +#define NV10TCL_VERTEX_TX1_4F_T 0x00000ccc +#define NV10TCL_VERTEX_TX1_4F_R 0x00000cd0 +#define NV10TCL_VERTEX_TX1_4F_Q 0x00000cd4 +#define NV10TCL_VERTEX_TX1_4I_ST 0x00000cd8 +#define NV10TCL_VERTEX_TX1_4I_ST_S_SHIFT 0 +#define NV10TCL_VERTEX_TX1_4I_ST_S_MASK 0x0000ffff +#define NV10TCL_VERTEX_TX1_4I_ST_T_SHIFT 16 +#define NV10TCL_VERTEX_TX1_4I_ST_T_MASK 0xffff0000 +#define NV10TCL_VERTEX_TX1_4I_RQ 0x00000cdc +#define NV10TCL_VERTEX_TX1_4I_RQ_R_SHIFT 0 +#define NV10TCL_VERTEX_TX1_4I_RQ_R_MASK 0x0000ffff +#define NV10TCL_VERTEX_TX1_4I_RQ_Q_SHIFT 16 +#define NV10TCL_VERTEX_TX1_4I_RQ_Q_MASK 0xffff0000 +#define NV10TCL_VERTEX_FOG_1F 0x00000ce0 +#define NV10TCL_VERTEX_WGH_1F 0x00000ce4 +#define NV10TCL_EDGEFLAG_ENABLE 0x00000cec +#define NV10TCL_VERTEX_ARRAY_VALIDATE 0x00000cf0 +#define NV10TCL_VTXBUF_ADDRESS(x) (0x00000d00+((x)*8)) +#define NV10TCL_VTXBUF_ADDRESS__SIZE 0x00000008 +#define NV10TCL_VTXFMT(x) (0x00000d04+((x)*8)) +#define NV10TCL_VTXFMT__SIZE 0x00000008 +#define NV10TCL_VTXFMT_TYPE_SHIFT 0 +#define NV10TCL_VTXFMT_TYPE_MASK 0x0000000f +#define NV10TCL_VTXFMT_TYPE_BYTE_BGRA 0x00000000 +#define NV10TCL_VTXFMT_TYPE_SHORT 0x00000001 +#define NV10TCL_VTXFMT_TYPE_FLOAT 0x00000002 +#define NV10TCL_VTXFMT_TYPE_BYTE_RGBA 0x00000004 +#define NV10TCL_VTXFMT_FIELDS_SHIFT 4 +#define NV10TCL_VTXFMT_FIELDS_MASK 0x000000f0 +#define NV10TCL_VTXFMT_STRIDE_SHIFT 8 +#define NV10TCL_VTXFMT_STRIDE_MASK 0x0000ff00 +#define NV10TCL_VTXFMT_POS_HOMOGENEOUS (1 << 24) +#define NV10TCL_VERTEX_BEGIN_END 0x00000dfc +#define NV10TCL_VERTEX_BEGIN_END_STOP 0x00000000 +#define NV10TCL_VERTEX_BEGIN_END_POINTS 0x00000001 +#define NV10TCL_VERTEX_BEGIN_END_LINES 0x00000002 +#define NV10TCL_VERTEX_BEGIN_END_LINE_LOOP 0x00000003 +#define NV10TCL_VERTEX_BEGIN_END_LINE_STRIP 0x00000004 +#define NV10TCL_VERTEX_BEGIN_END_TRIANGLES 0x00000005 +#define NV10TCL_VERTEX_BEGIN_END_TRIANGLE_STRIP 0x00000006 +#define NV10TCL_VERTEX_BEGIN_END_TRIANGLE_FAN 0x00000007 +#define NV10TCL_VERTEX_BEGIN_END_QUADS 0x00000008 +#define NV10TCL_VERTEX_BEGIN_END_QUAD_STRIP 0x00000009 +#define NV10TCL_VERTEX_BEGIN_END_POLYGON 0x0000000a +#define NV10TCL_VB_ELEMENT_U16 0x00000e00 +#define NV10TCL_VB_ELEMENT_U16_I0_SHIFT 0 +#define NV10TCL_VB_ELEMENT_U16_I0_MASK 0x0000ffff +#define NV10TCL_VB_ELEMENT_U16_I1_SHIFT 16 +#define NV10TCL_VB_ELEMENT_U16_I1_MASK 0xffff0000 +#define NV10TCL_VB_ELEMENT_U32 0x00001100 +#define NV10TCL_VERTEX_BUFFER_BEGIN_END 0x000013fc +#define NV10TCL_VERTEX_BUFFER_BEGIN_END_STOP 0x00000000 +#define NV10TCL_VERTEX_BUFFER_BEGIN_END_POINTS 0x00000001 +#define NV10TCL_VERTEX_BUFFER_BEGIN_END_LINES 0x00000002 +#define NV10TCL_VERTEX_BUFFER_BEGIN_END_LINE_LOOP 0x00000003 +#define NV10TCL_VERTEX_BUFFER_BEGIN_END_LINE_STRIP 0x00000004 +#define NV10TCL_VERTEX_BUFFER_BEGIN_END_TRIANGLES 0x00000005 +#define NV10TCL_VERTEX_BUFFER_BEGIN_END_TRIANGLE_STRIP 0x00000006 +#define NV10TCL_VERTEX_BUFFER_BEGIN_END_TRIANGLE_FAN 0x00000007 +#define NV10TCL_VERTEX_BUFFER_BEGIN_END_QUADS 0x00000008 +#define NV10TCL_VERTEX_BUFFER_BEGIN_END_QUAD_STRIP 0x00000009 +#define NV10TCL_VERTEX_BUFFER_BEGIN_END_POLYGON 0x0000000a +#define NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS 0x00001400 +#define NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS_FIRST_SHIFT 0 +#define NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS_FIRST_MASK 0x0000ffff +#define NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS_LAST_SHIFT 24 +#define NV10TCL_VERTEX_BUFFER_DRAW_ARRAYS_LAST_MASK 0xff000000 +#define NV10TCL_VERTEX_ARRAY_DATA 0x00001800 + + +#define NV11TCL 0x00000096 + +#define NV11TCL_COLOR_LOGIC_OP_ENABLE 0x00000d40 +#define NV11TCL_COLOR_LOGIC_OP_OP 0x00000d44 +#define NV11TCL_COLOR_LOGIC_OP_OP_CLEAR 0x00001500 +#define NV11TCL_COLOR_LOGIC_OP_OP_AND 0x00001501 +#define NV11TCL_COLOR_LOGIC_OP_OP_AND_REVERSE 0x00001502 +#define NV11TCL_COLOR_LOGIC_OP_OP_COPY 0x00001503 +#define NV11TCL_COLOR_LOGIC_OP_OP_AND_INVERTED 0x00001504 +#define NV11TCL_COLOR_LOGIC_OP_OP_NOOP 0x00001505 +#define NV11TCL_COLOR_LOGIC_OP_OP_XOR 0x00001506 +#define NV11TCL_COLOR_LOGIC_OP_OP_OR 0x00001507 +#define NV11TCL_COLOR_LOGIC_OP_OP_NOR 0x00001508 +#define NV11TCL_COLOR_LOGIC_OP_OP_EQUIV 0x00001509 +#define NV11TCL_COLOR_LOGIC_OP_OP_INVERT 0x0000150a +#define NV11TCL_COLOR_LOGIC_OP_OP_OR_REVERSE 0x0000150b +#define NV11TCL_COLOR_LOGIC_OP_OP_COPY_INVERTED 0x0000150c +#define NV11TCL_COLOR_LOGIC_OP_OP_OR_INVERTED 0x0000150d +#define NV11TCL_COLOR_LOGIC_OP_OP_NAND 0x0000150e +#define NV11TCL_COLOR_LOGIC_OP_OP_SET 0x0000150f + + +#define NV17TCL 0x00000099 + +#define NV17TCL_DMA_IN_MEMORY4 0x000001ac +#define NV17TCL_DMA_IN_MEMORY5 0x000001b0 +#define NV17TCL_COLOR_MASK_ENABLE 0x000002bc +#define NV17TCL_LMA_DEPTH_BUFFER_PITCH 0x00000d5c +#define NV17TCL_LMA_DEPTH_BUFFER_OFFSET 0x00000d60 +#define NV17TCL_LMA_DEPTH_FILL_VALUE 0x00000d68 +#define NV17TCL_LMA_DEPTH_BUFFER_CLEAR 0x00000d6c +#define NV17TCL_LMA_DEPTH_WINDOW_X 0x00001638 +#define NV17TCL_LMA_DEPTH_WINDOW_Y 0x0000163c +#define NV17TCL_LMA_DEPTH_WINDOW_Z 0x00001640 +#define NV17TCL_LMA_DEPTH_WINDOW_W 0x00001644 +#define NV17TCL_LMA_DEPTH_ENABLE 0x00001658 + + +#define NV03_CONTEXT_SURFACES_2D 0x00000058 + +#define NV03_CONTEXT_SURFACES_2D_SYNCHRONIZE 0x00000100 +#define NV03_CONTEXT_SURFACES_2D_DMA_NOTIFY 0x00000180 +#define NV03_CONTEXT_SURFACES_2D_DMA_SOURCE 0x00000184 +#define NV03_CONTEXT_SURFACES_2D_DMA_DESTIN 0x00000188 +#define NV03_CONTEXT_SURFACES_2D_COLOR_FORMAT 0x00000300 +#define NV03_CONTEXT_SURFACES_2D_PITCH 0x00000304 +#define NV03_CONTEXT_SURFACES_2D_PITCH_SOURCE_SHIFT 0 +#define NV03_CONTEXT_SURFACES_2D_PITCH_SOURCE_MASK 0x0000ffff +#define NV03_CONTEXT_SURFACES_2D_PITCH_DESTIN_SHIFT 16 +#define NV03_CONTEXT_SURFACES_2D_PITCH_DESTIN_MASK 0xffff0000 +#define NV03_CONTEXT_SURFACES_2D_OFFSET_SOURCE 0x00000308 +#define NV03_CONTEXT_SURFACES_2D_OFFSET_DESTIN 0x0000030c + + +#define NV03_CONTEXT_SURFACES_3D 0x0000005a + +#define NV03_CONTEXT_SURFACES_3D_SYNCHRONIZE 0x00000100 +#define NV03_CONTEXT_SURFACES_3D_DMA_NOTIFY 0x00000180 +#define NV03_CONTEXT_SURFACES_3D_DMA_SURFACE 0x00000184 +#define NV03_CONTEXT_SURFACES_3D_PITCH 0x00000300 +#define NV03_CONTEXT_SURFACES_3D_OFFSET_COLOR 0x00000304 +#define NV03_CONTEXT_SURFACES_3D_OFFSET_ZETA 0x00000308 + + +#define NV04_INDEXED_IMAGE_FROM_CPU 0x00000060 + +#define NV04_INDEXED_IMAGE_FROM_CPU_NOP 0x00000100 +#define NV04_INDEXED_IMAGE_FROM_CPU_NOTIFY 0x00000104 +#define NV04_INDEXED_IMAGE_FROM_CPU_PATCH 0x0000010c +#define NV04_INDEXED_IMAGE_FROM_CPU_DMA_NOTIFY 0x00000180 +#define NV04_INDEXED_IMAGE_FROM_CPU_DMA_LUT 0x00000184 +#define NV04_INDEXED_IMAGE_FROM_CPU_COLOR_KEY 0x00000188 +#define NV04_INDEXED_IMAGE_FROM_CPU_CLIP_RECTANGLE 0x0000018c +#define NV04_INDEXED_IMAGE_FROM_CPU_PATTERN 0x00000190 +#define NV04_INDEXED_IMAGE_FROM_CPU_ROP 0x00000194 +#define NV04_INDEXED_IMAGE_FROM_CPU_BETA1 0x00000198 +#define NV04_INDEXED_IMAGE_FROM_CPU_BETA4 0x0000019c +#define NV04_INDEXED_IMAGE_FROM_CPU_SURFACE 0x000001a0 +#define NV04_INDEXED_IMAGE_FROM_CPU_OPERATION 0x000003e4 +#define NV04_INDEXED_IMAGE_FROM_CPU_COLOR_FORMAT 0x000003e8 +#define NV04_INDEXED_IMAGE_FROM_CPU_INDEX_FORMAT 0x000003ec +#define NV04_INDEXED_IMAGE_FROM_CPU_LUT_OFFSET 0x000003f0 +#define NV04_INDEXED_IMAGE_FROM_CPU_POINT 0x000003f4 +#define NV04_INDEXED_IMAGE_FROM_CPU_SIZE_OUT 0x000003f8 +#define NV04_INDEXED_IMAGE_FROM_CPU_SIZE_IN 0x000003fc +#define NV04_INDEXED_IMAGE_FROM_CPU_COLOR(x) (0x00000400+((x)*4)) +#define NV04_INDEXED_IMAGE_FROM_CPU_COLOR__SIZE 0x00000700 + + +#define NV05_INDEXED_IMAGE_FROM_CPU 0x00000064 + +#define NV05_INDEXED_IMAGE_FROM_CPU_COLOR_CONVERSION 0x000003e0 + + +#define NV03_CHANNEL_PIO 0x0000006a + + + +#define NV03_CHANNEL_DMA 0x0000006b + + + +#define NV04_BETA_SOLID 0x00000072 + +#define NV04_BETA_SOLID_NOP 0x00000100 +#define NV04_BETA_SOLID_NOTIFY 0x00000104 +#define NV04_BETA_SOLID_DMA_NOTIFY 0x00000180 +#define NV04_BETA_SOLID_BETA_OUTPUT 0x00000200 +#define NV04_BETA_SOLID_BETA_FACTOR 0x00000300 + + +#define NV10_TEXTURE_FROM_CPU 0x0000007b + +#define NV10_TEXTURE_FROM_CPU_NOP 0x00000100 +#define NV10_TEXTURE_FROM_CPU_NOTIFY 0x00000104 +#define NV10_TEXTURE_FROM_CPU_WAIT_FOR_IDLE 0x00000108 +#define NV10_TEXTURE_FROM_CPU_PM_TRIGGER 0x00000140 +#define NV10_TEXTURE_FROM_CPU_DMA_NOTIFY 0x00000180 +#define NV10_TEXTURE_FROM_CPU_SURFACE 0x00000184 +#define NV10_TEXTURE_FROM_CPU_COLOR_FORMAT 0x00000300 +#define NV10_TEXTURE_FROM_CPU_POINT 0x00000304 +#define NV10_TEXTURE_FROM_CPU_POINT_X_SHIFT 0 +#define NV10_TEXTURE_FROM_CPU_POINT_X_MASK 0x0000ffff +#define NV10_TEXTURE_FROM_CPU_POINT_Y_SHIFT 16 +#define NV10_TEXTURE_FROM_CPU_POINT_Y_MASK 0xffff0000 +#define NV10_TEXTURE_FROM_CPU_SIZE 0x00000308 +#define NV10_TEXTURE_FROM_CPU_SIZE_W_SHIFT 0 +#define NV10_TEXTURE_FROM_CPU_SIZE_W_MASK 0x0000ffff +#define NV10_TEXTURE_FROM_CPU_SIZE_H_SHIFT 16 +#define NV10_TEXTURE_FROM_CPU_SIZE_H_MASK 0xffff0000 +#define NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL 0x0000030c +#define NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL_X_SHIFT 0 +#define NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL_X_MASK 0x0000ffff +#define NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL_W_SHIFT 16 +#define NV10_TEXTURE_FROM_CPU_CLIP_HORIZONTAL_W_MASK 0xffff0000 +#define NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL 0x00000310 +#define NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL_Y_SHIFT 0 +#define NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL_Y_MASK 0x0000ffff +#define NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL_H_SHIFT 16 +#define NV10_TEXTURE_FROM_CPU_CLIP_VERTICAL_H_MASK 0xffff0000 +#define NV10_TEXTURE_FROM_CPU_COLOR(x) (0x00000400+((x)*4)) +#define NV10_TEXTURE_FROM_CPU_COLOR__SIZE 0x00000700 + + +#define NV30_TEXTURE_FROM_CPU 0x0000037b + + + +#define NV40_TEXTURE_FROM_CPU 0x0000307b + + + +#define NV10_VIDEO_DISPLAY 0x0000007c + + + +#define NV20TCL 0x00000097 + +#define NV20TCL_NOP 0x00000100 +#define NV20TCL_NOTIFY 0x00000104 +#define NV20TCL_DMA_NOTIFY 0x00000180 +#define NV20TCL_DMA_TEXTURE0 0x00000184 +#define NV20TCL_DMA_TEXTURE1 0x00000188 +#define NV20TCL_DMA_COLOR 0x00000194 +#define NV20TCL_DMA_ZETA 0x00000198 +#define NV20TCL_DMA_VTXBUF0 0x0000019c +#define NV20TCL_DMA_VTXBUF1 0x000001a0 +#define NV20TCL_DMA_FENCE 0x000001a4 +#define NV20TCL_DMA_QUERY 0x000001a8 +#define NV20TCL_RT_HORIZ 0x00000200 +#define NV20TCL_RT_HORIZ_X_SHIFT 0 +#define NV20TCL_RT_HORIZ_X_MASK 0x0000ffff +#define NV20TCL_RT_HORIZ_W_SHIFT 16 +#define NV20TCL_RT_HORIZ_W_MASK 0xffff0000 +#define NV20TCL_RT_VERT 0x00000204 +#define NV20TCL_RT_VERT_Y_SHIFT 0 +#define NV20TCL_RT_VERT_Y_MASK 0x0000ffff +#define NV20TCL_RT_VERT_H_SHIFT 16 +#define NV20TCL_RT_VERT_H_MASK 0xffff0000 +#define NV20TCL_RT_FORMAT 0x00000208 +#define NV20TCL_RT_FORMAT_TYPE_SHIFT 8 +#define NV20TCL_RT_FORMAT_TYPE_MASK 0x00000f00 +#define NV20TCL_RT_FORMAT_TYPE_LINEAR 0x00000100 +#define NV20TCL_RT_FORMAT_TYPE_SWIZZLED 0x00000200 +#define NV20TCL_RT_FORMAT_COLOR_SHIFT 0 +#define NV20TCL_RT_FORMAT_COLOR_MASK 0x0000001f +#define NV20TCL_RT_FORMAT_COLOR_R5G6B5 0x00000003 +#define NV20TCL_RT_FORMAT_COLOR_X8R8G8B8 0x00000005 +#define NV20TCL_RT_FORMAT_COLOR_A8R8G8B8 0x00000008 +#define NV20TCL_RT_FORMAT_COLOR_B8 0x00000009 +#define NV20TCL_RT_FORMAT_COLOR_UNKNOWN 0x0000000d +#define NV20TCL_RT_FORMAT_COLOR_X8B8G8R8 0x0000000f +#define NV20TCL_RT_FORMAT_COLOR_A8B8G8R8 0x00000010 +#define NV20TCL_RT_PITCH 0x0000020c +#define NV20TCL_RT_PITCH_COLOR_PITCH_SHIFT 0 +#define NV20TCL_RT_PITCH_COLOR_PITCH_MASK 0x0000ffff +#define NV20TCL_RT_PITCH_ZETA_PITCH_SHIFT 16 +#define NV20TCL_RT_PITCH_ZETA_PITCH_MASK 0xffff0000 +#define NV20TCL_COLOR_OFFSET 0x00000210 +#define NV20TCL_ZETA_OFFSET 0x00000214 +#define NV20TCL_RC_IN_ALPHA(x) (0x00000260+((x)*4)) +#define NV20TCL_RC_IN_ALPHA__SIZE 0x00000008 +#define NV20TCL_RC_IN_ALPHA_D_INPUT_SHIFT 0 +#define NV20TCL_RC_IN_ALPHA_D_INPUT_MASK 0x0000000f +#define NV20TCL_RC_IN_ALPHA_D_INPUT_ZERO 0x00000000 +#define NV20TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR0 0x00000001 +#define NV20TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR1 0x00000002 +#define NV20TCL_RC_IN_ALPHA_D_INPUT_FOG 0x00000003 +#define NV20TCL_RC_IN_ALPHA_D_INPUT_PRIMARY_COLOR 0x00000004 +#define NV20TCL_RC_IN_ALPHA_D_INPUT_SECONDARY_COLOR 0x00000005 +#define NV20TCL_RC_IN_ALPHA_D_INPUT_TEXTURE0 0x00000008 +#define NV20TCL_RC_IN_ALPHA_D_INPUT_TEXTURE1 0x00000009 +#define NV20TCL_RC_IN_ALPHA_D_INPUT_SPARE0 0x0000000c +#define NV20TCL_RC_IN_ALPHA_D_INPUT_SPARE1 0x0000000d +#define NV20TCL_RC_IN_ALPHA_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0000000e +#define NV20TCL_RC_IN_ALPHA_D_INPUT_E_TIMES_F 0x0000000f +#define NV20TCL_RC_IN_ALPHA_D_INPUT_TEXTURE2 0x0000000a +#define NV20TCL_RC_IN_ALPHA_D_INPUT_TEXTURE3 0x0000000b +#define NV20TCL_RC_IN_ALPHA_D_COMPONENT_USAGE (1 << 4) +#define NV20TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_BLUE 0x00000000 +#define NV20TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_ALPHA 0x00000010 +#define NV20TCL_RC_IN_ALPHA_D_MAPPING_SHIFT 5 +#define NV20TCL_RC_IN_ALPHA_D_MAPPING_MASK 0x000000e0 +#define NV20TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV20TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_INVERT 0x00000020 +#define NV20TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NORMAL 0x00000040 +#define NV20TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NEGATE 0x00000060 +#define NV20TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NORMAL 0x00000080 +#define NV20TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NEGATE 0x000000a0 +#define NV20TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_IDENTITY 0x000000c0 +#define NV20TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_NEGATE 0x000000e0 +#define NV20TCL_RC_IN_ALPHA_C_INPUT_SHIFT 8 +#define NV20TCL_RC_IN_ALPHA_C_INPUT_MASK 0x00000f00 +#define NV20TCL_RC_IN_ALPHA_C_INPUT_ZERO 0x00000000 +#define NV20TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR0 0x00000100 +#define NV20TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR1 0x00000200 +#define NV20TCL_RC_IN_ALPHA_C_INPUT_FOG 0x00000300 +#define NV20TCL_RC_IN_ALPHA_C_INPUT_PRIMARY_COLOR 0x00000400 +#define NV20TCL_RC_IN_ALPHA_C_INPUT_SECONDARY_COLOR 0x00000500 +#define NV20TCL_RC_IN_ALPHA_C_INPUT_TEXTURE0 0x00000800 +#define NV20TCL_RC_IN_ALPHA_C_INPUT_TEXTURE1 0x00000900 +#define NV20TCL_RC_IN_ALPHA_C_INPUT_SPARE0 0x00000c00 +#define NV20TCL_RC_IN_ALPHA_C_INPUT_SPARE1 0x00000d00 +#define NV20TCL_RC_IN_ALPHA_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV20TCL_RC_IN_ALPHA_C_INPUT_E_TIMES_F 0x00000f00 +#define NV20TCL_RC_IN_ALPHA_C_INPUT_TEXTURE2 0x00000a00 +#define NV20TCL_RC_IN_ALPHA_C_INPUT_TEXTURE3 0x00000b00 +#define NV20TCL_RC_IN_ALPHA_C_COMPONENT_USAGE (1 << 12) +#define NV20TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_BLUE 0x00000000 +#define NV20TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_ALPHA 0x00001000 +#define NV20TCL_RC_IN_ALPHA_C_MAPPING_SHIFT 13 +#define NV20TCL_RC_IN_ALPHA_C_MAPPING_MASK 0x0000e000 +#define NV20TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV20TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_INVERT 0x00002000 +#define NV20TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NORMAL 0x00004000 +#define NV20TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NEGATE 0x00006000 +#define NV20TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NORMAL 0x00008000 +#define NV20TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NEGATE 0x0000a000 +#define NV20TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_IDENTITY 0x0000c000 +#define NV20TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_NEGATE 0x0000e000 +#define NV20TCL_RC_IN_ALPHA_B_INPUT_SHIFT 16 +#define NV20TCL_RC_IN_ALPHA_B_INPUT_MASK 0x000f0000 +#define NV20TCL_RC_IN_ALPHA_B_INPUT_ZERO 0x00000000 +#define NV20TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR0 0x00010000 +#define NV20TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR1 0x00020000 +#define NV20TCL_RC_IN_ALPHA_B_INPUT_FOG 0x00030000 +#define NV20TCL_RC_IN_ALPHA_B_INPUT_PRIMARY_COLOR 0x00040000 +#define NV20TCL_RC_IN_ALPHA_B_INPUT_SECONDARY_COLOR 0x00050000 +#define NV20TCL_RC_IN_ALPHA_B_INPUT_TEXTURE0 0x00080000 +#define NV20TCL_RC_IN_ALPHA_B_INPUT_TEXTURE1 0x00090000 +#define NV20TCL_RC_IN_ALPHA_B_INPUT_SPARE0 0x000c0000 +#define NV20TCL_RC_IN_ALPHA_B_INPUT_SPARE1 0x000d0000 +#define NV20TCL_RC_IN_ALPHA_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000e0000 +#define NV20TCL_RC_IN_ALPHA_B_INPUT_E_TIMES_F 0x000f0000 +#define NV20TCL_RC_IN_ALPHA_B_INPUT_TEXTURE2 0x000a0000 +#define NV20TCL_RC_IN_ALPHA_B_INPUT_TEXTURE3 0x000b0000 +#define NV20TCL_RC_IN_ALPHA_B_COMPONENT_USAGE (1 << 20) +#define NV20TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_BLUE 0x00000000 +#define NV20TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_ALPHA 0x00100000 +#define NV20TCL_RC_IN_ALPHA_B_MAPPING_SHIFT 21 +#define NV20TCL_RC_IN_ALPHA_B_MAPPING_MASK 0x00e00000 +#define NV20TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV20TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_INVERT 0x00200000 +#define NV20TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NORMAL 0x00400000 +#define NV20TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NEGATE 0x00600000 +#define NV20TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NORMAL 0x00800000 +#define NV20TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NEGATE 0x00a00000 +#define NV20TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_IDENTITY 0x00c00000 +#define NV20TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_NEGATE 0x00e00000 +#define NV20TCL_RC_IN_ALPHA_A_INPUT_SHIFT 24 +#define NV20TCL_RC_IN_ALPHA_A_INPUT_MASK 0x0f000000 +#define NV20TCL_RC_IN_ALPHA_A_INPUT_ZERO 0x00000000 +#define NV20TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR0 0x01000000 +#define NV20TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR1 0x02000000 +#define NV20TCL_RC_IN_ALPHA_A_INPUT_FOG 0x03000000 +#define NV20TCL_RC_IN_ALPHA_A_INPUT_PRIMARY_COLOR 0x04000000 +#define NV20TCL_RC_IN_ALPHA_A_INPUT_SECONDARY_COLOR 0x05000000 +#define NV20TCL_RC_IN_ALPHA_A_INPUT_TEXTURE0 0x08000000 +#define NV20TCL_RC_IN_ALPHA_A_INPUT_TEXTURE1 0x09000000 +#define NV20TCL_RC_IN_ALPHA_A_INPUT_SPARE0 0x0c000000 +#define NV20TCL_RC_IN_ALPHA_A_INPUT_SPARE1 0x0d000000 +#define NV20TCL_RC_IN_ALPHA_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0e000000 +#define NV20TCL_RC_IN_ALPHA_A_INPUT_E_TIMES_F 0x0f000000 +#define NV20TCL_RC_IN_ALPHA_A_INPUT_TEXTURE2 0x0a000000 +#define NV20TCL_RC_IN_ALPHA_A_INPUT_TEXTURE3 0x0b000000 +#define NV20TCL_RC_IN_ALPHA_A_COMPONENT_USAGE (1 << 28) +#define NV20TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_BLUE 0x00000000 +#define NV20TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_ALPHA 0x10000000 +#define NV20TCL_RC_IN_ALPHA_A_MAPPING_SHIFT 29 +#define NV20TCL_RC_IN_ALPHA_A_MAPPING_MASK 0xe0000000 +#define NV20TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV20TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_INVERT 0x20000000 +#define NV20TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NORMAL 0x40000000 +#define NV20TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NEGATE 0x60000000 +#define NV20TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NORMAL 0x80000000 +#define NV20TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NEGATE 0xa0000000 +#define NV20TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_IDENTITY 0xc0000000 +#define NV20TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_NEGATE 0xe0000000 +#define NV20TCL_RC_FINAL0 0x00000288 +#define NV20TCL_RC_FINAL0_D_INPUT_SHIFT 0 +#define NV20TCL_RC_FINAL0_D_INPUT_MASK 0x0000000f +#define NV20TCL_RC_FINAL0_D_INPUT_ZERO 0x00000000 +#define NV20TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR0 0x00000001 +#define NV20TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR1 0x00000002 +#define NV20TCL_RC_FINAL0_D_INPUT_FOG 0x00000003 +#define NV20TCL_RC_FINAL0_D_INPUT_PRIMARY_COLOR 0x00000004 +#define NV20TCL_RC_FINAL0_D_INPUT_SECONDARY_COLOR 0x00000005 +#define NV20TCL_RC_FINAL0_D_INPUT_TEXTURE0 0x00000008 +#define NV20TCL_RC_FINAL0_D_INPUT_TEXTURE1 0x00000009 +#define NV20TCL_RC_FINAL0_D_INPUT_SPARE0 0x0000000c +#define NV20TCL_RC_FINAL0_D_INPUT_SPARE1 0x0000000d +#define NV20TCL_RC_FINAL0_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0000000e +#define NV20TCL_RC_FINAL0_D_INPUT_E_TIMES_F 0x0000000f +#define NV20TCL_RC_FINAL0_D_INPUT_TEXTURE2 0x0000000a +#define NV20TCL_RC_FINAL0_D_INPUT_TEXTURE3 0x0000000b +#define NV20TCL_RC_FINAL0_D_COMPONENT_USAGE (1 << 4) +#define NV20TCL_RC_FINAL0_D_COMPONENT_USAGE_RGB 0x00000000 +#define NV20TCL_RC_FINAL0_D_COMPONENT_USAGE_ALPHA 0x00000010 +#define NV20TCL_RC_FINAL0_D_MAPPING_SHIFT 5 +#define NV20TCL_RC_FINAL0_D_MAPPING_MASK 0x000000e0 +#define NV20TCL_RC_FINAL0_D_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV20TCL_RC_FINAL0_D_MAPPING_UNSIGNED_INVERT 0x00000020 +#define NV20TCL_RC_FINAL0_D_MAPPING_EXPAND_NORMAL 0x00000040 +#define NV20TCL_RC_FINAL0_D_MAPPING_EXPAND_NEGATE 0x00000060 +#define NV20TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NORMAL 0x00000080 +#define NV20TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NEGATE 0x000000a0 +#define NV20TCL_RC_FINAL0_D_MAPPING_SIGNED_IDENTITY 0x000000c0 +#define NV20TCL_RC_FINAL0_D_MAPPING_SIGNED_NEGATE 0x000000e0 +#define NV20TCL_RC_FINAL0_C_INPUT_SHIFT 8 +#define NV20TCL_RC_FINAL0_C_INPUT_MASK 0x00000f00 +#define NV20TCL_RC_FINAL0_C_INPUT_ZERO 0x00000000 +#define NV20TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR0 0x00000100 +#define NV20TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR1 0x00000200 +#define NV20TCL_RC_FINAL0_C_INPUT_FOG 0x00000300 +#define NV20TCL_RC_FINAL0_C_INPUT_PRIMARY_COLOR 0x00000400 +#define NV20TCL_RC_FINAL0_C_INPUT_SECONDARY_COLOR 0x00000500 +#define NV20TCL_RC_FINAL0_C_INPUT_TEXTURE0 0x00000800 +#define NV20TCL_RC_FINAL0_C_INPUT_TEXTURE1 0x00000900 +#define NV20TCL_RC_FINAL0_C_INPUT_SPARE0 0x00000c00 +#define NV20TCL_RC_FINAL0_C_INPUT_SPARE1 0x00000d00 +#define NV20TCL_RC_FINAL0_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV20TCL_RC_FINAL0_C_INPUT_E_TIMES_F 0x00000f00 +#define NV20TCL_RC_FINAL0_C_INPUT_TEXTURE2 0x00000a00 +#define NV20TCL_RC_FINAL0_C_INPUT_TEXTURE3 0x00000b00 +#define NV20TCL_RC_FINAL0_C_COMPONENT_USAGE (1 << 12) +#define NV20TCL_RC_FINAL0_C_COMPONENT_USAGE_RGB 0x00000000 +#define NV20TCL_RC_FINAL0_C_COMPONENT_USAGE_ALPHA 0x00001000 +#define NV20TCL_RC_FINAL0_C_MAPPING_SHIFT 13 +#define NV20TCL_RC_FINAL0_C_MAPPING_MASK 0x0000e000 +#define NV20TCL_RC_FINAL0_C_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV20TCL_RC_FINAL0_C_MAPPING_UNSIGNED_INVERT 0x00002000 +#define NV20TCL_RC_FINAL0_C_MAPPING_EXPAND_NORMAL 0x00004000 +#define NV20TCL_RC_FINAL0_C_MAPPING_EXPAND_NEGATE 0x00006000 +#define NV20TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NORMAL 0x00008000 +#define NV20TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NEGATE 0x0000a000 +#define NV20TCL_RC_FINAL0_C_MAPPING_SIGNED_IDENTITY 0x0000c000 +#define NV20TCL_RC_FINAL0_C_MAPPING_SIGNED_NEGATE 0x0000e000 +#define NV20TCL_RC_FINAL0_B_INPUT_SHIFT 16 +#define NV20TCL_RC_FINAL0_B_INPUT_MASK 0x000f0000 +#define NV20TCL_RC_FINAL0_B_INPUT_ZERO 0x00000000 +#define NV20TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR0 0x00010000 +#define NV20TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR1 0x00020000 +#define NV20TCL_RC_FINAL0_B_INPUT_FOG 0x00030000 +#define NV20TCL_RC_FINAL0_B_INPUT_PRIMARY_COLOR 0x00040000 +#define NV20TCL_RC_FINAL0_B_INPUT_SECONDARY_COLOR 0x00050000 +#define NV20TCL_RC_FINAL0_B_INPUT_TEXTURE0 0x00080000 +#define NV20TCL_RC_FINAL0_B_INPUT_TEXTURE1 0x00090000 +#define NV20TCL_RC_FINAL0_B_INPUT_SPARE0 0x000c0000 +#define NV20TCL_RC_FINAL0_B_INPUT_SPARE1 0x000d0000 +#define NV20TCL_RC_FINAL0_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000e0000 +#define NV20TCL_RC_FINAL0_B_INPUT_E_TIMES_F 0x000f0000 +#define NV20TCL_RC_FINAL0_B_INPUT_TEXTURE2 0x000a0000 +#define NV20TCL_RC_FINAL0_B_INPUT_TEXTURE3 0x000b0000 +#define NV20TCL_RC_FINAL0_B_COMPONENT_USAGE (1 << 20) +#define NV20TCL_RC_FINAL0_B_COMPONENT_USAGE_RGB 0x00000000 +#define NV20TCL_RC_FINAL0_B_COMPONENT_USAGE_ALPHA 0x00100000 +#define NV20TCL_RC_FINAL0_B_MAPPING_SHIFT 21 +#define NV20TCL_RC_FINAL0_B_MAPPING_MASK 0x00e00000 +#define NV20TCL_RC_FINAL0_B_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV20TCL_RC_FINAL0_B_MAPPING_UNSIGNED_INVERT 0x00200000 +#define NV20TCL_RC_FINAL0_B_MAPPING_EXPAND_NORMAL 0x00400000 +#define NV20TCL_RC_FINAL0_B_MAPPING_EXPAND_NEGATE 0x00600000 +#define NV20TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NORMAL 0x00800000 +#define NV20TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NEGATE 0x00a00000 +#define NV20TCL_RC_FINAL0_B_MAPPING_SIGNED_IDENTITY 0x00c00000 +#define NV20TCL_RC_FINAL0_B_MAPPING_SIGNED_NEGATE 0x00e00000 +#define NV20TCL_RC_FINAL0_A_INPUT_SHIFT 24 +#define NV20TCL_RC_FINAL0_A_INPUT_MASK 0x0f000000 +#define NV20TCL_RC_FINAL0_A_INPUT_ZERO 0x00000000 +#define NV20TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR0 0x01000000 +#define NV20TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR1 0x02000000 +#define NV20TCL_RC_FINAL0_A_INPUT_FOG 0x03000000 +#define NV20TCL_RC_FINAL0_A_INPUT_PRIMARY_COLOR 0x04000000 +#define NV20TCL_RC_FINAL0_A_INPUT_SECONDARY_COLOR 0x05000000 +#define NV20TCL_RC_FINAL0_A_INPUT_TEXTURE0 0x08000000 +#define NV20TCL_RC_FINAL0_A_INPUT_TEXTURE1 0x09000000 +#define NV20TCL_RC_FINAL0_A_INPUT_SPARE0 0x0c000000 +#define NV20TCL_RC_FINAL0_A_INPUT_SPARE1 0x0d000000 +#define NV20TCL_RC_FINAL0_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0e000000 +#define NV20TCL_RC_FINAL0_A_INPUT_E_TIMES_F 0x0f000000 +#define NV20TCL_RC_FINAL0_A_INPUT_TEXTURE2 0x0a000000 +#define NV20TCL_RC_FINAL0_A_INPUT_TEXTURE3 0x0b000000 +#define NV20TCL_RC_FINAL0_A_COMPONENT_USAGE (1 << 28) +#define NV20TCL_RC_FINAL0_A_COMPONENT_USAGE_RGB 0x00000000 +#define NV20TCL_RC_FINAL0_A_COMPONENT_USAGE_ALPHA 0x10000000 +#define NV20TCL_RC_FINAL0_A_MAPPING_SHIFT 29 +#define NV20TCL_RC_FINAL0_A_MAPPING_MASK 0xe0000000 +#define NV20TCL_RC_FINAL0_A_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV20TCL_RC_FINAL0_A_MAPPING_UNSIGNED_INVERT 0x20000000 +#define NV20TCL_RC_FINAL0_A_MAPPING_EXPAND_NORMAL 0x40000000 +#define NV20TCL_RC_FINAL0_A_MAPPING_EXPAND_NEGATE 0x60000000 +#define NV20TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NORMAL 0x80000000 +#define NV20TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NEGATE 0xa0000000 +#define NV20TCL_RC_FINAL0_A_MAPPING_SIGNED_IDENTITY 0xc0000000 +#define NV20TCL_RC_FINAL0_A_MAPPING_SIGNED_NEGATE 0xe0000000 +#define NV20TCL_RC_FINAL1 0x0000028c +#define NV20TCL_RC_FINAL1_COLOR_SUM_CLAMP (1 << 7) +#define NV20TCL_RC_FINAL1_G_INPUT_SHIFT 8 +#define NV20TCL_RC_FINAL1_G_INPUT_MASK 0x00000f00 +#define NV20TCL_RC_FINAL1_G_INPUT_ZERO 0x00000000 +#define NV20TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR0 0x00000100 +#define NV20TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR1 0x00000200 +#define NV20TCL_RC_FINAL1_G_INPUT_FOG 0x00000300 +#define NV20TCL_RC_FINAL1_G_INPUT_PRIMARY_COLOR 0x00000400 +#define NV20TCL_RC_FINAL1_G_INPUT_SECONDARY_COLOR 0x00000500 +#define NV20TCL_RC_FINAL1_G_INPUT_TEXTURE0 0x00000800 +#define NV20TCL_RC_FINAL1_G_INPUT_TEXTURE1 0x00000900 +#define NV20TCL_RC_FINAL1_G_INPUT_SPARE0 0x00000c00 +#define NV20TCL_RC_FINAL1_G_INPUT_SPARE1 0x00000d00 +#define NV20TCL_RC_FINAL1_G_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV20TCL_RC_FINAL1_G_INPUT_E_TIMES_F 0x00000f00 +#define NV20TCL_RC_FINAL1_G_INPUT_TEXTURE2 0x00000a00 +#define NV20TCL_RC_FINAL1_G_INPUT_TEXTURE3 0x00000b00 +#define NV20TCL_RC_FINAL1_G_COMPONENT_USAGE (1 << 12) +#define NV20TCL_RC_FINAL1_G_COMPONENT_USAGE_RGB 0x00000000 +#define NV20TCL_RC_FINAL1_G_COMPONENT_USAGE_ALPHA 0x00001000 +#define NV20TCL_RC_FINAL1_G_MAPPING_SHIFT 13 +#define NV20TCL_RC_FINAL1_G_MAPPING_MASK 0x0000e000 +#define NV20TCL_RC_FINAL1_G_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV20TCL_RC_FINAL1_G_MAPPING_UNSIGNED_INVERT 0x00002000 +#define NV20TCL_RC_FINAL1_G_MAPPING_EXPAND_NORMAL 0x00004000 +#define NV20TCL_RC_FINAL1_G_MAPPING_EXPAND_NEGATE 0x00006000 +#define NV20TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NORMAL 0x00008000 +#define NV20TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NEGATE 0x0000a000 +#define NV20TCL_RC_FINAL1_G_MAPPING_SIGNED_IDENTITY 0x0000c000 +#define NV20TCL_RC_FINAL1_G_MAPPING_SIGNED_NEGATE 0x0000e000 +#define NV20TCL_RC_FINAL1_F_INPUT_SHIFT 16 +#define NV20TCL_RC_FINAL1_F_INPUT_MASK 0x000f0000 +#define NV20TCL_RC_FINAL1_F_INPUT_ZERO 0x00000000 +#define NV20TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR0 0x00010000 +#define NV20TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR1 0x00020000 +#define NV20TCL_RC_FINAL1_F_INPUT_FOG 0x00030000 +#define NV20TCL_RC_FINAL1_F_INPUT_PRIMARY_COLOR 0x00040000 +#define NV20TCL_RC_FINAL1_F_INPUT_SECONDARY_COLOR 0x00050000 +#define NV20TCL_RC_FINAL1_F_INPUT_TEXTURE0 0x00080000 +#define NV20TCL_RC_FINAL1_F_INPUT_TEXTURE1 0x00090000 +#define NV20TCL_RC_FINAL1_F_INPUT_SPARE0 0x000c0000 +#define NV20TCL_RC_FINAL1_F_INPUT_SPARE1 0x000d0000 +#define NV20TCL_RC_FINAL1_F_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000e0000 +#define NV20TCL_RC_FINAL1_F_INPUT_E_TIMES_F 0x000f0000 +#define NV20TCL_RC_FINAL1_F_INPUT_TEXTURE2 0x000a0000 +#define NV20TCL_RC_FINAL1_F_INPUT_TEXTURE3 0x000b0000 +#define NV20TCL_RC_FINAL1_F_COMPONENT_USAGE (1 << 20) +#define NV20TCL_RC_FINAL1_F_COMPONENT_USAGE_RGB 0x00000000 +#define NV20TCL_RC_FINAL1_F_COMPONENT_USAGE_ALPHA 0x00100000 +#define NV20TCL_RC_FINAL1_F_MAPPING_SHIFT 21 +#define NV20TCL_RC_FINAL1_F_MAPPING_MASK 0x00e00000 +#define NV20TCL_RC_FINAL1_F_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV20TCL_RC_FINAL1_F_MAPPING_UNSIGNED_INVERT 0x00200000 +#define NV20TCL_RC_FINAL1_F_MAPPING_EXPAND_NORMAL 0x00400000 +#define NV20TCL_RC_FINAL1_F_MAPPING_EXPAND_NEGATE 0x00600000 +#define NV20TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NORMAL 0x00800000 +#define NV20TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NEGATE 0x00a00000 +#define NV20TCL_RC_FINAL1_F_MAPPING_SIGNED_IDENTITY 0x00c00000 +#define NV20TCL_RC_FINAL1_F_MAPPING_SIGNED_NEGATE 0x00e00000 +#define NV20TCL_RC_FINAL1_E_INPUT_SHIFT 24 +#define NV20TCL_RC_FINAL1_E_INPUT_MASK 0x0f000000 +#define NV20TCL_RC_FINAL1_E_INPUT_ZERO 0x00000000 +#define NV20TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR0 0x01000000 +#define NV20TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR1 0x02000000 +#define NV20TCL_RC_FINAL1_E_INPUT_FOG 0x03000000 +#define NV20TCL_RC_FINAL1_E_INPUT_PRIMARY_COLOR 0x04000000 +#define NV20TCL_RC_FINAL1_E_INPUT_SECONDARY_COLOR 0x05000000 +#define NV20TCL_RC_FINAL1_E_INPUT_TEXTURE0 0x08000000 +#define NV20TCL_RC_FINAL1_E_INPUT_TEXTURE1 0x09000000 +#define NV20TCL_RC_FINAL1_E_INPUT_SPARE0 0x0c000000 +#define NV20TCL_RC_FINAL1_E_INPUT_SPARE1 0x0d000000 +#define NV20TCL_RC_FINAL1_E_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0e000000 +#define NV20TCL_RC_FINAL1_E_INPUT_E_TIMES_F 0x0f000000 +#define NV20TCL_RC_FINAL1_E_INPUT_TEXTURE2 0x0a000000 +#define NV20TCL_RC_FINAL1_E_INPUT_TEXTURE3 0x0b000000 +#define NV20TCL_RC_FINAL1_E_COMPONENT_USAGE (1 << 28) +#define NV20TCL_RC_FINAL1_E_COMPONENT_USAGE_RGB 0x00000000 +#define NV20TCL_RC_FINAL1_E_COMPONENT_USAGE_ALPHA 0x10000000 +#define NV20TCL_RC_FINAL1_E_MAPPING_SHIFT 29 +#define NV20TCL_RC_FINAL1_E_MAPPING_MASK 0xe0000000 +#define NV20TCL_RC_FINAL1_E_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV20TCL_RC_FINAL1_E_MAPPING_UNSIGNED_INVERT 0x20000000 +#define NV20TCL_RC_FINAL1_E_MAPPING_EXPAND_NORMAL 0x40000000 +#define NV20TCL_RC_FINAL1_E_MAPPING_EXPAND_NEGATE 0x60000000 +#define NV20TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NORMAL 0x80000000 +#define NV20TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NEGATE 0xa0000000 +#define NV20TCL_RC_FINAL1_E_MAPPING_SIGNED_IDENTITY 0xc0000000 +#define NV20TCL_RC_FINAL1_E_MAPPING_SIGNED_NEGATE 0xe0000000 +#define NV20TCL_LIGHT_MODEL 0x00000294 +#define NV20TCL_LIGHT_MODEL_VIEWER_SHIFT 16 +#define NV20TCL_LIGHT_MODEL_VIEWER_MASK 0x00030000 +#define NV20TCL_LIGHT_MODEL_VIEWER_NONLOCAL 0x00020000 +#define NV20TCL_LIGHT_MODEL_VIEWER_LOCAL 0x00030000 +#define NV20TCL_LIGHT_MODEL_SEPARATE_SPECULAR (1 << 0) +#define NV20TCL_COLOR_MATERIAL 0x00000298 +#define NV20TCL_COLOR_MATERIAL_FRONT_EMISSION_SHIFT 0 +#define NV20TCL_COLOR_MATERIAL_FRONT_EMISSION_MASK 0x00000003 +#define NV20TCL_COLOR_MATERIAL_FRONT_EMISSION_OFF 0x00000000 +#define NV20TCL_COLOR_MATERIAL_FRONT_EMISSION_COL1 0x00000001 +#define NV20TCL_COLOR_MATERIAL_FRONT_EMISSION_COL2 0x00000002 +#define NV20TCL_COLOR_MATERIAL_FRONT_AMBIENT_SHIFT 2 +#define NV20TCL_COLOR_MATERIAL_FRONT_AMBIENT_MASK 0x0000000c +#define NV20TCL_COLOR_MATERIAL_FRONT_AMBIENT_OFF 0x00000000 +#define NV20TCL_COLOR_MATERIAL_FRONT_AMBIENT_COL1 0x00000004 +#define NV20TCL_COLOR_MATERIAL_FRONT_AMBIENT_COL2 0x00000008 +#define NV20TCL_COLOR_MATERIAL_FRONT_DIFFUSE_SHIFT 4 +#define NV20TCL_COLOR_MATERIAL_FRONT_DIFFUSE_MASK 0x00000030 +#define NV20TCL_COLOR_MATERIAL_FRONT_DIFFUSE_OFF 0x00000000 +#define NV20TCL_COLOR_MATERIAL_FRONT_DIFFUSE_COL1 0x00000010 +#define NV20TCL_COLOR_MATERIAL_FRONT_DIFFUSE_COL2 0x00000020 +#define NV20TCL_COLOR_MATERIAL_FRONT_SPECULAR_SHIFT 6 +#define NV20TCL_COLOR_MATERIAL_FRONT_SPECULAR_MASK 0x000000c0 +#define NV20TCL_COLOR_MATERIAL_FRONT_SPECULAR_OFF 0x00000000 +#define NV20TCL_COLOR_MATERIAL_FRONT_SPECULAR_COL1 0x00000040 +#define NV20TCL_COLOR_MATERIAL_FRONT_SPECULAR_COL2 0x00000080 +#define NV20TCL_COLOR_MATERIAL_BACK_EMISSION_SHIFT 8 +#define NV20TCL_COLOR_MATERIAL_BACK_EMISSION_MASK 0x00000300 +#define NV20TCL_COLOR_MATERIAL_BACK_EMISSION_OFF 0x00000000 +#define NV20TCL_COLOR_MATERIAL_BACK_EMISSION_COL1 0x00000100 +#define NV20TCL_COLOR_MATERIAL_BACK_EMISSION_COL2 0x00000200 +#define NV20TCL_COLOR_MATERIAL_BACK_AMBIENT_SHIFT 10 +#define NV20TCL_COLOR_MATERIAL_BACK_AMBIENT_MASK 0x00000c00 +#define NV20TCL_COLOR_MATERIAL_BACK_AMBIENT_OFF 0x00000000 +#define NV20TCL_COLOR_MATERIAL_BACK_AMBIENT_COL1 0x00000400 +#define NV20TCL_COLOR_MATERIAL_BACK_AMBIENT_COL2 0x00000800 +#define NV20TCL_COLOR_MATERIAL_BACK_DIFFUSE_SHIFT 12 +#define NV20TCL_COLOR_MATERIAL_BACK_DIFFUSE_MASK 0x00003000 +#define NV20TCL_COLOR_MATERIAL_BACK_DIFFUSE_OFF 0x00000000 +#define NV20TCL_COLOR_MATERIAL_BACK_DIFFUSE_COL1 0x00001000 +#define NV20TCL_COLOR_MATERIAL_BACK_DIFFUSE_COL2 0x00002000 +#define NV20TCL_COLOR_MATERIAL_BACK_SPECULAR_SHIFT 14 +#define NV20TCL_COLOR_MATERIAL_BACK_SPECULAR_MASK 0x0000c000 +#define NV20TCL_COLOR_MATERIAL_BACK_SPECULAR_OFF 0x00000000 +#define NV20TCL_COLOR_MATERIAL_BACK_SPECULAR_COL1 0x00004000 +#define NV20TCL_COLOR_MATERIAL_BACK_SPECULAR_COL2 0x00008000 +#define NV20TCL_FOG_MODE 0x0000029c +#define NV20TCL_FOG_MODE_LINEAR_UNSIGNED 0x00000804 +#define NV20TCL_FOG_MODE_LINEAR_SIGNED 0x00002601 +#define NV20TCL_FOG_MODE_EXP_UNSIGNED 0x00000802 +#define NV20TCL_FOG_MODE_EXP_SIGNED 0x00000800 +#define NV20TCL_FOG_MODE_EXP2_UNSIGNED 0x00000803 +#define NV20TCL_FOG_MODE_EXP2_SIGNED 0x00000801 +#define NV20TCL_FOG_COORD 0x000002a0 +#define NV20TCL_FOG_COORD_DIST_RADIAL 0x00000001 +#define NV20TCL_FOG_COORD_DIST_ORTHOGONAL 0x00000002 +#define NV20TCL_FOG_COORD_DIST_ORTHOGONAL_ABS 0x00000003 +#define NV20TCL_FOG_COORD_FOG 0x00000006 +#define NV20TCL_FOG_ENABLE 0x000002a4 +#define NV20TCL_FOG_COLOR 0x000002a8 +#define NV20TCL_FOG_COLOR_R_SHIFT 0 +#define NV20TCL_FOG_COLOR_R_MASK 0x000000ff +#define NV20TCL_FOG_COLOR_G_SHIFT 8 +#define NV20TCL_FOG_COLOR_G_MASK 0x0000ff00 +#define NV20TCL_FOG_COLOR_B_SHIFT 16 +#define NV20TCL_FOG_COLOR_B_MASK 0x00ff0000 +#define NV20TCL_FOG_COLOR_A_SHIFT 24 +#define NV20TCL_FOG_COLOR_A_MASK 0xff000000 +#define NV20TCL_VIEWPORT_CLIP_MODE 0x000002b4 +#define NV20TCL_VIEWPORT_CLIP_HORIZ(x) (0x000002c0+((x)*4)) +#define NV20TCL_VIEWPORT_CLIP_HORIZ__SIZE 0x00000008 +#define NV20TCL_VIEWPORT_CLIP_VERT(x) (0x000002e0+((x)*4)) +#define NV20TCL_VIEWPORT_CLIP_VERT__SIZE 0x00000008 +#define NV20TCL_ALPHA_FUNC_ENABLE 0x00000300 +#define NV20TCL_BLEND_FUNC_ENABLE 0x00000304 +#define NV20TCL_CULL_FACE_ENABLE 0x00000308 +#define NV20TCL_DEPTH_TEST_ENABLE 0x0000030c +#define NV20TCL_DITHER_ENABLE 0x00000310 +#define NV20TCL_LIGHTING_ENABLE 0x00000314 +#define NV20TCL_POINT_PARAMETERS_ENABLE 0x00000318 +#define NV20TCL_POINT_SMOOTH_ENABLE 0x0000031c +#define NV20TCL_LINE_SMOOTH_ENABLE 0x00000320 +#define NV20TCL_POLYGON_SMOOTH_ENABLE 0x00000324 +#define NV20TCL_STENCIL_ENABLE 0x0000032c +#define NV20TCL_POLYGON_OFFSET_POINT_ENABLE 0x00000330 +#define NV20TCL_POLYGON_OFFSET_LINE_ENABLE 0x00000334 +#define NV20TCL_POLYGON_OFFSET_FILL_ENABLE 0x00000338 +#define NV20TCL_ALPHA_FUNC_FUNC 0x0000033c +#define NV20TCL_ALPHA_FUNC_FUNC_NEVER 0x00000200 +#define NV20TCL_ALPHA_FUNC_FUNC_LESS 0x00000201 +#define NV20TCL_ALPHA_FUNC_FUNC_EQUAL 0x00000202 +#define NV20TCL_ALPHA_FUNC_FUNC_LEQUAL 0x00000203 +#define NV20TCL_ALPHA_FUNC_FUNC_GREATER 0x00000204 +#define NV20TCL_ALPHA_FUNC_FUNC_NOTEQUAL 0x00000205 +#define NV20TCL_ALPHA_FUNC_FUNC_GEQUAL 0x00000206 +#define NV20TCL_ALPHA_FUNC_FUNC_ALWAYS 0x00000207 +#define NV20TCL_ALPHA_FUNC_REF 0x00000340 +#define NV20TCL_BLEND_FUNC_SRC 0x00000344 +#define NV20TCL_BLEND_FUNC_SRC_ZERO 0x00000000 +#define NV20TCL_BLEND_FUNC_SRC_ONE 0x00000001 +#define NV20TCL_BLEND_FUNC_SRC_SRC_COLOR 0x00000300 +#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_SRC_COLOR 0x00000301 +#define NV20TCL_BLEND_FUNC_SRC_SRC_ALPHA 0x00000302 +#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_SRC_ALPHA 0x00000303 +#define NV20TCL_BLEND_FUNC_SRC_DST_ALPHA 0x00000304 +#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_DST_ALPHA 0x00000305 +#define NV20TCL_BLEND_FUNC_SRC_DST_COLOR 0x00000306 +#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_DST_COLOR 0x00000307 +#define NV20TCL_BLEND_FUNC_SRC_SRC_ALPHA_SATURATE 0x00000308 +#define NV20TCL_BLEND_FUNC_SRC_CONSTANT_COLOR 0x00008001 +#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_CONSTANT_COLOR 0x00008002 +#define NV20TCL_BLEND_FUNC_SRC_CONSTANT_ALPHA 0x00008003 +#define NV20TCL_BLEND_FUNC_SRC_ONE_MINUS_CONSTANT_ALPHA 0x00008004 +#define NV20TCL_BLEND_FUNC_DST 0x00000348 +#define NV20TCL_BLEND_FUNC_DST_ZERO 0x00000000 +#define NV20TCL_BLEND_FUNC_DST_ONE 0x00000001 +#define NV20TCL_BLEND_FUNC_DST_SRC_COLOR 0x00000300 +#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_SRC_COLOR 0x00000301 +#define NV20TCL_BLEND_FUNC_DST_SRC_ALPHA 0x00000302 +#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_SRC_ALPHA 0x00000303 +#define NV20TCL_BLEND_FUNC_DST_DST_ALPHA 0x00000304 +#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_DST_ALPHA 0x00000305 +#define NV20TCL_BLEND_FUNC_DST_DST_COLOR 0x00000306 +#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_DST_COLOR 0x00000307 +#define NV20TCL_BLEND_FUNC_DST_SRC_ALPHA_SATURATE 0x00000308 +#define NV20TCL_BLEND_FUNC_DST_CONSTANT_COLOR 0x00008001 +#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_CONSTANT_COLOR 0x00008002 +#define NV20TCL_BLEND_FUNC_DST_CONSTANT_ALPHA 0x00008003 +#define NV20TCL_BLEND_FUNC_DST_ONE_MINUS_CONSTANT_ALPHA 0x00008004 +#define NV20TCL_BLEND_COLOR 0x0000034c +#define NV20TCL_BLEND_COLOR_B_SHIFT 0 +#define NV20TCL_BLEND_COLOR_B_MASK 0x000000ff +#define NV20TCL_BLEND_COLOR_G_SHIFT 8 +#define NV20TCL_BLEND_COLOR_G_MASK 0x0000ff00 +#define NV20TCL_BLEND_COLOR_R_SHIFT 16 +#define NV20TCL_BLEND_COLOR_R_MASK 0x00ff0000 +#define NV20TCL_BLEND_COLOR_A_SHIFT 24 +#define NV20TCL_BLEND_COLOR_A_MASK 0xff000000 +#define NV20TCL_BLEND_EQUATION 0x00000350 +#define NV20TCL_BLEND_EQUATION_FUNC_ADD 0x00008006 +#define NV20TCL_BLEND_EQUATION_MIN 0x00008007 +#define NV20TCL_BLEND_EQUATION_MAX 0x00008008 +#define NV20TCL_BLEND_EQUATION_FUNC_SUBTRACT 0x0000800a +#define NV20TCL_BLEND_EQUATION_FUNC_REVERSE_SUBTRACT 0x0000800b +#define NV20TCL_DEPTH_FUNC 0x00000354 +#define NV20TCL_DEPTH_FUNC_NEVER 0x00000200 +#define NV20TCL_DEPTH_FUNC_LESS 0x00000201 +#define NV20TCL_DEPTH_FUNC_EQUAL 0x00000202 +#define NV20TCL_DEPTH_FUNC_LEQUAL 0x00000203 +#define NV20TCL_DEPTH_FUNC_GREATER 0x00000204 +#define NV20TCL_DEPTH_FUNC_NOTEQUAL 0x00000205 +#define NV20TCL_DEPTH_FUNC_GEQUAL 0x00000206 +#define NV20TCL_DEPTH_FUNC_ALWAYS 0x00000207 +#define NV20TCL_COLOR_MASK 0x00000358 +#define NV20TCL_COLOR_MASK_B (1 << 0) +#define NV20TCL_COLOR_MASK_G (1 << 8) +#define NV20TCL_COLOR_MASK_R (1 << 16) +#define NV20TCL_COLOR_MASK_A (1 << 24) +#define NV20TCL_DEPTH_WRITE_ENABLE 0x0000035c +#define NV20TCL_STENCIL_MASK 0x00000360 +#define NV20TCL_STENCIL_FUNC_FUNC 0x00000364 +#define NV20TCL_STENCIL_FUNC_FUNC_NEVER 0x00000200 +#define NV20TCL_STENCIL_FUNC_FUNC_LESS 0x00000201 +#define NV20TCL_STENCIL_FUNC_FUNC_EQUAL 0x00000202 +#define NV20TCL_STENCIL_FUNC_FUNC_LEQUAL 0x00000203 +#define NV20TCL_STENCIL_FUNC_FUNC_GREATER 0x00000204 +#define NV20TCL_STENCIL_FUNC_FUNC_NOTEQUAL 0x00000205 +#define NV20TCL_STENCIL_FUNC_FUNC_GEQUAL 0x00000206 +#define NV20TCL_STENCIL_FUNC_FUNC_ALWAYS 0x00000207 +#define NV20TCL_STENCIL_FUNC_REF 0x00000368 +#define NV20TCL_STENCIL_FUNC_MASK 0x0000036c +#define NV20TCL_STENCIL_OP_FAIL 0x00000370 +#define NV20TCL_STENCIL_OP_FAIL_ZERO 0x00000000 +#define NV20TCL_STENCIL_OP_FAIL_INVERT 0x0000150a +#define NV20TCL_STENCIL_OP_FAIL_KEEP 0x00001e00 +#define NV20TCL_STENCIL_OP_FAIL_REPLACE 0x00001e01 +#define NV20TCL_STENCIL_OP_FAIL_INCR 0x00001e02 +#define NV20TCL_STENCIL_OP_FAIL_DECR 0x00001e03 +#define NV20TCL_STENCIL_OP_FAIL_INCR_WRAP 0x00008507 +#define NV20TCL_STENCIL_OP_FAIL_DECR_WRAP 0x00008508 +#define NV20TCL_STENCIL_OP_ZFAIL 0x00000374 +#define NV20TCL_STENCIL_OP_ZFAIL_ZERO 0x00000000 +#define NV20TCL_STENCIL_OP_ZFAIL_INVERT 0x0000150a +#define NV20TCL_STENCIL_OP_ZFAIL_KEEP 0x00001e00 +#define NV20TCL_STENCIL_OP_ZFAIL_REPLACE 0x00001e01 +#define NV20TCL_STENCIL_OP_ZFAIL_INCR 0x00001e02 +#define NV20TCL_STENCIL_OP_ZFAIL_DECR 0x00001e03 +#define NV20TCL_STENCIL_OP_ZFAIL_INCR_WRAP 0x00008507 +#define NV20TCL_STENCIL_OP_ZFAIL_DECR_WRAP 0x00008508 +#define NV20TCL_STENCIL_OP_ZPASS 0x00000378 +#define NV20TCL_STENCIL_OP_ZPASS_ZERO 0x00000000 +#define NV20TCL_STENCIL_OP_ZPASS_INVERT 0x0000150a +#define NV20TCL_STENCIL_OP_ZPASS_KEEP 0x00001e00 +#define NV20TCL_STENCIL_OP_ZPASS_REPLACE 0x00001e01 +#define NV20TCL_STENCIL_OP_ZPASS_INCR 0x00001e02 +#define NV20TCL_STENCIL_OP_ZPASS_DECR 0x00001e03 +#define NV20TCL_STENCIL_OP_ZPASS_INCR_WRAP 0x00008507 +#define NV20TCL_STENCIL_OP_ZPASS_DECR_WRAP 0x00008508 +#define NV20TCL_SHADE_MODEL 0x0000037c +#define NV20TCL_SHADE_MODEL_FLAT 0x00001d00 +#define NV20TCL_SHADE_MODEL_SMOOTH 0x00001d01 +#define NV20TCL_LINE_WIDTH 0x00000380 +#define NV20TCL_POLYGON_OFFSET_FACTOR 0x00000384 +#define NV20TCL_POLYGON_OFFSET_UNITS 0x00000388 +#define NV20TCL_POLYGON_MODE_FRONT 0x0000038c +#define NV20TCL_POLYGON_MODE_FRONT_POINT 0x00001b00 +#define NV20TCL_POLYGON_MODE_FRONT_LINE 0x00001b01 +#define NV20TCL_POLYGON_MODE_FRONT_FILL 0x00001b02 +#define NV20TCL_POLYGON_MODE_BACK 0x00000390 +#define NV20TCL_POLYGON_MODE_BACK_POINT 0x00001b00 +#define NV20TCL_POLYGON_MODE_BACK_LINE 0x00001b01 +#define NV20TCL_POLYGON_MODE_BACK_FILL 0x00001b02 +#define NV20TCL_DEPTH_RANGE_NEAR 0x00000394 +#define NV20TCL_DEPTH_RANGE_FAR 0x00000398 +#define NV20TCL_CULL_FACE 0x0000039c +#define NV20TCL_CULL_FACE_FRONT 0x00000404 +#define NV20TCL_CULL_FACE_BACK 0x00000405 +#define NV20TCL_CULL_FACE_FRONT_AND_BACK 0x00000408 +#define NV20TCL_FRONT_FACE 0x000003a0 +#define NV20TCL_FRONT_FACE_CW 0x00000900 +#define NV20TCL_FRONT_FACE_CCW 0x00000901 +#define NV20TCL_NORMALIZE_ENABLE 0x000003a4 +#define NV20TCL_MATERIAL_FACTOR_FRONT_R 0x000003a8 +#define NV20TCL_MATERIAL_FACTOR_FRONT_G 0x000003ac +#define NV20TCL_MATERIAL_FACTOR_FRONT_B 0x000003b0 +#define NV20TCL_MATERIAL_FACTOR_FRONT_A 0x000003b4 +#define NV20TCL_SEPARATE_SPECULAR_ENABLE 0x000003b8 +#define NV20TCL_ENABLED_LIGHTS 0x000003bc +#define NV20TCL_ENABLED_LIGHTS_0_SHIFT 0 +#define NV20TCL_ENABLED_LIGHTS_0_MASK 0x00000003 +#define NV20TCL_ENABLED_LIGHTS_0_DISABLED 0x00000000 +#define NV20TCL_ENABLED_LIGHTS_0_NONPOSITIONAL 0x00000001 +#define NV20TCL_ENABLED_LIGHTS_0_POSITIONAL 0x00000002 +#define NV20TCL_ENABLED_LIGHTS_0_DIRECTIONAL 0x00000003 +#define NV20TCL_ENABLED_LIGHTS_1_SHIFT 2 +#define NV20TCL_ENABLED_LIGHTS_1_MASK 0x0000000c +#define NV20TCL_ENABLED_LIGHTS_1_DISABLED 0x00000000 +#define NV20TCL_ENABLED_LIGHTS_1_NONPOSITIONAL 0x00000004 +#define NV20TCL_ENABLED_LIGHTS_1_POSITIONAL 0x00000008 +#define NV20TCL_ENABLED_LIGHTS_1_DIRECTIONAL 0x0000000c +#define NV20TCL_ENABLED_LIGHTS_2_SHIFT 4 +#define NV20TCL_ENABLED_LIGHTS_2_MASK 0x00000030 +#define NV20TCL_ENABLED_LIGHTS_2_DISABLED 0x00000000 +#define NV20TCL_ENABLED_LIGHTS_2_NONPOSITIONAL 0x00000010 +#define NV20TCL_ENABLED_LIGHTS_2_POSITIONAL 0x00000020 +#define NV20TCL_ENABLED_LIGHTS_2_DIRECTIONAL 0x00000030 +#define NV20TCL_ENABLED_LIGHTS_3_SHIFT 6 +#define NV20TCL_ENABLED_LIGHTS_3_MASK 0x000000c0 +#define NV20TCL_ENABLED_LIGHTS_3_DISABLED 0x00000000 +#define NV20TCL_ENABLED_LIGHTS_3_NONPOSITIONAL 0x00000040 +#define NV20TCL_ENABLED_LIGHTS_3_POSITIONAL 0x00000080 +#define NV20TCL_ENABLED_LIGHTS_3_DIRECTIONAL 0x000000c0 +#define NV20TCL_ENABLED_LIGHTS_4_SHIFT 8 +#define NV20TCL_ENABLED_LIGHTS_4_MASK 0x00000300 +#define NV20TCL_ENABLED_LIGHTS_4_DISABLED 0x00000000 +#define NV20TCL_ENABLED_LIGHTS_4_NONPOSITIONAL 0x00000100 +#define NV20TCL_ENABLED_LIGHTS_4_POSITIONAL 0x00000200 +#define NV20TCL_ENABLED_LIGHTS_4_DIRECTIONAL 0x00000300 +#define NV20TCL_ENABLED_LIGHTS_5_SHIFT 10 +#define NV20TCL_ENABLED_LIGHTS_5_MASK 0x00000c00 +#define NV20TCL_ENABLED_LIGHTS_5_DISABLED 0x00000000 +#define NV20TCL_ENABLED_LIGHTS_5_NONPOSITIONAL 0x00000400 +#define NV20TCL_ENABLED_LIGHTS_5_POSITIONAL 0x00000800 +#define NV20TCL_ENABLED_LIGHTS_5_DIRECTIONAL 0x00000c00 +#define NV20TCL_ENABLED_LIGHTS_6_SHIFT 12 +#define NV20TCL_ENABLED_LIGHTS_6_MASK 0x00003000 +#define NV20TCL_ENABLED_LIGHTS_6_DISABLED 0x00000000 +#define NV20TCL_ENABLED_LIGHTS_6_NONPOSITIONAL 0x00001000 +#define NV20TCL_ENABLED_LIGHTS_6_POSITIONAL 0x00002000 +#define NV20TCL_ENABLED_LIGHTS_6_DIRECTIONAL 0x00003000 +#define NV20TCL_ENABLED_LIGHTS_7_SHIFT 14 +#define NV20TCL_ENABLED_LIGHTS_7_MASK 0x0000c000 +#define NV20TCL_ENABLED_LIGHTS_7_DISABLED 0x00000000 +#define NV20TCL_ENABLED_LIGHTS_7_NONPOSITIONAL 0x00004000 +#define NV20TCL_ENABLED_LIGHTS_7_POSITIONAL 0x00008000 +#define NV20TCL_ENABLED_LIGHTS_7_DIRECTIONAL 0x0000c000 +#define NV20TCL_TX_GEN_MODE_S(x) (0x000003c0+((x)*16)) +#define NV20TCL_TX_GEN_MODE_S__SIZE 0x00000004 +#define NV20TCL_TX_GEN_MODE_S_FALSE 0x00000000 +#define NV20TCL_TX_GEN_MODE_S_EYE_LINEAR 0x00002400 +#define NV20TCL_TX_GEN_MODE_S_OBJECT_LINEAR 0x00002401 +#define NV20TCL_TX_GEN_MODE_S_SPHERE_MAP 0x00002402 +#define NV20TCL_TX_GEN_MODE_S_NORMAL_MAP 0x00008511 +#define NV20TCL_TX_GEN_MODE_S_REFLECTION_MAP 0x00008512 +#define NV20TCL_TX_GEN_MODE_T(x) (0x000003c4+((x)*16)) +#define NV20TCL_TX_GEN_MODE_T__SIZE 0x00000004 +#define NV20TCL_TX_GEN_MODE_T_FALSE 0x00000000 +#define NV20TCL_TX_GEN_MODE_T_EYE_LINEAR 0x00002400 +#define NV20TCL_TX_GEN_MODE_T_OBJECT_LINEAR 0x00002401 +#define NV20TCL_TX_GEN_MODE_T_SPHERE_MAP 0x00002402 +#define NV20TCL_TX_GEN_MODE_T_NORMAL_MAP 0x00008511 +#define NV20TCL_TX_GEN_MODE_T_REFLECTION_MAP 0x00008512 +#define NV20TCL_TX_GEN_MODE_R(x) (0x000003c8+((x)*16)) +#define NV20TCL_TX_GEN_MODE_R__SIZE 0x00000004 +#define NV20TCL_TX_GEN_MODE_R_FALSE 0x00000000 +#define NV20TCL_TX_GEN_MODE_R_EYE_LINEAR 0x00002400 +#define NV20TCL_TX_GEN_MODE_R_OBJECT_LINEAR 0x00002401 +#define NV20TCL_TX_GEN_MODE_R_SPHERE_MAP 0x00002402 +#define NV20TCL_TX_GEN_MODE_R_NORMAL_MAP 0x00008511 +#define NV20TCL_TX_GEN_MODE_R_REFLECTION_MAP 0x00008512 +#define NV20TCL_TX_GEN_MODE_Q(x) (0x000003cc+((x)*16)) +#define NV20TCL_TX_GEN_MODE_Q__SIZE 0x00000004 +#define NV20TCL_TX_GEN_MODE_Q_FALSE 0x00000000 +#define NV20TCL_TX_GEN_MODE_Q_EYE_LINEAR 0x00002400 +#define NV20TCL_TX_GEN_MODE_Q_OBJECT_LINEAR 0x00002401 +#define NV20TCL_TX_GEN_MODE_Q_SPHERE_MAP 0x00002402 +#define NV20TCL_TX_GEN_MODE_Q_NORMAL_MAP 0x00008511 +#define NV20TCL_TX_GEN_MODE_Q_REFLECTION_MAP 0x00008512 +#define NV20TCL_TX_MATRIX_ENABLE(x) (0x00000420+((x)*4)) +#define NV20TCL_TX_MATRIX_ENABLE__SIZE 0x00000004 +#define NV20TCL_POINT_SIZE 0x0000043c +#define NV20TCL_MODELVIEW0_MATRIX(x) (0x00000480+((x)*4)) +#define NV20TCL_MODELVIEW0_MATRIX__SIZE 0x00000010 +#define NV20TCL_MODELVIEW1_MATRIX(x) (0x000004c0+((x)*4)) +#define NV20TCL_MODELVIEW1_MATRIX__SIZE 0x00000010 +#define NV20TCL_MODELVIEW2_MATRIX(x) (0x00000500+((x)*4)) +#define NV20TCL_MODELVIEW2_MATRIX__SIZE 0x00000010 +#define NV20TCL_MODELVIEW3_MATRIX(x) (0x00000540+((x)*4)) +#define NV20TCL_MODELVIEW3_MATRIX__SIZE 0x00000010 +#define NV20TCL_INVERSE_MODELVIEW0_MATRIX(x) (0x00000580+((x)*4)) +#define NV20TCL_INVERSE_MODELVIEW0_MATRIX__SIZE 0x00000010 +#define NV20TCL_INVERSE_MODELVIEW1_MATRIX(x) (0x000005c0+((x)*4)) +#define NV20TCL_INVERSE_MODELVIEW1_MATRIX__SIZE 0x00000010 +#define NV20TCL_INVERSE_MODELVIEW2_MATRIX(x) (0x00000600+((x)*4)) +#define NV20TCL_INVERSE_MODELVIEW2_MATRIX__SIZE 0x00000010 +#define NV20TCL_INVERSE_MODELVIEW3_MATRIX(x) (0x00000640+((x)*4)) +#define NV20TCL_INVERSE_MODELVIEW3_MATRIX__SIZE 0x00000010 +#define NV20TCL_PROJECTION_MATRIX(x) (0x00000680+((x)*4)) +#define NV20TCL_PROJECTION_MATRIX__SIZE 0x00000010 +#define NV20TCL_TX0_MATRIX(x) (0x000006c0+((x)*4)) +#define NV20TCL_TX0_MATRIX__SIZE 0x00000010 +#define NV20TCL_TX1_MATRIX(x) (0x00000700+((x)*4)) +#define NV20TCL_TX1_MATRIX__SIZE 0x00000010 +#define NV20TCL_TX2_MATRIX(x) (0x00000740+((x)*4)) +#define NV20TCL_TX2_MATRIX__SIZE 0x00000010 +#define NV20TCL_TX3_MATRIX(x) (0x00000780+((x)*4)) +#define NV20TCL_TX3_MATRIX__SIZE 0x00000010 +#define NV20TCL_TX_GEN_COEFF_S_A(x) (0x00000840+((x)*64)) +#define NV20TCL_TX_GEN_COEFF_S_A__SIZE 0x00000004 +#define NV20TCL_TX_GEN_COEFF_S_B(x) (0x00000844+((x)*64)) +#define NV20TCL_TX_GEN_COEFF_S_B__SIZE 0x00000004 +#define NV20TCL_TX_GEN_COEFF_S_C(x) (0x00000848+((x)*64)) +#define NV20TCL_TX_GEN_COEFF_S_C__SIZE 0x00000004 +#define NV20TCL_TX_GEN_COEFF_S_D(x) (0x0000084c+((x)*64)) +#define NV20TCL_TX_GEN_COEFF_S_D__SIZE 0x00000004 +#define NV20TCL_TX_GEN_COEFF_T_A(x) (0x00000850+((x)*64)) +#define NV20TCL_TX_GEN_COEFF_T_A__SIZE 0x00000004 +#define NV20TCL_TX_GEN_COEFF_T_B(x) (0x00000854+((x)*64)) +#define NV20TCL_TX_GEN_COEFF_T_B__SIZE 0x00000004 +#define NV20TCL_TX_GEN_COEFF_T_C(x) (0x00000858+((x)*64)) +#define NV20TCL_TX_GEN_COEFF_T_C__SIZE 0x00000004 +#define NV20TCL_TX_GEN_COEFF_T_D(x) (0x0000085c+((x)*64)) +#define NV20TCL_TX_GEN_COEFF_T_D__SIZE 0x00000004 +#define NV20TCL_TX_GEN_COEFF_R_A(x) (0x00000860+((x)*64)) +#define NV20TCL_TX_GEN_COEFF_R_A__SIZE 0x00000004 +#define NV20TCL_TX_GEN_COEFF_R_B(x) (0x00000864+((x)*64)) +#define NV20TCL_TX_GEN_COEFF_R_B__SIZE 0x00000004 +#define NV20TCL_TX_GEN_COEFF_R_C(x) (0x00000868+((x)*64)) +#define NV20TCL_TX_GEN_COEFF_R_C__SIZE 0x00000004 +#define NV20TCL_TX_GEN_COEFF_R_D(x) (0x0000086c+((x)*64)) +#define NV20TCL_TX_GEN_COEFF_R_D__SIZE 0x00000004 +#define NV20TCL_TX_GEN_COEFF_Q_A(x) (0x00000870+((x)*64)) +#define NV20TCL_TX_GEN_COEFF_Q_A__SIZE 0x00000004 +#define NV20TCL_TX_GEN_COEFF_Q_B(x) (0x00000874+((x)*64)) +#define NV20TCL_TX_GEN_COEFF_Q_B__SIZE 0x00000004 +#define NV20TCL_TX_GEN_COEFF_Q_C(x) (0x00000878+((x)*64)) +#define NV20TCL_TX_GEN_COEFF_Q_C__SIZE 0x00000004 +#define NV20TCL_TX_GEN_COEFF_Q_D(x) (0x0000087c+((x)*64)) +#define NV20TCL_TX_GEN_COEFF_Q_D__SIZE 0x00000004 +#define NV20TCL_FOG_EQUATION_CONSTANT 0x000009c0 +#define NV20TCL_FOG_EQUATION_LINEAR 0x000009c4 +#define NV20TCL_FOG_EQUATION_QUADRATIC 0x000009c8 +#define NV20TCL_FRONT_MATERIAL_SHININESS(x) (0x000009e0+((x)*4)) +#define NV20TCL_FRONT_MATERIAL_SHININESS__SIZE 0x00000006 +#define NV20TCL_LIGHT_MODEL_FRONT_AMBIENT_R 0x00000a10 +#define NV20TCL_LIGHT_MODEL_FRONT_AMBIENT_G 0x00000a14 +#define NV20TCL_LIGHT_MODEL_FRONT_AMBIENT_B 0x00000a18 +#define NV20TCL_VIEWPORT_TRANSLATE_X 0x00000a20 +#define NV20TCL_VIEWPORT_TRANSLATE_Y 0x00000a24 +#define NV20TCL_VIEWPORT_TRANSLATE_Z 0x00000a28 +#define NV20TCL_VIEWPORT_TRANSLATE_W 0x00000a2c +#define NV20TCL_POINT_PARAMETER(x) (0x00000a30+((x)*4)) +#define NV20TCL_POINT_PARAMETER__SIZE 0x00000008 +#define NV20TCL_RC_CONSTANT_COLOR0(x) (0x00000a60+((x)*4)) +#define NV20TCL_RC_CONSTANT_COLOR0__SIZE 0x00000008 +#define NV20TCL_RC_CONSTANT_COLOR0_B_SHIFT 0 +#define NV20TCL_RC_CONSTANT_COLOR0_B_MASK 0x000000ff +#define NV20TCL_RC_CONSTANT_COLOR0_G_SHIFT 8 +#define NV20TCL_RC_CONSTANT_COLOR0_G_MASK 0x0000ff00 +#define NV20TCL_RC_CONSTANT_COLOR0_R_SHIFT 16 +#define NV20TCL_RC_CONSTANT_COLOR0_R_MASK 0x00ff0000 +#define NV20TCL_RC_CONSTANT_COLOR0_A_SHIFT 24 +#define NV20TCL_RC_CONSTANT_COLOR0_A_MASK 0xff000000 +#define NV20TCL_RC_CONSTANT_COLOR1(x) (0x00000a80+((x)*4)) +#define NV20TCL_RC_CONSTANT_COLOR1__SIZE 0x00000008 +#define NV20TCL_RC_CONSTANT_COLOR1_B_SHIFT 0 +#define NV20TCL_RC_CONSTANT_COLOR1_B_MASK 0x000000ff +#define NV20TCL_RC_CONSTANT_COLOR1_G_SHIFT 8 +#define NV20TCL_RC_CONSTANT_COLOR1_G_MASK 0x0000ff00 +#define NV20TCL_RC_CONSTANT_COLOR1_R_SHIFT 16 +#define NV20TCL_RC_CONSTANT_COLOR1_R_MASK 0x00ff0000 +#define NV20TCL_RC_CONSTANT_COLOR1_A_SHIFT 24 +#define NV20TCL_RC_CONSTANT_COLOR1_A_MASK 0xff000000 +#define NV20TCL_RC_OUT_ALPHA(x) (0x00000aa0+((x)*4)) +#define NV20TCL_RC_OUT_ALPHA__SIZE 0x00000008 +#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SHIFT 0 +#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_MASK 0x0000000f +#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_ZERO 0x00000000 +#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR0 0x00000001 +#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR1 0x00000002 +#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_FOG 0x00000003 +#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_PRIMARY_COLOR 0x00000004 +#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SECONDARY_COLOR 0x00000005 +#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE0 0x00000008 +#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE1 0x00000009 +#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0 0x0000000c +#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE1 0x0000000d +#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0000000e +#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_E_TIMES_F 0x0000000f +#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE2 0x0000000a +#define NV20TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE3 0x0000000b +#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SHIFT 4 +#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_MASK 0x000000f0 +#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_ZERO 0x00000000 +#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR0 0x00000010 +#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR1 0x00000020 +#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_FOG 0x00000030 +#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_PRIMARY_COLOR 0x00000040 +#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SECONDARY_COLOR 0x00000050 +#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE0 0x00000080 +#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE1 0x00000090 +#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0 0x000000c0 +#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE1 0x000000d0 +#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000000e0 +#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_E_TIMES_F 0x000000f0 +#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE2 0x000000a0 +#define NV20TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE3 0x000000b0 +#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SHIFT 8 +#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_MASK 0x00000f00 +#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_ZERO 0x00000000 +#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR0 0x00000100 +#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR1 0x00000200 +#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_FOG 0x00000300 +#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_PRIMARY_COLOR 0x00000400 +#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SECONDARY_COLOR 0x00000500 +#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE0 0x00000800 +#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE1 0x00000900 +#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0 0x00000c00 +#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE1 0x00000d00 +#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_E_TIMES_F 0x00000f00 +#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE2 0x00000a00 +#define NV20TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE3 0x00000b00 +#define NV20TCL_RC_OUT_ALPHA_CD_DOT_PRODUCT (1 << 12) +#define NV20TCL_RC_OUT_ALPHA_AB_DOT_PRODUCT (1 << 13) +#define NV20TCL_RC_OUT_ALPHA_MUX_SUM (1 << 14) +#define NV20TCL_RC_OUT_ALPHA_BIAS (1 << 15) +#define NV20TCL_RC_OUT_ALPHA_BIAS_NONE 0x00000000 +#define NV20TCL_RC_OUT_ALPHA_BIAS_BIAS_BY_NEGATIVE_ONE_HALF 0x00008000 +#define NV20TCL_RC_OUT_ALPHA_SCALE_SHIFT 17 +#define NV20TCL_RC_OUT_ALPHA_SCALE_MASK 0x00000000 +#define NV20TCL_RC_OUT_ALPHA_SCALE_NONE 0x00000000 +#define NV20TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_TWO 0x00020000 +#define NV20TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_FOUR 0x00040000 +#define NV20TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_ONE_HALF 0x00060000 +#define NV20TCL_RC_IN_RGB(x) (0x00000ac0+((x)*4)) +#define NV20TCL_RC_IN_RGB__SIZE 0x00000008 +#define NV20TCL_RC_IN_RGB_D_INPUT_SHIFT 0 +#define NV20TCL_RC_IN_RGB_D_INPUT_MASK 0x0000000f +#define NV20TCL_RC_IN_RGB_D_INPUT_ZERO 0x00000000 +#define NV20TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR0 0x00000001 +#define NV20TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR1 0x00000002 +#define NV20TCL_RC_IN_RGB_D_INPUT_FOG 0x00000003 +#define NV20TCL_RC_IN_RGB_D_INPUT_PRIMARY_COLOR 0x00000004 +#define NV20TCL_RC_IN_RGB_D_INPUT_SECONDARY_COLOR 0x00000005 +#define NV20TCL_RC_IN_RGB_D_INPUT_TEXTURE0 0x00000008 +#define NV20TCL_RC_IN_RGB_D_INPUT_TEXTURE1 0x00000009 +#define NV20TCL_RC_IN_RGB_D_INPUT_SPARE0 0x0000000c +#define NV20TCL_RC_IN_RGB_D_INPUT_SPARE1 0x0000000d +#define NV20TCL_RC_IN_RGB_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0000000e +#define NV20TCL_RC_IN_RGB_D_INPUT_E_TIMES_F 0x0000000f +#define NV20TCL_RC_IN_RGB_D_INPUT_TEXTURE2 0x0000000a +#define NV20TCL_RC_IN_RGB_D_INPUT_TEXTURE3 0x0000000b +#define NV20TCL_RC_IN_RGB_D_COMPONENT_USAGE (1 << 4) +#define NV20TCL_RC_IN_RGB_D_COMPONENT_USAGE_RGB 0x00000000 +#define NV20TCL_RC_IN_RGB_D_COMPONENT_USAGE_ALPHA 0x00000010 +#define NV20TCL_RC_IN_RGB_D_MAPPING_SHIFT 5 +#define NV20TCL_RC_IN_RGB_D_MAPPING_MASK 0x000000e0 +#define NV20TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV20TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_INVERT 0x00000020 +#define NV20TCL_RC_IN_RGB_D_MAPPING_EXPAND_NORMAL 0x00000040 +#define NV20TCL_RC_IN_RGB_D_MAPPING_EXPAND_NEGATE 0x00000060 +#define NV20TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NORMAL 0x00000080 +#define NV20TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NEGATE 0x000000a0 +#define NV20TCL_RC_IN_RGB_D_MAPPING_SIGNED_IDENTITY 0x000000c0 +#define NV20TCL_RC_IN_RGB_D_MAPPING_SIGNED_NEGATE 0x000000e0 +#define NV20TCL_RC_IN_RGB_C_INPUT_SHIFT 8 +#define NV20TCL_RC_IN_RGB_C_INPUT_MASK 0x00000f00 +#define NV20TCL_RC_IN_RGB_C_INPUT_ZERO 0x00000000 +#define NV20TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR0 0x00000100 +#define NV20TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR1 0x00000200 +#define NV20TCL_RC_IN_RGB_C_INPUT_FOG 0x00000300 +#define NV20TCL_RC_IN_RGB_C_INPUT_PRIMARY_COLOR 0x00000400 +#define NV20TCL_RC_IN_RGB_C_INPUT_SECONDARY_COLOR 0x00000500 +#define NV20TCL_RC_IN_RGB_C_INPUT_TEXTURE0 0x00000800 +#define NV20TCL_RC_IN_RGB_C_INPUT_TEXTURE1 0x00000900 +#define NV20TCL_RC_IN_RGB_C_INPUT_SPARE0 0x00000c00 +#define NV20TCL_RC_IN_RGB_C_INPUT_SPARE1 0x00000d00 +#define NV20TCL_RC_IN_RGB_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV20TCL_RC_IN_RGB_C_INPUT_E_TIMES_F 0x00000f00 +#define NV20TCL_RC_IN_RGB_C_INPUT_TEXTURE2 0x00000a00 +#define NV20TCL_RC_IN_RGB_C_INPUT_TEXTURE3 0x00000b00 +#define NV20TCL_RC_IN_RGB_C_COMPONENT_USAGE (1 << 12) +#define NV20TCL_RC_IN_RGB_C_COMPONENT_USAGE_RGB 0x00000000 +#define NV20TCL_RC_IN_RGB_C_COMPONENT_USAGE_ALPHA 0x00001000 +#define NV20TCL_RC_IN_RGB_C_MAPPING_SHIFT 13 +#define NV20TCL_RC_IN_RGB_C_MAPPING_MASK 0x0000e000 +#define NV20TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV20TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_INVERT 0x00002000 +#define NV20TCL_RC_IN_RGB_C_MAPPING_EXPAND_NORMAL 0x00004000 +#define NV20TCL_RC_IN_RGB_C_MAPPING_EXPAND_NEGATE 0x00006000 +#define NV20TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NORMAL 0x00008000 +#define NV20TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NEGATE 0x0000a000 +#define NV20TCL_RC_IN_RGB_C_MAPPING_SIGNED_IDENTITY 0x0000c000 +#define NV20TCL_RC_IN_RGB_C_MAPPING_SIGNED_NEGATE 0x0000e000 +#define NV20TCL_RC_IN_RGB_B_INPUT_SHIFT 16 +#define NV20TCL_RC_IN_RGB_B_INPUT_MASK 0x000f0000 +#define NV20TCL_RC_IN_RGB_B_INPUT_ZERO 0x00000000 +#define NV20TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR0 0x00010000 +#define NV20TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR1 0x00020000 +#define NV20TCL_RC_IN_RGB_B_INPUT_FOG 0x00030000 +#define NV20TCL_RC_IN_RGB_B_INPUT_PRIMARY_COLOR 0x00040000 +#define NV20TCL_RC_IN_RGB_B_INPUT_SECONDARY_COLOR 0x00050000 +#define NV20TCL_RC_IN_RGB_B_INPUT_TEXTURE0 0x00080000 +#define NV20TCL_RC_IN_RGB_B_INPUT_TEXTURE1 0x00090000 +#define NV20TCL_RC_IN_RGB_B_INPUT_SPARE0 0x000c0000 +#define NV20TCL_RC_IN_RGB_B_INPUT_SPARE1 0x000d0000 +#define NV20TCL_RC_IN_RGB_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000e0000 +#define NV20TCL_RC_IN_RGB_B_INPUT_E_TIMES_F 0x000f0000 +#define NV20TCL_RC_IN_RGB_B_INPUT_TEXTURE2 0x000a0000 +#define NV20TCL_RC_IN_RGB_B_INPUT_TEXTURE3 0x000b0000 +#define NV20TCL_RC_IN_RGB_B_COMPONENT_USAGE (1 << 20) +#define NV20TCL_RC_IN_RGB_B_COMPONENT_USAGE_RGB 0x00000000 +#define NV20TCL_RC_IN_RGB_B_COMPONENT_USAGE_ALPHA 0x00100000 +#define NV20TCL_RC_IN_RGB_B_MAPPING_SHIFT 21 +#define NV20TCL_RC_IN_RGB_B_MAPPING_MASK 0x00e00000 +#define NV20TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV20TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_INVERT 0x00200000 +#define NV20TCL_RC_IN_RGB_B_MAPPING_EXPAND_NORMAL 0x00400000 +#define NV20TCL_RC_IN_RGB_B_MAPPING_EXPAND_NEGATE 0x00600000 +#define NV20TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NORMAL 0x00800000 +#define NV20TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NEGATE 0x00a00000 +#define NV20TCL_RC_IN_RGB_B_MAPPING_SIGNED_IDENTITY 0x00c00000 +#define NV20TCL_RC_IN_RGB_B_MAPPING_SIGNED_NEGATE 0x00e00000 +#define NV20TCL_RC_IN_RGB_A_INPUT_SHIFT 24 +#define NV20TCL_RC_IN_RGB_A_INPUT_MASK 0x0f000000 +#define NV20TCL_RC_IN_RGB_A_INPUT_ZERO 0x00000000 +#define NV20TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR0 0x01000000 +#define NV20TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR1 0x02000000 +#define NV20TCL_RC_IN_RGB_A_INPUT_FOG 0x03000000 +#define NV20TCL_RC_IN_RGB_A_INPUT_PRIMARY_COLOR 0x04000000 +#define NV20TCL_RC_IN_RGB_A_INPUT_SECONDARY_COLOR 0x05000000 +#define NV20TCL_RC_IN_RGB_A_INPUT_TEXTURE0 0x08000000 +#define NV20TCL_RC_IN_RGB_A_INPUT_TEXTURE1 0x09000000 +#define NV20TCL_RC_IN_RGB_A_INPUT_SPARE0 0x0c000000 +#define NV20TCL_RC_IN_RGB_A_INPUT_SPARE1 0x0d000000 +#define NV20TCL_RC_IN_RGB_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0e000000 +#define NV20TCL_RC_IN_RGB_A_INPUT_E_TIMES_F 0x0f000000 +#define NV20TCL_RC_IN_RGB_A_INPUT_TEXTURE2 0x0a000000 +#define NV20TCL_RC_IN_RGB_A_INPUT_TEXTURE3 0x0b000000 +#define NV20TCL_RC_IN_RGB_A_COMPONENT_USAGE (1 << 28) +#define NV20TCL_RC_IN_RGB_A_COMPONENT_USAGE_RGB 0x00000000 +#define NV20TCL_RC_IN_RGB_A_COMPONENT_USAGE_ALPHA 0x10000000 +#define NV20TCL_RC_IN_RGB_A_MAPPING_SHIFT 29 +#define NV20TCL_RC_IN_RGB_A_MAPPING_MASK 0xe0000000 +#define NV20TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV20TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_INVERT 0x20000000 +#define NV20TCL_RC_IN_RGB_A_MAPPING_EXPAND_NORMAL 0x40000000 +#define NV20TCL_RC_IN_RGB_A_MAPPING_EXPAND_NEGATE 0x60000000 +#define NV20TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NORMAL 0x80000000 +#define NV20TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NEGATE 0xa0000000 +#define NV20TCL_RC_IN_RGB_A_MAPPING_SIGNED_IDENTITY 0xc0000000 +#define NV20TCL_RC_IN_RGB_A_MAPPING_SIGNED_NEGATE 0xe0000000 +#define NV20TCL_VIEWPORT_SCALE_X 0x00000af0 +#define NV20TCL_VIEWPORT_SCALE_Y 0x00000af4 +#define NV20TCL_VIEWPORT_SCALE_Z 0x00000af8 +#define NV20TCL_VIEWPORT_SCALE_W 0x00000afc +#define NV20TCL_VP_UPLOAD_INST(x) (0x00000b00+((x)*4)) +#define NV20TCL_VP_UPLOAD_INST__SIZE 0x00000004 +#define NV20TCL_VP_UPLOAD_CONST(x) (0x00000b80+((x)*4)) +#define NV20TCL_VP_UPLOAD_CONST__SIZE 0x00000004 +#define NV20TCL_LIGHT_BACK_AMBIENT_R(x) (0x00000c00+((x)*64)) +#define NV20TCL_LIGHT_BACK_AMBIENT_R__SIZE 0x00000008 +#define NV20TCL_LIGHT_BACK_AMBIENT_G(x) (0x00000c04+((x)*64)) +#define NV20TCL_LIGHT_BACK_AMBIENT_G__SIZE 0x00000008 +#define NV20TCL_LIGHT_BACK_AMBIENT_B(x) (0x00000c08+((x)*64)) +#define NV20TCL_LIGHT_BACK_AMBIENT_B__SIZE 0x00000008 +#define NV20TCL_LIGHT_BACK_DIFFUSE_R(x) (0x00000c0c+((x)*64)) +#define NV20TCL_LIGHT_BACK_DIFFUSE_R__SIZE 0x00000008 +#define NV20TCL_LIGHT_BACK_DIFFUSE_G(x) (0x00000c10+((x)*64)) +#define NV20TCL_LIGHT_BACK_DIFFUSE_G__SIZE 0x00000008 +#define NV20TCL_LIGHT_BACK_DIFFUSE_B(x) (0x00000c14+((x)*64)) +#define NV20TCL_LIGHT_BACK_DIFFUSE_B__SIZE 0x00000008 +#define NV20TCL_LIGHT_BACK_SPECULAR_R(x) (0x00000c18+((x)*64)) +#define NV20TCL_LIGHT_BACK_SPECULAR_R__SIZE 0x00000008 +#define NV20TCL_LIGHT_BACK_SPECULAR_G(x) (0x00000c1c+((x)*64)) +#define NV20TCL_LIGHT_BACK_SPECULAR_G__SIZE 0x00000008 +#define NV20TCL_LIGHT_BACK_SPECULAR_B(x) (0x00000c20+((x)*64)) +#define NV20TCL_LIGHT_BACK_SPECULAR_B__SIZE 0x00000008 +#define NV20TCL_LIGHT_FRONT_AMBIENT_R(x) (0x00001000+((x)*128)) +#define NV20TCL_LIGHT_FRONT_AMBIENT_R__SIZE 0x00000008 +#define NV20TCL_LIGHT_FRONT_AMBIENT_G(x) (0x00001004+((x)*128)) +#define NV20TCL_LIGHT_FRONT_AMBIENT_G__SIZE 0x00000008 +#define NV20TCL_LIGHT_FRONT_AMBIENT_B(x) (0x00001008+((x)*128)) +#define NV20TCL_LIGHT_FRONT_AMBIENT_B__SIZE 0x00000008 +#define NV20TCL_LIGHT_FRONT_DIFFUSE_R(x) (0x0000100c+((x)*128)) +#define NV20TCL_LIGHT_FRONT_DIFFUSE_R__SIZE 0x00000008 +#define NV20TCL_LIGHT_FRONT_DIFFUSE_G(x) (0x00001010+((x)*128)) +#define NV20TCL_LIGHT_FRONT_DIFFUSE_G__SIZE 0x00000008 +#define NV20TCL_LIGHT_FRONT_DIFFUSE_B(x) (0x00001014+((x)*128)) +#define NV20TCL_LIGHT_FRONT_DIFFUSE_B__SIZE 0x00000008 +#define NV20TCL_LIGHT_FRONT_SPECULAR_R(x) (0x00001018+((x)*128)) +#define NV20TCL_LIGHT_FRONT_SPECULAR_R__SIZE 0x00000008 +#define NV20TCL_LIGHT_FRONT_SPECULAR_G(x) (0x0000101c+((x)*128)) +#define NV20TCL_LIGHT_FRONT_SPECULAR_G__SIZE 0x00000008 +#define NV20TCL_LIGHT_FRONT_SPECULAR_B(x) (0x00001020+((x)*128)) +#define NV20TCL_LIGHT_FRONT_SPECULAR_B__SIZE 0x00000008 +#define NV20TCL_LIGHT_HALF_VECTOR_X(x) (0x00001028+((x)*128)) +#define NV20TCL_LIGHT_HALF_VECTOR_X__SIZE 0x00000008 +#define NV20TCL_LIGHT_HALF_VECTOR_Y(x) (0x0000102c+((x)*128)) +#define NV20TCL_LIGHT_HALF_VECTOR_Y__SIZE 0x00000008 +#define NV20TCL_LIGHT_HALF_VECTOR_Z(x) (0x00001030+((x)*128)) +#define NV20TCL_LIGHT_HALF_VECTOR_Z__SIZE 0x00000008 +#define NV20TCL_LIGHT_DIRECTION_X(x) (0x00001034+((x)*128)) +#define NV20TCL_LIGHT_DIRECTION_X__SIZE 0x00000008 +#define NV20TCL_LIGHT_DIRECTION_Y(x) (0x00001038+((x)*128)) +#define NV20TCL_LIGHT_DIRECTION_Y__SIZE 0x00000008 +#define NV20TCL_LIGHT_DIRECTION_Z(x) (0x0000103c+((x)*128)) +#define NV20TCL_LIGHT_DIRECTION_Z__SIZE 0x00000008 +#define NV20TCL_LIGHT_SPOT_CUTOFF_A(x) (0x00001040+((x)*128)) +#define NV20TCL_LIGHT_SPOT_CUTOFF_A__SIZE 0x00000008 +#define NV20TCL_LIGHT_SPOT_CUTOFF_B(x) (0x00001044+((x)*128)) +#define NV20TCL_LIGHT_SPOT_CUTOFF_B__SIZE 0x00000008 +#define NV20TCL_LIGHT_SPOT_CUTOFF_C(x) (0x00001048+((x)*128)) +#define NV20TCL_LIGHT_SPOT_CUTOFF_C__SIZE 0x00000008 +#define NV20TCL_LIGHT_SPOT_DIR_X(x) (0x0000104c+((x)*128)) +#define NV20TCL_LIGHT_SPOT_DIR_X__SIZE 0x00000008 +#define NV20TCL_LIGHT_SPOT_DIR_Y(x) (0x00001050+((x)*128)) +#define NV20TCL_LIGHT_SPOT_DIR_Y__SIZE 0x00000008 +#define NV20TCL_LIGHT_SPOT_DIR_Z(x) (0x00001054+((x)*128)) +#define NV20TCL_LIGHT_SPOT_DIR_Z__SIZE 0x00000008 +#define NV20TCL_LIGHT_SPOT_CUTOFF_D(x) (0x00001058+((x)*128)) +#define NV20TCL_LIGHT_SPOT_CUTOFF_D__SIZE 0x00000008 +#define NV20TCL_LIGHT_POSITION_X(x) (0x0000105c+((x)*128)) +#define NV20TCL_LIGHT_POSITION_X__SIZE 0x00000008 +#define NV20TCL_LIGHT_POSITION_Y(x) (0x00001060+((x)*128)) +#define NV20TCL_LIGHT_POSITION_Y__SIZE 0x00000008 +#define NV20TCL_LIGHT_POSITION_Z(x) (0x00001064+((x)*128)) +#define NV20TCL_LIGHT_POSITION_Z__SIZE 0x00000008 +#define NV20TCL_LIGHT_ATTENUATION_CONSTANT(x) (0x00001068+((x)*128)) +#define NV20TCL_LIGHT_ATTENUATION_CONSTANT__SIZE 0x00000008 +#define NV20TCL_LIGHT_ATTENUATION_LINEAR(x) (0x0000106c+((x)*128)) +#define NV20TCL_LIGHT_ATTENUATION_LINEAR__SIZE 0x00000008 +#define NV20TCL_LIGHT_ATTENUATION_QUADRATIC(x) (0x00001070+((x)*128)) +#define NV20TCL_LIGHT_ATTENUATION_QUADRATIC__SIZE 0x00000008 +#define NV20TCL_POLYGON_STIPPLE_ENABLE 0x0000147c +#define NV20TCL_POLYGON_STIPPLE_PATTERN(x) (0x00001480+((x)*4)) +#define NV20TCL_POLYGON_STIPPLE_PATTERN__SIZE 0x00000020 +#define NV20TCL_VERTEX_POS_3F_X 0x00001500 +#define NV20TCL_VERTEX_POS_3F_Y 0x00001504 +#define NV20TCL_VERTEX_POS_3F_Z 0x00001508 +#define NV20TCL_VERTEX_POS_4F_X 0x00001518 +#define NV20TCL_VERTEX_POS_4F_Y 0x0000151c +#define NV20TCL_VERTEX_POS_4F_Z 0x00001520 +#define NV20TCL_VERTEX_POS_3I_XY 0x00001528 +#define NV20TCL_VERTEX_POS_3I_XY_X_SHIFT 0 +#define NV20TCL_VERTEX_POS_3I_XY_X_MASK 0x0000ffff +#define NV20TCL_VERTEX_POS_3I_XY_Y_SHIFT 16 +#define NV20TCL_VERTEX_POS_3I_XY_Y_MASK 0xffff0000 +#define NV20TCL_VERTEX_POS_3I_Z 0x0000152c +#define NV20TCL_VERTEX_POS_3I_Z_Z_SHIFT 0 +#define NV20TCL_VERTEX_POS_3I_Z_Z_MASK 0x0000ffff +#define NV20TCL_VERTEX_NOR_3F_X 0x00001530 +#define NV20TCL_VERTEX_NOR_3F_Y 0x00001534 +#define NV20TCL_VERTEX_NOR_3F_Z 0x00001538 +#define NV20TCL_VERTEX_NOR_3I_XY 0x00001540 +#define NV20TCL_VERTEX_NOR_3I_XY_X_SHIFT 0 +#define NV20TCL_VERTEX_NOR_3I_XY_X_MASK 0x0000ffff +#define NV20TCL_VERTEX_NOR_3I_XY_Y_SHIFT 16 +#define NV20TCL_VERTEX_NOR_3I_XY_Y_MASK 0xffff0000 +#define NV20TCL_VERTEX_NOR_3I_Z 0x00001544 +#define NV20TCL_VERTEX_NOR_3I_Z_Z_SHIFT 0 +#define NV20TCL_VERTEX_NOR_3I_Z_Z_MASK 0x0000ffff +#define NV20TCL_VERTEX_COL_4F_X 0x00001550 +#define NV20TCL_VERTEX_COL_4F_Y 0x00001554 +#define NV20TCL_VERTEX_COL_4F_Z 0x00001558 +#define NV20TCL_VERTEX_COL_4F_W 0x0000155c +#define NV20TCL_VERTEX_COL_3F_X 0x00001560 +#define NV20TCL_VERTEX_COL_3F_Y 0x00001564 +#define NV20TCL_VERTEX_COL_3F_Z 0x00001568 +#define NV20TCL_VERTEX_COL_4I 0x0000156c +#define NV20TCL_VERTEX_COL_4I_R_SHIFT 0 +#define NV20TCL_VERTEX_COL_4I_R_MASK 0x000000ff +#define NV20TCL_VERTEX_COL_4I_G_SHIFT 8 +#define NV20TCL_VERTEX_COL_4I_G_MASK 0x0000ff00 +#define NV20TCL_VERTEX_COL_4I_B_SHIFT 16 +#define NV20TCL_VERTEX_COL_4I_B_MASK 0x00ff0000 +#define NV20TCL_VERTEX_COL_4I_A_SHIFT 24 +#define NV20TCL_VERTEX_COL_4I_A_MASK 0xff000000 +#define NV20TCL_VERTEX_COL2_3F_X 0x00001580 +#define NV20TCL_VERTEX_COL2_3F_Y 0x00001584 +#define NV20TCL_VERTEX_COL2_3F_Z 0x00001588 +#define NV20TCL_VERTEX_COL2_4I 0x0000158c +#define NV20TCL_VERTEX_COL2_4I_R_SHIFT 0 +#define NV20TCL_VERTEX_COL2_4I_R_MASK 0x000000ff +#define NV20TCL_VERTEX_COL2_4I_G_SHIFT 8 +#define NV20TCL_VERTEX_COL2_4I_G_MASK 0x0000ff00 +#define NV20TCL_VERTEX_COL2_4I_B_SHIFT 16 +#define NV20TCL_VERTEX_COL2_4I_B_MASK 0x00ff0000 +#define NV20TCL_VERTEX_COL2_4I_A_SHIFT 24 +#define NV20TCL_VERTEX_COL2_4I_A_MASK 0xff000000 +#define NV20TCL_VERTEX_TX0_2F_S 0x00001590 +#define NV20TCL_VERTEX_TX0_2F_T 0x00001594 +#define NV20TCL_VERTEX_TX0_2I 0x00001598 +#define NV20TCL_VERTEX_TX0_2I_S_SHIFT 0 +#define NV20TCL_VERTEX_TX0_2I_S_MASK 0x0000ffff +#define NV20TCL_VERTEX_TX0_2I_T_SHIFT 16 +#define NV20TCL_VERTEX_TX0_2I_T_MASK 0xffff0000 +#define NV20TCL_VERTEX_TX0_4F_S 0x000015a0 +#define NV20TCL_VERTEX_TX0_4F_T 0x000015a4 +#define NV20TCL_VERTEX_TX0_4F_R 0x000015a8 +#define NV20TCL_VERTEX_TX0_4F_Q 0x000015ac +#define NV20TCL_VERTEX_TX0_4I_ST 0x000015b0 +#define NV20TCL_VERTEX_TX0_4I_ST_S_SHIFT 0 +#define NV20TCL_VERTEX_TX0_4I_ST_S_MASK 0x0000ffff +#define NV20TCL_VERTEX_TX0_4I_ST_T_SHIFT 16 +#define NV20TCL_VERTEX_TX0_4I_ST_T_MASK 0xffff0000 +#define NV20TCL_VERTEX_TX0_4I_RQ 0x000015b4 +#define NV20TCL_VERTEX_TX0_4I_RQ_R_SHIFT 0 +#define NV20TCL_VERTEX_TX0_4I_RQ_R_MASK 0x0000ffff +#define NV20TCL_VERTEX_TX0_4I_RQ_Q_SHIFT 16 +#define NV20TCL_VERTEX_TX0_4I_RQ_Q_MASK 0xffff0000 +#define NV20TCL_VERTEX_TX1_2F_S 0x000015b8 +#define NV20TCL_VERTEX_TX1_2F_T 0x000015bc +#define NV20TCL_VERTEX_TX1_2I 0x000015c0 +#define NV20TCL_VERTEX_TX1_2I_S_SHIFT 0 +#define NV20TCL_VERTEX_TX1_2I_S_MASK 0x0000ffff +#define NV20TCL_VERTEX_TX1_2I_T_SHIFT 16 +#define NV20TCL_VERTEX_TX1_2I_T_MASK 0xffff0000 +#define NV20TCL_VERTEX_TX1_4F_S 0x000015c8 +#define NV20TCL_VERTEX_TX1_4F_T 0x000015cc +#define NV20TCL_VERTEX_TX1_4F_R 0x000015d0 +#define NV20TCL_VERTEX_TX1_4F_Q 0x000015d4 +#define NV20TCL_VERTEX_TX1_4I_ST 0x000015d8 +#define NV20TCL_VERTEX_TX1_4I_ST_S_SHIFT 0 +#define NV20TCL_VERTEX_TX1_4I_ST_S_MASK 0x0000ffff +#define NV20TCL_VERTEX_TX1_4I_ST_T_SHIFT 16 +#define NV20TCL_VERTEX_TX1_4I_ST_T_MASK 0xffff0000 +#define NV20TCL_VERTEX_TX1_4I_RQ 0x000015dc +#define NV20TCL_VERTEX_TX1_4I_RQ_R_SHIFT 0 +#define NV20TCL_VERTEX_TX1_4I_RQ_R_MASK 0x0000ffff +#define NV20TCL_VERTEX_TX1_4I_RQ_Q_SHIFT 16 +#define NV20TCL_VERTEX_TX1_4I_RQ_Q_MASK 0xffff0000 +#define NV20TCL_VERTEX_TX2_2F_S 0x000015e0 +#define NV20TCL_VERTEX_TX2_2F_T 0x000015e4 +#define NV20TCL_VERTEX_TX2_2I 0x000015e8 +#define NV20TCL_VERTEX_TX2_2I_S_SHIFT 0 +#define NV20TCL_VERTEX_TX2_2I_S_MASK 0x0000ffff +#define NV20TCL_VERTEX_TX2_2I_T_SHIFT 16 +#define NV20TCL_VERTEX_TX2_2I_T_MASK 0xffff0000 +#define NV20TCL_VERTEX_TX2_4F_S 0x000015f0 +#define NV20TCL_VERTEX_TX2_4F_T 0x000015f4 +#define NV20TCL_VERTEX_TX2_4F_R 0x000015f8 +#define NV20TCL_VERTEX_TX2_4F_Q 0x000015fc +#define NV20TCL_VERTEX_TX2_4I_ST 0x00001600 +#define NV20TCL_VERTEX_TX2_4I_ST_S_SHIFT 0 +#define NV20TCL_VERTEX_TX2_4I_ST_S_MASK 0x0000ffff +#define NV20TCL_VERTEX_TX2_4I_ST_T_SHIFT 16 +#define NV20TCL_VERTEX_TX2_4I_ST_T_MASK 0xffff0000 +#define NV20TCL_VERTEX_TX2_4I_RQ 0x00001604 +#define NV20TCL_VERTEX_TX2_4I_RQ_R_SHIFT 0 +#define NV20TCL_VERTEX_TX2_4I_RQ_R_MASK 0x0000ffff +#define NV20TCL_VERTEX_TX2_4I_RQ_Q_SHIFT 16 +#define NV20TCL_VERTEX_TX2_4I_RQ_Q_MASK 0xffff0000 +#define NV20TCL_VERTEX_TX3_2F_S 0x00001608 +#define NV20TCL_VERTEX_TX3_2F_T 0x0000160c +#define NV20TCL_VERTEX_TX3_2I 0x00001610 +#define NV20TCL_VERTEX_TX3_2I_S_SHIFT 0 +#define NV20TCL_VERTEX_TX3_2I_S_MASK 0x0000ffff +#define NV20TCL_VERTEX_TX3_2I_T_SHIFT 16 +#define NV20TCL_VERTEX_TX3_2I_T_MASK 0xffff0000 +#define NV20TCL_VERTEX_TX3_4F_S 0x00001620 +#define NV20TCL_VERTEX_TX3_4F_T 0x00001624 +#define NV20TCL_VERTEX_TX3_4F_R 0x00001628 +#define NV20TCL_VERTEX_TX3_4F_Q 0x0000162c +#define NV20TCL_VERTEX_TX3_4I_ST 0x00001630 +#define NV20TCL_VERTEX_TX3_4I_ST_S_SHIFT 0 +#define NV20TCL_VERTEX_TX3_4I_ST_S_MASK 0x0000ffff +#define NV20TCL_VERTEX_TX3_4I_ST_T_SHIFT 16 +#define NV20TCL_VERTEX_TX3_4I_ST_T_MASK 0xffff0000 +#define NV20TCL_VERTEX_TX3_4I_RQ 0x00001634 +#define NV20TCL_VERTEX_TX3_4I_RQ_R_SHIFT 0 +#define NV20TCL_VERTEX_TX3_4I_RQ_R_MASK 0x0000ffff +#define NV20TCL_VERTEX_TX3_4I_RQ_Q_SHIFT 16 +#define NV20TCL_VERTEX_TX3_4I_RQ_Q_MASK 0xffff0000 +#define NV20TCL_VERTEX_FOG_1F 0x00001698 +#define NV20TCL_EDGEFLAG_ENABLE 0x000016bc +#define NV20TCL_VTX_CACHE_INVALIDATE 0x00001710 +#define NV20TCL_VTXBUF_ADDRESS(x) (0x00001720+((x)*4)) +#define NV20TCL_VTXBUF_ADDRESS__SIZE 0x00000010 +#define NV20TCL_VTXBUF_ADDRESS_DMA1 (1 << 31) +#define NV20TCL_VTXBUF_ADDRESS_OFFSET_SHIFT 0 +#define NV20TCL_VTXBUF_ADDRESS_OFFSET_MASK 0x0fffffff +#define NV20TCL_VTXFMT(x) (0x00001760+((x)*4)) +#define NV20TCL_VTXFMT__SIZE 0x00000010 +#define NV20TCL_VTXFMT_TYPE_SHIFT 0 +#define NV20TCL_VTXFMT_TYPE_MASK 0x0000000f +#define NV20TCL_VTXFMT_TYPE_FLOAT 0x00000002 +#define NV20TCL_VTXFMT_TYPE_UBYTE 0x00000004 +#define NV20TCL_VTXFMT_TYPE_USHORT 0x00000005 +#define NV20TCL_VTXFMT_SIZE_SHIFT 4 +#define NV20TCL_VTXFMT_SIZE_MASK 0x000000f0 +#define NV20TCL_VTXFMT_STRIDE_SHIFT 8 +#define NV20TCL_VTXFMT_STRIDE_MASK 0x0000ff00 +#define NV20TCL_LIGHT_MODEL_BACK_AMBIENT_R 0x000017a0 +#define NV20TCL_LIGHT_MODEL_BACK_AMBIENT_G 0x000017a4 +#define NV20TCL_LIGHT_MODEL_BACK_AMBIENT_B 0x000017a8 +#define NV20TCL_MATERIAL_FACTOR_BACK_A 0x000017ac +#define NV20TCL_MATERIAL_FACTOR_BACK_R 0x000017b0 +#define NV20TCL_MATERIAL_FACTOR_BACK_G 0x000017b4 +#define NV20TCL_MATERIAL_FACTOR_BACK_B 0x000017b8 +#define NV20TCL_COLOR_LOGIC_OP_ENABLE 0x000017bc +#define NV20TCL_COLOR_LOGIC_OP_OP 0x000017c0 +#define NV20TCL_COLOR_LOGIC_OP_OP_CLEAR 0x00001500 +#define NV20TCL_COLOR_LOGIC_OP_OP_AND 0x00001501 +#define NV20TCL_COLOR_LOGIC_OP_OP_AND_REVERSE 0x00001502 +#define NV20TCL_COLOR_LOGIC_OP_OP_COPY 0x00001503 +#define NV20TCL_COLOR_LOGIC_OP_OP_AND_INVERTED 0x00001504 +#define NV20TCL_COLOR_LOGIC_OP_OP_NOOP 0x00001505 +#define NV20TCL_COLOR_LOGIC_OP_OP_XOR 0x00001506 +#define NV20TCL_COLOR_LOGIC_OP_OP_OR 0x00001507 +#define NV20TCL_COLOR_LOGIC_OP_OP_NOR 0x00001508 +#define NV20TCL_COLOR_LOGIC_OP_OP_EQUIV 0x00001509 +#define NV20TCL_COLOR_LOGIC_OP_OP_INVERT 0x0000150a +#define NV20TCL_COLOR_LOGIC_OP_OP_OR_REVERSE 0x0000150b +#define NV20TCL_COLOR_LOGIC_OP_OP_COPY_INVERTED 0x0000150c +#define NV20TCL_COLOR_LOGIC_OP_OP_OR_INVERTED 0x0000150d +#define NV20TCL_COLOR_LOGIC_OP_OP_NAND 0x0000150e +#define NV20TCL_COLOR_LOGIC_OP_OP_SET 0x0000150f +#define NV20TCL_LIGHT_MODEL_TWO_SIDE_ENABLE 0x000017c4 +#define NV20TCL_TX_SHADER_CULL_MODE 0x000017f8 +#define NV20TCL_TX_SHADER_CULL_MODE_TX0_S (1 << 0) +#define NV20TCL_TX_SHADER_CULL_MODE_TX0_S_GEQUAL 0x00000000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX0_S_LESS 0x00000001 +#define NV20TCL_TX_SHADER_CULL_MODE_TX0_T (1 << 1) +#define NV20TCL_TX_SHADER_CULL_MODE_TX0_T_GEQUAL 0x00000000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX0_T_LESS 0x00000002 +#define NV20TCL_TX_SHADER_CULL_MODE_TX0_R (1 << 2) +#define NV20TCL_TX_SHADER_CULL_MODE_TX0_R_GEQUAL 0x00000000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX0_R_LESS 0x00000004 +#define NV20TCL_TX_SHADER_CULL_MODE_TX0_Q (1 << 3) +#define NV20TCL_TX_SHADER_CULL_MODE_TX0_Q_GEQUAL 0x00000000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX0_Q_LESS 0x00000008 +#define NV20TCL_TX_SHADER_CULL_MODE_TX1_S (1 << 4) +#define NV20TCL_TX_SHADER_CULL_MODE_TX1_S_GEQUAL 0x00000000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX1_S_LESS 0x00000010 +#define NV20TCL_TX_SHADER_CULL_MODE_TX1_T (1 << 5) +#define NV20TCL_TX_SHADER_CULL_MODE_TX1_T_GEQUAL 0x00000000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX1_T_LESS 0x00000020 +#define NV20TCL_TX_SHADER_CULL_MODE_TX1_R (1 << 6) +#define NV20TCL_TX_SHADER_CULL_MODE_TX1_R_GEQUAL 0x00000000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX1_R_LESS 0x00000040 +#define NV20TCL_TX_SHADER_CULL_MODE_TX1_Q (1 << 7) +#define NV20TCL_TX_SHADER_CULL_MODE_TX1_Q_GEQUAL 0x00000000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX1_Q_LESS 0x00000080 +#define NV20TCL_TX_SHADER_CULL_MODE_TX2_S (1 << 8) +#define NV20TCL_TX_SHADER_CULL_MODE_TX2_S_GEQUAL 0x00000000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX2_S_LESS 0x00000100 +#define NV20TCL_TX_SHADER_CULL_MODE_TX2_T (1 << 9) +#define NV20TCL_TX_SHADER_CULL_MODE_TX2_T_GEQUAL 0x00000000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX2_T_LESS 0x00000200 +#define NV20TCL_TX_SHADER_CULL_MODE_TX2_R (1 << 10) +#define NV20TCL_TX_SHADER_CULL_MODE_TX2_R_GEQUAL 0x00000000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX2_R_LESS 0x00000400 +#define NV20TCL_TX_SHADER_CULL_MODE_TX2_Q (1 << 11) +#define NV20TCL_TX_SHADER_CULL_MODE_TX2_Q_GEQUAL 0x00000000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX2_Q_LESS 0x00000800 +#define NV20TCL_TX_SHADER_CULL_MODE_TX3_S (1 << 12) +#define NV20TCL_TX_SHADER_CULL_MODE_TX3_S_GEQUAL 0x00000000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX3_S_LESS 0x00001000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX3_T (1 << 13) +#define NV20TCL_TX_SHADER_CULL_MODE_TX3_T_GEQUAL 0x00000000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX3_T_LESS 0x00002000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX3_R (1 << 14) +#define NV20TCL_TX_SHADER_CULL_MODE_TX3_R_GEQUAL 0x00000000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX3_R_LESS 0x00004000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX3_Q (1 << 15) +#define NV20TCL_TX_SHADER_CULL_MODE_TX3_Q_GEQUAL 0x00000000 +#define NV20TCL_TX_SHADER_CULL_MODE_TX3_Q_LESS 0x00008000 +#define NV20TCL_VERTEX_BEGIN_END 0x000017fc +#define NV20TCL_VERTEX_BEGIN_END_STOP 0x00000000 +#define NV20TCL_VERTEX_BEGIN_END_POINTS 0x00000001 +#define NV20TCL_VERTEX_BEGIN_END_LINES 0x00000002 +#define NV20TCL_VERTEX_BEGIN_END_LINE_LOOP 0x00000003 +#define NV20TCL_VERTEX_BEGIN_END_LINE_STRIP 0x00000004 +#define NV20TCL_VERTEX_BEGIN_END_TRIANGLES 0x00000005 +#define NV20TCL_VERTEX_BEGIN_END_TRIANGLE_STRIP 0x00000006 +#define NV20TCL_VERTEX_BEGIN_END_TRIANGLE_FAN 0x00000007 +#define NV20TCL_VERTEX_BEGIN_END_QUADS 0x00000008 +#define NV20TCL_VERTEX_BEGIN_END_QUAD_STRIP 0x00000009 +#define NV20TCL_VERTEX_BEGIN_END_POLYGON 0x0000000a +#define NV20TCL_VB_ELEMENT_U16 0x00001800 +#define NV20TCL_VB_ELEMENT_U16_I0_SHIFT 0 +#define NV20TCL_VB_ELEMENT_U16_I0_MASK 0x0000ffff +#define NV20TCL_VB_ELEMENT_U16_I1_SHIFT 16 +#define NV20TCL_VB_ELEMENT_U16_I1_MASK 0xffff0000 +#define NV20TCL_VB_ELEMENT_U32 0x00001808 +#define NV20TCL_VB_VERTEX_BATCH 0x00001810 +#define NV20TCL_VB_VERTEX_BATCH_OFFSET_SHIFT 0 +#define NV20TCL_VB_VERTEX_BATCH_OFFSET_MASK 0x00ffffff +#define NV20TCL_VB_VERTEX_BATCH_COUNT_SHIFT 24 +#define NV20TCL_VB_VERTEX_BATCH_COUNT_MASK 0xff000000 +#define NV20TCL_VERTEX_DATA 0x00001818 +#define NV20TCL_TX_SHADER_CONST_EYE_X 0x0000181c +#define NV20TCL_TX_SHADER_CONST_EYE_Y 0x00001820 +#define NV20TCL_TX_SHADER_CONST_EYE_Z 0x00001824 +#define NV20TCL_VTX_ATTR_4F_X(x) (0x00001a00+((x)*16)) +#define NV20TCL_VTX_ATTR_4F_X__SIZE 0x00000010 +#define NV20TCL_VTX_ATTR_4F_Y(x) (0x00001a04+((x)*16)) +#define NV20TCL_VTX_ATTR_4F_Y__SIZE 0x00000010 +#define NV20TCL_VTX_ATTR_4F_Z(x) (0x00001a08+((x)*16)) +#define NV20TCL_VTX_ATTR_4F_Z__SIZE 0x00000010 +#define NV20TCL_VTX_ATTR_4F_W(x) (0x00001a0c+((x)*16)) +#define NV20TCL_VTX_ATTR_4F_W__SIZE 0x00000010 +#define NV20TCL_TX_OFFSET(x) (0x00001b00+((x)*64)) +#define NV20TCL_TX_OFFSET__SIZE 0x00000004 +#define NV20TCL_TX_FORMAT(x) (0x00001b04+((x)*64)) +#define NV20TCL_TX_FORMAT__SIZE 0x00000004 +#define NV20TCL_TX_FORMAT_DMA0 (1 << 0) +#define NV20TCL_TX_FORMAT_DMA1 (1 << 1) +#define NV20TCL_TX_FORMAT_CUBIC (1 << 2) +#define NV20TCL_TX_FORMAT_NO_BORDER (1 << 3) +#define NV20TCL_TX_FORMAT_DIMS_SHIFT 4 +#define NV20TCL_TX_FORMAT_DIMS_MASK 0x000000f0 +#define NV20TCL_TX_FORMAT_DIMS_1D 0x00000010 +#define NV20TCL_TX_FORMAT_DIMS_2D 0x00000020 +#define NV20TCL_TX_FORMAT_DIMS_3D 0x00000030 +#define NV20TCL_TX_FORMAT_FORMAT_SHIFT 8 +#define NV20TCL_TX_FORMAT_FORMAT_MASK 0x0000ff00 +#define NV20TCL_TX_FORMAT_FORMAT_L8 0x00000000 +#define NV20TCL_TX_FORMAT_FORMAT_A8 0x00000100 +#define NV20TCL_TX_FORMAT_FORMAT_A1R5G5B5 0x00000200 +#define NV20TCL_TX_FORMAT_FORMAT_A4R4G4B4 0x00000400 +#define NV20TCL_TX_FORMAT_FORMAT_R5G6B5 0x00000500 +#define NV20TCL_TX_FORMAT_FORMAT_A8R8G8B8 0x00000600 +#define NV20TCL_TX_FORMAT_FORMAT_X8R8G8B8 0x00000700 +#define NV20TCL_TX_FORMAT_FORMAT_INDEX8 0x00000b00 +#define NV20TCL_TX_FORMAT_FORMAT_DXT1 0x00000c00 +#define NV20TCL_TX_FORMAT_FORMAT_DXT3 0x00000e00 +#define NV20TCL_TX_FORMAT_FORMAT_DXT5 0x00000f00 +#define NV20TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT 0x00001000 +#define NV20TCL_TX_FORMAT_FORMAT_R5G6B5_RECT 0x00001100 +#define NV20TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT 0x00001200 +#define NV20TCL_TX_FORMAT_FORMAT_L8_RECT 0x00001300 +#define NV20TCL_TX_FORMAT_FORMAT_DSDT8_RECT 0x00001700 +#define NV20TCL_TX_FORMAT_FORMAT_A8L8 0x00001a00 +#define NV20TCL_TX_FORMAT_FORMAT_A8_RECT 0x00001b00 +#define NV20TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT 0x00001d00 +#define NV20TCL_TX_FORMAT_FORMAT_R8G8B8_RECT 0x00001e00 +#define NV20TCL_TX_FORMAT_FORMAT_A8L8_RECT 0x00002000 +#define NV20TCL_TX_FORMAT_FORMAT_DSDT8 0x00002800 +#define NV20TCL_TX_FORMAT_FORMAT_HILO16 0x00003300 +#define NV20TCL_TX_FORMAT_FORMAT_HILO16_RECT 0x00003600 +#define NV20TCL_TX_FORMAT_FORMAT_HILO8 0x00004400 +#define NV20TCL_TX_FORMAT_FORMAT_SIGNED_HILO8 0x00004500 +#define NV20TCL_TX_FORMAT_FORMAT_HILO8_RECT 0x00004600 +#define NV20TCL_TX_FORMAT_FORMAT_SIGNED_HILO8_RECT 0x00004700 +#define NV20TCL_TX_FORMAT_FORMAT_A16 0x00003200 +#define NV20TCL_TX_FORMAT_FORMAT_A16_RECT 0x00003500 +#define NV20TCL_TX_FORMAT_FORMAT_FLOAT_RGBA16_NV 0x00004a00 +#define NV20TCL_TX_FORMAT_FORMAT_FLOAT_RGBA32_NV 0x00004b00 +#define NV20TCL_TX_FORMAT_FORMAT_FLOAT_R32_NV 0x00004c00 +#define NV20TCL_TX_FORMAT_MIPMAP (1 << 19) +#define NV20TCL_TX_FORMAT_BASE_SIZE_U_SHIFT 20 +#define NV20TCL_TX_FORMAT_BASE_SIZE_U_MASK 0x00f00000 +#define NV20TCL_TX_FORMAT_BASE_SIZE_V_SHIFT 24 +#define NV20TCL_TX_FORMAT_BASE_SIZE_V_MASK 0x0f000000 +#define NV20TCL_TX_FORMAT_BASE_SIZE_W_SHIFT 28 +#define NV20TCL_TX_FORMAT_BASE_SIZE_W_MASK 0xf0000000 +#define NV20TCL_TX_WRAP(x) (0x00001b08+((x)*64)) +#define NV20TCL_TX_WRAP__SIZE 0x00000004 +#define NV20TCL_TX_WRAP_S_SHIFT 0 +#define NV20TCL_TX_WRAP_S_MASK 0x000000ff +#define NV20TCL_TX_WRAP_S_REPEAT 0x00000001 +#define NV20TCL_TX_WRAP_S_MIRRORED_REPEAT 0x00000002 +#define NV20TCL_TX_WRAP_S_CLAMP_TO_EDGE 0x00000003 +#define NV20TCL_TX_WRAP_S_CLAMP_TO_BORDER 0x00000004 +#define NV20TCL_TX_WRAP_S_CLAMP 0x00000005 +#define NV20TCL_TX_WRAP_T_SHIFT 8 +#define NV20TCL_TX_WRAP_T_MASK 0x00000f00 +#define NV20TCL_TX_WRAP_T_REPEAT 0x00000100 +#define NV20TCL_TX_WRAP_T_MIRRORED_REPEAT 0x00000200 +#define NV20TCL_TX_WRAP_T_CLAMP_TO_EDGE 0x00000300 +#define NV20TCL_TX_WRAP_T_CLAMP_TO_BORDER 0x00000400 +#define NV20TCL_TX_WRAP_T_CLAMP 0x00000500 +#define NV20TCL_TX_WRAP_R_SHIFT 16 +#define NV20TCL_TX_WRAP_R_MASK 0x000f0000 +#define NV20TCL_TX_WRAP_R_REPEAT 0x00010000 +#define NV20TCL_TX_WRAP_R_MIRRORED_REPEAT 0x00020000 +#define NV20TCL_TX_WRAP_R_CLAMP_TO_EDGE 0x00030000 +#define NV20TCL_TX_WRAP_R_CLAMP_TO_BORDER 0x00040000 +#define NV20TCL_TX_WRAP_R_CLAMP 0x00050000 +#define NV20TCL_TX_ENABLE(x) (0x00001b0c+((x)*64)) +#define NV20TCL_TX_ENABLE__SIZE 0x00000004 +#define NV20TCL_TX_ENABLE_ANISO_SHIFT 4 +#define NV20TCL_TX_ENABLE_ANISO_MASK 0x00000030 +#define NV20TCL_TX_ENABLE_ANISO_NONE 0x00000000 +#define NV20TCL_TX_ENABLE_ANISO_2X 0x00000010 +#define NV20TCL_TX_ENABLE_ANISO_4X 0x00000020 +#define NV20TCL_TX_ENABLE_ANISO_8X 0x00000030 +#define NV20TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT 14 +#define NV20TCL_TX_ENABLE_MIPMAP_MAX_LOD_MASK 0x0003c000 +#define NV20TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT 26 +#define NV20TCL_TX_ENABLE_MIPMAP_MIN_LOD_MASK 0x3c000000 +#define NV20TCL_TX_ENABLE_ENABLE (1 << 30) +#define NV20TCL_TX_NPOT_PITCH(x) (0x00001b10+((x)*64)) +#define NV20TCL_TX_NPOT_PITCH__SIZE 0x00000004 +#define NV20TCL_TX_NPOT_PITCH_PITCH_SHIFT 16 +#define NV20TCL_TX_NPOT_PITCH_PITCH_MASK 0xffff0000 +#define NV20TCL_TX_FILTER(x) (0x00001b14+((x)*64)) +#define NV20TCL_TX_FILTER__SIZE 0x00000004 +#define NV20TCL_TX_FILTER_LOD_BIAS_SHIFT 8 +#define NV20TCL_TX_FILTER_LOD_BIAS_MASK 0x00000f00 +#define NV20TCL_TX_FILTER_MINIFY_SHIFT 16 +#define NV20TCL_TX_FILTER_MINIFY_MASK 0x000f0000 +#define NV20TCL_TX_FILTER_MINIFY_NEAREST 0x00010000 +#define NV20TCL_TX_FILTER_MINIFY_LINEAR 0x00020000 +#define NV20TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST 0x00030000 +#define NV20TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST 0x00040000 +#define NV20TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR 0x00050000 +#define NV20TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR 0x00060000 +#define NV20TCL_TX_FILTER_MAGNIFY_SHIFT 24 +#define NV20TCL_TX_FILTER_MAGNIFY_MASK 0x0f000000 +#define NV20TCL_TX_FILTER_MAGNIFY_NEAREST 0x01000000 +#define NV20TCL_TX_FILTER_MAGNIFY_LINEAR 0x02000000 +#define NV20TCL_TX_NPOT_SIZE(x) (0x00001b1c+((x)*64)) +#define NV20TCL_TX_NPOT_SIZE__SIZE 0x00000004 +#define NV20TCL_TX_NPOT_SIZE_H_SHIFT 0 +#define NV20TCL_TX_NPOT_SIZE_H_MASK 0x0000ffff +#define NV20TCL_TX_NPOT_SIZE_W_SHIFT 16 +#define NV20TCL_TX_NPOT_SIZE_W_MASK 0xffff0000 +#define NV20TCL_TX_PALETTE_OFFSET(x) (0x00001b20+((x)*64)) +#define NV20TCL_TX_PALETTE_OFFSET__SIZE 0x00000004 +#define NV20TCL_TX_BORDER_COLOR(x) (0x00001b24+((x)*64)) +#define NV20TCL_TX_BORDER_COLOR__SIZE 0x00000004 +#define NV20TCL_TX_BORDER_COLOR_B_SHIFT 0 +#define NV20TCL_TX_BORDER_COLOR_B_MASK 0x000000ff +#define NV20TCL_TX_BORDER_COLOR_G_SHIFT 8 +#define NV20TCL_TX_BORDER_COLOR_G_MASK 0x0000ff00 +#define NV20TCL_TX_BORDER_COLOR_R_SHIFT 16 +#define NV20TCL_TX_BORDER_COLOR_R_MASK 0x00ff0000 +#define NV20TCL_TX_BORDER_COLOR_A_SHIFT 24 +#define NV20TCL_TX_BORDER_COLOR_A_MASK 0xff000000 +#define NV20TCL_TX_SHADER_OFFSET_MATRIX00(x) (0x00001b28+((x)*64)) +#define NV20TCL_TX_SHADER_OFFSET_MATRIX00__SIZE 0x00000004 +#define NV20TCL_TX_SHADER_OFFSET_MATRIX01(x) (0x00001b2c+((x)*64)) +#define NV20TCL_TX_SHADER_OFFSET_MATRIX01__SIZE 0x00000004 +#define NV20TCL_TX_SHADER_OFFSET_MATRIX11(x) (0x00001b30+((x)*64)) +#define NV20TCL_TX_SHADER_OFFSET_MATRIX11__SIZE 0x00000004 +#define NV20TCL_TX_SHADER_OFFSET_MATRIX10(x) (0x00001b34+((x)*64)) +#define NV20TCL_TX_SHADER_OFFSET_MATRIX10__SIZE 0x00000004 +#define NV20TCL_DEPTH_UNK17D8 0x00001d78 +#define NV20TCL_DEPTH_UNK17D8_CLAMP_SHIFT 4 +#define NV20TCL_DEPTH_UNK17D8_CLAMP_MASK 0x000000f0 +#define NV20TCL_MULTISAMPLE_CONTROL 0x00001d7c +#define NV20TCL_CLEAR_DEPTH_VALUE 0x00001d8c +#define NV20TCL_CLEAR_VALUE 0x00001d90 +#define NV20TCL_CLEAR_BUFFERS 0x00001d94 +#define NV20TCL_CLEAR_BUFFERS_COLOR_A (1 << 7) +#define NV20TCL_CLEAR_BUFFERS_COLOR_B (1 << 6) +#define NV20TCL_CLEAR_BUFFERS_COLOR_G (1 << 5) +#define NV20TCL_CLEAR_BUFFERS_COLOR_R (1 << 4) +#define NV20TCL_CLEAR_BUFFERS_STENCIL (1 << 1) +#define NV20TCL_CLEAR_BUFFERS_DEPTH (1 << 0) +#define NV20TCL_RC_COLOR0 0x00001e20 +#define NV20TCL_RC_COLOR0_B_SHIFT 0 +#define NV20TCL_RC_COLOR0_B_MASK 0x000000ff +#define NV20TCL_RC_COLOR0_G_SHIFT 8 +#define NV20TCL_RC_COLOR0_G_MASK 0x0000ff00 +#define NV20TCL_RC_COLOR0_R_SHIFT 16 +#define NV20TCL_RC_COLOR0_R_MASK 0x00ff0000 +#define NV20TCL_RC_COLOR0_A_SHIFT 24 +#define NV20TCL_RC_COLOR0_A_MASK 0xff000000 +#define NV20TCL_RC_COLOR1 0x00001e24 +#define NV20TCL_RC_COLOR1_B_SHIFT 0 +#define NV20TCL_RC_COLOR1_B_MASK 0x000000ff +#define NV20TCL_RC_COLOR1_G_SHIFT 8 +#define NV20TCL_RC_COLOR1_G_MASK 0x0000ff00 +#define NV20TCL_RC_COLOR1_R_SHIFT 16 +#define NV20TCL_RC_COLOR1_R_MASK 0x00ff0000 +#define NV20TCL_RC_COLOR1_A_SHIFT 24 +#define NV20TCL_RC_COLOR1_A_MASK 0xff000000 +#define NV20TCL_BACK_MATERIAL_SHININESS(x) (0x00001e28+((x)*4)) +#define NV20TCL_BACK_MATERIAL_SHININESS__SIZE 0x00000006 +#define NV20TCL_RC_OUT_RGB(x) (0x00001e40+((x)*4)) +#define NV20TCL_RC_OUT_RGB__SIZE 0x00000008 +#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_SHIFT 0 +#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_MASK 0x0000000f +#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_ZERO 0x00000000 +#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR0 0x00000001 +#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR1 0x00000002 +#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_FOG 0x00000003 +#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_PRIMARY_COLOR 0x00000004 +#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_SECONDARY_COLOR 0x00000005 +#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE0 0x00000008 +#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE1 0x00000009 +#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0 0x0000000c +#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_SPARE1 0x0000000d +#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0000000e +#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_E_TIMES_F 0x0000000f +#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE2 0x0000000a +#define NV20TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE3 0x0000000b +#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_SHIFT 4 +#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_MASK 0x000000f0 +#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_ZERO 0x00000000 +#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR0 0x00000010 +#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR1 0x00000020 +#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_FOG 0x00000030 +#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_PRIMARY_COLOR 0x00000040 +#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_SECONDARY_COLOR 0x00000050 +#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE0 0x00000080 +#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE1 0x00000090 +#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0 0x000000c0 +#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_SPARE1 0x000000d0 +#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000000e0 +#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_E_TIMES_F 0x000000f0 +#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE2 0x000000a0 +#define NV20TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE3 0x000000b0 +#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SHIFT 8 +#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_MASK 0x00000f00 +#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_ZERO 0x00000000 +#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR0 0x00000100 +#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR1 0x00000200 +#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_FOG 0x00000300 +#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_PRIMARY_COLOR 0x00000400 +#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SECONDARY_COLOR 0x00000500 +#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE0 0x00000800 +#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE1 0x00000900 +#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0 0x00000c00 +#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE1 0x00000d00 +#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_E_TIMES_F 0x00000f00 +#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE2 0x00000a00 +#define NV20TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE3 0x00000b00 +#define NV20TCL_RC_OUT_RGB_CD_DOT_PRODUCT (1 << 12) +#define NV20TCL_RC_OUT_RGB_AB_DOT_PRODUCT (1 << 13) +#define NV20TCL_RC_OUT_RGB_MUX_SUM (1 << 14) +#define NV20TCL_RC_OUT_RGB_BIAS (1 << 15) +#define NV20TCL_RC_OUT_RGB_BIAS_NONE 0x00000000 +#define NV20TCL_RC_OUT_RGB_BIAS_BIAS_BY_NEGATIVE_ONE_HALF 0x00008000 +#define NV20TCL_RC_OUT_RGB_SCALE_SHIFT 17 +#define NV20TCL_RC_OUT_RGB_SCALE_MASK 0x00000000 +#define NV20TCL_RC_OUT_RGB_SCALE_NONE 0x00000000 +#define NV20TCL_RC_OUT_RGB_SCALE_SCALE_BY_TWO 0x00020000 +#define NV20TCL_RC_OUT_RGB_SCALE_SCALE_BY_FOUR 0x00040000 +#define NV20TCL_RC_OUT_RGB_SCALE_SCALE_BY_ONE_HALF 0x00060000 +#define NV20TCL_RC_ENABLE 0x00001e60 +#define NV20TCL_RC_ENABLE_NUM_COMBINERS_SHIFT 0 +#define NV20TCL_RC_ENABLE_NUM_COMBINERS_MASK 0x0000000f +#define NV20TCL_TX_RCOMP 0x00001e6c +#define NV20TCL_TX_RCOMP_NEVER 0x00000000 +#define NV20TCL_TX_RCOMP_GREATER 0x00000001 +#define NV20TCL_TX_RCOMP_EQUAL 0x00000002 +#define NV20TCL_TX_RCOMP_GEQUAL 0x00000003 +#define NV20TCL_TX_RCOMP_LESS 0x00000004 +#define NV20TCL_TX_RCOMP_NOTEQUAL 0x00000005 +#define NV20TCL_TX_RCOMP_LEQUAL 0x00000006 +#define NV20TCL_TX_RCOMP_ALWAYS 0x00000007 +#define NV20TCL_TX_SHADER_OP 0x00001e70 +#define NV20TCL_TX_SHADER_OP_TX0_SHIFT 0 +#define NV20TCL_TX_SHADER_OP_TX0_MASK 0x0000001f +#define NV20TCL_TX_SHADER_OP_TX0_NONE 0x00000000 +#define NV20TCL_TX_SHADER_OP_TX0_TEXTURE_2D 0x00000001 +#define NV20TCL_TX_SHADER_OP_TX0_PASS_THROUGH 0x00000004 +#define NV20TCL_TX_SHADER_OP_TX0_CULL_FRAGMENT 0x00000005 +#define NV20TCL_TX_SHADER_OP_TX0_OFFSET_TEXTURE_2D 0x00000006 +#define NV20TCL_TX_SHADER_OP_TX0_DOT_PRODUCT_TEXTURE_2D 0x00000009 +#define NV20TCL_TX_SHADER_OP_TX0_DOT_PRODUCT_DEPTH_REPLACE 0x0000000a +#define NV20TCL_TX_SHADER_OP_TX0_DEPENDANT_AR_TEXTURE_2D 0x0000000f +#define NV20TCL_TX_SHADER_OP_TX0_DEPENDANT_GB_TEXTURE_2D 0x00000010 +#define NV20TCL_TX_SHADER_OP_TX0_DOT_PRODUCT 0x00000011 +#define NV20TCL_TX_SHADER_OP_TX1_SHIFT 5 +#define NV20TCL_TX_SHADER_OP_TX1_MASK 0x000003e0 +#define NV20TCL_TX_SHADER_OP_TX1_NONE 0x00000000 +#define NV20TCL_TX_SHADER_OP_TX1_TEXTURE_2D 0x00000020 +#define NV20TCL_TX_SHADER_OP_TX1_PASS_THROUGH 0x00000080 +#define NV20TCL_TX_SHADER_OP_TX1_CULL_FRAGMENT 0x000000a0 +#define NV20TCL_TX_SHADER_OP_TX1_OFFSET_TEXTURE_2D 0x000000c0 +#define NV20TCL_TX_SHADER_OP_TX1_DOT_PRODUCT_TEXTURE_2D 0x00000120 +#define NV20TCL_TX_SHADER_OP_TX1_DOT_PRODUCT_DEPTH_REPLACE 0x00000140 +#define NV20TCL_TX_SHADER_OP_TX1_DEPENDANT_AR_TEXTURE_2D 0x000001e0 +#define NV20TCL_TX_SHADER_OP_TX1_DEPENDANT_GB_TEXTURE_2D 0x00000200 +#define NV20TCL_TX_SHADER_OP_TX1_DOT_PRODUCT 0x00000220 +#define NV20TCL_TX_SHADER_OP_TX2_SHIFT 10 +#define NV20TCL_TX_SHADER_OP_TX2_MASK 0x00007c00 +#define NV20TCL_TX_SHADER_OP_TX2_NONE 0x00000000 +#define NV20TCL_TX_SHADER_OP_TX2_TEXTURE_2D 0x00000400 +#define NV20TCL_TX_SHADER_OP_TX2_PASS_THROUGH 0x00001000 +#define NV20TCL_TX_SHADER_OP_TX2_CULL_FRAGMENT 0x00001400 +#define NV20TCL_TX_SHADER_OP_TX2_OFFSET_TEXTURE_2D 0x00001800 +#define NV20TCL_TX_SHADER_OP_TX2_DOT_PRODUCT_TEXTURE_2D 0x00002400 +#define NV20TCL_TX_SHADER_OP_TX2_DOT_PRODUCT_DEPTH_REPLACE 0x00002800 +#define NV20TCL_TX_SHADER_OP_TX2_DEPENDANT_AR_TEXTURE_2D 0x00003c00 +#define NV20TCL_TX_SHADER_OP_TX2_DEPENDANT_GB_TEXTURE_2D 0x00004000 +#define NV20TCL_TX_SHADER_OP_TX2_DOT_PRODUCT 0x00004400 +#define NV20TCL_TX_SHADER_OP_TX3_SHIFT 15 +#define NV20TCL_TX_SHADER_OP_TX3_MASK 0x000f8000 +#define NV20TCL_TX_SHADER_OP_TX3_NONE 0x00000000 +#define NV20TCL_TX_SHADER_OP_TX3_TEXTURE_2D 0x00008000 +#define NV20TCL_TX_SHADER_OP_TX3_PASS_THROUGH 0x00020000 +#define NV20TCL_TX_SHADER_OP_TX3_CULL_FRAGMENT 0x00028000 +#define NV20TCL_TX_SHADER_OP_TX3_OFFSET_TEXTURE_2D 0x00030000 +#define NV20TCL_TX_SHADER_OP_TX3_DOT_PRODUCT_TEXTURE_2D 0x00048000 +#define NV20TCL_TX_SHADER_OP_TX3_DOT_PRODUCT_DEPTH_REPLACE 0x00050000 +#define NV20TCL_TX_SHADER_OP_TX3_DEPENDANT_AR_TEXTURE_2D 0x00078000 +#define NV20TCL_TX_SHADER_OP_TX3_DEPENDANT_GB_TEXTURE_2D 0x00080000 +#define NV20TCL_TX_SHADER_OP_TX3_DOT_PRODUCT 0x00088000 +#define NV20TCL_TX_SHADER_DOTMAPPING 0x00001e74 +#define NV20TCL_TX_SHADER_DOTMAPPING_TX0_SHIFT 0 +#define NV20TCL_TX_SHADER_DOTMAPPING_TX0_MASK 0x0000000f +#define NV20TCL_TX_SHADER_DOTMAPPING_TX1_SHIFT 4 +#define NV20TCL_TX_SHADER_DOTMAPPING_TX1_MASK 0x000000f0 +#define NV20TCL_TX_SHADER_DOTMAPPING_TX2_SHIFT 8 +#define NV20TCL_TX_SHADER_DOTMAPPING_TX2_MASK 0x00000f00 +#define NV20TCL_TX_SHADER_DOTMAPPING_TX3_SHIFT 12 +#define NV20TCL_TX_SHADER_DOTMAPPING_TX3_MASK 0x0000f000 +#define NV20TCL_TX_SHADER_PREVIOUS 0x00001e78 +#define NV20TCL_TX_SHADER_PREVIOUS_TX0_SHIFT 8 +#define NV20TCL_TX_SHADER_PREVIOUS_TX0_MASK 0x00000f00 +#define NV20TCL_TX_SHADER_PREVIOUS_TX1_SHIFT 12 +#define NV20TCL_TX_SHADER_PREVIOUS_TX1_MASK 0x0000f000 +#define NV20TCL_TX_SHADER_PREVIOUS_TX2_SHIFT 16 +#define NV20TCL_TX_SHADER_PREVIOUS_TX2_MASK 0x00030000 +#define NV20TCL_TX_SHADER_PREVIOUS_TX3_SHIFT 20 +#define NV20TCL_TX_SHADER_PREVIOUS_TX3_MASK 0x00300000 +#define NV20TCL_ENGINE 0x00001e94 +#define NV20TCL_ENGINE_VP (1 << 1) +#define NV20TCL_ENGINE_FIXED (1 << 2) +#define NV20TCL_VP_UPLOAD_FROM_ID 0x00001e9c +#define NV20TCL_VP_START_FROM_ID 0x00001ea0 +#define NV20TCL_VP_UPLOAD_CONST_ID 0x00001ea4 + + +#define NV25TCL 0x00000597 + +#define NV25TCL_DMA_IN_MEMORY4 0x0000019c +#define NV25TCL_DMA_IN_MEMORY5 0x000001a0 +#define NV25TCL_DMA_IN_MEMORY8 0x000001ac +#define NV25TCL_DMA_IN_MEMORY9 0x000001b0 + + +#define NV30TCL 0x00000397 + + + +#define NV35TCL 0x00000497 + + + +#define NV34TCL 0x00000697 + +#define NV34TCL_NOP 0x00000100 +#define NV34TCL_NOTIFY 0x00000104 +#define NV34TCL_DMA_NOTIFY 0x00000180 +#define NV34TCL_DMA_TEXTURE0 0x00000184 +#define NV34TCL_DMA_TEXTURE1 0x00000188 +#define NV34TCL_DMA_COLOR1 0x0000018c +#define NV34TCL_DMA_COLOR0 0x00000194 +#define NV34TCL_DMA_ZETA 0x00000198 +#define NV34TCL_DMA_VTXBUF0 0x0000019c +#define NV34TCL_DMA_VTXBUF1 0x000001a0 +#define NV34TCL_DMA_FENCE 0x000001a4 +#define NV34TCL_DMA_QUERY 0x000001a8 +#define NV34TCL_DMA_IN_MEMORY7 0x000001ac +#define NV34TCL_DMA_IN_MEMORY8 0x000001b0 +#define NV34TCL_RT_HORIZ 0x00000200 +#define NV34TCL_RT_HORIZ_X_SHIFT 0 +#define NV34TCL_RT_HORIZ_X_MASK 0x0000ffff +#define NV34TCL_RT_HORIZ_W_SHIFT 16 +#define NV34TCL_RT_HORIZ_W_MASK 0xffff0000 +#define NV34TCL_RT_VERT 0x00000204 +#define NV34TCL_RT_VERT_Y_SHIFT 0 +#define NV34TCL_RT_VERT_Y_MASK 0x0000ffff +#define NV34TCL_RT_VERT_H_SHIFT 16 +#define NV34TCL_RT_VERT_H_MASK 0xffff0000 +#define NV34TCL_RT_FORMAT 0x00000208 +#define NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT 24 +#define NV34TCL_RT_FORMAT_LOG2_HEIGHT_MASK 0xff000000 +#define NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT 16 +#define NV34TCL_RT_FORMAT_LOG2_WIDTH_MASK 0x00ff0000 +#define NV34TCL_RT_FORMAT_TYPE_SHIFT 8 +#define NV34TCL_RT_FORMAT_TYPE_MASK 0x00000f00 +#define NV34TCL_RT_FORMAT_TYPE_LINEAR 0x00000100 +#define NV34TCL_RT_FORMAT_TYPE_SWIZZLED 0x00000200 +#define NV34TCL_RT_FORMAT_ZETA_SHIFT 5 +#define NV34TCL_RT_FORMAT_ZETA_MASK 0x000000e0 +#define NV34TCL_RT_FORMAT_ZETA_Z16 0x00000020 +#define NV34TCL_RT_FORMAT_ZETA_Z24S8 0x00000040 +#define NV34TCL_RT_FORMAT_COLOR_SHIFT 0 +#define NV34TCL_RT_FORMAT_COLOR_MASK 0x0000001f +#define NV34TCL_RT_FORMAT_COLOR_R5G6B5 0x00000003 +#define NV34TCL_RT_FORMAT_COLOR_X8R8G8B8 0x00000005 +#define NV34TCL_RT_FORMAT_COLOR_A8R8G8B8 0x00000008 +#define NV34TCL_RT_FORMAT_COLOR_B8 0x00000009 +#define NV34TCL_RT_FORMAT_COLOR_UNKNOWN 0x0000000d +#define NV34TCL_RT_FORMAT_COLOR_X8B8G8R8 0x0000000f +#define NV34TCL_RT_FORMAT_COLOR_A8B8G8R8 0x00000010 +#define NV34TCL_COLOR0_PITCH 0x0000020c +#define NV34TCL_COLOR0_PITCH_COLOR0_SHIFT 0 +#define NV34TCL_COLOR0_PITCH_COLOR0_MASK 0x0000ffff +#define NV34TCL_COLOR0_PITCH_ZETA_SHIFT 16 +#define NV34TCL_COLOR0_PITCH_ZETA_MASK 0xffff0000 +#define NV34TCL_COLOR0_OFFSET 0x00000210 +#define NV34TCL_ZETA_OFFSET 0x00000214 +#define NV34TCL_COLOR1_OFFSET 0x00000218 +#define NV34TCL_COLOR1_PITCH 0x0000021c +#define NV34TCL_RT_ENABLE 0x00000220 +#define NV34TCL_RT_ENABLE_MRT (1 << 4) +#define NV34TCL_RT_ENABLE_COLOR1 (1 << 1) +#define NV34TCL_RT_ENABLE_COLOR0 (1 << 0) +#define NV34TCL_LMA_DEPTH_PITCH 0x0000022c +#define NV34TCL_LMA_DEPTH_OFFSET 0x00000230 +#define NV34TCL_TX_UNITS_ENABLE 0x0000023c +#define NV34TCL_TX_UNITS_ENABLE_TX0 (1 << 0) +#define NV34TCL_TX_UNITS_ENABLE_TX1 (1 << 1) +#define NV34TCL_TX_UNITS_ENABLE_TX2 (1 << 2) +#define NV34TCL_TX_UNITS_ENABLE_TX3 (1 << 3) +#define NV34TCL_TX_UNITS_ENABLE_TX4 (1 << 4) +#define NV34TCL_TX_UNITS_ENABLE_TX5 (1 << 5) +#define NV34TCL_TX_UNITS_ENABLE_TX6 (1 << 6) +#define NV34TCL_TX_UNITS_ENABLE_TX7 (1 << 7) +#define NV34TCL_TX_MATRIX_ENABLE(x) (0x00000240+((x)*4)) +#define NV34TCL_TX_MATRIX_ENABLE__SIZE 0x00000008 +#define NV34TCL_VIEWPORT_TX_ORIGIN 0x000002b8 +#define NV34TCL_VIEWPORT_TX_ORIGIN_X_SHIFT 0 +#define NV34TCL_VIEWPORT_TX_ORIGIN_X_MASK 0x0000ffff +#define NV34TCL_VIEWPORT_TX_ORIGIN_Y_SHIFT 16 +#define NV34TCL_VIEWPORT_TX_ORIGIN_Y_MASK 0xffff0000 +#define NV34TCL_VIEWPORT_CLIP_MODE 0x000002bc +#define NV34TCL_VIEWPORT_CLIP_HORIZ(x) (0x000002c0+((x)*8)) +#define NV34TCL_VIEWPORT_CLIP_HORIZ__SIZE 0x00000008 +#define NV34TCL_VIEWPORT_CLIP_HORIZ_L_SHIFT 0 +#define NV34TCL_VIEWPORT_CLIP_HORIZ_L_MASK 0x0000ffff +#define NV34TCL_VIEWPORT_CLIP_HORIZ_R_SHIFT 16 +#define NV34TCL_VIEWPORT_CLIP_HORIZ_R_MASK 0xffff0000 +#define NV34TCL_VIEWPORT_CLIP_VERT(x) (0x000002c4+((x)*8)) +#define NV34TCL_VIEWPORT_CLIP_VERT__SIZE 0x00000008 +#define NV34TCL_VIEWPORT_CLIP_VERT_T_SHIFT 0 +#define NV34TCL_VIEWPORT_CLIP_VERT_T_MASK 0x0000ffff +#define NV34TCL_VIEWPORT_CLIP_VERT_D_SHIFT 16 +#define NV34TCL_VIEWPORT_CLIP_VERT_D_MASK 0xffff0000 +#define NV34TCL_DITHER_ENABLE 0x00000300 +#define NV34TCL_ALPHA_FUNC_ENABLE 0x00000304 +#define NV34TCL_ALPHA_FUNC_FUNC 0x00000308 +#define NV34TCL_ALPHA_FUNC_FUNC_NEVER 0x00000200 +#define NV34TCL_ALPHA_FUNC_FUNC_LESS 0x00000201 +#define NV34TCL_ALPHA_FUNC_FUNC_EQUAL 0x00000202 +#define NV34TCL_ALPHA_FUNC_FUNC_LEQUAL 0x00000203 +#define NV34TCL_ALPHA_FUNC_FUNC_GREATER 0x00000204 +#define NV34TCL_ALPHA_FUNC_FUNC_NOTEQUAL 0x00000205 +#define NV34TCL_ALPHA_FUNC_FUNC_GEQUAL 0x00000206 +#define NV34TCL_ALPHA_FUNC_FUNC_ALWAYS 0x00000207 +#define NV34TCL_ALPHA_FUNC_REF 0x0000030c +#define NV34TCL_BLEND_FUNC_ENABLE 0x00000310 +#define NV34TCL_BLEND_FUNC_SRC 0x00000314 +#define NV34TCL_BLEND_FUNC_SRC_RGB_SHIFT 0 +#define NV34TCL_BLEND_FUNC_SRC_RGB_MASK 0x0000ffff +#define NV34TCL_BLEND_FUNC_SRC_RGB_ZERO 0x00000000 +#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE 0x00000001 +#define NV34TCL_BLEND_FUNC_SRC_RGB_SRC_COLOR 0x00000300 +#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_COLOR 0x00000301 +#define NV34TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA 0x00000302 +#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_ALPHA 0x00000303 +#define NV34TCL_BLEND_FUNC_SRC_RGB_DST_ALPHA 0x00000304 +#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_ALPHA 0x00000305 +#define NV34TCL_BLEND_FUNC_SRC_RGB_DST_COLOR 0x00000306 +#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_COLOR 0x00000307 +#define NV34TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA_SATURATE 0x00000308 +#define NV34TCL_BLEND_FUNC_SRC_RGB_CONSTANT_COLOR 0x00008001 +#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002 +#define NV34TCL_BLEND_FUNC_SRC_RGB_CONSTANT_ALPHA 0x00008003 +#define NV34TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004 +#define NV34TCL_BLEND_FUNC_SRC_ALPHA_SHIFT 16 +#define NV34TCL_BLEND_FUNC_SRC_ALPHA_MASK 0xffff0000 +#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ZERO 0x00000000 +#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE 0x00010000 +#define NV34TCL_BLEND_FUNC_SRC_ALPHA_SRC_COLOR 0x03000000 +#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_COLOR 0x03010000 +#define NV34TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA 0x03020000 +#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_ALPHA 0x03030000 +#define NV34TCL_BLEND_FUNC_SRC_ALPHA_DST_ALPHA 0x03040000 +#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_ALPHA 0x03050000 +#define NV34TCL_BLEND_FUNC_SRC_ALPHA_DST_COLOR 0x03060000 +#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_COLOR 0x03070000 +#define NV34TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA_SATURATE 0x03080000 +#define NV34TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_COLOR 0x80010000 +#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x80020000 +#define NV34TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_ALPHA 0x80030000 +#define NV34TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x80040000 +#define NV34TCL_BLEND_FUNC_DST 0x00000318 +#define NV34TCL_BLEND_FUNC_DST_RGB_SHIFT 0 +#define NV34TCL_BLEND_FUNC_DST_RGB_MASK 0x0000ffff +#define NV34TCL_BLEND_FUNC_DST_RGB_ZERO 0x00000000 +#define NV34TCL_BLEND_FUNC_DST_RGB_ONE 0x00000001 +#define NV34TCL_BLEND_FUNC_DST_RGB_SRC_COLOR 0x00000300 +#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_COLOR 0x00000301 +#define NV34TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA 0x00000302 +#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_ALPHA 0x00000303 +#define NV34TCL_BLEND_FUNC_DST_RGB_DST_ALPHA 0x00000304 +#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_ALPHA 0x00000305 +#define NV34TCL_BLEND_FUNC_DST_RGB_DST_COLOR 0x00000306 +#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_COLOR 0x00000307 +#define NV34TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA_SATURATE 0x00000308 +#define NV34TCL_BLEND_FUNC_DST_RGB_CONSTANT_COLOR 0x00008001 +#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002 +#define NV34TCL_BLEND_FUNC_DST_RGB_CONSTANT_ALPHA 0x00008003 +#define NV34TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004 +#define NV34TCL_BLEND_FUNC_DST_ALPHA_SHIFT 16 +#define NV34TCL_BLEND_FUNC_DST_ALPHA_MASK 0xffff0000 +#define NV34TCL_BLEND_FUNC_DST_ALPHA_ZERO 0x00000000 +#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE 0x00010000 +#define NV34TCL_BLEND_FUNC_DST_ALPHA_SRC_COLOR 0x03000000 +#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_COLOR 0x03010000 +#define NV34TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA 0x03020000 +#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_ALPHA 0x03030000 +#define NV34TCL_BLEND_FUNC_DST_ALPHA_DST_ALPHA 0x03040000 +#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_ALPHA 0x03050000 +#define NV34TCL_BLEND_FUNC_DST_ALPHA_DST_COLOR 0x03060000 +#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_COLOR 0x03070000 +#define NV34TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA_SATURATE 0x03080000 +#define NV34TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_COLOR 0x80010000 +#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x80020000 +#define NV34TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_ALPHA 0x80030000 +#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x80040000 +#define NV34TCL_BLEND_COLOR 0x0000031c +#define NV34TCL_BLEND_COLOR_B_SHIFT 0 +#define NV34TCL_BLEND_COLOR_B_MASK 0x000000ff +#define NV34TCL_BLEND_COLOR_G_SHIFT 8 +#define NV34TCL_BLEND_COLOR_G_MASK 0x0000ff00 +#define NV34TCL_BLEND_COLOR_R_SHIFT 16 +#define NV34TCL_BLEND_COLOR_R_MASK 0x00ff0000 +#define NV34TCL_BLEND_COLOR_A_SHIFT 24 +#define NV34TCL_BLEND_COLOR_A_MASK 0xff000000 +#define NV34TCL_BLEND_EQUATION 0x00000320 +#define NV34TCL_BLEND_EQUATION_FUNC_ADD 0x00008006 +#define NV34TCL_BLEND_EQUATION_MIN 0x00008007 +#define NV34TCL_BLEND_EQUATION_MAX 0x00008008 +#define NV34TCL_BLEND_EQUATION_FUNC_SUBTRACT 0x0000800a +#define NV34TCL_BLEND_EQUATION_FUNC_REVERSE_SUBTRACT 0x0000800b +#define NV34TCL_COLOR_MASK 0x00000324 +#define NV34TCL_COLOR_MASK_B_SHIFT 0 +#define NV34TCL_COLOR_MASK_B_MASK 0x000000ff +#define NV34TCL_COLOR_MASK_G_SHIFT 8 +#define NV34TCL_COLOR_MASK_G_MASK 0x0000ff00 +#define NV34TCL_COLOR_MASK_R_SHIFT 16 +#define NV34TCL_COLOR_MASK_R_MASK 0x00ff0000 +#define NV34TCL_COLOR_MASK_A_SHIFT 24 +#define NV34TCL_COLOR_MASK_A_MASK 0xff000000 +#define NV34TCL_STENCIL_FRONT_ENABLE 0x00000328 +#define NV34TCL_STENCIL_FRONT_MASK 0x0000032c +#define NV34TCL_STENCIL_FRONT_FUNC_FUNC 0x00000330 +#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_NEVER 0x00000200 +#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_LESS 0x00000201 +#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_EQUAL 0x00000202 +#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_LEQUAL 0x00000203 +#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_GREATER 0x00000204 +#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_NOTEQUAL 0x00000205 +#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_GEQUAL 0x00000206 +#define NV34TCL_STENCIL_FRONT_FUNC_FUNC_ALWAYS 0x00000207 +#define NV34TCL_STENCIL_FRONT_FUNC_REF 0x00000334 +#define NV34TCL_STENCIL_FRONT_FUNC_MASK 0x00000338 +#define NV34TCL_STENCIL_FRONT_OP_FAIL 0x0000033c +#define NV34TCL_STENCIL_FRONT_OP_FAIL_ZERO 0x00000000 +#define NV34TCL_STENCIL_FRONT_OP_FAIL_INVERT 0x0000150a +#define NV34TCL_STENCIL_FRONT_OP_FAIL_KEEP 0x00001e00 +#define NV34TCL_STENCIL_FRONT_OP_FAIL_REPLACE 0x00001e01 +#define NV34TCL_STENCIL_FRONT_OP_FAIL_INCR 0x00001e02 +#define NV34TCL_STENCIL_FRONT_OP_FAIL_DECR 0x00001e03 +#define NV34TCL_STENCIL_FRONT_OP_FAIL_INCR_WRAP 0x00008507 +#define NV34TCL_STENCIL_FRONT_OP_FAIL_DECR_WRAP 0x00008508 +#define NV34TCL_STENCIL_FRONT_OP_ZFAIL 0x00000340 +#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_ZERO 0x00000000 +#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_INVERT 0x0000150a +#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_KEEP 0x00001e00 +#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_REPLACE 0x00001e01 +#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_INCR 0x00001e02 +#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_DECR 0x00001e03 +#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_INCR_WRAP 0x00008507 +#define NV34TCL_STENCIL_FRONT_OP_ZFAIL_DECR_WRAP 0x00008508 +#define NV34TCL_STENCIL_FRONT_OP_ZPASS 0x00000344 +#define NV34TCL_STENCIL_FRONT_OP_ZPASS_ZERO 0x00000000 +#define NV34TCL_STENCIL_FRONT_OP_ZPASS_INVERT 0x0000150a +#define NV34TCL_STENCIL_FRONT_OP_ZPASS_KEEP 0x00001e00 +#define NV34TCL_STENCIL_FRONT_OP_ZPASS_REPLACE 0x00001e01 +#define NV34TCL_STENCIL_FRONT_OP_ZPASS_INCR 0x00001e02 +#define NV34TCL_STENCIL_FRONT_OP_ZPASS_DECR 0x00001e03 +#define NV34TCL_STENCIL_FRONT_OP_ZPASS_INCR_WRAP 0x00008507 +#define NV34TCL_STENCIL_FRONT_OP_ZPASS_DECR_WRAP 0x00008508 +#define NV34TCL_STENCIL_BACK_ENABLE 0x00000348 +#define NV34TCL_STENCIL_BACK_MASK 0x0000034c +#define NV34TCL_STENCIL_BACK_FUNC_FUNC 0x00000350 +#define NV34TCL_STENCIL_BACK_FUNC_FUNC_NEVER 0x00000200 +#define NV34TCL_STENCIL_BACK_FUNC_FUNC_LESS 0x00000201 +#define NV34TCL_STENCIL_BACK_FUNC_FUNC_EQUAL 0x00000202 +#define NV34TCL_STENCIL_BACK_FUNC_FUNC_LEQUAL 0x00000203 +#define NV34TCL_STENCIL_BACK_FUNC_FUNC_GREATER 0x00000204 +#define NV34TCL_STENCIL_BACK_FUNC_FUNC_NOTEQUAL 0x00000205 +#define NV34TCL_STENCIL_BACK_FUNC_FUNC_GEQUAL 0x00000206 +#define NV34TCL_STENCIL_BACK_FUNC_FUNC_ALWAYS 0x00000207 +#define NV34TCL_STENCIL_BACK_FUNC_REF 0x00000354 +#define NV34TCL_STENCIL_BACK_FUNC_MASK 0x00000358 +#define NV34TCL_STENCIL_BACK_OP_FAIL 0x0000035c +#define NV34TCL_STENCIL_BACK_OP_FAIL_ZERO 0x00000000 +#define NV34TCL_STENCIL_BACK_OP_FAIL_INVERT 0x0000150a +#define NV34TCL_STENCIL_BACK_OP_FAIL_KEEP 0x00001e00 +#define NV34TCL_STENCIL_BACK_OP_FAIL_REPLACE 0x00001e01 +#define NV34TCL_STENCIL_BACK_OP_FAIL_INCR 0x00001e02 +#define NV34TCL_STENCIL_BACK_OP_FAIL_DECR 0x00001e03 +#define NV34TCL_STENCIL_BACK_OP_FAIL_INCR_WRAP 0x00008507 +#define NV34TCL_STENCIL_BACK_OP_FAIL_DECR_WRAP 0x00008508 +#define NV34TCL_STENCIL_BACK_OP_ZFAIL 0x00000360 +#define NV34TCL_STENCIL_BACK_OP_ZFAIL_ZERO 0x00000000 +#define NV34TCL_STENCIL_BACK_OP_ZFAIL_INVERT 0x0000150a +#define NV34TCL_STENCIL_BACK_OP_ZFAIL_KEEP 0x00001e00 +#define NV34TCL_STENCIL_BACK_OP_ZFAIL_REPLACE 0x00001e01 +#define NV34TCL_STENCIL_BACK_OP_ZFAIL_INCR 0x00001e02 +#define NV34TCL_STENCIL_BACK_OP_ZFAIL_DECR 0x00001e03 +#define NV34TCL_STENCIL_BACK_OP_ZFAIL_INCR_WRAP 0x00008507 +#define NV34TCL_STENCIL_BACK_OP_ZFAIL_DECR_WRAP 0x00008508 +#define NV34TCL_STENCIL_BACK_OP_ZPASS 0x00000364 +#define NV34TCL_STENCIL_BACK_OP_ZPASS_ZERO 0x00000000 +#define NV34TCL_STENCIL_BACK_OP_ZPASS_INVERT 0x0000150a +#define NV34TCL_STENCIL_BACK_OP_ZPASS_KEEP 0x00001e00 +#define NV34TCL_STENCIL_BACK_OP_ZPASS_REPLACE 0x00001e01 +#define NV34TCL_STENCIL_BACK_OP_ZPASS_INCR 0x00001e02 +#define NV34TCL_STENCIL_BACK_OP_ZPASS_DECR 0x00001e03 +#define NV34TCL_STENCIL_BACK_OP_ZPASS_INCR_WRAP 0x00008507 +#define NV34TCL_STENCIL_BACK_OP_ZPASS_DECR_WRAP 0x00008508 +#define NV34TCL_SHADE_MODEL 0x00000368 +#define NV34TCL_SHADE_MODEL_FLAT 0x00001d00 +#define NV34TCL_SHADE_MODEL_SMOOTH 0x00001d01 +#define NV34TCL_FOG_ENABLE 0x0000036c +#define NV34TCL_FOG_COLOR 0x00000370 +#define NV34TCL_FOG_COLOR_R_SHIFT 0 +#define NV34TCL_FOG_COLOR_R_MASK 0x000000ff +#define NV34TCL_FOG_COLOR_G_SHIFT 8 +#define NV34TCL_FOG_COLOR_G_MASK 0x0000ff00 +#define NV34TCL_FOG_COLOR_B_SHIFT 16 +#define NV34TCL_FOG_COLOR_B_MASK 0x00ff0000 +#define NV34TCL_FOG_COLOR_A_SHIFT 24 +#define NV34TCL_FOG_COLOR_A_MASK 0xff000000 +#define NV34TCL_COLOR_LOGIC_OP_ENABLE 0x00000374 +#define NV34TCL_COLOR_LOGIC_OP_OP 0x00000378 +#define NV34TCL_COLOR_LOGIC_OP_OP_CLEAR 0x00001500 +#define NV34TCL_COLOR_LOGIC_OP_OP_AND 0x00001501 +#define NV34TCL_COLOR_LOGIC_OP_OP_AND_REVERSE 0x00001502 +#define NV34TCL_COLOR_LOGIC_OP_OP_COPY 0x00001503 +#define NV34TCL_COLOR_LOGIC_OP_OP_AND_INVERTED 0x00001504 +#define NV34TCL_COLOR_LOGIC_OP_OP_NOOP 0x00001505 +#define NV34TCL_COLOR_LOGIC_OP_OP_XOR 0x00001506 +#define NV34TCL_COLOR_LOGIC_OP_OP_OR 0x00001507 +#define NV34TCL_COLOR_LOGIC_OP_OP_NOR 0x00001508 +#define NV34TCL_COLOR_LOGIC_OP_OP_EQUIV 0x00001509 +#define NV34TCL_COLOR_LOGIC_OP_OP_INVERT 0x0000150a +#define NV34TCL_COLOR_LOGIC_OP_OP_OR_REVERSE 0x0000150b +#define NV34TCL_COLOR_LOGIC_OP_OP_COPY_INVERTED 0x0000150c +#define NV34TCL_COLOR_LOGIC_OP_OP_OR_INVERTED 0x0000150d +#define NV34TCL_COLOR_LOGIC_OP_OP_NAND 0x0000150e +#define NV34TCL_COLOR_LOGIC_OP_OP_SET 0x0000150f +#define NV34TCL_NORMALIZE_ENABLE 0x0000037c +#define NV34TCL_COLOR_MATERIAL 0x00000390 +#define NV34TCL_COLOR_MATERIAL_FRONT_EMISSION_ENABLE (1 << 0) +#define NV34TCL_COLOR_MATERIAL_FRONT_AMBIENT_ENABLE (1 << 2) +#define NV34TCL_COLOR_MATERIAL_FRONT_DIFFUSE_ENABLE (1 << 4) +#define NV34TCL_COLOR_MATERIAL_FRONT_SPECULAR_ENABLE (1 << 6) +#define NV34TCL_COLOR_MATERIAL_BACK_EMISSION_ENABLE (1 << 8) +#define NV34TCL_COLOR_MATERIAL_BACK_AMBIENT_ENABLE (1 << 10) +#define NV34TCL_COLOR_MATERIAL_BACK_DIFFUSE_ENABLE (1 << 12) +#define NV34TCL_COLOR_MATERIAL_BACK_SPECULAR_ENABLE (1 << 14) +#define NV34TCL_DEPTH_RANGE_NEAR 0x00000394 +#define NV34TCL_DEPTH_RANGE_FAR 0x00000398 +#define NV34TCL_COLOR_MATERIAL_FRONT_R 0x000003a0 +#define NV34TCL_COLOR_MATERIAL_FRONT_G 0x000003a4 +#define NV34TCL_COLOR_MATERIAL_FRONT_B 0x000003a8 +#define NV34TCL_COLOR_MATERIAL_FRONT_A 0x000003b4 +#define NV34TCL_LINE_WIDTH 0x000003b8 +#define NV34TCL_LINE_SMOOTH_ENABLE 0x000003bc +#define NV34TCL_TX_GEN_S(x) (0x00000400+((x)*16)) +#define NV34TCL_TX_GEN_S__SIZE 0x00000008 +#define NV34TCL_TX_GEN_S_FALSE 0x00000000 +#define NV34TCL_TX_GEN_S_EYE_LINEAR 0x00002400 +#define NV34TCL_TX_GEN_S_OBJECT_LINEAR 0x00002401 +#define NV34TCL_TX_GEN_S_SPHERE_MAP 0x00002402 +#define NV34TCL_TX_GEN_S_NORMAL_MAP 0x00008511 +#define NV34TCL_TX_GEN_S_REFLECTION_MAP 0x00008512 +#define NV34TCL_TX_GEN_T(x) (0x00000404+((x)*16)) +#define NV34TCL_TX_GEN_T__SIZE 0x00000008 +#define NV34TCL_TX_GEN_T_FALSE 0x00000000 +#define NV34TCL_TX_GEN_T_EYE_LINEAR 0x00002400 +#define NV34TCL_TX_GEN_T_OBJECT_LINEAR 0x00002401 +#define NV34TCL_TX_GEN_T_SPHERE_MAP 0x00002402 +#define NV34TCL_TX_GEN_T_NORMAL_MAP 0x00008511 +#define NV34TCL_TX_GEN_T_REFLECTION_MAP 0x00008512 +#define NV34TCL_TX_GEN_R(x) (0x00000408+((x)*16)) +#define NV34TCL_TX_GEN_R__SIZE 0x00000008 +#define NV34TCL_TX_GEN_R_FALSE 0x00000000 +#define NV34TCL_TX_GEN_R_EYE_LINEAR 0x00002400 +#define NV34TCL_TX_GEN_R_OBJECT_LINEAR 0x00002401 +#define NV34TCL_TX_GEN_R_SPHERE_MAP 0x00002402 +#define NV34TCL_TX_GEN_R_NORMAL_MAP 0x00008511 +#define NV34TCL_TX_GEN_R_REFLECTION_MAP 0x00008512 +#define NV34TCL_TX_GEN_Q(x) (0x0000040c+((x)*16)) +#define NV34TCL_TX_GEN_Q__SIZE 0x00000008 +#define NV34TCL_TX_GEN_Q_FALSE 0x00000000 +#define NV34TCL_TX_GEN_Q_EYE_LINEAR 0x00002400 +#define NV34TCL_TX_GEN_Q_OBJECT_LINEAR 0x00002401 +#define NV34TCL_TX_GEN_Q_SPHERE_MAP 0x00002402 +#define NV34TCL_TX_GEN_Q_NORMAL_MAP 0x00008511 +#define NV34TCL_TX_GEN_Q_REFLECTION_MAP 0x00008512 +#define NV34TCL_MODELVIEW_MATRIX(x) (0x00000480+((x)*4)) +#define NV34TCL_MODELVIEW_MATRIX__SIZE 0x00000010 +#define NV34TCL_INVERSE_MODELVIEW_MATRIX(x) (0x00000580+((x)*4)) +#define NV34TCL_INVERSE_MODELVIEW_MATRIX__SIZE 0x0000000c +#define NV34TCL_PROJECTION_MATRIX(x) (0x00000680+((x)*4)) +#define NV34TCL_PROJECTION_MATRIX__SIZE 0x00000010 +#define NV34TCL_TX0_MATRIX(x) (0x000006c0+((x)*4)) +#define NV34TCL_TX0_MATRIX__SIZE 0x00000010 +#define NV34TCL_TX1_MATRIX(x) (0x00000700+((x)*4)) +#define NV34TCL_TX1_MATRIX__SIZE 0x00000010 +#define NV34TCL_TX2_MATRIX(x) (0x00000740+((x)*4)) +#define NV34TCL_TX2_MATRIX__SIZE 0x00000010 +#define NV34TCL_TX3_MATRIX(x) (0x00000780+((x)*4)) +#define NV34TCL_TX3_MATRIX__SIZE 0x00000010 +#define NV34TCL_TX4_MATRIX(x) (0x000007c0+((x)*4)) +#define NV34TCL_TX4_MATRIX__SIZE 0x00000010 +#define NV34TCL_TX5_MATRIX(x) (0x00000800+((x)*4)) +#define NV34TCL_TX5_MATRIX__SIZE 0x00000010 +#define NV34TCL_TX6_MATRIX(x) (0x00000840+((x)*4)) +#define NV34TCL_TX6_MATRIX__SIZE 0x00000010 +#define NV34TCL_TX7_MATRIX(x) (0x00000880+((x)*4)) +#define NV34TCL_TX7_MATRIX__SIZE 0x00000010 +#define NV34TCL_SCISSOR_HORIZ 0x000008c0 +#define NV34TCL_SCISSOR_HORIZ_X_SHIFT 0 +#define NV34TCL_SCISSOR_HORIZ_X_MASK 0x0000ffff +#define NV34TCL_SCISSOR_HORIZ_W_SHIFT 16 +#define NV34TCL_SCISSOR_HORIZ_W_MASK 0xffff0000 +#define NV34TCL_SCISSOR_VERT 0x000008c4 +#define NV34TCL_SCISSOR_VERT_Y_SHIFT 0 +#define NV34TCL_SCISSOR_VERT_Y_MASK 0x0000ffff +#define NV34TCL_SCISSOR_VERT_H_SHIFT 16 +#define NV34TCL_SCISSOR_VERT_H_MASK 0xffff0000 +#define NV34TCL_FOG_COORD_DIST 0x000008c8 +#define NV34TCL_FOG_MODE 0x000008cc +#define NV34TCL_FOG_EQUATION_CONSTANT 0x000008d0 +#define NV34TCL_FOG_EQUATION_LINEAR 0x000008d4 +#define NV34TCL_FOG_EQUATION_QUADRATIC 0x000008d8 +#define NV34TCL_FP_ACTIVE_PROGRAM 0x000008e4 +#define NV34TCL_FP_ACTIVE_PROGRAM_DMA0 (1 << 0) +#define NV34TCL_FP_ACTIVE_PROGRAM_DMA1 (1 << 1) +#define NV34TCL_FP_ACTIVE_PROGRAM_OFFSET_SHIFT 2 +#define NV34TCL_FP_ACTIVE_PROGRAM_OFFSET_MASK 0xfffffffc +#define NV34TCL_RC_COLOR0 0x000008ec +#define NV34TCL_RC_COLOR0_B_SHIFT 0 +#define NV34TCL_RC_COLOR0_B_MASK 0x000000ff +#define NV34TCL_RC_COLOR0_G_SHIFT 8 +#define NV34TCL_RC_COLOR0_G_MASK 0x0000ff00 +#define NV34TCL_RC_COLOR0_R_SHIFT 16 +#define NV34TCL_RC_COLOR0_R_MASK 0x00ff0000 +#define NV34TCL_RC_COLOR0_A_SHIFT 24 +#define NV34TCL_RC_COLOR0_A_MASK 0xff000000 +#define NV34TCL_RC_COLOR1 0x000008f0 +#define NV34TCL_RC_COLOR1_B_SHIFT 0 +#define NV34TCL_RC_COLOR1_B_MASK 0x000000ff +#define NV34TCL_RC_COLOR1_G_SHIFT 8 +#define NV34TCL_RC_COLOR1_G_MASK 0x0000ff00 +#define NV34TCL_RC_COLOR1_R_SHIFT 16 +#define NV34TCL_RC_COLOR1_R_MASK 0x00ff0000 +#define NV34TCL_RC_COLOR1_A_SHIFT 24 +#define NV34TCL_RC_COLOR1_A_MASK 0xff000000 +#define NV34TCL_RC_FINAL0 0x000008f4 +#define NV34TCL_RC_FINAL0_D_INPUT_SHIFT 0 +#define NV34TCL_RC_FINAL0_D_INPUT_MASK 0x0000000f +#define NV34TCL_RC_FINAL0_D_INPUT_ZERO 0x00000000 +#define NV34TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR0 0x00000001 +#define NV34TCL_RC_FINAL0_D_INPUT_CONSTANT_COLOR1 0x00000002 +#define NV34TCL_RC_FINAL0_D_INPUT_FOG 0x00000003 +#define NV34TCL_RC_FINAL0_D_INPUT_PRIMARY_COLOR 0x00000004 +#define NV34TCL_RC_FINAL0_D_INPUT_SECONDARY_COLOR 0x00000005 +#define NV34TCL_RC_FINAL0_D_INPUT_TEXTURE0 0x00000008 +#define NV34TCL_RC_FINAL0_D_INPUT_TEXTURE1 0x00000009 +#define NV34TCL_RC_FINAL0_D_INPUT_SPARE0 0x0000000c +#define NV34TCL_RC_FINAL0_D_INPUT_SPARE1 0x0000000d +#define NV34TCL_RC_FINAL0_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0000000e +#define NV34TCL_RC_FINAL0_D_INPUT_E_TIMES_F 0x0000000f +#define NV34TCL_RC_FINAL0_D_INPUT_TEXTURE2 0x0000000a +#define NV34TCL_RC_FINAL0_D_INPUT_TEXTURE3 0x0000000b +#define NV34TCL_RC_FINAL0_D_COMPONENT_USAGE (1 << 4) +#define NV34TCL_RC_FINAL0_D_COMPONENT_USAGE_RGB 0x00000000 +#define NV34TCL_RC_FINAL0_D_COMPONENT_USAGE_ALPHA 0x00000010 +#define NV34TCL_RC_FINAL0_D_MAPPING_SHIFT 5 +#define NV34TCL_RC_FINAL0_D_MAPPING_MASK 0x000000e0 +#define NV34TCL_RC_FINAL0_D_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV34TCL_RC_FINAL0_D_MAPPING_UNSIGNED_INVERT 0x00000020 +#define NV34TCL_RC_FINAL0_D_MAPPING_EXPAND_NORMAL 0x00000040 +#define NV34TCL_RC_FINAL0_D_MAPPING_EXPAND_NEGATE 0x00000060 +#define NV34TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NORMAL 0x00000080 +#define NV34TCL_RC_FINAL0_D_MAPPING_HALF_BIAS_NEGATE 0x000000a0 +#define NV34TCL_RC_FINAL0_D_MAPPING_SIGNED_IDENTITY 0x000000c0 +#define NV34TCL_RC_FINAL0_D_MAPPING_SIGNED_NEGATE 0x000000e0 +#define NV34TCL_RC_FINAL0_C_INPUT_SHIFT 8 +#define NV34TCL_RC_FINAL0_C_INPUT_MASK 0x00000f00 +#define NV34TCL_RC_FINAL0_C_INPUT_ZERO 0x00000000 +#define NV34TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR0 0x00000100 +#define NV34TCL_RC_FINAL0_C_INPUT_CONSTANT_COLOR1 0x00000200 +#define NV34TCL_RC_FINAL0_C_INPUT_FOG 0x00000300 +#define NV34TCL_RC_FINAL0_C_INPUT_PRIMARY_COLOR 0x00000400 +#define NV34TCL_RC_FINAL0_C_INPUT_SECONDARY_COLOR 0x00000500 +#define NV34TCL_RC_FINAL0_C_INPUT_TEXTURE0 0x00000800 +#define NV34TCL_RC_FINAL0_C_INPUT_TEXTURE1 0x00000900 +#define NV34TCL_RC_FINAL0_C_INPUT_SPARE0 0x00000c00 +#define NV34TCL_RC_FINAL0_C_INPUT_SPARE1 0x00000d00 +#define NV34TCL_RC_FINAL0_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV34TCL_RC_FINAL0_C_INPUT_E_TIMES_F 0x00000f00 +#define NV34TCL_RC_FINAL0_C_INPUT_TEXTURE2 0x00000a00 +#define NV34TCL_RC_FINAL0_C_INPUT_TEXTURE3 0x00000b00 +#define NV34TCL_RC_FINAL0_C_COMPONENT_USAGE (1 << 12) +#define NV34TCL_RC_FINAL0_C_COMPONENT_USAGE_RGB 0x00000000 +#define NV34TCL_RC_FINAL0_C_COMPONENT_USAGE_ALPHA 0x00001000 +#define NV34TCL_RC_FINAL0_C_MAPPING_SHIFT 13 +#define NV34TCL_RC_FINAL0_C_MAPPING_MASK 0x0000e000 +#define NV34TCL_RC_FINAL0_C_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV34TCL_RC_FINAL0_C_MAPPING_UNSIGNED_INVERT 0x00002000 +#define NV34TCL_RC_FINAL0_C_MAPPING_EXPAND_NORMAL 0x00004000 +#define NV34TCL_RC_FINAL0_C_MAPPING_EXPAND_NEGATE 0x00006000 +#define NV34TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NORMAL 0x00008000 +#define NV34TCL_RC_FINAL0_C_MAPPING_HALF_BIAS_NEGATE 0x0000a000 +#define NV34TCL_RC_FINAL0_C_MAPPING_SIGNED_IDENTITY 0x0000c000 +#define NV34TCL_RC_FINAL0_C_MAPPING_SIGNED_NEGATE 0x0000e000 +#define NV34TCL_RC_FINAL0_B_INPUT_SHIFT 16 +#define NV34TCL_RC_FINAL0_B_INPUT_MASK 0x000f0000 +#define NV34TCL_RC_FINAL0_B_INPUT_ZERO 0x00000000 +#define NV34TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR0 0x00010000 +#define NV34TCL_RC_FINAL0_B_INPUT_CONSTANT_COLOR1 0x00020000 +#define NV34TCL_RC_FINAL0_B_INPUT_FOG 0x00030000 +#define NV34TCL_RC_FINAL0_B_INPUT_PRIMARY_COLOR 0x00040000 +#define NV34TCL_RC_FINAL0_B_INPUT_SECONDARY_COLOR 0x00050000 +#define NV34TCL_RC_FINAL0_B_INPUT_TEXTURE0 0x00080000 +#define NV34TCL_RC_FINAL0_B_INPUT_TEXTURE1 0x00090000 +#define NV34TCL_RC_FINAL0_B_INPUT_SPARE0 0x000c0000 +#define NV34TCL_RC_FINAL0_B_INPUT_SPARE1 0x000d0000 +#define NV34TCL_RC_FINAL0_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000e0000 +#define NV34TCL_RC_FINAL0_B_INPUT_E_TIMES_F 0x000f0000 +#define NV34TCL_RC_FINAL0_B_INPUT_TEXTURE2 0x000a0000 +#define NV34TCL_RC_FINAL0_B_INPUT_TEXTURE3 0x000b0000 +#define NV34TCL_RC_FINAL0_B_COMPONENT_USAGE (1 << 20) +#define NV34TCL_RC_FINAL0_B_COMPONENT_USAGE_RGB 0x00000000 +#define NV34TCL_RC_FINAL0_B_COMPONENT_USAGE_ALPHA 0x00100000 +#define NV34TCL_RC_FINAL0_B_MAPPING_SHIFT 21 +#define NV34TCL_RC_FINAL0_B_MAPPING_MASK 0x00e00000 +#define NV34TCL_RC_FINAL0_B_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV34TCL_RC_FINAL0_B_MAPPING_UNSIGNED_INVERT 0x00200000 +#define NV34TCL_RC_FINAL0_B_MAPPING_EXPAND_NORMAL 0x00400000 +#define NV34TCL_RC_FINAL0_B_MAPPING_EXPAND_NEGATE 0x00600000 +#define NV34TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NORMAL 0x00800000 +#define NV34TCL_RC_FINAL0_B_MAPPING_HALF_BIAS_NEGATE 0x00a00000 +#define NV34TCL_RC_FINAL0_B_MAPPING_SIGNED_IDENTITY 0x00c00000 +#define NV34TCL_RC_FINAL0_B_MAPPING_SIGNED_NEGATE 0x00e00000 +#define NV34TCL_RC_FINAL0_A_INPUT_SHIFT 24 +#define NV34TCL_RC_FINAL0_A_INPUT_MASK 0x0f000000 +#define NV34TCL_RC_FINAL0_A_INPUT_ZERO 0x00000000 +#define NV34TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR0 0x01000000 +#define NV34TCL_RC_FINAL0_A_INPUT_CONSTANT_COLOR1 0x02000000 +#define NV34TCL_RC_FINAL0_A_INPUT_FOG 0x03000000 +#define NV34TCL_RC_FINAL0_A_INPUT_PRIMARY_COLOR 0x04000000 +#define NV34TCL_RC_FINAL0_A_INPUT_SECONDARY_COLOR 0x05000000 +#define NV34TCL_RC_FINAL0_A_INPUT_TEXTURE0 0x08000000 +#define NV34TCL_RC_FINAL0_A_INPUT_TEXTURE1 0x09000000 +#define NV34TCL_RC_FINAL0_A_INPUT_SPARE0 0x0c000000 +#define NV34TCL_RC_FINAL0_A_INPUT_SPARE1 0x0d000000 +#define NV34TCL_RC_FINAL0_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0e000000 +#define NV34TCL_RC_FINAL0_A_INPUT_E_TIMES_F 0x0f000000 +#define NV34TCL_RC_FINAL0_A_INPUT_TEXTURE2 0x0a000000 +#define NV34TCL_RC_FINAL0_A_INPUT_TEXTURE3 0x0b000000 +#define NV34TCL_RC_FINAL0_A_COMPONENT_USAGE (1 << 28) +#define NV34TCL_RC_FINAL0_A_COMPONENT_USAGE_RGB 0x00000000 +#define NV34TCL_RC_FINAL0_A_COMPONENT_USAGE_ALPHA 0x10000000 +#define NV34TCL_RC_FINAL0_A_MAPPING_SHIFT 29 +#define NV34TCL_RC_FINAL0_A_MAPPING_MASK 0xe0000000 +#define NV34TCL_RC_FINAL0_A_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV34TCL_RC_FINAL0_A_MAPPING_UNSIGNED_INVERT 0x20000000 +#define NV34TCL_RC_FINAL0_A_MAPPING_EXPAND_NORMAL 0x40000000 +#define NV34TCL_RC_FINAL0_A_MAPPING_EXPAND_NEGATE 0x60000000 +#define NV34TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NORMAL 0x80000000 +#define NV34TCL_RC_FINAL0_A_MAPPING_HALF_BIAS_NEGATE 0xa0000000 +#define NV34TCL_RC_FINAL0_A_MAPPING_SIGNED_IDENTITY 0xc0000000 +#define NV34TCL_RC_FINAL0_A_MAPPING_SIGNED_NEGATE 0xe0000000 +#define NV34TCL_RC_FINAL1 0x000008f8 +#define NV34TCL_RC_FINAL1_COLOR_SUM_CLAMP (1 << 7) +#define NV34TCL_RC_FINAL1_G_INPUT_SHIFT 8 +#define NV34TCL_RC_FINAL1_G_INPUT_MASK 0x00000f00 +#define NV34TCL_RC_FINAL1_G_INPUT_ZERO 0x00000000 +#define NV34TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR0 0x00000100 +#define NV34TCL_RC_FINAL1_G_INPUT_CONSTANT_COLOR1 0x00000200 +#define NV34TCL_RC_FINAL1_G_INPUT_FOG 0x00000300 +#define NV34TCL_RC_FINAL1_G_INPUT_PRIMARY_COLOR 0x00000400 +#define NV34TCL_RC_FINAL1_G_INPUT_SECONDARY_COLOR 0x00000500 +#define NV34TCL_RC_FINAL1_G_INPUT_TEXTURE0 0x00000800 +#define NV34TCL_RC_FINAL1_G_INPUT_TEXTURE1 0x00000900 +#define NV34TCL_RC_FINAL1_G_INPUT_SPARE0 0x00000c00 +#define NV34TCL_RC_FINAL1_G_INPUT_SPARE1 0x00000d00 +#define NV34TCL_RC_FINAL1_G_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV34TCL_RC_FINAL1_G_INPUT_E_TIMES_F 0x00000f00 +#define NV34TCL_RC_FINAL1_G_INPUT_TEXTURE2 0x00000a00 +#define NV34TCL_RC_FINAL1_G_INPUT_TEXTURE3 0x00000b00 +#define NV34TCL_RC_FINAL1_G_COMPONENT_USAGE (1 << 12) +#define NV34TCL_RC_FINAL1_G_COMPONENT_USAGE_RGB 0x00000000 +#define NV34TCL_RC_FINAL1_G_COMPONENT_USAGE_ALPHA 0x00001000 +#define NV34TCL_RC_FINAL1_G_MAPPING_SHIFT 13 +#define NV34TCL_RC_FINAL1_G_MAPPING_MASK 0x0000e000 +#define NV34TCL_RC_FINAL1_G_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV34TCL_RC_FINAL1_G_MAPPING_UNSIGNED_INVERT 0x00002000 +#define NV34TCL_RC_FINAL1_G_MAPPING_EXPAND_NORMAL 0x00004000 +#define NV34TCL_RC_FINAL1_G_MAPPING_EXPAND_NEGATE 0x00006000 +#define NV34TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NORMAL 0x00008000 +#define NV34TCL_RC_FINAL1_G_MAPPING_HALF_BIAS_NEGATE 0x0000a000 +#define NV34TCL_RC_FINAL1_G_MAPPING_SIGNED_IDENTITY 0x0000c000 +#define NV34TCL_RC_FINAL1_G_MAPPING_SIGNED_NEGATE 0x0000e000 +#define NV34TCL_RC_FINAL1_F_INPUT_SHIFT 16 +#define NV34TCL_RC_FINAL1_F_INPUT_MASK 0x000f0000 +#define NV34TCL_RC_FINAL1_F_INPUT_ZERO 0x00000000 +#define NV34TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR0 0x00010000 +#define NV34TCL_RC_FINAL1_F_INPUT_CONSTANT_COLOR1 0x00020000 +#define NV34TCL_RC_FINAL1_F_INPUT_FOG 0x00030000 +#define NV34TCL_RC_FINAL1_F_INPUT_PRIMARY_COLOR 0x00040000 +#define NV34TCL_RC_FINAL1_F_INPUT_SECONDARY_COLOR 0x00050000 +#define NV34TCL_RC_FINAL1_F_INPUT_TEXTURE0 0x00080000 +#define NV34TCL_RC_FINAL1_F_INPUT_TEXTURE1 0x00090000 +#define NV34TCL_RC_FINAL1_F_INPUT_SPARE0 0x000c0000 +#define NV34TCL_RC_FINAL1_F_INPUT_SPARE1 0x000d0000 +#define NV34TCL_RC_FINAL1_F_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000e0000 +#define NV34TCL_RC_FINAL1_F_INPUT_E_TIMES_F 0x000f0000 +#define NV34TCL_RC_FINAL1_F_INPUT_TEXTURE2 0x000a0000 +#define NV34TCL_RC_FINAL1_F_INPUT_TEXTURE3 0x000b0000 +#define NV34TCL_RC_FINAL1_F_COMPONENT_USAGE (1 << 20) +#define NV34TCL_RC_FINAL1_F_COMPONENT_USAGE_RGB 0x00000000 +#define NV34TCL_RC_FINAL1_F_COMPONENT_USAGE_ALPHA 0x00100000 +#define NV34TCL_RC_FINAL1_F_MAPPING_SHIFT 21 +#define NV34TCL_RC_FINAL1_F_MAPPING_MASK 0x00e00000 +#define NV34TCL_RC_FINAL1_F_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV34TCL_RC_FINAL1_F_MAPPING_UNSIGNED_INVERT 0x00200000 +#define NV34TCL_RC_FINAL1_F_MAPPING_EXPAND_NORMAL 0x00400000 +#define NV34TCL_RC_FINAL1_F_MAPPING_EXPAND_NEGATE 0x00600000 +#define NV34TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NORMAL 0x00800000 +#define NV34TCL_RC_FINAL1_F_MAPPING_HALF_BIAS_NEGATE 0x00a00000 +#define NV34TCL_RC_FINAL1_F_MAPPING_SIGNED_IDENTITY 0x00c00000 +#define NV34TCL_RC_FINAL1_F_MAPPING_SIGNED_NEGATE 0x00e00000 +#define NV34TCL_RC_FINAL1_E_INPUT_SHIFT 24 +#define NV34TCL_RC_FINAL1_E_INPUT_MASK 0x0f000000 +#define NV34TCL_RC_FINAL1_E_INPUT_ZERO 0x00000000 +#define NV34TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR0 0x01000000 +#define NV34TCL_RC_FINAL1_E_INPUT_CONSTANT_COLOR1 0x02000000 +#define NV34TCL_RC_FINAL1_E_INPUT_FOG 0x03000000 +#define NV34TCL_RC_FINAL1_E_INPUT_PRIMARY_COLOR 0x04000000 +#define NV34TCL_RC_FINAL1_E_INPUT_SECONDARY_COLOR 0x05000000 +#define NV34TCL_RC_FINAL1_E_INPUT_TEXTURE0 0x08000000 +#define NV34TCL_RC_FINAL1_E_INPUT_TEXTURE1 0x09000000 +#define NV34TCL_RC_FINAL1_E_INPUT_SPARE0 0x0c000000 +#define NV34TCL_RC_FINAL1_E_INPUT_SPARE1 0x0d000000 +#define NV34TCL_RC_FINAL1_E_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0e000000 +#define NV34TCL_RC_FINAL1_E_INPUT_E_TIMES_F 0x0f000000 +#define NV34TCL_RC_FINAL1_E_INPUT_TEXTURE2 0x0a000000 +#define NV34TCL_RC_FINAL1_E_INPUT_TEXTURE3 0x0b000000 +#define NV34TCL_RC_FINAL1_E_COMPONENT_USAGE (1 << 28) +#define NV34TCL_RC_FINAL1_E_COMPONENT_USAGE_RGB 0x00000000 +#define NV34TCL_RC_FINAL1_E_COMPONENT_USAGE_ALPHA 0x10000000 +#define NV34TCL_RC_FINAL1_E_MAPPING_SHIFT 29 +#define NV34TCL_RC_FINAL1_E_MAPPING_MASK 0xe0000000 +#define NV34TCL_RC_FINAL1_E_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV34TCL_RC_FINAL1_E_MAPPING_UNSIGNED_INVERT 0x20000000 +#define NV34TCL_RC_FINAL1_E_MAPPING_EXPAND_NORMAL 0x40000000 +#define NV34TCL_RC_FINAL1_E_MAPPING_EXPAND_NEGATE 0x60000000 +#define NV34TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NORMAL 0x80000000 +#define NV34TCL_RC_FINAL1_E_MAPPING_HALF_BIAS_NEGATE 0xa0000000 +#define NV34TCL_RC_FINAL1_E_MAPPING_SIGNED_IDENTITY 0xc0000000 +#define NV34TCL_RC_FINAL1_E_MAPPING_SIGNED_NEGATE 0xe0000000 +#define NV34TCL_RC_ENABLE 0x000008fc +#define NV34TCL_RC_ENABLE_NUM_COMBINERS_SHIFT 0 +#define NV34TCL_RC_ENABLE_NUM_COMBINERS_MASK 0x0000000f +#define NV34TCL_RC_ENABLE_STAGE_CONSTANT_COLOR0_SHIFT 12 +#define NV34TCL_RC_ENABLE_STAGE_CONSTANT_COLOR0_MASK 0x0000f000 +#define NV34TCL_RC_ENABLE_STAGE_CONSTANT_COLOR1_SHIFT 16 +#define NV34TCL_RC_ENABLE_STAGE_CONSTANT_COLOR1_MASK 0x000f0000 +#define NV34TCL_RC_IN_ALPHA(x) (0x00000900+((x)*32)) +#define NV34TCL_RC_IN_ALPHA__SIZE 0x00000008 +#define NV34TCL_RC_IN_ALPHA_D_INPUT_SHIFT 0 +#define NV34TCL_RC_IN_ALPHA_D_INPUT_MASK 0x0000000f +#define NV34TCL_RC_IN_ALPHA_D_INPUT_ZERO 0x00000000 +#define NV34TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR0 0x00000001 +#define NV34TCL_RC_IN_ALPHA_D_INPUT_CONSTANT_COLOR1 0x00000002 +#define NV34TCL_RC_IN_ALPHA_D_INPUT_FOG 0x00000003 +#define NV34TCL_RC_IN_ALPHA_D_INPUT_PRIMARY_COLOR 0x00000004 +#define NV34TCL_RC_IN_ALPHA_D_INPUT_SECONDARY_COLOR 0x00000005 +#define NV34TCL_RC_IN_ALPHA_D_INPUT_TEXTURE0 0x00000008 +#define NV34TCL_RC_IN_ALPHA_D_INPUT_TEXTURE1 0x00000009 +#define NV34TCL_RC_IN_ALPHA_D_INPUT_SPARE0 0x0000000c +#define NV34TCL_RC_IN_ALPHA_D_INPUT_SPARE1 0x0000000d +#define NV34TCL_RC_IN_ALPHA_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0000000e +#define NV34TCL_RC_IN_ALPHA_D_INPUT_E_TIMES_F 0x0000000f +#define NV34TCL_RC_IN_ALPHA_D_INPUT_TEXTURE2 0x0000000a +#define NV34TCL_RC_IN_ALPHA_D_INPUT_TEXTURE3 0x0000000b +#define NV34TCL_RC_IN_ALPHA_D_COMPONENT_USAGE (1 << 4) +#define NV34TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_BLUE 0x00000000 +#define NV34TCL_RC_IN_ALPHA_D_COMPONENT_USAGE_ALPHA 0x00000010 +#define NV34TCL_RC_IN_ALPHA_D_MAPPING_SHIFT 5 +#define NV34TCL_RC_IN_ALPHA_D_MAPPING_MASK 0x000000e0 +#define NV34TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV34TCL_RC_IN_ALPHA_D_MAPPING_UNSIGNED_INVERT 0x00000020 +#define NV34TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NORMAL 0x00000040 +#define NV34TCL_RC_IN_ALPHA_D_MAPPING_EXPAND_NEGATE 0x00000060 +#define NV34TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NORMAL 0x00000080 +#define NV34TCL_RC_IN_ALPHA_D_MAPPING_HALF_BIAS_NEGATE 0x000000a0 +#define NV34TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_IDENTITY 0x000000c0 +#define NV34TCL_RC_IN_ALPHA_D_MAPPING_SIGNED_NEGATE 0x000000e0 +#define NV34TCL_RC_IN_ALPHA_C_INPUT_SHIFT 8 +#define NV34TCL_RC_IN_ALPHA_C_INPUT_MASK 0x00000f00 +#define NV34TCL_RC_IN_ALPHA_C_INPUT_ZERO 0x00000000 +#define NV34TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR0 0x00000100 +#define NV34TCL_RC_IN_ALPHA_C_INPUT_CONSTANT_COLOR1 0x00000200 +#define NV34TCL_RC_IN_ALPHA_C_INPUT_FOG 0x00000300 +#define NV34TCL_RC_IN_ALPHA_C_INPUT_PRIMARY_COLOR 0x00000400 +#define NV34TCL_RC_IN_ALPHA_C_INPUT_SECONDARY_COLOR 0x00000500 +#define NV34TCL_RC_IN_ALPHA_C_INPUT_TEXTURE0 0x00000800 +#define NV34TCL_RC_IN_ALPHA_C_INPUT_TEXTURE1 0x00000900 +#define NV34TCL_RC_IN_ALPHA_C_INPUT_SPARE0 0x00000c00 +#define NV34TCL_RC_IN_ALPHA_C_INPUT_SPARE1 0x00000d00 +#define NV34TCL_RC_IN_ALPHA_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV34TCL_RC_IN_ALPHA_C_INPUT_E_TIMES_F 0x00000f00 +#define NV34TCL_RC_IN_ALPHA_C_INPUT_TEXTURE2 0x00000a00 +#define NV34TCL_RC_IN_ALPHA_C_INPUT_TEXTURE3 0x00000b00 +#define NV34TCL_RC_IN_ALPHA_C_COMPONENT_USAGE (1 << 12) +#define NV34TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_BLUE 0x00000000 +#define NV34TCL_RC_IN_ALPHA_C_COMPONENT_USAGE_ALPHA 0x00001000 +#define NV34TCL_RC_IN_ALPHA_C_MAPPING_SHIFT 13 +#define NV34TCL_RC_IN_ALPHA_C_MAPPING_MASK 0x0000e000 +#define NV34TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV34TCL_RC_IN_ALPHA_C_MAPPING_UNSIGNED_INVERT 0x00002000 +#define NV34TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NORMAL 0x00004000 +#define NV34TCL_RC_IN_ALPHA_C_MAPPING_EXPAND_NEGATE 0x00006000 +#define NV34TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NORMAL 0x00008000 +#define NV34TCL_RC_IN_ALPHA_C_MAPPING_HALF_BIAS_NEGATE 0x0000a000 +#define NV34TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_IDENTITY 0x0000c000 +#define NV34TCL_RC_IN_ALPHA_C_MAPPING_SIGNED_NEGATE 0x0000e000 +#define NV34TCL_RC_IN_ALPHA_B_INPUT_SHIFT 16 +#define NV34TCL_RC_IN_ALPHA_B_INPUT_MASK 0x000f0000 +#define NV34TCL_RC_IN_ALPHA_B_INPUT_ZERO 0x00000000 +#define NV34TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR0 0x00010000 +#define NV34TCL_RC_IN_ALPHA_B_INPUT_CONSTANT_COLOR1 0x00020000 +#define NV34TCL_RC_IN_ALPHA_B_INPUT_FOG 0x00030000 +#define NV34TCL_RC_IN_ALPHA_B_INPUT_PRIMARY_COLOR 0x00040000 +#define NV34TCL_RC_IN_ALPHA_B_INPUT_SECONDARY_COLOR 0x00050000 +#define NV34TCL_RC_IN_ALPHA_B_INPUT_TEXTURE0 0x00080000 +#define NV34TCL_RC_IN_ALPHA_B_INPUT_TEXTURE1 0x00090000 +#define NV34TCL_RC_IN_ALPHA_B_INPUT_SPARE0 0x000c0000 +#define NV34TCL_RC_IN_ALPHA_B_INPUT_SPARE1 0x000d0000 +#define NV34TCL_RC_IN_ALPHA_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000e0000 +#define NV34TCL_RC_IN_ALPHA_B_INPUT_E_TIMES_F 0x000f0000 +#define NV34TCL_RC_IN_ALPHA_B_INPUT_TEXTURE2 0x000a0000 +#define NV34TCL_RC_IN_ALPHA_B_INPUT_TEXTURE3 0x000b0000 +#define NV34TCL_RC_IN_ALPHA_B_COMPONENT_USAGE (1 << 20) +#define NV34TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_BLUE 0x00000000 +#define NV34TCL_RC_IN_ALPHA_B_COMPONENT_USAGE_ALPHA 0x00100000 +#define NV34TCL_RC_IN_ALPHA_B_MAPPING_SHIFT 21 +#define NV34TCL_RC_IN_ALPHA_B_MAPPING_MASK 0x00e00000 +#define NV34TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV34TCL_RC_IN_ALPHA_B_MAPPING_UNSIGNED_INVERT 0x00200000 +#define NV34TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NORMAL 0x00400000 +#define NV34TCL_RC_IN_ALPHA_B_MAPPING_EXPAND_NEGATE 0x00600000 +#define NV34TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NORMAL 0x00800000 +#define NV34TCL_RC_IN_ALPHA_B_MAPPING_HALF_BIAS_NEGATE 0x00a00000 +#define NV34TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_IDENTITY 0x00c00000 +#define NV34TCL_RC_IN_ALPHA_B_MAPPING_SIGNED_NEGATE 0x00e00000 +#define NV34TCL_RC_IN_ALPHA_A_INPUT_SHIFT 24 +#define NV34TCL_RC_IN_ALPHA_A_INPUT_MASK 0x0f000000 +#define NV34TCL_RC_IN_ALPHA_A_INPUT_ZERO 0x00000000 +#define NV34TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR0 0x01000000 +#define NV34TCL_RC_IN_ALPHA_A_INPUT_CONSTANT_COLOR1 0x02000000 +#define NV34TCL_RC_IN_ALPHA_A_INPUT_FOG 0x03000000 +#define NV34TCL_RC_IN_ALPHA_A_INPUT_PRIMARY_COLOR 0x04000000 +#define NV34TCL_RC_IN_ALPHA_A_INPUT_SECONDARY_COLOR 0x05000000 +#define NV34TCL_RC_IN_ALPHA_A_INPUT_TEXTURE0 0x08000000 +#define NV34TCL_RC_IN_ALPHA_A_INPUT_TEXTURE1 0x09000000 +#define NV34TCL_RC_IN_ALPHA_A_INPUT_SPARE0 0x0c000000 +#define NV34TCL_RC_IN_ALPHA_A_INPUT_SPARE1 0x0d000000 +#define NV34TCL_RC_IN_ALPHA_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0e000000 +#define NV34TCL_RC_IN_ALPHA_A_INPUT_E_TIMES_F 0x0f000000 +#define NV34TCL_RC_IN_ALPHA_A_INPUT_TEXTURE2 0x0a000000 +#define NV34TCL_RC_IN_ALPHA_A_INPUT_TEXTURE3 0x0b000000 +#define NV34TCL_RC_IN_ALPHA_A_COMPONENT_USAGE (1 << 28) +#define NV34TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_BLUE 0x00000000 +#define NV34TCL_RC_IN_ALPHA_A_COMPONENT_USAGE_ALPHA 0x10000000 +#define NV34TCL_RC_IN_ALPHA_A_MAPPING_SHIFT 29 +#define NV34TCL_RC_IN_ALPHA_A_MAPPING_MASK 0xe0000000 +#define NV34TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV34TCL_RC_IN_ALPHA_A_MAPPING_UNSIGNED_INVERT 0x20000000 +#define NV34TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NORMAL 0x40000000 +#define NV34TCL_RC_IN_ALPHA_A_MAPPING_EXPAND_NEGATE 0x60000000 +#define NV34TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NORMAL 0x80000000 +#define NV34TCL_RC_IN_ALPHA_A_MAPPING_HALF_BIAS_NEGATE 0xa0000000 +#define NV34TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_IDENTITY 0xc0000000 +#define NV34TCL_RC_IN_ALPHA_A_MAPPING_SIGNED_NEGATE 0xe0000000 +#define NV34TCL_RC_IN_RGB(x) (0x00000904+((x)*32)) +#define NV34TCL_RC_IN_RGB__SIZE 0x00000008 +#define NV34TCL_RC_IN_RGB_D_INPUT_SHIFT 0 +#define NV34TCL_RC_IN_RGB_D_INPUT_MASK 0x0000000f +#define NV34TCL_RC_IN_RGB_D_INPUT_ZERO 0x00000000 +#define NV34TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR0 0x00000001 +#define NV34TCL_RC_IN_RGB_D_INPUT_CONSTANT_COLOR1 0x00000002 +#define NV34TCL_RC_IN_RGB_D_INPUT_FOG 0x00000003 +#define NV34TCL_RC_IN_RGB_D_INPUT_PRIMARY_COLOR 0x00000004 +#define NV34TCL_RC_IN_RGB_D_INPUT_SECONDARY_COLOR 0x00000005 +#define NV34TCL_RC_IN_RGB_D_INPUT_TEXTURE0 0x00000008 +#define NV34TCL_RC_IN_RGB_D_INPUT_TEXTURE1 0x00000009 +#define NV34TCL_RC_IN_RGB_D_INPUT_SPARE0 0x0000000c +#define NV34TCL_RC_IN_RGB_D_INPUT_SPARE1 0x0000000d +#define NV34TCL_RC_IN_RGB_D_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0000000e +#define NV34TCL_RC_IN_RGB_D_INPUT_E_TIMES_F 0x0000000f +#define NV34TCL_RC_IN_RGB_D_INPUT_TEXTURE2 0x0000000a +#define NV34TCL_RC_IN_RGB_D_INPUT_TEXTURE3 0x0000000b +#define NV34TCL_RC_IN_RGB_D_COMPONENT_USAGE (1 << 4) +#define NV34TCL_RC_IN_RGB_D_COMPONENT_USAGE_RGB 0x00000000 +#define NV34TCL_RC_IN_RGB_D_COMPONENT_USAGE_ALPHA 0x00000010 +#define NV34TCL_RC_IN_RGB_D_MAPPING_SHIFT 5 +#define NV34TCL_RC_IN_RGB_D_MAPPING_MASK 0x000000e0 +#define NV34TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV34TCL_RC_IN_RGB_D_MAPPING_UNSIGNED_INVERT 0x00000020 +#define NV34TCL_RC_IN_RGB_D_MAPPING_EXPAND_NORMAL 0x00000040 +#define NV34TCL_RC_IN_RGB_D_MAPPING_EXPAND_NEGATE 0x00000060 +#define NV34TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NORMAL 0x00000080 +#define NV34TCL_RC_IN_RGB_D_MAPPING_HALF_BIAS_NEGATE 0x000000a0 +#define NV34TCL_RC_IN_RGB_D_MAPPING_SIGNED_IDENTITY 0x000000c0 +#define NV34TCL_RC_IN_RGB_D_MAPPING_SIGNED_NEGATE 0x000000e0 +#define NV34TCL_RC_IN_RGB_C_INPUT_SHIFT 8 +#define NV34TCL_RC_IN_RGB_C_INPUT_MASK 0x00000f00 +#define NV34TCL_RC_IN_RGB_C_INPUT_ZERO 0x00000000 +#define NV34TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR0 0x00000100 +#define NV34TCL_RC_IN_RGB_C_INPUT_CONSTANT_COLOR1 0x00000200 +#define NV34TCL_RC_IN_RGB_C_INPUT_FOG 0x00000300 +#define NV34TCL_RC_IN_RGB_C_INPUT_PRIMARY_COLOR 0x00000400 +#define NV34TCL_RC_IN_RGB_C_INPUT_SECONDARY_COLOR 0x00000500 +#define NV34TCL_RC_IN_RGB_C_INPUT_TEXTURE0 0x00000800 +#define NV34TCL_RC_IN_RGB_C_INPUT_TEXTURE1 0x00000900 +#define NV34TCL_RC_IN_RGB_C_INPUT_SPARE0 0x00000c00 +#define NV34TCL_RC_IN_RGB_C_INPUT_SPARE1 0x00000d00 +#define NV34TCL_RC_IN_RGB_C_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV34TCL_RC_IN_RGB_C_INPUT_E_TIMES_F 0x00000f00 +#define NV34TCL_RC_IN_RGB_C_INPUT_TEXTURE2 0x00000a00 +#define NV34TCL_RC_IN_RGB_C_INPUT_TEXTURE3 0x00000b00 +#define NV34TCL_RC_IN_RGB_C_COMPONENT_USAGE (1 << 12) +#define NV34TCL_RC_IN_RGB_C_COMPONENT_USAGE_RGB 0x00000000 +#define NV34TCL_RC_IN_RGB_C_COMPONENT_USAGE_ALPHA 0x00001000 +#define NV34TCL_RC_IN_RGB_C_MAPPING_SHIFT 13 +#define NV34TCL_RC_IN_RGB_C_MAPPING_MASK 0x0000e000 +#define NV34TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV34TCL_RC_IN_RGB_C_MAPPING_UNSIGNED_INVERT 0x00002000 +#define NV34TCL_RC_IN_RGB_C_MAPPING_EXPAND_NORMAL 0x00004000 +#define NV34TCL_RC_IN_RGB_C_MAPPING_EXPAND_NEGATE 0x00006000 +#define NV34TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NORMAL 0x00008000 +#define NV34TCL_RC_IN_RGB_C_MAPPING_HALF_BIAS_NEGATE 0x0000a000 +#define NV34TCL_RC_IN_RGB_C_MAPPING_SIGNED_IDENTITY 0x0000c000 +#define NV34TCL_RC_IN_RGB_C_MAPPING_SIGNED_NEGATE 0x0000e000 +#define NV34TCL_RC_IN_RGB_B_INPUT_SHIFT 16 +#define NV34TCL_RC_IN_RGB_B_INPUT_MASK 0x000f0000 +#define NV34TCL_RC_IN_RGB_B_INPUT_ZERO 0x00000000 +#define NV34TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR0 0x00010000 +#define NV34TCL_RC_IN_RGB_B_INPUT_CONSTANT_COLOR1 0x00020000 +#define NV34TCL_RC_IN_RGB_B_INPUT_FOG 0x00030000 +#define NV34TCL_RC_IN_RGB_B_INPUT_PRIMARY_COLOR 0x00040000 +#define NV34TCL_RC_IN_RGB_B_INPUT_SECONDARY_COLOR 0x00050000 +#define NV34TCL_RC_IN_RGB_B_INPUT_TEXTURE0 0x00080000 +#define NV34TCL_RC_IN_RGB_B_INPUT_TEXTURE1 0x00090000 +#define NV34TCL_RC_IN_RGB_B_INPUT_SPARE0 0x000c0000 +#define NV34TCL_RC_IN_RGB_B_INPUT_SPARE1 0x000d0000 +#define NV34TCL_RC_IN_RGB_B_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000e0000 +#define NV34TCL_RC_IN_RGB_B_INPUT_E_TIMES_F 0x000f0000 +#define NV34TCL_RC_IN_RGB_B_INPUT_TEXTURE2 0x000a0000 +#define NV34TCL_RC_IN_RGB_B_INPUT_TEXTURE3 0x000b0000 +#define NV34TCL_RC_IN_RGB_B_COMPONENT_USAGE (1 << 20) +#define NV34TCL_RC_IN_RGB_B_COMPONENT_USAGE_RGB 0x00000000 +#define NV34TCL_RC_IN_RGB_B_COMPONENT_USAGE_ALPHA 0x00100000 +#define NV34TCL_RC_IN_RGB_B_MAPPING_SHIFT 21 +#define NV34TCL_RC_IN_RGB_B_MAPPING_MASK 0x00e00000 +#define NV34TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV34TCL_RC_IN_RGB_B_MAPPING_UNSIGNED_INVERT 0x00200000 +#define NV34TCL_RC_IN_RGB_B_MAPPING_EXPAND_NORMAL 0x00400000 +#define NV34TCL_RC_IN_RGB_B_MAPPING_EXPAND_NEGATE 0x00600000 +#define NV34TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NORMAL 0x00800000 +#define NV34TCL_RC_IN_RGB_B_MAPPING_HALF_BIAS_NEGATE 0x00a00000 +#define NV34TCL_RC_IN_RGB_B_MAPPING_SIGNED_IDENTITY 0x00c00000 +#define NV34TCL_RC_IN_RGB_B_MAPPING_SIGNED_NEGATE 0x00e00000 +#define NV34TCL_RC_IN_RGB_A_INPUT_SHIFT 24 +#define NV34TCL_RC_IN_RGB_A_INPUT_MASK 0x0f000000 +#define NV34TCL_RC_IN_RGB_A_INPUT_ZERO 0x00000000 +#define NV34TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR0 0x01000000 +#define NV34TCL_RC_IN_RGB_A_INPUT_CONSTANT_COLOR1 0x02000000 +#define NV34TCL_RC_IN_RGB_A_INPUT_FOG 0x03000000 +#define NV34TCL_RC_IN_RGB_A_INPUT_PRIMARY_COLOR 0x04000000 +#define NV34TCL_RC_IN_RGB_A_INPUT_SECONDARY_COLOR 0x05000000 +#define NV34TCL_RC_IN_RGB_A_INPUT_TEXTURE0 0x08000000 +#define NV34TCL_RC_IN_RGB_A_INPUT_TEXTURE1 0x09000000 +#define NV34TCL_RC_IN_RGB_A_INPUT_SPARE0 0x0c000000 +#define NV34TCL_RC_IN_RGB_A_INPUT_SPARE1 0x0d000000 +#define NV34TCL_RC_IN_RGB_A_INPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0e000000 +#define NV34TCL_RC_IN_RGB_A_INPUT_E_TIMES_F 0x0f000000 +#define NV34TCL_RC_IN_RGB_A_INPUT_TEXTURE2 0x0a000000 +#define NV34TCL_RC_IN_RGB_A_INPUT_TEXTURE3 0x0b000000 +#define NV34TCL_RC_IN_RGB_A_COMPONENT_USAGE (1 << 28) +#define NV34TCL_RC_IN_RGB_A_COMPONENT_USAGE_RGB 0x00000000 +#define NV34TCL_RC_IN_RGB_A_COMPONENT_USAGE_ALPHA 0x10000000 +#define NV34TCL_RC_IN_RGB_A_MAPPING_SHIFT 29 +#define NV34TCL_RC_IN_RGB_A_MAPPING_MASK 0xe0000000 +#define NV34TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_IDENTITY 0x00000000 +#define NV34TCL_RC_IN_RGB_A_MAPPING_UNSIGNED_INVERT 0x20000000 +#define NV34TCL_RC_IN_RGB_A_MAPPING_EXPAND_NORMAL 0x40000000 +#define NV34TCL_RC_IN_RGB_A_MAPPING_EXPAND_NEGATE 0x60000000 +#define NV34TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NORMAL 0x80000000 +#define NV34TCL_RC_IN_RGB_A_MAPPING_HALF_BIAS_NEGATE 0xa0000000 +#define NV34TCL_RC_IN_RGB_A_MAPPING_SIGNED_IDENTITY 0xc0000000 +#define NV34TCL_RC_IN_RGB_A_MAPPING_SIGNED_NEGATE 0xe0000000 +#define NV34TCL_RC_CONSTANT_COLOR0(x) (0x00000908+((x)*32)) +#define NV34TCL_RC_CONSTANT_COLOR0__SIZE 0x00000008 +#define NV34TCL_RC_CONSTANT_COLOR0_B_SHIFT 0 +#define NV34TCL_RC_CONSTANT_COLOR0_B_MASK 0x000000ff +#define NV34TCL_RC_CONSTANT_COLOR0_G_SHIFT 8 +#define NV34TCL_RC_CONSTANT_COLOR0_G_MASK 0x0000ff00 +#define NV34TCL_RC_CONSTANT_COLOR0_R_SHIFT 16 +#define NV34TCL_RC_CONSTANT_COLOR0_R_MASK 0x00ff0000 +#define NV34TCL_RC_CONSTANT_COLOR0_A_SHIFT 24 +#define NV34TCL_RC_CONSTANT_COLOR0_A_MASK 0xff000000 +#define NV34TCL_RC_CONSTANT_COLOR1(x) (0x0000090c+((x)*32)) +#define NV34TCL_RC_CONSTANT_COLOR1__SIZE 0x00000008 +#define NV34TCL_RC_CONSTANT_COLOR1_B_SHIFT 0 +#define NV34TCL_RC_CONSTANT_COLOR1_B_MASK 0x000000ff +#define NV34TCL_RC_CONSTANT_COLOR1_G_SHIFT 8 +#define NV34TCL_RC_CONSTANT_COLOR1_G_MASK 0x0000ff00 +#define NV34TCL_RC_CONSTANT_COLOR1_R_SHIFT 16 +#define NV34TCL_RC_CONSTANT_COLOR1_R_MASK 0x00ff0000 +#define NV34TCL_RC_CONSTANT_COLOR1_A_SHIFT 24 +#define NV34TCL_RC_CONSTANT_COLOR1_A_MASK 0xff000000 +#define NV34TCL_RC_OUT_ALPHA(x) (0x00000910+((x)*32)) +#define NV34TCL_RC_OUT_ALPHA__SIZE 0x00000008 +#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SHIFT 0 +#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_MASK 0x0000000f +#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_ZERO 0x00000000 +#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR0 0x00000001 +#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_CONSTANT_COLOR1 0x00000002 +#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_FOG 0x00000003 +#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_PRIMARY_COLOR 0x00000004 +#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SECONDARY_COLOR 0x00000005 +#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE0 0x00000008 +#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE1 0x00000009 +#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0 0x0000000c +#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE1 0x0000000d +#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0000000e +#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_E_TIMES_F 0x0000000f +#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE2 0x0000000a +#define NV34TCL_RC_OUT_ALPHA_CD_OUTPUT_TEXTURE3 0x0000000b +#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SHIFT 4 +#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_MASK 0x000000f0 +#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_ZERO 0x00000000 +#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR0 0x00000010 +#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_CONSTANT_COLOR1 0x00000020 +#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_FOG 0x00000030 +#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_PRIMARY_COLOR 0x00000040 +#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SECONDARY_COLOR 0x00000050 +#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE0 0x00000080 +#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE1 0x00000090 +#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0 0x000000c0 +#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE1 0x000000d0 +#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000000e0 +#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_E_TIMES_F 0x000000f0 +#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE2 0x000000a0 +#define NV34TCL_RC_OUT_ALPHA_AB_OUTPUT_TEXTURE3 0x000000b0 +#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SHIFT 8 +#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_MASK 0x00000f00 +#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_ZERO 0x00000000 +#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR0 0x00000100 +#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_CONSTANT_COLOR1 0x00000200 +#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_FOG 0x00000300 +#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_PRIMARY_COLOR 0x00000400 +#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SECONDARY_COLOR 0x00000500 +#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE0 0x00000800 +#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE1 0x00000900 +#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0 0x00000c00 +#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE1 0x00000d00 +#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_E_TIMES_F 0x00000f00 +#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE2 0x00000a00 +#define NV34TCL_RC_OUT_ALPHA_SUM_OUTPUT_TEXTURE3 0x00000b00 +#define NV34TCL_RC_OUT_ALPHA_CD_DOT_PRODUCT (1 << 12) +#define NV34TCL_RC_OUT_ALPHA_AB_DOT_PRODUCT (1 << 13) +#define NV34TCL_RC_OUT_ALPHA_MUX_SUM (1 << 14) +#define NV34TCL_RC_OUT_ALPHA_BIAS (1 << 15) +#define NV34TCL_RC_OUT_ALPHA_BIAS_NONE 0x00000000 +#define NV34TCL_RC_OUT_ALPHA_BIAS_BIAS_BY_NEGATIVE_ONE_HALF 0x00008000 +#define NV34TCL_RC_OUT_ALPHA_SCALE_SHIFT 17 +#define NV34TCL_RC_OUT_ALPHA_SCALE_MASK 0x00000000 +#define NV34TCL_RC_OUT_ALPHA_SCALE_NONE 0x00000000 +#define NV34TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_TWO 0x00020000 +#define NV34TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_FOUR 0x00040000 +#define NV34TCL_RC_OUT_ALPHA_SCALE_SCALE_BY_ONE_HALF 0x00060000 +#define NV34TCL_RC_OUT_RGB(x) (0x00000914+((x)*32)) +#define NV34TCL_RC_OUT_RGB__SIZE 0x00000008 +#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_SHIFT 0 +#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_MASK 0x0000000f +#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_ZERO 0x00000000 +#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR0 0x00000001 +#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_CONSTANT_COLOR1 0x00000002 +#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_FOG 0x00000003 +#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_PRIMARY_COLOR 0x00000004 +#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_SECONDARY_COLOR 0x00000005 +#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE0 0x00000008 +#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE1 0x00000009 +#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0 0x0000000c +#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_SPARE1 0x0000000d +#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x0000000e +#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_E_TIMES_F 0x0000000f +#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE2 0x0000000a +#define NV34TCL_RC_OUT_RGB_CD_OUTPUT_TEXTURE3 0x0000000b +#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_SHIFT 4 +#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_MASK 0x000000f0 +#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_ZERO 0x00000000 +#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR0 0x00000010 +#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_CONSTANT_COLOR1 0x00000020 +#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_FOG 0x00000030 +#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_PRIMARY_COLOR 0x00000040 +#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_SECONDARY_COLOR 0x00000050 +#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE0 0x00000080 +#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE1 0x00000090 +#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0 0x000000c0 +#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_SPARE1 0x000000d0 +#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x000000e0 +#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_E_TIMES_F 0x000000f0 +#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE2 0x000000a0 +#define NV34TCL_RC_OUT_RGB_AB_OUTPUT_TEXTURE3 0x000000b0 +#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SHIFT 8 +#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_MASK 0x00000f00 +#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_ZERO 0x00000000 +#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR0 0x00000100 +#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_CONSTANT_COLOR1 0x00000200 +#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_FOG 0x00000300 +#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_PRIMARY_COLOR 0x00000400 +#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SECONDARY_COLOR 0x00000500 +#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE0 0x00000800 +#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE1 0x00000900 +#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0 0x00000c00 +#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE1 0x00000d00 +#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_SPARE0_PLUS_SECONDARY_COLOR 0x00000e00 +#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_E_TIMES_F 0x00000f00 +#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE2 0x00000a00 +#define NV34TCL_RC_OUT_RGB_SUM_OUTPUT_TEXTURE3 0x00000b00 +#define NV34TCL_RC_OUT_RGB_CD_DOT_PRODUCT (1 << 12) +#define NV34TCL_RC_OUT_RGB_AB_DOT_PRODUCT (1 << 13) +#define NV34TCL_RC_OUT_RGB_MUX_SUM (1 << 14) +#define NV34TCL_RC_OUT_RGB_BIAS (1 << 15) +#define NV34TCL_RC_OUT_RGB_BIAS_NONE 0x00000000 +#define NV34TCL_RC_OUT_RGB_BIAS_BIAS_BY_NEGATIVE_ONE_HALF 0x00008000 +#define NV34TCL_RC_OUT_RGB_SCALE_SHIFT 17 +#define NV34TCL_RC_OUT_RGB_SCALE_MASK 0x00000000 +#define NV34TCL_RC_OUT_RGB_SCALE_NONE 0x00000000 +#define NV34TCL_RC_OUT_RGB_SCALE_SCALE_BY_TWO 0x00020000 +#define NV34TCL_RC_OUT_RGB_SCALE_SCALE_BY_FOUR 0x00040000 +#define NV34TCL_RC_OUT_RGB_SCALE_SCALE_BY_ONE_HALF 0x00060000 +#define NV34TCL_VIEWPORT_HORIZ 0x00000a00 +#define NV34TCL_VIEWPORT_HORIZ_X_SHIFT 0 +#define NV34TCL_VIEWPORT_HORIZ_X_MASK 0x0000ffff +#define NV34TCL_VIEWPORT_HORIZ_W_SHIFT 16 +#define NV34TCL_VIEWPORT_HORIZ_W_MASK 0xffff0000 +#define NV34TCL_VIEWPORT_VERT 0x00000a04 +#define NV34TCL_VIEWPORT_VERT_Y_SHIFT 0 +#define NV34TCL_VIEWPORT_VERT_Y_MASK 0x0000ffff +#define NV34TCL_VIEWPORT_VERT_H_SHIFT 16 +#define NV34TCL_VIEWPORT_VERT_H_MASK 0xffff0000 +#define NV34TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R 0x00000a10 +#define NV34TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G 0x00000a14 +#define NV34TCL_LIGHT_MODEL_FRONT_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B 0x00000a18 +#define NV34TCL_VIEWPORT_TRANSLATE_X 0x00000a20 +#define NV34TCL_VIEWPORT_TRANSLATE_Y 0x00000a24 +#define NV34TCL_VIEWPORT_TRANSLATE_Z 0x00000a28 +#define NV34TCL_VIEWPORT_TRANSLATE_W 0x00000a2c +#define NV34TCL_VIEWPORT_SCALE_X 0x00000a30 +#define NV34TCL_VIEWPORT_SCALE_Y 0x00000a34 +#define NV34TCL_VIEWPORT_SCALE_Z 0x00000a38 +#define NV34TCL_VIEWPORT_SCALE_W 0x00000a3c +#define NV34TCL_POLYGON_OFFSET_POINT_ENABLE 0x00000a60 +#define NV34TCL_POLYGON_OFFSET_LINE_ENABLE 0x00000a64 +#define NV34TCL_POLYGON_OFFSET_FILL_ENABLE 0x00000a68 +#define NV34TCL_DEPTH_FUNC 0x00000a6c +#define NV34TCL_DEPTH_FUNC_NEVER 0x00000200 +#define NV34TCL_DEPTH_FUNC_LESS 0x00000201 +#define NV34TCL_DEPTH_FUNC_EQUAL 0x00000202 +#define NV34TCL_DEPTH_FUNC_LEQUAL 0x00000203 +#define NV34TCL_DEPTH_FUNC_GREATER 0x00000204 +#define NV34TCL_DEPTH_FUNC_NOTEQUAL 0x00000205 +#define NV34TCL_DEPTH_FUNC_GEQUAL 0x00000206 +#define NV34TCL_DEPTH_FUNC_ALWAYS 0x00000207 +#define NV34TCL_DEPTH_WRITE_ENABLE 0x00000a70 +#define NV34TCL_DEPTH_TEST_ENABLE 0x00000a74 +#define NV34TCL_POLYGON_OFFSET_FACTOR 0x00000a78 +#define NV34TCL_POLYGON_OFFSET_UNITS 0x00000a7c +#define NV34TCL_VTX_ATTR_3I_XY(x) (0x00000a80+((x)*8)) +#define NV34TCL_VTX_ATTR_3I_XY__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_3I_XY_X_SHIFT 0 +#define NV34TCL_VTX_ATTR_3I_XY_X_MASK 0x0000ffff +#define NV34TCL_VTX_ATTR_3I_XY_Y_SHIFT 16 +#define NV34TCL_VTX_ATTR_3I_XY_Y_MASK 0xffff0000 +#define NV34TCL_VTX_ATTR_3I_Z(x) (0x00000a84+((x)*8)) +#define NV34TCL_VTX_ATTR_3I_Z__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_3I_Z_Z_SHIFT 0 +#define NV34TCL_VTX_ATTR_3I_Z_Z_MASK 0x0000ffff +#define NV34TCL_VP_UPLOAD_INST(x) (0x00000b80+((x)*4)) +#define NV34TCL_VP_UPLOAD_INST__SIZE 0x00000004 +#define NV34TCL_TX0_CLIP_PLANE_A(x) (0x00000e00+((x)*16)) +#define NV34TCL_TX0_CLIP_PLANE_A__SIZE 0x00000004 +#define NV34TCL_TX0_CLIP_PLANE_B(x) (0x00000e04+((x)*16)) +#define NV34TCL_TX0_CLIP_PLANE_B__SIZE 0x00000004 +#define NV34TCL_TX0_CLIP_PLANE_C(x) (0x00000e08+((x)*16)) +#define NV34TCL_TX0_CLIP_PLANE_C__SIZE 0x00000004 +#define NV34TCL_TX0_CLIP_PLANE_D(x) (0x00000e0c+((x)*16)) +#define NV34TCL_TX0_CLIP_PLANE_D__SIZE 0x00000004 +#define NV34TCL_TX1_CLIP_PLANE_A(x) (0x00000e40+((x)*16)) +#define NV34TCL_TX1_CLIP_PLANE_A__SIZE 0x00000004 +#define NV34TCL_TX1_CLIP_PLANE_B(x) (0x00000e44+((x)*16)) +#define NV34TCL_TX1_CLIP_PLANE_B__SIZE 0x00000004 +#define NV34TCL_TX1_CLIP_PLANE_C(x) (0x00000e48+((x)*16)) +#define NV34TCL_TX1_CLIP_PLANE_C__SIZE 0x00000004 +#define NV34TCL_TX1_CLIP_PLANE_D(x) (0x00000e4c+((x)*16)) +#define NV34TCL_TX1_CLIP_PLANE_D__SIZE 0x00000004 +#define NV34TCL_TX2_CLIP_PLANE_A(x) (0x00000e80+((x)*16)) +#define NV34TCL_TX2_CLIP_PLANE_A__SIZE 0x00000004 +#define NV34TCL_TX2_CLIP_PLANE_B(x) (0x00000e84+((x)*16)) +#define NV34TCL_TX2_CLIP_PLANE_B__SIZE 0x00000004 +#define NV34TCL_TX2_CLIP_PLANE_C(x) (0x00000e88+((x)*16)) +#define NV34TCL_TX2_CLIP_PLANE_C__SIZE 0x00000004 +#define NV34TCL_TX2_CLIP_PLANE_D(x) (0x00000e8c+((x)*16)) +#define NV34TCL_TX2_CLIP_PLANE_D__SIZE 0x00000004 +#define NV34TCL_TX3_CLIP_PLANE_A(x) (0x00000ec0+((x)*16)) +#define NV34TCL_TX3_CLIP_PLANE_A__SIZE 0x00000004 +#define NV34TCL_TX3_CLIP_PLANE_B(x) (0x00000ec4+((x)*16)) +#define NV34TCL_TX3_CLIP_PLANE_B__SIZE 0x00000004 +#define NV34TCL_TX3_CLIP_PLANE_C(x) (0x00000ec8+((x)*16)) +#define NV34TCL_TX3_CLIP_PLANE_C__SIZE 0x00000004 +#define NV34TCL_TX3_CLIP_PLANE_D(x) (0x00000ecc+((x)*16)) +#define NV34TCL_TX3_CLIP_PLANE_D__SIZE 0x00000004 +#define NV34TCL_TX4_CLIP_PLANE_A(x) (0x00000f00+((x)*16)) +#define NV34TCL_TX4_CLIP_PLANE_A__SIZE 0x00000004 +#define NV34TCL_TX4_CLIP_PLANE_B(x) (0x00000f04+((x)*16)) +#define NV34TCL_TX4_CLIP_PLANE_B__SIZE 0x00000004 +#define NV34TCL_TX4_CLIP_PLANE_C(x) (0x00000f08+((x)*16)) +#define NV34TCL_TX4_CLIP_PLANE_C__SIZE 0x00000004 +#define NV34TCL_TX4_CLIP_PLANE_D(x) (0x00000f0c+((x)*16)) +#define NV34TCL_TX4_CLIP_PLANE_D__SIZE 0x00000004 +#define NV34TCL_TX5_CLIP_PLANE_A(x) (0x00000f40+((x)*16)) +#define NV34TCL_TX5_CLIP_PLANE_A__SIZE 0x00000004 +#define NV34TCL_TX5_CLIP_PLANE_B(x) (0x00000f44+((x)*16)) +#define NV34TCL_TX5_CLIP_PLANE_B__SIZE 0x00000004 +#define NV34TCL_TX5_CLIP_PLANE_C(x) (0x00000f48+((x)*16)) +#define NV34TCL_TX5_CLIP_PLANE_C__SIZE 0x00000004 +#define NV34TCL_TX5_CLIP_PLANE_D(x) (0x00000f4c+((x)*16)) +#define NV34TCL_TX5_CLIP_PLANE_D__SIZE 0x00000004 +#define NV34TCL_TX6_CLIP_PLANE_A(x) (0x00000f80+((x)*16)) +#define NV34TCL_TX6_CLIP_PLANE_A__SIZE 0x00000004 +#define NV34TCL_TX6_CLIP_PLANE_B(x) (0x00000f84+((x)*16)) +#define NV34TCL_TX6_CLIP_PLANE_B__SIZE 0x00000004 +#define NV34TCL_TX6_CLIP_PLANE_C(x) (0x00000f88+((x)*16)) +#define NV34TCL_TX6_CLIP_PLANE_C__SIZE 0x00000004 +#define NV34TCL_TX6_CLIP_PLANE_D(x) (0x00000f8c+((x)*16)) +#define NV34TCL_TX6_CLIP_PLANE_D__SIZE 0x00000004 +#define NV34TCL_TX7_CLIP_PLANE_A(x) (0x00000fc0+((x)*16)) +#define NV34TCL_TX7_CLIP_PLANE_A__SIZE 0x00000004 +#define NV34TCL_TX7_CLIP_PLANE_B(x) (0x00000fc4+((x)*16)) +#define NV34TCL_TX7_CLIP_PLANE_B__SIZE 0x00000004 +#define NV34TCL_TX7_CLIP_PLANE_C(x) (0x00000fc8+((x)*16)) +#define NV34TCL_TX7_CLIP_PLANE_C__SIZE 0x00000004 +#define NV34TCL_TX7_CLIP_PLANE_D(x) (0x00000fcc+((x)*16)) +#define NV34TCL_TX7_CLIP_PLANE_D__SIZE 0x00000004 +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R(x) (0x00001000+((x)*64)) +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_R__SIZE 0x00000008 +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G(x) (0x00001004+((x)*64)) +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_G__SIZE 0x00000008 +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B(x) (0x00001008+((x)*64)) +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_AMBIENT_B__SIZE 0x00000008 +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R(x) (0x0000100c+((x)*64)) +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_R__SIZE 0x00000008 +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G(x) (0x00001010+((x)*64)) +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_G__SIZE 0x00000008 +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B(x) (0x00001014+((x)*64)) +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_DIFFUSE_B__SIZE 0x00000008 +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R(x) (0x00001018+((x)*64)) +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_R__SIZE 0x00000008 +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G(x) (0x0000101c+((x)*64)) +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_G__SIZE 0x00000008 +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B(x) (0x00001020+((x)*64)) +#define NV34TCL_LIGHT_FRONT_SIDE_PRODUCT_SPECULAR_B__SIZE 0x00000008 +#define NV34TCL_LIGHT_HALF_VECTOR_X(x) (0x00001028+((x)*64)) +#define NV34TCL_LIGHT_HALF_VECTOR_X__SIZE 0x00000008 +#define NV34TCL_LIGHT_HALF_VECTOR_Y(x) (0x0000102c+((x)*64)) +#define NV34TCL_LIGHT_HALF_VECTOR_Y__SIZE 0x00000008 +#define NV34TCL_LIGHT_HALF_VECTOR_Z(x) (0x00001030+((x)*64)) +#define NV34TCL_LIGHT_HALF_VECTOR_Z__SIZE 0x00000008 +#define NV34TCL_LIGHT_DIRECTION_X(x) (0x00001034+((x)*64)) +#define NV34TCL_LIGHT_DIRECTION_X__SIZE 0x00000008 +#define NV34TCL_LIGHT_DIRECTION_Y(x) (0x00001038+((x)*64)) +#define NV34TCL_LIGHT_DIRECTION_Y__SIZE 0x00000008 +#define NV34TCL_LIGHT_DIRECTION_Z(x) (0x0000103c+((x)*64)) +#define NV34TCL_LIGHT_DIRECTION_Z__SIZE 0x00000008 +#define NV34TCL_LIGHT_SPOT_CUTOFF_A(x) (0x00001200+((x)*64)) +#define NV34TCL_LIGHT_SPOT_CUTOFF_A__SIZE 0x00000008 +#define NV34TCL_LIGHT_SPOT_CUTOFF_B(x) (0x00001204+((x)*64)) +#define NV34TCL_LIGHT_SPOT_CUTOFF_B__SIZE 0x00000008 +#define NV34TCL_LIGHT_SPOT_CUTOFF_C(x) (0x00001208+((x)*64)) +#define NV34TCL_LIGHT_SPOT_CUTOFF_C__SIZE 0x00000008 +#define NV34TCL_LIGHT_SPOT_DIR_X(x) (0x0000120c+((x)*64)) +#define NV34TCL_LIGHT_SPOT_DIR_X__SIZE 0x00000008 +#define NV34TCL_LIGHT_SPOT_DIR_Y(x) (0x00001210+((x)*64)) +#define NV34TCL_LIGHT_SPOT_DIR_Y__SIZE 0x00000008 +#define NV34TCL_LIGHT_SPOT_DIR_Z(x) (0x00001214+((x)*64)) +#define NV34TCL_LIGHT_SPOT_DIR_Z__SIZE 0x00000008 +#define NV34TCL_LIGHT_SPOT_CUTOFF_D(x) (0x00001218+((x)*64)) +#define NV34TCL_LIGHT_SPOT_CUTOFF_D__SIZE 0x00000008 +#define NV34TCL_LIGHT_POSITION_X(x) (0x0000121c+((x)*64)) +#define NV34TCL_LIGHT_POSITION_X__SIZE 0x00000008 +#define NV34TCL_LIGHT_POSITION_Y(x) (0x00001220+((x)*64)) +#define NV34TCL_LIGHT_POSITION_Y__SIZE 0x00000008 +#define NV34TCL_LIGHT_POSITION_Z(x) (0x00001224+((x)*64)) +#define NV34TCL_LIGHT_POSITION_Z__SIZE 0x00000008 +#define NV34TCL_LIGHT_ATTENUATION_CONSTANT(x) (0x00001228+((x)*64)) +#define NV34TCL_LIGHT_ATTENUATION_CONSTANT__SIZE 0x00000008 +#define NV34TCL_LIGHT_ATTENUATION_LINEAR(x) (0x0000122c+((x)*64)) +#define NV34TCL_LIGHT_ATTENUATION_LINEAR__SIZE 0x00000008 +#define NV34TCL_LIGHT_ATTENUATION_QUADRATIC(x) (0x00001230+((x)*64)) +#define NV34TCL_LIGHT_ATTENUATION_QUADRATIC__SIZE 0x00000008 +#define NV34TCL_FRONT_MATERIAL_SHININESS(x) (0x00001400+((x)*4)) +#define NV34TCL_FRONT_MATERIAL_SHININESS__SIZE 0x00000006 +#define NV34TCL_ENABLED_LIGHTS 0x00001420 +#define NV34TCL_VERTEX_TWO_SIDE_ENABLE 0x0000142c +#define NV34TCL_FP_REG_CONTROL 0x00001450 +#define NV34TCL_FP_REG_CONTROL_UNK1_SHIFT 16 +#define NV34TCL_FP_REG_CONTROL_UNK1_MASK 0xffff0000 +#define NV34TCL_FP_REG_CONTROL_UNK0_SHIFT 0 +#define NV34TCL_FP_REG_CONTROL_UNK0_MASK 0x0000ffff +#define NV34TCL_VP_CLIP_PLANES_ENABLE 0x00001478 +#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE0 (1 << 1) +#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE1 (1 << 5) +#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE2 (1 << 9) +#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE3 (1 << 13) +#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE4 (1 << 17) +#define NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE5 (1 << 21) +#define NV34TCL_POLYGON_STIPPLE_ENABLE 0x0000147c +#define NV34TCL_POLYGON_STIPPLE_PATTERN(x) (0x00001480+((x)*4)) +#define NV34TCL_POLYGON_STIPPLE_PATTERN__SIZE 0x00000020 +#define NV34TCL_VTX_ATTR_3F_X(x) (0x00001500+((x)*16)) +#define NV34TCL_VTX_ATTR_3F_X__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_3F_Y(x) (0x00001504+((x)*16)) +#define NV34TCL_VTX_ATTR_3F_Y__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_3F_Z(x) (0x00001508+((x)*16)) +#define NV34TCL_VTX_ATTR_3F_Z__SIZE 0x00000010 +#define NV34TCL_VP_CLIP_PLANE_A(x) (0x00001600+((x)*16)) +#define NV34TCL_VP_CLIP_PLANE_A__SIZE 0x00000006 +#define NV34TCL_VP_CLIP_PLANE_B(x) (0x00001604+((x)*16)) +#define NV34TCL_VP_CLIP_PLANE_B__SIZE 0x00000006 +#define NV34TCL_VP_CLIP_PLANE_C(x) (0x00001608+((x)*16)) +#define NV34TCL_VP_CLIP_PLANE_C__SIZE 0x00000006 +#define NV34TCL_VP_CLIP_PLANE_D(x) (0x0000160c+((x)*16)) +#define NV34TCL_VP_CLIP_PLANE_D__SIZE 0x00000006 +#define NV34TCL_VTXBUF_ADDRESS(x) (0x00001680+((x)*4)) +#define NV34TCL_VTXBUF_ADDRESS__SIZE 0x00000010 +#define NV34TCL_VTXBUF_ADDRESS_DMA1 (1 << 31) +#define NV34TCL_VTXBUF_ADDRESS_OFFSET_SHIFT 0 +#define NV34TCL_VTXBUF_ADDRESS_OFFSET_MASK 0x0fffffff +#define NV34TCL_VTXFMT(x) (0x00001740+((x)*4)) +#define NV34TCL_VTXFMT__SIZE 0x00000010 +#define NV34TCL_VTXFMT_TYPE_SHIFT 0 +#define NV34TCL_VTXFMT_TYPE_MASK 0x0000000f +#define NV34TCL_VTXFMT_TYPE_FLOAT 0x00000002 +#define NV34TCL_VTXFMT_TYPE_HALF 0x00000003 +#define NV34TCL_VTXFMT_TYPE_UBYTE 0x00000004 +#define NV34TCL_VTXFMT_TYPE_USHORT 0x00000005 +#define NV34TCL_VTXFMT_SIZE_SHIFT 4 +#define NV34TCL_VTXFMT_SIZE_MASK 0x000000f0 +#define NV34TCL_VTXFMT_STRIDE_SHIFT 8 +#define NV34TCL_VTXFMT_STRIDE_MASK 0x0000ff00 +#define NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R 0x000017a0 +#define NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G 0x000017a4 +#define NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B 0x000017a8 +#define NV34TCL_COLOR_MATERIAL_BACK_R 0x000017b0 +#define NV34TCL_COLOR_MATERIAL_BACK_G 0x000017b4 +#define NV34TCL_COLOR_MATERIAL_BACK_B 0x000017b8 +#define NV34TCL_COLOR_MATERIAL_BACK_A 0x000017c0 +#define NV34TCL_QUERY_RESET 0x000017c8 +#define NV34TCL_QUERY_UNK17CC 0x000017cc +#define NV34TCL_QUERY_GET 0x00001800 +#define NV34TCL_QUERY_GET_UNK24_SHIFT 24 +#define NV34TCL_QUERY_GET_UNK24_MASK 0xff000000 +#define NV34TCL_QUERY_GET_OFFSET_SHIFT 0 +#define NV34TCL_QUERY_GET_OFFSET_MASK 0x00ffffff +#define NV34TCL_VERTEX_BEGIN_END 0x00001808 +#define NV34TCL_VERTEX_BEGIN_END_STOP 0x00000000 +#define NV34TCL_VERTEX_BEGIN_END_POINTS 0x00000001 +#define NV34TCL_VERTEX_BEGIN_END_LINES 0x00000002 +#define NV34TCL_VERTEX_BEGIN_END_LINE_LOOP 0x00000003 +#define NV34TCL_VERTEX_BEGIN_END_LINE_STRIP 0x00000004 +#define NV34TCL_VERTEX_BEGIN_END_TRIANGLES 0x00000005 +#define NV34TCL_VERTEX_BEGIN_END_TRIANGLE_STRIP 0x00000006 +#define NV34TCL_VERTEX_BEGIN_END_TRIANGLE_FAN 0x00000007 +#define NV34TCL_VERTEX_BEGIN_END_QUADS 0x00000008 +#define NV34TCL_VERTEX_BEGIN_END_QUAD_STRIP 0x00000009 +#define NV34TCL_VERTEX_BEGIN_END_POLYGON 0x0000000a +#define NV34TCL_VB_ELEMENT_U16 0x0000180c +#define NV34TCL_VB_ELEMENT_U16_I0_SHIFT 0 +#define NV34TCL_VB_ELEMENT_U16_I0_MASK 0x0000ffff +#define NV34TCL_VB_ELEMENT_U16_I1_SHIFT 16 +#define NV34TCL_VB_ELEMENT_U16_I1_MASK 0xffff0000 +#define NV34TCL_VB_ELEMENT_U32 0x00001810 +#define NV34TCL_VB_VERTEX_BATCH 0x00001814 +#define NV34TCL_VB_VERTEX_BATCH_OFFSET_SHIFT 0 +#define NV34TCL_VB_VERTEX_BATCH_OFFSET_MASK 0x00ffffff +#define NV34TCL_VB_VERTEX_BATCH_COUNT_SHIFT 24 +#define NV34TCL_VB_VERTEX_BATCH_COUNT_MASK 0xff000000 +#define NV34TCL_VERTEX_DATA 0x00001818 +#define NV34TCL_IDXBUF_ADDRESS 0x0000181c +#define NV34TCL_IDXBUF_FORMAT 0x00001820 +#define NV34TCL_IDXBUF_FORMAT_TYPE_SHIFT 4 +#define NV34TCL_IDXBUF_FORMAT_TYPE_MASK 0x000000f0 +#define NV34TCL_IDXBUF_FORMAT_TYPE_U32 0x00000000 +#define NV34TCL_IDXBUF_FORMAT_TYPE_U16 0x00000010 +#define NV34TCL_IDXBUF_FORMAT_DMA1 (1 << 0) +#define NV34TCL_VB_INDEX_BATCH 0x00001824 +#define NV34TCL_VB_INDEX_BATCH_COUNT_SHIFT 24 +#define NV34TCL_VB_INDEX_BATCH_COUNT_MASK 0xff000000 +#define NV34TCL_VB_INDEX_BATCH_START_SHIFT 0 +#define NV34TCL_VB_INDEX_BATCH_START_MASK 0x00ffffff +#define NV34TCL_POLYGON_MODE_FRONT 0x00001828 +#define NV34TCL_POLYGON_MODE_FRONT_POINT 0x00001b00 +#define NV34TCL_POLYGON_MODE_FRONT_LINE 0x00001b01 +#define NV34TCL_POLYGON_MODE_FRONT_FILL 0x00001b02 +#define NV34TCL_POLYGON_MODE_BACK 0x0000182c +#define NV34TCL_POLYGON_MODE_BACK_POINT 0x00001b00 +#define NV34TCL_POLYGON_MODE_BACK_LINE 0x00001b01 +#define NV34TCL_POLYGON_MODE_BACK_FILL 0x00001b02 +#define NV34TCL_CULL_FACE 0x00001830 +#define NV34TCL_CULL_FACE_FRONT 0x00000404 +#define NV34TCL_CULL_FACE_BACK 0x00000405 +#define NV34TCL_CULL_FACE_FRONT_AND_BACK 0x00000408 +#define NV34TCL_FRONT_FACE 0x00001834 +#define NV34TCL_FRONT_FACE_CW 0x00000900 +#define NV34TCL_FRONT_FACE_CCW 0x00000901 +#define NV34TCL_POLYGON_SMOOTH_ENABLE 0x00001838 +#define NV34TCL_CULL_FACE_ENABLE 0x0000183c +#define NV34TCL_TX_PALETTE_OFFSET(x) (0x00001840+((x)*4)) +#define NV34TCL_TX_PALETTE_OFFSET__SIZE 0x00000008 +#define NV34TCL_VTX_ATTR_2F_X(x) (0x00001880+((x)*8)) +#define NV34TCL_VTX_ATTR_2F_X__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_2F_Y(x) (0x00001884+((x)*8)) +#define NV34TCL_VTX_ATTR_2F_Y__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_2I(x) (0x00001900+((x)*4)) +#define NV34TCL_VTX_ATTR_2I__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_2I_X_SHIFT 0 +#define NV34TCL_VTX_ATTR_2I_X_MASK 0x0000ffff +#define NV34TCL_VTX_ATTR_2I_Y_SHIFT 16 +#define NV34TCL_VTX_ATTR_2I_Y_MASK 0xffff0000 +#define NV34TCL_VTX_ATTR_4UB(x) (0x00001940+((x)*4)) +#define NV34TCL_VTX_ATTR_4UB__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_4UB_X_SHIFT 0 +#define NV34TCL_VTX_ATTR_4UB_X_MASK 0x000000ff +#define NV34TCL_VTX_ATTR_4UB_Y_SHIFT 8 +#define NV34TCL_VTX_ATTR_4UB_Y_MASK 0x0000ff00 +#define NV34TCL_VTX_ATTR_4UB_Z_SHIFT 16 +#define NV34TCL_VTX_ATTR_4UB_Z_MASK 0x00ff0000 +#define NV34TCL_VTX_ATTR_4UB_W_SHIFT 24 +#define NV34TCL_VTX_ATTR_4UB_W_MASK 0xff000000 +#define NV34TCL_VTX_ATTR_4I_XY(x) (0x00001980+((x)*8)) +#define NV34TCL_VTX_ATTR_4I_XY__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_4I_XY_X_SHIFT 0 +#define NV34TCL_VTX_ATTR_4I_XY_X_MASK 0x0000ffff +#define NV34TCL_VTX_ATTR_4I_XY_Y_SHIFT 16 +#define NV34TCL_VTX_ATTR_4I_XY_Y_MASK 0xffff0000 +#define NV34TCL_VTX_ATTR_4I_ZW(x) (0x00001984+((x)*8)) +#define NV34TCL_VTX_ATTR_4I_ZW__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_4I_ZW_Z_SHIFT 0 +#define NV34TCL_VTX_ATTR_4I_ZW_Z_MASK 0x0000ffff +#define NV34TCL_VTX_ATTR_4I_ZW_W_SHIFT 16 +#define NV34TCL_VTX_ATTR_4I_ZW_W_MASK 0xffff0000 +#define NV34TCL_TX_OFFSET(x) (0x00001a00+((x)*32)) +#define NV34TCL_TX_OFFSET__SIZE 0x00000008 +#define NV34TCL_TX_FORMAT(x) (0x00001a04+((x)*32)) +#define NV34TCL_TX_FORMAT__SIZE 0x00000008 +#define NV34TCL_TX_FORMAT_DMA0 (1 << 0) +#define NV34TCL_TX_FORMAT_DMA1 (1 << 1) +#define NV34TCL_TX_FORMAT_CUBIC (1 << 2) +#define NV34TCL_TX_FORMAT_NO_BORDER (1 << 3) +#define NV34TCL_TX_FORMAT_DIMS_SHIFT 4 +#define NV34TCL_TX_FORMAT_DIMS_MASK 0x000000f0 +#define NV34TCL_TX_FORMAT_DIMS_1D 0x00000010 +#define NV34TCL_TX_FORMAT_DIMS_2D 0x00000020 +#define NV34TCL_TX_FORMAT_DIMS_3D 0x00000030 +#define NV34TCL_TX_FORMAT_FORMAT_SHIFT 8 +#define NV34TCL_TX_FORMAT_FORMAT_MASK 0x0000ff00 +#define NV34TCL_TX_FORMAT_FORMAT_L8 0x00000000 +#define NV34TCL_TX_FORMAT_FORMAT_A8 0x00000100 +#define NV34TCL_TX_FORMAT_FORMAT_A1R5G5B5 0x00000200 +#define NV34TCL_TX_FORMAT_FORMAT_A4R4G4B4 0x00000400 +#define NV34TCL_TX_FORMAT_FORMAT_R5G6B5 0x00000500 +#define NV34TCL_TX_FORMAT_FORMAT_A8R8G8B8 0x00000600 +#define NV34TCL_TX_FORMAT_FORMAT_X8R8G8B8 0x00000700 +#define NV34TCL_TX_FORMAT_FORMAT_INDEX8 0x00000b00 +#define NV34TCL_TX_FORMAT_FORMAT_DXT1 0x00000c00 +#define NV34TCL_TX_FORMAT_FORMAT_DXT3 0x00000e00 +#define NV34TCL_TX_FORMAT_FORMAT_DXT5 0x00000f00 +#define NV34TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT 0x00001000 +#define NV34TCL_TX_FORMAT_FORMAT_R5G6B5_RECT 0x00001100 +#define NV34TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT 0x00001200 +#define NV34TCL_TX_FORMAT_FORMAT_L8_RECT 0x00001300 +#define NV34TCL_TX_FORMAT_FORMAT_DSDT8_RECT 0x00001700 +#define NV34TCL_TX_FORMAT_FORMAT_A8L8 0x00001a00 +#define NV34TCL_TX_FORMAT_FORMAT_A8_RECT 0x00001b00 +#define NV34TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT 0x00001d00 +#define NV34TCL_TX_FORMAT_FORMAT_R8G8B8_RECT 0x00001e00 +#define NV34TCL_TX_FORMAT_FORMAT_A8L8_RECT 0x00002000 +#define NV34TCL_TX_FORMAT_FORMAT_DSDT8 0x00002800 +#define NV34TCL_TX_FORMAT_FORMAT_HILO16 0x00003300 +#define NV34TCL_TX_FORMAT_FORMAT_HILO16_RECT 0x00003600 +#define NV34TCL_TX_FORMAT_FORMAT_HILO8 0x00004400 +#define NV34TCL_TX_FORMAT_FORMAT_SIGNED_HILO8 0x00004500 +#define NV34TCL_TX_FORMAT_FORMAT_HILO8_RECT 0x00004600 +#define NV34TCL_TX_FORMAT_FORMAT_SIGNED_HILO8_RECT 0x00004700 +#define NV34TCL_TX_FORMAT_FORMAT_A16 0x00003200 +#define NV34TCL_TX_FORMAT_FORMAT_A16_RECT 0x00003500 +#define NV34TCL_TX_FORMAT_FORMAT_FLOAT_RGBA16_NV 0x00004a00 +#define NV34TCL_TX_FORMAT_FORMAT_FLOAT_RGBA32_NV 0x00004b00 +#define NV34TCL_TX_FORMAT_FORMAT_FLOAT_R32_NV 0x00004c00 +#define NV34TCL_TX_FORMAT_MIPMAP (1 << 19) +#define NV34TCL_TX_FORMAT_BASE_SIZE_U_SHIFT 20 +#define NV34TCL_TX_FORMAT_BASE_SIZE_U_MASK 0x00f00000 +#define NV34TCL_TX_FORMAT_BASE_SIZE_V_SHIFT 24 +#define NV34TCL_TX_FORMAT_BASE_SIZE_V_MASK 0x0f000000 +#define NV34TCL_TX_FORMAT_BASE_SIZE_W_SHIFT 28 +#define NV34TCL_TX_FORMAT_BASE_SIZE_W_MASK 0xf0000000 +#define NV34TCL_TX_WRAP(x) (0x00001a08+((x)*32)) +#define NV34TCL_TX_WRAP__SIZE 0x00000008 +#define NV34TCL_TX_WRAP_S_SHIFT 0 +#define NV34TCL_TX_WRAP_S_MASK 0x000000ff +#define NV34TCL_TX_WRAP_S_REPEAT 0x00000001 +#define NV34TCL_TX_WRAP_S_MIRRORED_REPEAT 0x00000002 +#define NV34TCL_TX_WRAP_S_CLAMP_TO_EDGE 0x00000003 +#define NV34TCL_TX_WRAP_S_CLAMP_TO_BORDER 0x00000004 +#define NV34TCL_TX_WRAP_S_CLAMP 0x00000005 +#define NV34TCL_TX_WRAP_T_SHIFT 8 +#define NV34TCL_TX_WRAP_T_MASK 0x00000f00 +#define NV34TCL_TX_WRAP_T_REPEAT 0x00000100 +#define NV34TCL_TX_WRAP_T_MIRRORED_REPEAT 0x00000200 +#define NV34TCL_TX_WRAP_T_CLAMP_TO_EDGE 0x00000300 +#define NV34TCL_TX_WRAP_T_CLAMP_TO_BORDER 0x00000400 +#define NV34TCL_TX_WRAP_T_CLAMP 0x00000500 +#define NV34TCL_TX_WRAP_EXPAND_NORMAL_SHIFT 12 +#define NV34TCL_TX_WRAP_EXPAND_NORMAL_MASK 0x0000f000 +#define NV34TCL_TX_WRAP_R_SHIFT 16 +#define NV34TCL_TX_WRAP_R_MASK 0x000f0000 +#define NV34TCL_TX_WRAP_R_REPEAT 0x00010000 +#define NV34TCL_TX_WRAP_R_MIRRORED_REPEAT 0x00020000 +#define NV34TCL_TX_WRAP_R_CLAMP_TO_EDGE 0x00030000 +#define NV34TCL_TX_WRAP_R_CLAMP_TO_BORDER 0x00040000 +#define NV34TCL_TX_WRAP_R_CLAMP 0x00050000 +#define NV34TCL_TX_WRAP_RCOMP_SHIFT 28 +#define NV34TCL_TX_WRAP_RCOMP_MASK 0xf0000000 +#define NV34TCL_TX_WRAP_RCOMP_NEVER 0x00000000 +#define NV34TCL_TX_WRAP_RCOMP_GREATER 0x10000000 +#define NV34TCL_TX_WRAP_RCOMP_EQUAL 0x20000000 +#define NV34TCL_TX_WRAP_RCOMP_GEQUAL 0x30000000 +#define NV34TCL_TX_WRAP_RCOMP_LESS 0x40000000 +#define NV34TCL_TX_WRAP_RCOMP_NOTEQUAL 0x50000000 +#define NV34TCL_TX_WRAP_RCOMP_LEQUAL 0x60000000 +#define NV34TCL_TX_WRAP_RCOMP_ALWAYS 0x70000000 +#define NV34TCL_TX_ENABLE(x) (0x00001a0c+((x)*32)) +#define NV34TCL_TX_ENABLE__SIZE 0x00000008 +#define NV34TCL_TX_ENABLE_ANISO_SHIFT 4 +#define NV34TCL_TX_ENABLE_ANISO_MASK 0x00000030 +#define NV34TCL_TX_ENABLE_ANISO_NONE 0x00000000 +#define NV34TCL_TX_ENABLE_ANISO_2X 0x00000010 +#define NV34TCL_TX_ENABLE_ANISO_4X 0x00000020 +#define NV34TCL_TX_ENABLE_ANISO_8X 0x00000030 +#define NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT 14 +#define NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_MASK 0x0003c000 +#define NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT 26 +#define NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_MASK 0x3c000000 +#define NV34TCL_TX_ENABLE_ENABLE (1 << 30) +#define NV34TCL_TX_SWIZZLE(x) (0x00001a10+((x)*32)) +#define NV34TCL_TX_SWIZZLE__SIZE 0x00000008 +#define NV34TCL_TX_SWIZZLE_S0_X_SHIFT 14 +#define NV34TCL_TX_SWIZZLE_S0_X_MASK 0x0000c000 +#define NV34TCL_TX_SWIZZLE_S0_X_ZERO 0x00000000 +#define NV34TCL_TX_SWIZZLE_S0_X_ONE 0x00004000 +#define NV34TCL_TX_SWIZZLE_S0_X_S1 0x00008000 +#define NV34TCL_TX_SWIZZLE_S0_Y_SHIFT 12 +#define NV34TCL_TX_SWIZZLE_S0_Y_MASK 0x00003000 +#define NV34TCL_TX_SWIZZLE_S0_Y_ZERO 0x00000000 +#define NV34TCL_TX_SWIZZLE_S0_Y_ONE 0x00001000 +#define NV34TCL_TX_SWIZZLE_S0_Y_S1 0x00002000 +#define NV34TCL_TX_SWIZZLE_S0_Z_SHIFT 10 +#define NV34TCL_TX_SWIZZLE_S0_Z_MASK 0x00000c00 +#define NV34TCL_TX_SWIZZLE_S0_Z_ZERO 0x00000000 +#define NV34TCL_TX_SWIZZLE_S0_Z_ONE 0x00000400 +#define NV34TCL_TX_SWIZZLE_S0_Z_S1 0x00000800 +#define NV34TCL_TX_SWIZZLE_S0_W_SHIFT 8 +#define NV34TCL_TX_SWIZZLE_S0_W_MASK 0x00000300 +#define NV34TCL_TX_SWIZZLE_S0_W_ZERO 0x00000000 +#define NV34TCL_TX_SWIZZLE_S0_W_ONE 0x00000100 +#define NV34TCL_TX_SWIZZLE_S0_W_S1 0x00000200 +#define NV34TCL_TX_SWIZZLE_S1_X_SHIFT 6 +#define NV34TCL_TX_SWIZZLE_S1_X_MASK 0x000000c0 +#define NV34TCL_TX_SWIZZLE_S1_X_W 0x00000000 +#define NV34TCL_TX_SWIZZLE_S1_X_Z 0x00000040 +#define NV34TCL_TX_SWIZZLE_S1_X_Y 0x00000080 +#define NV34TCL_TX_SWIZZLE_S1_X_X 0x000000c0 +#define NV34TCL_TX_SWIZZLE_S1_Y_SHIFT 4 +#define NV34TCL_TX_SWIZZLE_S1_Y_MASK 0x00000030 +#define NV34TCL_TX_SWIZZLE_S1_Y_W 0x00000000 +#define NV34TCL_TX_SWIZZLE_S1_Y_Z 0x00000010 +#define NV34TCL_TX_SWIZZLE_S1_Y_Y 0x00000020 +#define NV34TCL_TX_SWIZZLE_S1_Y_X 0x00000030 +#define NV34TCL_TX_SWIZZLE_S1_Z_SHIFT 2 +#define NV34TCL_TX_SWIZZLE_S1_Z_MASK 0x0000000c +#define NV34TCL_TX_SWIZZLE_S1_Z_W 0x00000000 +#define NV34TCL_TX_SWIZZLE_S1_Z_Z 0x00000004 +#define NV34TCL_TX_SWIZZLE_S1_Z_Y 0x00000008 +#define NV34TCL_TX_SWIZZLE_S1_Z_X 0x0000000c +#define NV34TCL_TX_SWIZZLE_S1_W_SHIFT 0 +#define NV34TCL_TX_SWIZZLE_S1_W_MASK 0x00000003 +#define NV34TCL_TX_SWIZZLE_S1_W_W 0x00000000 +#define NV34TCL_TX_SWIZZLE_S1_W_Z 0x00000001 +#define NV34TCL_TX_SWIZZLE_S1_W_Y 0x00000002 +#define NV34TCL_TX_SWIZZLE_S1_W_X 0x00000003 +#define NV34TCL_TX_SWIZZLE_RECT_PITCH_SHIFT 16 +#define NV34TCL_TX_SWIZZLE_RECT_PITCH_MASK 0xffff0000 +#define NV34TCL_TX_FILTER(x) (0x00001a14+((x)*32)) +#define NV34TCL_TX_FILTER__SIZE 0x00000008 +#define NV34TCL_TX_FILTER_LOD_BIAS_SHIFT 8 +#define NV34TCL_TX_FILTER_LOD_BIAS_MASK 0x00000f00 +#define NV34TCL_TX_FILTER_MINIFY_SHIFT 16 +#define NV34TCL_TX_FILTER_MINIFY_MASK 0x000f0000 +#define NV34TCL_TX_FILTER_MINIFY_NEAREST 0x00010000 +#define NV34TCL_TX_FILTER_MINIFY_LINEAR 0x00020000 +#define NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST 0x00030000 +#define NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST 0x00040000 +#define NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR 0x00050000 +#define NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR 0x00060000 +#define NV34TCL_TX_FILTER_MAGNIFY_SHIFT 24 +#define NV34TCL_TX_FILTER_MAGNIFY_MASK 0x0f000000 +#define NV34TCL_TX_FILTER_MAGNIFY_NEAREST 0x01000000 +#define NV34TCL_TX_FILTER_MAGNIFY_LINEAR 0x02000000 +#define NV34TCL_TX_FILTER_SIGNED_BLUE (1 << 28) +#define NV34TCL_TX_FILTER_SIGNED_GREEN (1 << 29) +#define NV34TCL_TX_FILTER_SIGNED_RED (1 << 30) +#define NV34TCL_TX_FILTER_SIGNED_ALPHA (1 << 31) +#define NV34TCL_TX_NPOT_SIZE(x) (0x00001a18+((x)*32)) +#define NV34TCL_TX_NPOT_SIZE__SIZE 0x00000008 +#define NV34TCL_TX_NPOT_SIZE_H_SHIFT 0 +#define NV34TCL_TX_NPOT_SIZE_H_MASK 0x0000ffff +#define NV34TCL_TX_NPOT_SIZE_W_SHIFT 16 +#define NV34TCL_TX_NPOT_SIZE_W_MASK 0xffff0000 +#define NV34TCL_TX_BORDER_COLOR(x) (0x00001a1c+((x)*32)) +#define NV34TCL_TX_BORDER_COLOR__SIZE 0x00000008 +#define NV34TCL_TX_BORDER_COLOR_B_SHIFT 0 +#define NV34TCL_TX_BORDER_COLOR_B_MASK 0x000000ff +#define NV34TCL_TX_BORDER_COLOR_G_SHIFT 8 +#define NV34TCL_TX_BORDER_COLOR_G_MASK 0x0000ff00 +#define NV34TCL_TX_BORDER_COLOR_R_SHIFT 16 +#define NV34TCL_TX_BORDER_COLOR_R_MASK 0x00ff0000 +#define NV34TCL_TX_BORDER_COLOR_A_SHIFT 24 +#define NV34TCL_TX_BORDER_COLOR_A_MASK 0xff000000 +#define NV34TCL_VTX_ATTR_4F_X(x) (0x00001c00+((x)*16)) +#define NV34TCL_VTX_ATTR_4F_X__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_4F_Y(x) (0x00001c04+((x)*16)) +#define NV34TCL_VTX_ATTR_4F_Y__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_4F_Z(x) (0x00001c08+((x)*16)) +#define NV34TCL_VTX_ATTR_4F_Z__SIZE 0x00000010 +#define NV34TCL_VTX_ATTR_4F_W(x) (0x00001c0c+((x)*16)) +#define NV34TCL_VTX_ATTR_4F_W__SIZE 0x00000010 +#define NV34TCL_FP_CONTROL 0x00001d60 +#define NV34TCL_FP_CONTROL_USES_KIL (1 << 7) +#define NV34TCL_FP_CONTROL_USED_REGS_MINUS1_DIV2_SHIFT 0 +#define NV34TCL_FP_CONTROL_USED_REGS_MINUS1_DIV2_MASK 0x0000000f +#define NV34TCL_DEPTH_UNK17D8 0x00001d78 +#define NV34TCL_DEPTH_UNK17D8_CLAMP_SHIFT 4 +#define NV34TCL_DEPTH_UNK17D8_CLAMP_MASK 0x000000f0 +#define NV34TCL_MULTISAMPLE_CONTROL 0x00001d7c +#define NV34TCL_MULTISAMPLE_CONTROL_ENABLE (1 << 0) +#define NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_ALPHA_TO_COVERAGE (1 << 4) +#define NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_ALPHA_TO_ONE (1 << 8) +#define NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_COVERAGE_SHIFT 16 +#define NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_COVERAGE_MASK 0xffff0000 +#define NV34TCL_CLEAR_DEPTH_VALUE 0x00001d8c +#define NV34TCL_CLEAR_COLOR_VALUE 0x00001d90 +#define NV34TCL_CLEAR_COLOR_VALUE_B_SHIFT 0 +#define NV34TCL_CLEAR_COLOR_VALUE_B_MASK 0x000000ff +#define NV34TCL_CLEAR_COLOR_VALUE_G_SHIFT 8 +#define NV34TCL_CLEAR_COLOR_VALUE_G_MASK 0x0000ff00 +#define NV34TCL_CLEAR_COLOR_VALUE_R_SHIFT 16 +#define NV34TCL_CLEAR_COLOR_VALUE_R_MASK 0x00ff0000 +#define NV34TCL_CLEAR_COLOR_VALUE_A_SHIFT 24 +#define NV34TCL_CLEAR_COLOR_VALUE_A_MASK 0xff000000 +#define NV34TCL_CLEAR_BUFFERS 0x00001d94 +#define NV34TCL_CLEAR_BUFFERS_COLOR_A (1 << 7) +#define NV34TCL_CLEAR_BUFFERS_COLOR_B (1 << 6) +#define NV34TCL_CLEAR_BUFFERS_COLOR_G (1 << 5) +#define NV34TCL_CLEAR_BUFFERS_COLOR_R (1 << 4) +#define NV34TCL_CLEAR_BUFFERS_STENCIL (1 << 1) +#define NV34TCL_CLEAR_BUFFERS_DEPTH (1 << 0) +#define NV34TCL_DO_VERTICES 0x00001dac +#define NV34TCL_LINE_STIPPLE_ENABLE 0x00001db4 +#define NV34TCL_LINE_STIPPLE_PATTERN 0x00001db8 +#define NV34TCL_LINE_STIPPLE_PATTERN_FACTOR_SHIFT 0 +#define NV34TCL_LINE_STIPPLE_PATTERN_FACTOR_MASK 0x0000ffff +#define NV34TCL_LINE_STIPPLE_PATTERN_PATTERN_SHIFT 16 +#define NV34TCL_LINE_STIPPLE_PATTERN_PATTERN_MASK 0xffff0000 +#define NV34TCL_BACK_MATERIAL_SHININESS(x) (0x00001e20+((x)*4)) +#define NV34TCL_BACK_MATERIAL_SHININESS__SIZE 0x00000006 +#define NV34TCL_VTX_ATTR_1F(x) (0x00001e40+((x)*4)) +#define NV34TCL_VTX_ATTR_1F__SIZE 0x00000010 +#define NV34TCL_ENGINE 0x00001e94 +#define NV34TCL_ENGINE_FP (1 << 0) +#define NV34TCL_ENGINE_VP (1 << 1) +#define NV34TCL_ENGINE_FIXED (1 << 2) +#define NV34TCL_VP_UPLOAD_FROM_ID 0x00001e9c +#define NV34TCL_VP_START_FROM_ID 0x00001ea0 +#define NV34TCL_POINT_PARAMETERS(x) (0x00001ec0+((x)*4)) +#define NV34TCL_POINT_PARAMETERS__SIZE 0x00000008 +#define NV34TCL_POINT_SIZE 0x00001ee0 +#define NV34TCL_POINT_PARAMETERS_ENABLE 0x00001ee4 +#define NV34TCL_POINT_SPRITE 0x00001ee8 +#define NV34TCL_POINT_SPRITE_ENABLE (1 << 0) +#define NV34TCL_POINT_SPRITE_R_MODE_SHIFT 1 +#define NV34TCL_POINT_SPRITE_R_MODE_MASK 0x00000006 +#define NV34TCL_POINT_SPRITE_R_MODE_ZERO 0x00000000 +#define NV34TCL_POINT_SPRITE_R_MODE_R 0x00000002 +#define NV34TCL_POINT_SPRITE_R_MODE_S 0x00000004 +#define NV34TCL_POINT_SPRITE_COORD_REPLACE_0 (1 << 8) +#define NV34TCL_POINT_SPRITE_COORD_REPLACE_1 (1 << 9) +#define NV34TCL_POINT_SPRITE_COORD_REPLACE_2 (1 << 10) +#define NV34TCL_POINT_SPRITE_COORD_REPLACE_3 (1 << 11) +#define NV34TCL_POINT_SPRITE_COORD_REPLACE_4 (1 << 12) +#define NV34TCL_POINT_SPRITE_COORD_REPLACE_5 (1 << 13) +#define NV34TCL_POINT_SPRITE_COORD_REPLACE_6 (1 << 14) +#define NV34TCL_POINT_SPRITE_COORD_REPLACE_7 (1 << 15) +#define NV34TCL_VP_UPLOAD_CONST_ID 0x00001efc +#define NV34TCL_VP_UPLOAD_CONST_X(x) (0x00001f00+((x)*16)) +#define NV34TCL_VP_UPLOAD_CONST_X__SIZE 0x00000004 +#define NV34TCL_VP_UPLOAD_CONST_Y(x) (0x00001f04+((x)*16)) +#define NV34TCL_VP_UPLOAD_CONST_Y__SIZE 0x00000004 +#define NV34TCL_VP_UPLOAD_CONST_Z(x) (0x00001f08+((x)*16)) +#define NV34TCL_VP_UPLOAD_CONST_Z__SIZE 0x00000004 +#define NV34TCL_VP_UPLOAD_CONST_W(x) (0x00001f0c+((x)*16)) +#define NV34TCL_VP_UPLOAD_CONST_W__SIZE 0x00000004 +#define NV34TCL_UNK1f80(x) (0x00001f80+((x)*4)) +#define NV34TCL_UNK1f80__SIZE 0x00000010 + + +#define NV40TCL 0x00004097 + +#define NV40TCL_REF_CNT 0x00000050 +#define NV40TCL_NOP 0x00000100 +#define NV40TCL_NOTIFY 0x00000104 +#define NV40TCL_DMA_NOTIFY 0x00000180 +#define NV40TCL_DMA_TEXTURE0 0x00000184 +#define NV40TCL_DMA_TEXTURE1 0x00000188 +#define NV40TCL_DMA_COLOR1 0x0000018c +#define NV40TCL_DMA_COLOR0 0x00000194 +#define NV40TCL_DMA_ZETA 0x00000198 +#define NV40TCL_DMA_VTXBUF0 0x0000019c +#define NV40TCL_DMA_VTXBUF1 0x000001a0 +#define NV40TCL_DMA_FENCE 0x000001a4 +#define NV40TCL_DMA_QUERY 0x000001a8 +#define NV40TCL_DMA_UNK01AC 0x000001ac +#define NV40TCL_DMA_UNK01B0 0x000001b0 +#define NV40TCL_DMA_COLOR2 0x000001b4 +#define NV40TCL_DMA_COLOR3 0x000001b8 +#define NV40TCL_RT_HORIZ 0x00000200 +#define NV40TCL_RT_HORIZ_W_SHIFT 16 +#define NV40TCL_RT_HORIZ_W_MASK 0xffff0000 +#define NV40TCL_RT_HORIZ_X_SHIFT 0 +#define NV40TCL_RT_HORIZ_X_MASK 0x0000ffff +#define NV40TCL_RT_VERT 0x00000204 +#define NV40TCL_RT_VERT_H_SHIFT 16 +#define NV40TCL_RT_VERT_H_MASK 0xffff0000 +#define NV40TCL_RT_VERT_Y_SHIFT 0 +#define NV40TCL_RT_VERT_Y_MASK 0x0000ffff +#define NV40TCL_RT_FORMAT 0x00000208 +#define NV40TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT 24 +#define NV40TCL_RT_FORMAT_LOG2_HEIGHT_MASK 0xff000000 +#define NV40TCL_RT_FORMAT_LOG2_WIDTH_SHIFT 16 +#define NV40TCL_RT_FORMAT_LOG2_WIDTH_MASK 0x00ff0000 +#define NV40TCL_RT_FORMAT_TYPE_SHIFT 8 +#define NV40TCL_RT_FORMAT_TYPE_MASK 0x00000f00 +#define NV40TCL_RT_FORMAT_TYPE_LINEAR 0x00000100 +#define NV40TCL_RT_FORMAT_TYPE_SWIZZLED 0x00000200 +#define NV40TCL_RT_FORMAT_ZETA_SHIFT 5 +#define NV40TCL_RT_FORMAT_ZETA_MASK 0x000000e0 +#define NV40TCL_RT_FORMAT_ZETA_Z16 0x00000020 +#define NV40TCL_RT_FORMAT_ZETA_Z24S8 0x00000040 +#define NV40TCL_RT_FORMAT_COLOR_SHIFT 0 +#define NV40TCL_RT_FORMAT_COLOR_MASK 0x0000001f +#define NV40TCL_RT_FORMAT_COLOR_R5G6B5 0x00000003 +#define NV40TCL_RT_FORMAT_COLOR_X8R8G8B8 0x00000005 +#define NV40TCL_RT_FORMAT_COLOR_A8R8G8B8 0x00000008 +#define NV40TCL_RT_FORMAT_COLOR_B8 0x00000009 +#define NV40TCL_RT_FORMAT_COLOR_UNKNOWN 0x0000000d +#define NV40TCL_RT_FORMAT_COLOR_X8B8G8R8 0x0000000f +#define NV40TCL_RT_FORMAT_COLOR_A8B8G8R8 0x00000010 +#define NV40TCL_COLOR0_PITCH 0x0000020c +#define NV40TCL_COLOR0_OFFSET 0x00000210 +#define NV40TCL_ZETA_OFFSET 0x00000214 +#define NV40TCL_COLOR1_OFFSET 0x00000218 +#define NV40TCL_COLOR1_PITCH 0x0000021c +#define NV40TCL_RT_ENABLE 0x00000220 +#define NV40TCL_RT_ENABLE_MRT (1 << 4) +#define NV40TCL_RT_ENABLE_COLOR3 (1 << 3) +#define NV40TCL_RT_ENABLE_COLOR2 (1 << 2) +#define NV40TCL_RT_ENABLE_COLOR1 (1 << 1) +#define NV40TCL_RT_ENABLE_COLOR0 (1 << 0) +#define NV40TCL_ZETA_PITCH 0x0000022c +#define NV40TCL_COLOR2_PITCH 0x00000280 +#define NV40TCL_COLOR3_PITCH 0x00000284 +#define NV40TCL_COLOR2_OFFSET 0x00000288 +#define NV40TCL_COLOR3_OFFSET 0x0000028c +#define NV40TCL_VIEWPORT_CLIP_HORIZ(x) (0x000002c0+((x)*8)) +#define NV40TCL_VIEWPORT_CLIP_HORIZ__SIZE 0x00000008 +#define NV40TCL_VIEWPORT_CLIP_VERT(x) (0x000002c4+((x)*8)) +#define NV40TCL_VIEWPORT_CLIP_VERT__SIZE 0x00000008 +#define NV40TCL_DITHER_ENABLE 0x00000300 +#define NV40TCL_ALPHA_TEST_ENABLE 0x00000304 +#define NV40TCL_ALPHA_TEST_FUNC 0x00000308 +#define NV40TCL_ALPHA_TEST_FUNC_NEVER 0x00000200 +#define NV40TCL_ALPHA_TEST_FUNC_LESS 0x00000201 +#define NV40TCL_ALPHA_TEST_FUNC_EQUAL 0x00000202 +#define NV40TCL_ALPHA_TEST_FUNC_LEQUAL 0x00000203 +#define NV40TCL_ALPHA_TEST_FUNC_GREATER 0x00000204 +#define NV40TCL_ALPHA_TEST_FUNC_NOTEQUAL 0x00000205 +#define NV40TCL_ALPHA_TEST_FUNC_GEQUAL 0x00000206 +#define NV40TCL_ALPHA_TEST_FUNC_ALWAYS 0x00000207 +#define NV40TCL_ALPHA_TEST_REF 0x0000030c +#define NV40TCL_BLEND_ENABLE 0x00000310 +#define NV40TCL_BLEND_FUNC_SRC 0x00000314 +#define NV40TCL_BLEND_FUNC_SRC_RGB_SHIFT 0 +#define NV40TCL_BLEND_FUNC_SRC_RGB_MASK 0x0000ffff +#define NV40TCL_BLEND_FUNC_SRC_RGB_ZERO 0x00000000 +#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE 0x00000001 +#define NV40TCL_BLEND_FUNC_SRC_RGB_SRC_COLOR 0x00000300 +#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_COLOR 0x00000301 +#define NV40TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA 0x00000302 +#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_ALPHA 0x00000303 +#define NV40TCL_BLEND_FUNC_SRC_RGB_DST_ALPHA 0x00000304 +#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_ALPHA 0x00000305 +#define NV40TCL_BLEND_FUNC_SRC_RGB_DST_COLOR 0x00000306 +#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_COLOR 0x00000307 +#define NV40TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA_SATURATE 0x00000308 +#define NV40TCL_BLEND_FUNC_SRC_RGB_CONSTANT_COLOR 0x00008001 +#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002 +#define NV40TCL_BLEND_FUNC_SRC_RGB_CONSTANT_ALPHA 0x00008003 +#define NV40TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004 +#define NV40TCL_BLEND_FUNC_SRC_ALPHA_SHIFT 16 +#define NV40TCL_BLEND_FUNC_SRC_ALPHA_MASK 0xffff0000 +#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ZERO 0x00000000 +#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE 0x00010000 +#define NV40TCL_BLEND_FUNC_SRC_ALPHA_SRC_COLOR 0x03000000 +#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_COLOR 0x03010000 +#define NV40TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA 0x03020000 +#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_ALPHA 0x03030000 +#define NV40TCL_BLEND_FUNC_SRC_ALPHA_DST_ALPHA 0x03040000 +#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_ALPHA 0x03050000 +#define NV40TCL_BLEND_FUNC_SRC_ALPHA_DST_COLOR 0x03060000 +#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_COLOR 0x03070000 +#define NV40TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA_SATURATE 0x03080000 +#define NV40TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_COLOR 0x80010000 +#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x80020000 +#define NV40TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_ALPHA 0x80030000 +#define NV40TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x80040000 +#define NV40TCL_BLEND_FUNC_DST 0x00000318 +#define NV40TCL_BLEND_FUNC_DST_RGB_SHIFT 0 +#define NV40TCL_BLEND_FUNC_DST_RGB_MASK 0x0000ffff +#define NV40TCL_BLEND_FUNC_DST_RGB_ZERO 0x00000000 +#define NV40TCL_BLEND_FUNC_DST_RGB_ONE 0x00000001 +#define NV40TCL_BLEND_FUNC_DST_RGB_SRC_COLOR 0x00000300 +#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_COLOR 0x00000301 +#define NV40TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA 0x00000302 +#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_ALPHA 0x00000303 +#define NV40TCL_BLEND_FUNC_DST_RGB_DST_ALPHA 0x00000304 +#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_ALPHA 0x00000305 +#define NV40TCL_BLEND_FUNC_DST_RGB_DST_COLOR 0x00000306 +#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_COLOR 0x00000307 +#define NV40TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA_SATURATE 0x00000308 +#define NV40TCL_BLEND_FUNC_DST_RGB_CONSTANT_COLOR 0x00008001 +#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002 +#define NV40TCL_BLEND_FUNC_DST_RGB_CONSTANT_ALPHA 0x00008003 +#define NV40TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004 +#define NV40TCL_BLEND_FUNC_DST_ALPHA_SHIFT 16 +#define NV40TCL_BLEND_FUNC_DST_ALPHA_MASK 0xffff0000 +#define NV40TCL_BLEND_FUNC_DST_ALPHA_ZERO 0x00000000 +#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE 0x00010000 +#define NV40TCL_BLEND_FUNC_DST_ALPHA_SRC_COLOR 0x03000000 +#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_COLOR 0x03010000 +#define NV40TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA 0x03020000 +#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_ALPHA 0x03030000 +#define NV40TCL_BLEND_FUNC_DST_ALPHA_DST_ALPHA 0x03040000 +#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_ALPHA 0x03050000 +#define NV40TCL_BLEND_FUNC_DST_ALPHA_DST_COLOR 0x03060000 +#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_COLOR 0x03070000 +#define NV40TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA_SATURATE 0x03080000 +#define NV40TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_COLOR 0x80010000 +#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x80020000 +#define NV40TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_ALPHA 0x80030000 +#define NV40TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x80040000 +#define NV40TCL_BLEND_COLOR 0x0000031c +#define NV40TCL_BLEND_COLOR_B_SHIFT 0 +#define NV40TCL_BLEND_COLOR_B_MASK 0x000000ff +#define NV40TCL_BLEND_COLOR_G_SHIFT 8 +#define NV40TCL_BLEND_COLOR_G_MASK 0x0000ff00 +#define NV40TCL_BLEND_COLOR_R_SHIFT 16 +#define NV40TCL_BLEND_COLOR_R_MASK 0x00ff0000 +#define NV40TCL_BLEND_COLOR_A_SHIFT 24 +#define NV40TCL_BLEND_COLOR_A_MASK 0xff000000 +#define NV40TCL_BLEND_EQUATION 0x00000320 +#define NV40TCL_BLEND_EQUATION_RGB_SHIFT 0 +#define NV40TCL_BLEND_EQUATION_RGB_MASK 0x0000ffff +#define NV40TCL_BLEND_EQUATION_RGB_FUNC_ADD 0x00008006 +#define NV40TCL_BLEND_EQUATION_RGB_MIN 0x00008007 +#define NV40TCL_BLEND_EQUATION_RGB_MAX 0x00008008 +#define NV40TCL_BLEND_EQUATION_RGB_FUNC_SUBTRACT 0x0000800a +#define NV40TCL_BLEND_EQUATION_RGB_FUNC_REVERSE_SUBTRACT 0x0000800b +#define NV40TCL_BLEND_EQUATION_ALPHA_SHIFT 16 +#define NV40TCL_BLEND_EQUATION_ALPHA_MASK 0xffff0000 +#define NV40TCL_BLEND_EQUATION_ALPHA_FUNC_ADD 0x80060000 +#define NV40TCL_BLEND_EQUATION_ALPHA_MIN 0x80070000 +#define NV40TCL_BLEND_EQUATION_ALPHA_MAX 0x80080000 +#define NV40TCL_BLEND_EQUATION_ALPHA_FUNC_SUBTRACT 0x800a0000 +#define NV40TCL_BLEND_EQUATION_ALPHA_FUNC_REVERSE_SUBTRACT 0x800b0000 +#define NV40TCL_COLOR_MASK 0x00000324 +#define NV40TCL_COLOR_MASK_BUFFER0_B_SHIFT 0 +#define NV40TCL_COLOR_MASK_BUFFER0_B_MASK 0x000000ff +#define NV40TCL_COLOR_MASK_BUFFER0_G_SHIFT 8 +#define NV40TCL_COLOR_MASK_BUFFER0_G_MASK 0x0000ff00 +#define NV40TCL_COLOR_MASK_BUFFER0_R_SHIFT 16 +#define NV40TCL_COLOR_MASK_BUFFER0_R_MASK 0x00ff0000 +#define NV40TCL_COLOR_MASK_BUFFER0_A_SHIFT 24 +#define NV40TCL_COLOR_MASK_BUFFER0_A_MASK 0xff000000 +#define NV40TCL_STENCIL_FRONT_ENABLE 0x00000328 +#define NV40TCL_STENCIL_FRONT_MASK 0x0000032c +#define NV40TCL_STENCIL_FRONT_FUNC_FUNC 0x00000330 +#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_NEVER 0x00000200 +#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_LESS 0x00000201 +#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_EQUAL 0x00000202 +#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_LEQUAL 0x00000203 +#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_GREATER 0x00000204 +#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_NOTEQUAL 0x00000205 +#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_GEQUAL 0x00000206 +#define NV40TCL_STENCIL_FRONT_FUNC_FUNC_ALWAYS 0x00000207 +#define NV40TCL_STENCIL_FRONT_FUNC_REF 0x00000334 +#define NV40TCL_STENCIL_FRONT_FUNC_MASK 0x00000338 +#define NV40TCL_STENCIL_FRONT_OP_FAIL 0x0000033c +#define NV40TCL_STENCIL_FRONT_OP_FAIL_ZERO 0x00000000 +#define NV40TCL_STENCIL_FRONT_OP_FAIL_INVERT 0x0000150a +#define NV40TCL_STENCIL_FRONT_OP_FAIL_KEEP 0x00001e00 +#define NV40TCL_STENCIL_FRONT_OP_FAIL_REPLACE 0x00001e01 +#define NV40TCL_STENCIL_FRONT_OP_FAIL_INCR 0x00001e02 +#define NV40TCL_STENCIL_FRONT_OP_FAIL_DECR 0x00001e03 +#define NV40TCL_STENCIL_FRONT_OP_FAIL_INCR_WRAP 0x00008507 +#define NV40TCL_STENCIL_FRONT_OP_FAIL_DECR_WRAP 0x00008508 +#define NV40TCL_STENCIL_FRONT_OP_ZFAIL 0x00000340 +#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_ZERO 0x00000000 +#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_INVERT 0x0000150a +#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_KEEP 0x00001e00 +#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_REPLACE 0x00001e01 +#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_INCR 0x00001e02 +#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_DECR 0x00001e03 +#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_INCR_WRAP 0x00008507 +#define NV40TCL_STENCIL_FRONT_OP_ZFAIL_DECR_WRAP 0x00008508 +#define NV40TCL_STENCIL_FRONT_OP_ZPASS 0x00000344 +#define NV40TCL_STENCIL_FRONT_OP_ZPASS_ZERO 0x00000000 +#define NV40TCL_STENCIL_FRONT_OP_ZPASS_INVERT 0x0000150a +#define NV40TCL_STENCIL_FRONT_OP_ZPASS_KEEP 0x00001e00 +#define NV40TCL_STENCIL_FRONT_OP_ZPASS_REPLACE 0x00001e01 +#define NV40TCL_STENCIL_FRONT_OP_ZPASS_INCR 0x00001e02 +#define NV40TCL_STENCIL_FRONT_OP_ZPASS_DECR 0x00001e03 +#define NV40TCL_STENCIL_FRONT_OP_ZPASS_INCR_WRAP 0x00008507 +#define NV40TCL_STENCIL_FRONT_OP_ZPASS_DECR_WRAP 0x00008508 +#define NV40TCL_STENCIL_BACK_ENABLE 0x00000348 +#define NV40TCL_STENCIL_BACK_MASK 0x0000034c +#define NV40TCL_STENCIL_BACK_FUNC_FUNC 0x00000350 +#define NV40TCL_STENCIL_BACK_FUNC_FUNC_NEVER 0x00000200 +#define NV40TCL_STENCIL_BACK_FUNC_FUNC_LESS 0x00000201 +#define NV40TCL_STENCIL_BACK_FUNC_FUNC_EQUAL 0x00000202 +#define NV40TCL_STENCIL_BACK_FUNC_FUNC_LEQUAL 0x00000203 +#define NV40TCL_STENCIL_BACK_FUNC_FUNC_GREATER 0x00000204 +#define NV40TCL_STENCIL_BACK_FUNC_FUNC_NOTEQUAL 0x00000205 +#define NV40TCL_STENCIL_BACK_FUNC_FUNC_GEQUAL 0x00000206 +#define NV40TCL_STENCIL_BACK_FUNC_FUNC_ALWAYS 0x00000207 +#define NV40TCL_STENCIL_BACK_FUNC_REF 0x00000354 +#define NV40TCL_STENCIL_BACK_FUNC_MASK 0x00000358 +#define NV40TCL_STENCIL_BACK_OP_FAIL 0x0000035c +#define NV40TCL_STENCIL_BACK_OP_FAIL_ZERO 0x00000000 +#define NV40TCL_STENCIL_BACK_OP_FAIL_INVERT 0x0000150a +#define NV40TCL_STENCIL_BACK_OP_FAIL_KEEP 0x00001e00 +#define NV40TCL_STENCIL_BACK_OP_FAIL_REPLACE 0x00001e01 +#define NV40TCL_STENCIL_BACK_OP_FAIL_INCR 0x00001e02 +#define NV40TCL_STENCIL_BACK_OP_FAIL_DECR 0x00001e03 +#define NV40TCL_STENCIL_BACK_OP_FAIL_INCR_WRAP 0x00008507 +#define NV40TCL_STENCIL_BACK_OP_FAIL_DECR_WRAP 0x00008508 +#define NV40TCL_STENCIL_BACK_OP_ZFAIL 0x00000360 +#define NV40TCL_STENCIL_BACK_OP_ZFAIL_ZERO 0x00000000 +#define NV40TCL_STENCIL_BACK_OP_ZFAIL_INVERT 0x0000150a +#define NV40TCL_STENCIL_BACK_OP_ZFAIL_KEEP 0x00001e00 +#define NV40TCL_STENCIL_BACK_OP_ZFAIL_REPLACE 0x00001e01 +#define NV40TCL_STENCIL_BACK_OP_ZFAIL_INCR 0x00001e02 +#define NV40TCL_STENCIL_BACK_OP_ZFAIL_DECR 0x00001e03 +#define NV40TCL_STENCIL_BACK_OP_ZFAIL_INCR_WRAP 0x00008507 +#define NV40TCL_STENCIL_BACK_OP_ZFAIL_DECR_WRAP 0x00008508 +#define NV40TCL_STENCIL_BACK_OP_ZPASS 0x00000364 +#define NV40TCL_STENCIL_BACK_OP_ZPASS_ZERO 0x00000000 +#define NV40TCL_STENCIL_BACK_OP_ZPASS_INVERT 0x0000150a +#define NV40TCL_STENCIL_BACK_OP_ZPASS_KEEP 0x00001e00 +#define NV40TCL_STENCIL_BACK_OP_ZPASS_REPLACE 0x00001e01 +#define NV40TCL_STENCIL_BACK_OP_ZPASS_INCR 0x00001e02 +#define NV40TCL_STENCIL_BACK_OP_ZPASS_DECR 0x00001e03 +#define NV40TCL_STENCIL_BACK_OP_ZPASS_INCR_WRAP 0x00008507 +#define NV40TCL_STENCIL_BACK_OP_ZPASS_DECR_WRAP 0x00008508 +#define NV40TCL_SHADE_MODEL 0x00000368 +#define NV40TCL_SHADE_MODEL_FLAT 0x00001d00 +#define NV40TCL_SHADE_MODEL_SMOOTH 0x00001d01 +#define NV40TCL_MRT_COLOR_MASK 0x00000370 +#define NV40TCL_MRT_COLOR_MASK_BUFFER1_A (1 << 4) +#define NV40TCL_MRT_COLOR_MASK_BUFFER1_R (1 << 5) +#define NV40TCL_MRT_COLOR_MASK_BUFFER1_G (1 << 6) +#define NV40TCL_MRT_COLOR_MASK_BUFFER1_B (1 << 7) +#define NV40TCL_MRT_COLOR_MASK_BUFFER2_A (1 << 8) +#define NV40TCL_MRT_COLOR_MASK_BUFFER2_R (1 << 9) +#define NV40TCL_MRT_COLOR_MASK_BUFFER2_G (1 << 10) +#define NV40TCL_MRT_COLOR_MASK_BUFFER2_B (1 << 11) +#define NV40TCL_MRT_COLOR_MASK_BUFFER3_A (1 << 12) +#define NV40TCL_MRT_COLOR_MASK_BUFFER3_R (1 << 13) +#define NV40TCL_MRT_COLOR_MASK_BUFFER3_G (1 << 14) +#define NV40TCL_MRT_COLOR_MASK_BUFFER3_B (1 << 15) +#define NV40TCL_COLOR_LOGIC_OP_ENABLE 0x00000374 +#define NV40TCL_COLOR_LOGIC_OP 0x00000378 +#define NV40TCL_COLOR_LOGIC_OP_CLEAR 0x00001500 +#define NV40TCL_COLOR_LOGIC_OP_AND 0x00001501 +#define NV40TCL_COLOR_LOGIC_OP_AND_REVERSE 0x00001502 +#define NV40TCL_COLOR_LOGIC_OP_COPY 0x00001503 +#define NV40TCL_COLOR_LOGIC_OP_AND_INVERTED 0x00001504 +#define NV40TCL_COLOR_LOGIC_OP_NOOP 0x00001505 +#define NV40TCL_COLOR_LOGIC_OP_XOR 0x00001506 +#define NV40TCL_COLOR_LOGIC_OP_OR 0x00001507 +#define NV40TCL_COLOR_LOGIC_OP_NOR 0x00001508 +#define NV40TCL_COLOR_LOGIC_OP_EQUIV 0x00001509 +#define NV40TCL_COLOR_LOGIC_OP_INVERT 0x0000150a +#define NV40TCL_COLOR_LOGIC_OP_OR_REVERSE 0x0000150b +#define NV40TCL_COLOR_LOGIC_OP_COPY_INVERTED 0x0000150c +#define NV40TCL_COLOR_LOGIC_OP_OR_INVERTED 0x0000150d +#define NV40TCL_COLOR_LOGIC_OP_NAND 0x0000150e +#define NV40TCL_COLOR_LOGIC_OP_SET 0x0000150f +#define NV40TCL_DEPTH_RANGE_NEAR 0x00000394 +#define NV40TCL_DEPTH_RANGE_FAR 0x00000398 +#define NV40TCL_LINE_WIDTH 0x000003b8 +#define NV40TCL_LINE_SMOOTH_ENABLE 0x000003bc +#define NV40TCL_UNK03C0(x) (0x000003c0+((x)*4)) +#define NV40TCL_UNK03C0__SIZE 0x00000010 +#define NV40TCL_UNK0400(x) (0x00000400+((x)*4)) +#define NV40TCL_UNK0400__SIZE 0x00000010 +#define NV40TCL_UNK0440(x) (0x00000440+((x)*4)) +#define NV40TCL_UNK0440__SIZE 0x00000020 +#define NV40TCL_SCISSOR_HORIZ 0x000008c0 +#define NV40TCL_SCISSOR_HORIZ_X_SHIFT 0 +#define NV40TCL_SCISSOR_HORIZ_X_MASK 0x0000ffff +#define NV40TCL_SCISSOR_HORIZ_W_SHIFT 16 +#define NV40TCL_SCISSOR_HORIZ_W_MASK 0xffff0000 +#define NV40TCL_SCISSOR_VERT 0x000008c4 +#define NV40TCL_SCISSOR_VERT_Y_SHIFT 0 +#define NV40TCL_SCISSOR_VERT_Y_MASK 0x0000ffff +#define NV40TCL_SCISSOR_VERT_H_SHIFT 16 +#define NV40TCL_SCISSOR_VERT_H_MASK 0xffff0000 +#define NV40TCL_FOG_MODE 0x000008cc +#define NV40TCL_FOG_EQUATION_CONSTANT 0x000008d0 +#define NV40TCL_FOG_EQUATION_LINEAR 0x000008d4 +#define NV40TCL_FOG_EQUATION_QUADRATIC 0x000008d8 +#define NV40TCL_FP_ADDRESS 0x000008e4 +#define NV40TCL_FP_ADDRESS_OFFSET_SHIFT 8 +#define NV40TCL_FP_ADDRESS_OFFSET_MASK 0xffffff00 +#define NV40TCL_FP_ADDRESS_DMA1 (1 << 1) +#define NV40TCL_FP_ADDRESS_DMA0 (1 << 0) +#define NV40TCL_VIEWPORT_HORIZ 0x00000a00 +#define NV40TCL_VIEWPORT_HORIZ_W_SHIFT 16 +#define NV40TCL_VIEWPORT_HORIZ_W_MASK 0xffff0000 +#define NV40TCL_VIEWPORT_HORIZ_X_SHIFT 0 +#define NV40TCL_VIEWPORT_HORIZ_X_MASK 0x0000ffff +#define NV40TCL_VIEWPORT_VERT 0x00000a04 +#define NV40TCL_VIEWPORT_VERT_H_SHIFT 16 +#define NV40TCL_VIEWPORT_VERT_H_MASK 0xffff0000 +#define NV40TCL_VIEWPORT_VERT_Y_SHIFT 0 +#define NV40TCL_VIEWPORT_VERT_Y_MASK 0x0000ffff +#define NV40TCL_VIEWPORT_TRANSLATE_X 0x00000a20 +#define NV40TCL_VIEWPORT_TRANSLATE_Y 0x00000a24 +#define NV40TCL_VIEWPORT_TRANSLATE_Z 0x00000a28 +#define NV40TCL_VIEWPORT_TRANSLATE_W 0x00000a2c +#define NV40TCL_VIEWPORT_SCALE_X 0x00000a30 +#define NV40TCL_VIEWPORT_SCALE_Y 0x00000a34 +#define NV40TCL_VIEWPORT_SCALE_Z 0x00000a38 +#define NV40TCL_VIEWPORT_SCALE_W 0x00000a3c +#define NV40TCL_POLYGON_OFFSET_POINT_ENABLE 0x00000a60 +#define NV40TCL_POLYGON_OFFSET_LINE_ENABLE 0x00000a64 +#define NV40TCL_POLYGON_OFFSET_FILL_ENABLE 0x00000a68 +#define NV40TCL_DEPTH_FUNC 0x00000a6c +#define NV40TCL_DEPTH_FUNC_NEVER 0x00000200 +#define NV40TCL_DEPTH_FUNC_LESS 0x00000201 +#define NV40TCL_DEPTH_FUNC_EQUAL 0x00000202 +#define NV40TCL_DEPTH_FUNC_LEQUAL 0x00000203 +#define NV40TCL_DEPTH_FUNC_GREATER 0x00000204 +#define NV40TCL_DEPTH_FUNC_NOTEQUAL 0x00000205 +#define NV40TCL_DEPTH_FUNC_GEQUAL 0x00000206 +#define NV40TCL_DEPTH_FUNC_ALWAYS 0x00000207 +#define NV40TCL_DEPTH_WRITE_ENABLE 0x00000a70 +#define NV40TCL_DEPTH_TEST_ENABLE 0x00000a74 +#define NV40TCL_POLYGON_OFFSET_FACTOR 0x00000a78 +#define NV40TCL_POLYGON_OFFSET_UNITS 0x00000a7c +#define NV40TCL_VTX_ATTR_3I_XY(x) (0x00000a80+((x)*8)) +#define NV40TCL_VTX_ATTR_3I_XY__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_3I_XY_X_SHIFT 0 +#define NV40TCL_VTX_ATTR_3I_XY_X_MASK 0x0000ffff +#define NV40TCL_VTX_ATTR_3I_XY_Y_SHIFT 16 +#define NV40TCL_VTX_ATTR_3I_XY_Y_MASK 0xffff0000 +#define NV40TCL_VTX_ATTR_3I_Z(x) (0x00000a84+((x)*8)) +#define NV40TCL_VTX_ATTR_3I_Z__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_3I_Z_Z_SHIFT 0 +#define NV40TCL_VTX_ATTR_3I_Z_Z_MASK 0x0000ffff +#define NV40TCL_TEX_FILTER_OPTIMIZATION 0x00000b00 +#define NV40TCL_TEX_FILTER_OPTIMIZATION_TRILINEAR_SHIFT 0 +#define NV40TCL_TEX_FILTER_OPTIMIZATION_TRILINEAR_MASK 0x0000001f +#define NV40TCL_TEX_FILTER_OPTIMIZATION_TRILINEAR_OFF 0x00000000 +#define NV40TCL_TEX_FILTER_OPTIMIZATION_TRILINEAR_HIGH_QUALITY 0x00000004 +#define NV40TCL_TEX_FILTER_OPTIMIZATION_TRILINEAR_QUALITY 0x00000006 +#define NV40TCL_TEX_FILTER_OPTIMIZATION_TRILINEAR_PERFORMANCE 0x00000008 +#define NV40TCL_TEX_FILTER_OPTIMIZATION_TRILINEAR_HIGH_PERFORMANCE 0x00000018 +#define NV40TCL_TEX_FILTER_OPTIMIZATION_ANISO_SAMPLE_SHIFT 6 +#define NV40TCL_TEX_FILTER_OPTIMIZATION_ANISO_SAMPLE_MASK 0x000001c0 +#define NV40TCL_TEX_FILTER_OPTIMIZATION_ANISO_SAMPLE_OFF 0x00000000 +#define NV40TCL_TEX_FILTER_OPTIMIZATION_ANISO_SAMPLE_HIGH_QUALITY 0x000000c0 +#define NV40TCL_TEX_FILTER_OPTIMIZATION_ANISO_SAMPLE_QUALITY 0x000001c0 +#define NV40TCL_TEX_FILTER_OPTIMIZATION_ANISO_SAMPLE_PERFORMANCE 0x00000140 +#define NV40TCL_TEX_FILTER_OPTIMIZATION_UNKNOWN_SHIFT 10 +#define NV40TCL_TEX_FILTER_OPTIMIZATION_UNKNOWN_MASK 0x00007c00 +#define NV40TCL_TEX_FILTER_OPTIMIZATION_UNKNOWN_OFF 0x00000000 +#define NV40TCL_TEX_FILTER_OPTIMIZATION_UNKNOWN_PARTIAL 0x00002c00 +#define NV40TCL_TEX_FILTER_OPTIMIZATION_UNKNOWN_FULL 0x00007c00 +#define NV40TCL_UNK0B40(x) (0x00000b40+((x)*4)) +#define NV40TCL_UNK0B40__SIZE 0x00000008 +#define NV40TCL_VP_UPLOAD_INST(x) (0x00000b80+((x)*4)) +#define NV40TCL_VP_UPLOAD_INST__SIZE 0x00000004 +#define NV40TCL_VERTEX_TWO_SIDE_ENABLE 0x0000142c +#define NV40TCL_CLIP_PLANE_ENABLE 0x00001478 +#define NV40TCL_CLIP_PLANE_ENABLE_PLANE0 (1 << 1) +#define NV40TCL_CLIP_PLANE_ENABLE_PLANE1 (1 << 5) +#define NV40TCL_CLIP_PLANE_ENABLE_PLANE2 (1 << 9) +#define NV40TCL_CLIP_PLANE_ENABLE_PLANE3 (1 << 13) +#define NV40TCL_CLIP_PLANE_ENABLE_PLANE4 (1 << 17) +#define NV40TCL_CLIP_PLANE_ENABLE_PLANE5 (1 << 21) +#define NV40TCL_POLYGON_STIPPLE_ENABLE 0x0000147c +#define NV40TCL_POLYGON_STIPPLE_PATTERN(x) (0x00001480+((x)*4)) +#define NV40TCL_POLYGON_STIPPLE_PATTERN__SIZE 0x00000020 +#define NV40TCL_VTX_ATTR_3F_X(x) (0x00001500+((x)*16)) +#define NV40TCL_VTX_ATTR_3F_X__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_3F_Y(x) (0x00001504+((x)*16)) +#define NV40TCL_VTX_ATTR_3F_Y__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_3F_Z(x) (0x00001508+((x)*16)) +#define NV40TCL_VTX_ATTR_3F_Z__SIZE 0x00000010 +#define NV40TCL_VTXBUF_ADDRESS(x) (0x00001680+((x)*4)) +#define NV40TCL_VTXBUF_ADDRESS__SIZE 0x00000010 +#define NV40TCL_VTXBUF_ADDRESS_DMA1 (1 << 31) +#define NV40TCL_VTXBUF_ADDRESS_OFFSET_SHIFT 0 +#define NV40TCL_VTXBUF_ADDRESS_OFFSET_MASK 0x0fffffff +#define NV40TCL_VTX_CACHE_INVALIDATE 0x00001714 +#define NV40TCL_VTXFMT(x) (0x00001740+((x)*4)) +#define NV40TCL_VTXFMT__SIZE 0x00000010 +#define NV40TCL_VTXFMT_TYPE_SHIFT 0 +#define NV40TCL_VTXFMT_TYPE_MASK 0x0000000f +#define NV40TCL_VTXFMT_TYPE_FLOAT 0x00000002 +#define NV40TCL_VTXFMT_TYPE_UBYTE 0x00000004 +#define NV40TCL_VTXFMT_TYPE_USHORT 0x00000005 +#define NV40TCL_VTXFMT_SIZE_SHIFT 4 +#define NV40TCL_VTXFMT_SIZE_MASK 0x000000f0 +#define NV40TCL_VTXFMT_STRIDE_SHIFT 8 +#define NV40TCL_VTXFMT_STRIDE_MASK 0x0000ff00 +#define NV40TCL_QUERY_RESET 0x000017c8 +#define NV40TCL_QUERY_UNK17CC 0x000017cc +#define NV40TCL_QUERY_GET 0x00001800 +#define NV40TCL_QUERY_GET_UNK24_SHIFT 24 +#define NV40TCL_QUERY_GET_UNK24_MASK 0xff000000 +#define NV40TCL_QUERY_GET_OFFSET_SHIFT 0 +#define NV40TCL_QUERY_GET_OFFSET_MASK 0x00ffffff +#define NV40TCL_BEGIN_END 0x00001808 +#define NV40TCL_BEGIN_END_STOP 0x00000000 +#define NV40TCL_BEGIN_END_POINTS 0x00000001 +#define NV40TCL_BEGIN_END_LINES 0x00000002 +#define NV40TCL_BEGIN_END_LINE_LOOP 0x00000003 +#define NV40TCL_BEGIN_END_LINE_STRIP 0x00000004 +#define NV40TCL_BEGIN_END_TRIANGLES 0x00000005 +#define NV40TCL_BEGIN_END_TRIANGLE_STRIP 0x00000006 +#define NV40TCL_BEGIN_END_TRIANGLE_FAN 0x00000007 +#define NV40TCL_BEGIN_END_QUADS 0x00000008 +#define NV40TCL_BEGIN_END_QUAD_STRIP 0x00000009 +#define NV40TCL_BEGIN_END_POLYGON 0x0000000a +#define NV40TCL_VB_ELEMENT_U16 0x0000180c +#define NV40TCL_VB_ELEMENT_U16_1_SHIFT 16 +#define NV40TCL_VB_ELEMENT_U16_1_MASK 0xffff0000 +#define NV40TCL_VB_ELEMENT_U16_0_SHIFT 0 +#define NV40TCL_VB_ELEMENT_U16_0_MASK 0x0000ffff +#define NV40TCL_VB_ELEMENT_U32 0x00001810 +#define NV40TCL_VB_VERTEX_BATCH 0x00001814 +#define NV40TCL_VB_VERTEX_BATCH_COUNT_SHIFT 24 +#define NV40TCL_VB_VERTEX_BATCH_COUNT_MASK 0xff000000 +#define NV40TCL_VB_VERTEX_BATCH_START_SHIFT 0 +#define NV40TCL_VB_VERTEX_BATCH_START_MASK 0x00ffffff +#define NV40TCL_VERTEX_DATA 0x00001818 +#define NV40TCL_IDXBUF_ADDRESS 0x0000181c +#define NV40TCL_IDXBUF_FORMAT 0x00001820 +#define NV40TCL_IDXBUF_FORMAT_TYPE_SHIFT 4 +#define NV40TCL_IDXBUF_FORMAT_TYPE_MASK 0x000000f0 +#define NV40TCL_IDXBUF_FORMAT_TYPE_U32 0x00000000 +#define NV40TCL_IDXBUF_FORMAT_TYPE_U16 0x00000010 +#define NV40TCL_IDXBUF_FORMAT_DMA1 (1 << 0) +#define NV40TCL_VB_INDEX_BATCH 0x00001824 +#define NV40TCL_VB_INDEX_BATCH_COUNT_SHIFT 24 +#define NV40TCL_VB_INDEX_BATCH_COUNT_MASK 0xff000000 +#define NV40TCL_VB_INDEX_BATCH_START_SHIFT 0 +#define NV40TCL_VB_INDEX_BATCH_START_MASK 0x00ffffff +#define NV40TCL_POLYGON_MODE_FRONT 0x00001828 +#define NV40TCL_POLYGON_MODE_FRONT_POINT 0x00001b00 +#define NV40TCL_POLYGON_MODE_FRONT_LINE 0x00001b01 +#define NV40TCL_POLYGON_MODE_FRONT_FILL 0x00001b02 +#define NV40TCL_POLYGON_MODE_BACK 0x0000182c +#define NV40TCL_POLYGON_MODE_BACK_POINT 0x00001b00 +#define NV40TCL_POLYGON_MODE_BACK_LINE 0x00001b01 +#define NV40TCL_POLYGON_MODE_BACK_FILL 0x00001b02 +#define NV40TCL_CULL_FACE 0x00001830 +#define NV40TCL_CULL_FACE_FRONT 0x00000404 +#define NV40TCL_CULL_FACE_BACK 0x00000405 +#define NV40TCL_CULL_FACE_FRONT_AND_BACK 0x00000408 +#define NV40TCL_FRONT_FACE 0x00001834 +#define NV40TCL_FRONT_FACE_CW 0x00000900 +#define NV40TCL_FRONT_FACE_CCW 0x00000901 +#define NV40TCL_POLYGON_SMOOTH_ENABLE 0x00001838 +#define NV40TCL_CULL_FACE_ENABLE 0x0000183c +#define NV40TCL_TEX_SIZE1(x) (0x00001840+((x)*4)) +#define NV40TCL_TEX_SIZE1__SIZE 0x00000008 +#define NV40TCL_TEX_SIZE1_DEPTH_SHIFT 20 +#define NV40TCL_TEX_SIZE1_DEPTH_MASK 0xfff00000 +#define NV40TCL_TEX_SIZE1_PITCH_SHIFT 0 +#define NV40TCL_TEX_SIZE1_PITCH_MASK 0x0000ffff +#define NV40TCL_VTX_ATTR_2F_X(x) (0x00001880+((x)*8)) +#define NV40TCL_VTX_ATTR_2F_X__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_2F_Y(x) (0x00001884+((x)*8)) +#define NV40TCL_VTX_ATTR_2F_Y__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_2I(x) (0x00001900+((x)*4)) +#define NV40TCL_VTX_ATTR_2I__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_2I_X_SHIFT 0 +#define NV40TCL_VTX_ATTR_2I_X_MASK 0x0000ffff +#define NV40TCL_VTX_ATTR_2I_Y_SHIFT 16 +#define NV40TCL_VTX_ATTR_2I_Y_MASK 0xffff0000 +#define NV40TCL_VTX_ATTR_4UB(x) (0x00001940+((x)*4)) +#define NV40TCL_VTX_ATTR_4UB__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_4UB_X_SHIFT 0 +#define NV40TCL_VTX_ATTR_4UB_X_MASK 0x000000ff +#define NV40TCL_VTX_ATTR_4UB_Y_SHIFT 8 +#define NV40TCL_VTX_ATTR_4UB_Y_MASK 0x0000ff00 +#define NV40TCL_VTX_ATTR_4UB_Z_SHIFT 16 +#define NV40TCL_VTX_ATTR_4UB_Z_MASK 0x00ff0000 +#define NV40TCL_VTX_ATTR_4UB_W_SHIFT 24 +#define NV40TCL_VTX_ATTR_4UB_W_MASK 0xff000000 +#define NV40TCL_VTX_ATTR_4I_XY(x) (0x00001980+((x)*8)) +#define NV40TCL_VTX_ATTR_4I_XY__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_4I_XY_X_SHIFT 0 +#define NV40TCL_VTX_ATTR_4I_XY_X_MASK 0x0000ffff +#define NV40TCL_VTX_ATTR_4I_XY_Y_SHIFT 16 +#define NV40TCL_VTX_ATTR_4I_XY_Y_MASK 0xffff0000 +#define NV40TCL_VTX_ATTR_4I_ZW(x) (0x00001984+((x)*8)) +#define NV40TCL_VTX_ATTR_4I_ZW__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_4I_ZW_Z_SHIFT 0 +#define NV40TCL_VTX_ATTR_4I_ZW_Z_MASK 0x0000ffff +#define NV40TCL_VTX_ATTR_4I_ZW_W_SHIFT 16 +#define NV40TCL_VTX_ATTR_4I_ZW_W_MASK 0xffff0000 +#define NV40TCL_TEX_OFFSET(x) (0x00001a00+((x)*32)) +#define NV40TCL_TEX_OFFSET__SIZE 0x00000010 +#define NV40TCL_TEX_FORMAT(x) (0x00001a04+((x)*32)) +#define NV40TCL_TEX_FORMAT__SIZE 0x00000010 +#define NV40TCL_TEX_FORMAT_MIPMAP_COUNT_SHIFT 16 +#define NV40TCL_TEX_FORMAT_MIPMAP_COUNT_MASK 0x000f0000 +#define NV40TCL_TEX_FORMAT_RECT (1 << 14) +#define NV40TCL_TEX_FORMAT_LINEAR (1 << 13) +#define NV40TCL_TEX_FORMAT_FORMAT_SHIFT 8 +#define NV40TCL_TEX_FORMAT_FORMAT_MASK 0x00001f00 +#define NV40TCL_TEX_FORMAT_FORMAT_L8 0x00000100 +#define NV40TCL_TEX_FORMAT_FORMAT_A1R5G5B5 0x00000200 +#define NV40TCL_TEX_FORMAT_FORMAT_A4R4G4B4 0x00000300 +#define NV40TCL_TEX_FORMAT_FORMAT_R5G6B5 0x00000400 +#define NV40TCL_TEX_FORMAT_FORMAT_A8R8G8B8 0x00000500 +#define NV40TCL_TEX_FORMAT_FORMAT_DXT1 0x00000600 +#define NV40TCL_TEX_FORMAT_FORMAT_DXT3 0x00000700 +#define NV40TCL_TEX_FORMAT_FORMAT_DXT5 0x00000800 +#define NV40TCL_TEX_FORMAT_FORMAT_A8L8 0x00000b00 +#define NV40TCL_TEX_FORMAT_FORMAT_Z24 0x00001000 +#define NV40TCL_TEX_FORMAT_FORMAT_Z16 0x00001200 +#define NV40TCL_TEX_FORMAT_FORMAT_A16 0x00001400 +#define NV40TCL_TEX_FORMAT_FORMAT_A16L16 0x00001500 +#define NV40TCL_TEX_FORMAT_FORMAT_HILO8 0x00001800 +#define NV40TCL_TEX_FORMAT_FORMAT_RGBA16F 0x00001a00 +#define NV40TCL_TEX_FORMAT_FORMAT_RGBA32F 0x00001b00 +#define NV40TCL_TEX_FORMAT_DIMS_SHIFT 4 +#define NV40TCL_TEX_FORMAT_DIMS_MASK 0x000000f0 +#define NV40TCL_TEX_FORMAT_DIMS_1D 0x00000010 +#define NV40TCL_TEX_FORMAT_DIMS_2D 0x00000020 +#define NV40TCL_TEX_FORMAT_DIMS_3D 0x00000030 +#define NV40TCL_TEX_FORMAT_NO_BORDER (1 << 3) +#define NV40TCL_TEX_FORMAT_CUBIC (1 << 2) +#define NV40TCL_TEX_FORMAT_DMA1 (1 << 1) +#define NV40TCL_TEX_FORMAT_DMA0 (1 << 0) +#define NV40TCL_TEX_WRAP(x) (0x00001a08+((x)*32)) +#define NV40TCL_TEX_WRAP__SIZE 0x00000010 +#define NV40TCL_TEX_WRAP_S_SHIFT 0 +#define NV40TCL_TEX_WRAP_S_MASK 0x0000000f +#define NV40TCL_TEX_WRAP_S_REPEAT 0x00000001 +#define NV40TCL_TEX_WRAP_S_MIRRORED_REPEAT 0x00000002 +#define NV40TCL_TEX_WRAP_S_CLAMP_TO_EDGE 0x00000003 +#define NV40TCL_TEX_WRAP_S_CLAMP_TO_BORDER 0x00000004 +#define NV40TCL_TEX_WRAP_S_CLAMP 0x00000005 +#define NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_EDGE 0x00000006 +#define NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_BORDER 0x00000007 +#define NV40TCL_TEX_WRAP_S_MIRROR_CLAMP 0x00000008 +#define NV40TCL_TEX_WRAP_ANISO_MIP_FILTER_OPTIMIZATION_SHIFT 4 +#define NV40TCL_TEX_WRAP_ANISO_MIP_FILTER_OPTIMIZATION_MASK 0x00000070 +#define NV40TCL_TEX_WRAP_ANISO_MIP_FILTER_OPTIMIZATION_OFF 0x00000000 +#define NV40TCL_TEX_WRAP_ANISO_MIP_FILTER_OPTIMIZATION_QUALITY 0x00000020 +#define NV40TCL_TEX_WRAP_ANISO_MIP_FILTER_OPTIMIZATION_PERFORMANCE 0x00000030 +#define NV40TCL_TEX_WRAP_ANISO_MIP_FILTER_OPTIMIZATION_HIGH_PERFORMANCE 0x00000070 +#define NV40TCL_TEX_WRAP_T_SHIFT 8 +#define NV40TCL_TEX_WRAP_T_MASK 0x00000f00 +#define NV40TCL_TEX_WRAP_T_REPEAT 0x00000100 +#define NV40TCL_TEX_WRAP_T_MIRRORED_REPEAT 0x00000200 +#define NV40TCL_TEX_WRAP_T_CLAMP_TO_EDGE 0x00000300 +#define NV40TCL_TEX_WRAP_T_CLAMP_TO_BORDER 0x00000400 +#define NV40TCL_TEX_WRAP_T_CLAMP 0x00000500 +#define NV40TCL_TEX_WRAP_T_MIRROR_CLAMP_TO_EDGE 0x00000600 +#define NV40TCL_TEX_WRAP_T_MIRROR_CLAMP_TO_BORDER 0x00000700 +#define NV40TCL_TEX_WRAP_T_MIRROR_CLAMP 0x00000800 +#define NV40TCL_TEX_WRAP_EXPAND_NORMAL_SHIFT 12 +#define NV40TCL_TEX_WRAP_EXPAND_NORMAL_MASK 0x0000f000 +#define NV40TCL_TEX_WRAP_R_SHIFT 16 +#define NV40TCL_TEX_WRAP_R_MASK 0x000f0000 +#define NV40TCL_TEX_WRAP_R_REPEAT 0x00010000 +#define NV40TCL_TEX_WRAP_R_MIRRORED_REPEAT 0x00020000 +#define NV40TCL_TEX_WRAP_R_CLAMP_TO_EDGE 0x00030000 +#define NV40TCL_TEX_WRAP_R_CLAMP_TO_BORDER 0x00040000 +#define NV40TCL_TEX_WRAP_R_CLAMP 0x00050000 +#define NV40TCL_TEX_WRAP_R_MIRROR_CLAMP_TO_EDGE 0x00060000 +#define NV40TCL_TEX_WRAP_R_MIRROR_CLAMP_TO_BORDER 0x00070000 +#define NV40TCL_TEX_WRAP_R_MIRROR_CLAMP 0x00080000 +#define NV40TCL_TEX_WRAP_GAMMA_DECREASE_FILTER_SHIFT 20 +#define NV40TCL_TEX_WRAP_GAMMA_DECREASE_FILTER_MASK 0x00f00000 +#define NV40TCL_TEX_WRAP_GAMMA_DECREASE_FILTER_NONE 0x00000000 +#define NV40TCL_TEX_WRAP_GAMMA_DECREASE_FILTER_RED 0x00100000 +#define NV40TCL_TEX_WRAP_GAMMA_DECREASE_FILTER_GREEN 0x00200000 +#define NV40TCL_TEX_WRAP_GAMMA_DECREASE_FILTER_BLUE 0x00400000 +#define NV40TCL_TEX_WRAP_GAMMA_DECREASE_FILTER_ALL 0x00f00000 +#define NV40TCL_TEX_WRAP_RCOMP_SHIFT 28 +#define NV40TCL_TEX_WRAP_RCOMP_MASK 0xf0000000 +#define NV40TCL_TEX_WRAP_RCOMP_NEVER 0x00000000 +#define NV40TCL_TEX_WRAP_RCOMP_GREATER 0x10000000 +#define NV40TCL_TEX_WRAP_RCOMP_EQUAL 0x20000000 +#define NV40TCL_TEX_WRAP_RCOMP_GEQUAL 0x30000000 +#define NV40TCL_TEX_WRAP_RCOMP_LESS 0x40000000 +#define NV40TCL_TEX_WRAP_RCOMP_NOTEQUAL 0x50000000 +#define NV40TCL_TEX_WRAP_RCOMP_LEQUAL 0x60000000 +#define NV40TCL_TEX_WRAP_RCOMP_ALWAYS 0x70000000 +#define NV40TCL_TEX_ENABLE(x) (0x00001a0c+((x)*32)) +#define NV40TCL_TEX_ENABLE__SIZE 0x00000010 +#define NV40TCL_TEX_ENABLE_ENABLE (1 << 31) +#define NV40TCL_TEX_ENABLE_MIPMAP_MIN_LOD_SHIFT 27 +#define NV40TCL_TEX_ENABLE_MIPMAP_MIN_LOD_MASK 0x38000000 +#define NV40TCL_TEX_ENABLE_MIPMAP_MAX_LOD_SHIFT 15 +#define NV40TCL_TEX_ENABLE_MIPMAP_MAX_LOD_MASK 0x00038000 +#define NV40TCL_TEX_ENABLE_ANISO_SHIFT 4 +#define NV40TCL_TEX_ENABLE_ANISO_MASK 0x000000f0 +#define NV40TCL_TEX_ENABLE_ANISO_NONE 0x00000000 +#define NV40TCL_TEX_ENABLE_ANISO_2X 0x00000010 +#define NV40TCL_TEX_ENABLE_ANISO_4X 0x00000020 +#define NV40TCL_TEX_ENABLE_ANISO_6X 0x00000030 +#define NV40TCL_TEX_ENABLE_ANISO_8X 0x00000040 +#define NV40TCL_TEX_ENABLE_ANISO_10X 0x00000050 +#define NV40TCL_TEX_ENABLE_ANISO_12X 0x00000060 +#define NV40TCL_TEX_ENABLE_ANISO_16X 0x00000070 +#define NV40TCL_TEX_SWIZZLE(x) (0x00001a10+((x)*32)) +#define NV40TCL_TEX_SWIZZLE__SIZE 0x00000010 +#define NV40TCL_TEX_SWIZZLE_S0_X_SHIFT 14 +#define NV40TCL_TEX_SWIZZLE_S0_X_MASK 0x0000c000 +#define NV40TCL_TEX_SWIZZLE_S0_X_ZERO 0x00000000 +#define NV40TCL_TEX_SWIZZLE_S0_X_ONE 0x00004000 +#define NV40TCL_TEX_SWIZZLE_S0_X_S1 0x00008000 +#define NV40TCL_TEX_SWIZZLE_S0_Y_SHIFT 12 +#define NV40TCL_TEX_SWIZZLE_S0_Y_MASK 0x00003000 +#define NV40TCL_TEX_SWIZZLE_S0_Y_ZERO 0x00000000 +#define NV40TCL_TEX_SWIZZLE_S0_Y_ONE 0x00001000 +#define NV40TCL_TEX_SWIZZLE_S0_Y_S1 0x00002000 +#define NV40TCL_TEX_SWIZZLE_S0_Z_SHIFT 10 +#define NV40TCL_TEX_SWIZZLE_S0_Z_MASK 0x00000c00 +#define NV40TCL_TEX_SWIZZLE_S0_Z_ZERO 0x00000000 +#define NV40TCL_TEX_SWIZZLE_S0_Z_ONE 0x00000400 +#define NV40TCL_TEX_SWIZZLE_S0_Z_S1 0x00000800 +#define NV40TCL_TEX_SWIZZLE_S0_W_SHIFT 8 +#define NV40TCL_TEX_SWIZZLE_S0_W_MASK 0x00000300 +#define NV40TCL_TEX_SWIZZLE_S0_W_ZERO 0x00000000 +#define NV40TCL_TEX_SWIZZLE_S0_W_ONE 0x00000100 +#define NV40TCL_TEX_SWIZZLE_S0_W_S1 0x00000200 +#define NV40TCL_TEX_SWIZZLE_S1_X_SHIFT 6 +#define NV40TCL_TEX_SWIZZLE_S1_X_MASK 0x000000c0 +#define NV40TCL_TEX_SWIZZLE_S1_X_W 0x00000000 +#define NV40TCL_TEX_SWIZZLE_S1_X_Z 0x00000040 +#define NV40TCL_TEX_SWIZZLE_S1_X_Y 0x00000080 +#define NV40TCL_TEX_SWIZZLE_S1_X_X 0x000000c0 +#define NV40TCL_TEX_SWIZZLE_S1_Y_SHIFT 4 +#define NV40TCL_TEX_SWIZZLE_S1_Y_MASK 0x00000030 +#define NV40TCL_TEX_SWIZZLE_S1_Y_W 0x00000000 +#define NV40TCL_TEX_SWIZZLE_S1_Y_Z 0x00000010 +#define NV40TCL_TEX_SWIZZLE_S1_Y_Y 0x00000020 +#define NV40TCL_TEX_SWIZZLE_S1_Y_X 0x00000030 +#define NV40TCL_TEX_SWIZZLE_S1_Z_SHIFT 2 +#define NV40TCL_TEX_SWIZZLE_S1_Z_MASK 0x0000000c +#define NV40TCL_TEX_SWIZZLE_S1_Z_W 0x00000000 +#define NV40TCL_TEX_SWIZZLE_S1_Z_Z 0x00000004 +#define NV40TCL_TEX_SWIZZLE_S1_Z_Y 0x00000008 +#define NV40TCL_TEX_SWIZZLE_S1_Z_X 0x0000000c +#define NV40TCL_TEX_SWIZZLE_S1_W_SHIFT 0 +#define NV40TCL_TEX_SWIZZLE_S1_W_MASK 0x00000003 +#define NV40TCL_TEX_SWIZZLE_S1_W_W 0x00000000 +#define NV40TCL_TEX_SWIZZLE_S1_W_Z 0x00000001 +#define NV40TCL_TEX_SWIZZLE_S1_W_Y 0x00000002 +#define NV40TCL_TEX_SWIZZLE_S1_W_X 0x00000003 +#define NV40TCL_TEX_FILTER(x) (0x00001a14+((x)*32)) +#define NV40TCL_TEX_FILTER__SIZE 0x00000010 +#define NV40TCL_TEX_FILTER_SIGNED_ALPHA (1 << 31) +#define NV40TCL_TEX_FILTER_SIGNED_RED (1 << 30) +#define NV40TCL_TEX_FILTER_SIGNED_GREEN (1 << 29) +#define NV40TCL_TEX_FILTER_SIGNED_BLUE (1 << 28) +#define NV40TCL_TEX_FILTER_MIN_SHIFT 16 +#define NV40TCL_TEX_FILTER_MIN_MASK 0x000f0000 +#define NV40TCL_TEX_FILTER_MIN_NEAREST 0x00010000 +#define NV40TCL_TEX_FILTER_MIN_LINEAR 0x00020000 +#define NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_NEAREST 0x00030000 +#define NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_NEAREST 0x00040000 +#define NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_LINEAR 0x00050000 +#define NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_LINEAR 0x00060000 +#define NV40TCL_TEX_FILTER_MAG_SHIFT 24 +#define NV40TCL_TEX_FILTER_MAG_MASK 0x0f000000 +#define NV40TCL_TEX_FILTER_MAG_NEAREST 0x01000000 +#define NV40TCL_TEX_FILTER_MAG_LINEAR 0x02000000 +#define NV40TCL_TEX_SIZE0(x) (0x00001a18+((x)*32)) +#define NV40TCL_TEX_SIZE0__SIZE 0x00000010 +#define NV40TCL_TEX_SIZE0_H_SHIFT 0 +#define NV40TCL_TEX_SIZE0_H_MASK 0x0000ffff +#define NV40TCL_TEX_SIZE0_W_SHIFT 16 +#define NV40TCL_TEX_SIZE0_W_MASK 0xffff0000 +#define NV40TCL_TEX_BORDER_COLOR(x) (0x00001a1c+((x)*32)) +#define NV40TCL_TEX_BORDER_COLOR__SIZE 0x00000010 +#define NV40TCL_TEX_BORDER_COLOR_B_SHIFT 0 +#define NV40TCL_TEX_BORDER_COLOR_B_MASK 0x000000ff +#define NV40TCL_TEX_BORDER_COLOR_G_SHIFT 8 +#define NV40TCL_TEX_BORDER_COLOR_G_MASK 0x0000ff00 +#define NV40TCL_TEX_BORDER_COLOR_R_SHIFT 16 +#define NV40TCL_TEX_BORDER_COLOR_R_MASK 0x00ff0000 +#define NV40TCL_TEX_BORDER_COLOR_A_SHIFT 24 +#define NV40TCL_TEX_BORDER_COLOR_A_MASK 0xff000000 +#define NV40TCL_VTX_ATTR_4F_X(x) (0x00001c00+((x)*16)) +#define NV40TCL_VTX_ATTR_4F_X__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_4F_Y(x) (0x00001c04+((x)*16)) +#define NV40TCL_VTX_ATTR_4F_Y__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_4F_Z(x) (0x00001c08+((x)*16)) +#define NV40TCL_VTX_ATTR_4F_Z__SIZE 0x00000010 +#define NV40TCL_VTX_ATTR_4F_W(x) (0x00001c0c+((x)*16)) +#define NV40TCL_VTX_ATTR_4F_W__SIZE 0x00000010 +#define NV40TCL_FP_CONTROL 0x00001d60 +#define NV40TCL_FP_CONTROL_TEMP_COUNT_SHIFT 24 +#define NV40TCL_FP_CONTROL_TEMP_COUNT_MASK 0xff000000 +#define NV40TCL_FP_CONTROL_KIL (1 << 7) +#define NV40TCL_MULTISAMPLE_CONTROL 0x00001d7c +#define NV40TCL_CLEAR_VALUE_DEPTH 0x00001d8c +#define NV40TCL_CLEAR_VALUE_COLOR 0x00001d90 +#define NV40TCL_CLEAR_VALUE_COLOR_B_SHIFT 0 +#define NV40TCL_CLEAR_VALUE_COLOR_B_MASK 0x000000ff +#define NV40TCL_CLEAR_VALUE_COLOR_G_SHIFT 8 +#define NV40TCL_CLEAR_VALUE_COLOR_G_MASK 0x0000ff00 +#define NV40TCL_CLEAR_VALUE_COLOR_R_SHIFT 16 +#define NV40TCL_CLEAR_VALUE_COLOR_R_MASK 0x00ff0000 +#define NV40TCL_CLEAR_VALUE_COLOR_A_SHIFT 24 +#define NV40TCL_CLEAR_VALUE_COLOR_A_MASK 0xff000000 +#define NV40TCL_CLEAR_BUFFERS 0x00001d94 +#define NV40TCL_CLEAR_BUFFERS_COLOR_A (1 << 7) +#define NV40TCL_CLEAR_BUFFERS_COLOR_B (1 << 6) +#define NV40TCL_CLEAR_BUFFERS_COLOR_G (1 << 5) +#define NV40TCL_CLEAR_BUFFERS_COLOR_R (1 << 4) +#define NV40TCL_CLEAR_BUFFERS_STENCIL (1 << 1) +#define NV40TCL_CLEAR_BUFFERS_DEPTH (1 << 0) +#define NV40TCL_LINE_STIPPLE_ENABLE 0x00001db4 +#define NV40TCL_LINE_STIPPLE_PATTERN 0x00001db8 +#define NV40TCL_LINE_STIPPLE_PATTERN_FACTOR_SHIFT 0 +#define NV40TCL_LINE_STIPPLE_PATTERN_FACTOR_MASK 0x0000ffff +#define NV40TCL_LINE_STIPPLE_PATTERN_PATTERN_SHIFT 16 +#define NV40TCL_LINE_STIPPLE_PATTERN_PATTERN_MASK 0xffff0000 +#define NV40TCL_VTX_ATTR_1F(x) (0x00001e40+((x)*4)) +#define NV40TCL_VTX_ATTR_1F__SIZE 0x00000010 +#define NV40TCL_VP_UPLOAD_FROM_ID 0x00001e9c +#define NV40TCL_VP_START_FROM_ID 0x00001ea0 +#define NV40TCL_POINT_SIZE 0x00001ee0 +#define NV40TCL_POINT_SPRITE 0x00001ee8 +#define NV40TCL_POINT_SPRITE_ENABLE (1 << 0) +#define NV40TCL_POINT_SPRITE_R_MODE_SHIFT 1 +#define NV40TCL_POINT_SPRITE_R_MODE_MASK 0x00000006 +#define NV40TCL_POINT_SPRITE_R_MODE_ZERO 0x00000000 +#define NV40TCL_POINT_SPRITE_R_MODE_R 0x00000002 +#define NV40TCL_POINT_SPRITE_R_MODE_S 0x00000004 +#define NV40TCL_POINT_SPRITE_COORD_REPLACE_0 (1 << 8) +#define NV40TCL_POINT_SPRITE_COORD_REPLACE_1 (1 << 9) +#define NV40TCL_POINT_SPRITE_COORD_REPLACE_2 (1 << 10) +#define NV40TCL_POINT_SPRITE_COORD_REPLACE_3 (1 << 11) +#define NV40TCL_POINT_SPRITE_COORD_REPLACE_4 (1 << 12) +#define NV40TCL_POINT_SPRITE_COORD_REPLACE_5 (1 << 13) +#define NV40TCL_POINT_SPRITE_COORD_REPLACE_6 (1 << 14) +#define NV40TCL_POINT_SPRITE_COORD_REPLACE_7 (1 << 15) +#define NV40TCL_VP_UPLOAD_CONST_ID 0x00001efc +#define NV40TCL_VP_UPLOAD_CONST_X(x) (0x00001f00+((x)*16)) +#define NV40TCL_VP_UPLOAD_CONST_X__SIZE 0x00000004 +#define NV40TCL_VP_UPLOAD_CONST_Y(x) (0x00001f04+((x)*16)) +#define NV40TCL_VP_UPLOAD_CONST_Y__SIZE 0x00000004 +#define NV40TCL_VP_UPLOAD_CONST_Z(x) (0x00001f08+((x)*16)) +#define NV40TCL_VP_UPLOAD_CONST_Z__SIZE 0x00000004 +#define NV40TCL_VP_UPLOAD_CONST_W(x) (0x00001f0c+((x)*16)) +#define NV40TCL_VP_UPLOAD_CONST_W__SIZE 0x00000004 +#define NV40TCL_TEX_CACHE_CTL 0x00001fd8 +#define NV40TCL_VP_ATTRIB_EN 0x00001ff0 +#define NV40TCL_VP_RESULT_EN 0x00001ff4 + + +#define NV44TCL 0x00004497 + + + +#define NV50_2D 0x0000502d + +#define NV50_2D_NOP 0x00000100 +#define NV50_2D_NOTIFY 0x00000104 +#define NV50_2D_SERIALIZE 0x00000110 +#define NV50_2D_DMA_NOTIFY 0x00000180 +#define NV50_2D_DMA_DST 0x00000184 +#define NV50_2D_DMA_SRC 0x00000188 +#define NV50_2D_DMA_COND 0x0000018c +#define NV50_2D_DST_FORMAT 0x00000200 +#define NV50_2D_DST_FORMAT_R32G32B32A32_FLOAT 0x000000c0 +#define NV50_2D_DST_FORMAT_R32G32B32A32_SINT 0x000000c1 +#define NV50_2D_DST_FORMAT_R32G32B32A32_UINT 0x000000c2 +#define NV50_2D_DST_FORMAT_R32G32B32X32_FLOAT 0x000000c3 +#define NV50_2D_DST_FORMAT_R16G16B16A16_UNORM 0x000000c6 +#define NV50_2D_DST_FORMAT_R16G16B16A16_SNORM 0x000000c7 +#define NV50_2D_DST_FORMAT_R16G16B16A16_SINT 0x000000c8 +#define NV50_2D_DST_FORMAT_R16G16B16A16_UINT 0x000000c9 +#define NV50_2D_DST_FORMAT_R16G16B16A16_FLOAT 0x000000ca +#define NV50_2D_DST_FORMAT_R32G32_FLOAT 0x000000cb +#define NV50_2D_DST_FORMAT_R32G32_SINT 0x000000cc +#define NV50_2D_DST_FORMAT_R32G32_UINT 0x000000cd +#define NV50_2D_DST_FORMAT_R16G16B16X16_FLOAT 0x000000ce +#define NV50_2D_DST_FORMAT_A8R8G8B8_UNORM 0x000000cf +#define NV50_2D_DST_FORMAT_A8R8G8B8_SRGB 0x000000d0 +#define NV50_2D_DST_FORMAT_A2B10G10R10_UNORM 0x000000d1 +#define NV50_2D_DST_FORMAT_A2B10G10R10_UINT 0x000000d2 +#define NV50_2D_DST_FORMAT_A8B8G8R8_UNORM 0x000000d5 +#define NV50_2D_DST_FORMAT_A8B8G8R8_SRGB 0x000000d6 +#define NV50_2D_DST_FORMAT_A8B8G8R8_SNORM 0x000000d7 +#define NV50_2D_DST_FORMAT_A8B8G8R8_SINT 0x000000d8 +#define NV50_2D_DST_FORMAT_A8B8G8R8_UINT 0x000000d9 +#define NV50_2D_DST_FORMAT_R16G16_UNORM 0x000000da +#define NV50_2D_DST_FORMAT_R16G16_SNORM 0x000000db +#define NV50_2D_DST_FORMAT_R16G16_SINT 0x000000dc +#define NV50_2D_DST_FORMAT_R16G16_UINT 0x000000dd +#define NV50_2D_DST_FORMAT_R16G16_FLOAT 0x000000de +#define NV50_2D_DST_FORMAT_A2R10G10B10_UNORM 0x000000df +#define NV50_2D_DST_FORMAT_B10G11R11_FLOAT 0x000000e0 +#define NV50_2D_DST_FORMAT_R32_FLOAT 0x000000e5 +#define NV50_2D_DST_FORMAT_X8R8G8B8_UNORM 0x000000e6 +#define NV50_2D_DST_FORMAT_X8R8G8B8_SRGB 0x000000e7 +#define NV50_2D_DST_FORMAT_R5G6B5_UNORM 0x000000e8 +#define NV50_2D_DST_FORMAT_A1R5G5B5_UNORM 0x000000e9 +#define NV50_2D_DST_FORMAT_R8G8_UNORM 0x000000ea +#define NV50_2D_DST_FORMAT_R8G8_SNORM 0x000000eb +#define NV50_2D_DST_FORMAT_R8G8_SINT 0x000000ec +#define NV50_2D_DST_FORMAT_R8G8_UINT 0x000000ed +#define NV50_2D_DST_FORMAT_R16_UNORM 0x000000ee +#define NV50_2D_DST_FORMAT_R16_SNORM 0x000000ef +#define NV50_2D_DST_FORMAT_R16_SINT 0x000000f0 +#define NV50_2D_DST_FORMAT_R16_UINT 0x000000f1 +#define NV50_2D_DST_FORMAT_R16_FLOAT 0x000000f2 +#define NV50_2D_DST_FORMAT_R8_UNORM 0x000000f3 +#define NV50_2D_DST_FORMAT_R8_SNORM 0x000000f4 +#define NV50_2D_DST_FORMAT_R8_SINT 0x000000f5 +#define NV50_2D_DST_FORMAT_R8_UINT 0x000000f6 +#define NV50_2D_DST_FORMAT_A8_UNORM 0x000000f7 +#define NV50_2D_DST_FORMAT_X1R5G5B5_UNORM 0x000000f8 +#define NV50_2D_DST_FORMAT_X8B8G8R8_UNORM 0x000000f9 +#define NV50_2D_DST_FORMAT_X8B8G8R8_SRGB 0x000000fa +#define NV50_2D_DST_LINEAR 0x00000204 +#define NV50_2D_DST_TILE_MODE 0x00000208 +#define NV50_2D_DST_DEPTH 0x0000020c +#define NV50_2D_DST_LAYER 0x00000210 +#define NV50_2D_DST_PITCH 0x00000214 +#define NV50_2D_DST_WIDTH 0x00000218 +#define NV50_2D_DST_HEIGHT 0x0000021c +#define NV50_2D_DST_ADDRESS_HIGH 0x00000220 +#define NV50_2D_DST_ADDRESS_LOW 0x00000224 +#define NV50_2D_SRC_FORMAT 0x00000230 +#define NV50_2D_SRC_FORMAT_R32G32B32A32_FLOAT 0x000000c0 +#define NV50_2D_SRC_FORMAT_R32G32B32A32_SINT 0x000000c1 +#define NV50_2D_SRC_FORMAT_R32G32B32A32_UINT 0x000000c2 +#define NV50_2D_SRC_FORMAT_R32G32B32X32_FLOAT 0x000000c3 +#define NV50_2D_SRC_FORMAT_R16G16B16A16_UNORM 0x000000c6 +#define NV50_2D_SRC_FORMAT_R16G16B16A16_SNORM 0x000000c7 +#define NV50_2D_SRC_FORMAT_R16G16B16A16_SINT 0x000000c8 +#define NV50_2D_SRC_FORMAT_R16G16B16A16_UINT 0x000000c9 +#define NV50_2D_SRC_FORMAT_R16G16B16A16_FLOAT 0x000000ca +#define NV50_2D_SRC_FORMAT_R32G32_FLOAT 0x000000cb +#define NV50_2D_SRC_FORMAT_R32G32_SINT 0x000000cc +#define NV50_2D_SRC_FORMAT_R32G32_UINT 0x000000cd +#define NV50_2D_SRC_FORMAT_R16G16B16X16_FLOAT 0x000000ce +#define NV50_2D_SRC_FORMAT_A8R8G8B8_UNORM 0x000000cf +#define NV50_2D_SRC_FORMAT_A8R8G8B8_SRGB 0x000000d0 +#define NV50_2D_SRC_FORMAT_A2B10G10R10_UNORM 0x000000d1 +#define NV50_2D_SRC_FORMAT_A2B10G10R10_UINT 0x000000d2 +#define NV50_2D_SRC_FORMAT_A8B8G8R8_UNORM 0x000000d5 +#define NV50_2D_SRC_FORMAT_A8B8G8R8_SRGB 0x000000d6 +#define NV50_2D_SRC_FORMAT_A8B8G8R8_SNORM 0x000000d7 +#define NV50_2D_SRC_FORMAT_A8B8G8R8_SINT 0x000000d8 +#define NV50_2D_SRC_FORMAT_A8B8G8R8_UINT 0x000000d9 +#define NV50_2D_SRC_FORMAT_R16G16_UNORM 0x000000da +#define NV50_2D_SRC_FORMAT_R16G16_SNORM 0x000000db +#define NV50_2D_SRC_FORMAT_R16G16_SINT 0x000000dc +#define NV50_2D_SRC_FORMAT_R16G16_UINT 0x000000dd +#define NV50_2D_SRC_FORMAT_R16G16_FLOAT 0x000000de +#define NV50_2D_SRC_FORMAT_A2R10G10B10_UNORM 0x000000df +#define NV50_2D_SRC_FORMAT_B10G11R11_FLOAT 0x000000e0 +#define NV50_2D_SRC_FORMAT_R32_FLOAT 0x000000e5 +#define NV50_2D_SRC_FORMAT_X8R8G8B8_UNORM 0x000000e6 +#define NV50_2D_SRC_FORMAT_X8R8G8B8_SRGB 0x000000e7 +#define NV50_2D_SRC_FORMAT_R5G6B5_UNORM 0x000000e8 +#define NV50_2D_SRC_FORMAT_A1R5G5B5_UNORM 0x000000e9 +#define NV50_2D_SRC_FORMAT_R8G8_UNORM 0x000000ea +#define NV50_2D_SRC_FORMAT_R8G8_SNORM 0x000000eb +#define NV50_2D_SRC_FORMAT_R8G8_SINT 0x000000ec +#define NV50_2D_SRC_FORMAT_R8G8_UINT 0x000000ed +#define NV50_2D_SRC_FORMAT_R16_UNORM 0x000000ee +#define NV50_2D_SRC_FORMAT_R16_SNORM 0x000000ef +#define NV50_2D_SRC_FORMAT_R16_SINT 0x000000f0 +#define NV50_2D_SRC_FORMAT_R16_UINT 0x000000f1 +#define NV50_2D_SRC_FORMAT_R16_FLOAT 0x000000f2 +#define NV50_2D_SRC_FORMAT_R8_UNORM 0x000000f3 +#define NV50_2D_SRC_FORMAT_R8_SNORM 0x000000f4 +#define NV50_2D_SRC_FORMAT_R8_SINT 0x000000f5 +#define NV50_2D_SRC_FORMAT_R8_UINT 0x000000f6 +#define NV50_2D_SRC_FORMAT_A8_UNORM 0x000000f7 +#define NV50_2D_SRC_FORMAT_X1R5G5B5_UNORM 0x000000f8 +#define NV50_2D_SRC_FORMAT_X8B8G8R8_UNORM 0x000000f9 +#define NV50_2D_SRC_FORMAT_X8B8G8R8_SRGB 0x000000fa +#define NV50_2D_SRC_LINEAR 0x00000234 +#define NV50_2D_SRC_TILE_MODE 0x00000238 +#define NV50_2D_SRC_DEPTH 0x0000023c +#define NV50_2D_SRC_LAYER 0x00000240 +#define NV50_2D_SRC_PITCH 0x00000244 +#define NV50_2D_SRC_WIDTH 0x00000248 +#define NV50_2D_SRC_HEIGHT 0x0000024c +#define NV50_2D_SRC_ADDRESS_HIGH 0x00000250 +#define NV50_2D_SRC_ADDRESS_LOW 0x00000254 +#define NV50_2D_COND_ADDRESS_HIGH 0x00000264 +#define NV50_2D_COND_ADDRESS_LOW 0x00000268 +#define NV50_2D_COND_MODE 0x0000026c +#define NV50_2D_COND_MODE_NEVER 0x00000000 +#define NV50_2D_COND_MODE_ALWAYS 0x00000001 +#define NV50_2D_COND_MODE_RES 0x00000002 +#define NV50_2D_COND_MODE_NOT_RES_AND_NOT_ID 0x00000003 +#define NV50_2D_COND_MODE_RES_OR_ID 0x00000004 +#define NV50_2D_CLIP_X 0x00000280 +#define NV50_2D_CLIP_Y 0x00000284 +#define NV50_2D_CLIP_W 0x00000288 +#define NV50_2D_CLIP_H 0x0000028c +#define NV50_2D_CLIP_ENABLE 0x00000290 +#define NV50_2D_COLOR_KEY_FORMAT 0x00000294 +#define NV50_2D_COLOR_KEY_FORMAT_16BPP 0x00000000 +#define NV50_2D_COLOR_KEY_FORMAT_15BPP 0x00000001 +#define NV50_2D_COLOR_KEY_FORMAT_24BPP 0x00000002 +#define NV50_2D_COLOR_KEY_FORMAT_30BPP 0x00000003 +#define NV50_2D_COLOR_KEY_FORMAT_8BPP 0x00000004 +#define NV50_2D_COLOR_KEY_FORMAT_16BPP2 0x00000005 +#define NV50_2D_COLOR_KEY_FORMAT_32BPP 0x00000006 +#define NV50_2D_COLOR_KEY 0x00000298 +#define NV50_2D_COLOR_KEY_ENABLE 0x0000029c +#define NV50_2D_ROP 0x000002a0 +#define NV50_2D_OPERATION 0x000002ac +#define NV50_2D_OPERATION_SRCCOPY_AND 0x00000000 +#define NV50_2D_OPERATION_ROP_AND 0x00000001 +#define NV50_2D_OPERATION_BLEND_AND 0x00000002 +#define NV50_2D_OPERATION_SRCCOPY 0x00000003 +#define NV50_2D_OPERATION_SRCCOPY_PREMULT 0x00000004 +#define NV50_2D_OPERATION_BLEND_PREMULT 0x00000005 +#define NV50_2D_PATTERN_FORMAT 0x000002e8 +#define NV50_2D_PATTERN_FORMAT_16BPP 0x00000000 +#define NV50_2D_PATTERN_FORMAT_15BPP 0x00000001 +#define NV50_2D_PATTERN_FORMAT_32BPP 0x00000002 +#define NV50_2D_PATTERN_FORMAT_8BPP 0x00000003 +#define NV50_2D_PATTERN_COLOR(x) (0x000002f0+((x)*4)) +#define NV50_2D_PATTERN_COLOR__SIZE 0x00000002 +#define NV50_2D_PATTERN_BITMAP(x) (0x000002f8+((x)*4)) +#define NV50_2D_PATTERN_BITMAP__SIZE 0x00000002 +#define NV50_2D_DRAW_SHAPE 0x00000580 +#define NV50_2D_DRAW_SHAPE_POINTS 0x00000000 +#define NV50_2D_DRAW_SHAPE_LINES 0x00000001 +#define NV50_2D_DRAW_SHAPE_LINE_STRIP 0x00000002 +#define NV50_2D_DRAW_SHAPE_TRIANGLES 0x00000003 +#define NV50_2D_DRAW_SHAPE_RECTANGLES 0x00000004 +#define NV50_2D_DRAW_COLOR_FORMAT 0x00000584 +#define NV50_2D_DRAW_COLOR_FORMAT_R32G32B32A32_FLOAT 0x000000c0 +#define NV50_2D_DRAW_COLOR_FORMAT_R32G32B32A32_SINT 0x000000c1 +#define NV50_2D_DRAW_COLOR_FORMAT_R32G32B32A32_UINT 0x000000c2 +#define NV50_2D_DRAW_COLOR_FORMAT_R32G32B32X32_FLOAT 0x000000c3 +#define NV50_2D_DRAW_COLOR_FORMAT_R16G16B16A16_UNORM 0x000000c6 +#define NV50_2D_DRAW_COLOR_FORMAT_R16G16B16A16_SNORM 0x000000c7 +#define NV50_2D_DRAW_COLOR_FORMAT_R16G16B16A16_SINT 0x000000c8 +#define NV50_2D_DRAW_COLOR_FORMAT_R16G16B16A16_UINT 0x000000c9 +#define NV50_2D_DRAW_COLOR_FORMAT_R16G16B16A16_FLOAT 0x000000ca +#define NV50_2D_DRAW_COLOR_FORMAT_R32G32_FLOAT 0x000000cb +#define NV50_2D_DRAW_COLOR_FORMAT_R32G32_SINT 0x000000cc +#define NV50_2D_DRAW_COLOR_FORMAT_R32G32_UINT 0x000000cd +#define NV50_2D_DRAW_COLOR_FORMAT_R16G16B16X16_FLOAT 0x000000ce +#define NV50_2D_DRAW_COLOR_FORMAT_A8R8G8B8_UNORM 0x000000cf +#define NV50_2D_DRAW_COLOR_FORMAT_A8R8G8B8_SRGB 0x000000d0 +#define NV50_2D_DRAW_COLOR_FORMAT_A2B10G10R10_UNORM 0x000000d1 +#define NV50_2D_DRAW_COLOR_FORMAT_A2B10G10R10_UINT 0x000000d2 +#define NV50_2D_DRAW_COLOR_FORMAT_A8B8G8R8_UNORM 0x000000d5 +#define NV50_2D_DRAW_COLOR_FORMAT_A8B8G8R8_SRGB 0x000000d6 +#define NV50_2D_DRAW_COLOR_FORMAT_A8B8G8R8_SNORM 0x000000d7 +#define NV50_2D_DRAW_COLOR_FORMAT_A8B8G8R8_SINT 0x000000d8 +#define NV50_2D_DRAW_COLOR_FORMAT_A8B8G8R8_UINT 0x000000d9 +#define NV50_2D_DRAW_COLOR_FORMAT_R16G16_UNORM 0x000000da +#define NV50_2D_DRAW_COLOR_FORMAT_R16G16_SNORM 0x000000db +#define NV50_2D_DRAW_COLOR_FORMAT_R16G16_SINT 0x000000dc +#define NV50_2D_DRAW_COLOR_FORMAT_R16G16_UINT 0x000000dd +#define NV50_2D_DRAW_COLOR_FORMAT_R16G16_FLOAT 0x000000de +#define NV50_2D_DRAW_COLOR_FORMAT_A2R10G10B10_UNORM 0x000000df +#define NV50_2D_DRAW_COLOR_FORMAT_B10G11R11_FLOAT 0x000000e0 +#define NV50_2D_DRAW_COLOR_FORMAT_R32_FLOAT 0x000000e5 +#define NV50_2D_DRAW_COLOR_FORMAT_X8R8G8B8_UNORM 0x000000e6 +#define NV50_2D_DRAW_COLOR_FORMAT_X8R8G8B8_SRGB 0x000000e7 +#define NV50_2D_DRAW_COLOR_FORMAT_R5G6B5_UNORM 0x000000e8 +#define NV50_2D_DRAW_COLOR_FORMAT_A1R5G5B5_UNORM 0x000000e9 +#define NV50_2D_DRAW_COLOR_FORMAT_R8G8_UNORM 0x000000ea +#define NV50_2D_DRAW_COLOR_FORMAT_R8G8_SNORM 0x000000eb +#define NV50_2D_DRAW_COLOR_FORMAT_R8G8_SINT 0x000000ec +#define NV50_2D_DRAW_COLOR_FORMAT_R8G8_UINT 0x000000ed +#define NV50_2D_DRAW_COLOR_FORMAT_R16_UNORM 0x000000ee +#define NV50_2D_DRAW_COLOR_FORMAT_R16_SNORM 0x000000ef +#define NV50_2D_DRAW_COLOR_FORMAT_R16_SINT 0x000000f0 +#define NV50_2D_DRAW_COLOR_FORMAT_R16_UINT 0x000000f1 +#define NV50_2D_DRAW_COLOR_FORMAT_R16_FLOAT 0x000000f2 +#define NV50_2D_DRAW_COLOR_FORMAT_R8_UNORM 0x000000f3 +#define NV50_2D_DRAW_COLOR_FORMAT_R8_SNORM 0x000000f4 +#define NV50_2D_DRAW_COLOR_FORMAT_R8_SINT 0x000000f5 +#define NV50_2D_DRAW_COLOR_FORMAT_R8_UINT 0x000000f6 +#define NV50_2D_DRAW_COLOR_FORMAT_A8_UNORM 0x000000f7 +#define NV50_2D_DRAW_COLOR_FORMAT_X1R5G5B5_UNORM 0x000000f8 +#define NV50_2D_DRAW_COLOR_FORMAT_X8B8G8R8_UNORM 0x000000f9 +#define NV50_2D_DRAW_COLOR_FORMAT_X8B8G8R8_SRGB 0x000000fa +#define NV50_2D_DRAW_COLOR 0x00000588 +#define NV50_2D_DRAW_POINT16 0x000005e0 +#define NV50_2D_DRAW_POINT16_X_SHIFT 0 +#define NV50_2D_DRAW_POINT16_X_MASK 0x0000ffff +#define NV50_2D_DRAW_POINT16_Y_SHIFT 16 +#define NV50_2D_DRAW_POINT16_Y_MASK 0xffff0000 +#define NV50_2D_DRAW_POINT32_X(x) (0x00000600+((x)*8)) +#define NV50_2D_DRAW_POINT32_X__SIZE 0x00000040 +#define NV50_2D_DRAW_POINT32_Y(x) (0x00000604+((x)*8)) +#define NV50_2D_DRAW_POINT32_Y__SIZE 0x00000040 +#define NV50_2D_SIFC_BITMAP_ENABLE 0x00000800 +#define NV50_2D_SIFC_FORMAT 0x00000804 +#define NV50_2D_SIFC_FORMAT_R32G32B32A32_FLOAT 0x000000c0 +#define NV50_2D_SIFC_FORMAT_R32G32B32A32_SINT 0x000000c1 +#define NV50_2D_SIFC_FORMAT_R32G32B32A32_UINT 0x000000c2 +#define NV50_2D_SIFC_FORMAT_R32G32B32X32_FLOAT 0x000000c3 +#define NV50_2D_SIFC_FORMAT_R16G16B16A16_UNORM 0x000000c6 +#define NV50_2D_SIFC_FORMAT_R16G16B16A16_SNORM 0x000000c7 +#define NV50_2D_SIFC_FORMAT_R16G16B16A16_SINT 0x000000c8 +#define NV50_2D_SIFC_FORMAT_R16G16B16A16_UINT 0x000000c9 +#define NV50_2D_SIFC_FORMAT_R16G16B16A16_FLOAT 0x000000ca +#define NV50_2D_SIFC_FORMAT_R32G32_FLOAT 0x000000cb +#define NV50_2D_SIFC_FORMAT_R32G32_SINT 0x000000cc +#define NV50_2D_SIFC_FORMAT_R32G32_UINT 0x000000cd +#define NV50_2D_SIFC_FORMAT_R16G16B16X16_FLOAT 0x000000ce +#define NV50_2D_SIFC_FORMAT_A8R8G8B8_UNORM 0x000000cf +#define NV50_2D_SIFC_FORMAT_A8R8G8B8_SRGB 0x000000d0 +#define NV50_2D_SIFC_FORMAT_A2B10G10R10_UNORM 0x000000d1 +#define NV50_2D_SIFC_FORMAT_A2B10G10R10_UINT 0x000000d2 +#define NV50_2D_SIFC_FORMAT_A8B8G8R8_UNORM 0x000000d5 +#define NV50_2D_SIFC_FORMAT_A8B8G8R8_SRGB 0x000000d6 +#define NV50_2D_SIFC_FORMAT_A8B8G8R8_SNORM 0x000000d7 +#define NV50_2D_SIFC_FORMAT_A8B8G8R8_SINT 0x000000d8 +#define NV50_2D_SIFC_FORMAT_A8B8G8R8_UINT 0x000000d9 +#define NV50_2D_SIFC_FORMAT_R16G16_UNORM 0x000000da +#define NV50_2D_SIFC_FORMAT_R16G16_SNORM 0x000000db +#define NV50_2D_SIFC_FORMAT_R16G16_SINT 0x000000dc +#define NV50_2D_SIFC_FORMAT_R16G16_UINT 0x000000dd +#define NV50_2D_SIFC_FORMAT_R16G16_FLOAT 0x000000de +#define NV50_2D_SIFC_FORMAT_A2R10G10B10_UNORM 0x000000df +#define NV50_2D_SIFC_FORMAT_B10G11R11_FLOAT 0x000000e0 +#define NV50_2D_SIFC_FORMAT_R32_FLOAT 0x000000e5 +#define NV50_2D_SIFC_FORMAT_X8R8G8B8_UNORM 0x000000e6 +#define NV50_2D_SIFC_FORMAT_X8R8G8B8_SRGB 0x000000e7 +#define NV50_2D_SIFC_FORMAT_R5G6B5_UNORM 0x000000e8 +#define NV50_2D_SIFC_FORMAT_A1R5G5B5_UNORM 0x000000e9 +#define NV50_2D_SIFC_FORMAT_R8G8_UNORM 0x000000ea +#define NV50_2D_SIFC_FORMAT_R8G8_SNORM 0x000000eb +#define NV50_2D_SIFC_FORMAT_R8G8_SINT 0x000000ec +#define NV50_2D_SIFC_FORMAT_R8G8_UINT 0x000000ed +#define NV50_2D_SIFC_FORMAT_R16_UNORM 0x000000ee +#define NV50_2D_SIFC_FORMAT_R16_SNORM 0x000000ef +#define NV50_2D_SIFC_FORMAT_R16_SINT 0x000000f0 +#define NV50_2D_SIFC_FORMAT_R16_UINT 0x000000f1 +#define NV50_2D_SIFC_FORMAT_R16_FLOAT 0x000000f2 +#define NV50_2D_SIFC_FORMAT_R8_UNORM 0x000000f3 +#define NV50_2D_SIFC_FORMAT_R8_SNORM 0x000000f4 +#define NV50_2D_SIFC_FORMAT_R8_SINT 0x000000f5 +#define NV50_2D_SIFC_FORMAT_R8_UINT 0x000000f6 +#define NV50_2D_SIFC_FORMAT_A8_UNORM 0x000000f7 +#define NV50_2D_SIFC_FORMAT_X1R5G5B5_UNORM 0x000000f8 +#define NV50_2D_SIFC_FORMAT_X8B8G8R8_UNORM 0x000000f9 +#define NV50_2D_SIFC_FORMAT_X8B8G8R8_SRGB 0x000000fa +#define NV50_2D_SIFC_BITMAP_UNK808 0x00000808 +#define NV50_2D_SIFC_BITMAP_LSB_FIRST 0x0000080c +#define NV50_2D_SIFC_BITMAP_LINE_PACK_MODE 0x00000810 +#define NV50_2D_SIFC_BITMAP_LINE_PACK_MODE_PACKED 0x00000000 +#define NV50_2D_SIFC_BITMAP_LINE_PACK_MODE_ALIGN_BYTE 0x00000001 +#define NV50_2D_SIFC_BITMAP_LINE_PACK_MODE_ALIGN_WORD 0x00000002 +#define NV50_2D_SIFC_BITMAP_COLOR_BIT0 0x00000814 +#define NV50_2D_SIFC_BITMAP_COLOR_BIT1 0x00000818 +#define NV50_2D_SIFC_BITMAP_WRITE_BIT0_ENABLE 0x0000081c +#define NV50_2D_SIFC_WIDTH 0x00000838 +#define NV50_2D_SIFC_HEIGHT 0x0000083c +#define NV50_2D_SIFC_DX_DU_FRACT 0x00000840 +#define NV50_2D_SIFC_DX_DU_INT 0x00000844 +#define NV50_2D_SIFC_DY_DV_FRACT 0x00000848 +#define NV50_2D_SIFC_DY_DV_INT 0x0000084c +#define NV50_2D_SIFC_DST_X_FRACT 0x00000850 +#define NV50_2D_SIFC_DST_X_INT 0x00000854 +#define NV50_2D_SIFC_DST_Y_FRACT 0x00000858 +#define NV50_2D_SIFC_DST_Y_INT 0x0000085c +#define NV50_2D_SIFC_DATA 0x00000860 +#define NV50_2D_BLIT_DST_X 0x000008b0 +#define NV50_2D_BLIT_DST_Y 0x000008b4 +#define NV50_2D_BLIT_DST_W 0x000008b8 +#define NV50_2D_BLIT_DST_H 0x000008bc +#define NV50_2D_BLIT_DU_DX_FRACT 0x000008c0 +#define NV50_2D_BLIT_DU_DX_INT 0x000008c4 +#define NV50_2D_BLIT_DV_DY_FRACT 0x000008c8 +#define NV50_2D_BLIT_DV_DY_INT 0x000008cc +#define NV50_2D_BLIT_SRC_X_FRACT 0x000008d0 +#define NV50_2D_BLIT_SRC_X_INT 0x000008d4 +#define NV50_2D_BLIT_SRC_Y_FRACT 0x000008d8 +#define NV50_2D_BLIT_SRC_Y_INT 0x000008dc + + +#define NV50TCL 0x00005097 + +#define NV50TCL_NOP 0x00000100 +#define NV50TCL_NOTIFY 0x00000104 +#define NV50TCL_SERIALIZE 0x00000110 +#define NV50TCL_DMA_NOTIFY 0x00000180 +#define NV50TCL_DMA_ZETA 0x00000184 +#define NV50TCL_DMA_QUERY 0x00000188 +#define NV50TCL_DMA_VTXBUF0 0x0000018c +#define NV50TCL_DMA_LOCAL 0x00000190 +#define NV50TCL_DMA_STACK 0x00000194 +#define NV50TCL_DMA_CODE_CB 0x00000198 +#define NV50TCL_DMA_TSC 0x0000019c +#define NV50TCL_DMA_TIC 0x000001a0 +#define NV50TCL_DMA_TEXTURE 0x000001a4 +#define NV50TCL_DMA_STRMOUT 0x000001a8 +#define NV50TCL_DMA_UNK01AC 0x000001ac +#define NV50TCL_DMA_COLOR(x) (0x000001c0+((x)*4)) +#define NV50TCL_DMA_COLOR__SIZE 0x00000008 +#define NV50TCL_RT_ADDRESS_HIGH(x) (0x00000200+((x)*32)) +#define NV50TCL_RT_ADDRESS_HIGH__SIZE 0x00000008 +#define NV50TCL_RT_ADDRESS_LOW(x) (0x00000204+((x)*32)) +#define NV50TCL_RT_ADDRESS_LOW__SIZE 0x00000008 +#define NV50TCL_RT_FORMAT(x) (0x00000208+((x)*32)) +#define NV50TCL_RT_FORMAT__SIZE 0x00000008 +#define NV50TCL_RT_FORMAT_R32G32B32A32_FLOAT 0x000000c0 +#define NV50TCL_RT_FORMAT_R32G32B32A32_SINT 0x000000c1 +#define NV50TCL_RT_FORMAT_R32G32B32A32_UINT 0x000000c2 +#define NV50TCL_RT_FORMAT_R32G32B32X32_FLOAT 0x000000c3 +#define NV50TCL_RT_FORMAT_R16G16B16A16_UNORM 0x000000c6 +#define NV50TCL_RT_FORMAT_R16G16B16A16_SNORM 0x000000c7 +#define NV50TCL_RT_FORMAT_R16G16B16A16_SINT 0x000000c8 +#define NV50TCL_RT_FORMAT_R16G16B16A16_UINT 0x000000c9 +#define NV50TCL_RT_FORMAT_R16G16B16A16_FLOAT 0x000000ca +#define NV50TCL_RT_FORMAT_R32G32_FLOAT 0x000000cb +#define NV50TCL_RT_FORMAT_R32G32_SINT 0x000000cc +#define NV50TCL_RT_FORMAT_R32G32_UINT 0x000000cd +#define NV50TCL_RT_FORMAT_R16G16B16X16_FLOAT 0x000000ce +#define NV50TCL_RT_FORMAT_A8R8G8B8_UNORM 0x000000cf +#define NV50TCL_RT_FORMAT_A8R8G8B8_SRGB 0x000000d0 +#define NV50TCL_RT_FORMAT_A2B10G10R10_UNORM 0x000000d1 +#define NV50TCL_RT_FORMAT_A2B10G10R10_UINT 0x000000d2 +#define NV50TCL_RT_FORMAT_A8B8G8R8_UNORM 0x000000d5 +#define NV50TCL_RT_FORMAT_A8B8G8R8_SRGB 0x000000d6 +#define NV50TCL_RT_FORMAT_A8B8G8R8_SNORM 0x000000d7 +#define NV50TCL_RT_FORMAT_A8B8G8R8_SINT 0x000000d8 +#define NV50TCL_RT_FORMAT_A8B8G8R8_UINT 0x000000d9 +#define NV50TCL_RT_FORMAT_R16G16_UNORM 0x000000da +#define NV50TCL_RT_FORMAT_R16G16_SNORM 0x000000db +#define NV50TCL_RT_FORMAT_R16G16_SINT 0x000000dc +#define NV50TCL_RT_FORMAT_R16G16_UINT 0x000000dd +#define NV50TCL_RT_FORMAT_R16G16_FLOAT 0x000000de +#define NV50TCL_RT_FORMAT_A2R10G10B10_UNORM 0x000000df +#define NV50TCL_RT_FORMAT_B10G11R11_FLOAT 0x000000e0 +#define NV50TCL_RT_FORMAT_R32_FLOAT 0x000000e5 +#define NV50TCL_RT_FORMAT_X8R8G8B8_UNORM 0x000000e6 +#define NV50TCL_RT_FORMAT_X8R8G8B8_SRGB 0x000000e7 +#define NV50TCL_RT_FORMAT_R5G6B5_UNORM 0x000000e8 +#define NV50TCL_RT_FORMAT_A1R5G5B5_UNORM 0x000000e9 +#define NV50TCL_RT_FORMAT_R8G8_UNORM 0x000000ea +#define NV50TCL_RT_FORMAT_R8G8_SNORM 0x000000eb +#define NV50TCL_RT_FORMAT_R8G8_SINT 0x000000ec +#define NV50TCL_RT_FORMAT_R8G8_UINT 0x000000ed +#define NV50TCL_RT_FORMAT_R16_UNORM 0x000000ee +#define NV50TCL_RT_FORMAT_R16_SNORM 0x000000ef +#define NV50TCL_RT_FORMAT_R16_SINT 0x000000f0 +#define NV50TCL_RT_FORMAT_R16_UINT 0x000000f1 +#define NV50TCL_RT_FORMAT_R16_FLOAT 0x000000f2 +#define NV50TCL_RT_FORMAT_R8_UNORM 0x000000f3 +#define NV50TCL_RT_FORMAT_R8_SNORM 0x000000f4 +#define NV50TCL_RT_FORMAT_R8_SINT 0x000000f5 +#define NV50TCL_RT_FORMAT_R8_UINT 0x000000f6 +#define NV50TCL_RT_FORMAT_A8_UNORM 0x000000f7 +#define NV50TCL_RT_FORMAT_X1R5G5B5_UNORM 0x000000f8 +#define NV50TCL_RT_FORMAT_X8B8G8R8_UNORM 0x000000f9 +#define NV50TCL_RT_FORMAT_X8B8G8R8_SRGB 0x000000fa +#define NV50TCL_RT_TILE_MODE(x) (0x0000020c+((x)*32)) +#define NV50TCL_RT_TILE_MODE__SIZE 0x00000008 +#define NV50TCL_RT_LAYER_STRIDE(x) (0x00000210+((x)*32)) +#define NV50TCL_RT_LAYER_STRIDE__SIZE 0x00000008 +#define NV50TCL_VTX_ATTR_1F(x) (0x00000300+((x)*4)) +#define NV50TCL_VTX_ATTR_1F__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_2H(x) (0x00000340+((x)*4)) +#define NV50TCL_VTX_ATTR_2H__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_2H_X_SHIFT 0 +#define NV50TCL_VTX_ATTR_2H_X_MASK 0x0000ffff +#define NV50TCL_VTX_ATTR_2H_Y_SHIFT 16 +#define NV50TCL_VTX_ATTR_2H_Y_MASK 0xffff0000 +#define NV50TCL_VTX_ATTR_2F_X(x) (0x00000380+((x)*8)) +#define NV50TCL_VTX_ATTR_2F_X__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_2F_Y(x) (0x00000384+((x)*8)) +#define NV50TCL_VTX_ATTR_2F_Y__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_3F_X(x) (0x00000400+((x)*16)) +#define NV50TCL_VTX_ATTR_3F_X__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_3F_Y(x) (0x00000404+((x)*16)) +#define NV50TCL_VTX_ATTR_3F_Y__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_3F_Z(x) (0x00000408+((x)*16)) +#define NV50TCL_VTX_ATTR_3F_Z__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_4F_X(x) (0x00000500+((x)*16)) +#define NV50TCL_VTX_ATTR_4F_X__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_4F_Y(x) (0x00000504+((x)*16)) +#define NV50TCL_VTX_ATTR_4F_Y__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_4F_Z(x) (0x00000508+((x)*16)) +#define NV50TCL_VTX_ATTR_4F_Z__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_4F_W(x) (0x0000050c+((x)*16)) +#define NV50TCL_VTX_ATTR_4F_W__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_4H_0(x) (0x00000600+((x)*8)) +#define NV50TCL_VTX_ATTR_4H_0__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_4H_0_X_SHIFT 0 +#define NV50TCL_VTX_ATTR_4H_0_X_MASK 0x0000ffff +#define NV50TCL_VTX_ATTR_4H_0_Y_SHIFT 16 +#define NV50TCL_VTX_ATTR_4H_0_Y_MASK 0xffff0000 +#define NV50TCL_VTX_ATTR_4H_1(x) (0x00000604+((x)*8)) +#define NV50TCL_VTX_ATTR_4H_1__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_4H_1_Z_SHIFT 0 +#define NV50TCL_VTX_ATTR_4H_1_Z_MASK 0x0000ffff +#define NV50TCL_VTX_ATTR_4H_1_W_SHIFT 16 +#define NV50TCL_VTX_ATTR_4H_1_W_MASK 0xffff0000 +#define NV50TCL_VTX_ATTR_2I(x) (0x00000680+((x)*4)) +#define NV50TCL_VTX_ATTR_2I__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_2I_X_SHIFT 0 +#define NV50TCL_VTX_ATTR_2I_X_MASK 0x0000ffff +#define NV50TCL_VTX_ATTR_2I_Y_SHIFT 16 +#define NV50TCL_VTX_ATTR_2I_Y_MASK 0xffff0000 +#define NV50TCL_VTX_ATTR_2NI(x) (0x000006c0+((x)*4)) +#define NV50TCL_VTX_ATTR_2NI__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_2NI_X_SHIFT 0 +#define NV50TCL_VTX_ATTR_2NI_X_MASK 0x0000ffff +#define NV50TCL_VTX_ATTR_2NI_Y_SHIFT 16 +#define NV50TCL_VTX_ATTR_2NI_Y_MASK 0xffff0000 +#define NV50TCL_VTX_ATTR_4I_0(x) (0x00000700+((x)*8)) +#define NV50TCL_VTX_ATTR_4I_0__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_4I_0_X_SHIFT 0 +#define NV50TCL_VTX_ATTR_4I_0_X_MASK 0x0000ffff +#define NV50TCL_VTX_ATTR_4I_0_Y_SHIFT 16 +#define NV50TCL_VTX_ATTR_4I_0_Y_MASK 0xffff0000 +#define NV50TCL_VTX_ATTR_4I_1(x) (0x00000704+((x)*8)) +#define NV50TCL_VTX_ATTR_4I_1__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_4I_1_Z_SHIFT 0 +#define NV50TCL_VTX_ATTR_4I_1_Z_MASK 0x0000ffff +#define NV50TCL_VTX_ATTR_4I_1_W_SHIFT 16 +#define NV50TCL_VTX_ATTR_4I_1_W_MASK 0xffff0000 +#define NV50TCL_VTX_ATTR_4NI_0(x) (0x00000780+((x)*8)) +#define NV50TCL_VTX_ATTR_4NI_0__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_4NI_0_X_SHIFT 0 +#define NV50TCL_VTX_ATTR_4NI_0_X_MASK 0x0000ffff +#define NV50TCL_VTX_ATTR_4NI_0_Y_SHIFT 16 +#define NV50TCL_VTX_ATTR_4NI_0_Y_MASK 0xffff0000 +#define NV50TCL_VTX_ATTR_4NI_1(x) (0x00000784+((x)*8)) +#define NV50TCL_VTX_ATTR_4NI_1__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_4NI_1_Z_SHIFT 0 +#define NV50TCL_VTX_ATTR_4NI_1_Z_MASK 0x0000ffff +#define NV50TCL_VTX_ATTR_4NI_1_W_SHIFT 16 +#define NV50TCL_VTX_ATTR_4NI_1_W_MASK 0xffff0000 +#define NV50TCL_VTX_ATTR_4UB(x) (0x00000800+((x)*4)) +#define NV50TCL_VTX_ATTR_4UB__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_4UB_X_SHIFT 0 +#define NV50TCL_VTX_ATTR_4UB_X_MASK 0x000000ff +#define NV50TCL_VTX_ATTR_4UB_Y_SHIFT 8 +#define NV50TCL_VTX_ATTR_4UB_Y_MASK 0x0000ff00 +#define NV50TCL_VTX_ATTR_4UB_Z_SHIFT 16 +#define NV50TCL_VTX_ATTR_4UB_Z_MASK 0x00ff0000 +#define NV50TCL_VTX_ATTR_4UB_W_SHIFT 24 +#define NV50TCL_VTX_ATTR_4UB_W_MASK 0xff000000 +#define NV50TCL_VTX_ATTR_4B(x) (0x00000840+((x)*4)) +#define NV50TCL_VTX_ATTR_4B__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_4B_X_SHIFT 0 +#define NV50TCL_VTX_ATTR_4B_X_MASK 0x000000ff +#define NV50TCL_VTX_ATTR_4B_Y_SHIFT 8 +#define NV50TCL_VTX_ATTR_4B_Y_MASK 0x0000ff00 +#define NV50TCL_VTX_ATTR_4B_Z_SHIFT 16 +#define NV50TCL_VTX_ATTR_4B_Z_MASK 0x00ff0000 +#define NV50TCL_VTX_ATTR_4B_W_SHIFT 24 +#define NV50TCL_VTX_ATTR_4B_W_MASK 0xff000000 +#define NV50TCL_VTX_ATTR_4NUB(x) (0x00000880+((x)*4)) +#define NV50TCL_VTX_ATTR_4NUB__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_4NUB_X_SHIFT 0 +#define NV50TCL_VTX_ATTR_4NUB_X_MASK 0x000000ff +#define NV50TCL_VTX_ATTR_4NUB_Y_SHIFT 8 +#define NV50TCL_VTX_ATTR_4NUB_Y_MASK 0x0000ff00 +#define NV50TCL_VTX_ATTR_4NUB_Z_SHIFT 16 +#define NV50TCL_VTX_ATTR_4NUB_Z_MASK 0x00ff0000 +#define NV50TCL_VTX_ATTR_4NUB_W_SHIFT 24 +#define NV50TCL_VTX_ATTR_4NUB_W_MASK 0xff000000 +#define NV50TCL_VTX_ATTR_4NB(x) (0x000008c0+((x)*4)) +#define NV50TCL_VTX_ATTR_4NB__SIZE 0x00000010 +#define NV50TCL_VTX_ATTR_4NB_X_SHIFT 0 +#define NV50TCL_VTX_ATTR_4NB_X_MASK 0x000000ff +#define NV50TCL_VTX_ATTR_4NB_Y_SHIFT 8 +#define NV50TCL_VTX_ATTR_4NB_Y_MASK 0x0000ff00 +#define NV50TCL_VTX_ATTR_4NB_Z_SHIFT 16 +#define NV50TCL_VTX_ATTR_4NB_Z_MASK 0x00ff0000 +#define NV50TCL_VTX_ATTR_4NB_W_SHIFT 24 +#define NV50TCL_VTX_ATTR_4NB_W_MASK 0xff000000 +#define NV50TCL_VERTEX_ARRAY_FORMAT(x) (0x00000900+((x)*16)) +#define NV50TCL_VERTEX_ARRAY_FORMAT__SIZE 0x00000010 +#define NV50TCL_VERTEX_ARRAY_FORMAT_STRIDE_SHIFT 0 +#define NV50TCL_VERTEX_ARRAY_FORMAT_STRIDE_MASK 0x00000fff +#define NV50TCL_VERTEX_ARRAY_FORMAT_ENABLE (1 << 29) +#define NV50TCL_VERTEX_ARRAY_START_HIGH(x) (0x00000904+((x)*16)) +#define NV50TCL_VERTEX_ARRAY_START_HIGH__SIZE 0x00000010 +#define NV50TCL_VERTEX_ARRAY_START_LOW(x) (0x00000908+((x)*16)) +#define NV50TCL_VERTEX_ARRAY_START_LOW__SIZE 0x00000010 +#define NV50TCL_VIEWPORT_SCALE_X(x) (0x00000a00+((x)*32)) +#define NV50TCL_VIEWPORT_SCALE_X__SIZE 0x00000010 +#define NV50TCL_VIEWPORT_SCALE_Y(x) (0x00000a04+((x)*32)) +#define NV50TCL_VIEWPORT_SCALE_Y__SIZE 0x00000010 +#define NV50TCL_VIEWPORT_SCALE_Z(x) (0x00000a08+((x)*32)) +#define NV50TCL_VIEWPORT_SCALE_Z__SIZE 0x00000010 +#define NV50TCL_VIEWPORT_TRANSLATE_X(x) (0x00000a0c+((x)*32)) +#define NV50TCL_VIEWPORT_TRANSLATE_X__SIZE 0x00000010 +#define NV50TCL_VIEWPORT_TRANSLATE_Y(x) (0x00000a10+((x)*32)) +#define NV50TCL_VIEWPORT_TRANSLATE_Y__SIZE 0x00000010 +#define NV50TCL_VIEWPORT_TRANSLATE_Z(x) (0x00000a14+((x)*32)) +#define NV50TCL_VIEWPORT_TRANSLATE_Z__SIZE 0x00000010 +#define NV50TCL_VIEWPORT_HORIZ(x) (0x00000c00+((x)*16)) +#define NV50TCL_VIEWPORT_HORIZ__SIZE 0x00000010 +#define NV50TCL_VIEWPORT_HORIZ_X_SHIFT 0 +#define NV50TCL_VIEWPORT_HORIZ_X_MASK 0x0000ffff +#define NV50TCL_VIEWPORT_HORIZ_W_SHIFT 16 +#define NV50TCL_VIEWPORT_HORIZ_W_MASK 0xffff0000 +#define NV50TCL_VIEWPORT_VERT(x) (0x00000c04+((x)*16)) +#define NV50TCL_VIEWPORT_VERT__SIZE 0x00000010 +#define NV50TCL_VIEWPORT_VERT_Y_SHIFT 0 +#define NV50TCL_VIEWPORT_VERT_Y_MASK 0x0000ffff +#define NV50TCL_VIEWPORT_VERT_H_SHIFT 16 +#define NV50TCL_VIEWPORT_VERT_H_MASK 0xffff0000 +#define NV50TCL_DEPTH_RANGE_NEAR(x) (0x00000c08+((x)*16)) +#define NV50TCL_DEPTH_RANGE_NEAR__SIZE 0x00000010 +#define NV50TCL_DEPTH_RANGE_FAR(x) (0x00000c0c+((x)*16)) +#define NV50TCL_DEPTH_RANGE_FAR__SIZE 0x00000010 +#define NV50TCL_VIEWPORT_CLIP_HORIZ(x) (0x00000d00+((x)*8)) +#define NV50TCL_VIEWPORT_CLIP_HORIZ__SIZE 0x00000008 +#define NV50TCL_VIEWPORT_CLIP_VERT(x) (0x00000d04+((x)*8)) +#define NV50TCL_VIEWPORT_CLIP_VERT__SIZE 0x00000008 +#define NV50TCL_VERTEX_BUFFER_FIRST 0x00000d74 +#define NV50TCL_VERTEX_BUFFER_COUNT 0x00000d78 +#define NV50TCL_CLEAR_COLOR(x) (0x00000d80+((x)*4)) +#define NV50TCL_CLEAR_COLOR__SIZE 0x00000004 +#define NV50TCL_CLEAR_DEPTH 0x00000d90 +#define NV50TCL_STACK_ADDRESS_HIGH 0x00000d94 +#define NV50TCL_STACK_ADDRESS_LOW 0x00000d98 +#define NV50TCL_STACK_SIZE_LOG 0x00000d9c +#define NV50TCL_CLEAR_STENCIL 0x00000da0 +#define NV50TCL_STRMOUT_PRIMITIVE_COUNT 0x00000da8 +#define NV50TCL_POLYGON_MODE_FRONT 0x00000dac +#define NV50TCL_POLYGON_MODE_FRONT_POINT 0x00001b00 +#define NV50TCL_POLYGON_MODE_FRONT_LINE 0x00001b01 +#define NV50TCL_POLYGON_MODE_FRONT_FILL 0x00001b02 +#define NV50TCL_POLYGON_MODE_BACK 0x00000db0 +#define NV50TCL_POLYGON_MODE_BACK_POINT 0x00001b00 +#define NV50TCL_POLYGON_MODE_BACK_LINE 0x00001b01 +#define NV50TCL_POLYGON_MODE_BACK_FILL 0x00001b02 +#define NV50TCL_POLYGON_SMOOTH_ENABLE 0x00000db4 +#define NV50TCL_POLYGON_OFFSET_POINT_ENABLE 0x00000dc0 +#define NV50TCL_POLYGON_OFFSET_LINE_ENABLE 0x00000dc4 +#define NV50TCL_POLYGON_OFFSET_FILL_ENABLE 0x00000dc8 +#define NV50TCL_WATCHDOG_TIMER 0x00000de4 +#define NV50TCL_WINDOW_OFFSET_X 0x00000df8 +#define NV50TCL_WINDOW_OFFSET_Y 0x00000dfc +#define NV50TCL_SCISSOR_ENABLE(x) (0x00000e00+((x)*16)) +#define NV50TCL_SCISSOR_ENABLE__SIZE 0x00000010 +#define NV50TCL_SCISSOR_HORIZ(x) (0x00000e04+((x)*16)) +#define NV50TCL_SCISSOR_HORIZ__SIZE 0x00000010 +#define NV50TCL_SCISSOR_HORIZ_MIN_SHIFT 0 +#define NV50TCL_SCISSOR_HORIZ_MIN_MASK 0x0000ffff +#define NV50TCL_SCISSOR_HORIZ_MAX_SHIFT 16 +#define NV50TCL_SCISSOR_HORIZ_MAX_MASK 0xffff0000 +#define NV50TCL_SCISSOR_VERT(x) (0x00000e08+((x)*16)) +#define NV50TCL_SCISSOR_VERT__SIZE 0x00000010 +#define NV50TCL_SCISSOR_VERT_MIN_SHIFT 0 +#define NV50TCL_SCISSOR_VERT_MIN_MASK 0x0000ffff +#define NV50TCL_SCISSOR_VERT_MAX_SHIFT 16 +#define NV50TCL_SCISSOR_VERT_MAX_MASK 0xffff0000 +#define NV50TCL_CB_ADDR 0x00000f00 +#define NV50TCL_CB_ADDR_ID_SHIFT 8 +#define NV50TCL_CB_ADDR_ID_MASK 0x003fff00 +#define NV50TCL_CB_ADDR_BUFFER_SHIFT 0 +#define NV50TCL_CB_ADDR_BUFFER_MASK 0x0000007f +#define NV50TCL_CB_DATA(x) (0x00000f04+((x)*4)) +#define NV50TCL_CB_DATA__SIZE 0x00000010 +#define NV50TCL_LOCAL_WARPS_LOG_ALLOC 0x00000f44 +#define NV50TCL_LOCAL_WARPS_NO_CLAMP 0x00000f48 +#define NV50TCL_STACK_WARPS_LOG_ALLOC 0x00000f4c +#define NV50TCL_STACK_WARPS_NO_CLAMP 0x00000f50 +#define NV50TCL_STENCIL_BACK_FUNC_REF 0x00000f54 +#define NV50TCL_STENCIL_BACK_MASK 0x00000f58 +#define NV50TCL_STENCIL_BACK_FUNC_MASK 0x00000f5c +#define NV50TCL_GP_ADDRESS_HIGH 0x00000f70 +#define NV50TCL_GP_ADDRESS_LOW 0x00000f74 +#define NV50TCL_VP_ADDRESS_HIGH 0x00000f7c +#define NV50TCL_VP_ADDRESS_LOW 0x00000f80 +#define NV50TCL_UNK0F84_ADDRESS_HIGH 0x00000f84 +#define NV50TCL_UNK0F84_ADDRESS_LOW 0x00000f88 +#define NV50TCL_DEPTH_BOUNDS(x) (0x00000f9c+((x)*4)) +#define NV50TCL_DEPTH_BOUNDS__SIZE 0x00000002 +#define NV50TCL_FP_ADDRESS_HIGH 0x00000fa4 +#define NV50TCL_FP_ADDRESS_LOW 0x00000fa8 +#define NV50TCL_MSAA_MASK(x) (0x00000fbc+((x)*4)) +#define NV50TCL_MSAA_MASK__SIZE 0x00000004 +#define NV50TCL_ZETA_ADDRESS_HIGH 0x00000fe0 +#define NV50TCL_ZETA_ADDRESS_LOW 0x00000fe4 +#define NV50TCL_ZETA_FORMAT 0x00000fe8 +#define NV50TCL_ZETA_FORMAT_Z32_FLOAT 0x0000000a +#define NV50TCL_ZETA_FORMAT_Z16_UNORM 0x00000013 +#define NV50TCL_ZETA_FORMAT_Z24S8_UNORM 0x00000014 +#define NV50TCL_ZETA_FORMAT_X8Z24_UNORM 0x00000015 +#define NV50TCL_ZETA_FORMAT_S8Z24_UNORM 0x00000016 +#define NV50TCL_ZETA_FORMAT_Z32_FLOAT_X24S8_UNORM 0x00000019 +#define NV50TCL_ZETA_TILE_MODE 0x00000fec +#define NV50TCL_ZETA_LAYER_STRIDE 0x00000ff0 +#define NV50TCL_SCREEN_SCISSOR_HORIZ 0x00000ff4 +#define NV50TCL_SCREEN_SCISSOR_HORIZ_W_SHIFT 16 +#define NV50TCL_SCREEN_SCISSOR_HORIZ_W_MASK 0xffff0000 +#define NV50TCL_SCREEN_SCISSOR_HORIZ_X_SHIFT 0 +#define NV50TCL_SCREEN_SCISSOR_HORIZ_X_MASK 0x0000ffff +#define NV50TCL_SCREEN_SCISSOR_VERT 0x00000ff8 +#define NV50TCL_SCREEN_SCISSOR_VERT_H_SHIFT 16 +#define NV50TCL_SCREEN_SCISSOR_VERT_H_MASK 0xffff0000 +#define NV50TCL_SCREEN_SCISSOR_VERT_Y_SHIFT 0 +#define NV50TCL_SCREEN_SCISSOR_VERT_Y_MASK 0x0000ffff +#define NV50TCL_VERTEX_ARRAY_LIMIT_HIGH(x) (0x00001080+((x)*8)) +#define NV50TCL_VERTEX_ARRAY_LIMIT_HIGH__SIZE 0x00000010 +#define NV50TCL_VERTEX_ARRAY_LIMIT_LOW(x) (0x00001084+((x)*8)) +#define NV50TCL_VERTEX_ARRAY_LIMIT_LOW__SIZE 0x00000010 +#define NV50TCL_RT_CONTROL 0x0000121c +#define NV50TCL_RT_CONTROL_COUNT_SHIFT 0 +#define NV50TCL_RT_CONTROL_COUNT_MASK 0x0000000f +#define NV50TCL_RT_CONTROL_MAP0_SHIFT 4 +#define NV50TCL_RT_CONTROL_MAP0_MASK 0x00000070 +#define NV50TCL_RT_CONTROL_MAP1_SHIFT 7 +#define NV50TCL_RT_CONTROL_MAP1_MASK 0x00000380 +#define NV50TCL_RT_CONTROL_MAP2_SHIFT 10 +#define NV50TCL_RT_CONTROL_MAP2_MASK 0x00001c00 +#define NV50TCL_RT_CONTROL_MAP3_SHIFT 13 +#define NV50TCL_RT_CONTROL_MAP3_MASK 0x0000e000 +#define NV50TCL_RT_CONTROL_MAP4_SHIFT 16 +#define NV50TCL_RT_CONTROL_MAP4_MASK 0x00070000 +#define NV50TCL_RT_CONTROL_MAP5_SHIFT 19 +#define NV50TCL_RT_CONTROL_MAP5_MASK 0x00380000 +#define NV50TCL_RT_CONTROL_MAP6_SHIFT 22 +#define NV50TCL_RT_CONTROL_MAP6_MASK 0x01c00000 +#define NV50TCL_RT_CONTROL_MAP7_SHIFT 25 +#define NV50TCL_RT_CONTROL_MAP7_MASK 0x0e000000 +#define NV50TCL_RT_ARRAY_MODE 0x00001224 +#define NV50TCL_RT_ARRAY_MODE_LAYERS_SHIFT 0 +#define NV50TCL_RT_ARRAY_MODE_LAYERS_MASK 0x0000ffff +#define NV50TCL_RT_ARRAY_MODE_VOLUME (1 << 16) +#define NV50TCL_ZETA_HORIZ 0x00001228 +#define NV50TCL_ZETA_VERT 0x0000122c +#define NV50TCL_ZETA_ARRAY_MODE 0x00001230 +#define NV50TCL_ZETA_ARRAY_MODE_LAYERS_SHIFT 0 +#define NV50TCL_ZETA_ARRAY_MODE_LAYERS_MASK 0x0000ffff +#define NV50TCL_ZETA_ARRAY_MODE_UNK (1 << 16) +#define NV50TCL_LINKED_TSC 0x00001234 +#define NV50TCL_RT_HORIZ(x) (0x00001240+((x)*8)) +#define NV50TCL_RT_HORIZ__SIZE 0x00000008 +#define NV50TCL_RT_VERT(x) (0x00001244+((x)*8)) +#define NV50TCL_RT_VERT__SIZE 0x00000008 +#define NV50TCL_CB_DEF_ADDRESS_HIGH 0x00001280 +#define NV50TCL_CB_DEF_ADDRESS_LOW 0x00001284 +#define NV50TCL_CB_DEF_SET 0x00001288 +#define NV50TCL_CB_DEF_SET_SIZE_SHIFT 0 +#define NV50TCL_CB_DEF_SET_SIZE_MASK 0x0000ffff +#define NV50TCL_CB_DEF_SET_BUFFER_SHIFT 16 +#define NV50TCL_CB_DEF_SET_BUFFER_MASK 0x007f0000 +#define NV50TCL_STRMOUT_BUFFERS_CTRL 0x00001294 +#define NV50TCL_STRMOUT_BUFFERS_CTRL_INTERLEAVED (1 << 0) +#define NV50TCL_STRMOUT_BUFFERS_CTRL_SEPARATE_SHIFT 4 +#define NV50TCL_STRMOUT_BUFFERS_CTRL_SEPARATE_MASK 0x000000f0 +#define NV50TCL_STRMOUT_BUFFERS_CTRL_STRIDE_SHIFT 8 +#define NV50TCL_STRMOUT_BUFFERS_CTRL_STRIDE_MASK 0x0000ff00 +#define NV50TCL_FP_RESULT_COUNT 0x00001298 +#define NV50TCL_DEPTH_TEST_ENABLE 0x000012cc +#define NV50TCL_SHADE_MODEL 0x000012d4 +#define NV50TCL_SHADE_MODEL_FLAT 0x00001d00 +#define NV50TCL_SHADE_MODEL_SMOOTH 0x00001d01 +#define NV50TCL_LOCAL_ADDRESS_HIGH 0x000012d8 +#define NV50TCL_LOCAL_ADDRESS_LOW 0x000012dc +#define NV50TCL_LOCAL_SIZE_LOG 0x000012e0 +#define NV50TCL_DEPTH_WRITE_ENABLE 0x000012e8 +#define NV50TCL_ALPHA_TEST_ENABLE 0x000012ec +#define NV50TCL_PM_SET(x) (0x000012f0+((x)*4)) +#define NV50TCL_PM_SET__SIZE 0x00000004 +#define NV50TCL_VB_ELEMENT_U8_SETUP 0x00001300 +#define NV50TCL_VB_ELEMENT_U8_SETUP_OFFSET_SHIFT 30 +#define NV50TCL_VB_ELEMENT_U8_SETUP_OFFSET_MASK 0xc0000000 +#define NV50TCL_VB_ELEMENT_U8_SETUP_COUNT_SHIFT 0 +#define NV50TCL_VB_ELEMENT_U8_SETUP_COUNT_MASK 0x3fffffff +#define NV50TCL_VB_ELEMENT_U8 0x00001304 +#define NV50TCL_VB_ELEMENT_U8_I0_SHIFT 0 +#define NV50TCL_VB_ELEMENT_U8_I0_MASK 0x000000ff +#define NV50TCL_VB_ELEMENT_U8_I1_SHIFT 8 +#define NV50TCL_VB_ELEMENT_U8_I1_MASK 0x0000ff00 +#define NV50TCL_VB_ELEMENT_U8_I2_SHIFT 16 +#define NV50TCL_VB_ELEMENT_U8_I2_MASK 0x00ff0000 +#define NV50TCL_VB_ELEMENT_U8_I3_SHIFT 24 +#define NV50TCL_VB_ELEMENT_U8_I3_MASK 0xff000000 +#define NV50TCL_DEPTH_TEST_FUNC 0x0000130c +#define NV50TCL_DEPTH_TEST_FUNC_NEVER 0x00000200 +#define NV50TCL_DEPTH_TEST_FUNC_LESS 0x00000201 +#define NV50TCL_DEPTH_TEST_FUNC_EQUAL 0x00000202 +#define NV50TCL_DEPTH_TEST_FUNC_LEQUAL 0x00000203 +#define NV50TCL_DEPTH_TEST_FUNC_GREATER 0x00000204 +#define NV50TCL_DEPTH_TEST_FUNC_NOTEQUAL 0x00000205 +#define NV50TCL_DEPTH_TEST_FUNC_GEQUAL 0x00000206 +#define NV50TCL_DEPTH_TEST_FUNC_ALWAYS 0x00000207 +#define NV50TCL_ALPHA_TEST_REF 0x00001310 +#define NV50TCL_ALPHA_TEST_FUNC 0x00001314 +#define NV50TCL_ALPHA_TEST_FUNC_NEVER 0x00000200 +#define NV50TCL_ALPHA_TEST_FUNC_LESS 0x00000201 +#define NV50TCL_ALPHA_TEST_FUNC_EQUAL 0x00000202 +#define NV50TCL_ALPHA_TEST_FUNC_LEQUAL 0x00000203 +#define NV50TCL_ALPHA_TEST_FUNC_GREATER 0x00000204 +#define NV50TCL_ALPHA_TEST_FUNC_NOTEQUAL 0x00000205 +#define NV50TCL_ALPHA_TEST_FUNC_GEQUAL 0x00000206 +#define NV50TCL_ALPHA_TEST_FUNC_ALWAYS 0x00000207 +#define NV50TCL_BLEND_COLOR(x) (0x0000131c+((x)*4)) +#define NV50TCL_BLEND_COLOR__SIZE 0x00000004 +#define NV50TCL_TIC_FLUSH 0x00001330 +#define NV50TCL_TSC_FLUSH 0x00001334 +#define NV50TCL_TEX_CACHE_CTL 0x00001338 +#define NV50TCL_BLEND_EQUATION_RGB 0x00001340 +#define NV50TCL_BLEND_EQUATION_RGB_FUNC_ADD 0x00008006 +#define NV50TCL_BLEND_EQUATION_RGB_MIN 0x00008007 +#define NV50TCL_BLEND_EQUATION_RGB_MAX 0x00008008 +#define NV50TCL_BLEND_EQUATION_RGB_FUNC_SUBTRACT 0x0000800a +#define NV50TCL_BLEND_EQUATION_RGB_FUNC_REVERSE_SUBTRACT 0x0000800b +#define NV50TCL_BLEND_FUNC_SRC_RGB 0x00001344 +#define NV50TCL_BLEND_FUNC_SRC_RGB_ZERO 0x00000000 +#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE 0x00000001 +#define NV50TCL_BLEND_FUNC_SRC_RGB_SRC_COLOR 0x00000300 +#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_COLOR 0x00000301 +#define NV50TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA 0x00000302 +#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_SRC_ALPHA 0x00000303 +#define NV50TCL_BLEND_FUNC_SRC_RGB_DST_ALPHA 0x00000304 +#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_ALPHA 0x00000305 +#define NV50TCL_BLEND_FUNC_SRC_RGB_DST_COLOR 0x00000306 +#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_DST_COLOR 0x00000307 +#define NV50TCL_BLEND_FUNC_SRC_RGB_SRC_ALPHA_SATURATE 0x00000308 +#define NV50TCL_BLEND_FUNC_SRC_RGB_CONSTANT_COLOR 0x00008001 +#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002 +#define NV50TCL_BLEND_FUNC_SRC_RGB_CONSTANT_ALPHA 0x00008003 +#define NV50TCL_BLEND_FUNC_SRC_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004 +#define NV50TCL_BLEND_FUNC_DST_RGB 0x00001348 +#define NV50TCL_BLEND_FUNC_DST_RGB_ZERO 0x00000000 +#define NV50TCL_BLEND_FUNC_DST_RGB_ONE 0x00000001 +#define NV50TCL_BLEND_FUNC_DST_RGB_SRC_COLOR 0x00000300 +#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_COLOR 0x00000301 +#define NV50TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA 0x00000302 +#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_SRC_ALPHA 0x00000303 +#define NV50TCL_BLEND_FUNC_DST_RGB_DST_ALPHA 0x00000304 +#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_ALPHA 0x00000305 +#define NV50TCL_BLEND_FUNC_DST_RGB_DST_COLOR 0x00000306 +#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_DST_COLOR 0x00000307 +#define NV50TCL_BLEND_FUNC_DST_RGB_SRC_ALPHA_SATURATE 0x00000308 +#define NV50TCL_BLEND_FUNC_DST_RGB_CONSTANT_COLOR 0x00008001 +#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_COLOR 0x00008002 +#define NV50TCL_BLEND_FUNC_DST_RGB_CONSTANT_ALPHA 0x00008003 +#define NV50TCL_BLEND_FUNC_DST_RGB_ONE_MINUS_CONSTANT_ALPHA 0x00008004 +#define NV50TCL_BLEND_EQUATION_ALPHA 0x0000134c +#define NV50TCL_BLEND_EQUATION_ALPHA_FUNC_ADD 0x00008006 +#define NV50TCL_BLEND_EQUATION_ALPHA_MIN 0x00008007 +#define NV50TCL_BLEND_EQUATION_ALPHA_MAX 0x00008008 +#define NV50TCL_BLEND_EQUATION_ALPHA_FUNC_SUBTRACT 0x0000800a +#define NV50TCL_BLEND_EQUATION_ALPHA_FUNC_REVERSE_SUBTRACT 0x0000800b +#define NV50TCL_BLEND_FUNC_SRC_ALPHA 0x00001350 +#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ZERO 0x00000000 +#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE 0x00000001 +#define NV50TCL_BLEND_FUNC_SRC_ALPHA_SRC_COLOR 0x00000300 +#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_COLOR 0x00000301 +#define NV50TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA 0x00000302 +#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_SRC_ALPHA 0x00000303 +#define NV50TCL_BLEND_FUNC_SRC_ALPHA_DST_ALPHA 0x00000304 +#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_ALPHA 0x00000305 +#define NV50TCL_BLEND_FUNC_SRC_ALPHA_DST_COLOR 0x00000306 +#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_DST_COLOR 0x00000307 +#define NV50TCL_BLEND_FUNC_SRC_ALPHA_SRC_ALPHA_SATURATE 0x00000308 +#define NV50TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_COLOR 0x00008001 +#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x00008002 +#define NV50TCL_BLEND_FUNC_SRC_ALPHA_CONSTANT_ALPHA 0x00008003 +#define NV50TCL_BLEND_FUNC_SRC_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x00008004 +#define NV50TCL_BLEND_FUNC_DST_ALPHA 0x00001358 +#define NV50TCL_BLEND_FUNC_DST_ALPHA_ZERO 0x00000000 +#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE 0x00000001 +#define NV50TCL_BLEND_FUNC_DST_ALPHA_SRC_COLOR 0x00000300 +#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_COLOR 0x00000301 +#define NV50TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA 0x00000302 +#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_SRC_ALPHA 0x00000303 +#define NV50TCL_BLEND_FUNC_DST_ALPHA_DST_ALPHA 0x00000304 +#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_ALPHA 0x00000305 +#define NV50TCL_BLEND_FUNC_DST_ALPHA_DST_COLOR 0x00000306 +#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_DST_COLOR 0x00000307 +#define NV50TCL_BLEND_FUNC_DST_ALPHA_SRC_ALPHA_SATURATE 0x00000308 +#define NV50TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_COLOR 0x00008001 +#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x00008002 +#define NV50TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_ALPHA 0x00008003 +#define NV50TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x00008004 +#define NV50TCL_BLEND_ENABLE(x) (0x00001360+((x)*4)) +#define NV50TCL_BLEND_ENABLE__SIZE 0x00000008 +#define NV50TCL_STENCIL_FRONT_ENABLE 0x00001380 +#define NV50TCL_STENCIL_FRONT_OP_FAIL 0x00001384 +#define NV50TCL_STENCIL_FRONT_OP_FAIL_ZERO 0x00000000 +#define NV50TCL_STENCIL_FRONT_OP_FAIL_INVERT 0x0000150a +#define NV50TCL_STENCIL_FRONT_OP_FAIL_KEEP 0x00001e00 +#define NV50TCL_STENCIL_FRONT_OP_FAIL_REPLACE 0x00001e01 +#define NV50TCL_STENCIL_FRONT_OP_FAIL_INCR 0x00001e02 +#define NV50TCL_STENCIL_FRONT_OP_FAIL_DECR 0x00001e03 +#define NV50TCL_STENCIL_FRONT_OP_FAIL_INCR_WRAP 0x00008507 +#define NV50TCL_STENCIL_FRONT_OP_FAIL_DECR_WRAP 0x00008508 +#define NV50TCL_STENCIL_FRONT_OP_ZFAIL 0x00001388 +#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_ZERO 0x00000000 +#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_INVERT 0x0000150a +#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_KEEP 0x00001e00 +#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_REPLACE 0x00001e01 +#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_INCR 0x00001e02 +#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_DECR 0x00001e03 +#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_INCR_WRAP 0x00008507 +#define NV50TCL_STENCIL_FRONT_OP_ZFAIL_DECR_WRAP 0x00008508 +#define NV50TCL_STENCIL_FRONT_OP_ZPASS 0x0000138c +#define NV50TCL_STENCIL_FRONT_OP_ZPASS_ZERO 0x00000000 +#define NV50TCL_STENCIL_FRONT_OP_ZPASS_INVERT 0x0000150a +#define NV50TCL_STENCIL_FRONT_OP_ZPASS_KEEP 0x00001e00 +#define NV50TCL_STENCIL_FRONT_OP_ZPASS_REPLACE 0x00001e01 +#define NV50TCL_STENCIL_FRONT_OP_ZPASS_INCR 0x00001e02 +#define NV50TCL_STENCIL_FRONT_OP_ZPASS_DECR 0x00001e03 +#define NV50TCL_STENCIL_FRONT_OP_ZPASS_INCR_WRAP 0x00008507 +#define NV50TCL_STENCIL_FRONT_OP_ZPASS_DECR_WRAP 0x00008508 +#define NV50TCL_STENCIL_FRONT_FUNC_FUNC 0x00001390 +#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_NEVER 0x00000200 +#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_LESS 0x00000201 +#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_EQUAL 0x00000202 +#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_LEQUAL 0x00000203 +#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_GREATER 0x00000204 +#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_NOTEQUAL 0x00000205 +#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_GEQUAL 0x00000206 +#define NV50TCL_STENCIL_FRONT_FUNC_FUNC_ALWAYS 0x00000207 +#define NV50TCL_STENCIL_FRONT_FUNC_REF 0x00001394 +#define NV50TCL_STENCIL_FRONT_MASK 0x00001398 +#define NV50TCL_STENCIL_FRONT_FUNC_MASK 0x0000139c +#define NV50TCL_FRAG_COLOR_CLAMP_EN 0x000013a8 +#define NV50TCL_Y_ORIGIN_BOTTOM 0x000013ac +#define NV50TCL_LINE_WIDTH 0x000013b0 +#define NV50TCL_TEX_LIMITS(x) (0x000013b4+((x)*4)) +#define NV50TCL_TEX_LIMITS__SIZE 0x00000003 +#define NV50TCL_TEX_LIMITS_SAMPLERS_LOG2_SHIFT 0 +#define NV50TCL_TEX_LIMITS_SAMPLERS_LOG2_MASK 0x0000000f +#define NV50TCL_TEX_LIMITS_TEXTURES_LOG2_SHIFT 4 +#define NV50TCL_TEX_LIMITS_TEXTURES_LOG2_MASK 0x000000f0 +#define NV50TCL_POINT_COORD_REPLACE_MAP(x) (0x000013c0+((x)*4)) +#define NV50TCL_POINT_COORD_REPLACE_MAP__SIZE 0x00000008 +#define NV50TCL_VP_START_ID 0x0000140c +#define NV50TCL_GP_START_ID 0x00001410 +#define NV50TCL_FP_START_ID 0x00001414 +#define NV50TCL_GP_VERTEX_OUTPUT_COUNT 0x00001420 +#define NV50TCL_VB_ELEMENT_BASE 0x00001434 +#define NV50TCL_CODE_CB_FLUSH 0x00001440 +#define NV50TCL_BIND_TSC(x) (0x00001444+((x)*8)) +#define NV50TCL_BIND_TSC__SIZE 0x00000003 +#define NV50TCL_BIND_TSC_VALID (1 << 0) +#define NV50TCL_BIND_TSC_SAMPLER_SHIFT 4 +#define NV50TCL_BIND_TSC_SAMPLER_MASK 0x000000f0 +#define NV50TCL_BIND_TSC_TSC_SHIFT 12 +#define NV50TCL_BIND_TSC_TSC_MASK 0x001ff000 +#define NV50TCL_BIND_TIC(x) (0x00001448+((x)*8)) +#define NV50TCL_BIND_TIC__SIZE 0x00000003 +#define NV50TCL_BIND_TIC_VALID (1 << 0) +#define NV50TCL_BIND_TIC_TEXTURE_SHIFT 1 +#define NV50TCL_BIND_TIC_TEXTURE_MASK 0x000001fe +#define NV50TCL_BIND_TIC_TIC_SHIFT 9 +#define NV50TCL_BIND_TIC_TIC_MASK 0x7ffffe00 +#define NV50TCL_STRMOUT_MAP(x) (0x00001480+((x)*4)) +#define NV50TCL_STRMOUT_MAP__SIZE 0x00000020 +#define NV50TCL_VP_CLIP_DISTANCE_ENABLE 0x00001510 +#define NV50TCL_VP_CLIP_DISTANCE_ENABLE_0 (1 << 0) +#define NV50TCL_VP_CLIP_DISTANCE_ENABLE_1 (1 << 1) +#define NV50TCL_VP_CLIP_DISTANCE_ENABLE_2 (1 << 2) +#define NV50TCL_VP_CLIP_DISTANCE_ENABLE_3 (1 << 3) +#define NV50TCL_VP_CLIP_DISTANCE_ENABLE_4 (1 << 4) +#define NV50TCL_VP_CLIP_DISTANCE_ENABLE_5 (1 << 5) +#define NV50TCL_VP_CLIP_DISTANCE_ENABLE_6 (1 << 6) +#define NV50TCL_VP_CLIP_DISTANCE_ENABLE_7 (1 << 7) +#define NV50TCL_SAMPLECNT_ENABLE 0x00001514 +#define NV50TCL_POINT_SIZE 0x00001518 +#define NV50TCL_POINT_SPRITE_ENABLE 0x00001520 +#define NV50TCL_SAMPLECNT_RESET 0x00001530 +#define NV50TCL_ZETA_ENABLE 0x00001538 +#define NV50TCL_MULTISAMPLE_CTRL 0x0000153c +#define NV50TCL_MULTISAMPLE_CTRL_ALPHA_TO_COVERAGE (1 << 0) +#define NV50TCL_MULTISAMPLE_CTRL_ALPHA_TO_ONE (1 << 4) +#define NV50TCL_NOPERSPECTIVE_BITMAP(x) (0x00001540+((x)*4)) +#define NV50TCL_NOPERSPECTIVE_BITMAP__SIZE 0x00000004 +#define NV50TCL_COND_ADDRESS_HIGH 0x00001550 +#define NV50TCL_COND_ADDRESS_LOW 0x00001554 +#define NV50TCL_COND_MODE 0x00001558 +#define NV50TCL_COND_MODE_NEVER 0x00000000 +#define NV50TCL_COND_MODE_ALWAYS 0x00000001 +#define NV50TCL_COND_MODE_RES 0x00000002 +#define NV50TCL_COND_MODE_NOT_RES_AND_NOT_ID 0x00000003 +#define NV50TCL_COND_MODE_RES_OR_ID 0x00000004 +#define NV50TCL_TSC_ADDRESS_HIGH 0x0000155c +#define NV50TCL_TSC_ADDRESS_LOW 0x00001560 +#define NV50TCL_TSC_LIMIT 0x00001564 +#define NV50TCL_POLYGON_OFFSET_FACTOR 0x0000156c +#define NV50TCL_LINE_SMOOTH_ENABLE 0x00001570 +#define NV50TCL_TIC_ADDRESS_HIGH 0x00001574 +#define NV50TCL_TIC_ADDRESS_LOW 0x00001578 +#define NV50TCL_TIC_LIMIT 0x0000157c +#define NV50TCL_PM_CONTROL(x) (0x00001580+((x)*4)) +#define NV50TCL_PM_CONTROL__SIZE 0x00000004 +#define NV50TCL_PM_CONTROL_UNK0 (1 << 0) +#define NV50TCL_PM_CONTROL_UNK1_SHIFT 4 +#define NV50TCL_PM_CONTROL_UNK1_MASK 0x00000070 +#define NV50TCL_PM_CONTROL_UNK2_SHIFT 8 +#define NV50TCL_PM_CONTROL_UNK2_MASK 0xffffff00 +#define NV50TCL_STENCIL_BACK_ENABLE 0x00001594 +#define NV50TCL_STENCIL_BACK_OP_FAIL 0x00001598 +#define NV50TCL_STENCIL_BACK_OP_FAIL_ZERO 0x00000000 +#define NV50TCL_STENCIL_BACK_OP_FAIL_INVERT 0x0000150a +#define NV50TCL_STENCIL_BACK_OP_FAIL_KEEP 0x00001e00 +#define NV50TCL_STENCIL_BACK_OP_FAIL_REPLACE 0x00001e01 +#define NV50TCL_STENCIL_BACK_OP_FAIL_INCR 0x00001e02 +#define NV50TCL_STENCIL_BACK_OP_FAIL_DECR 0x00001e03 +#define NV50TCL_STENCIL_BACK_OP_FAIL_INCR_WRAP 0x00008507 +#define NV50TCL_STENCIL_BACK_OP_FAIL_DECR_WRAP 0x00008508 +#define NV50TCL_STENCIL_BACK_OP_ZFAIL 0x0000159c +#define NV50TCL_STENCIL_BACK_OP_ZFAIL_ZERO 0x00000000 +#define NV50TCL_STENCIL_BACK_OP_ZFAIL_INVERT 0x0000150a +#define NV50TCL_STENCIL_BACK_OP_ZFAIL_KEEP 0x00001e00 +#define NV50TCL_STENCIL_BACK_OP_ZFAIL_REPLACE 0x00001e01 +#define NV50TCL_STENCIL_BACK_OP_ZFAIL_INCR 0x00001e02 +#define NV50TCL_STENCIL_BACK_OP_ZFAIL_DECR 0x00001e03 +#define NV50TCL_STENCIL_BACK_OP_ZFAIL_INCR_WRAP 0x00008507 +#define NV50TCL_STENCIL_BACK_OP_ZFAIL_DECR_WRAP 0x00008508 +#define NV50TCL_STENCIL_BACK_OP_ZPASS 0x000015a0 +#define NV50TCL_STENCIL_BACK_OP_ZPASS_ZERO 0x00000000 +#define NV50TCL_STENCIL_BACK_OP_ZPASS_INVERT 0x0000150a +#define NV50TCL_STENCIL_BACK_OP_ZPASS_KEEP 0x00001e00 +#define NV50TCL_STENCIL_BACK_OP_ZPASS_REPLACE 0x00001e01 +#define NV50TCL_STENCIL_BACK_OP_ZPASS_INCR 0x00001e02 +#define NV50TCL_STENCIL_BACK_OP_ZPASS_DECR 0x00001e03 +#define NV50TCL_STENCIL_BACK_OP_ZPASS_INCR_WRAP 0x00008507 +#define NV50TCL_STENCIL_BACK_OP_ZPASS_DECR_WRAP 0x00008508 +#define NV50TCL_STENCIL_BACK_FUNC_FUNC 0x000015a4 +#define NV50TCL_STENCIL_BACK_FUNC_FUNC_NEVER 0x00000200 +#define NV50TCL_STENCIL_BACK_FUNC_FUNC_LESS 0x00000201 +#define NV50TCL_STENCIL_BACK_FUNC_FUNC_EQUAL 0x00000202 +#define NV50TCL_STENCIL_BACK_FUNC_FUNC_LEQUAL 0x00000203 +#define NV50TCL_STENCIL_BACK_FUNC_FUNC_GREATER 0x00000204 +#define NV50TCL_STENCIL_BACK_FUNC_FUNC_NOTEQUAL 0x00000205 +#define NV50TCL_STENCIL_BACK_FUNC_FUNC_GEQUAL 0x00000206 +#define NV50TCL_STENCIL_BACK_FUNC_FUNC_ALWAYS 0x00000207 +#define NV50TCL_FRAMEBUFFER_SRGB 0x000015b8 +#define NV50TCL_POLYGON_OFFSET_UNITS 0x000015bc +#define NV50TCL_GP_BUILTIN_RESULT_EN 0x000015cc +#define NV50TCL_GP_BUILTIN_RESULT_EN_VPORT_IDX (1 << 0) +#define NV50TCL_GP_BUILTIN_RESULT_EN_LAYER_IDX (1 << 16) +#define NV50TCL_MULTISAMPLE_SAMPLES_LOG2 0x000015d0 +#define NV50TCL_VERTEX_BEGIN 0x000015dc +#define NV50TCL_VERTEX_BEGIN_POINTS 0x00000000 +#define NV50TCL_VERTEX_BEGIN_LINES 0x00000001 +#define NV50TCL_VERTEX_BEGIN_LINE_LOOP 0x00000002 +#define NV50TCL_VERTEX_BEGIN_LINE_STRIP 0x00000003 +#define NV50TCL_VERTEX_BEGIN_TRIANGLES 0x00000004 +#define NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP 0x00000005 +#define NV50TCL_VERTEX_BEGIN_TRIANGLE_FAN 0x00000006 +#define NV50TCL_VERTEX_BEGIN_QUADS 0x00000007 +#define NV50TCL_VERTEX_BEGIN_QUAD_STRIP 0x00000008 +#define NV50TCL_VERTEX_BEGIN_POLYGON 0x00000009 +#define NV50TCL_VERTEX_BEGIN_LINES_ADJACENCY 0x0000000a +#define NV50TCL_VERTEX_BEGIN_LINE_STRIP_ADJACENCY 0x0000000b +#define NV50TCL_VERTEX_BEGIN_TRIANGLES_ADJACENCY 0x0000000c +#define NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP_ADJACENCY 0x0000000d +#define NV50TCL_VERTEX_END 0x000015e0 +#define NV50TCL_EDGEFLAG_ENABLE 0x000015e4 +#define NV50TCL_VB_ELEMENT_U32 0x000015e8 +#define NV50TCL_VB_ELEMENT_U16_SETUP 0x000015ec +#define NV50TCL_VB_ELEMENT_U16_SETUP_OFFSET_SHIFT 30 +#define NV50TCL_VB_ELEMENT_U16_SETUP_OFFSET_MASK 0xc0000000 +#define NV50TCL_VB_ELEMENT_U16_SETUP_COUNT_SHIFT 0 +#define NV50TCL_VB_ELEMENT_U16_SETUP_COUNT_MASK 0x3fffffff +#define NV50TCL_VB_ELEMENT_U16 0x000015f0 +#define NV50TCL_VB_ELEMENT_U16_I0_SHIFT 0 +#define NV50TCL_VB_ELEMENT_U16_I0_MASK 0x0000ffff +#define NV50TCL_VB_ELEMENT_U16_I1_SHIFT 16 +#define NV50TCL_VB_ELEMENT_U16_I1_MASK 0xffff0000 +#define NV50TCL_VERTEX_DATA 0x00001640 +#define NV50TCL_PRIM_RESTART_ENABLE 0x00001644 +#define NV50TCL_PRIM_RESTART_INDEX 0x00001648 +#define NV50TCL_VP_GP_BUILTIN_ATTR_EN 0x0000164c +#define NV50TCL_VP_GP_BUILTIN_ATTR_EN_VERTEX_ID (1 << 0) +#define NV50TCL_VP_GP_BUILTIN_ATTR_EN_INSTANCE_ID (1 << 4) +#define NV50TCL_VP_GP_BUILTIN_ATTR_EN_PRIMITIVE_ID (1 << 8) +#define NV50TCL_VP_GP_BUILTIN_ATTR_EN_UNK12 (1 << 12) +#define NV50TCL_VP_ATTR_EN_0 0x00001650 +#define NV50TCL_VP_ATTR_EN_0_7_SHIFT 28 +#define NV50TCL_VP_ATTR_EN_0_7_MASK 0xf0000000 +#define NV50TCL_VP_ATTR_EN_0_7_NONE 0x00000000 +#define NV50TCL_VP_ATTR_EN_0_7_XNNN 0x10000000 +#define NV50TCL_VP_ATTR_EN_0_7_NYNN 0x20000000 +#define NV50TCL_VP_ATTR_EN_0_7_XYNN 0x30000000 +#define NV50TCL_VP_ATTR_EN_0_7_NNZN 0x40000000 +#define NV50TCL_VP_ATTR_EN_0_7_XNZN 0x50000000 +#define NV50TCL_VP_ATTR_EN_0_7_NYZN 0x60000000 +#define NV50TCL_VP_ATTR_EN_0_7_XYZN 0x70000000 +#define NV50TCL_VP_ATTR_EN_0_7_NNNW 0x80000000 +#define NV50TCL_VP_ATTR_EN_0_7_XNNW 0x90000000 +#define NV50TCL_VP_ATTR_EN_0_7_NYNW 0xa0000000 +#define NV50TCL_VP_ATTR_EN_0_7_XYNW 0xb0000000 +#define NV50TCL_VP_ATTR_EN_0_7_NNZW 0xc0000000 +#define NV50TCL_VP_ATTR_EN_0_7_XNZW 0xd0000000 +#define NV50TCL_VP_ATTR_EN_0_7_NYZW 0xe0000000 +#define NV50TCL_VP_ATTR_EN_0_7_XYZW 0xf0000000 +#define NV50TCL_VP_ATTR_EN_0_6_SHIFT 24 +#define NV50TCL_VP_ATTR_EN_0_6_MASK 0x0f000000 +#define NV50TCL_VP_ATTR_EN_0_6_NONE 0x00000000 +#define NV50TCL_VP_ATTR_EN_0_6_XNNN 0x01000000 +#define NV50TCL_VP_ATTR_EN_0_6_NYNN 0x02000000 +#define NV50TCL_VP_ATTR_EN_0_6_XYNN 0x03000000 +#define NV50TCL_VP_ATTR_EN_0_6_NNZN 0x04000000 +#define NV50TCL_VP_ATTR_EN_0_6_XNZN 0x05000000 +#define NV50TCL_VP_ATTR_EN_0_6_NYZN 0x06000000 +#define NV50TCL_VP_ATTR_EN_0_6_XYZN 0x07000000 +#define NV50TCL_VP_ATTR_EN_0_6_NNNW 0x08000000 +#define NV50TCL_VP_ATTR_EN_0_6_XNNW 0x09000000 +#define NV50TCL_VP_ATTR_EN_0_6_NYNW 0x0a000000 +#define NV50TCL_VP_ATTR_EN_0_6_XYNW 0x0b000000 +#define NV50TCL_VP_ATTR_EN_0_6_NNZW 0x0c000000 +#define NV50TCL_VP_ATTR_EN_0_6_XNZW 0x0d000000 +#define NV50TCL_VP_ATTR_EN_0_6_NYZW 0x0e000000 +#define NV50TCL_VP_ATTR_EN_0_6_XYZW 0x0f000000 +#define NV50TCL_VP_ATTR_EN_0_5_SHIFT 20 +#define NV50TCL_VP_ATTR_EN_0_5_MASK 0x00f00000 +#define NV50TCL_VP_ATTR_EN_0_5_NONE 0x00000000 +#define NV50TCL_VP_ATTR_EN_0_5_XNNN 0x00100000 +#define NV50TCL_VP_ATTR_EN_0_5_NYNN 0x00200000 +#define NV50TCL_VP_ATTR_EN_0_5_XYNN 0x00300000 +#define NV50TCL_VP_ATTR_EN_0_5_NNZN 0x00400000 +#define NV50TCL_VP_ATTR_EN_0_5_XNZN 0x00500000 +#define NV50TCL_VP_ATTR_EN_0_5_NYZN 0x00600000 +#define NV50TCL_VP_ATTR_EN_0_5_XYZN 0x00700000 +#define NV50TCL_VP_ATTR_EN_0_5_NNNW 0x00800000 +#define NV50TCL_VP_ATTR_EN_0_5_XNNW 0x00900000 +#define NV50TCL_VP_ATTR_EN_0_5_NYNW 0x00a00000 +#define NV50TCL_VP_ATTR_EN_0_5_XYNW 0x00b00000 +#define NV50TCL_VP_ATTR_EN_0_5_NNZW 0x00c00000 +#define NV50TCL_VP_ATTR_EN_0_5_XNZW 0x00d00000 +#define NV50TCL_VP_ATTR_EN_0_5_NYZW 0x00e00000 +#define NV50TCL_VP_ATTR_EN_0_5_XYZW 0x00f00000 +#define NV50TCL_VP_ATTR_EN_0_4_SHIFT 16 +#define NV50TCL_VP_ATTR_EN_0_4_MASK 0x000f0000 +#define NV50TCL_VP_ATTR_EN_0_4_NONE 0x00000000 +#define NV50TCL_VP_ATTR_EN_0_4_XNNN 0x00010000 +#define NV50TCL_VP_ATTR_EN_0_4_NYNN 0x00020000 +#define NV50TCL_VP_ATTR_EN_0_4_XYNN 0x00030000 +#define NV50TCL_VP_ATTR_EN_0_4_NNZN 0x00040000 +#define NV50TCL_VP_ATTR_EN_0_4_XNZN 0x00050000 +#define NV50TCL_VP_ATTR_EN_0_4_NYZN 0x00060000 +#define NV50TCL_VP_ATTR_EN_0_4_XYZN 0x00070000 +#define NV50TCL_VP_ATTR_EN_0_4_NNNW 0x00080000 +#define NV50TCL_VP_ATTR_EN_0_4_XNNW 0x00090000 +#define NV50TCL_VP_ATTR_EN_0_4_NYNW 0x000a0000 +#define NV50TCL_VP_ATTR_EN_0_4_XYNW 0x000b0000 +#define NV50TCL_VP_ATTR_EN_0_4_NNZW 0x000c0000 +#define NV50TCL_VP_ATTR_EN_0_4_XNZW 0x000d0000 +#define NV50TCL_VP_ATTR_EN_0_4_NYZW 0x000e0000 +#define NV50TCL_VP_ATTR_EN_0_4_XYZW 0x000f0000 +#define NV50TCL_VP_ATTR_EN_0_3_SHIFT 12 +#define NV50TCL_VP_ATTR_EN_0_3_MASK 0x0000f000 +#define NV50TCL_VP_ATTR_EN_0_3_NONE 0x00000000 +#define NV50TCL_VP_ATTR_EN_0_3_XNNN 0x00001000 +#define NV50TCL_VP_ATTR_EN_0_3_NYNN 0x00002000 +#define NV50TCL_VP_ATTR_EN_0_3_XYNN 0x00003000 +#define NV50TCL_VP_ATTR_EN_0_3_NNZN 0x00004000 +#define NV50TCL_VP_ATTR_EN_0_3_XNZN 0x00005000 +#define NV50TCL_VP_ATTR_EN_0_3_NYZN 0x00006000 +#define NV50TCL_VP_ATTR_EN_0_3_XYZN 0x00007000 +#define NV50TCL_VP_ATTR_EN_0_3_NNNW 0x00008000 +#define NV50TCL_VP_ATTR_EN_0_3_XNNW 0x00009000 +#define NV50TCL_VP_ATTR_EN_0_3_NYNW 0x0000a000 +#define NV50TCL_VP_ATTR_EN_0_3_XYNW 0x0000b000 +#define NV50TCL_VP_ATTR_EN_0_3_NNZW 0x0000c000 +#define NV50TCL_VP_ATTR_EN_0_3_XNZW 0x0000d000 +#define NV50TCL_VP_ATTR_EN_0_3_NYZW 0x0000e000 +#define NV50TCL_VP_ATTR_EN_0_3_XYZW 0x0000f000 +#define NV50TCL_VP_ATTR_EN_0_2_SHIFT 8 +#define NV50TCL_VP_ATTR_EN_0_2_MASK 0x00000f00 +#define NV50TCL_VP_ATTR_EN_0_2_NONE 0x00000000 +#define NV50TCL_VP_ATTR_EN_0_2_XNNN 0x00000100 +#define NV50TCL_VP_ATTR_EN_0_2_NYNN 0x00000200 +#define NV50TCL_VP_ATTR_EN_0_2_XYNN 0x00000300 +#define NV50TCL_VP_ATTR_EN_0_2_NNZN 0x00000400 +#define NV50TCL_VP_ATTR_EN_0_2_XNZN 0x00000500 +#define NV50TCL_VP_ATTR_EN_0_2_NYZN 0x00000600 +#define NV50TCL_VP_ATTR_EN_0_2_XYZN 0x00000700 +#define NV50TCL_VP_ATTR_EN_0_2_NNNW 0x00000800 +#define NV50TCL_VP_ATTR_EN_0_2_XNNW 0x00000900 +#define NV50TCL_VP_ATTR_EN_0_2_NYNW 0x00000a00 +#define NV50TCL_VP_ATTR_EN_0_2_XYNW 0x00000b00 +#define NV50TCL_VP_ATTR_EN_0_2_NNZW 0x00000c00 +#define NV50TCL_VP_ATTR_EN_0_2_XNZW 0x00000d00 +#define NV50TCL_VP_ATTR_EN_0_2_NYZW 0x00000e00 +#define NV50TCL_VP_ATTR_EN_0_2_XYZW 0x00000f00 +#define NV50TCL_VP_ATTR_EN_0_1_SHIFT 4 +#define NV50TCL_VP_ATTR_EN_0_1_MASK 0x000000f0 +#define NV50TCL_VP_ATTR_EN_0_1_NONE 0x00000000 +#define NV50TCL_VP_ATTR_EN_0_1_XNNN 0x00000010 +#define NV50TCL_VP_ATTR_EN_0_1_NYNN 0x00000020 +#define NV50TCL_VP_ATTR_EN_0_1_XYNN 0x00000030 +#define NV50TCL_VP_ATTR_EN_0_1_NNZN 0x00000040 +#define NV50TCL_VP_ATTR_EN_0_1_XNZN 0x00000050 +#define NV50TCL_VP_ATTR_EN_0_1_NYZN 0x00000060 +#define NV50TCL_VP_ATTR_EN_0_1_XYZN 0x00000070 +#define NV50TCL_VP_ATTR_EN_0_1_NNNW 0x00000080 +#define NV50TCL_VP_ATTR_EN_0_1_XNNW 0x00000090 +#define NV50TCL_VP_ATTR_EN_0_1_NYNW 0x000000a0 +#define NV50TCL_VP_ATTR_EN_0_1_XYNW 0x000000b0 +#define NV50TCL_VP_ATTR_EN_0_1_NNZW 0x000000c0 +#define NV50TCL_VP_ATTR_EN_0_1_XNZW 0x000000d0 +#define NV50TCL_VP_ATTR_EN_0_1_NYZW 0x000000e0 +#define NV50TCL_VP_ATTR_EN_0_1_XYZW 0x000000f0 +#define NV50TCL_VP_ATTR_EN_0_0_SHIFT 0 +#define NV50TCL_VP_ATTR_EN_0_0_MASK 0x0000000f +#define NV50TCL_VP_ATTR_EN_0_0_NONE 0x00000000 +#define NV50TCL_VP_ATTR_EN_0_0_XNNN 0x00000001 +#define NV50TCL_VP_ATTR_EN_0_0_NYNN 0x00000002 +#define NV50TCL_VP_ATTR_EN_0_0_XYNN 0x00000003 +#define NV50TCL_VP_ATTR_EN_0_0_NNZN 0x00000004 +#define NV50TCL_VP_ATTR_EN_0_0_XNZN 0x00000005 +#define NV50TCL_VP_ATTR_EN_0_0_NYZN 0x00000006 +#define NV50TCL_VP_ATTR_EN_0_0_XYZN 0x00000007 +#define NV50TCL_VP_ATTR_EN_0_0_NNNW 0x00000008 +#define NV50TCL_VP_ATTR_EN_0_0_XNNW 0x00000009 +#define NV50TCL_VP_ATTR_EN_0_0_NYNW 0x0000000a +#define NV50TCL_VP_ATTR_EN_0_0_XYNW 0x0000000b +#define NV50TCL_VP_ATTR_EN_0_0_NNZW 0x0000000c +#define NV50TCL_VP_ATTR_EN_0_0_XNZW 0x0000000d +#define NV50TCL_VP_ATTR_EN_0_0_NYZW 0x0000000e +#define NV50TCL_VP_ATTR_EN_0_0_XYZW 0x0000000f +#define NV50TCL_VP_ATTR_EN_1 0x00001654 +#define NV50TCL_VP_ATTR_EN_1_15_SHIFT 28 +#define NV50TCL_VP_ATTR_EN_1_15_MASK 0xf0000000 +#define NV50TCL_VP_ATTR_EN_1_15_NONE 0x00000000 +#define NV50TCL_VP_ATTR_EN_1_15_XNNN 0x10000000 +#define NV50TCL_VP_ATTR_EN_1_15_NYNN 0x20000000 +#define NV50TCL_VP_ATTR_EN_1_15_XYNN 0x30000000 +#define NV50TCL_VP_ATTR_EN_1_15_NNZN 0x40000000 +#define NV50TCL_VP_ATTR_EN_1_15_XNZN 0x50000000 +#define NV50TCL_VP_ATTR_EN_1_15_NYZN 0x60000000 +#define NV50TCL_VP_ATTR_EN_1_15_XYZN 0x70000000 +#define NV50TCL_VP_ATTR_EN_1_15_NNNW 0x80000000 +#define NV50TCL_VP_ATTR_EN_1_15_XNNW 0x90000000 +#define NV50TCL_VP_ATTR_EN_1_15_NYNW 0xa0000000 +#define NV50TCL_VP_ATTR_EN_1_15_XYNW 0xb0000000 +#define NV50TCL_VP_ATTR_EN_1_15_NNZW 0xc0000000 +#define NV50TCL_VP_ATTR_EN_1_15_XNZW 0xd0000000 +#define NV50TCL_VP_ATTR_EN_1_15_NYZW 0xe0000000 +#define NV50TCL_VP_ATTR_EN_1_15_XYZW 0xf0000000 +#define NV50TCL_VP_ATTR_EN_1_14_SHIFT 24 +#define NV50TCL_VP_ATTR_EN_1_14_MASK 0x0f000000 +#define NV50TCL_VP_ATTR_EN_1_14_NONE 0x00000000 +#define NV50TCL_VP_ATTR_EN_1_14_XNNN 0x01000000 +#define NV50TCL_VP_ATTR_EN_1_14_NYNN 0x02000000 +#define NV50TCL_VP_ATTR_EN_1_14_XYNN 0x03000000 +#define NV50TCL_VP_ATTR_EN_1_14_NNZN 0x04000000 +#define NV50TCL_VP_ATTR_EN_1_14_XNZN 0x05000000 +#define NV50TCL_VP_ATTR_EN_1_14_NYZN 0x06000000 +#define NV50TCL_VP_ATTR_EN_1_14_XYZN 0x07000000 +#define NV50TCL_VP_ATTR_EN_1_14_NNNW 0x08000000 +#define NV50TCL_VP_ATTR_EN_1_14_XNNW 0x09000000 +#define NV50TCL_VP_ATTR_EN_1_14_NYNW 0x0a000000 +#define NV50TCL_VP_ATTR_EN_1_14_XYNW 0x0b000000 +#define NV50TCL_VP_ATTR_EN_1_14_NNZW 0x0c000000 +#define NV50TCL_VP_ATTR_EN_1_14_XNZW 0x0d000000 +#define NV50TCL_VP_ATTR_EN_1_14_NYZW 0x0e000000 +#define NV50TCL_VP_ATTR_EN_1_14_XYZW 0x0f000000 +#define NV50TCL_VP_ATTR_EN_1_13_SHIFT 20 +#define NV50TCL_VP_ATTR_EN_1_13_MASK 0x00f00000 +#define NV50TCL_VP_ATTR_EN_1_13_NONE 0x00000000 +#define NV50TCL_VP_ATTR_EN_1_13_XNNN 0x00100000 +#define NV50TCL_VP_ATTR_EN_1_13_NYNN 0x00200000 +#define NV50TCL_VP_ATTR_EN_1_13_XYNN 0x00300000 +#define NV50TCL_VP_ATTR_EN_1_13_NNZN 0x00400000 +#define NV50TCL_VP_ATTR_EN_1_13_XNZN 0x00500000 +#define NV50TCL_VP_ATTR_EN_1_13_NYZN 0x00600000 +#define NV50TCL_VP_ATTR_EN_1_13_XYZN 0x00700000 +#define NV50TCL_VP_ATTR_EN_1_13_NNNW 0x00800000 +#define NV50TCL_VP_ATTR_EN_1_13_XNNW 0x00900000 +#define NV50TCL_VP_ATTR_EN_1_13_NYNW 0x00a00000 +#define NV50TCL_VP_ATTR_EN_1_13_XYNW 0x00b00000 +#define NV50TCL_VP_ATTR_EN_1_13_NNZW 0x00c00000 +#define NV50TCL_VP_ATTR_EN_1_13_XNZW 0x00d00000 +#define NV50TCL_VP_ATTR_EN_1_13_NYZW 0x00e00000 +#define NV50TCL_VP_ATTR_EN_1_13_XYZW 0x00f00000 +#define NV50TCL_VP_ATTR_EN_1_12_SHIFT 16 +#define NV50TCL_VP_ATTR_EN_1_12_MASK 0x000f0000 +#define NV50TCL_VP_ATTR_EN_1_12_NONE 0x00000000 +#define NV50TCL_VP_ATTR_EN_1_12_XNNN 0x00010000 +#define NV50TCL_VP_ATTR_EN_1_12_NYNN 0x00020000 +#define NV50TCL_VP_ATTR_EN_1_12_XYNN 0x00030000 +#define NV50TCL_VP_ATTR_EN_1_12_NNZN 0x00040000 +#define NV50TCL_VP_ATTR_EN_1_12_XNZN 0x00050000 +#define NV50TCL_VP_ATTR_EN_1_12_NYZN 0x00060000 +#define NV50TCL_VP_ATTR_EN_1_12_XYZN 0x00070000 +#define NV50TCL_VP_ATTR_EN_1_12_NNNW 0x00080000 +#define NV50TCL_VP_ATTR_EN_1_12_XNNW 0x00090000 +#define NV50TCL_VP_ATTR_EN_1_12_NYNW 0x000a0000 +#define NV50TCL_VP_ATTR_EN_1_12_XYNW 0x000b0000 +#define NV50TCL_VP_ATTR_EN_1_12_NNZW 0x000c0000 +#define NV50TCL_VP_ATTR_EN_1_12_XNZW 0x000d0000 +#define NV50TCL_VP_ATTR_EN_1_12_NYZW 0x000e0000 +#define NV50TCL_VP_ATTR_EN_1_12_XYZW 0x000f0000 +#define NV50TCL_VP_ATTR_EN_1_11_SHIFT 12 +#define NV50TCL_VP_ATTR_EN_1_11_MASK 0x0000f000 +#define NV50TCL_VP_ATTR_EN_1_11_NONE 0x00000000 +#define NV50TCL_VP_ATTR_EN_1_11_XNNN 0x00001000 +#define NV50TCL_VP_ATTR_EN_1_11_NYNN 0x00002000 +#define NV50TCL_VP_ATTR_EN_1_11_XYNN 0x00003000 +#define NV50TCL_VP_ATTR_EN_1_11_NNZN 0x00004000 +#define NV50TCL_VP_ATTR_EN_1_11_XNZN 0x00005000 +#define NV50TCL_VP_ATTR_EN_1_11_NYZN 0x00006000 +#define NV50TCL_VP_ATTR_EN_1_11_XYZN 0x00007000 +#define NV50TCL_VP_ATTR_EN_1_11_NNNW 0x00008000 +#define NV50TCL_VP_ATTR_EN_1_11_XNNW 0x00009000 +#define NV50TCL_VP_ATTR_EN_1_11_NYNW 0x0000a000 +#define NV50TCL_VP_ATTR_EN_1_11_XYNW 0x0000b000 +#define NV50TCL_VP_ATTR_EN_1_11_NNZW 0x0000c000 +#define NV50TCL_VP_ATTR_EN_1_11_XNZW 0x0000d000 +#define NV50TCL_VP_ATTR_EN_1_11_NYZW 0x0000e000 +#define NV50TCL_VP_ATTR_EN_1_11_XYZW 0x0000f000 +#define NV50TCL_VP_ATTR_EN_1_10_SHIFT 8 +#define NV50TCL_VP_ATTR_EN_1_10_MASK 0x00000f00 +#define NV50TCL_VP_ATTR_EN_1_10_NONE 0x00000000 +#define NV50TCL_VP_ATTR_EN_1_10_XNNN 0x00000100 +#define NV50TCL_VP_ATTR_EN_1_10_NYNN 0x00000200 +#define NV50TCL_VP_ATTR_EN_1_10_XYNN 0x00000300 +#define NV50TCL_VP_ATTR_EN_1_10_NNZN 0x00000400 +#define NV50TCL_VP_ATTR_EN_1_10_XNZN 0x00000500 +#define NV50TCL_VP_ATTR_EN_1_10_NYZN 0x00000600 +#define NV50TCL_VP_ATTR_EN_1_10_XYZN 0x00000700 +#define NV50TCL_VP_ATTR_EN_1_10_NNNW 0x00000800 +#define NV50TCL_VP_ATTR_EN_1_10_XNNW 0x00000900 +#define NV50TCL_VP_ATTR_EN_1_10_NYNW 0x00000a00 +#define NV50TCL_VP_ATTR_EN_1_10_XYNW 0x00000b00 +#define NV50TCL_VP_ATTR_EN_1_10_NNZW 0x00000c00 +#define NV50TCL_VP_ATTR_EN_1_10_XNZW 0x00000d00 +#define NV50TCL_VP_ATTR_EN_1_10_NYZW 0x00000e00 +#define NV50TCL_VP_ATTR_EN_1_10_XYZW 0x00000f00 +#define NV50TCL_VP_ATTR_EN_1_9_SHIFT 4 +#define NV50TCL_VP_ATTR_EN_1_9_MASK 0x000000f0 +#define NV50TCL_VP_ATTR_EN_1_9_NONE 0x00000000 +#define NV50TCL_VP_ATTR_EN_1_9_XNNN 0x00000010 +#define NV50TCL_VP_ATTR_EN_1_9_NYNN 0x00000020 +#define NV50TCL_VP_ATTR_EN_1_9_XYNN 0x00000030 +#define NV50TCL_VP_ATTR_EN_1_9_NNZN 0x00000040 +#define NV50TCL_VP_ATTR_EN_1_9_XNZN 0x00000050 +#define NV50TCL_VP_ATTR_EN_1_9_NYZN 0x00000060 +#define NV50TCL_VP_ATTR_EN_1_9_XYZN 0x00000070 +#define NV50TCL_VP_ATTR_EN_1_9_NNNW 0x00000080 +#define NV50TCL_VP_ATTR_EN_1_9_XNNW 0x00000090 +#define NV50TCL_VP_ATTR_EN_1_9_NYNW 0x000000a0 +#define NV50TCL_VP_ATTR_EN_1_9_XYNW 0x000000b0 +#define NV50TCL_VP_ATTR_EN_1_9_NNZW 0x000000c0 +#define NV50TCL_VP_ATTR_EN_1_9_XNZW 0x000000d0 +#define NV50TCL_VP_ATTR_EN_1_9_NYZW 0x000000e0 +#define NV50TCL_VP_ATTR_EN_1_9_XYZW 0x000000f0 +#define NV50TCL_VP_ATTR_EN_1_8_SHIFT 0 +#define NV50TCL_VP_ATTR_EN_1_8_MASK 0x0000000f +#define NV50TCL_VP_ATTR_EN_1_8_NONE 0x00000000 +#define NV50TCL_VP_ATTR_EN_1_8_XNNN 0x00000001 +#define NV50TCL_VP_ATTR_EN_1_8_NYNN 0x00000002 +#define NV50TCL_VP_ATTR_EN_1_8_XYNN 0x00000003 +#define NV50TCL_VP_ATTR_EN_1_8_NNZN 0x00000004 +#define NV50TCL_VP_ATTR_EN_1_8_XNZN 0x00000005 +#define NV50TCL_VP_ATTR_EN_1_8_NYZN 0x00000006 +#define NV50TCL_VP_ATTR_EN_1_8_XYZN 0x00000007 +#define NV50TCL_VP_ATTR_EN_1_8_NNNW 0x00000008 +#define NV50TCL_VP_ATTR_EN_1_8_XNNW 0x00000009 +#define NV50TCL_VP_ATTR_EN_1_8_NYNW 0x0000000a +#define NV50TCL_VP_ATTR_EN_1_8_XYNW 0x0000000b +#define NV50TCL_VP_ATTR_EN_1_8_NNZW 0x0000000c +#define NV50TCL_VP_ATTR_EN_1_8_XNZW 0x0000000d +#define NV50TCL_VP_ATTR_EN_1_8_NYZW 0x0000000e +#define NV50TCL_VP_ATTR_EN_1_8_XYZW 0x0000000f +#define NV50TCL_POINT_SPRITE_CTRL 0x00001660 +#define NV50TCL_LINE_STIPPLE_ENABLE 0x0000166c +#define NV50TCL_LINE_STIPPLE_PATTERN 0x00001680 +#define NV50TCL_PROVOKING_VERTEX_LAST 0x00001684 +#define NV50TCL_VERTEX_TWO_SIDE_ENABLE 0x00001688 +#define NV50TCL_POLYGON_STIPPLE_ENABLE 0x0000168c +#define NV50TCL_SET_PROGRAM_CB 0x00001694 +#define NV50TCL_SET_PROGRAM_CB_PROGRAM_SHIFT 4 +#define NV50TCL_SET_PROGRAM_CB_PROGRAM_MASK 0x000000f0 +#define NV50TCL_SET_PROGRAM_CB_PROGRAM_VERTEX 0x00000000 +#define NV50TCL_SET_PROGRAM_CB_PROGRAM_GEOMETRY 0x00000020 +#define NV50TCL_SET_PROGRAM_CB_PROGRAM_FRAGMENT 0x00000030 +#define NV50TCL_SET_PROGRAM_CB_INDEX_SHIFT 8 +#define NV50TCL_SET_PROGRAM_CB_INDEX_MASK 0x00000f00 +#define NV50TCL_SET_PROGRAM_CB_BUFFER_SHIFT 12 +#define NV50TCL_SET_PROGRAM_CB_BUFFER_MASK 0x0007f000 +#define NV50TCL_SET_PROGRAM_CB_VALID (1 << 0) +#define NV50TCL_VP_RESULT_MAP_SIZE 0x000016ac +#define NV50TCL_VP_REG_ALLOC_TEMP 0x000016b0 +#define NV50TCL_VP_REG_ALLOC_RESULT 0x000016b8 +#define NV50TCL_VP_RESULT_MAP(x) (0x000016bc+((x)*4)) +#define NV50TCL_VP_RESULT_MAP__SIZE 0x00000010 +#define NV50TCL_VP_RESULT_MAP_0_SHIFT 0 +#define NV50TCL_VP_RESULT_MAP_0_MASK 0x000000ff +#define NV50TCL_VP_RESULT_MAP_1_SHIFT 8 +#define NV50TCL_VP_RESULT_MAP_1_MASK 0x0000ff00 +#define NV50TCL_VP_RESULT_MAP_2_SHIFT 16 +#define NV50TCL_VP_RESULT_MAP_2_MASK 0x00ff0000 +#define NV50TCL_VP_RESULT_MAP_3_SHIFT 24 +#define NV50TCL_VP_RESULT_MAP_3_MASK 0xff000000 +#define NV50TCL_POLYGON_STIPPLE_PATTERN(x) (0x00001700+((x)*4)) +#define NV50TCL_POLYGON_STIPPLE_PATTERN__SIZE 0x00000020 +#define NV50TCL_GP_ENABLE 0x00001798 +#define NV50TCL_GP_REG_ALLOC_TEMP 0x000017a0 +#define NV50TCL_GP_REG_ALLOC_RESULT 0x000017a8 +#define NV50TCL_GP_RESULT_MAP_SIZE 0x000017ac +#define NV50TCL_GP_OUTPUT_PRIMITIVE_TYPE 0x000017b0 +#define NV50TCL_GP_OUTPUT_PRIMITIVE_TYPE_POINTS 0x00000001 +#define NV50TCL_GP_OUTPUT_PRIMITIVE_TYPE_LINE_STRIP 0x00000002 +#define NV50TCL_GP_OUTPUT_PRIMITIVE_TYPE_TRIANGLE_STRIP 0x00000003 +#define NV50TCL_RASTERIZE_ENABLE 0x000017b4 +#define NV50TCL_STRMOUT_ENABLE 0x000017b8 +#define NV50TCL_GP_RESULT_MAP(x) (0x000017fc+((x)*4)) +#define NV50TCL_GP_RESULT_MAP__SIZE 0x00000020 +#define NV50TCL_GP_RESULT_MAP_0_SHIFT 0 +#define NV50TCL_GP_RESULT_MAP_0_MASK 0x000000ff +#define NV50TCL_GP_RESULT_MAP_1_SHIFT 8 +#define NV50TCL_GP_RESULT_MAP_1_MASK 0x0000ff00 +#define NV50TCL_GP_RESULT_MAP_2_SHIFT 16 +#define NV50TCL_GP_RESULT_MAP_2_MASK 0x00ff0000 +#define NV50TCL_GP_RESULT_MAP_3_SHIFT 24 +#define NV50TCL_GP_RESULT_MAP_3_MASK 0xff000000 +#define NV50TCL_MAP_SEMANTIC_0 0x00001904 +#define NV50TCL_MAP_SEMANTIC_0_FFC0_ID_SHIFT 0 +#define NV50TCL_MAP_SEMANTIC_0_FFC0_ID_MASK 0x000000ff +#define NV50TCL_MAP_SEMANTIC_0_BFC0_ID_SHIFT 8 +#define NV50TCL_MAP_SEMANTIC_0_BFC0_ID_MASK 0x0000ff00 +#define NV50TCL_MAP_SEMANTIC_0_COLR_NR_SHIFT 16 +#define NV50TCL_MAP_SEMANTIC_0_COLR_NR_MASK 0x00ff0000 +#define NV50TCL_MAP_SEMANTIC_0_CLMP_EN_SHIFT 24 +#define NV50TCL_MAP_SEMANTIC_0_CLMP_EN_MASK 0xff000000 +#define NV50TCL_MAP_SEMANTIC_1 0x00001908 +#define NV50TCL_MAP_SEMANTIC_1_CLIP_LO_SHIFT 0 +#define NV50TCL_MAP_SEMANTIC_1_CLIP_LO_MASK 0x000000ff +#define NV50TCL_MAP_SEMANTIC_1_CLIP_HI_SHIFT 8 +#define NV50TCL_MAP_SEMANTIC_1_CLIP_HI_MASK 0x0000ff00 +#define NV50TCL_MAP_SEMANTIC_2 0x0000190c +#define NV50TCL_MAP_SEMANTIC_2_LAYER_ID_SHIFT 0 +#define NV50TCL_MAP_SEMANTIC_2_LAYER_ID_MASK 0x000000ff +#define NV50TCL_MAP_SEMANTIC_3 0x00001910 +#define NV50TCL_MAP_SEMANTIC_3_PTSZ_EN (1 << 0) +#define NV50TCL_MAP_SEMANTIC_3_PTSZ_ID_SHIFT 4 +#define NV50TCL_MAP_SEMANTIC_3_PTSZ_ID_MASK 0x00000ff0 +#define NV50TCL_MAP_SEMANTIC_4 0x00001914 +#define NV50TCL_MAP_SEMANTIC_4_PRIM_ID_SHIFT 0 +#define NV50TCL_MAP_SEMANTIC_4_PRIM_ID_MASK 0x000000ff +#define NV50TCL_CULL_FACE_ENABLE 0x00001918 +#define NV50TCL_FRONT_FACE 0x0000191c +#define NV50TCL_FRONT_FACE_CW 0x00000900 +#define NV50TCL_FRONT_FACE_CCW 0x00000901 +#define NV50TCL_CULL_FACE 0x00001920 +#define NV50TCL_CULL_FACE_FRONT 0x00000404 +#define NV50TCL_CULL_FACE_BACK 0x00000405 +#define NV50TCL_CULL_FACE_FRONT_AND_BACK 0x00000408 +#define NV50TCL_VIEWPORT_TRANSFORM_EN 0x0000192c +#define NV50TCL_VIEW_VOLUME_CLIP_CTRL 0x0000193c +#define NV50TCL_VIEWPORT_CLIP_RECTS_EN 0x0000194c +#define NV50TCL_FP_CTRL_UNK196C 0x0000196c +#define NV50TCL_FP_INTERPOLANT_CTRL 0x00001988 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_SHIFT 24 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_MASK 0xff000000 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_NONE 0x00000000 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_XNNN 0x01000000 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_NYNN 0x02000000 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_XYNN 0x03000000 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_NNZN 0x04000000 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_XNZN 0x05000000 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_NYZN 0x06000000 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_XYZN 0x07000000 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_NNNW 0x08000000 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_XNNW 0x09000000 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_NYNW 0x0a000000 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_XYNW 0x0b000000 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_NNZW 0x0c000000 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_XNZW 0x0d000000 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_NYZW 0x0e000000 +#define NV50TCL_FP_INTERPOLANT_CTRL_UMASK_XYZW 0x0f000000 +#define NV50TCL_FP_INTERPOLANT_CTRL_COUNT_NONFLAT_SHIFT 16 +#define NV50TCL_FP_INTERPOLANT_CTRL_COUNT_NONFLAT_MASK 0x00ff0000 +#define NV50TCL_FP_INTERPOLANT_CTRL_OFFSET_SHIFT 8 +#define NV50TCL_FP_INTERPOLANT_CTRL_OFFSET_MASK 0x0000ff00 +#define NV50TCL_FP_INTERPOLANT_CTRL_COUNT_SHIFT 0 +#define NV50TCL_FP_INTERPOLANT_CTRL_COUNT_MASK 0x000000ff +#define NV50TCL_FP_REG_ALLOC_TEMP 0x0000198c +#define NV50TCL_REG_MODE 0x000019a0 +#define NV50TCL_REG_MODE_PACKED 0x00000001 +#define NV50TCL_REG_MODE_STRIPED 0x00000002 +#define NV50TCL_FP_CONTROL 0x000019a8 +#define NV50TCL_FP_CONTROL_MULTIPLE_RESULTS (1 << 0) +#define NV50TCL_FP_CONTROL_EXPORTS_Z (1 << 8) +#define NV50TCL_FP_CONTROL_USES_KIL (1 << 20) +#define NV50TCL_DEPTH_BOUNDS_EN 0x000019bc +#define NV50TCL_LOGIC_OP_ENABLE 0x000019c4 +#define NV50TCL_LOGIC_OP 0x000019c8 +#define NV50TCL_LOGIC_OP_CLEAR 0x00001500 +#define NV50TCL_LOGIC_OP_AND 0x00001501 +#define NV50TCL_LOGIC_OP_AND_REVERSE 0x00001502 +#define NV50TCL_LOGIC_OP_COPY 0x00001503 +#define NV50TCL_LOGIC_OP_AND_INVERTED 0x00001504 +#define NV50TCL_LOGIC_OP_NOOP 0x00001505 +#define NV50TCL_LOGIC_OP_XOR 0x00001506 +#define NV50TCL_LOGIC_OP_OR 0x00001507 +#define NV50TCL_LOGIC_OP_NOR 0x00001508 +#define NV50TCL_LOGIC_OP_EQUIV 0x00001509 +#define NV50TCL_LOGIC_OP_INVERT 0x0000150a +#define NV50TCL_LOGIC_OP_OR_REVERSE 0x0000150b +#define NV50TCL_LOGIC_OP_COPY_INVERTED 0x0000150c +#define NV50TCL_LOGIC_OP_OR_INVERTED 0x0000150d +#define NV50TCL_LOGIC_OP_NAND 0x0000150e +#define NV50TCL_LOGIC_OP_SET 0x0000150f +#define NV50TCL_CLEAR_BUFFERS 0x000019d0 +#define NV50TCL_CLEAR_BUFFERS_Z (1 << 0) +#define NV50TCL_CLEAR_BUFFERS_S (1 << 1) +#define NV50TCL_CLEAR_BUFFERS_R (1 << 2) +#define NV50TCL_CLEAR_BUFFERS_G (1 << 3) +#define NV50TCL_CLEAR_BUFFERS_B (1 << 4) +#define NV50TCL_CLEAR_BUFFERS_A (1 << 5) +#define NV50TCL_CLEAR_BUFFERS_RT_SHIFT 6 +#define NV50TCL_CLEAR_BUFFERS_RT_MASK 0x000003c0 +#define NV50TCL_CLEAR_BUFFERS_LAYER_SHIFT 10 +#define NV50TCL_CLEAR_BUFFERS_LAYER_MASK 0x0007fc00 +#define NV50TCL_COLOR_MASK(x) (0x00001a00+((x)*4)) +#define NV50TCL_COLOR_MASK__SIZE 0x00000008 +#define NV50TCL_COLOR_MASK_R_SHIFT 0 +#define NV50TCL_COLOR_MASK_R_MASK 0x0000000f +#define NV50TCL_COLOR_MASK_G_SHIFT 4 +#define NV50TCL_COLOR_MASK_G_MASK 0x000000f0 +#define NV50TCL_COLOR_MASK_B_SHIFT 8 +#define NV50TCL_COLOR_MASK_B_MASK 0x00000f00 +#define NV50TCL_COLOR_MASK_A_SHIFT 12 +#define NV50TCL_COLOR_MASK_A_MASK 0x0000f000 +#define NV50TCL_STRMOUT_ADDRESS_HIGH(x) (0x00001a80+((x)*16)) +#define NV50TCL_STRMOUT_ADDRESS_HIGH__SIZE 0x00000004 +#define NV50TCL_STRMOUT_ADDRESS_LOW(x) (0x00001a84+((x)*16)) +#define NV50TCL_STRMOUT_ADDRESS_LOW__SIZE 0x00000004 +#define NV50TCL_STRMOUT_NUM_ATTRIBS(x) (0x00001a88+((x)*16)) +#define NV50TCL_STRMOUT_NUM_ATTRIBS__SIZE 0x00000004 +#define NV50TCL_VERTEX_ARRAY_ATTRIB(x) (0x00001ac0+((x)*4)) +#define NV50TCL_VERTEX_ARRAY_ATTRIB__SIZE 0x00000010 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_BUFFER_SHIFT 0 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_BUFFER_MASK 0x0000000f +#define NV50TCL_VERTEX_ARRAY_ATTRIB_CONST (1 << 4) +#define NV50TCL_VERTEX_ARRAY_ATTRIB_OFFSET_SHIFT 5 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_OFFSET_MASK 0x0007ffe0 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_SHIFT 19 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_MASK 0x01f80000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32_32_32_32 0x00080000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32_32_32 0x00100000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16_16_16_16 0x00180000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32_32 0x00200000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16_16_16 0x00280000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8_8_8_8 0x00500000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16_16 0x00780000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_32 0x00900000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8_8_8 0x00980000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8_8 0x00c00000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_16 0x00d80000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_FORMAT_8 0x00e80000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SHIFT 25 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_MASK 0x7e000000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_FLOAT 0x7e000000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UNORM 0x24000000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SNORM 0x12000000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_USCALED 0x5a000000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SSCALED 0x6c000000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UINT 0x48000000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SINT 0x36000000 +#define NV50TCL_VERTEX_ARRAY_ATTRIB_BGRA (1 << 31) +#define NV50TCL_QUERY_ADDRESS_HIGH 0x00001b00 +#define NV50TCL_QUERY_ADDRESS_LOW 0x00001b04 +#define NV50TCL_QUERY_COUNTER 0x00001b08 +#define NV50TCL_QUERY_GET 0x00001b0c + + +#define NV84TCL 0x00008297 + + + +#define NVA0TCL 0x00008397 + + + +#define NVA8TCL 0x00008597 + + + +#define NV50_COMPUTE 0x000050c0 + +#define NV50_COMPUTE_NOP 0x00000100 +#define NV50_COMPUTE_NOTIFY 0x00000104 +#define NV50_COMPUTE_SERIALIZE 0x00000110 +#define NV50_COMPUTE_DMA_NOTIFY 0x00000180 +#define NV50_COMPUTE_DMA_GLOBAL 0x000001a0 +#define NV50_COMPUTE_DMA_QUERY 0x000001a4 +#define NV50_COMPUTE_DMA_LOCAL 0x000001b8 +#define NV50_COMPUTE_DMA_STACK 0x000001bc +#define NV50_COMPUTE_DMA_CODE_CB 0x000001c0 +#define NV50_COMPUTE_DMA_TSC 0x000001c4 +#define NV50_COMPUTE_DMA_TIC 0x000001c8 +#define NV50_COMPUTE_DMA_TEXTURE 0x000001cc +#define NV50_COMPUTE_CP_ADDRESS_HIGH 0x00000210 +#define NV50_COMPUTE_CP_ADDRESS_LOW 0x00000214 +#define NV50_COMPUTE_STACK_ADDRESS_HIGH 0x00000218 +#define NV50_COMPUTE_STACK_ADDRESS_LOW 0x0000021c +#define NV50_COMPUTE_STACK_SIZE_LOG 0x00000220 +#define NV50_COMPUTE_TSC_ADDRESS_HIGH 0x0000022c +#define NV50_COMPUTE_TSC_ADDRESS_LOW 0x00000230 +#define NV50_COMPUTE_TSC_LIMIT 0x00000234 +#define NV50_COMPUTE_CB_ADDR 0x00000238 +#define NV50_COMPUTE_CB_ADDR_ID_SHIFT 8 +#define NV50_COMPUTE_CB_ADDR_ID_MASK 0x003fff00 +#define NV50_COMPUTE_CB_ADDR_BUFFER_SHIFT 0 +#define NV50_COMPUTE_CB_ADDR_BUFFER_MASK 0x0000007f +#define NV50_COMPUTE_CB_DATA(x) (0x0000023c+((x)*4)) +#define NV50_COMPUTE_CB_DATA__SIZE 0x00000010 +#define NV50_COMPUTE_DELAY1 0x00000284 +#define NV50_COMPUTE_WATCHDOG_TIMER 0x00000288 +#define NV50_COMPUTE_DELAY2 0x0000028c +#define NV50_COMPUTE_LOCAL_ADDRESS_HIGH 0x00000294 +#define NV50_COMPUTE_LOCAL_ADDRESS_LOW 0x00000298 +#define NV50_COMPUTE_LOCAL_SIZE_LOG 0x0000029c +#define NV50_COMPUTE_CB_DEF_ADDRESS_HIGH 0x000002a4 +#define NV50_COMPUTE_CB_DEF_ADDRESS_LOW 0x000002a8 +#define NV50_COMPUTE_CB_DEF_SET 0x000002ac +#define NV50_COMPUTE_CB_DEF_SET_SIZE_SHIFT 0 +#define NV50_COMPUTE_CB_DEF_SET_SIZE_MASK 0x0000ffff +#define NV50_COMPUTE_CB_DEF_SET_BUFFER_SHIFT 16 +#define NV50_COMPUTE_CB_DEF_SET_BUFFER_MASK 0x007f0000 +#define NV50_COMPUTE_BLOCK_ALLOC 0x000002b4 +#define NV50_COMPUTE_BLOCK_ALLOC_THREADS_SHIFT 0 +#define NV50_COMPUTE_BLOCK_ALLOC_THREADS_MASK 0x0000ffff +#define NV50_COMPUTE_BLOCK_ALLOC_BARRIERS_SHIFT 16 +#define NV50_COMPUTE_BLOCK_ALLOC_BARRIERS_MASK 0xffff0000 +#define NV50_COMPUTE_LANES32_ENABLE 0x000002b8 +#define NV50_COMPUTE_CP_REG_ALLOC_TEMP 0x000002c0 +#define NV50_COMPUTE_TIC_ADDRESS_HIGH 0x000002c4 +#define NV50_COMPUTE_TIC_ADDRESS_LOW 0x000002c8 +#define NV50_COMPUTE_TIC_LIMIT 0x000002cc +#define NV50_COMPUTE_PM_SET(x) (0x000002d0+((x)*4)) +#define NV50_COMPUTE_PM_SET__SIZE 0x00000004 +#define NV50_COMPUTE_PM_CONTROL(x) (0x000002e0+((x)*4)) +#define NV50_COMPUTE_PM_CONTROL__SIZE 0x00000004 +#define NV50_COMPUTE_PM_CONTROL_UNK0 (1 << 0) +#define NV50_COMPUTE_PM_CONTROL_UNK1_SHIFT 4 +#define NV50_COMPUTE_PM_CONTROL_UNK1_MASK 0x00000070 +#define NV50_COMPUTE_PM_CONTROL_UNK2_SHIFT 8 +#define NV50_COMPUTE_PM_CONTROL_UNK2_MASK 0xffffff00 +#define NV50_COMPUTE_LOCAL_WARPS_LOG_ALLOC 0x000002fc +#define NV50_COMPUTE_LOCAL_WARPS_NO_CLAMP 0x00000300 +#define NV50_COMPUTE_STACK_WARPS_LOG_ALLOC 0x00000304 +#define NV50_COMPUTE_STACK_WARPS_NO_CLAMP 0x00000308 +#define NV50_COMPUTE_QUERY_ADDRESS_HIGH 0x00000310 +#define NV50_COMPUTE_QUERY_ADDRESS_LOW 0x00000314 +#define NV50_COMPUTE_QUERY_COUNTER 0x00000318 +#define NV50_COMPUTE_QUERY_GET 0x0000031c +#define NV50_COMPUTE_COND_ADDRESS_HIGH 0x00000320 +#define NV50_COMPUTE_COND_ADDRESS_LOW 0x00000324 +#define NV50_COMPUTE_COND_MODE 0x00000328 +#define NV50_COMPUTE_COND_MODE_NEVER 0x00000000 +#define NV50_COMPUTE_COND_MODE_ALWAYS 0x00000001 +#define NV50_COMPUTE_COND_MODE_RES 0x00000002 +#define NV50_COMPUTE_COND_MODE_NOT_RES_AND_NOT_ID 0x00000003 +#define NV50_COMPUTE_COND_MODE_RES_OR_ID 0x00000004 +#define NV50_COMPUTE_LAUNCH 0x00000368 +#define NV50_COMPUTE_USER_PARAM_COUNT 0x00000374 +#define NV50_COMPUTE_USER_PARAM_COUNT_COUNT_SHIFT 8 +#define NV50_COMPUTE_USER_PARAM_COUNT_COUNT_MASK 0x0000ff00 +#define NV50_COMPUTE_LINKED_TSC 0x00000378 +#define NV50_COMPUTE_CODE_CB_FLUSH 0x00000380 +#define NV50_COMPUTE_GRIDDIM 0x000003a4 +#define NV50_COMPUTE_GRIDDIM_X_SHIFT 0 +#define NV50_COMPUTE_GRIDDIM_X_MASK 0x0000ffff +#define NV50_COMPUTE_GRIDDIM_Y_SHIFT 16 +#define NV50_COMPUTE_GRIDDIM_Y_MASK 0xffff0000 +#define NV50_COMPUTE_SHARED_SIZE 0x000003a8 +#define NV50_COMPUTE_BLOCKDIM_YX 0x000003ac +#define NV50_COMPUTE_BLOCKDIM_YX_X_SHIFT 0 +#define NV50_COMPUTE_BLOCKDIM_YX_X_MASK 0x0000ffff +#define NV50_COMPUTE_BLOCKDIM_YX_Y_SHIFT 16 +#define NV50_COMPUTE_BLOCKDIM_YX_Y_MASK 0xffff0000 +#define NV50_COMPUTE_BLOCKDIM_Z 0x000003b0 +#define NV50_COMPUTE_CP_START_ID 0x000003b4 +#define NV50_COMPUTE_REG_MODE 0x000003b8 +#define NV50_COMPUTE_REG_MODE_PACKED 0x00000001 +#define NV50_COMPUTE_REG_MODE_STRIPED 0x00000002 +#define NV50_COMPUTE_TEX_LIMITS 0x000003bc +#define NV50_COMPUTE_TEX_LIMITS_SAMPLERS_LOG2_SHIFT 0 +#define NV50_COMPUTE_TEX_LIMITS_SAMPLERS_LOG2_MASK 0x0000000f +#define NV50_COMPUTE_TEX_LIMITS_TEXTURES_LOG2_SHIFT 4 +#define NV50_COMPUTE_TEX_LIMITS_TEXTURES_LOG2_MASK 0x000000f0 +#define NV50_COMPUTE_BIND_TSC 0x000003c0 +#define NV50_COMPUTE_BIND_TSC_VALID (1 << 0) +#define NV50_COMPUTE_BIND_TSC_SAMPLER_SHIFT 4 +#define NV50_COMPUTE_BIND_TSC_SAMPLER_MASK 0x000000f0 +#define NV50_COMPUTE_BIND_TSC_TSC_SHIFT 12 +#define NV50_COMPUTE_BIND_TSC_TSC_MASK 0x001ff000 +#define NV50_COMPUTE_BIND_TIC 0x000003c4 +#define NV50_COMPUTE_BIND_TIC_VALID (1 << 0) +#define NV50_COMPUTE_BIND_TIC_TEXTURE_SHIFT 1 +#define NV50_COMPUTE_BIND_TIC_TEXTURE_MASK 0x000001fe +#define NV50_COMPUTE_BIND_TIC_TIC_SHIFT 9 +#define NV50_COMPUTE_BIND_TIC_TIC_MASK 0x7ffffe00 +#define NV50_COMPUTE_SET_PROGRAM_CB 0x000003c8 +#define NV50_COMPUTE_SET_PROGRAM_CB_INDEX_SHIFT 8 +#define NV50_COMPUTE_SET_PROGRAM_CB_INDEX_MASK 0x00000f00 +#define NV50_COMPUTE_SET_PROGRAM_CB_BUFFER_SHIFT 12 +#define NV50_COMPUTE_SET_PROGRAM_CB_BUFFER_MASK 0x0007f000 +#define NV50_COMPUTE_SET_PROGRAM_CB_VALID (1 << 0) +#define NV50_COMPUTE_GLOBAL_ADDRESS_HIGH(x) (0x00000400+((x)*32)) +#define NV50_COMPUTE_GLOBAL_ADDRESS_HIGH__SIZE 0x00000010 +#define NV50_COMPUTE_GLOBAL_ADDRESS_LOW(x) (0x00000404+((x)*32)) +#define NV50_COMPUTE_GLOBAL_ADDRESS_LOW__SIZE 0x00000010 +#define NV50_COMPUTE_GLOBAL_PITCH(x) (0x00000408+((x)*32)) +#define NV50_COMPUTE_GLOBAL_PITCH__SIZE 0x00000010 +#define NV50_COMPUTE_GLOBAL_LIMIT(x) (0x0000040c+((x)*32)) +#define NV50_COMPUTE_GLOBAL_LIMIT__SIZE 0x00000010 +#define NV50_COMPUTE_GLOBAL_MODE(x) (0x00000410+((x)*32)) +#define NV50_COMPUTE_GLOBAL_MODE__SIZE 0x00000010 +#define NV50_COMPUTE_GLOBAL_MODE_LINEAR (1 << 0) +#define NV50_COMPUTE_GLOBAL_MODE_TILE_MODE_SHIFT 8 +#define NV50_COMPUTE_GLOBAL_MODE_TILE_MODE_MASK 0x00000f00 +#define NV50_COMPUTE_USER_PARAM(x) (0x00000600+((x)*4)) +#define NV50_COMPUTE_USER_PARAM__SIZE 0x00000040 + + +#endif /* NOUVEAU_REG_H */ diff --git a/src/gallium/drivers/nouveau/nouveau_context.c b/src/gallium/drivers/nouveau/nouveau_context.c deleted file mode 100644 index 15174983e7f..00000000000 --- a/src/gallium/drivers/nouveau/nouveau_context.c +++ /dev/null @@ -1,41 +0,0 @@ -#include "pipe/p_defines.h" -#include "pipe/p_context.h" - -#include "nouveau/nouveau_screen.h" -#include "nouveau/nouveau_context.h" - -#include "nouveau/nouveau_bo.h" - -static unsigned int -nouveau_reference_flags(struct nouveau_bo *bo) -{ - uint32_t bo_flags; - int flags = 0; - - bo_flags = nouveau_bo_pending(bo); - if (bo_flags & NOUVEAU_BO_RD) - flags |= PIPE_REFERENCED_FOR_READ; - if (bo_flags & NOUVEAU_BO_WR) - flags |= PIPE_REFERENCED_FOR_WRITE; - - return flags; -} - -unsigned int -nouveau_is_texture_referenced(struct pipe_context *pipe, - struct pipe_texture *pt, - unsigned face, unsigned level) -{ - struct nouveau_miptree *mt = nouveau_miptree(pt); - - return nouveau_reference_flags(mt->bo); -} - -unsigned int -nouveau_is_buffer_referenced(struct pipe_context *pipe, struct pipe_buffer *pb) -{ - struct nouveau_bo *bo = nouveau_bo(pb); - - return nouveau_reference_flags(bo); -} - diff --git a/src/gallium/drivers/nouveau/nouveau_context.h b/src/gallium/drivers/nouveau/nouveau_context.h deleted file mode 100644 index 6a28d40da7b..00000000000 --- a/src/gallium/drivers/nouveau/nouveau_context.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef __NOUVEAU_CONTEXT_H__ -#define __NOUVEAU_CONTEXT_H__ - -unsigned int -nouveau_is_texture_referenced(struct pipe_context *, struct pipe_texture *, - unsigned face, unsigned level); - -unsigned int -nouveau_is_buffer_referenced(struct pipe_context *, struct pipe_buffer *); - -#endif diff --git a/src/gallium/drivers/nouveau/nouveau_screen.c b/src/gallium/drivers/nouveau/nouveau_screen.c index 3c2f771b51e..233a91a2ffd 100644 --- a/src/gallium/drivers/nouveau/nouveau_screen.c +++ b/src/gallium/drivers/nouveau/nouveau_screen.c @@ -4,6 +4,7 @@ #include "util/u_memory.h" #include "util/u_inlines.h" +#include "util/u_format.h" #include <stdio.h> #include <errno.h> @@ -12,6 +13,10 @@ #include "nouveau_winsys.h" #include "nouveau_screen.h" +/* XXX this should go away */ +#include "state_tracker/drm_api.h" +#include "util/u_simple_screen.h" + static const char * nouveau_screen_get_name(struct pipe_screen *pscreen) { @@ -28,56 +33,38 @@ nouveau_screen_get_vendor(struct pipe_screen *pscreen) return "nouveau"; } -static struct pipe_buffer * -nouveau_screen_bo_skel(struct pipe_screen *pscreen, struct nouveau_bo *bo, - unsigned alignment, unsigned usage, unsigned size) -{ - struct pipe_buffer *pb; - - pb = CALLOC(1, sizeof(struct pipe_buffer)+sizeof(struct nouveau_bo *)); - if (!pb) { - nouveau_bo_ref(NULL, &bo); - return NULL; - } - pipe_reference_init(&pb->reference, 1); - pb->screen = pscreen; - pb->alignment = alignment; - pb->usage = usage; - pb->size = size; - *(struct nouveau_bo **)(pb + 1) = bo; - return pb; -} -static struct pipe_buffer * +struct nouveau_bo * nouveau_screen_bo_new(struct pipe_screen *pscreen, unsigned alignment, - unsigned usage, unsigned size) + unsigned usage, unsigned bind, unsigned size) { struct nouveau_device *dev = nouveau_screen(pscreen)->device; struct nouveau_bo *bo = NULL; uint32_t flags = NOUVEAU_BO_MAP, tile_mode = 0, tile_flags = 0; int ret; - if (usage & NOUVEAU_BUFFER_USAGE_TRANSFER) - flags |= NOUVEAU_BO_GART; - else - if (usage & PIPE_BUFFER_USAGE_VERTEX) { - if (pscreen->get_param(pscreen, NOUVEAU_CAP_HW_VTXBUF)) + if (bind & PIPE_BIND_VERTEX_BUFFER) + flags |= nouveau_screen(pscreen)->vertex_buffer_flags; + else if (bind & PIPE_BIND_INDEX_BUFFER) + flags |= nouveau_screen(pscreen)->index_buffer_flags; + + if (bind & (PIPE_BIND_RENDER_TARGET | + PIPE_BIND_DEPTH_STENCIL | + PIPE_BIND_BLIT_SOURCE | + PIPE_BIND_BLIT_DESTINATION | + PIPE_BIND_SCANOUT | + PIPE_BIND_DISPLAY_TARGET | + PIPE_BIND_SAMPLER_VIEW)) + { + /* TODO: this may be incorrect or suboptimal */ + if (!(bind & PIPE_BIND_SCANOUT)) flags |= NOUVEAU_BO_GART; - } else - if (usage & PIPE_BUFFER_USAGE_INDEX) { - if (pscreen->get_param(pscreen, NOUVEAU_CAP_HW_IDXBUF)) - flags |= NOUVEAU_BO_GART; - } - - if (usage & PIPE_BUFFER_USAGE_PIXEL) { - if (usage & NOUVEAU_BUFFER_USAGE_TEXTURE) - flags |= NOUVEAU_BO_GART; - if (!(usage & PIPE_BUFFER_USAGE_CPU_READ_WRITE)) + if (usage != PIPE_USAGE_DYNAMIC) flags |= NOUVEAU_BO_VRAM; if (dev->chipset == 0x50 || dev->chipset >= 0x80) { - if (usage & NOUVEAU_BUFFER_USAGE_ZETA) + if (bind & PIPE_BIND_DEPTH_STENCIL) tile_flags = 0x2800; else tile_flags = 0x7000; @@ -89,10 +76,10 @@ nouveau_screen_bo_new(struct pipe_screen *pscreen, unsigned alignment, if (ret) return NULL; - return nouveau_screen_bo_skel(pscreen, bo, alignment, usage, size); + return bo; } -static struct pipe_buffer * +struct nouveau_bo * nouveau_screen_bo_user(struct pipe_screen *pscreen, void *ptr, unsigned bytes) { struct nouveau_device *dev = nouveau_screen(pscreen)->device; @@ -103,47 +90,17 @@ nouveau_screen_bo_user(struct pipe_screen *pscreen, void *ptr, unsigned bytes) if (ret) return NULL; - return nouveau_screen_bo_skel(pscreen, bo, 0, 0, bytes); -} - -static inline uint32_t -nouveau_screen_map_flags(unsigned pipe) -{ - uint32_t flags = 0; - - if (pipe & PIPE_BUFFER_USAGE_CPU_READ) - flags |= NOUVEAU_BO_RD; - if (pipe & PIPE_BUFFER_USAGE_CPU_WRITE) - flags |= NOUVEAU_BO_WR; - if (pipe & PIPE_BUFFER_USAGE_DISCARD) - flags |= NOUVEAU_BO_INVAL; - if (pipe & PIPE_BUFFER_USAGE_DONTBLOCK) - flags |= NOUVEAU_BO_NOWAIT; - else - if (pipe & 0 /*PIPE_BUFFER_USAGE_UNSYNCHRONIZED*/) - flags |= NOUVEAU_BO_NOSYNC; - - return flags; + return bo; } -static void * -nouveau_screen_bo_map(struct pipe_screen *pscreen, struct pipe_buffer *pb, - unsigned usage) +void * +nouveau_screen_bo_map(struct pipe_screen *pscreen, + struct nouveau_bo *bo, + unsigned map_flags) { - struct nouveau_bo *bo = nouveau_bo(pb); - struct nouveau_screen *nscreen = nouveau_screen(pscreen); int ret; - if (nscreen->pre_pipebuffer_map_callback) { - ret = nscreen->pre_pipebuffer_map_callback(pscreen, pb, usage); - if (ret) { - debug_printf("pre_pipebuffer_map_callback failed %d\n", - ret); - return NULL; - } - } - - ret = nouveau_bo_map(bo, nouveau_screen_map_flags(usage)); + ret = nouveau_bo_map(bo, map_flags); if (ret) { debug_printf("map failed: %d\n", ret); return NULL; @@ -152,24 +109,12 @@ nouveau_screen_bo_map(struct pipe_screen *pscreen, struct pipe_buffer *pb, return bo->map; } -static void * -nouveau_screen_bo_map_range(struct pipe_screen *pscreen, struct pipe_buffer *pb, - unsigned offset, unsigned length, unsigned usage) +void * +nouveau_screen_bo_map_range(struct pipe_screen *pscreen, struct nouveau_bo *bo, + unsigned offset, unsigned length, unsigned flags) { - struct nouveau_bo *bo = nouveau_bo(pb); - struct nouveau_screen *nscreen = nouveau_screen(pscreen); - uint32_t flags = nouveau_screen_map_flags(usage); int ret; - if (nscreen->pre_pipebuffer_map_callback) { - ret = nscreen->pre_pipebuffer_map_callback(pscreen, pb, usage); - if (ret) { - debug_printf("pre_pipebuffer_map_callback failed %d\n", - ret); - return NULL; - } - } - ret = nouveau_bo_map_range(bo, offset, length, flags); if (ret) { nouveau_bo_unmap(bo); @@ -181,30 +126,23 @@ nouveau_screen_bo_map_range(struct pipe_screen *pscreen, struct pipe_buffer *pb, return (char *)bo->map - offset; /* why gallium? why? */ } -static void -nouveau_screen_bo_map_flush(struct pipe_screen *pscreen, struct pipe_buffer *pb, - unsigned offset, unsigned length) +void +nouveau_screen_bo_map_flush_range(struct pipe_screen *pscreen, struct nouveau_bo *bo, + unsigned offset, unsigned length) { - struct nouveau_bo *bo = nouveau_bo(pb); - nouveau_bo_map_flush(bo, offset, length); } -static void -nouveau_screen_bo_unmap(struct pipe_screen *pscreen, struct pipe_buffer *pb) +void +nouveau_screen_bo_unmap(struct pipe_screen *pscreen, struct nouveau_bo *bo) { - struct nouveau_bo *bo = nouveau_bo(pb); - nouveau_bo_unmap(bo); } -static void -nouveau_screen_bo_del(struct pipe_buffer *pb) +void +nouveau_screen_bo_release(struct pipe_screen *pscreen, struct nouveau_bo *bo) { - struct nouveau_bo *bo = nouveau_bo(pb); - nouveau_bo_ref(NULL, &bo); - FREE(pb); } static void @@ -231,6 +169,66 @@ nouveau_screen_fence_finish(struct pipe_screen *screen, return 0; } + +struct nouveau_bo * +nouveau_screen_bo_from_handle(struct pipe_screen *pscreen, + struct winsys_handle *whandle, + unsigned *out_stride) +{ + struct nouveau_device *dev = nouveau_screen(pscreen)->device; + struct nouveau_bo *bo = 0; + int ret; + + ret = nouveau_bo_handle_ref(dev, whandle->handle, &bo); + if (ret) { + debug_printf("%s: ref name 0x%08x failed with %d\n", + __func__, whandle->handle, ret); + return NULL; + } + + *out_stride = whandle->stride; + return bo; +} + + +boolean +nouveau_screen_bo_get_handle(struct pipe_screen *pscreen, + struct nouveau_bo *bo, + unsigned stride, + struct winsys_handle *whandle) +{ + whandle->stride = stride; + + if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) { + return nouveau_bo_handle_get(bo, &whandle->handle) == 0; + } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) { + whandle->handle = bo->handle; + return TRUE; + } else { + return FALSE; + } +} + + +unsigned int +nouveau_reference_flags(struct nouveau_bo *bo) +{ + uint32_t bo_flags; + int flags = 0; + + bo_flags = nouveau_bo_pending(bo); + if (bo_flags & NOUVEAU_BO_RD) + flags |= PIPE_REFERENCED_FOR_READ; + if (bo_flags & NOUVEAU_BO_WR) + flags |= PIPE_REFERENCED_FOR_WRITE; + + return flags; +} + + + + + int nouveau_screen_init(struct nouveau_screen *screen, struct nouveau_device *dev) { @@ -246,14 +244,6 @@ nouveau_screen_init(struct nouveau_screen *screen, struct nouveau_device *dev) pscreen->get_name = nouveau_screen_get_name; pscreen->get_vendor = nouveau_screen_get_vendor; - pscreen->buffer_create = nouveau_screen_bo_new; - pscreen->user_buffer_create = nouveau_screen_bo_user; - pscreen->buffer_map = nouveau_screen_bo_map; - pscreen->buffer_map_range = nouveau_screen_bo_map_range; - pscreen->buffer_flush_mapped_range = nouveau_screen_bo_map_flush; - pscreen->buffer_unmap = nouveau_screen_bo_unmap; - pscreen->buffer_destroy = nouveau_screen_bo_del; - pscreen->fence_reference = nouveau_screen_fence_ref; pscreen->fence_signalled = nouveau_screen_fence_signalled; pscreen->fence_finish = nouveau_screen_fence_finish; diff --git a/src/gallium/drivers/nouveau/nouveau_screen.h b/src/gallium/drivers/nouveau/nouveau_screen.h index a7927d88dfc..8eacdff0358 100644 --- a/src/gallium/drivers/nouveau/nouveau_screen.h +++ b/src/gallium/drivers/nouveau/nouveau_screen.h @@ -1,13 +1,17 @@ #ifndef __NOUVEAU_SCREEN_H__ #define __NOUVEAU_SCREEN_H__ +#include "pipe/p_screen.h" + struct nouveau_screen { struct pipe_screen base; struct nouveau_device *device; struct nouveau_channel *channel; - int (*pre_pipebuffer_map_callback) (struct pipe_screen *pscreen, - struct pipe_buffer *pb, unsigned usage); + /* note that OpenGL doesn't distinguish between these, so + * these almost always should be set to the same value */ + unsigned vertex_buffer_flags; + unsigned index_buffer_flags; }; static inline struct nouveau_screen * @@ -16,24 +20,63 @@ nouveau_screen(struct pipe_screen *pscreen) return (struct nouveau_screen *)pscreen; } -static inline struct nouveau_bo * -nouveau_bo(struct pipe_buffer *pb) -{ - return pb ? *(struct nouveau_bo **)(pb + 1) : NULL; -} + + +/* Not really sure if this is needed, or whether the individual + * drivers are happy to talk to the bo functions themselves. In a way + * this is what we'd expect from a regular winsys interface. + */ +struct nouveau_bo * +nouveau_screen_bo_new(struct pipe_screen *pscreen, unsigned alignment, + unsigned usage, unsigned bind, unsigned size); +struct nouveau_bo * +nouveau_screen_bo_user(struct pipe_screen *pscreen, void *ptr, unsigned bytes); +void * +nouveau_screen_bo_map(struct pipe_screen *pscreen, + struct nouveau_bo *pb, + unsigned usage); +void * +nouveau_screen_bo_map_range(struct pipe_screen *pscreen, struct nouveau_bo *bo, + unsigned offset, unsigned length, unsigned usage); +void +nouveau_screen_bo_map_flush_range(struct pipe_screen *pscreen, struct nouveau_bo *bo, + unsigned offset, unsigned length); +void +nouveau_screen_bo_unmap(struct pipe_screen *pscreen, struct nouveau_bo *bo); +void +nouveau_screen_bo_release(struct pipe_screen *pscreen, struct nouveau_bo *bo); + +boolean +nouveau_screen_bo_get_handle(struct pipe_screen *pscreen, + struct nouveau_bo *bo, + unsigned stride, + struct winsys_handle *whandle); +struct nouveau_bo * +nouveau_screen_bo_from_handle(struct pipe_screen *pscreen, + struct winsys_handle *whandle, + unsigned *out_stride); + +unsigned int +nouveau_reference_flags(struct nouveau_bo *bo); + + int nouveau_screen_init(struct nouveau_screen *, struct nouveau_device *); void nouveau_screen_fini(struct nouveau_screen *); -struct nouveau_miptree { - struct pipe_texture base; - struct nouveau_bo *bo; -}; -static inline struct nouveau_miptree * -nouveau_miptree(struct pipe_texture *pt) + + +static __inline__ unsigned +RING_3D(unsigned mthd, unsigned size) +{ + return (7 << 13) | (size << 18) | mthd; +} + +static __inline__ unsigned +RING_3D_NI(unsigned mthd, unsigned size) { - return (struct nouveau_miptree *)pt; + return 0x40000000 | (7 << 13) | (size << 18) | mthd; } #endif diff --git a/src/gallium/drivers/nouveau/nouveau_statebuf.h b/src/gallium/drivers/nouveau/nouveau_statebuf.h new file mode 100644 index 00000000000..dcffdd91154 --- /dev/null +++ b/src/gallium/drivers/nouveau/nouveau_statebuf.h @@ -0,0 +1,27 @@ +#ifndef __NOUVEAU_STATEBUF_H__ +#define __NOUVEAU_STATEBUF_H__ + +/* state buffers: lightweight state objects interface */ +/* relocations are not supported, but Gallium CSOs don't require them */ + +struct nouveau_statebuf_builder +{ + uint32_t* p; +#ifdef DEBUG + uint32_t* pend; +#endif +}; + +#ifdef DEBUG +#define sb_init(var) {var, var + sizeof(var) / sizeof((var)[0])} +#define sb_data(sb, v) do {assert((sb).p != (sb).pend); *(sb).p++ = (v);} while(0) +#else +#define sb_init(var) {var} +#define sb_data(sb, v) *(sb).p++ = (v) +#endif + +#define sb_method(sb, v, n) sb_data(sb, RING_3D(v, n)); + +#define sb_len(sb, var) ((sb).p - (var)) +#define sb_emit(chan, sb_buf, sb_len) do {WAIT_RING((chan), (sb_len)); OUT_RINGp((chan), (sb_buf), (sb_len)); } while(0) +#endif diff --git a/src/gallium/drivers/nouveau/nouveau_stateobj.h b/src/gallium/drivers/nouveau/nouveau_stateobj.h index 5357e981de3..f5c1c5ca2c3 100644 --- a/src/gallium/drivers/nouveau/nouveau_stateobj.h +++ b/src/gallium/drivers/nouveau/nouveau_stateobj.h @@ -271,7 +271,6 @@ so_emit(struct nouveau_channel *chan, struct nouveau_stateobj *so) static INLINE void so_emit_reloc_markers(struct nouveau_channel *chan, struct nouveau_stateobj *so) { - struct nouveau_grobj *gr = NULL; unsigned i; int ret = 0; @@ -289,14 +288,11 @@ so_emit_reloc_markers(struct nouveau_channel *chan, struct nouveau_stateobj *so) } #endif /* DEBUG_NOUVEAU_STATEOBJ */ - /* The object needs to be bound and the system must know the - * subchannel is being used. Otherwise it will discard it. + /* We don't need to autobind, since there are enough subchannels + * for all objects we use. If this is changed, account for the extra + * space in callers of this function. */ - if (gr != r->gr) { - BEGIN_RING(chan, r->gr, 0x100, 1); - OUT_RING(chan, 0); - gr = r->gr; - } + assert(r->gr->bound != NOUVEAU_GROBJ_UNBOUND); /* Some relocs really don't like to be hammered, * NOUVEAU_BO_DUMMY makes sure it only diff --git a/src/gallium/drivers/nouveau/nouveau_util.h b/src/gallium/drivers/nouveau/nouveau_util.h index a10114beab9..ed6e643785d 100644 --- a/src/gallium/drivers/nouveau/nouveau_util.h +++ b/src/gallium/drivers/nouveau/nouveau_util.h @@ -33,7 +33,7 @@ nouveau_vbuf_split(unsigned remaining, unsigned overhead, unsigned vpp, max = max - (max % 3); break; case PIPE_PRIM_QUADS: - max = max & 3; + max = max & ~3; break; case PIPE_PRIM_LINE_LOOP: case PIPE_PRIM_LINE_STRIP: @@ -88,4 +88,104 @@ static INLINE unsigned log2i(unsigned i) return r; } +struct u_split_prim { + void *priv; + void (*emit)(void *priv, unsigned start, unsigned count); + void (*edge)(void *priv, boolean enabled); + + unsigned mode; + unsigned start; + unsigned p_start; + unsigned p_end; + + uint repeat_first:1; + uint close_first:1; + uint edgeflag_off:1; +}; + +static inline void +u_split_prim_init(struct u_split_prim *s, + unsigned mode, unsigned start, unsigned count) +{ + if (mode == PIPE_PRIM_LINE_LOOP) { + s->mode = PIPE_PRIM_LINE_STRIP; + s->close_first = 1; + } else { + s->mode = mode; + s->close_first = 0; + } + s->start = start; + s->p_start = start; + s->p_end = start + count; + s->edgeflag_off = 0; + s->repeat_first = 0; +} + +static INLINE boolean +u_split_prim_next(struct u_split_prim *s, unsigned max_verts) +{ + int repeat = 0; + + if (s->repeat_first) { + s->emit(s->priv, s->start, 1); + max_verts--; + if (s->edgeflag_off) { + s->edge(s->priv, TRUE); + s->edgeflag_off = FALSE; + } + } + + if (s->p_start + s->close_first + max_verts >= s->p_end) { + s->emit(s->priv, s->p_start, s->p_end - s->p_start); + if (s->close_first) + s->emit(s->priv, s->start, 1); + return TRUE; + } + + switch (s->mode) { + case PIPE_PRIM_LINES: + max_verts &= ~1; + break; + case PIPE_PRIM_LINE_STRIP: + repeat = 1; + break; + case PIPE_PRIM_POLYGON: + max_verts--; + s->emit(s->priv, s->p_start, max_verts); + s->edge(s->priv, FALSE); + s->emit(s->priv, s->p_start + max_verts, 1); + s->p_start += max_verts; + s->repeat_first = TRUE; + s->edgeflag_off = TRUE; + return FALSE; + case PIPE_PRIM_TRIANGLES: + max_verts = max_verts - (max_verts % 3); + break; + case PIPE_PRIM_TRIANGLE_STRIP: + /* to ensure winding stays correct, always split + * on an even number of generated triangles + */ + max_verts = max_verts & ~1; + repeat = 2; + break; + case PIPE_PRIM_TRIANGLE_FAN: + s->repeat_first = TRUE; + repeat = 1; + break; + case PIPE_PRIM_QUADS: + max_verts &= ~3; + break; + case PIPE_PRIM_QUAD_STRIP: + max_verts &= ~1; + repeat = 2; + break; + default: + break; + } + + s->emit (s->priv, s->p_start, max_verts); + s->p_start += (max_verts - repeat); + return FALSE; +} + #endif diff --git a/src/gallium/drivers/nouveau/nouveau_winsys.h b/src/gallium/drivers/nouveau/nouveau_winsys.h index af9ddd558c8..cd7da9977d8 100644 --- a/src/gallium/drivers/nouveau/nouveau_winsys.h +++ b/src/gallium/drivers/nouveau/nouveau_winsys.h @@ -2,7 +2,6 @@ #define NOUVEAU_WINSYS_H #include <stdint.h> -#include "util/u_simple_screen.h" #include "pipe/p_defines.h" #include "nouveau/nouveau_bo.h" @@ -14,23 +13,28 @@ #include "nouveau/nouveau_resource.h" #include "nouveau/nouveau_pushbuf.h" -#define NOUVEAU_CAP_HW_VTXBUF (0xbeef0000) -#define NOUVEAU_CAP_HW_IDXBUF (0xbeef0001) - -#define NOUVEAU_TEXTURE_USAGE_LINEAR (1 << 16) - -#define NOUVEAU_BUFFER_USAGE_TEXTURE (1 << 16) -#define NOUVEAU_BUFFER_USAGE_ZETA (1 << 17) -#define NOUVEAU_BUFFER_USAGE_TRANSFER (1 << 18) - -/* use along with GPU_WRITE for 2D-only writes */ -#define NOUVEAU_BUFFER_USAGE_NO_RENDER (1 << 19) - -extern struct pipe_screen * -nv30_screen_create(struct pipe_winsys *ws, struct nouveau_device *); +static inline uint32_t +nouveau_screen_transfer_flags(unsigned pipe) +{ + uint32_t flags = 0; + + if (pipe & PIPE_TRANSFER_READ) + flags |= NOUVEAU_BO_RD; + if (pipe & PIPE_TRANSFER_WRITE) + flags |= NOUVEAU_BO_WR; + if (pipe & PIPE_TRANSFER_DISCARD) + flags |= NOUVEAU_BO_INVAL; + if (pipe & PIPE_TRANSFER_DONTBLOCK) + flags |= NOUVEAU_BO_NOWAIT; + else + if (pipe & PIPE_TRANSFER_UNSYNCHRONIZED) + flags |= NOUVEAU_BO_NOSYNC; + + return flags; +} extern struct pipe_screen * -nv40_screen_create(struct pipe_winsys *ws, struct nouveau_device *); +nvfx_screen_create(struct pipe_winsys *ws, struct nouveau_device *); extern struct pipe_screen * nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *); diff --git a/src/gallium/drivers/nv30/Makefile b/src/gallium/drivers/nv30/Makefile deleted file mode 100644 index 364c80d8f3e..00000000000 --- a/src/gallium/drivers/nv30/Makefile +++ /dev/null @@ -1,29 +0,0 @@ -TOP = ../../../.. -include $(TOP)/configs/current - -LIBNAME = nv30 - -C_SOURCES = \ - nv30_clear.c \ - nv30_context.c \ - nv30_draw.c \ - nv30_fragprog.c \ - nv30_fragtex.c \ - nv30_miptree.c \ - nv30_query.c \ - nv30_screen.c \ - nv30_state.c \ - nv30_state_blend.c \ - nv30_state_emit.c \ - nv30_state_fb.c \ - nv30_state_rasterizer.c \ - nv30_state_scissor.c \ - nv30_state_stipple.c \ - nv30_state_viewport.c \ - nv30_state_zsa.c \ - nv30_surface.c \ - nv30_transfer.c \ - nv30_vbo.c \ - nv30_vertprog.c - -include ../../Makefile.template diff --git a/src/gallium/drivers/nv30/nv30_clear.c b/src/gallium/drivers/nv30/nv30_clear.c deleted file mode 100644 index c4ba9266647..00000000000 --- a/src/gallium/drivers/nv30/nv30_clear.c +++ /dev/null @@ -1,14 +0,0 @@ -#include "pipe/p_context.h" -#include "pipe/p_defines.h" -#include "pipe/p_state.h" -#include "util/u_clear.h" - -#include "nv30_context.h" - -void -nv30_clear(struct pipe_context *pipe, unsigned buffers, - const float *rgba, double depth, unsigned stencil) -{ - util_clear(pipe, &nv30_context(pipe)->framebuffer, buffers, rgba, depth, - stencil); -} diff --git a/src/gallium/drivers/nv30/nv30_context.c b/src/gallium/drivers/nv30/nv30_context.c deleted file mode 100644 index 279b74445ca..00000000000 --- a/src/gallium/drivers/nv30/nv30_context.c +++ /dev/null @@ -1,87 +0,0 @@ -#include "draw/draw_context.h" -#include "pipe/p_defines.h" - -#include "nv30_context.h" -#include "nv30_screen.h" - -static void -nv30_flush(struct pipe_context *pipe, unsigned flags, - struct pipe_fence_handle **fence) -{ - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_screen *screen = nv30->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; - - if (flags & PIPE_FLUSH_TEXTURE_CACHE) { - BEGIN_RING(chan, rankine, 0x1fd8, 1); - OUT_RING (chan, 2); - BEGIN_RING(chan, rankine, 0x1fd8, 1); - OUT_RING (chan, 1); - } - - FIRE_RING(chan); - if (fence) - *fence = NULL; -} - -static void -nv30_destroy(struct pipe_context *pipe) -{ - struct nv30_context *nv30 = nv30_context(pipe); - unsigned i; - - for (i = 0; i < NV30_STATE_MAX; i++) { - if (nv30->state.hw[i]) - so_ref(NULL, &nv30->state.hw[i]); - } - - if (nv30->draw) - draw_destroy(nv30->draw); - FREE(nv30); -} - -struct pipe_context * -nv30_create(struct pipe_screen *pscreen, void *priv) -{ - struct nv30_screen *screen = nv30_screen(pscreen); - struct pipe_winsys *ws = pscreen->winsys; - struct nv30_context *nv30; - struct nouveau_winsys *nvws = screen->nvws; - - nv30 = CALLOC(1, sizeof(struct nv30_context)); - if (!nv30) - return NULL; - nv30->screen = screen; - - nv30->nvws = nvws; - - nv30->pipe.winsys = ws; - nv30->pipe.screen = pscreen; - nv30->pipe.priv = priv; - nv30->pipe.destroy = nv30_destroy; - nv30->pipe.draw_arrays = nv30_draw_arrays; - nv30->pipe.draw_elements = nv30_draw_elements; - nv30->pipe.clear = nv30_clear; - nv30->pipe.flush = nv30_flush; - - nv30->pipe.is_texture_referenced = nouveau_is_texture_referenced; - nv30->pipe.is_buffer_referenced = nouveau_is_buffer_referenced; - - screen->base.channel->user_private = nv30; - screen->base.channel->flush_notify = nv30_state_flush_notify; - - nv30_init_query_functions(nv30); - nv30_init_surface_functions(nv30); - nv30_init_state_functions(nv30); - - /* Create, configure, and install fallback swtnl path */ - nv30->draw = draw_create(); - draw_wide_point_threshold(nv30->draw, 9999999.0); - draw_wide_line_threshold(nv30->draw, 9999999.0); - draw_enable_line_stipple(nv30->draw, FALSE); - draw_enable_point_sprites(nv30->draw, FALSE); - draw_set_rasterize_stage(nv30->draw, nv30_draw_render_stage(nv30)); - - return &nv30->pipe; -} diff --git a/src/gallium/drivers/nv30/nv30_context.h b/src/gallium/drivers/nv30/nv30_context.h deleted file mode 100644 index ea259aadf35..00000000000 --- a/src/gallium/drivers/nv30/nv30_context.h +++ /dev/null @@ -1,218 +0,0 @@ -#ifndef __NV30_CONTEXT_H__ -#define __NV30_CONTEXT_H__ - -#include <stdio.h> - -#include "pipe/p_context.h" -#include "pipe/p_defines.h" -#include "pipe/p_state.h" -#include "pipe/p_compiler.h" - -#include "util/u_memory.h" -#include "util/u_math.h" -#include "util/u_inlines.h" - -#include "draw/draw_vertex.h" - -#include "nouveau/nouveau_winsys.h" -#include "nouveau/nouveau_gldefs.h" -#include "nouveau/nouveau_context.h" -#include "nouveau/nouveau_stateobj.h" - -#include "nv30_state.h" - -#define NOUVEAU_ERR(fmt, args...) \ - fprintf(stderr, "%s:%d - "fmt, __func__, __LINE__, ##args); -#define NOUVEAU_MSG(fmt, args...) \ - fprintf(stderr, "nouveau: "fmt, ##args); - -enum nv30_state_index { - NV30_STATE_FB = 0, - NV30_STATE_VIEWPORT = 1, - NV30_STATE_BLEND = 2, - NV30_STATE_RAST = 3, - NV30_STATE_ZSA = 4, - NV30_STATE_BCOL = 5, - NV30_STATE_CLIP = 6, - NV30_STATE_SCISSOR = 7, - NV30_STATE_STIPPLE = 8, - NV30_STATE_FRAGPROG = 9, - NV30_STATE_VERTPROG = 10, - NV30_STATE_FRAGTEX0 = 11, - NV30_STATE_FRAGTEX1 = 12, - NV30_STATE_FRAGTEX2 = 13, - NV30_STATE_FRAGTEX3 = 14, - NV30_STATE_FRAGTEX4 = 15, - NV30_STATE_FRAGTEX5 = 16, - NV30_STATE_FRAGTEX6 = 17, - NV30_STATE_FRAGTEX7 = 18, - NV30_STATE_FRAGTEX8 = 19, - NV30_STATE_FRAGTEX9 = 20, - NV30_STATE_FRAGTEX10 = 21, - NV30_STATE_FRAGTEX11 = 22, - NV30_STATE_FRAGTEX12 = 23, - NV30_STATE_FRAGTEX13 = 24, - NV30_STATE_FRAGTEX14 = 25, - NV30_STATE_FRAGTEX15 = 26, - NV30_STATE_VERTTEX0 = 27, - NV30_STATE_VERTTEX1 = 28, - NV30_STATE_VERTTEX2 = 29, - NV30_STATE_VERTTEX3 = 30, - NV30_STATE_VTXBUF = 31, - NV30_STATE_VTXFMT = 32, - NV30_STATE_VTXATTR = 33, - NV30_STATE_SR = 34, - NV30_STATE_MAX = 35 -}; - -#include "nv30_screen.h" - -#define NV30_NEW_BLEND (1 << 0) -#define NV30_NEW_RAST (1 << 1) -#define NV30_NEW_ZSA (1 << 2) -#define NV30_NEW_SAMPLER (1 << 3) -#define NV30_NEW_FB (1 << 4) -#define NV30_NEW_STIPPLE (1 << 5) -#define NV30_NEW_SCISSOR (1 << 6) -#define NV30_NEW_VIEWPORT (1 << 7) -#define NV30_NEW_BCOL (1 << 8) -#define NV30_NEW_VERTPROG (1 << 9) -#define NV30_NEW_FRAGPROG (1 << 10) -#define NV30_NEW_ARRAYS (1 << 11) -#define NV30_NEW_UCP (1 << 12) -#define NV30_NEW_SR (1 << 13) - -struct nv30_rasterizer_state { - struct pipe_rasterizer_state pipe; - struct nouveau_stateobj *so; -}; - -struct nv30_zsa_state { - struct pipe_depth_stencil_alpha_state pipe; - struct nouveau_stateobj *so; -}; - -struct nv30_blend_state { - struct pipe_blend_state pipe; - struct nouveau_stateobj *so; -}; - - -struct nv30_state { - unsigned scissor_enabled; - unsigned stipple_enabled; - unsigned fp_samplers; - - uint64_t dirty; - struct nouveau_stateobj *hw[NV30_STATE_MAX]; -}; - -struct nv30_context { - struct pipe_context pipe; - - struct nouveau_winsys *nvws; - struct nv30_screen *screen; - - struct draw_context *draw; - - /* HW state derived from pipe states */ - struct nv30_state state; - - /* Context state */ - unsigned dirty; - struct pipe_scissor_state scissor; - unsigned stipple[32]; - struct nv30_vertex_program *vertprog; - struct nv30_fragment_program *fragprog; - struct pipe_buffer *constbuf[PIPE_SHADER_TYPES]; - unsigned constbuf_nr[PIPE_SHADER_TYPES]; - struct nv30_rasterizer_state *rasterizer; - struct nv30_zsa_state *zsa; - struct nv30_blend_state *blend; - struct pipe_blend_color blend_colour; - struct pipe_stencil_ref stencil_ref; - struct pipe_viewport_state viewport; - struct pipe_framebuffer_state framebuffer; - struct pipe_buffer *idxbuf; - unsigned idxbuf_format; - struct nv30_sampler_state *tex_sampler[PIPE_MAX_SAMPLERS]; - struct nv30_miptree *tex_miptree[PIPE_MAX_SAMPLERS]; - unsigned nr_samplers; - unsigned nr_textures; - unsigned dirty_samplers; - struct pipe_vertex_buffer vtxbuf[PIPE_MAX_ATTRIBS]; - unsigned vtxbuf_nr; - struct pipe_vertex_element vtxelt[PIPE_MAX_ATTRIBS]; - unsigned vtxelt_nr; -}; - -static INLINE struct nv30_context * -nv30_context(struct pipe_context *pipe) -{ - return (struct nv30_context *)pipe; -} - -struct nv30_state_entry { - boolean (*validate)(struct nv30_context *nv30); - struct { - unsigned pipe; - unsigned hw; - } dirty; -}; - -extern void nv30_init_state_functions(struct nv30_context *nv30); -extern void nv30_init_surface_functions(struct nv30_context *nv30); -extern void nv30_init_query_functions(struct nv30_context *nv30); - -extern void nv30_screen_init_miptree_functions(struct pipe_screen *pscreen); - -/* nv30_draw.c */ -extern struct draw_stage *nv30_draw_render_stage(struct nv30_context *nv30); - -/* nv30_vertprog.c */ -extern void nv30_vertprog_destroy(struct nv30_context *, - struct nv30_vertex_program *); - -/* nv30_fragprog.c */ -extern void nv30_fragprog_destroy(struct nv30_context *, - struct nv30_fragment_program *); - -/* nv30_fragtex.c */ -extern void nv30_fragtex_bind(struct nv30_context *); - -/* nv30_state.c and friends */ -extern boolean nv30_state_validate(struct nv30_context *nv30); -extern void nv30_state_emit(struct nv30_context *nv30); -extern void nv30_state_flush_notify(struct nouveau_channel *chan); -extern struct nv30_state_entry nv30_state_rasterizer; -extern struct nv30_state_entry nv30_state_scissor; -extern struct nv30_state_entry nv30_state_stipple; -extern struct nv30_state_entry nv30_state_fragprog; -extern struct nv30_state_entry nv30_state_vertprog; -extern struct nv30_state_entry nv30_state_blend; -extern struct nv30_state_entry nv30_state_blend_colour; -extern struct nv30_state_entry nv30_state_zsa; -extern struct nv30_state_entry nv30_state_viewport; -extern struct nv30_state_entry nv30_state_framebuffer; -extern struct nv30_state_entry nv30_state_fragtex; -extern struct nv30_state_entry nv30_state_vbo; -extern struct nv30_state_entry nv30_state_sr; - -/* nv30_vbo.c */ -extern void nv30_draw_arrays(struct pipe_context *, unsigned mode, - unsigned start, unsigned count); -extern void nv30_draw_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, - unsigned indexSize, - unsigned mode, unsigned start, - unsigned count); - -/* nv30_clear.c */ -extern void nv30_clear(struct pipe_context *pipe, unsigned buffers, - const float *rgba, double depth, unsigned stencil); - -/* nv30_context.c */ -struct pipe_context * -nv30_create(struct pipe_screen *pscreen, void *priv); - -#endif diff --git a/src/gallium/drivers/nv30/nv30_draw.c b/src/gallium/drivers/nv30/nv30_draw.c deleted file mode 100644 index 74fc138c051..00000000000 --- a/src/gallium/drivers/nv30/nv30_draw.c +++ /dev/null @@ -1,61 +0,0 @@ -#include "draw/draw_pipe.h" - -#include "nv30_context.h" - -struct nv30_draw_stage { - struct draw_stage draw; - struct nv30_context *nv30; -}; - -static void -nv30_draw_point(struct draw_stage *draw, struct prim_header *prim) -{ - NOUVEAU_ERR("\n"); -} - -static void -nv30_draw_line(struct draw_stage *draw, struct prim_header *prim) -{ - NOUVEAU_ERR("\n"); -} - -static void -nv30_draw_tri(struct draw_stage *draw, struct prim_header *prim) -{ - NOUVEAU_ERR("\n"); -} - -static void -nv30_draw_flush(struct draw_stage *draw, unsigned flags) -{ -} - -static void -nv30_draw_reset_stipple_counter(struct draw_stage *draw) -{ - NOUVEAU_ERR("\n"); -} - -static void -nv30_draw_destroy(struct draw_stage *draw) -{ - FREE(draw); -} - -struct draw_stage * -nv30_draw_render_stage(struct nv30_context *nv30) -{ - struct nv30_draw_stage *nv30draw = CALLOC_STRUCT(nv30_draw_stage); - - nv30draw->nv30 = nv30; - nv30draw->draw.draw = nv30->draw; - nv30draw->draw.point = nv30_draw_point; - nv30draw->draw.line = nv30_draw_line; - nv30draw->draw.tri = nv30_draw_tri; - nv30draw->draw.flush = nv30_draw_flush; - nv30draw->draw.reset_stipple_counter = nv30_draw_reset_stipple_counter; - nv30draw->draw.destroy = nv30_draw_destroy; - - return &nv30draw->draw; -} - diff --git a/src/gallium/drivers/nv30/nv30_fragprog.c b/src/gallium/drivers/nv30/nv30_fragprog.c deleted file mode 100644 index 2c432c6dfa7..00000000000 --- a/src/gallium/drivers/nv30/nv30_fragprog.c +++ /dev/null @@ -1,905 +0,0 @@ -#include "pipe/p_context.h" -#include "pipe/p_defines.h" -#include "pipe/p_state.h" -#include "util/u_inlines.h" - -#include "pipe/p_shader_tokens.h" -#include "tgsi/tgsi_dump.h" -#include "tgsi/tgsi_parse.h" -#include "tgsi/tgsi_util.h" - -#include "nv30_context.h" - -#define SWZ_X 0 -#define SWZ_Y 1 -#define SWZ_Z 2 -#define SWZ_W 3 -#define MASK_X 1 -#define MASK_Y 2 -#define MASK_Z 4 -#define MASK_W 8 -#define MASK_ALL (MASK_X|MASK_Y|MASK_Z|MASK_W) -#define DEF_SCALE NV30_FP_OP_DST_SCALE_1X -#define DEF_CTEST NV30_FP_OP_COND_TR -#include "nv30_shader.h" - -#define swz(s,x,y,z,w) nv30_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) -#define neg(s) nv30_sr_neg((s)) -#define abs(s) nv30_sr_abs((s)) -#define scale(s,v) nv30_sr_scale((s), NV30_FP_OP_DST_SCALE_##v) - -#define MAX_CONSTS 128 -#define MAX_IMM 32 -struct nv30_fpc { - struct nv30_fragment_program *fp; - - uint attrib_map[PIPE_MAX_SHADER_INPUTS]; - - int high_temp; - int temp_temp_count; - int num_regs; - - uint depth_id; - uint colour_id; - - unsigned inst_offset; - - struct { - int pipe; - float vals[4]; - } consts[MAX_CONSTS]; - int nr_consts; - - struct nv30_sreg imm[MAX_IMM]; - unsigned nr_imm; -}; - -static INLINE struct nv30_sreg -temp(struct nv30_fpc *fpc) -{ - int idx; - - idx = fpc->temp_temp_count++; - idx += fpc->high_temp + 1; - return nv30_sr(NV30SR_TEMP, idx); -} - -static INLINE struct nv30_sreg -constant(struct nv30_fpc *fpc, int pipe, float vals[4]) -{ - int idx; - - if (fpc->nr_consts == MAX_CONSTS) - assert(0); - idx = fpc->nr_consts++; - - fpc->consts[idx].pipe = pipe; - if (pipe == -1) - memcpy(fpc->consts[idx].vals, vals, 4 * sizeof(float)); - return nv30_sr(NV30SR_CONST, idx); -} - -#define arith(cc,s,o,d,m,s0,s1,s2) \ - nv30_fp_arith((cc), (s), NV30_FP_OP_OPCODE_##o, \ - (d), (m), (s0), (s1), (s2)) -#define tex(cc,s,o,u,d,m,s0,s1,s2) \ - nv30_fp_tex((cc), (s), NV30_FP_OP_OPCODE_##o, (u), \ - (d), (m), (s0), none, none) - -static void -grow_insns(struct nv30_fpc *fpc, int size) -{ - struct nv30_fragment_program *fp = fpc->fp; - - fp->insn_len += size; - fp->insn = realloc(fp->insn, sizeof(uint32_t) * fp->insn_len); -} - -static void -emit_src(struct nv30_fpc *fpc, int pos, struct nv30_sreg src) -{ - struct nv30_fragment_program *fp = fpc->fp; - uint32_t *hw = &fp->insn[fpc->inst_offset]; - uint32_t sr = 0; - - switch (src.type) { - case NV30SR_INPUT: - sr |= (NV30_FP_REG_TYPE_INPUT << NV30_FP_REG_TYPE_SHIFT); - hw[0] |= (src.index << NV30_FP_OP_INPUT_SRC_SHIFT); - break; - case NV30SR_OUTPUT: - sr |= NV30_FP_REG_SRC_HALF; - /* fall-through */ - case NV30SR_TEMP: - sr |= (NV30_FP_REG_TYPE_TEMP << NV30_FP_REG_TYPE_SHIFT); - sr |= (src.index << NV30_FP_REG_SRC_SHIFT); - break; - case NV30SR_CONST: - grow_insns(fpc, 4); - hw = &fp->insn[fpc->inst_offset]; - if (fpc->consts[src.index].pipe >= 0) { - struct nv30_fragment_program_data *fpd; - - fp->consts = realloc(fp->consts, ++fp->nr_consts * - sizeof(*fpd)); - fpd = &fp->consts[fp->nr_consts - 1]; - fpd->offset = fpc->inst_offset + 4; - fpd->index = fpc->consts[src.index].pipe; - memset(&fp->insn[fpd->offset], 0, sizeof(uint32_t) * 4); - } else { - memcpy(&fp->insn[fpc->inst_offset + 4], - fpc->consts[src.index].vals, - sizeof(uint32_t) * 4); - } - - sr |= (NV30_FP_REG_TYPE_CONST << NV30_FP_REG_TYPE_SHIFT); - break; - case NV30SR_NONE: - sr |= (NV30_FP_REG_TYPE_INPUT << NV30_FP_REG_TYPE_SHIFT); - break; - default: - assert(0); - } - - if (src.negate) - sr |= NV30_FP_REG_NEGATE; - - if (src.abs) - hw[1] |= (1 << (29 + pos)); - - sr |= ((src.swz[0] << NV30_FP_REG_SWZ_X_SHIFT) | - (src.swz[1] << NV30_FP_REG_SWZ_Y_SHIFT) | - (src.swz[2] << NV30_FP_REG_SWZ_Z_SHIFT) | - (src.swz[3] << NV30_FP_REG_SWZ_W_SHIFT)); - - hw[pos + 1] |= sr; -} - -static void -emit_dst(struct nv30_fpc *fpc, struct nv30_sreg dst) -{ - struct nv30_fragment_program *fp = fpc->fp; - uint32_t *hw = &fp->insn[fpc->inst_offset]; - - switch (dst.type) { - case NV30SR_TEMP: - if (fpc->num_regs < (dst.index + 1)) - fpc->num_regs = dst.index + 1; - break; - case NV30SR_OUTPUT: - if (dst.index == 1) { - fp->fp_control |= 0xe; - } else { - hw[0] |= NV30_FP_OP_OUT_REG_HALF; - } - break; - case NV30SR_NONE: - hw[0] |= (1 << 30); - break; - default: - assert(0); - } - - hw[0] |= (dst.index << NV30_FP_OP_OUT_REG_SHIFT); -} - -static void -nv30_fp_arith(struct nv30_fpc *fpc, int sat, int op, - struct nv30_sreg dst, int mask, - struct nv30_sreg s0, struct nv30_sreg s1, struct nv30_sreg s2) -{ - struct nv30_fragment_program *fp = fpc->fp; - uint32_t *hw; - - fpc->inst_offset = fp->insn_len; - grow_insns(fpc, 4); - hw = &fp->insn[fpc->inst_offset]; - memset(hw, 0, sizeof(uint32_t) * 4); - - if (op == NV30_FP_OP_OPCODE_KIL) - fp->fp_control |= NV34TCL_FP_CONTROL_USES_KIL; - hw[0] |= (op << NV30_FP_OP_OPCODE_SHIFT); - hw[0] |= (mask << NV30_FP_OP_OUTMASK_SHIFT); - hw[2] |= (dst.dst_scale << NV30_FP_OP_DST_SCALE_SHIFT); - - if (sat) - hw[0] |= NV30_FP_OP_OUT_SAT; - - if (dst.cc_update) - hw[0] |= NV30_FP_OP_COND_WRITE_ENABLE; - hw[1] |= (dst.cc_test << NV30_FP_OP_COND_SHIFT); - hw[1] |= ((dst.cc_swz[0] << NV30_FP_OP_COND_SWZ_X_SHIFT) | - (dst.cc_swz[1] << NV30_FP_OP_COND_SWZ_Y_SHIFT) | - (dst.cc_swz[2] << NV30_FP_OP_COND_SWZ_Z_SHIFT) | - (dst.cc_swz[3] << NV30_FP_OP_COND_SWZ_W_SHIFT)); - - emit_dst(fpc, dst); - emit_src(fpc, 0, s0); - emit_src(fpc, 1, s1); - emit_src(fpc, 2, s2); -} - -static void -nv30_fp_tex(struct nv30_fpc *fpc, int sat, int op, int unit, - struct nv30_sreg dst, int mask, - struct nv30_sreg s0, struct nv30_sreg s1, struct nv30_sreg s2) -{ - struct nv30_fragment_program *fp = fpc->fp; - - nv30_fp_arith(fpc, sat, op, dst, mask, s0, s1, s2); - - fp->insn[fpc->inst_offset] |= (unit << NV30_FP_OP_TEX_UNIT_SHIFT); - fp->samplers |= (1 << unit); -} - -static INLINE struct nv30_sreg -tgsi_src(struct nv30_fpc *fpc, const struct tgsi_full_src_register *fsrc) -{ - struct nv30_sreg src; - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - src = nv30_sr(NV30SR_INPUT, - fpc->attrib_map[fsrc->Register.Index]); - break; - case TGSI_FILE_CONSTANT: - src = constant(fpc, fsrc->Register.Index, NULL); - break; - case TGSI_FILE_IMMEDIATE: - assert(fsrc->Register.Index < fpc->nr_imm); - src = fpc->imm[fsrc->Register.Index]; - break; - case TGSI_FILE_TEMPORARY: - src = nv30_sr(NV30SR_TEMP, fsrc->Register.Index + 1); - if (fpc->high_temp < src.index) - fpc->high_temp = src.index; - break; - /* This is clearly insane, but gallium hands us shaders like this. - * Luckily fragprog results are just temp regs.. - */ - case TGSI_FILE_OUTPUT: - if (fsrc->Register.Index == fpc->colour_id) - return nv30_sr(NV30SR_OUTPUT, 0); - else - return nv30_sr(NV30SR_OUTPUT, 1); - break; - default: - NOUVEAU_ERR("bad src file\n"); - break; - } - - src.abs = fsrc->Register.Absolute; - src.negate = fsrc->Register.Negate; - src.swz[0] = fsrc->Register.SwizzleX; - src.swz[1] = fsrc->Register.SwizzleY; - src.swz[2] = fsrc->Register.SwizzleZ; - src.swz[3] = fsrc->Register.SwizzleW; - return src; -} - -static INLINE struct nv30_sreg -tgsi_dst(struct nv30_fpc *fpc, const struct tgsi_full_dst_register *fdst) { - int idx; - - switch (fdst->Register.File) { - case TGSI_FILE_OUTPUT: - if (fdst->Register.Index == fpc->colour_id) - return nv30_sr(NV30SR_OUTPUT, 0); - else - return nv30_sr(NV30SR_OUTPUT, 1); - break; - case TGSI_FILE_TEMPORARY: - idx = fdst->Register.Index + 1; - if (fpc->high_temp < idx) - fpc->high_temp = idx; - return nv30_sr(NV30SR_TEMP, idx); - case TGSI_FILE_NULL: - return nv30_sr(NV30SR_NONE, 0); - default: - NOUVEAU_ERR("bad dst file %d\n", fdst->Register.File); - return nv30_sr(NV30SR_NONE, 0); - } -} - -static INLINE int -tgsi_mask(uint tgsi) -{ - int mask = 0; - - if (tgsi & TGSI_WRITEMASK_X) mask |= MASK_X; - if (tgsi & TGSI_WRITEMASK_Y) mask |= MASK_Y; - if (tgsi & TGSI_WRITEMASK_Z) mask |= MASK_Z; - if (tgsi & TGSI_WRITEMASK_W) mask |= MASK_W; - return mask; -} - -static boolean -src_native_swz(struct nv30_fpc *fpc, const struct tgsi_full_src_register *fsrc, - struct nv30_sreg *src) -{ - const struct nv30_sreg none = nv30_sr(NV30SR_NONE, 0); - struct nv30_sreg tgsi = tgsi_src(fpc, fsrc); - uint mask = 0; - uint c; - - for (c = 0; c < 4; c++) { - switch (tgsi_util_get_full_src_register_swizzle(fsrc, c)) { - case TGSI_SWIZZLE_X: - case TGSI_SWIZZLE_Y: - case TGSI_SWIZZLE_Z: - case TGSI_SWIZZLE_W: - mask |= (1 << c); - break; - default: - assert(0); - } - } - - if (mask == MASK_ALL) - return TRUE; - - *src = temp(fpc); - - if (mask) - arith(fpc, 0, MOV, *src, mask, tgsi, none, none); - - return FALSE; -} - -static boolean -nv30_fragprog_parse_instruction(struct nv30_fpc *fpc, - const struct tgsi_full_instruction *finst) -{ - const struct nv30_sreg none = nv30_sr(NV30SR_NONE, 0); - struct nv30_sreg src[3], dst, tmp; - int mask, sat, unit = 0; - int ai = -1, ci = -1; - int i; - - if (finst->Instruction.Opcode == TGSI_OPCODE_END) - return TRUE; - - fpc->temp_temp_count = 0; - for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *fsrc; - - fsrc = &finst->Src[i]; - if (fsrc->Register.File == TGSI_FILE_TEMPORARY) { - src[i] = tgsi_src(fpc, fsrc); - } - } - - for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *fsrc; - - fsrc = &finst->Src[i]; - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - case TGSI_FILE_CONSTANT: - case TGSI_FILE_TEMPORARY: - if (!src_native_swz(fpc, fsrc, &src[i])) - continue; - break; - default: - break; - } - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - if (ai == -1 || ai == fsrc->Register.Index) { - ai = fsrc->Register.Index; - src[i] = tgsi_src(fpc, fsrc); - } else { - NOUVEAU_MSG("extra src attr %d\n", - fsrc->Register.Index); - src[i] = temp(fpc); - arith(fpc, 0, MOV, src[i], MASK_ALL, - tgsi_src(fpc, fsrc), none, none); - } - break; - case TGSI_FILE_CONSTANT: - case TGSI_FILE_IMMEDIATE: - if (ci == -1 || ci == fsrc->Register.Index) { - ci = fsrc->Register.Index; - src[i] = tgsi_src(fpc, fsrc); - } else { - src[i] = temp(fpc); - arith(fpc, 0, MOV, src[i], MASK_ALL, - tgsi_src(fpc, fsrc), none, none); - } - break; - case TGSI_FILE_TEMPORARY: - /* handled above */ - break; - case TGSI_FILE_SAMPLER: - unit = fsrc->Register.Index; - break; - case TGSI_FILE_OUTPUT: - break; - default: - NOUVEAU_ERR("bad src file\n"); - return FALSE; - } - } - - dst = tgsi_dst(fpc, &finst->Dst[0]); - mask = tgsi_mask(finst->Dst[0].Register.WriteMask); - sat = (finst->Instruction.Saturate == TGSI_SAT_ZERO_ONE); - - switch (finst->Instruction.Opcode) { - case TGSI_OPCODE_ABS: - arith(fpc, sat, MOV, dst, mask, abs(src[0]), none, none); - break; - case TGSI_OPCODE_ADD: - arith(fpc, sat, ADD, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_CMP: - tmp = nv30_sr(NV30SR_NONE, 0); - tmp.cc_update = 1; - arith(fpc, 0, MOV, tmp, 0xf, src[0], none, none); - dst.cc_test = NV30_VP_INST_COND_GE; - arith(fpc, sat, MOV, dst, mask, src[2], none, none); - dst.cc_test = NV30_VP_INST_COND_LT; - arith(fpc, sat, MOV, dst, mask, src[1], none, none); - break; - case TGSI_OPCODE_COS: - arith(fpc, sat, COS, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_DP3: - arith(fpc, sat, DP3, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DP4: - arith(fpc, sat, DP4, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DPH: - tmp = temp(fpc); - arith(fpc, 0, DP3, tmp, MASK_X, src[0], src[1], none); - arith(fpc, sat, ADD, dst, mask, swz(tmp, X, X, X, X), - swz(src[1], W, W, W, W), none); - break; - case TGSI_OPCODE_DST: - arith(fpc, sat, DST, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_EX2: - arith(fpc, sat, EX2, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_FLR: - arith(fpc, sat, FLR, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_FRC: - arith(fpc, sat, FRC, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_KILP: - arith(fpc, 0, KIL, none, 0, none, none, none); - break; - case TGSI_OPCODE_KIL: - dst = nv30_sr(NV30SR_NONE, 0); - dst.cc_update = 1; - arith(fpc, 0, MOV, dst, MASK_ALL, src[0], none, none); - dst.cc_update = 0; dst.cc_test = NV30_FP_OP_COND_LT; - arith(fpc, 0, KIL, dst, 0, none, none, none); - break; - case TGSI_OPCODE_LG2: - arith(fpc, sat, LG2, dst, mask, src[0], none, none); - break; -// case TGSI_OPCODE_LIT: - case TGSI_OPCODE_LRP: - arith(fpc, sat, LRP, dst, mask, src[0], src[1], src[2]); - break; - case TGSI_OPCODE_MAD: - arith(fpc, sat, MAD, dst, mask, src[0], src[1], src[2]); - break; - case TGSI_OPCODE_MAX: - arith(fpc, sat, MAX, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_MIN: - arith(fpc, sat, MIN, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_MOV: - arith(fpc, sat, MOV, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_MUL: - arith(fpc, sat, MUL, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_POW: - arith(fpc, sat, POW, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_RCP: - arith(fpc, sat, RCP, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_RET: - assert(0); - break; - case TGSI_OPCODE_RFL: - arith(fpc, 0, RFL, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_RSQ: - arith(fpc, sat, RSQ, dst, mask, abs(swz(src[0], X, X, X, X)), none, none); - break; - case TGSI_OPCODE_SCS: - /* avoid overwriting the source */ - if(src[0].swz[SWZ_X] != SWZ_X) - { - if (mask & MASK_X) { - arith(fpc, sat, COS, dst, MASK_X, - swz(src[0], X, X, X, X), none, none); - } - if (mask & MASK_Y) { - arith(fpc, sat, SIN, dst, MASK_Y, - swz(src[0], X, X, X, X), none, none); - } - } - else - { - if (mask & MASK_Y) { - arith(fpc, sat, SIN, dst, MASK_Y, - swz(src[0], X, X, X, X), none, none); - } - if (mask & MASK_X) { - arith(fpc, sat, COS, dst, MASK_X, - swz(src[0], X, X, X, X), none, none); - } - } - break; - case TGSI_OPCODE_SIN: - arith(fpc, sat, SIN, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_SGE: - arith(fpc, sat, SGE, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SGT: - arith(fpc, sat, SGT, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SLT: - arith(fpc, sat, SLT, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SUB: - arith(fpc, sat, ADD, dst, mask, src[0], neg(src[1]), none); - break; - case TGSI_OPCODE_TEX: - tex(fpc, sat, TEX, unit, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_TXB: - tex(fpc, sat, TXB, unit, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_TXP: - tex(fpc, sat, TXP, unit, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_XPD: - tmp = temp(fpc); - arith(fpc, 0, MUL, tmp, mask, - swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none); - arith(fpc, sat, MAD, dst, (mask & ~MASK_W), - swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), - neg(tmp)); - break; - default: - NOUVEAU_ERR("invalid opcode %d\n", finst->Instruction.Opcode); - return FALSE; - } - - return TRUE; -} - -static boolean -nv30_fragprog_parse_decl_attrib(struct nv30_fpc *fpc, - const struct tgsi_full_declaration *fdec) -{ - int hw; - - switch (fdec->Semantic.Name) { - case TGSI_SEMANTIC_POSITION: - hw = NV30_FP_OP_INPUT_SRC_POSITION; - break; - case TGSI_SEMANTIC_COLOR: - if (fdec->Semantic.Index == 0) { - hw = NV30_FP_OP_INPUT_SRC_COL0; - } else - if (fdec->Semantic.Index == 1) { - hw = NV30_FP_OP_INPUT_SRC_COL1; - } else { - NOUVEAU_ERR("bad colour semantic index\n"); - return FALSE; - } - break; - case TGSI_SEMANTIC_FOG: - hw = NV30_FP_OP_INPUT_SRC_FOGC; - break; - case TGSI_SEMANTIC_GENERIC: - if (fdec->Semantic.Index <= 7) { - hw = NV30_FP_OP_INPUT_SRC_TC(fdec->Semantic. - Index); - } else { - NOUVEAU_ERR("bad generic semantic index\n"); - return FALSE; - } - break; - default: - NOUVEAU_ERR("bad input semantic\n"); - return FALSE; - } - - fpc->attrib_map[fdec->Range.First] = hw; - return TRUE; -} - -static boolean -nv30_fragprog_parse_decl_output(struct nv30_fpc *fpc, - const struct tgsi_full_declaration *fdec) -{ - switch (fdec->Semantic.Name) { - case TGSI_SEMANTIC_POSITION: - fpc->depth_id = fdec->Range.First; - break; - case TGSI_SEMANTIC_COLOR: - fpc->colour_id = fdec->Range.First; - break; - default: - NOUVEAU_ERR("bad output semantic\n"); - return FALSE; - } - - return TRUE; -} - -static boolean -nv30_fragprog_prepare(struct nv30_fpc *fpc) -{ - struct tgsi_parse_context p; - /*int high_temp = -1, i;*/ - - tgsi_parse_init(&p, fpc->fp->pipe.tokens); - while (!tgsi_parse_end_of_tokens(&p)) { - const union tgsi_full_token *tok = &p.FullToken; - - tgsi_parse_token(&p); - switch(tok->Token.Type) { - case TGSI_TOKEN_TYPE_DECLARATION: - { - const struct tgsi_full_declaration *fdec; - fdec = &p.FullToken.FullDeclaration; - switch (fdec->Declaration.File) { - case TGSI_FILE_INPUT: - if (!nv30_fragprog_parse_decl_attrib(fpc, fdec)) - goto out_err; - break; - case TGSI_FILE_OUTPUT: - if (!nv30_fragprog_parse_decl_output(fpc, fdec)) - goto out_err; - break; - /*case TGSI_FILE_TEMPORARY: - if (fdec->Range.Last > high_temp) { - high_temp = - fdec->Range.Last; - } - break;*/ - default: - break; - } - } - break; - case TGSI_TOKEN_TYPE_IMMEDIATE: - { - struct tgsi_full_immediate *imm; - float vals[4]; - - imm = &p.FullToken.FullImmediate; - assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32); - assert(fpc->nr_imm < MAX_IMM); - - vals[0] = imm->u[0].Float; - vals[1] = imm->u[1].Float; - vals[2] = imm->u[2].Float; - vals[3] = imm->u[3].Float; - fpc->imm[fpc->nr_imm++] = constant(fpc, -1, vals); - } - break; - default: - break; - } - } - tgsi_parse_free(&p); - - /*if (++high_temp) { - fpc->r_temp = CALLOC(high_temp, sizeof(struct nv30_sreg)); - for (i = 0; i < high_temp; i++) - fpc->r_temp[i] = temp(fpc); - fpc->r_temps_discard = 0; - }*/ - - return TRUE; - -out_err: - /*if (fpc->r_temp) - FREE(fpc->r_temp);*/ - tgsi_parse_free(&p); - return FALSE; -} - -static void -nv30_fragprog_translate(struct nv30_context *nv30, - struct nv30_fragment_program *fp) -{ - struct tgsi_parse_context parse; - struct nv30_fpc *fpc = NULL; - - tgsi_dump(fp->pipe.tokens,0); - - fpc = CALLOC(1, sizeof(struct nv30_fpc)); - if (!fpc) - return; - fpc->fp = fp; - fpc->high_temp = -1; - fpc->num_regs = 2; - - if (!nv30_fragprog_prepare(fpc)) { - FREE(fpc); - return; - } - - tgsi_parse_init(&parse, fp->pipe.tokens); - - while (!tgsi_parse_end_of_tokens(&parse)) { - tgsi_parse_token(&parse); - - switch (parse.FullToken.Token.Type) { - case TGSI_TOKEN_TYPE_INSTRUCTION: - { - const struct tgsi_full_instruction *finst; - - finst = &parse.FullToken.FullInstruction; - if (!nv30_fragprog_parse_instruction(fpc, finst)) - goto out_err; - } - break; - default: - break; - } - } - - fp->fp_control |= (fpc->num_regs-1)/2; - fp->fp_reg_control = (1<<16)|0x4; - - /* Terminate final instruction */ - fp->insn[fpc->inst_offset] |= 0x00000001; - - /* Append NOP + END instruction, may or may not be necessary. */ - fpc->inst_offset = fp->insn_len; - grow_insns(fpc, 4); - fp->insn[fpc->inst_offset + 0] = 0x00000001; - fp->insn[fpc->inst_offset + 1] = 0x00000000; - fp->insn[fpc->inst_offset + 2] = 0x00000000; - fp->insn[fpc->inst_offset + 3] = 0x00000000; - - fp->translated = TRUE; - fp->on_hw = FALSE; -out_err: - tgsi_parse_free(&parse); - FREE(fpc); -} - -static void -nv30_fragprog_upload(struct nv30_context *nv30, - struct nv30_fragment_program *fp) -{ - struct pipe_screen *pscreen = nv30->pipe.screen; - const uint32_t le = 1; - uint32_t *map; - int i; - - map = pipe_buffer_map(pscreen, fp->buffer, PIPE_BUFFER_USAGE_CPU_WRITE); - -#if 0 - for (i = 0; i < fp->insn_len; i++) { - fflush(stdout); fflush(stderr); - NOUVEAU_ERR("%d 0x%08x\n", i, fp->insn[i]); - fflush(stdout); fflush(stderr); - } -#endif - - if ((*(const uint8_t *)&le)) { - for (i = 0; i < fp->insn_len; i++) { - map[i] = fp->insn[i]; - } - } else { - /* Weird swapping for big-endian chips */ - for (i = 0; i < fp->insn_len; i++) { - map[i] = ((fp->insn[i] & 0xffff) << 16) | - ((fp->insn[i] >> 16) & 0xffff); - } - } - - pipe_buffer_unmap(pscreen, fp->buffer); -} - -static boolean -nv30_fragprog_validate(struct nv30_context *nv30) -{ - struct nv30_fragment_program *fp = nv30->fragprog; - struct pipe_buffer *constbuf = - nv30->constbuf[PIPE_SHADER_FRAGMENT]; - struct pipe_screen *pscreen = nv30->pipe.screen; - struct nouveau_stateobj *so; - boolean new_consts = FALSE; - int i; - - if (fp->translated) - goto update_constants; - - /*nv30->fallback_swrast &= ~NV30_NEW_FRAGPROG;*/ - nv30_fragprog_translate(nv30, fp); - if (!fp->translated) { - /*nv30->fallback_swrast |= NV30_NEW_FRAGPROG;*/ - return FALSE; - } - - fp->buffer = pscreen->buffer_create(pscreen, 0x100, 0, fp->insn_len * 4); - nv30_fragprog_upload(nv30, fp); - - so = so_new(4, 4, 1); - so_method(so, nv30->screen->rankine, NV34TCL_FP_ACTIVE_PROGRAM, 1); - so_reloc (so, nouveau_bo(fp->buffer), 0, NOUVEAU_BO_VRAM | - NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW | - NOUVEAU_BO_OR, NV34TCL_FP_ACTIVE_PROGRAM_DMA0, - NV34TCL_FP_ACTIVE_PROGRAM_DMA1); - so_method(so, nv30->screen->rankine, NV34TCL_FP_CONTROL, 1); - so_data (so, fp->fp_control); - so_method(so, nv30->screen->rankine, NV34TCL_FP_REG_CONTROL, 1); - so_data (so, fp->fp_reg_control); - so_method(so, nv30->screen->rankine, NV34TCL_TX_UNITS_ENABLE, 1); - so_data (so, fp->samplers); - so_ref(so, &fp->so); - so_ref(NULL, &so); - -update_constants: - if (fp->nr_consts) { - float *map; - - map = pipe_buffer_map(pscreen, constbuf, - PIPE_BUFFER_USAGE_CPU_READ); - for (i = 0; i < fp->nr_consts; i++) { - struct nv30_fragment_program_data *fpd = &fp->consts[i]; - uint32_t *p = &fp->insn[fpd->offset]; - uint32_t *cb = (uint32_t *)&map[fpd->index * 4]; - - if (!memcmp(p, cb, 4 * sizeof(float))) - continue; - memcpy(p, cb, 4 * sizeof(float)); - new_consts = TRUE; - } - pipe_buffer_unmap(pscreen, constbuf); - - if (new_consts) - nv30_fragprog_upload(nv30, fp); - } - - if (new_consts || fp->so != nv30->state.hw[NV30_STATE_FRAGPROG]) { - so_ref(fp->so, &nv30->state.hw[NV30_STATE_FRAGPROG]); - return TRUE; - } - - return FALSE; -} - -void -nv30_fragprog_destroy(struct nv30_context *nv30, - struct nv30_fragment_program *fp) -{ - if (fp->buffer) - pipe_buffer_reference(&fp->buffer, NULL); - - if (fp->so) - so_ref(NULL, &fp->so); - - if (fp->insn_len) - FREE(fp->insn); -} - -struct nv30_state_entry nv30_state_fragprog = { - .validate = nv30_fragprog_validate, - .dirty = { - .pipe = NV30_NEW_FRAGPROG, - .hw = NV30_STATE_FRAGPROG - } -}; diff --git a/src/gallium/drivers/nv30/nv30_miptree.c b/src/gallium/drivers/nv30/nv30_miptree.c deleted file mode 100644 index 697b1b92ff6..00000000000 --- a/src/gallium/drivers/nv30/nv30_miptree.c +++ /dev/null @@ -1,239 +0,0 @@ -#include "pipe/p_state.h" -#include "pipe/p_defines.h" -#include "util/u_inlines.h" -#include "util/u_format.h" -#include "util/u_math.h" - -#include "nv30_context.h" -#include "../nouveau/nv04_surface_2d.h" - -static void -nv30_miptree_layout(struct nv30_miptree *nv30mt) -{ - struct pipe_texture *pt = &nv30mt->base; - uint width = pt->width0; - uint offset = 0; - int nr_faces, l, f; - uint wide_pitch = pt->tex_usage & (PIPE_TEXTURE_USAGE_SAMPLER | - PIPE_TEXTURE_USAGE_DEPTH_STENCIL | - PIPE_TEXTURE_USAGE_RENDER_TARGET | - PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_PRIMARY); - - if (pt->target == PIPE_TEXTURE_CUBE) { - nr_faces = 6; - } else - if (pt->target == PIPE_TEXTURE_3D) { - nr_faces = pt->depth0; - } else { - nr_faces = 1; - } - - for (l = 0; l <= pt->last_level; l++) { - if (wide_pitch && (pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) - nv30mt->level[l].pitch = align(util_format_get_stride(pt->format, pt->width0), 64); - else - nv30mt->level[l].pitch = util_format_get_stride(pt->format, width); - - nv30mt->level[l].image_offset = - CALLOC(nr_faces, sizeof(unsigned)); - - width = u_minify(width, 1); - } - - for (f = 0; f < nr_faces; f++) { - for (l = 0; l < pt->last_level; l++) { - nv30mt->level[l].image_offset[f] = offset; - - if (!(pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR) && - u_minify(pt->width0, l + 1) > 1 && u_minify(pt->height0, l + 1) > 1) - offset += align(nv30mt->level[l].pitch * u_minify(pt->height0, l), 64); - else - offset += nv30mt->level[l].pitch * u_minify(pt->height0, l); - } - - nv30mt->level[l].image_offset[f] = offset; - offset += nv30mt->level[l].pitch * u_minify(pt->height0, l); - } - - nv30mt->total_size = offset; -} - -static struct pipe_texture * -nv30_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) -{ - struct nv30_miptree *mt; - unsigned buf_usage = PIPE_BUFFER_USAGE_PIXEL | - NOUVEAU_BUFFER_USAGE_TEXTURE; - - mt = MALLOC(sizeof(struct nv30_miptree)); - if (!mt) - return NULL; - mt->base = *pt; - pipe_reference_init(&mt->base.reference, 1); - mt->base.screen = pscreen; - - /* Swizzled textures must be POT */ - if (pt->width0 & (pt->width0 - 1) || - pt->height0 & (pt->height0 - 1)) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - else - if (pt->tex_usage & (PIPE_TEXTURE_USAGE_PRIMARY | - PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_DEPTH_STENCIL)) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - else - if (pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - else { - switch (pt->format) { - /* TODO: Figure out which formats can be swizzled */ - case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_B8G8R8X8_UNORM: - case PIPE_FORMAT_R16_SNORM: - case PIPE_FORMAT_B5G6R5_UNORM: - case PIPE_FORMAT_L8A8_UNORM: - case PIPE_FORMAT_A8_UNORM: - case PIPE_FORMAT_L8_UNORM: - case PIPE_FORMAT_I8_UNORM: - { - if (debug_get_bool_option("NOUVEAU_NO_SWIZZLE", FALSE)) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - break; - } - default: - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - } - } - - if (pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC) - buf_usage |= PIPE_BUFFER_USAGE_CPU_READ_WRITE; - - /* apparently we can't render to swizzled surfaces smaller than 64 bytes, so make them linear. - * If the user did not ask for a render target, they can still render to it, but it will cost them an extra copy. - * This also happens for small mipmaps of large textures. */ - if (pt->tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET && util_format_get_stride(pt->format, pt->width0) < 64) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - - nv30_miptree_layout(mt); - - mt->buffer = pscreen->buffer_create(pscreen, 256, buf_usage, - mt->total_size); - if (!mt->buffer) { - FREE(mt); - return NULL; - } - mt->bo = nouveau_bo(mt->buffer); - - return &mt->base; -} - -static struct pipe_texture * -nv30_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt, - const unsigned *stride, struct pipe_buffer *pb) -{ - struct nv30_miptree *mt; - - /* Only supports 2D, non-mipmapped textures for the moment */ - if (pt->target != PIPE_TEXTURE_2D || pt->last_level != 0 || - pt->depth0 != 1) - return NULL; - - mt = CALLOC_STRUCT(nv30_miptree); - if (!mt) - return NULL; - - mt->base = *pt; - pipe_reference_init(&mt->base.reference, 1); - mt->base.screen = pscreen; - mt->level[0].pitch = stride[0]; - mt->level[0].image_offset = CALLOC(1, sizeof(unsigned)); - - /* Assume whoever created this buffer expects it to be linear for now */ - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - - pipe_buffer_reference(&mt->buffer, pb); - mt->bo = nouveau_bo(mt->buffer); - return &mt->base; -} - -static void -nv30_miptree_destroy(struct pipe_texture *pt) -{ - struct nv30_miptree *mt = (struct nv30_miptree *)pt; - int l; - - pipe_buffer_reference(&mt->buffer, NULL); - for (l = 0; l <= pt->last_level; l++) { - if (mt->level[l].image_offset) - FREE(mt->level[l].image_offset); - } - - FREE(mt); -} - -static struct pipe_surface * -nv30_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, - unsigned face, unsigned level, unsigned zslice, - unsigned flags) -{ - struct nv30_miptree *nv30mt = (struct nv30_miptree *)pt; - struct nv04_surface *ns; - - ns = CALLOC_STRUCT(nv04_surface); - if (!ns) - return NULL; - pipe_texture_reference(&ns->base.texture, pt); - ns->base.format = pt->format; - ns->base.width = u_minify(pt->width0, level); - ns->base.height = u_minify(pt->height0, level); - ns->base.usage = flags; - pipe_reference_init(&ns->base.reference, 1); - ns->base.face = face; - ns->base.level = level; - ns->base.zslice = zslice; - ns->pitch = nv30mt->level[level].pitch; - - if (pt->target == PIPE_TEXTURE_CUBE) { - ns->base.offset = nv30mt->level[level].image_offset[face]; - } else - if (pt->target == PIPE_TEXTURE_3D) { - ns->base.offset = nv30mt->level[level].image_offset[zslice]; - } else { - ns->base.offset = nv30mt->level[level].image_offset[0]; - } - - /* create a linear temporary that we can render into if necessary. - * Note that ns->pitch is always a multiple of 64 for linear surfaces and swizzled surfaces are POT, so - * ns->pitch & 63 is equivalent to (ns->pitch < 64 && swizzled)*/ - if((ns->pitch & 63) && (ns->base.usage & (PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER)) == PIPE_BUFFER_USAGE_GPU_WRITE) - return &nv04_surface_wrap_for_render(pscreen, ((struct nv30_screen*)pscreen)->eng2d, ns)->base; - - return &ns->base; -} - -static void -nv30_miptree_surface_del(struct pipe_surface *ps) -{ - struct nv04_surface* ns = (struct nv04_surface*)ps; - if(ns->backing) - { - struct nv30_screen* screen = (struct nv30_screen*)ps->texture->screen; - if(ns->backing->base.usage & PIPE_BUFFER_USAGE_GPU_WRITE) - screen->eng2d->copy(screen->eng2d, &ns->backing->base, 0, 0, ps, 0, 0, ns->base.width, ns->base.height); - nv30_miptree_surface_del(&ns->backing->base); - } - - pipe_texture_reference(&ps->texture, NULL); - FREE(ps); -} - -void -nv30_screen_init_miptree_functions(struct pipe_screen *pscreen) -{ - pscreen->texture_create = nv30_miptree_create; - pscreen->texture_blanket = nv30_miptree_blanket; - pscreen->texture_destroy = nv30_miptree_destroy; - pscreen->get_tex_surface = nv30_miptree_surface_new; - pscreen->tex_surface_destroy = nv30_miptree_surface_del; -} diff --git a/src/gallium/drivers/nv30/nv30_query.c b/src/gallium/drivers/nv30/nv30_query.c deleted file mode 100644 index e27e9ccbf60..00000000000 --- a/src/gallium/drivers/nv30/nv30_query.c +++ /dev/null @@ -1,127 +0,0 @@ -#include "pipe/p_context.h" - -#include "nv30_context.h" - -struct nv30_query { - struct nouveau_resource *object; - unsigned type; - boolean ready; - uint64_t result; -}; - -static INLINE struct nv30_query * -nv30_query(struct pipe_query *pipe) -{ - return (struct nv30_query *)pipe; -} - -static struct pipe_query * -nv30_query_create(struct pipe_context *pipe, unsigned query_type) -{ - struct nv30_query *q; - - q = CALLOC(1, sizeof(struct nv30_query)); - q->type = query_type; - - return (struct pipe_query *)q; -} - -static void -nv30_query_destroy(struct pipe_context *pipe, struct pipe_query *pq) -{ - struct nv30_query *q = nv30_query(pq); - - if (q->object) - nouveau_resource_free(&q->object); - FREE(q); -} - -static void -nv30_query_begin(struct pipe_context *pipe, struct pipe_query *pq) -{ - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_query *q = nv30_query(pq); - struct nv30_screen *screen = nv30->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; - - assert(q->type == PIPE_QUERY_OCCLUSION_COUNTER); - - /* Happens when end_query() is called, then another begin_query() - * without querying the result in-between. For now we'll wait for - * the existing query to notify completion, but it could be better. - */ - if (q->object) { - uint64_t tmp; - pipe->get_query_result(pipe, pq, 1, &tmp); - } - - if (nouveau_resource_alloc(nv30->screen->query_heap, 1, NULL, &q->object)) - assert(0); - nouveau_notifier_reset(nv30->screen->query, q->object->start); - - BEGIN_RING(chan, rankine, NV34TCL_QUERY_RESET, 1); - OUT_RING (chan, 1); - BEGIN_RING(chan, rankine, NV34TCL_QUERY_UNK17CC, 1); - OUT_RING (chan, 1); - - q->ready = FALSE; -} - -static void -nv30_query_end(struct pipe_context *pipe, struct pipe_query *pq) -{ - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_screen *screen = nv30->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; - struct nv30_query *q = nv30_query(pq); - - BEGIN_RING(chan, rankine, NV34TCL_QUERY_GET, 1); - OUT_RING (chan, (0x01 << NV34TCL_QUERY_GET_UNK24_SHIFT) | - ((q->object->start * 32) << NV34TCL_QUERY_GET_OFFSET_SHIFT)); - FIRE_RING(chan); -} - -static boolean -nv30_query_result(struct pipe_context *pipe, struct pipe_query *pq, - boolean wait, uint64_t *result) -{ - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_query *q = nv30_query(pq); - - assert(q->object && q->type == PIPE_QUERY_OCCLUSION_COUNTER); - - if (!q->ready) { - unsigned status; - - status = nouveau_notifier_status(nv30->screen->query, - q->object->start); - if (status != NV_NOTIFY_STATE_STATUS_COMPLETED) { - if (wait == FALSE) - return FALSE; - - nouveau_notifier_wait_status(nv30->screen->query, - q->object->start, - NV_NOTIFY_STATE_STATUS_COMPLETED, 0); - } - - q->result = nouveau_notifier_return_val(nv30->screen->query, - q->object->start); - q->ready = TRUE; - nouveau_resource_free(&q->object); - } - - *result = q->result; - return TRUE; -} - -void -nv30_init_query_functions(struct nv30_context *nv30) -{ - nv30->pipe.create_query = nv30_query_create; - nv30->pipe.destroy_query = nv30_query_destroy; - nv30->pipe.begin_query = nv30_query_begin; - nv30->pipe.end_query = nv30_query_end; - nv30->pipe.get_query_result = nv30_query_result; -} diff --git a/src/gallium/drivers/nv30/nv30_screen.c b/src/gallium/drivers/nv30/nv30_screen.c deleted file mode 100644 index 85433d20953..00000000000 --- a/src/gallium/drivers/nv30/nv30_screen.c +++ /dev/null @@ -1,362 +0,0 @@ -#include "pipe/p_screen.h" -#include "pipe/p_state.h" - -#include "nouveau/nouveau_screen.h" - -#include "nv30_context.h" -#include "nv30_screen.h" - -#define NV30TCL_CHIPSET_3X_MASK 0x00000003 -#define NV34TCL_CHIPSET_3X_MASK 0x00000010 -#define NV35TCL_CHIPSET_3X_MASK 0x000001e0 - -/* FIXME: It seems I should not include directly ../../winsys/drm/nouveau/drm/nouveau_drm_api.h - * to get the pointer to the context front buffer, so I copied nouveau_winsys here. - * nv30_screen_surface_format_supported() can then use it to enforce creating fbo - * with same number of bits everywhere. - */ -struct nouveau_winsys { - struct pipe_winsys base; - - struct pipe_screen *pscreen; - - struct pipe_surface *front; -}; - -static int -nv30_screen_get_param(struct pipe_screen *pscreen, int param) -{ - switch (param) { - case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: - return 8; - case PIPE_CAP_NPOT_TEXTURES: - return 0; - case PIPE_CAP_TWO_SIDED_STENCIL: - return 1; - case PIPE_CAP_GLSL: - return 0; - case PIPE_CAP_ANISOTROPIC_FILTER: - return 1; - case PIPE_CAP_POINT_SPRITE: - return 1; - case PIPE_CAP_MAX_RENDER_TARGETS: - return 2; - case PIPE_CAP_OCCLUSION_QUERY: - return 1; - case PIPE_CAP_TEXTURE_SHADOW_MAP: - return 1; - case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: - return 13; - case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: - return 10; - case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: - return 13; - case PIPE_CAP_TEXTURE_MIRROR_CLAMP: - return 0; - case PIPE_CAP_TEXTURE_MIRROR_REPEAT: - return 1; - case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS: - return 0; - case PIPE_CAP_TGSI_CONT_SUPPORTED: - return 0; - case PIPE_CAP_BLEND_EQUATION_SEPARATE: - return 0; - case NOUVEAU_CAP_HW_VTXBUF: - case NOUVEAU_CAP_HW_IDXBUF: - return 1; - case PIPE_CAP_MAX_COMBINED_SAMPLERS: - return 16; - case PIPE_CAP_INDEP_BLEND_ENABLE: - return 0; - case PIPE_CAP_INDEP_BLEND_FUNC: - return 0; - case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: - case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: - return 1; - case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: - case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: - return 0; - default: - NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param); - return 0; - } -} - -static float -nv30_screen_get_paramf(struct pipe_screen *pscreen, int param) -{ - switch (param) { - case PIPE_CAP_MAX_LINE_WIDTH: - case PIPE_CAP_MAX_LINE_WIDTH_AA: - return 10.0; - case PIPE_CAP_MAX_POINT_WIDTH: - case PIPE_CAP_MAX_POINT_WIDTH_AA: - return 64.0; - case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: - return 8.0; - case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: - return 4.0; - default: - NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param); - return 0.0; - } -} - -static boolean -nv30_screen_surface_format_supported(struct pipe_screen *pscreen, - enum pipe_format format, - enum pipe_texture_target target, - unsigned tex_usage, unsigned geom_flags) -{ - struct pipe_surface *front = ((struct nouveau_winsys *) pscreen->winsys)->front; - - if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) { - switch (format) { - case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_B5G6R5_UNORM: - return TRUE; - default: - break; - } - } else - if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) { - switch (format) { - case PIPE_FORMAT_S8Z24_UNORM: - case PIPE_FORMAT_X8Z24_UNORM: - return TRUE; - case PIPE_FORMAT_Z16_UNORM: - if (front) { - return (front->format == PIPE_FORMAT_B5G6R5_UNORM); - } - return TRUE; - default: - break; - } - } else { - switch (format) { - case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_B5G5R5A1_UNORM: - case PIPE_FORMAT_B4G4R4A4_UNORM: - case PIPE_FORMAT_B5G6R5_UNORM: - case PIPE_FORMAT_L8_UNORM: - case PIPE_FORMAT_A8_UNORM: - case PIPE_FORMAT_I8_UNORM: - case PIPE_FORMAT_L8A8_UNORM: - case PIPE_FORMAT_Z16_UNORM: - case PIPE_FORMAT_S8Z24_UNORM: - return TRUE; - default: - break; - } - } - - return FALSE; -} - -static struct pipe_buffer * -nv30_surface_buffer(struct pipe_surface *surf) -{ - struct nv30_miptree *mt = (struct nv30_miptree *)surf->texture; - - return mt->buffer; -} - -static void -nv30_screen_destroy(struct pipe_screen *pscreen) -{ - struct nv30_screen *screen = nv30_screen(pscreen); - unsigned i; - - for (i = 0; i < NV30_STATE_MAX; i++) { - if (screen->state[i]) - so_ref(NULL, &screen->state[i]); - } - - nouveau_resource_destroy(&screen->vp_exec_heap); - nouveau_resource_destroy(&screen->vp_data_heap); - nouveau_resource_destroy(&screen->query_heap); - nouveau_notifier_free(&screen->query); - nouveau_notifier_free(&screen->sync); - nouveau_grobj_free(&screen->rankine); - nv04_surface_2d_takedown(&screen->eng2d); - - nouveau_screen_fini(&screen->base); - - FREE(pscreen); -} - -struct pipe_screen * -nv30_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) -{ - struct nv30_screen *screen = CALLOC_STRUCT(nv30_screen); - struct nouveau_channel *chan; - struct pipe_screen *pscreen; - struct nouveau_stateobj *so; - unsigned rankine_class = 0; - int ret, i; - - if (!screen) - return NULL; - pscreen = &screen->base.base; - - ret = nouveau_screen_init(&screen->base, dev); - if (ret) { - nv30_screen_destroy(pscreen); - return NULL; - } - chan = screen->base.channel; - - pscreen->winsys = ws; - pscreen->destroy = nv30_screen_destroy; - pscreen->get_param = nv30_screen_get_param; - pscreen->get_paramf = nv30_screen_get_paramf; - pscreen->is_format_supported = nv30_screen_surface_format_supported; - pscreen->context_create = nv30_create; - - nv30_screen_init_miptree_functions(pscreen); - nv30_screen_init_transfer_functions(pscreen); - - /* 3D object */ - switch (dev->chipset & 0xf0) { - case 0x30: - if (NV30TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f))) - rankine_class = 0x0397; - else - if (NV34TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f))) - rankine_class = 0x0697; - else - if (NV35TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f))) - rankine_class = 0x0497; - break; - default: - break; - } - - if (!rankine_class) { - NOUVEAU_ERR("Unknown nv3x chipset: nv%02x\n", dev->chipset); - return NULL; - } - - ret = nouveau_grobj_alloc(chan, 0xbeef3097, rankine_class, - &screen->rankine); - if (ret) { - NOUVEAU_ERR("Error creating 3D object: %d\n", ret); - return FALSE; - } - - /* 2D engine setup */ - screen->eng2d = nv04_surface_2d_init(&screen->base); - screen->eng2d->buf = nv30_surface_buffer; - - /* Notifier for sync purposes */ - ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync); - if (ret) { - NOUVEAU_ERR("Error creating notifier object: %d\n", ret); - nv30_screen_destroy(pscreen); - return NULL; - } - - /* Query objects */ - ret = nouveau_notifier_alloc(chan, 0xbeef0302, 32, &screen->query); - if (ret) { - NOUVEAU_ERR("Error initialising query objects: %d\n", ret); - nv30_screen_destroy(pscreen); - return NULL; - } - - ret = nouveau_resource_init(&screen->query_heap, 0, 32); - if (ret) { - NOUVEAU_ERR("Error initialising query object heap: %d\n", ret); - nv30_screen_destroy(pscreen); - return NULL; - } - - /* Vtxprog resources */ - if (nouveau_resource_init(&screen->vp_exec_heap, 0, 256) || - nouveau_resource_init(&screen->vp_data_heap, 0, 256)) { - nv30_screen_destroy(pscreen); - return NULL; - } - - /* Static rankine initialisation */ - so = so_new(36, 60, 0); - so_method(so, screen->rankine, NV34TCL_DMA_NOTIFY, 1); - so_data (so, screen->sync->handle); - so_method(so, screen->rankine, NV34TCL_DMA_TEXTURE0, 2); - so_data (so, chan->vram->handle); - so_data (so, chan->gart->handle); - so_method(so, screen->rankine, NV34TCL_DMA_COLOR1, 1); - so_data (so, chan->vram->handle); - so_method(so, screen->rankine, NV34TCL_DMA_COLOR0, 2); - so_data (so, chan->vram->handle); - so_data (so, chan->vram->handle); - so_method(so, screen->rankine, NV34TCL_DMA_VTXBUF0, 2); - so_data (so, chan->vram->handle); - so_data (so, chan->gart->handle); -/* so_method(so, screen->rankine, NV34TCL_DMA_FENCE, 2); - so_data (so, 0); - so_data (so, screen->query->handle);*/ - so_method(so, screen->rankine, NV34TCL_DMA_IN_MEMORY7, 1); - so_data (so, chan->vram->handle); - so_method(so, screen->rankine, NV34TCL_DMA_IN_MEMORY8, 1); - so_data (so, chan->vram->handle); - - for (i=1; i<8; i++) { - so_method(so, screen->rankine, NV34TCL_VIEWPORT_CLIP_HORIZ(i), 1); - so_data (so, 0); - so_method(so, screen->rankine, NV34TCL_VIEWPORT_CLIP_VERT(i), 1); - so_data (so, 0); - } - - so_method(so, screen->rankine, 0x220, 1); - so_data (so, 1); - - so_method(so, screen->rankine, 0x03b0, 1); - so_data (so, 0x00100000); - so_method(so, screen->rankine, 0x1454, 1); - so_data (so, 0); - so_method(so, screen->rankine, 0x1d80, 1); - so_data (so, 3); - so_method(so, screen->rankine, 0x1450, 1); - so_data (so, 0x00030004); - - /* NEW */ - so_method(so, screen->rankine, 0x1e98, 1); - so_data (so, 0); - so_method(so, screen->rankine, 0x17e0, 3); - so_data (so, fui(0.0)); - so_data (so, fui(0.0)); - so_data (so, fui(1.0)); - so_method(so, screen->rankine, 0x1f80, 16); - for (i=0; i<16; i++) { - so_data (so, (i==8) ? 0x0000ffff : 0); - } - - so_method(so, screen->rankine, 0x120, 3); - so_data (so, 0); - so_data (so, 1); - so_data (so, 2); - - so_method(so, screen->rankine, 0x1d88, 1); - so_data (so, 0x00001200); - - so_method(so, screen->rankine, NV34TCL_RC_ENABLE, 1); - so_data (so, 0); - - so_method(so, screen->rankine, NV34TCL_DEPTH_RANGE_NEAR, 2); - so_data (so, fui(0.0)); - so_data (so, fui(1.0)); - - so_method(so, screen->rankine, NV34TCL_MULTISAMPLE_CONTROL, 1); - so_data (so, 0xffff0000); - - /* enables use of vp rather than fixed-function somehow */ - so_method(so, screen->rankine, 0x1e94, 1); - so_data (so, 0x13); - - so_emit(chan, so); - so_ref(NULL, &so); - nouveau_pushbuf_flush(chan, 0); - - return pscreen; -} diff --git a/src/gallium/drivers/nv30/nv30_screen.h b/src/gallium/drivers/nv30/nv30_screen.h deleted file mode 100644 index 8591cd31cab..00000000000 --- a/src/gallium/drivers/nv30/nv30_screen.h +++ /dev/null @@ -1,41 +0,0 @@ -#ifndef __NV30_SCREEN_H__ -#define __NV30_SCREEN_H__ - -#include "nouveau/nouveau_screen.h" - -#include "nouveau/nv04_surface_2d.h" - -struct nv30_screen { - struct nouveau_screen base; - - struct nouveau_winsys *nvws; - - struct nv30_context *cur_ctx; - - /* HW graphics objects */ - struct nv04_surface_2d *eng2d; - struct nouveau_grobj *rankine; - struct nouveau_notifier *sync; - - /* Query object resources */ - struct nouveau_notifier *query; - struct nouveau_resource *query_heap; - - /* Vtxprog resources */ - struct nouveau_resource *vp_exec_heap; - struct nouveau_resource *vp_data_heap; - - /* Current 3D state of channel */ - struct nouveau_stateobj *state[NV30_STATE_MAX]; -}; - -static INLINE struct nv30_screen * -nv30_screen(struct pipe_screen *screen) -{ - return (struct nv30_screen *)screen; -} - -void -nv30_screen_init_transfer_functions(struct pipe_screen *pscreen); - -#endif diff --git a/src/gallium/drivers/nv30/nv30_shader.h b/src/gallium/drivers/nv30/nv30_shader.h deleted file mode 100644 index dd3a36f78f3..00000000000 --- a/src/gallium/drivers/nv30/nv30_shader.h +++ /dev/null @@ -1,490 +0,0 @@ -#ifndef __NV30_SHADER_H__ -#define __NV30_SHADER_H__ - -/* Vertex programs instruction set - * - * 128bit opcodes, split into 4 32-bit ones for ease of use. - * - * Non-native instructions - * ABS - MOV + NV40_VP_INST0_DEST_ABS - * POW - EX2 + MUL + LG2 - * SUB - ADD, second source negated - * SWZ - MOV - * XPD - - * - * Register access - * - Only one INPUT can be accessed per-instruction (move extras into TEMPs) - * - Only one CONST can be accessed per-instruction (move extras into TEMPs) - * - * Relative Addressing - * According to the value returned for - * MAX_PROGRAM_NATIVE_ADDRESS_REGISTERS_ARB - * - * there are only two address registers available. The destination in the - * ARL instruction is set to TEMP <n> (The temp isn't actually written). - * - * When using vanilla ARB_v_p, the proprietary driver will squish both the - * available ADDRESS regs into the first hardware reg in the X and Y - * components. - * - * To use an address reg as an index into consts, the CONST_SRC is set to - * (const_base + offset) and INDEX_CONST is set. - * - * To access the second address reg use ADDR_REG_SELECT_1. A particular - * component of the address regs is selected with ADDR_SWZ. - * - * Only one address register can be accessed per instruction. - * - * Conditional execution (see NV_vertex_program{2,3} for details) Conditional - * execution of an instruction is enabled by setting COND_TEST_ENABLE, and - * selecting the condition which will allow the test to pass with - * COND_{FL,LT,...}. It is possible to swizzle the values in the condition - * register, which allows for testing against an individual component. - * - * Branching: - * - * The BRA/CAL instructions seem to follow a slightly different opcode - * layout. The destination instruction ID (IADDR) overlaps a source field. - * Instruction ID's seem to be numbered based on the UPLOAD_FROM_ID FIFO - * command, and is incremented automatically on each UPLOAD_INST FIFO - * command. - * - * Conditional branching is achieved by using the condition tests described - * above. There doesn't appear to be dedicated looping instructions, but - * this can be done using a temp reg + conditional branching. - * - * Subroutines may be uploaded before the main program itself, but the first - * executed instruction is determined by the PROGRAM_START_ID FIFO command. - * - */ - -/* DWORD 0 */ - -#define NV30_VP_INST_ADDR_REG_SELECT_1 (1 << 24) -#define NV30_VP_INST_SRC2_ABS (1 << 23) /* guess */ -#define NV30_VP_INST_SRC1_ABS (1 << 22) /* guess */ -#define NV30_VP_INST_SRC0_ABS (1 << 21) /* guess */ -#define NV30_VP_INST_VEC_RESULT (1 << 20) -#define NV30_VP_INST_DEST_TEMP_ID_SHIFT 16 -#define NV30_VP_INST_DEST_TEMP_ID_MASK (0x0F << 16) -#define NV30_VP_INST_COND_UPDATE_ENABLE (1<<15) -#define NV30_VP_INST_VEC_DEST_TEMP_MASK (0xF << 16) -#define NV30_VP_INST_COND_TEST_ENABLE (1<<14) -#define NV30_VP_INST_COND_SHIFT 11 -#define NV30_VP_INST_COND_MASK (0x07 << 11) -# define NV30_VP_INST_COND_FL 0 /* guess */ -# define NV30_VP_INST_COND_LT 1 -# define NV30_VP_INST_COND_EQ 2 -# define NV30_VP_INST_COND_LE 3 -# define NV30_VP_INST_COND_GT 4 -# define NV30_VP_INST_COND_NE 5 -# define NV30_VP_INST_COND_GE 6 -# define NV30_VP_INST_COND_TR 7 /* guess */ -#define NV30_VP_INST_COND_SWZ_X_SHIFT 9 -#define NV30_VP_INST_COND_SWZ_X_MASK (0x03 << 9) -#define NV30_VP_INST_COND_SWZ_Y_SHIFT 7 -#define NV30_VP_INST_COND_SWZ_Y_MASK (0x03 << 7) -#define NV30_VP_INST_COND_SWZ_Z_SHIFT 5 -#define NV30_VP_INST_COND_SWZ_Z_MASK (0x03 << 5) -#define NV30_VP_INST_COND_SWZ_W_SHIFT 3 -#define NV30_VP_INST_COND_SWZ_W_MASK (0x03 << 3) -#define NV30_VP_INST_COND_SWZ_ALL_SHIFT 3 -#define NV30_VP_INST_COND_SWZ_ALL_MASK (0xFF << 3) -#define NV30_VP_INST_ADDR_SWZ_SHIFT 1 -#define NV30_VP_INST_ADDR_SWZ_MASK (0x03 << 1) -#define NV30_VP_INST_SCA_OPCODEH_SHIFT 0 -#define NV30_VP_INST_SCA_OPCODEH_MASK (0x01 << 0) - -/* DWORD 1 */ -#define NV30_VP_INST_SCA_OPCODEL_SHIFT 28 -#define NV30_VP_INST_SCA_OPCODEL_MASK (0x0F << 28) -# define NV30_VP_INST_OP_NOP 0x00 -# define NV30_VP_INST_OP_RCP 0x02 -# define NV30_VP_INST_OP_RCC 0x03 -# define NV30_VP_INST_OP_RSQ 0x04 -# define NV30_VP_INST_OP_EXP 0x05 -# define NV30_VP_INST_OP_LOG 0x06 -# define NV30_VP_INST_OP_LIT 0x07 -# define NV30_VP_INST_OP_BRA 0x09 -# define NV30_VP_INST_OP_CAL 0x0B -# define NV30_VP_INST_OP_RET 0x0C -# define NV30_VP_INST_OP_LG2 0x0D -# define NV30_VP_INST_OP_EX2 0x0E -# define NV30_VP_INST_OP_SIN 0x0F -# define NV30_VP_INST_OP_COS 0x10 -#define NV30_VP_INST_VEC_OPCODE_SHIFT 23 -#define NV30_VP_INST_VEC_OPCODE_MASK (0x1F << 23) -# define NV30_VP_INST_OP_NOPV 0x00 -# define NV30_VP_INST_OP_MOV 0x01 -# define NV30_VP_INST_OP_MUL 0x02 -# define NV30_VP_INST_OP_ADD 0x03 -# define NV30_VP_INST_OP_MAD 0x04 -# define NV30_VP_INST_OP_DP3 0x05 -# define NV30_VP_INST_OP_DP4 0x07 -# define NV30_VP_INST_OP_DPH 0x06 -# define NV30_VP_INST_OP_DST 0x08 -# define NV30_VP_INST_OP_MIN 0x09 -# define NV30_VP_INST_OP_MAX 0x0A -# define NV30_VP_INST_OP_SLT 0x0B -# define NV30_VP_INST_OP_SGE 0x0C -# define NV30_VP_INST_OP_ARL 0x0D -# define NV30_VP_INST_OP_FRC 0x0E -# define NV30_VP_INST_OP_FLR 0x0F -# define NV30_VP_INST_OP_SEQ 0x10 -# define NV30_VP_INST_OP_SFL 0x11 -# define NV30_VP_INST_OP_SGT 0x12 -# define NV30_VP_INST_OP_SLE 0x13 -# define NV30_VP_INST_OP_SNE 0x14 -# define NV30_VP_INST_OP_STR 0x15 -# define NV30_VP_INST_OP_SSG 0x16 -# define NV30_VP_INST_OP_ARR 0x17 -# define NV30_VP_INST_OP_ARA 0x18 -#define NV30_VP_INST_CONST_SRC_SHIFT 14 -#define NV30_VP_INST_CONST_SRC_MASK (0xFF << 14) -#define NV30_VP_INST_INPUT_SRC_SHIFT 9 /*NV20*/ -#define NV30_VP_INST_INPUT_SRC_MASK (0x0F << 9) /*NV20*/ -# define NV30_VP_INST_IN_POS 0 /* These seem to match the bindings specified in */ -# define NV30_VP_INST_IN_WEIGHT 1 /* the ARB_v_p spec (2.14.3.1) */ -# define NV30_VP_INST_IN_NORMAL 2 -# define NV30_VP_INST_IN_COL0 3 /* Should probably confirm them all though */ -# define NV30_VP_INST_IN_COL1 4 -# define NV30_VP_INST_IN_FOGC 5 -# define NV30_VP_INST_IN_TC0 8 -# define NV30_VP_INST_IN_TC(n) (8+n) -#define NV30_VP_INST_SRC0H_SHIFT 0 /*NV20*/ -#define NV30_VP_INST_SRC0H_MASK (0x1FF << 0) /*NV20*/ - -/* Please note: the IADDR fields overlap other fields because they are used - * only for branch instructions. See Branching: label above - * - * DWORD 2 - */ -#define NV30_VP_INST_SRC0L_SHIFT 26 /*NV20*/ -#define NV30_VP_INST_SRC0L_MASK (0x3F <<26) /* NV30_VP_SRC0_LOW_MASK << 26 */ -#define NV30_VP_INST_SRC1_SHIFT 11 /*NV20*/ -#define NV30_VP_INST_SRC1_MASK (0x7FFF<<11) /*NV20*/ -#define NV30_VP_INST_SRC2H_SHIFT 0 /*NV20*/ -#define NV30_VP_INST_SRC2H_MASK (0x7FF << 0) /* NV30_VP_SRC2_HIGH_MASK >> 4*/ -#define NV30_VP_INST_IADDR_SHIFT 2 -#define NV30_VP_INST_IADDR_MASK (0xF << 28) /* NV30_VP_SRC2_LOW_MASK << 28 */ - -/* DWORD 3 */ -#define NV30_VP_INST_SRC2L_SHIFT 28 /*NV20*/ -#define NV30_VP_INST_SRC2L_MASK (0x0F <<28) /*NV20*/ -#define NV30_VP_INST_STEMP_WRITEMASK_SHIFT 24 -#define NV30_VP_INST_STEMP_WRITEMASK_MASK (0x0F << 24) -#define NV30_VP_INST_VTEMP_WRITEMASK_SHIFT 20 -#define NV30_VP_INST_VTEMP_WRITEMASK_MASK (0x0F << 20) -#define NV30_VP_INST_SDEST_WRITEMASK_SHIFT 16 -#define NV30_VP_INST_SDEST_WRITEMASK_MASK (0x0F << 16) -#define NV30_VP_INST_VDEST_WRITEMASK_SHIFT 12 /*NV20*/ -#define NV30_VP_INST_VDEST_WRITEMASK_MASK (0x0F << 12) /*NV20*/ -#define NV30_VP_INST_DEST_SHIFT 2 -#define NV30_VP_INST_DEST_MASK (0x0F << 2) -# define NV30_VP_INST_DEST_POS 0 -# define NV30_VP_INST_DEST_BFC0 1 -# define NV30_VP_INST_DEST_BFC1 2 -# define NV30_VP_INST_DEST_COL0 3 -# define NV30_VP_INST_DEST_COL1 4 -# define NV30_VP_INST_DEST_FOGC 5 -# define NV30_VP_INST_DEST_PSZ 6 -# define NV30_VP_INST_DEST_TC(n) (8+n) - -#define NV30_VP_INST_LAST (1 << 0) - -/* Useful to split the source selection regs into their pieces */ -#define NV30_VP_SRC0_HIGH_SHIFT 6 -#define NV30_VP_SRC0_HIGH_MASK 0x00007FC0 -#define NV30_VP_SRC0_LOW_MASK 0x0000003F -#define NV30_VP_SRC2_HIGH_SHIFT 4 -#define NV30_VP_SRC2_HIGH_MASK 0x00007FF0 -#define NV30_VP_SRC2_LOW_MASK 0x0000000F - - -/* Source-register definition - matches NV20 exactly */ -#define NV30_VP_SRC_NEGATE (1<<14) -#define NV30_VP_SRC_SWZ_X_SHIFT 12 -#define NV30_VP_SRC_REG_SWZ_X_MASK (0x03 <<12) -#define NV30_VP_SRC_SWZ_Y_SHIFT 10 -#define NV30_VP_SRC_REG_SWZ_Y_MASK (0x03 <<10) -#define NV30_VP_SRC_SWZ_Z_SHIFT 8 -#define NV30_VP_SRC_REG_SWZ_Z_MASK (0x03 << 8) -#define NV30_VP_SRC_SWZ_W_SHIFT 6 -#define NV30_VP_SRC_REG_SWZ_W_MASK (0x03 << 6) -#define NV30_VP_SRC_REG_SWZ_ALL_SHIFT 6 -#define NV30_VP_SRC_REG_SWZ_ALL_MASK (0xFF << 6) -#define NV30_VP_SRC_TEMP_SRC_SHIFT 2 -#define NV30_VP_SRC_REG_TEMP_ID_MASK (0x0F << 0) -#define NV30_VP_SRC_REG_TYPE_SHIFT 0 -#define NV30_VP_SRC_REG_TYPE_MASK (0x03 << 0) -#define NV30_VP_SRC_REG_TYPE_TEMP 1 -#define NV30_VP_SRC_REG_TYPE_INPUT 2 -#define NV30_VP_SRC_REG_TYPE_CONST 3 /* guess */ - -/* - * Each fragment program opcode appears to be comprised of 4 32-bit values. - * - * 0 - Opcode, output reg/mask, ATTRIB source - * 1 - Source 0 - * 2 - Source 1 - * 3 - Source 2 - * - * There appears to be no special difference between result regs and temp regs. - * result.color == R0.xyzw - * result.depth == R1.z - * When the fragprog contains instructions to write depth, NV30_TCL_PRIMITIVE_3D_UNK1D78=0 - * otherwise it is set to 1. - * - * Constants are inserted directly after the instruction that uses them. - * - * It appears that it's not possible to use two input registers in one - * instruction as the input sourcing is done in the instruction dword - * and not the source selection dwords. As such instructions such as: - * - * ADD result.color, fragment.color, fragment.texcoord[0]; - * - * must be split into two MOV's and then an ADD (nvidia does this) but - * I'm not sure why it's not just one MOV and then source the second input - * in the ADD instruction.. - * - * Negation of the full source is done with NV30_FP_REG_NEGATE, arbitrary - * negation requires multiplication with a const. - * - * Arbitrary swizzling is supported with the exception of SWIZZLE_ZERO/SWIZZLE_ONE - * The temp/result regs appear to be initialised to (0.0, 0.0, 0.0, 0.0) as SWIZZLE_ZERO - * is implemented simply by not writing to the relevant components of the destination. - * - * Conditional execution - * TODO - * - * Non-native instructions: - * LIT - * LRP - MAD+MAD - * SUB - ADD, negate second source - * RSQ - LG2 + EX2 - * POW - LG2 + MUL + EX2 - * SCS - COS + SIN - * XPD - */ - -//== Opcode / Destination selection == -#define NV30_FP_OP_PROGRAM_END (1 << 0) -#define NV30_FP_OP_OUT_REG_SHIFT 1 -#define NV30_FP_OP_OUT_REG_MASK (31 << 1) /* uncertain */ -/* Needs to be set when writing outputs to get expected result.. */ -#define NV30_FP_OP_OUT_REG_HALF (1 << 7) -#define NV30_FP_OP_COND_WRITE_ENABLE (1 << 8) -#define NV30_FP_OP_OUTMASK_SHIFT 9 -#define NV30_FP_OP_OUTMASK_MASK (0xF << 9) -# define NV30_FP_OP_OUT_X (1<<9) -# define NV30_FP_OP_OUT_Y (1<<10) -# define NV30_FP_OP_OUT_Z (1<<11) -# define NV30_FP_OP_OUT_W (1<<12) -/* Uncertain about these, especially the input_src values.. it's possible that - * they can be dynamically changed. - */ -#define NV30_FP_OP_INPUT_SRC_SHIFT 13 -#define NV30_FP_OP_INPUT_SRC_MASK (15 << 13) -# define NV30_FP_OP_INPUT_SRC_POSITION 0x0 -# define NV30_FP_OP_INPUT_SRC_COL0 0x1 -# define NV30_FP_OP_INPUT_SRC_COL1 0x2 -# define NV30_FP_OP_INPUT_SRC_FOGC 0x3 -# define NV30_FP_OP_INPUT_SRC_TC0 0x4 -# define NV30_FP_OP_INPUT_SRC_TC(n) (0x4 + n) -#define NV30_FP_OP_TEX_UNIT_SHIFT 17 -#define NV30_FP_OP_TEX_UNIT_MASK (0xF << 17) /* guess */ -#define NV30_FP_OP_PRECISION_SHIFT 22 -#define NV30_FP_OP_PRECISION_MASK (3 << 22) -# define NV30_FP_PRECISION_FP32 0 -# define NV30_FP_PRECISION_FP16 1 -# define NV30_FP_PRECISION_FX12 2 -#define NV30_FP_OP_OPCODE_SHIFT 24 -#define NV30_FP_OP_OPCODE_MASK (0x3F << 24) -# define NV30_FP_OP_OPCODE_NOP 0x00 -# define NV30_FP_OP_OPCODE_MOV 0x01 -# define NV30_FP_OP_OPCODE_MUL 0x02 -# define NV30_FP_OP_OPCODE_ADD 0x03 -# define NV30_FP_OP_OPCODE_MAD 0x04 -# define NV30_FP_OP_OPCODE_DP3 0x05 -# define NV30_FP_OP_OPCODE_DP4 0x06 -# define NV30_FP_OP_OPCODE_DST 0x07 -# define NV30_FP_OP_OPCODE_MIN 0x08 -# define NV30_FP_OP_OPCODE_MAX 0x09 -# define NV30_FP_OP_OPCODE_SLT 0x0A -# define NV30_FP_OP_OPCODE_SGE 0x0B -# define NV30_FP_OP_OPCODE_SLE 0x0C -# define NV30_FP_OP_OPCODE_SGT 0x0D -# define NV30_FP_OP_OPCODE_SNE 0x0E -# define NV30_FP_OP_OPCODE_SEQ 0x0F -# define NV30_FP_OP_OPCODE_FRC 0x10 -# define NV30_FP_OP_OPCODE_FLR 0x11 -# define NV30_FP_OP_OPCODE_KIL 0x12 -# define NV30_FP_OP_OPCODE_PK4B 0x13 -# define NV30_FP_OP_OPCODE_UP4B 0x14 -# define NV30_FP_OP_OPCODE_DDX 0x15 /* can only write XY */ -# define NV30_FP_OP_OPCODE_DDY 0x16 /* can only write XY */ -# define NV30_FP_OP_OPCODE_TEX 0x17 -# define NV30_FP_OP_OPCODE_TXP 0x18 -# define NV30_FP_OP_OPCODE_TXD 0x19 -# define NV30_FP_OP_OPCODE_RCP 0x1A -# define NV30_FP_OP_OPCODE_RSQ 0x1B -# define NV30_FP_OP_OPCODE_EX2 0x1C -# define NV30_FP_OP_OPCODE_LG2 0x1D -# define NV30_FP_OP_OPCODE_LIT 0x1E -# define NV30_FP_OP_OPCODE_LRP 0x1F -# define NV30_FP_OP_OPCODE_STR 0x20 -# define NV30_FP_OP_OPCODE_SFL 0x21 -# define NV30_FP_OP_OPCODE_COS 0x22 -# define NV30_FP_OP_OPCODE_SIN 0x23 -# define NV30_FP_OP_OPCODE_PK2H 0x24 -# define NV30_FP_OP_OPCODE_UP2H 0x25 -# define NV30_FP_OP_OPCODE_POW 0x26 -# define NV30_FP_OP_OPCODE_PK4UB 0x27 -# define NV30_FP_OP_OPCODE_UP4UB 0x28 -# define NV30_FP_OP_OPCODE_PK2US 0x29 -# define NV30_FP_OP_OPCODE_UP2US 0x2A -# define NV30_FP_OP_OPCODE_DP2A 0x2E -# define NV30_FP_OP_OPCODE_TXB 0x31 -# define NV30_FP_OP_OPCODE_RFL 0x36 -# define NV30_FP_OP_OPCODE_DIV 0x3A -#define NV30_FP_OP_OUT_SAT (1 << 31) - -/* high order bits of SRC0 */ -#define NV30_FP_OP_OUT_ABS (1 << 29) -#define NV30_FP_OP_COND_SWZ_W_SHIFT 27 -#define NV30_FP_OP_COND_SWZ_W_MASK (3 << 27) -#define NV30_FP_OP_COND_SWZ_Z_SHIFT 25 -#define NV30_FP_OP_COND_SWZ_Z_MASK (3 << 25) -#define NV30_FP_OP_COND_SWZ_Y_SHIFT 23 -#define NV30_FP_OP_COND_SWZ_Y_MASK (3 << 23) -#define NV30_FP_OP_COND_SWZ_X_SHIFT 21 -#define NV30_FP_OP_COND_SWZ_X_MASK (3 << 21) -#define NV30_FP_OP_COND_SWZ_ALL_SHIFT 21 -#define NV30_FP_OP_COND_SWZ_ALL_MASK (0xFF << 21) -#define NV30_FP_OP_COND_SHIFT 18 -#define NV30_FP_OP_COND_MASK (0x07 << 18) -# define NV30_FP_OP_COND_FL 0 -# define NV30_FP_OP_COND_LT 1 -# define NV30_FP_OP_COND_EQ 2 -# define NV30_FP_OP_COND_LE 3 -# define NV30_FP_OP_COND_GT 4 -# define NV30_FP_OP_COND_NE 5 -# define NV30_FP_OP_COND_GE 6 -# define NV30_FP_OP_COND_TR 7 - -/* high order bits of SRC1 */ -#define NV30_FP_OP_DST_SCALE_SHIFT 28 -#define NV30_FP_OP_DST_SCALE_MASK (3 << 28) -#define NV30_FP_OP_DST_SCALE_1X 0 -#define NV30_FP_OP_DST_SCALE_2X 1 -#define NV30_FP_OP_DST_SCALE_4X 2 -#define NV30_FP_OP_DST_SCALE_8X 3 -#define NV30_FP_OP_DST_SCALE_INV_2X 5 -#define NV30_FP_OP_DST_SCALE_INV_4X 6 -#define NV30_FP_OP_DST_SCALE_INV_8X 7 - - -/* high order bits of SRC2 */ -#define NV30_FP_OP_INDEX_INPUT (1 << 30) - -//== Register selection == -#define NV30_FP_REG_TYPE_SHIFT 0 -#define NV30_FP_REG_TYPE_MASK (3 << 0) -# define NV30_FP_REG_TYPE_TEMP 0 -# define NV30_FP_REG_TYPE_INPUT 1 -# define NV30_FP_REG_TYPE_CONST 2 -#define NV30_FP_REG_SRC_SHIFT 2 /* uncertain */ -#define NV30_FP_REG_SRC_MASK (31 << 2) -#define NV30_FP_REG_SRC_HALF (1 << 8) -#define NV30_FP_REG_SWZ_ALL_SHIFT 9 -#define NV30_FP_REG_SWZ_ALL_MASK (255 << 9) -#define NV30_FP_REG_SWZ_X_SHIFT 9 -#define NV30_FP_REG_SWZ_X_MASK (3 << 9) -#define NV30_FP_REG_SWZ_Y_SHIFT 11 -#define NV30_FP_REG_SWZ_Y_MASK (3 << 11) -#define NV30_FP_REG_SWZ_Z_SHIFT 13 -#define NV30_FP_REG_SWZ_Z_MASK (3 << 13) -#define NV30_FP_REG_SWZ_W_SHIFT 15 -#define NV30_FP_REG_SWZ_W_MASK (3 << 15) -# define NV30_FP_SWIZZLE_X 0 -# define NV30_FP_SWIZZLE_Y 1 -# define NV30_FP_SWIZZLE_Z 2 -# define NV30_FP_SWIZZLE_W 3 -#define NV30_FP_REG_NEGATE (1 << 17) - -#define NV30SR_NONE 0 -#define NV30SR_OUTPUT 1 -#define NV30SR_INPUT 2 -#define NV30SR_TEMP 3 -#define NV30SR_CONST 4 - -struct nv30_sreg { - int type; - int index; - - int dst_scale; - - int negate; - int abs; - int swz[4]; - - int cc_update; - int cc_update_reg; - int cc_test; - int cc_test_reg; - int cc_swz[4]; -}; - -static INLINE struct nv30_sreg -nv30_sr(int type, int index) -{ - struct nv30_sreg temp = { - .type = type, - .index = index, - .dst_scale = DEF_SCALE, - .abs = 0, - .negate = 0, - .swz = { 0, 1, 2, 3 }, - .cc_update = 0, - .cc_update_reg = 0, - .cc_test = DEF_CTEST, - .cc_test_reg = 0, - .cc_swz = { 0, 1, 2, 3 }, - }; - return temp; -} - -static INLINE struct nv30_sreg -nv30_sr_swz(struct nv30_sreg src, int x, int y, int z, int w) -{ - struct nv30_sreg dst = src; - - dst.swz[SWZ_X] = src.swz[x]; - dst.swz[SWZ_Y] = src.swz[y]; - dst.swz[SWZ_Z] = src.swz[z]; - dst.swz[SWZ_W] = src.swz[w]; - return dst; -} - -static INLINE struct nv30_sreg -nv30_sr_neg(struct nv30_sreg src) -{ - src.negate = !src.negate; - return src; -} - -static INLINE struct nv30_sreg -nv30_sr_abs(struct nv30_sreg src) -{ - src.abs = 1; - return src; -} - -static INLINE struct nv30_sreg -nv30_sr_scale(struct nv30_sreg src, int scale) -{ - src.dst_scale = scale; - return src; -} - -#endif diff --git a/src/gallium/drivers/nv30/nv30_state.c b/src/gallium/drivers/nv30/nv30_state.c deleted file mode 100644 index d911c807074..00000000000 --- a/src/gallium/drivers/nv30/nv30_state.c +++ /dev/null @@ -1,728 +0,0 @@ -#include "pipe/p_state.h" -#include "pipe/p_defines.h" -#include "util/u_inlines.h" - -#include "tgsi/tgsi_parse.h" - -#include "nv30_context.h" -#include "nv30_state.h" - -static void * -nv30_blend_state_create(struct pipe_context *pipe, - const struct pipe_blend_state *cso) -{ - struct nv30_context *nv30 = nv30_context(pipe); - struct nouveau_grobj *rankine = nv30->screen->rankine; - struct nv30_blend_state *bso = CALLOC(1, sizeof(*bso)); - struct nouveau_stateobj *so = so_new(5, 8, 0); - - if (cso->rt[0].blend_enable) { - so_method(so, rankine, NV34TCL_BLEND_FUNC_ENABLE, 3); - so_data (so, 1); - so_data (so, (nvgl_blend_func(cso->rt[0].alpha_src_factor) << 16) | - nvgl_blend_func(cso->rt[0].rgb_src_factor)); - so_data (so, nvgl_blend_func(cso->rt[0].alpha_dst_factor) << 16 | - nvgl_blend_func(cso->rt[0].rgb_dst_factor)); - /* FIXME: Gallium assumes GL_EXT_blend_func_separate. - It is not the case for NV30 */ - so_method(so, rankine, NV34TCL_BLEND_EQUATION, 1); - so_data (so, nvgl_blend_eqn(cso->rt[0].rgb_func)); - } else { - so_method(so, rankine, NV34TCL_BLEND_FUNC_ENABLE, 1); - so_data (so, 0); - } - - so_method(so, rankine, NV34TCL_COLOR_MASK, 1); - so_data (so, (((cso->rt[0].colormask & PIPE_MASK_A) ? (0x01 << 24) : 0) | - ((cso->rt[0].colormask & PIPE_MASK_R) ? (0x01 << 16) : 0) | - ((cso->rt[0].colormask & PIPE_MASK_G) ? (0x01 << 8) : 0) | - ((cso->rt[0].colormask & PIPE_MASK_B) ? (0x01 << 0) : 0))); - - if (cso->logicop_enable) { - so_method(so, rankine, NV34TCL_COLOR_LOGIC_OP_ENABLE, 2); - so_data (so, 1); - so_data (so, nvgl_logicop_func(cso->logicop_func)); - } else { - so_method(so, rankine, NV34TCL_COLOR_LOGIC_OP_ENABLE, 1); - so_data (so, 0); - } - - so_method(so, rankine, NV34TCL_DITHER_ENABLE, 1); - so_data (so, cso->dither ? 1 : 0); - - so_ref(so, &bso->so); - so_ref(NULL, &so); - bso->pipe = *cso; - return (void *)bso; -} - -static void -nv30_blend_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nv30_context *nv30 = nv30_context(pipe); - - nv30->blend = hwcso; - nv30->dirty |= NV30_NEW_BLEND; -} - -static void -nv30_blend_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nv30_blend_state *bso = hwcso; - - so_ref(NULL, &bso->so); - FREE(bso); -} - - -static INLINE unsigned -wrap_mode(unsigned wrap) { - unsigned ret; - - switch (wrap) { - case PIPE_TEX_WRAP_REPEAT: - ret = NV34TCL_TX_WRAP_S_REPEAT; - break; - case PIPE_TEX_WRAP_MIRROR_REPEAT: - ret = NV34TCL_TX_WRAP_S_MIRRORED_REPEAT; - break; - case PIPE_TEX_WRAP_CLAMP_TO_EDGE: - ret = NV34TCL_TX_WRAP_S_CLAMP_TO_EDGE; - break; - case PIPE_TEX_WRAP_CLAMP_TO_BORDER: - ret = NV34TCL_TX_WRAP_S_CLAMP_TO_BORDER; - break; - case PIPE_TEX_WRAP_CLAMP: - ret = NV34TCL_TX_WRAP_S_CLAMP; - break; -/* case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: - ret = NV34TCL_TX_WRAP_S_MIRROR_CLAMP_TO_EDGE; - break; - case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: - ret = NV34TCL_TX_WRAP_S_MIRROR_CLAMP_TO_BORDER; - break; - case PIPE_TEX_WRAP_MIRROR_CLAMP: - ret = NV34TCL_TX_WRAP_S_MIRROR_CLAMP; - break;*/ - default: - NOUVEAU_ERR("unknown wrap mode: %d\n", wrap); - ret = NV34TCL_TX_WRAP_S_REPEAT; - break; - } - - return ret >> NV34TCL_TX_WRAP_S_SHIFT; -} - -static void * -nv30_sampler_state_create(struct pipe_context *pipe, - const struct pipe_sampler_state *cso) -{ - struct nv30_sampler_state *ps; - uint32_t filter = 0; - - ps = MALLOC(sizeof(struct nv30_sampler_state)); - - ps->fmt = 0; - /* TODO: Not all RECTs formats have this bit set, bits 15-8 of format - are the tx format to use. We should store normalized coord flag - in sampler state structure, and set appropriate format in - nvxx_fragtex_build() - */ - /*NV34TCL_TX_FORMAT_RECT*/ - /*if (!cso->normalized_coords) { - ps->fmt |= (1<<14) ; - }*/ - - ps->wrap = ((wrap_mode(cso->wrap_s) << NV34TCL_TX_WRAP_S_SHIFT) | - (wrap_mode(cso->wrap_t) << NV34TCL_TX_WRAP_T_SHIFT) | - (wrap_mode(cso->wrap_r) << NV34TCL_TX_WRAP_R_SHIFT)); - - ps->en = 0; - - if (cso->max_anisotropy >= 8) { - ps->en |= NV34TCL_TX_ENABLE_ANISO_8X; - } else - if (cso->max_anisotropy >= 4) { - ps->en |= NV34TCL_TX_ENABLE_ANISO_4X; - } else - if (cso->max_anisotropy >= 2) { - ps->en |= NV34TCL_TX_ENABLE_ANISO_2X; - } - - switch (cso->mag_img_filter) { - case PIPE_TEX_FILTER_LINEAR: - filter |= NV34TCL_TX_FILTER_MAGNIFY_LINEAR; - break; - case PIPE_TEX_FILTER_NEAREST: - default: - filter |= NV34TCL_TX_FILTER_MAGNIFY_NEAREST; - break; - } - - switch (cso->min_img_filter) { - case PIPE_TEX_FILTER_LINEAR: - switch (cso->min_mip_filter) { - case PIPE_TEX_MIPFILTER_NEAREST: - filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST; - break; - case PIPE_TEX_MIPFILTER_LINEAR: - filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR; - break; - case PIPE_TEX_MIPFILTER_NONE: - default: - filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR; - break; - } - break; - case PIPE_TEX_FILTER_NEAREST: - default: - switch (cso->min_mip_filter) { - case PIPE_TEX_MIPFILTER_NEAREST: - filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST; - break; - case PIPE_TEX_MIPFILTER_LINEAR: - filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR; - break; - case PIPE_TEX_MIPFILTER_NONE: - default: - filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST; - break; - } - break; - } - - ps->filt = filter; - - { - float limit; - - limit = CLAMP(cso->lod_bias, -16.0, 15.0); - ps->filt |= (int)(cso->lod_bias * 256.0) & 0x1fff; - - limit = CLAMP(cso->max_lod, 0.0, 15.0); - ps->en |= (int)(limit) << 14 /*NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT*/; - - limit = CLAMP(cso->min_lod, 0.0, 15.0); - ps->en |= (int)(limit) << 26 /*NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT*/; - } - - if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) { - switch (cso->compare_func) { - case PIPE_FUNC_NEVER: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_NEVER; - break; - case PIPE_FUNC_GREATER: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_GREATER; - break; - case PIPE_FUNC_EQUAL: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_EQUAL; - break; - case PIPE_FUNC_GEQUAL: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_GEQUAL; - break; - case PIPE_FUNC_LESS: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_LESS; - break; - case PIPE_FUNC_NOTEQUAL: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_NOTEQUAL; - break; - case PIPE_FUNC_LEQUAL: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_LEQUAL; - break; - case PIPE_FUNC_ALWAYS: - ps->wrap |= NV34TCL_TX_WRAP_RCOMP_ALWAYS; - break; - default: - break; - } - } - - ps->bcol = ((float_to_ubyte(cso->border_color[3]) << 24) | - (float_to_ubyte(cso->border_color[0]) << 16) | - (float_to_ubyte(cso->border_color[1]) << 8) | - (float_to_ubyte(cso->border_color[2]) << 0)); - - return (void *)ps; -} - -static void -nv30_sampler_state_bind(struct pipe_context *pipe, unsigned nr, void **sampler) -{ - struct nv30_context *nv30 = nv30_context(pipe); - unsigned unit; - - for (unit = 0; unit < nr; unit++) { - nv30->tex_sampler[unit] = sampler[unit]; - nv30->dirty_samplers |= (1 << unit); - } - - for (unit = nr; unit < nv30->nr_samplers; unit++) { - nv30->tex_sampler[unit] = NULL; - nv30->dirty_samplers |= (1 << unit); - } - - nv30->nr_samplers = nr; - nv30->dirty |= NV30_NEW_SAMPLER; -} - -static void -nv30_sampler_state_delete(struct pipe_context *pipe, void *hwcso) -{ - FREE(hwcso); -} - -static void -nv30_set_sampler_texture(struct pipe_context *pipe, unsigned nr, - struct pipe_texture **miptree) -{ - struct nv30_context *nv30 = nv30_context(pipe); - unsigned unit; - - for (unit = 0; unit < nr; unit++) { - pipe_texture_reference((struct pipe_texture **) - &nv30->tex_miptree[unit], miptree[unit]); - nv30->dirty_samplers |= (1 << unit); - } - - for (unit = nr; unit < nv30->nr_textures; unit++) { - pipe_texture_reference((struct pipe_texture **) - &nv30->tex_miptree[unit], NULL); - nv30->dirty_samplers |= (1 << unit); - } - - nv30->nr_textures = nr; - nv30->dirty |= NV30_NEW_SAMPLER; -} - -static void * -nv30_rasterizer_state_create(struct pipe_context *pipe, - const struct pipe_rasterizer_state *cso) -{ - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_rasterizer_state *rsso = CALLOC(1, sizeof(*rsso)); - struct nouveau_stateobj *so = so_new(9, 19, 0); - struct nouveau_grobj *rankine = nv30->screen->rankine; - - /*XXX: ignored: - * light_twoside - * point_smooth -nohw - * multisample - */ - - so_method(so, rankine, NV34TCL_SHADE_MODEL, 1); - so_data (so, cso->flatshade ? NV34TCL_SHADE_MODEL_FLAT : - NV34TCL_SHADE_MODEL_SMOOTH); - - so_method(so, rankine, NV34TCL_LINE_WIDTH, 2); - so_data (so, (unsigned char)(cso->line_width * 8.0) & 0xff); - so_data (so, cso->line_smooth ? 1 : 0); - so_method(so, rankine, NV34TCL_LINE_STIPPLE_ENABLE, 2); - so_data (so, cso->line_stipple_enable ? 1 : 0); - so_data (so, (cso->line_stipple_pattern << 16) | - cso->line_stipple_factor); - - so_method(so, rankine, NV34TCL_POINT_SIZE, 1); - so_data (so, fui(cso->point_size)); - - so_method(so, rankine, NV34TCL_POLYGON_MODE_FRONT, 6); - if (cso->front_winding == PIPE_WINDING_CCW) { - so_data(so, nvgl_polygon_mode(cso->fill_ccw)); - so_data(so, nvgl_polygon_mode(cso->fill_cw)); - switch (cso->cull_mode) { - case PIPE_WINDING_CCW: - so_data(so, NV34TCL_CULL_FACE_FRONT); - break; - case PIPE_WINDING_CW: - so_data(so, NV34TCL_CULL_FACE_BACK); - break; - case PIPE_WINDING_BOTH: - so_data(so, NV34TCL_CULL_FACE_FRONT_AND_BACK); - break; - default: - so_data(so, NV34TCL_CULL_FACE_BACK); - break; - } - so_data(so, NV34TCL_FRONT_FACE_CCW); - } else { - so_data(so, nvgl_polygon_mode(cso->fill_cw)); - so_data(so, nvgl_polygon_mode(cso->fill_ccw)); - switch (cso->cull_mode) { - case PIPE_WINDING_CCW: - so_data(so, NV34TCL_CULL_FACE_BACK); - break; - case PIPE_WINDING_CW: - so_data(so, NV34TCL_CULL_FACE_FRONT); - break; - case PIPE_WINDING_BOTH: - so_data(so, NV34TCL_CULL_FACE_FRONT_AND_BACK); - break; - default: - so_data(so, NV34TCL_CULL_FACE_BACK); - break; - } - so_data(so, NV34TCL_FRONT_FACE_CW); - } - so_data(so, cso->poly_smooth ? 1 : 0); - so_data(so, (cso->cull_mode != PIPE_WINDING_NONE) ? 1 : 0); - - so_method(so, rankine, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); - so_data (so, cso->poly_stipple_enable ? 1 : 0); - - so_method(so, rankine, NV34TCL_POLYGON_OFFSET_POINT_ENABLE, 3); - if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_POINT) || - (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_POINT)) - so_data(so, 1); - else - so_data(so, 0); - if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_LINE) || - (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_LINE)) - so_data(so, 1); - else - so_data(so, 0); - if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_FILL) || - (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_FILL)) - so_data(so, 1); - else - so_data(so, 0); - if (cso->offset_cw || cso->offset_ccw) { - so_method(so, rankine, NV34TCL_POLYGON_OFFSET_FACTOR, 2); - so_data (so, fui(cso->offset_scale)); - so_data (so, fui(cso->offset_units * 2)); - } - - so_method(so, rankine, NV34TCL_POINT_SPRITE, 1); - if (cso->point_quad_rasterization) { - unsigned psctl = (1 << 0), i; - - for (i = 0; i < 8; i++) { - if ((cso->sprite_coord_enable >> i) & 1) - psctl |= (1 << (8 + i)); - } - - so_data(so, psctl); - } else { - so_data(so, 0); - } - - so_ref(so, &rsso->so); - so_ref(NULL, &so); - rsso->pipe = *cso; - return (void *)rsso; -} - -static void -nv30_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nv30_context *nv30 = nv30_context(pipe); - - nv30->rasterizer = hwcso; - nv30->dirty |= NV30_NEW_RAST; - /*nv30->draw_dirty |= NV30_NEW_RAST;*/ -} - -static void -nv30_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nv30_rasterizer_state *rsso = hwcso; - - so_ref(NULL, &rsso->so); - FREE(rsso); -} - -static void * -nv30_depth_stencil_alpha_state_create(struct pipe_context *pipe, - const struct pipe_depth_stencil_alpha_state *cso) -{ - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso)); - struct nouveau_stateobj *so = so_new(6, 20, 0); - struct nouveau_grobj *rankine = nv30->screen->rankine; - - so_method(so, rankine, NV34TCL_DEPTH_FUNC, 3); - so_data (so, nvgl_comparison_op(cso->depth.func)); - so_data (so, cso->depth.writemask ? 1 : 0); - so_data (so, cso->depth.enabled ? 1 : 0); - - so_method(so, rankine, NV34TCL_ALPHA_FUNC_ENABLE, 3); - so_data (so, cso->alpha.enabled ? 1 : 0); - so_data (so, nvgl_comparison_op(cso->alpha.func)); - so_data (so, float_to_ubyte(cso->alpha.ref_value)); - - if (cso->stencil[0].enabled) { - so_method(so, rankine, NV34TCL_STENCIL_FRONT_ENABLE, 3); - so_data (so, cso->stencil[0].enabled ? 1 : 0); - so_data (so, cso->stencil[0].writemask); - so_data (so, nvgl_comparison_op(cso->stencil[0].func)); - so_method(so, rankine, NV34TCL_STENCIL_FRONT_FUNC_MASK, 4); - so_data (so, cso->stencil[0].valuemask); - so_data (so, nvgl_stencil_op(cso->stencil[0].fail_op)); - so_data (so, nvgl_stencil_op(cso->stencil[0].zfail_op)); - so_data (so, nvgl_stencil_op(cso->stencil[0].zpass_op)); - } else { - so_method(so, rankine, NV34TCL_STENCIL_FRONT_ENABLE, 1); - so_data (so, 0); - } - - if (cso->stencil[1].enabled) { - so_method(so, rankine, NV34TCL_STENCIL_BACK_ENABLE, 3); - so_data (so, cso->stencil[1].enabled ? 1 : 0); - so_data (so, cso->stencil[1].writemask); - so_data (so, nvgl_comparison_op(cso->stencil[1].func)); - so_method(so, rankine, NV34TCL_STENCIL_BACK_FUNC_MASK, 4); - so_data (so, cso->stencil[1].valuemask); - so_data (so, nvgl_stencil_op(cso->stencil[1].fail_op)); - so_data (so, nvgl_stencil_op(cso->stencil[1].zfail_op)); - so_data (so, nvgl_stencil_op(cso->stencil[1].zpass_op)); - } else { - so_method(so, rankine, NV34TCL_STENCIL_BACK_ENABLE, 1); - so_data (so, 0); - } - - so_ref(so, &zsaso->so); - so_ref(NULL, &so); - zsaso->pipe = *cso; - return (void *)zsaso; -} - -static void -nv30_depth_stencil_alpha_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nv30_context *nv30 = nv30_context(pipe); - - nv30->zsa = hwcso; - nv30->dirty |= NV30_NEW_ZSA; -} - -static void -nv30_depth_stencil_alpha_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nv30_zsa_state *zsaso = hwcso; - - so_ref(NULL, &zsaso->so); - FREE(zsaso); -} - -static void * -nv30_vp_state_create(struct pipe_context *pipe, - const struct pipe_shader_state *cso) -{ - /*struct nv30_context *nv30 = nv30_context(pipe);*/ - struct nv30_vertex_program *vp; - - vp = CALLOC(1, sizeof(struct nv30_vertex_program)); - vp->pipe.tokens = tgsi_dup_tokens(cso->tokens); - /*vp->draw = draw_create_vertex_shader(nv30->draw, &vp->pipe);*/ - - return (void *)vp; -} - -static void -nv30_vp_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nv30_context *nv30 = nv30_context(pipe); - - nv30->vertprog = hwcso; - nv30->dirty |= NV30_NEW_VERTPROG; - /*nv30->draw_dirty |= NV30_NEW_VERTPROG;*/ -} - -static void -nv30_vp_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_vertex_program *vp = hwcso; - - /*draw_delete_vertex_shader(nv30->draw, vp->draw);*/ - nv30_vertprog_destroy(nv30, vp); - FREE((void*)vp->pipe.tokens); - FREE(vp); -} - -static void * -nv30_fp_state_create(struct pipe_context *pipe, - const struct pipe_shader_state *cso) -{ - struct nv30_fragment_program *fp; - - fp = CALLOC(1, sizeof(struct nv30_fragment_program)); - fp->pipe.tokens = tgsi_dup_tokens(cso->tokens); - - tgsi_scan_shader(fp->pipe.tokens, &fp->info); - - return (void *)fp; -} - -static void -nv30_fp_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nv30_context *nv30 = nv30_context(pipe); - - nv30->fragprog = hwcso; - nv30->dirty |= NV30_NEW_FRAGPROG; -} - -static void -nv30_fp_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_fragment_program *fp = hwcso; - - nv30_fragprog_destroy(nv30, fp); - FREE((void*)fp->pipe.tokens); - FREE(fp); -} - -static void -nv30_set_blend_color(struct pipe_context *pipe, - const struct pipe_blend_color *bcol) -{ - struct nv30_context *nv30 = nv30_context(pipe); - - nv30->blend_colour = *bcol; - nv30->dirty |= NV30_NEW_BCOL; -} - -static void -nv30_set_stencil_ref(struct pipe_context *pipe, - const struct pipe_stencil_ref *sr) -{ - struct nv30_context *nv30 = nv30_context(pipe); - - nv30->stencil_ref = *sr; - nv30->dirty |= NV30_NEW_SR; -} - -static void -nv30_set_clip_state(struct pipe_context *pipe, - const struct pipe_clip_state *clip) -{ -} - -static void -nv30_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_buffer *buf ) -{ - struct nv30_context *nv30 = nv30_context(pipe); - - nv30->constbuf[shader] = buf; - nv30->constbuf_nr[shader] = buf->size / (4 * sizeof(float)); - - if (shader == PIPE_SHADER_VERTEX) { - nv30->dirty |= NV30_NEW_VERTPROG; - } else - if (shader == PIPE_SHADER_FRAGMENT) { - nv30->dirty |= NV30_NEW_FRAGPROG; - } -} - -static void -nv30_set_framebuffer_state(struct pipe_context *pipe, - const struct pipe_framebuffer_state *fb) -{ - struct nv30_context *nv30 = nv30_context(pipe); - - nv30->framebuffer = *fb; - nv30->dirty |= NV30_NEW_FB; -} - -static void -nv30_set_polygon_stipple(struct pipe_context *pipe, - const struct pipe_poly_stipple *stipple) -{ - struct nv30_context *nv30 = nv30_context(pipe); - - memcpy(nv30->stipple, stipple->stipple, 4 * 32); - nv30->dirty |= NV30_NEW_STIPPLE; -} - -static void -nv30_set_scissor_state(struct pipe_context *pipe, - const struct pipe_scissor_state *s) -{ - struct nv30_context *nv30 = nv30_context(pipe); - - nv30->scissor = *s; - nv30->dirty |= NV30_NEW_SCISSOR; -} - -static void -nv30_set_viewport_state(struct pipe_context *pipe, - const struct pipe_viewport_state *vpt) -{ - struct nv30_context *nv30 = nv30_context(pipe); - - nv30->viewport = *vpt; - nv30->dirty |= NV30_NEW_VIEWPORT; - /*nv30->draw_dirty |= NV30_NEW_VIEWPORT;*/ -} - -static void -nv30_set_vertex_buffers(struct pipe_context *pipe, unsigned count, - const struct pipe_vertex_buffer *vb) -{ - struct nv30_context *nv30 = nv30_context(pipe); - - memcpy(nv30->vtxbuf, vb, sizeof(*vb) * count); - nv30->vtxbuf_nr = count; - - nv30->dirty |= NV30_NEW_ARRAYS; - /*nv30->draw_dirty |= NV30_NEW_ARRAYS;*/ -} - -static void -nv30_set_vertex_elements(struct pipe_context *pipe, unsigned count, - const struct pipe_vertex_element *ve) -{ - struct nv30_context *nv30 = nv30_context(pipe); - - memcpy(nv30->vtxelt, ve, sizeof(*ve) * count); - nv30->vtxelt_nr = count; - - nv30->dirty |= NV30_NEW_ARRAYS; - /*nv30->draw_dirty |= NV30_NEW_ARRAYS;*/ -} - -void -nv30_init_state_functions(struct nv30_context *nv30) -{ - nv30->pipe.create_blend_state = nv30_blend_state_create; - nv30->pipe.bind_blend_state = nv30_blend_state_bind; - nv30->pipe.delete_blend_state = nv30_blend_state_delete; - - nv30->pipe.create_sampler_state = nv30_sampler_state_create; - nv30->pipe.bind_fragment_sampler_states = nv30_sampler_state_bind; - nv30->pipe.delete_sampler_state = nv30_sampler_state_delete; - nv30->pipe.set_fragment_sampler_textures = nv30_set_sampler_texture; - - nv30->pipe.create_rasterizer_state = nv30_rasterizer_state_create; - nv30->pipe.bind_rasterizer_state = nv30_rasterizer_state_bind; - nv30->pipe.delete_rasterizer_state = nv30_rasterizer_state_delete; - - nv30->pipe.create_depth_stencil_alpha_state = - nv30_depth_stencil_alpha_state_create; - nv30->pipe.bind_depth_stencil_alpha_state = - nv30_depth_stencil_alpha_state_bind; - nv30->pipe.delete_depth_stencil_alpha_state = - nv30_depth_stencil_alpha_state_delete; - - nv30->pipe.create_vs_state = nv30_vp_state_create; - nv30->pipe.bind_vs_state = nv30_vp_state_bind; - nv30->pipe.delete_vs_state = nv30_vp_state_delete; - - nv30->pipe.create_fs_state = nv30_fp_state_create; - nv30->pipe.bind_fs_state = nv30_fp_state_bind; - nv30->pipe.delete_fs_state = nv30_fp_state_delete; - - nv30->pipe.set_blend_color = nv30_set_blend_color; - nv30->pipe.set_stencil_ref = nv30_set_stencil_ref; - nv30->pipe.set_clip_state = nv30_set_clip_state; - nv30->pipe.set_constant_buffer = nv30_set_constant_buffer; - nv30->pipe.set_framebuffer_state = nv30_set_framebuffer_state; - nv30->pipe.set_polygon_stipple = nv30_set_polygon_stipple; - nv30->pipe.set_scissor_state = nv30_set_scissor_state; - nv30->pipe.set_viewport_state = nv30_set_viewport_state; - - nv30->pipe.set_vertex_buffers = nv30_set_vertex_buffers; - nv30->pipe.set_vertex_elements = nv30_set_vertex_elements; -} - diff --git a/src/gallium/drivers/nv30/nv30_state.h b/src/gallium/drivers/nv30/nv30_state.h deleted file mode 100644 index e42e872de75..00000000000 --- a/src/gallium/drivers/nv30/nv30_state.h +++ /dev/null @@ -1,86 +0,0 @@ -#ifndef __NV30_STATE_H__ -#define __NV30_STATE_H__ - -#include "pipe/p_state.h" -#include "tgsi/tgsi_scan.h" - -struct nv30_sampler_state { - uint32_t fmt; - uint32_t wrap; - uint32_t en; - uint32_t filt; - uint32_t bcol; -}; - -struct nv30_vertex_program_exec { - uint32_t data[4]; - boolean has_branch_offset; - int const_index; -}; - -struct nv30_vertex_program_data { - int index; /* immediates == -1 */ - float value[4]; -}; - -struct nv30_vertex_program { - struct pipe_shader_state pipe; - - boolean translated; - - struct nv30_vertex_program_exec *insns; - unsigned nr_insns; - struct nv30_vertex_program_data *consts; - unsigned nr_consts; - - struct nouveau_resource *exec; - unsigned exec_start; - struct nouveau_resource *data; - unsigned data_start; - unsigned data_start_min; - - uint32_t ir; - uint32_t or; - struct nouveau_stateobj *so; -}; - -struct nv30_fragment_program_data { - unsigned offset; - unsigned index; -}; - -struct nv30_fragment_program { - struct pipe_shader_state pipe; - struct tgsi_shader_info info; - - boolean translated; - boolean on_hw; - unsigned samplers; - - uint32_t *insn; - int insn_len; - - struct nv30_fragment_program_data *consts; - unsigned nr_consts; - - struct pipe_buffer *buffer; - - uint32_t fp_control; - uint32_t fp_reg_control; - struct nouveau_stateobj *so; -}; - -struct nv30_miptree { - struct pipe_texture base; - struct nouveau_bo *bo; - - struct pipe_buffer *buffer; - uint total_size; - - struct { - uint pitch; - uint *image_offset; - } level[PIPE_MAX_TEXTURE_LEVELS]; -}; - -#endif diff --git a/src/gallium/drivers/nv30/nv30_state_blend.c b/src/gallium/drivers/nv30/nv30_state_blend.c deleted file mode 100644 index c36d58c040c..00000000000 --- a/src/gallium/drivers/nv30/nv30_state_blend.c +++ /dev/null @@ -1,41 +0,0 @@ -#include "nv30_context.h" - -static boolean -nv30_state_blend_validate(struct nv30_context *nv30) -{ - so_ref(nv30->blend->so, &nv30->state.hw[NV30_STATE_BLEND]); - return TRUE; -} - -struct nv30_state_entry nv30_state_blend = { - .validate = nv30_state_blend_validate, - .dirty = { - .pipe = NV30_NEW_BLEND, - .hw = NV30_STATE_BLEND - } -}; - -static boolean -nv30_state_blend_colour_validate(struct nv30_context *nv30) -{ - struct nouveau_stateobj *so = so_new(1, 1, 0); - struct pipe_blend_color *bcol = &nv30->blend_colour; - - so_method(so, nv30->screen->rankine, NV34TCL_BLEND_COLOR, 1); - so_data (so, ((float_to_ubyte(bcol->color[3]) << 24) | - (float_to_ubyte(bcol->color[0]) << 16) | - (float_to_ubyte(bcol->color[1]) << 8) | - (float_to_ubyte(bcol->color[2]) << 0))); - - so_ref(so, &nv30->state.hw[NV30_STATE_BCOL]); - so_ref(NULL, &so); - return TRUE; -} - -struct nv30_state_entry nv30_state_blend_colour = { - .validate = nv30_state_blend_colour_validate, - .dirty = { - .pipe = NV30_NEW_BCOL, - .hw = NV30_STATE_BCOL - } -}; diff --git a/src/gallium/drivers/nv30/nv30_state_emit.c b/src/gallium/drivers/nv30/nv30_state_emit.c deleted file mode 100644 index deefe7fd8db..00000000000 --- a/src/gallium/drivers/nv30/nv30_state_emit.c +++ /dev/null @@ -1,122 +0,0 @@ -#include "nv30_context.h" -#include "nv30_state.h" - -static struct nv30_state_entry *render_states[] = { - &nv30_state_framebuffer, - &nv30_state_rasterizer, - &nv30_state_scissor, - &nv30_state_stipple, - &nv30_state_fragprog, - &nv30_state_fragtex, - &nv30_state_vertprog, - &nv30_state_blend, - &nv30_state_blend_colour, - &nv30_state_zsa, - &nv30_state_sr, - &nv30_state_viewport, - &nv30_state_vbo, - NULL -}; - -static void -nv30_state_do_validate(struct nv30_context *nv30, - struct nv30_state_entry **states) -{ - while (*states) { - struct nv30_state_entry *e = *states; - - if (nv30->dirty & e->dirty.pipe) { - if (e->validate(nv30)) { - nv30->state.dirty |= (1ULL << e->dirty.hw); - } - } - - states++; - } - nv30->dirty = 0; -} - -void -nv30_state_emit(struct nv30_context *nv30) -{ - struct nouveau_channel *chan = nv30->screen->base.channel; - struct nv30_state *state = &nv30->state; - struct nv30_screen *screen = nv30->screen; - unsigned i; - uint64_t states; - - /* XXX: racy! - */ - if (nv30 != screen->cur_ctx) { - for (i = 0; i < NV30_STATE_MAX; i++) { - if (state->hw[i] && screen->state[i] != state->hw[i]) - state->dirty |= (1ULL << i); - } - - screen->cur_ctx = nv30; - } - - for (i = 0, states = state->dirty; states; i++) { - if (!(states & (1ULL << i))) - continue; - so_ref (state->hw[i], &nv30->screen->state[i]); - if (state->hw[i]) - so_emit(chan, nv30->screen->state[i]); - states &= ~(1ULL << i); - } - - state->dirty = 0; -} - -void -nv30_state_flush_notify(struct nouveau_channel *chan) -{ - struct nv30_context *nv30 = chan->user_private; - struct nv30_state *state = &nv30->state; - unsigned i, samplers; - - so_emit_reloc_markers(chan, state->hw[NV30_STATE_FB]); - for (i = 0, samplers = state->fp_samplers; i < 16 && samplers; i++) { - if (!(samplers & (1 << i))) - continue; - so_emit_reloc_markers(chan, - state->hw[NV30_STATE_FRAGTEX0+i]); - samplers &= ~(1ULL << i); - } - so_emit_reloc_markers(chan, state->hw[NV30_STATE_FRAGPROG]); - if (state->hw[NV30_STATE_VTXBUF] /*&& nv30->render_mode == HW*/) - so_emit_reloc_markers(chan, state->hw[NV30_STATE_VTXBUF]); -} - -boolean -nv30_state_validate(struct nv30_context *nv30) -{ -#if 0 - boolean was_sw = nv30->fallback_swtnl ? TRUE : FALSE; - - if (nv30->render_mode != HW) { - /* Don't even bother trying to go back to hw if none - * of the states that caused swtnl previously have changed. - */ - if ((nv30->fallback_swtnl & nv30->dirty) - != nv30->fallback_swtnl) - return FALSE; - - /* Attempt to go to hwtnl again */ - nv30->pipe.flush(&nv30->pipe, 0, NULL); - nv30->dirty |= (NV30_NEW_VIEWPORT | - NV30_NEW_VERTPROG | - NV30_NEW_ARRAYS); - nv30->render_mode = HW; - } -#endif - nv30_state_do_validate(nv30, render_states); -#if 0 - if (nv30->fallback_swtnl || nv30->fallback_swrast) - return FALSE; - - if (was_sw) - NOUVEAU_ERR("swtnl->hw\n"); -#endif - return TRUE; -} diff --git a/src/gallium/drivers/nv30/nv30_state_fb.c b/src/gallium/drivers/nv30/nv30_state_fb.c deleted file mode 100644 index f7fe9833c77..00000000000 --- a/src/gallium/drivers/nv30/nv30_state_fb.c +++ /dev/null @@ -1,173 +0,0 @@ -#include "nv30_context.h" -#include "nouveau/nouveau_util.h" - -static boolean -nv30_state_framebuffer_validate(struct nv30_context *nv30) -{ - struct pipe_framebuffer_state *fb = &nv30->framebuffer; - struct nouveau_channel *chan = nv30->screen->base.channel; - struct nouveau_grobj *rankine = nv30->screen->rankine; - struct nv04_surface *rt[2], *zeta = NULL; - uint32_t rt_enable = 0, rt_format = 0; - int i, colour_format = 0, zeta_format = 0, depth_only = 0; - struct nouveau_stateobj *so = so_new(12, 18, 10); - unsigned rt_flags = NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM; - unsigned w = fb->width; - unsigned h = fb->height; - struct nv30_miptree *nv30mt; - int colour_bits = 32, zeta_bits = 32; - - for (i = 0; i < fb->nr_cbufs; i++) { - if (colour_format) { - assert(colour_format == fb->cbufs[i]->format); - } else { - colour_format = fb->cbufs[i]->format; - rt_enable |= (NV34TCL_RT_ENABLE_COLOR0 << i); - rt[i] = (struct nv04_surface *)fb->cbufs[i]; - } - } - - if (rt_enable & NV34TCL_RT_ENABLE_COLOR1) - rt_enable |= NV34TCL_RT_ENABLE_MRT; - - if (fb->zsbuf) { - zeta_format = fb->zsbuf->format; - zeta = (struct nv04_surface *)fb->zsbuf; - } - - if (rt_enable & (NV34TCL_RT_ENABLE_COLOR0|NV34TCL_RT_ENABLE_COLOR1)) { - /* Render to at least a colour buffer */ - if (!(rt[0]->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) { - assert(!(fb->width & (fb->width - 1)) && !(fb->height & (fb->height - 1))); - for (i = 1; i < fb->nr_cbufs; i++) - assert(!(rt[i]->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)); - - rt_format = NV34TCL_RT_FORMAT_TYPE_SWIZZLED | - (log2i(rt[0]->base.width) << NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT) | - (log2i(rt[0]->base.height) << NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT); - } - else - rt_format = NV34TCL_RT_FORMAT_TYPE_LINEAR; - } else if (fb->zsbuf) { - depth_only = 1; - - /* Render to depth buffer only */ - if (!(zeta->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) { - assert(!(fb->width & (fb->width - 1)) && !(fb->height & (fb->height - 1))); - - rt_format = NV34TCL_RT_FORMAT_TYPE_SWIZZLED | - (log2i(zeta->base.width) << NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT) | - (log2i(zeta->base.height) << NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT); - } - else - rt_format = NV34TCL_RT_FORMAT_TYPE_LINEAR; - } else { - return FALSE; - } - - switch (colour_format) { - case PIPE_FORMAT_B8G8R8X8_UNORM: - rt_format |= NV34TCL_RT_FORMAT_COLOR_X8R8G8B8; - break; - case PIPE_FORMAT_B8G8R8A8_UNORM: - case 0: - rt_format |= NV34TCL_RT_FORMAT_COLOR_A8R8G8B8; - break; - case PIPE_FORMAT_B5G6R5_UNORM: - rt_format |= NV34TCL_RT_FORMAT_COLOR_R5G6B5; - colour_bits = 16; - break; - default: - assert(0); - } - - switch (zeta_format) { - case PIPE_FORMAT_Z16_UNORM: - rt_format |= NV34TCL_RT_FORMAT_ZETA_Z16; - zeta_bits = 16; - break; - case PIPE_FORMAT_S8Z24_UNORM: - case PIPE_FORMAT_X8Z24_UNORM: - case 0: - rt_format |= NV34TCL_RT_FORMAT_ZETA_Z24S8; - break; - default: - assert(0); - } - - if (colour_bits > zeta_bits) { - return FALSE; - } - - if (depth_only || (rt_enable & NV34TCL_RT_ENABLE_COLOR0)) { - struct nv04_surface *rt0 = (depth_only ? zeta : rt[0]); - uint32_t pitch = rt0->pitch; - - if (zeta) { - pitch |= (zeta->pitch << 16); - } else { - pitch |= (pitch << 16); - } - - nv30mt = (struct nv30_miptree *) rt0->base.texture; - so_method(so, rankine, NV34TCL_DMA_COLOR0, 1); - so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); - so_method(so, rankine, NV34TCL_COLOR0_PITCH, 2); - so_data (so, pitch); - so_reloc (so, nouveau_bo(nv30mt->buffer), rt0->base.offset, - rt_flags | NOUVEAU_BO_LOW, 0, 0); - } - - if (rt_enable & NV34TCL_RT_ENABLE_COLOR1) { - nv30mt = (struct nv30_miptree *)rt[1]->base.texture; - so_method(so, rankine, NV34TCL_DMA_COLOR1, 1); - so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); - so_method(so, rankine, NV34TCL_COLOR1_OFFSET, 2); - so_reloc (so, nouveau_bo(nv30mt->buffer), rt[1]->base.offset, - rt_flags | NOUVEAU_BO_LOW, 0, 0); - so_data (so, rt[1]->pitch); - } - - if (zeta_format) { - nv30mt = (struct nv30_miptree *)zeta->base.texture; - so_method(so, rankine, NV34TCL_DMA_ZETA, 1); - so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); - so_method(so, rankine, NV34TCL_ZETA_OFFSET, 1); - so_reloc (so, nouveau_bo(nv30mt->buffer), zeta->base.offset, - rt_flags | NOUVEAU_BO_LOW, 0, 0); - /* TODO: allocate LMA depth buffer */ - } - - so_method(so, rankine, NV34TCL_RT_ENABLE, 1); - so_data (so, rt_enable); - so_method(so, rankine, NV34TCL_RT_HORIZ, 3); - so_data (so, (w << 16) | 0); - so_data (so, (h << 16) | 0); - so_data (so, rt_format); - so_method(so, rankine, NV34TCL_VIEWPORT_HORIZ, 2); - so_data (so, (w << 16) | 0); - so_data (so, (h << 16) | 0); - so_method(so, rankine, NV34TCL_VIEWPORT_CLIP_HORIZ(0), 2); - so_data (so, ((w - 1) << 16) | 0); - so_data (so, ((h - 1) << 16) | 0); - so_method(so, rankine, 0x1d88, 1); - so_data (so, (1 << 12) | h); - /* Wonder why this is needed, context should all be set to zero on init */ - so_method(so, rankine, NV34TCL_VIEWPORT_TX_ORIGIN, 1); - so_data (so, 0); - - so_ref(so, &nv30->state.hw[NV30_STATE_FB]); - so_ref(NULL, &so); - return TRUE; -} - -struct nv30_state_entry nv30_state_framebuffer = { - .validate = nv30_state_framebuffer_validate, - .dirty = { - .pipe = NV30_NEW_FB, - .hw = NV30_STATE_FB - } -}; diff --git a/src/gallium/drivers/nv30/nv30_state_rasterizer.c b/src/gallium/drivers/nv30/nv30_state_rasterizer.c deleted file mode 100644 index 6d1b60e043d..00000000000 --- a/src/gallium/drivers/nv30/nv30_state_rasterizer.c +++ /dev/null @@ -1,17 +0,0 @@ -#include "nv30_context.h" - -static boolean -nv30_state_rasterizer_validate(struct nv30_context *nv30) -{ - so_ref(nv30->rasterizer->so, - &nv30->state.hw[NV30_STATE_RAST]); - return TRUE; -} - -struct nv30_state_entry nv30_state_rasterizer = { - .validate = nv30_state_rasterizer_validate, - .dirty = { - .pipe = NV30_NEW_RAST, - .hw = NV30_STATE_RAST - } -}; diff --git a/src/gallium/drivers/nv30/nv30_state_scissor.c b/src/gallium/drivers/nv30/nv30_state_scissor.c deleted file mode 100644 index ba61a9e24a4..00000000000 --- a/src/gallium/drivers/nv30/nv30_state_scissor.c +++ /dev/null @@ -1,36 +0,0 @@ -#include "nv30_context.h" - -static boolean -nv30_state_scissor_validate(struct nv30_context *nv30) -{ - struct pipe_rasterizer_state *rast = &nv30->rasterizer->pipe; - struct pipe_scissor_state *s = &nv30->scissor; - struct nouveau_stateobj *so; - - if (nv30->state.hw[NV30_STATE_SCISSOR] && - (rast->scissor == 0 && nv30->state.scissor_enabled == 0)) - return FALSE; - nv30->state.scissor_enabled = rast->scissor; - - so = so_new(1, 2, 0); - so_method(so, nv30->screen->rankine, NV34TCL_SCISSOR_HORIZ, 2); - if (nv30->state.scissor_enabled) { - so_data (so, ((s->maxx - s->minx) << 16) | s->minx); - so_data (so, ((s->maxy - s->miny) << 16) | s->miny); - } else { - so_data (so, 4096 << 16); - so_data (so, 4096 << 16); - } - - so_ref(so, &nv30->state.hw[NV30_STATE_SCISSOR]); - so_ref(NULL, &so); - return TRUE; -} - -struct nv30_state_entry nv30_state_scissor = { - .validate = nv30_state_scissor_validate, - .dirty = { - .pipe = NV30_NEW_SCISSOR | NV30_NEW_RAST, - .hw = NV30_STATE_SCISSOR - } -}; diff --git a/src/gallium/drivers/nv30/nv30_state_stipple.c b/src/gallium/drivers/nv30/nv30_state_stipple.c deleted file mode 100644 index ed520a4f439..00000000000 --- a/src/gallium/drivers/nv30/nv30_state_stipple.c +++ /dev/null @@ -1,40 +0,0 @@ -#include "nv30_context.h" - -static boolean -nv30_state_stipple_validate(struct nv30_context *nv30) -{ - struct pipe_rasterizer_state *rast = &nv30->rasterizer->pipe; - struct nouveau_grobj *rankine = nv30->screen->rankine; - struct nouveau_stateobj *so; - - if (nv30->state.hw[NV30_STATE_STIPPLE] && - (rast->poly_stipple_enable == 0 && nv30->state.stipple_enabled == 0)) - return FALSE; - - if (rast->poly_stipple_enable) { - unsigned i; - - so = so_new(2, 33, 0); - so_method(so, rankine, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); - so_data (so, 1); - so_method(so, rankine, NV34TCL_POLYGON_STIPPLE_PATTERN(0), 32); - for (i = 0; i < 32; i++) - so_data(so, nv30->stipple[i]); - } else { - so = so_new(1, 1, 0); - so_method(so, rankine, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); - so_data (so, 0); - } - - so_ref(so, &nv30->state.hw[NV30_STATE_STIPPLE]); - so_ref(NULL, &so); - return TRUE; -} - -struct nv30_state_entry nv30_state_stipple = { - .validate = nv30_state_stipple_validate, - .dirty = { - .pipe = NV30_NEW_STIPPLE | NV30_NEW_RAST, - .hw = NV30_STATE_STIPPLE, - } -}; diff --git a/src/gallium/drivers/nv30/nv30_state_viewport.c b/src/gallium/drivers/nv30/nv30_state_viewport.c deleted file mode 100644 index 6fccd6b60e7..00000000000 --- a/src/gallium/drivers/nv30/nv30_state_viewport.c +++ /dev/null @@ -1,42 +0,0 @@ -#include "nv30_context.h" - -static boolean -nv30_state_viewport_validate(struct nv30_context *nv30) -{ - struct pipe_viewport_state *vpt = &nv30->viewport; - struct nouveau_stateobj *so; - - if (nv30->state.hw[NV30_STATE_VIEWPORT] && - !(nv30->dirty & NV30_NEW_VIEWPORT)) - return FALSE; - - so = so_new(3, 10, 0); - so_method(so, nv30->screen->rankine, - NV34TCL_VIEWPORT_TRANSLATE_X, 8); - so_data (so, fui(vpt->translate[0])); - so_data (so, fui(vpt->translate[1])); - so_data (so, fui(vpt->translate[2])); - so_data (so, fui(vpt->translate[3])); - so_data (so, fui(vpt->scale[0])); - so_data (so, fui(vpt->scale[1])); - so_data (so, fui(vpt->scale[2])); - so_data (so, fui(vpt->scale[3])); -/* so_method(so, nv30->screen->rankine, 0x1d78, 1); - so_data (so, 1); -*/ - /* TODO/FIXME: never saw value 0x0110 in renouveau dumps, only 0x0001 */ - so_method(so, nv30->screen->rankine, 0x1d78, 1); - so_data (so, 1); - - so_ref(so, &nv30->state.hw[NV30_STATE_VIEWPORT]); - so_ref(NULL, &so); - return TRUE; -} - -struct nv30_state_entry nv30_state_viewport = { - .validate = nv30_state_viewport_validate, - .dirty = { - .pipe = NV30_NEW_VIEWPORT | NV30_NEW_RAST, - .hw = NV30_STATE_VIEWPORT - } -}; diff --git a/src/gallium/drivers/nv30/nv30_state_zsa.c b/src/gallium/drivers/nv30/nv30_state_zsa.c deleted file mode 100644 index 88cd74f180a..00000000000 --- a/src/gallium/drivers/nv30/nv30_state_zsa.c +++ /dev/null @@ -1,41 +0,0 @@ -#include "nv30_context.h" - -static boolean -nv30_state_zsa_validate(struct nv30_context *nv30) -{ - so_ref(nv30->zsa->so, - &nv30->state.hw[NV30_STATE_ZSA]); - return TRUE; -} - -struct nv30_state_entry nv30_state_zsa = { - .validate = nv30_state_zsa_validate, - .dirty = { - .pipe = NV30_NEW_ZSA, - .hw = NV30_STATE_ZSA - } -}; - -static boolean -nv30_state_sr_validate(struct nv30_context *nv30) -{ - struct nouveau_stateobj *so = so_new(2, 2, 0); - struct pipe_stencil_ref *sr = &nv30->stencil_ref; - - so_method(so, nv30->screen->rankine, NV34TCL_STENCIL_FRONT_FUNC_REF, 1); - so_data (so, sr->ref_value[0]); - so_method(so, nv30->screen->rankine, NV34TCL_STENCIL_BACK_FUNC_REF, 1); - so_data (so, sr->ref_value[1]); - - so_ref(so, &nv30->state.hw[NV30_STATE_SR]); - so_ref(NULL, &so); - return TRUE; -} - -struct nv30_state_entry nv30_state_sr = { - .validate = nv30_state_sr_validate, - .dirty = { - .pipe = NV30_NEW_SR, - .hw = NV30_STATE_SR - } -}; diff --git a/src/gallium/drivers/nv30/nv30_transfer.c b/src/gallium/drivers/nv30/nv30_transfer.c deleted file mode 100644 index 3aeda51ea19..00000000000 --- a/src/gallium/drivers/nv30/nv30_transfer.c +++ /dev/null @@ -1,178 +0,0 @@ -#include "pipe/p_state.h" -#include "pipe/p_defines.h" -#include "util/u_inlines.h" -#include "util/u_format.h" -#include "util/u_memory.h" -#include "util/u_math.h" -#include "nouveau/nouveau_winsys.h" -#include "nv30_context.h" -#include "nv30_screen.h" -#include "nv30_state.h" - -struct nv30_transfer { - struct pipe_transfer base; - struct pipe_surface *surface; - boolean direct; -}; - -static void -nv30_compatible_transfer_tex(struct pipe_texture *pt, unsigned width, unsigned height, - struct pipe_texture *template) -{ - memset(template, 0, sizeof(struct pipe_texture)); - template->target = pt->target; - template->format = pt->format; - template->width0 = width; - template->height0 = height; - template->depth0 = 1; - template->last_level = 0; - template->nr_samples = pt->nr_samples; - - template->tex_usage = PIPE_TEXTURE_USAGE_DYNAMIC | - NOUVEAU_TEXTURE_USAGE_LINEAR; -} - -static struct pipe_transfer * -nv30_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, - unsigned face, unsigned level, unsigned zslice, - enum pipe_transfer_usage usage, - unsigned x, unsigned y, unsigned w, unsigned h) -{ - struct nv30_miptree *mt = (struct nv30_miptree *)pt; - struct nv30_transfer *tx; - struct pipe_texture tx_tex_template, *tx_tex; - - tx = CALLOC_STRUCT(nv30_transfer); - if (!tx) - return NULL; - - pipe_texture_reference(&tx->base.texture, pt); - tx->base.x = x; - tx->base.y = y; - tx->base.width = w; - tx->base.height = h; - tx->base.stride = mt->level[level].pitch; - tx->base.usage = usage; - tx->base.face = face; - tx->base.level = level; - tx->base.zslice = zslice; - - /* Direct access to texture */ - if ((pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC || - debug_get_bool_option("NOUVEAU_NO_TRANSFER", TRUE/*XXX:FALSE*/)) && - pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR) - { - tx->direct = true; - tx->surface = pscreen->get_tex_surface(pscreen, pt, - face, level, zslice, - pipe_transfer_buffer_flags(&tx->base)); - return &tx->base; - } - - tx->direct = false; - - nv30_compatible_transfer_tex(pt, w, h, &tx_tex_template); - - tx_tex = pscreen->texture_create(pscreen, &tx_tex_template); - if (!tx_tex) - { - FREE(tx); - return NULL; - } - - tx->base.stride = ((struct nv30_miptree*)tx_tex)->level[0].pitch; - - tx->surface = pscreen->get_tex_surface(pscreen, tx_tex, - 0, 0, 0, - pipe_transfer_buffer_flags(&tx->base)); - - pipe_texture_reference(&tx_tex, NULL); - - if (!tx->surface) - { - pipe_surface_reference(&tx->surface, NULL); - FREE(tx); - return NULL; - } - - if (usage & PIPE_TRANSFER_READ) { - struct nv30_screen *nvscreen = nv30_screen(pscreen); - struct pipe_surface *src; - - src = pscreen->get_tex_surface(pscreen, pt, - face, level, zslice, - PIPE_BUFFER_USAGE_GPU_READ); - - /* TODO: Check if SIFM can deal with x,y,w,h when swizzling */ - /* TODO: Check if SIFM can un-swizzle */ - nvscreen->eng2d->copy(nvscreen->eng2d, - tx->surface, 0, 0, - src, x, y, - w, h); - - pipe_surface_reference(&src, NULL); - } - - return &tx->base; -} - -static void -nv30_transfer_del(struct pipe_transfer *ptx) -{ - struct nv30_transfer *tx = (struct nv30_transfer *)ptx; - - if (!tx->direct && (ptx->usage & PIPE_TRANSFER_WRITE)) { - struct pipe_screen *pscreen = ptx->texture->screen; - struct nv30_screen *nvscreen = nv30_screen(pscreen); - struct pipe_surface *dst; - - dst = pscreen->get_tex_surface(pscreen, ptx->texture, - ptx->face, ptx->level, ptx->zslice, - PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER); - - /* TODO: Check if SIFM can deal with x,y,w,h when swizzling */ - nvscreen->eng2d->copy(nvscreen->eng2d, - dst, tx->base.x, tx->base.y, - tx->surface, 0, 0, - tx->base.width, tx->base.height); - - pipe_surface_reference(&dst, NULL); - } - - pipe_surface_reference(&tx->surface, NULL); - pipe_texture_reference(&ptx->texture, NULL); - FREE(ptx); -} - -static void * -nv30_transfer_map(struct pipe_screen *pscreen, struct pipe_transfer *ptx) -{ - struct nv30_transfer *tx = (struct nv30_transfer *)ptx; - struct nv04_surface *ns = (struct nv04_surface *)tx->surface; - struct nv30_miptree *mt = (struct nv30_miptree *)tx->surface->texture; - void *map = pipe_buffer_map(pscreen, mt->buffer, - pipe_transfer_buffer_flags(ptx)); - - if(!tx->direct) - return map + ns->base.offset; - else - return map + ns->base.offset + ptx->y * ns->pitch + ptx->x * util_format_get_blocksize(ptx->texture->format); -} - -static void -nv30_transfer_unmap(struct pipe_screen *pscreen, struct pipe_transfer *ptx) -{ - struct nv30_transfer *tx = (struct nv30_transfer *)ptx; - struct nv30_miptree *mt = (struct nv30_miptree *)tx->surface->texture; - - pipe_buffer_unmap(pscreen, mt->buffer); -} - -void -nv30_screen_init_transfer_functions(struct pipe_screen *pscreen) -{ - pscreen->get_tex_transfer = nv30_transfer_new; - pscreen->tex_transfer_destroy = nv30_transfer_del; - pscreen->transfer_map = nv30_transfer_map; - pscreen->transfer_unmap = nv30_transfer_unmap; -} diff --git a/src/gallium/drivers/nv30/nv30_vbo.c b/src/gallium/drivers/nv30/nv30_vbo.c deleted file mode 100644 index e48823a9138..00000000000 --- a/src/gallium/drivers/nv30/nv30_vbo.c +++ /dev/null @@ -1,562 +0,0 @@ -#include "pipe/p_context.h" -#include "pipe/p_state.h" -#include "util/u_inlines.h" -#include "util/u_format.h" - -#include "nv30_context.h" -#include "nv30_state.h" - -#include "nouveau/nouveau_channel.h" -#include "nouveau/nouveau_pushbuf.h" -#include "nouveau/nouveau_util.h" - -#define FORCE_SWTNL 0 - -static INLINE int -nv30_vbo_format_to_hw(enum pipe_format pipe, unsigned *fmt, unsigned *ncomp) -{ - switch (pipe) { - case PIPE_FORMAT_R32_FLOAT: - case PIPE_FORMAT_R32G32_FLOAT: - case PIPE_FORMAT_R32G32B32_FLOAT: - case PIPE_FORMAT_R32G32B32A32_FLOAT: - *fmt = NV34TCL_VTXFMT_TYPE_FLOAT; - break; - case PIPE_FORMAT_R8_UNORM: - case PIPE_FORMAT_R8G8_UNORM: - case PIPE_FORMAT_R8G8B8_UNORM: - case PIPE_FORMAT_R8G8B8A8_UNORM: - *fmt = NV34TCL_VTXFMT_TYPE_UBYTE; - break; - case PIPE_FORMAT_R16_SSCALED: - case PIPE_FORMAT_R16G16_SSCALED: - case PIPE_FORMAT_R16G16B16_SSCALED: - case PIPE_FORMAT_R16G16B16A16_SSCALED: - *fmt = NV34TCL_VTXFMT_TYPE_USHORT; - break; - default: - NOUVEAU_ERR("Unknown format %s\n", util_format_name(pipe)); - return 1; - } - - switch (pipe) { - case PIPE_FORMAT_R8_UNORM: - case PIPE_FORMAT_R32_FLOAT: - case PIPE_FORMAT_R16_SSCALED: - *ncomp = 1; - break; - case PIPE_FORMAT_R8G8_UNORM: - case PIPE_FORMAT_R32G32_FLOAT: - case PIPE_FORMAT_R16G16_SSCALED: - *ncomp = 2; - break; - case PIPE_FORMAT_R8G8B8_UNORM: - case PIPE_FORMAT_R32G32B32_FLOAT: - case PIPE_FORMAT_R16G16B16_SSCALED: - *ncomp = 3; - break; - case PIPE_FORMAT_R8G8B8A8_UNORM: - case PIPE_FORMAT_R32G32B32A32_FLOAT: - case PIPE_FORMAT_R16G16B16A16_SSCALED: - *ncomp = 4; - break; - default: - NOUVEAU_ERR("Unknown format %s\n", util_format_name(pipe)); - return 1; - } - - return 0; -} - -static boolean -nv30_vbo_set_idxbuf(struct nv30_context *nv30, struct pipe_buffer *ib, - unsigned ib_size) -{ - struct pipe_screen *pscreen = &nv30->screen->base.base; - unsigned type; - - if (!ib) { - nv30->idxbuf = NULL; - nv30->idxbuf_format = 0xdeadbeef; - return FALSE; - } - - if (!pscreen->get_param(pscreen, NOUVEAU_CAP_HW_IDXBUF) || ib_size == 1) - return FALSE; - - switch (ib_size) { - case 2: - type = NV34TCL_IDXBUF_FORMAT_TYPE_U16; - break; - case 4: - type = NV34TCL_IDXBUF_FORMAT_TYPE_U32; - break; - default: - return FALSE; - } - - if (ib != nv30->idxbuf || - type != nv30->idxbuf_format) { - nv30->dirty |= NV30_NEW_ARRAYS; - nv30->idxbuf = ib; - nv30->idxbuf_format = type; - } - - return TRUE; -} - -static boolean -nv30_vbo_static_attrib(struct nv30_context *nv30, struct nouveau_stateobj *so, - int attrib, struct pipe_vertex_element *ve, - struct pipe_vertex_buffer *vb) -{ - struct pipe_screen *pscreen = nv30->pipe.screen; - struct nouveau_grobj *rankine = nv30->screen->rankine; - unsigned type, ncomp; - void *map; - - if (nv30_vbo_format_to_hw(ve->src_format, &type, &ncomp)) - return FALSE; - - map = pipe_buffer_map(pscreen, vb->buffer, PIPE_BUFFER_USAGE_CPU_READ); - map += vb->buffer_offset + ve->src_offset; - - switch (type) { - case NV34TCL_VTXFMT_TYPE_FLOAT: - { - float *v = map; - - switch (ncomp) { - case 4: - so_method(so, rankine, NV34TCL_VTX_ATTR_4F_X(attrib), 4); - so_data (so, fui(v[0])); - so_data (so, fui(v[1])); - so_data (so, fui(v[2])); - so_data (so, fui(v[3])); - break; - case 3: - so_method(so, rankine, NV34TCL_VTX_ATTR_3F_X(attrib), 3); - so_data (so, fui(v[0])); - so_data (so, fui(v[1])); - so_data (so, fui(v[2])); - break; - case 2: - so_method(so, rankine, NV34TCL_VTX_ATTR_2F_X(attrib), 2); - so_data (so, fui(v[0])); - so_data (so, fui(v[1])); - break; - case 1: - so_method(so, rankine, NV34TCL_VTX_ATTR_1F(attrib), 1); - so_data (so, fui(v[0])); - break; - default: - pipe_buffer_unmap(pscreen, vb->buffer); - return FALSE; - } - } - break; - default: - pipe_buffer_unmap(pscreen, vb->buffer); - return FALSE; - } - - pipe_buffer_unmap(pscreen, vb->buffer); - return TRUE; -} - -void -nv30_draw_arrays(struct pipe_context *pipe, - unsigned mode, unsigned start, unsigned count) -{ - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_screen *screen = nv30->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; - unsigned restart = 0; - - nv30_vbo_set_idxbuf(nv30, NULL, 0); - if (FORCE_SWTNL || !nv30_state_validate(nv30)) { - /*return nv30_draw_elements_swtnl(pipe, NULL, 0, - mode, start, count);*/ - return; - } - - while (count) { - unsigned vc, nr; - - nv30_state_emit(nv30); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, - mode, start, count, &restart); - if (!vc) { - FIRE_RING(chan); - continue; - } - - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - nr = (vc & 0xff); - if (nr) { - BEGIN_RING(chan, rankine, NV34TCL_VB_VERTEX_BATCH, 1); - OUT_RING (chan, ((nr - 1) << 24) | start); - start += nr; - } - - nr = vc >> 8; - while (nr) { - unsigned push = nr > 2047 ? 2047 : nr; - - nr -= push; - - BEGIN_RING_NI(chan, rankine, NV34TCL_VB_VERTEX_BATCH, push); - while (push--) { - OUT_RING(chan, ((0x100 - 1) << 24) | start); - start += 0x100; - } - } - - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, 0); - - count -= vc; - start = restart; - } - - pipe->flush(pipe, 0, NULL); -} - -static INLINE void -nv30_draw_elements_u08(struct nv30_context *nv30, void *ib, - unsigned mode, unsigned start, unsigned count) -{ - struct nv30_screen *screen = nv30->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; - - while (count) { - uint8_t *elts = (uint8_t *)ib + start; - unsigned vc, push, restart = 0; - - nv30_state_emit(nv30); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, - mode, start, count, &restart); - if (vc == 0) { - FIRE_RING(chan); - continue; - } - count -= vc; - - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - if (vc & 1) { - BEGIN_RING(chan, rankine, NV34TCL_VB_ELEMENT_U32, 1); - OUT_RING (chan, elts[0]); - elts++; vc--; - } - - while (vc) { - unsigned i; - - push = MIN2(vc, 2047 * 2); - - BEGIN_RING_NI(chan, rankine, NV34TCL_VB_ELEMENT_U16, push >> 1); - for (i = 0; i < push; i+=2) - OUT_RING(chan, (elts[i+1] << 16) | elts[i]); - - vc -= push; - elts += push; - } - - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, 0); - - start = restart; - } -} - -static INLINE void -nv30_draw_elements_u16(struct nv30_context *nv30, void *ib, - unsigned mode, unsigned start, unsigned count) -{ - struct nv30_screen *screen = nv30->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; - - while (count) { - uint16_t *elts = (uint16_t *)ib + start; - unsigned vc, push, restart = 0; - - nv30_state_emit(nv30); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, - mode, start, count, &restart); - if (vc == 0) { - FIRE_RING(chan); - continue; - } - count -= vc; - - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - if (vc & 1) { - BEGIN_RING(chan, rankine, NV34TCL_VB_ELEMENT_U32, 1); - OUT_RING (chan, elts[0]); - elts++; vc--; - } - - while (vc) { - unsigned i; - - push = MIN2(vc, 2047 * 2); - - BEGIN_RING_NI(chan, rankine, NV34TCL_VB_ELEMENT_U16, push >> 1); - for (i = 0; i < push; i+=2) - OUT_RING(chan, (elts[i+1] << 16) | elts[i]); - - vc -= push; - elts += push; - } - - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, 0); - - start = restart; - } -} - -static INLINE void -nv30_draw_elements_u32(struct nv30_context *nv30, void *ib, - unsigned mode, unsigned start, unsigned count) -{ - struct nv30_screen *screen = nv30->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; - - while (count) { - uint32_t *elts = (uint32_t *)ib + start; - unsigned vc, push, restart = 0; - - nv30_state_emit(nv30); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 5, 1, - mode, start, count, &restart); - if (vc == 0) { - FIRE_RING(chan); - continue; - } - count -= vc; - - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - while (vc) { - push = MIN2(vc, 2047); - - BEGIN_RING_NI(chan, rankine, NV34TCL_VB_ELEMENT_U32, push); - OUT_RINGp (chan, elts, push); - - vc -= push; - elts += push; - } - - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, 0); - - start = restart; - } -} - -static void -nv30_draw_elements_inline(struct pipe_context *pipe, - struct pipe_buffer *ib, unsigned ib_size, - unsigned mode, unsigned start, unsigned count) -{ - struct nv30_context *nv30 = nv30_context(pipe); - struct pipe_screen *pscreen = pipe->screen; - void *map; - - map = pipe_buffer_map(pscreen, ib, PIPE_BUFFER_USAGE_CPU_READ); - if (!ib) { - NOUVEAU_ERR("failed mapping ib\n"); - return; - } - - switch (ib_size) { - case 1: - nv30_draw_elements_u08(nv30, map, mode, start, count); - break; - case 2: - nv30_draw_elements_u16(nv30, map, mode, start, count); - break; - case 4: - nv30_draw_elements_u32(nv30, map, mode, start, count); - break; - default: - NOUVEAU_ERR("invalid idxbuf fmt %d\n", ib_size); - break; - } - - pipe_buffer_unmap(pscreen, ib); -} - -static void -nv30_draw_elements_vbo(struct pipe_context *pipe, - unsigned mode, unsigned start, unsigned count) -{ - struct nv30_context *nv30 = nv30_context(pipe); - struct nv30_screen *screen = nv30->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; - unsigned restart = 0; - - while (count) { - unsigned nr, vc; - - nv30_state_emit(nv30); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, - mode, start, count, &restart); - if (!vc) { - FIRE_RING(chan); - continue; - } - - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - nr = (vc & 0xff); - if (nr) { - BEGIN_RING(chan, rankine, NV34TCL_VB_INDEX_BATCH, 1); - OUT_RING (chan, ((nr - 1) << 24) | start); - start += nr; - } - - nr = vc >> 8; - while (nr) { - unsigned push = nr > 2047 ? 2047 : nr; - - nr -= push; - - BEGIN_RING_NI(chan, rankine, NV34TCL_VB_INDEX_BATCH, push); - while (push--) { - OUT_RING(chan, ((0x100 - 1) << 24) | start); - start += 0x100; - } - } - - BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1); - OUT_RING (chan, 0); - - count -= vc; - start = restart; - } -} - -void -nv30_draw_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, unsigned indexSize, - unsigned mode, unsigned start, unsigned count) -{ - struct nv30_context *nv30 = nv30_context(pipe); - boolean idxbuf; - - idxbuf = nv30_vbo_set_idxbuf(nv30, indexBuffer, indexSize); - if (FORCE_SWTNL || !nv30_state_validate(nv30)) { - /*return nv30_draw_elements_swtnl(pipe, NULL, 0, - mode, start, count);*/ - return; - } - - if (idxbuf) { - nv30_draw_elements_vbo(pipe, mode, start, count); - } else { - nv30_draw_elements_inline(pipe, indexBuffer, indexSize, - mode, start, count); - } - - pipe->flush(pipe, 0, NULL); -} - -static boolean -nv30_vbo_validate(struct nv30_context *nv30) -{ - struct nouveau_stateobj *vtxbuf, *vtxfmt, *sattr = NULL; - struct nouveau_grobj *rankine = nv30->screen->rankine; - struct pipe_buffer *ib = nv30->idxbuf; - unsigned ib_format = nv30->idxbuf_format; - unsigned vb_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; - int hw; - - vtxbuf = so_new(3, 17, 18); - so_method(vtxbuf, rankine, NV34TCL_VTXBUF_ADDRESS(0), nv30->vtxelt_nr); - vtxfmt = so_new(1, 16, 0); - so_method(vtxfmt, rankine, NV34TCL_VTXFMT(0), nv30->vtxelt_nr); - - for (hw = 0; hw < nv30->vtxelt_nr; hw++) { - struct pipe_vertex_element *ve; - struct pipe_vertex_buffer *vb; - unsigned type, ncomp; - - ve = &nv30->vtxelt[hw]; - vb = &nv30->vtxbuf[ve->vertex_buffer_index]; - - if (!vb->stride) { - if (!sattr) - sattr = so_new(16, 16 * 4, 0); - - if (nv30_vbo_static_attrib(nv30, sattr, hw, ve, vb)) { - so_data(vtxbuf, 0); - so_data(vtxfmt, NV34TCL_VTXFMT_TYPE_FLOAT); - continue; - } - } - - if (nv30_vbo_format_to_hw(ve->src_format, &type, &ncomp)) { - /*nv30->fallback_swtnl |= NV30_NEW_ARRAYS;*/ - so_ref(NULL, &vtxbuf); - so_ref(NULL, &vtxfmt); - return FALSE; - } - - so_reloc(vtxbuf, nouveau_bo(vb->buffer), vb->buffer_offset + - ve->src_offset, vb_flags | NOUVEAU_BO_LOW | - NOUVEAU_BO_OR, 0, NV34TCL_VTXBUF_ADDRESS_DMA1); - so_data (vtxfmt, ((vb->stride << NV34TCL_VTXFMT_STRIDE_SHIFT) | - (ncomp << NV34TCL_VTXFMT_SIZE_SHIFT) | type)); - } - - if (ib) { - struct nouveau_bo *bo = nouveau_bo(ib); - - so_method(vtxbuf, rankine, NV34TCL_IDXBUF_ADDRESS, 2); - so_reloc (vtxbuf, bo, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0); - so_reloc (vtxbuf, bo, ib_format, vb_flags | NOUVEAU_BO_OR, - 0, NV34TCL_IDXBUF_FORMAT_DMA1); - } - - so_method(vtxbuf, rankine, 0x1710, 1); - so_data (vtxbuf, 0); - - so_ref(vtxbuf, &nv30->state.hw[NV30_STATE_VTXBUF]); - so_ref(NULL, &vtxbuf); - nv30->state.dirty |= (1ULL << NV30_STATE_VTXBUF); - so_ref(vtxfmt, &nv30->state.hw[NV30_STATE_VTXFMT]); - so_ref(NULL, &vtxfmt); - nv30->state.dirty |= (1ULL << NV30_STATE_VTXFMT); - so_ref(sattr, &nv30->state.hw[NV30_STATE_VTXATTR]); - so_ref(NULL, &sattr); - nv30->state.dirty |= (1ULL << NV30_STATE_VTXATTR); - return FALSE; -} - -struct nv30_state_entry nv30_state_vbo = { - .validate = nv30_vbo_validate, - .dirty = { - .pipe = NV30_NEW_ARRAYS, - .hw = 0, - } -}; diff --git a/src/gallium/drivers/nv30/nv30_vertprog.c b/src/gallium/drivers/nv30/nv30_vertprog.c deleted file mode 100644 index 809be3712da..00000000000 --- a/src/gallium/drivers/nv30/nv30_vertprog.c +++ /dev/null @@ -1,842 +0,0 @@ -#include "pipe/p_context.h" -#include "pipe/p_defines.h" -#include "pipe/p_state.h" -#include "util/u_inlines.h" - -#include "pipe/p_shader_tokens.h" -#include "tgsi/tgsi_parse.h" -#include "tgsi/tgsi_dump.h" - -#include "nv30_context.h" -#include "nv30_state.h" - -/* TODO (at least...): - * 1. Indexed consts + ARL - * 2. Arb. swz/negation - * 3. NV_vp11, NV_vp2, NV_vp3 features - * - extra arith opcodes - * - branching - * - texture sampling - * - indexed attribs - * - indexed results - * 4. bugs - */ - -#define SWZ_X 0 -#define SWZ_Y 1 -#define SWZ_Z 2 -#define SWZ_W 3 -#define MASK_X 8 -#define MASK_Y 4 -#define MASK_Z 2 -#define MASK_W 1 -#define MASK_ALL (MASK_X|MASK_Y|MASK_Z|MASK_W) -#define DEF_SCALE 0 -#define DEF_CTEST 0 -#include "nv30_shader.h" - -#define swz(s,x,y,z,w) nv30_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) -#define neg(s) nv30_sr_neg((s)) -#define abs(s) nv30_sr_abs((s)) - -struct nv30_vpc { - struct nv30_vertex_program *vp; - - struct nv30_vertex_program_exec *vpi; - - unsigned output_map[PIPE_MAX_SHADER_OUTPUTS]; - - int high_temp; - int temp_temp_count; - - struct nv30_sreg *imm; - unsigned nr_imm; -}; - -static struct nv30_sreg -temp(struct nv30_vpc *vpc) -{ - int idx; - - idx = vpc->temp_temp_count++; - idx += vpc->high_temp + 1; - return nv30_sr(NV30SR_TEMP, idx); -} - -static struct nv30_sreg -constant(struct nv30_vpc *vpc, int pipe, float x, float y, float z, float w) -{ - struct nv30_vertex_program *vp = vpc->vp; - struct nv30_vertex_program_data *vpd; - int idx; - - if (pipe >= 0) { - for (idx = 0; idx < vp->nr_consts; idx++) { - if (vp->consts[idx].index == pipe) - return nv30_sr(NV30SR_CONST, idx); - } - } - - idx = vp->nr_consts++; - vp->consts = realloc(vp->consts, sizeof(*vpd) * vp->nr_consts); - vpd = &vp->consts[idx]; - - vpd->index = pipe; - vpd->value[0] = x; - vpd->value[1] = y; - vpd->value[2] = z; - vpd->value[3] = w; - return nv30_sr(NV30SR_CONST, idx); -} - -#define arith(cc,s,o,d,m,s0,s1,s2) \ - nv30_vp_arith((cc), (s), NV30_VP_INST_##o, (d), (m), (s0), (s1), (s2)) - -static void -emit_src(struct nv30_vpc *vpc, uint32_t *hw, int pos, struct nv30_sreg src) -{ - struct nv30_vertex_program *vp = vpc->vp; - uint32_t sr = 0; - - switch (src.type) { - case NV30SR_TEMP: - sr |= (NV30_VP_SRC_REG_TYPE_TEMP << NV30_VP_SRC_REG_TYPE_SHIFT); - sr |= (src.index << NV30_VP_SRC_TEMP_SRC_SHIFT); - break; - case NV30SR_INPUT: - sr |= (NV30_VP_SRC_REG_TYPE_INPUT << - NV30_VP_SRC_REG_TYPE_SHIFT); - vp->ir |= (1 << src.index); - hw[1] |= (src.index << NV30_VP_INST_INPUT_SRC_SHIFT); - break; - case NV30SR_CONST: - sr |= (NV30_VP_SRC_REG_TYPE_CONST << - NV30_VP_SRC_REG_TYPE_SHIFT); - assert(vpc->vpi->const_index == -1 || - vpc->vpi->const_index == src.index); - vpc->vpi->const_index = src.index; - break; - case NV30SR_NONE: - sr |= (NV30_VP_SRC_REG_TYPE_INPUT << - NV30_VP_SRC_REG_TYPE_SHIFT); - break; - default: - assert(0); - } - - if (src.negate) - sr |= NV30_VP_SRC_NEGATE; - - if (src.abs) - hw[0] |= (1 << (21 + pos)); - - sr |= ((src.swz[0] << NV30_VP_SRC_SWZ_X_SHIFT) | - (src.swz[1] << NV30_VP_SRC_SWZ_Y_SHIFT) | - (src.swz[2] << NV30_VP_SRC_SWZ_Z_SHIFT) | - (src.swz[3] << NV30_VP_SRC_SWZ_W_SHIFT)); - -/* - * |VVV| - * d�.�b - * \u/ - * - */ - - switch (pos) { - case 0: - hw[1] |= ((sr & NV30_VP_SRC0_HIGH_MASK) >> - NV30_VP_SRC0_HIGH_SHIFT) << NV30_VP_INST_SRC0H_SHIFT; - hw[2] |= (sr & NV30_VP_SRC0_LOW_MASK) << - NV30_VP_INST_SRC0L_SHIFT; - break; - case 1: - hw[2] |= sr << NV30_VP_INST_SRC1_SHIFT; - break; - case 2: - hw[2] |= ((sr & NV30_VP_SRC2_HIGH_MASK) >> - NV30_VP_SRC2_HIGH_SHIFT) << NV30_VP_INST_SRC2H_SHIFT; - hw[3] |= (sr & NV30_VP_SRC2_LOW_MASK) << - NV30_VP_INST_SRC2L_SHIFT; - break; - default: - assert(0); - } -} - -static void -emit_dst(struct nv30_vpc *vpc, uint32_t *hw, int slot, struct nv30_sreg dst) -{ - struct nv30_vertex_program *vp = vpc->vp; - - switch (dst.type) { - case NV30SR_TEMP: - hw[0] |= (dst.index << NV30_VP_INST_DEST_TEMP_ID_SHIFT); - break; - case NV30SR_OUTPUT: - switch (dst.index) { - case NV30_VP_INST_DEST_COL0 : vp->or |= (1 << 0); break; - case NV30_VP_INST_DEST_COL1 : vp->or |= (1 << 1); break; - case NV30_VP_INST_DEST_BFC0 : vp->or |= (1 << 2); break; - case NV30_VP_INST_DEST_BFC1 : vp->or |= (1 << 3); break; - case NV30_VP_INST_DEST_FOGC : vp->or |= (1 << 4); break; - case NV30_VP_INST_DEST_PSZ : vp->or |= (1 << 5); break; - case NV30_VP_INST_DEST_TC(0): vp->or |= (1 << 14); break; - case NV30_VP_INST_DEST_TC(1): vp->or |= (1 << 15); break; - case NV30_VP_INST_DEST_TC(2): vp->or |= (1 << 16); break; - case NV30_VP_INST_DEST_TC(3): vp->or |= (1 << 17); break; - case NV30_VP_INST_DEST_TC(4): vp->or |= (1 << 18); break; - case NV30_VP_INST_DEST_TC(5): vp->or |= (1 << 19); break; - case NV30_VP_INST_DEST_TC(6): vp->or |= (1 << 20); break; - case NV30_VP_INST_DEST_TC(7): vp->or |= (1 << 21); break; - default: - break; - } - - hw[3] |= (dst.index << NV30_VP_INST_DEST_SHIFT); - hw[0] |= NV30_VP_INST_VEC_DEST_TEMP_MASK | (1<<20); - - /*XXX: no way this is entirely correct, someone needs to - * figure out what exactly it is. - */ - hw[3] |= 0x800; - break; - default: - assert(0); - } -} - -static void -nv30_vp_arith(struct nv30_vpc *vpc, int slot, int op, - struct nv30_sreg dst, int mask, - struct nv30_sreg s0, struct nv30_sreg s1, - struct nv30_sreg s2) -{ - struct nv30_vertex_program *vp = vpc->vp; - uint32_t *hw; - - vp->insns = realloc(vp->insns, ++vp->nr_insns * sizeof(*vpc->vpi)); - vpc->vpi = &vp->insns[vp->nr_insns - 1]; - memset(vpc->vpi, 0, sizeof(*vpc->vpi)); - vpc->vpi->const_index = -1; - - hw = vpc->vpi->data; - - hw[0] |= (NV30_VP_INST_COND_TR << NV30_VP_INST_COND_SHIFT); - hw[0] |= ((0 << NV30_VP_INST_COND_SWZ_X_SHIFT) | - (1 << NV30_VP_INST_COND_SWZ_Y_SHIFT) | - (2 << NV30_VP_INST_COND_SWZ_Z_SHIFT) | - (3 << NV30_VP_INST_COND_SWZ_W_SHIFT)); - - hw[1] |= (op << NV30_VP_INST_VEC_OPCODE_SHIFT); -// hw[3] |= NV30_VP_INST_SCA_DEST_TEMP_MASK; -// hw[3] |= (mask << NV30_VP_INST_VEC_WRITEMASK_SHIFT); - - if (dst.type == NV30SR_OUTPUT) { - if (slot) - hw[3] |= (mask << NV30_VP_INST_SDEST_WRITEMASK_SHIFT); - else - hw[3] |= (mask << NV30_VP_INST_VDEST_WRITEMASK_SHIFT); - } else { - if (slot) - hw[3] |= (mask << NV30_VP_INST_STEMP_WRITEMASK_SHIFT); - else - hw[3] |= (mask << NV30_VP_INST_VTEMP_WRITEMASK_SHIFT); - } - - emit_dst(vpc, hw, slot, dst); - emit_src(vpc, hw, 0, s0); - emit_src(vpc, hw, 1, s1); - emit_src(vpc, hw, 2, s2); -} - -static INLINE struct nv30_sreg -tgsi_src(struct nv30_vpc *vpc, const struct tgsi_full_src_register *fsrc) { - struct nv30_sreg src; - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - src = nv30_sr(NV30SR_INPUT, fsrc->Register.Index); - break; - case TGSI_FILE_CONSTANT: - src = constant(vpc, fsrc->Register.Index, 0, 0, 0, 0); - break; - case TGSI_FILE_IMMEDIATE: - src = vpc->imm[fsrc->Register.Index]; - break; - case TGSI_FILE_TEMPORARY: - if (vpc->high_temp < fsrc->Register.Index) - vpc->high_temp = fsrc->Register.Index; - src = nv30_sr(NV30SR_TEMP, fsrc->Register.Index); - break; - default: - NOUVEAU_ERR("bad src file\n"); - break; - } - - src.abs = fsrc->Register.Absolute; - src.negate = fsrc->Register.Negate; - src.swz[0] = fsrc->Register.SwizzleX; - src.swz[1] = fsrc->Register.SwizzleY; - src.swz[2] = fsrc->Register.SwizzleZ; - src.swz[3] = fsrc->Register.SwizzleW; - return src; -} - -static INLINE struct nv30_sreg -tgsi_dst(struct nv30_vpc *vpc, const struct tgsi_full_dst_register *fdst) { - struct nv30_sreg dst; - - switch (fdst->Register.File) { - case TGSI_FILE_OUTPUT: - dst = nv30_sr(NV30SR_OUTPUT, - vpc->output_map[fdst->Register.Index]); - - break; - case TGSI_FILE_TEMPORARY: - dst = nv30_sr(NV30SR_TEMP, fdst->Register.Index); - if (vpc->high_temp < dst.index) - vpc->high_temp = dst.index; - break; - default: - NOUVEAU_ERR("bad dst file\n"); - break; - } - - return dst; -} - -static INLINE int -tgsi_mask(uint tgsi) -{ - int mask = 0; - - if (tgsi & TGSI_WRITEMASK_X) mask |= MASK_X; - if (tgsi & TGSI_WRITEMASK_Y) mask |= MASK_Y; - if (tgsi & TGSI_WRITEMASK_Z) mask |= MASK_Z; - if (tgsi & TGSI_WRITEMASK_W) mask |= MASK_W; - return mask; -} - -static boolean -nv30_vertprog_parse_instruction(struct nv30_vpc *vpc, - const struct tgsi_full_instruction *finst) -{ - struct nv30_sreg src[3], dst, tmp; - struct nv30_sreg none = nv30_sr(NV30SR_NONE, 0); - int mask; - int ai = -1, ci = -1; - int i; - - if (finst->Instruction.Opcode == TGSI_OPCODE_END) - return TRUE; - - vpc->temp_temp_count = 0; - for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *fsrc; - - fsrc = &finst->Src[i]; - if (fsrc->Register.File == TGSI_FILE_TEMPORARY) { - src[i] = tgsi_src(vpc, fsrc); - } - } - - for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *fsrc; - - fsrc = &finst->Src[i]; - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - if (ai == -1 || ai == fsrc->Register.Index) { - ai = fsrc->Register.Index; - src[i] = tgsi_src(vpc, fsrc); - } else { - src[i] = temp(vpc); - arith(vpc, 0, OP_MOV, src[i], MASK_ALL, - tgsi_src(vpc, fsrc), none, none); - } - break; - /*XXX: index comparison is broken now that consts come from - * two different register files. - */ - case TGSI_FILE_CONSTANT: - case TGSI_FILE_IMMEDIATE: - if (ci == -1 || ci == fsrc->Register.Index) { - ci = fsrc->Register.Index; - src[i] = tgsi_src(vpc, fsrc); - } else { - src[i] = temp(vpc); - arith(vpc, 0, OP_MOV, src[i], MASK_ALL, - tgsi_src(vpc, fsrc), none, none); - } - break; - case TGSI_FILE_TEMPORARY: - /* handled above */ - break; - default: - NOUVEAU_ERR("bad src file\n"); - return FALSE; - } - } - - dst = tgsi_dst(vpc, &finst->Dst[0]); - mask = tgsi_mask(finst->Dst[0].Register.WriteMask); - - switch (finst->Instruction.Opcode) { - case TGSI_OPCODE_ABS: - arith(vpc, 0, OP_MOV, dst, mask, abs(src[0]), none, none); - break; - case TGSI_OPCODE_ADD: - arith(vpc, 0, OP_ADD, dst, mask, src[0], none, src[1]); - break; - case TGSI_OPCODE_ARL: - arith(vpc, 0, OP_ARL, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_DP3: - arith(vpc, 0, OP_DP3, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DP4: - arith(vpc, 0, OP_DP4, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DPH: - arith(vpc, 0, OP_DPH, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DST: - arith(vpc, 0, OP_DST, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_EX2: - arith(vpc, 1, OP_EX2, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_EXP: - arith(vpc, 1, OP_EXP, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_FLR: - arith(vpc, 0, OP_FLR, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_FRC: - arith(vpc, 0, OP_FRC, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_LG2: - arith(vpc, 1, OP_LG2, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_LIT: - arith(vpc, 1, OP_LIT, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_LOG: - arith(vpc, 1, OP_LOG, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_MAD: - arith(vpc, 0, OP_MAD, dst, mask, src[0], src[1], src[2]); - break; - case TGSI_OPCODE_MAX: - arith(vpc, 0, OP_MAX, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_MIN: - arith(vpc, 0, OP_MIN, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_MOV: - arith(vpc, 0, OP_MOV, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_MUL: - arith(vpc, 0, OP_MUL, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_POW: - tmp = temp(vpc); - arith(vpc, 1, OP_LG2, tmp, MASK_X, none, none, - swz(src[0], X, X, X, X)); - arith(vpc, 0, OP_MUL, tmp, MASK_X, swz(tmp, X, X, X, X), - swz(src[1], X, X, X, X), none); - arith(vpc, 1, OP_EX2, dst, mask, none, none, - swz(tmp, X, X, X, X)); - break; - case TGSI_OPCODE_RCP: - arith(vpc, 1, OP_RCP, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_RET: - break; - case TGSI_OPCODE_RSQ: - arith(vpc, 1, OP_RSQ, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_SGE: - arith(vpc, 0, OP_SGE, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SGT: - arith(vpc, 0, OP_SGT, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SLT: - arith(vpc, 0, OP_SLT, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SUB: - arith(vpc, 0, OP_ADD, dst, mask, src[0], none, neg(src[1])); - break; - case TGSI_OPCODE_XPD: - tmp = temp(vpc); - arith(vpc, 0, OP_MUL, tmp, mask, - swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none); - arith(vpc, 0, OP_MAD, dst, (mask & ~MASK_W), - swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), - neg(tmp)); - break; - default: - NOUVEAU_ERR("invalid opcode %d\n", finst->Instruction.Opcode); - return FALSE; - } - - return TRUE; -} - -static boolean -nv30_vertprog_parse_decl_output(struct nv30_vpc *vpc, - const struct tgsi_full_declaration *fdec) -{ - int hw; - - switch (fdec->Semantic.Name) { - case TGSI_SEMANTIC_POSITION: - hw = NV30_VP_INST_DEST_POS; - break; - case TGSI_SEMANTIC_COLOR: - if (fdec->Semantic.Index == 0) { - hw = NV30_VP_INST_DEST_COL0; - } else - if (fdec->Semantic.Index == 1) { - hw = NV30_VP_INST_DEST_COL1; - } else { - NOUVEAU_ERR("bad colour semantic index\n"); - return FALSE; - } - break; - case TGSI_SEMANTIC_BCOLOR: - if (fdec->Semantic.Index == 0) { - hw = NV30_VP_INST_DEST_BFC0; - } else - if (fdec->Semantic.Index == 1) { - hw = NV30_VP_INST_DEST_BFC1; - } else { - NOUVEAU_ERR("bad bcolour semantic index\n"); - return FALSE; - } - break; - case TGSI_SEMANTIC_FOG: - hw = NV30_VP_INST_DEST_FOGC; - break; - case TGSI_SEMANTIC_PSIZE: - hw = NV30_VP_INST_DEST_PSZ; - break; - case TGSI_SEMANTIC_GENERIC: - if (fdec->Semantic.Index <= 7) { - hw = NV30_VP_INST_DEST_TC(fdec->Semantic.Index); - } else { - NOUVEAU_ERR("bad generic semantic index\n"); - return FALSE; - } - break; - case TGSI_SEMANTIC_EDGEFLAG: - NOUVEAU_ERR("cannot handle edgeflag output\n"); - return FALSE; - default: - NOUVEAU_ERR("bad output semantic\n"); - return FALSE; - } - - vpc->output_map[fdec->Range.First] = hw; - return TRUE; -} - -static boolean -nv30_vertprog_prepare(struct nv30_vpc *vpc) -{ - struct tgsi_parse_context p; - int nr_imm = 0; - - tgsi_parse_init(&p, vpc->vp->pipe.tokens); - while (!tgsi_parse_end_of_tokens(&p)) { - const union tgsi_full_token *tok = &p.FullToken; - - tgsi_parse_token(&p); - switch(tok->Token.Type) { - case TGSI_TOKEN_TYPE_IMMEDIATE: - nr_imm++; - break; - default: - break; - } - } - tgsi_parse_free(&p); - - if (nr_imm) { - vpc->imm = CALLOC(nr_imm, sizeof(struct nv30_sreg)); - assert(vpc->imm); - } - - return TRUE; -} - -static void -nv30_vertprog_translate(struct nv30_context *nv30, - struct nv30_vertex_program *vp) -{ - struct tgsi_parse_context parse; - struct nv30_vpc *vpc = NULL; - - tgsi_dump(vp->pipe.tokens,0); - - vpc = CALLOC(1, sizeof(struct nv30_vpc)); - if (!vpc) - return; - vpc->vp = vp; - vpc->high_temp = -1; - - if (!nv30_vertprog_prepare(vpc)) { - FREE(vpc); - return; - } - - tgsi_parse_init(&parse, vp->pipe.tokens); - - while (!tgsi_parse_end_of_tokens(&parse)) { - tgsi_parse_token(&parse); - - switch (parse.FullToken.Token.Type) { - case TGSI_TOKEN_TYPE_DECLARATION: - { - const struct tgsi_full_declaration *fdec; - fdec = &parse.FullToken.FullDeclaration; - switch (fdec->Declaration.File) { - case TGSI_FILE_OUTPUT: - if (!nv30_vertprog_parse_decl_output(vpc, fdec)) - goto out_err; - break; - default: - break; - } - } - break; - case TGSI_TOKEN_TYPE_IMMEDIATE: - { - const struct tgsi_full_immediate *imm; - - imm = &parse.FullToken.FullImmediate; - assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32); - assert(imm->Immediate.NrTokens == 4 + 1); - vpc->imm[vpc->nr_imm++] = - constant(vpc, -1, - imm->u[0].Float, - imm->u[1].Float, - imm->u[2].Float, - imm->u[3].Float); - } - break; - case TGSI_TOKEN_TYPE_INSTRUCTION: - { - const struct tgsi_full_instruction *finst; - finst = &parse.FullToken.FullInstruction; - if (!nv30_vertprog_parse_instruction(vpc, finst)) - goto out_err; - } - break; - default: - break; - } - } - - vp->insns[vp->nr_insns - 1].data[3] |= NV30_VP_INST_LAST; - vp->translated = TRUE; -out_err: - tgsi_parse_free(&parse); - FREE(vpc); -} - -static boolean -nv30_vertprog_validate(struct nv30_context *nv30) -{ - struct pipe_screen *pscreen = nv30->pipe.screen; - struct nv30_screen *screen = nv30->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *rankine = screen->rankine; - struct nv30_vertex_program *vp; - struct pipe_buffer *constbuf; - boolean upload_code = FALSE, upload_data = FALSE; - int i; - - vp = nv30->vertprog; - constbuf = nv30->constbuf[PIPE_SHADER_VERTEX]; - - /* Translate TGSI shader into hw bytecode */ - if (!vp->translated) { - nv30_vertprog_translate(nv30, vp); - if (!vp->translated) - return FALSE; - } - - /* Allocate hw vtxprog exec slots */ - if (!vp->exec) { - struct nouveau_resource *heap = nv30->screen->vp_exec_heap; - struct nouveau_stateobj *so; - uint vplen = vp->nr_insns; - - if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec)) { - while (heap->next && heap->size < vplen) { - struct nv30_vertex_program *evict; - - evict = heap->next->priv; - nouveau_resource_free(&evict->exec); - } - - if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec)) - assert(0); - } - - so = so_new(1, 1, 0); - so_method(so, rankine, NV34TCL_VP_START_FROM_ID, 1); - so_data (so, vp->exec->start); - so_ref(so, &vp->so); - so_ref(NULL, &so); - - upload_code = TRUE; - } - - /* Allocate hw vtxprog const slots */ - if (vp->nr_consts && !vp->data) { - struct nouveau_resource *heap = nv30->screen->vp_data_heap; - - if (nouveau_resource_alloc(heap, vp->nr_consts, vp, &vp->data)) { - while (heap->next && heap->size < vp->nr_consts) { - struct nv30_vertex_program *evict; - - evict = heap->next->priv; - nouveau_resource_free(&evict->data); - } - - if (nouveau_resource_alloc(heap, vp->nr_consts, vp, - &vp->data)) - assert(0); - } - - /*XXX: handle this some day */ - assert(vp->data->start >= vp->data_start_min); - - upload_data = TRUE; - if (vp->data_start != vp->data->start) - upload_code = TRUE; - } - - /* If exec or data segments moved we need to patch the program to - * fixup offsets and register IDs. - */ - if (vp->exec_start != vp->exec->start) { - for (i = 0; i < vp->nr_insns; i++) { - struct nv30_vertex_program_exec *vpi = &vp->insns[i]; - - if (vpi->has_branch_offset) { - assert(0); - } - } - - vp->exec_start = vp->exec->start; - } - - if (vp->nr_consts && vp->data_start != vp->data->start) { - for (i = 0; i < vp->nr_insns; i++) { - struct nv30_vertex_program_exec *vpi = &vp->insns[i]; - - if (vpi->const_index >= 0) { - vpi->data[1] &= ~NV30_VP_INST_CONST_SRC_MASK; - vpi->data[1] |= - (vpi->const_index + vp->data->start) << - NV30_VP_INST_CONST_SRC_SHIFT; - - } - } - - vp->data_start = vp->data->start; - } - - /* Update + Upload constant values */ - if (vp->nr_consts) { - float *map = NULL; - - if (constbuf) { - map = pipe_buffer_map(pscreen, constbuf, - PIPE_BUFFER_USAGE_CPU_READ); - } - - for (i = 0; i < vp->nr_consts; i++) { - struct nv30_vertex_program_data *vpd = &vp->consts[i]; - - if (vpd->index >= 0) { - if (!upload_data && - !memcmp(vpd->value, &map[vpd->index * 4], - 4 * sizeof(float))) - continue; - memcpy(vpd->value, &map[vpd->index * 4], - 4 * sizeof(float)); - } - - BEGIN_RING(chan, rankine, NV34TCL_VP_UPLOAD_CONST_ID, 5); - OUT_RING (chan, i + vp->data->start); - OUT_RINGp (chan, (uint32_t *)vpd->value, 4); - } - - if (constbuf) - pipe_buffer_unmap(pscreen, constbuf); - } - - /* Upload vtxprog */ - if (upload_code) { -#if 0 - for (i = 0; i < vp->nr_insns; i++) { - NOUVEAU_MSG("VP inst %d: 0x%08x 0x%08x 0x%08x 0x%08x\n", - i, vp->insns[i].data[0], vp->insns[i].data[1], - vp->insns[i].data[2], vp->insns[i].data[3]); - } -#endif - BEGIN_RING(chan, rankine, NV34TCL_VP_UPLOAD_FROM_ID, 1); - OUT_RING (chan, vp->exec->start); - for (i = 0; i < vp->nr_insns; i++) { - BEGIN_RING(chan, rankine, NV34TCL_VP_UPLOAD_INST(0), 4); - OUT_RINGp (chan, vp->insns[i].data, 4); - } - } - - if (vp->so != nv30->state.hw[NV30_STATE_VERTPROG]) { - so_ref(vp->so, &nv30->state.hw[NV30_STATE_VERTPROG]); - return TRUE; - } - - return FALSE; -} - -void -nv30_vertprog_destroy(struct nv30_context *nv30, struct nv30_vertex_program *vp) -{ - vp->translated = FALSE; - - if (vp->nr_insns) { - FREE(vp->insns); - vp->insns = NULL; - vp->nr_insns = 0; - } - - if (vp->nr_consts) { - FREE(vp->consts); - vp->consts = NULL; - vp->nr_consts = 0; - } - - nouveau_resource_free(&vp->exec); - vp->exec_start = 0; - nouveau_resource_free(&vp->data); - vp->data_start = 0; - vp->data_start_min = 0; - - vp->ir = vp->or = 0; - so_ref(NULL, &vp->so); -} - -struct nv30_state_entry nv30_state_vertprog = { - .validate = nv30_vertprog_validate, - .dirty = { - .pipe = NV30_NEW_VERTPROG /*| NV30_NEW_UCP*/, - .hw = NV30_STATE_VERTPROG, - } -}; diff --git a/src/gallium/drivers/nv40/Makefile b/src/gallium/drivers/nv40/Makefile deleted file mode 100644 index 09348d98a74..00000000000 --- a/src/gallium/drivers/nv40/Makefile +++ /dev/null @@ -1,30 +0,0 @@ -TOP = ../../../.. -include $(TOP)/configs/current - -LIBNAME = nv40 - -C_SOURCES = \ - nv40_clear.c \ - nv40_context.c \ - nv40_draw.c \ - nv40_fragprog.c \ - nv40_fragtex.c \ - nv40_miptree.c \ - nv40_query.c \ - nv40_screen.c \ - nv40_state.c \ - nv40_state_blend.c \ - nv40_state_emit.c \ - nv40_state_fb.c \ - nv40_state_rasterizer.c \ - nv40_state_scissor.c \ - nv40_state_stipple.c \ - nv40_state_viewport.c \ - nv40_state_zsa.c \ - nv40_surface.c \ - nv40_transfer.c \ - nv40_vbo.c \ - nv40_vertprog.c \ - nv40_video_context.c - -include ../../Makefile.template diff --git a/src/gallium/drivers/nv40/nv40_context.c b/src/gallium/drivers/nv40/nv40_context.c deleted file mode 100644 index 65dc73e88b3..00000000000 --- a/src/gallium/drivers/nv40/nv40_context.c +++ /dev/null @@ -1,87 +0,0 @@ -#include "draw/draw_context.h" -#include "pipe/p_defines.h" - -#include "nv40_context.h" -#include "nv40_screen.h" - -static void -nv40_flush(struct pipe_context *pipe, unsigned flags, - struct pipe_fence_handle **fence) -{ - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_screen *screen = nv40->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; - - if (flags & PIPE_FLUSH_TEXTURE_CACHE) { - BEGIN_RING(chan, curie, 0x1fd8, 1); - OUT_RING (chan, 2); - BEGIN_RING(chan, curie, 0x1fd8, 1); - OUT_RING (chan, 1); - } - - FIRE_RING(chan); - if (fence) - *fence = NULL; -} - -static void -nv40_destroy(struct pipe_context *pipe) -{ - struct nv40_context *nv40 = nv40_context(pipe); - unsigned i; - - for (i = 0; i < NV40_STATE_MAX; i++) { - if (nv40->state.hw[i]) - so_ref(NULL, &nv40->state.hw[i]); - } - - if (nv40->draw) - draw_destroy(nv40->draw); - FREE(nv40); -} - -struct pipe_context * -nv40_create(struct pipe_screen *pscreen, void *priv) -{ - struct nv40_screen *screen = nv40_screen(pscreen); - struct pipe_winsys *ws = pscreen->winsys; - struct nv40_context *nv40; - struct nouveau_winsys *nvws = screen->nvws; - - nv40 = CALLOC(1, sizeof(struct nv40_context)); - if (!nv40) - return NULL; - nv40->screen = screen; - - nv40->nvws = nvws; - - nv40->pipe.winsys = ws; - nv40->pipe.priv = priv; - nv40->pipe.screen = pscreen; - nv40->pipe.destroy = nv40_destroy; - nv40->pipe.draw_arrays = nv40_draw_arrays; - nv40->pipe.draw_elements = nv40_draw_elements; - nv40->pipe.clear = nv40_clear; - nv40->pipe.flush = nv40_flush; - - nv40->pipe.is_texture_referenced = nouveau_is_texture_referenced; - nv40->pipe.is_buffer_referenced = nouveau_is_buffer_referenced; - - screen->base.channel->user_private = nv40; - screen->base.channel->flush_notify = nv40_state_flush_notify; - - nv40_init_query_functions(nv40); - nv40_init_surface_functions(nv40); - nv40_init_state_functions(nv40); - - /* Create, configure, and install fallback swtnl path */ - nv40->draw = draw_create(); - draw_wide_point_threshold(nv40->draw, 9999999.0); - draw_wide_line_threshold(nv40->draw, 9999999.0); - draw_enable_line_stipple(nv40->draw, FALSE); - draw_enable_point_sprites(nv40->draw, FALSE); - draw_set_rasterize_stage(nv40->draw, nv40_draw_render_stage(nv40)); - - return &nv40->pipe; -} diff --git a/src/gallium/drivers/nv40/nv40_context.h b/src/gallium/drivers/nv40/nv40_context.h deleted file mode 100644 index 97fb6a2ef94..00000000000 --- a/src/gallium/drivers/nv40/nv40_context.h +++ /dev/null @@ -1,239 +0,0 @@ -#ifndef __NV40_CONTEXT_H__ -#define __NV40_CONTEXT_H__ - -#include <stdio.h> - -#include "pipe/p_context.h" -#include "pipe/p_defines.h" -#include "pipe/p_state.h" -#include "pipe/p_compiler.h" - -#include "util/u_memory.h" -#include "util/u_math.h" -#include "util/u_inlines.h" - -#include "draw/draw_vertex.h" - -#include "nouveau/nouveau_winsys.h" -#include "nouveau/nouveau_gldefs.h" -#include "nouveau/nouveau_context.h" -#include "nouveau/nouveau_stateobj.h" - -#include "nv40_state.h" - -#define NOUVEAU_ERR(fmt, args...) \ - fprintf(stderr, "%s:%d - "fmt, __func__, __LINE__, ##args); -#define NOUVEAU_MSG(fmt, args...) \ - fprintf(stderr, "nouveau: "fmt, ##args); - -enum nv40_state_index { - NV40_STATE_FB = 0, - NV40_STATE_VIEWPORT = 1, - NV40_STATE_BLEND = 2, - NV40_STATE_RAST = 3, - NV40_STATE_ZSA = 4, - NV40_STATE_BCOL = 5, - NV40_STATE_CLIP = 6, - NV40_STATE_SCISSOR = 7, - NV40_STATE_STIPPLE = 8, - NV40_STATE_FRAGPROG = 9, - NV40_STATE_VERTPROG = 10, - NV40_STATE_FRAGTEX0 = 11, - NV40_STATE_FRAGTEX1 = 12, - NV40_STATE_FRAGTEX2 = 13, - NV40_STATE_FRAGTEX3 = 14, - NV40_STATE_FRAGTEX4 = 15, - NV40_STATE_FRAGTEX5 = 16, - NV40_STATE_FRAGTEX6 = 17, - NV40_STATE_FRAGTEX7 = 18, - NV40_STATE_FRAGTEX8 = 19, - NV40_STATE_FRAGTEX9 = 20, - NV40_STATE_FRAGTEX10 = 21, - NV40_STATE_FRAGTEX11 = 22, - NV40_STATE_FRAGTEX12 = 23, - NV40_STATE_FRAGTEX13 = 24, - NV40_STATE_FRAGTEX14 = 25, - NV40_STATE_FRAGTEX15 = 26, - NV40_STATE_VERTTEX0 = 27, - NV40_STATE_VERTTEX1 = 28, - NV40_STATE_VERTTEX2 = 29, - NV40_STATE_VERTTEX3 = 30, - NV40_STATE_VTXBUF = 31, - NV40_STATE_VTXFMT = 32, - NV40_STATE_VTXATTR = 33, - NV40_STATE_SR = 34, - NV40_STATE_MAX = 35 -}; - -#include "nv40_screen.h" - -#define NV40_NEW_BLEND (1 << 0) -#define NV40_NEW_RAST (1 << 1) -#define NV40_NEW_ZSA (1 << 2) -#define NV40_NEW_SAMPLER (1 << 3) -#define NV40_NEW_FB (1 << 4) -#define NV40_NEW_STIPPLE (1 << 5) -#define NV40_NEW_SCISSOR (1 << 6) -#define NV40_NEW_VIEWPORT (1 << 7) -#define NV40_NEW_BCOL (1 << 8) -#define NV40_NEW_VERTPROG (1 << 9) -#define NV40_NEW_FRAGPROG (1 << 10) -#define NV40_NEW_ARRAYS (1 << 11) -#define NV40_NEW_UCP (1 << 12) -#define NV40_NEW_SR (1 << 13) - -struct nv40_rasterizer_state { - struct pipe_rasterizer_state pipe; - struct nouveau_stateobj *so; -}; - -struct nv40_zsa_state { - struct pipe_depth_stencil_alpha_state pipe; - struct nouveau_stateobj *so; -}; - -struct nv40_blend_state { - struct pipe_blend_state pipe; - struct nouveau_stateobj *so; -}; - - -struct nv40_state { - unsigned scissor_enabled; - unsigned stipple_enabled; - unsigned fp_samplers; - - uint64_t dirty; - struct nouveau_stateobj *hw[NV40_STATE_MAX]; -}; - -struct nv40_context { - struct pipe_context pipe; - - struct nouveau_winsys *nvws; - struct nv40_screen *screen; - - struct draw_context *draw; - - /* HW state derived from pipe states */ - struct nv40_state state; - struct { - struct nv40_vertex_program *vertprog; - - unsigned nr_attribs; - unsigned hw[PIPE_MAX_SHADER_INPUTS]; - unsigned draw[PIPE_MAX_SHADER_INPUTS]; - unsigned emit[PIPE_MAX_SHADER_INPUTS]; - } swtnl; - - enum { - HW, SWTNL, SWRAST - } render_mode; - unsigned fallback_swtnl; - unsigned fallback_swrast; - - /* Context state */ - unsigned dirty, draw_dirty; - struct pipe_scissor_state scissor; - unsigned stipple[32]; - struct pipe_clip_state clip; - struct nv40_vertex_program *vertprog; - struct nv40_fragment_program *fragprog; - struct pipe_buffer *constbuf[PIPE_SHADER_TYPES]; - unsigned constbuf_nr[PIPE_SHADER_TYPES]; - struct nv40_rasterizer_state *rasterizer; - struct nv40_zsa_state *zsa; - struct nv40_blend_state *blend; - struct pipe_blend_color blend_colour; - struct pipe_stencil_ref stencil_ref; - struct pipe_viewport_state viewport; - struct pipe_framebuffer_state framebuffer; - struct pipe_buffer *idxbuf; - unsigned idxbuf_format; - struct nv40_sampler_state *tex_sampler[PIPE_MAX_SAMPLERS]; - struct nv40_miptree *tex_miptree[PIPE_MAX_SAMPLERS]; - unsigned nr_samplers; - unsigned nr_textures; - unsigned dirty_samplers; - struct pipe_vertex_buffer vtxbuf[PIPE_MAX_ATTRIBS]; - unsigned vtxbuf_nr; - struct pipe_vertex_element vtxelt[PIPE_MAX_ATTRIBS]; - unsigned vtxelt_nr; -}; - -static INLINE struct nv40_context * -nv40_context(struct pipe_context *pipe) -{ - return (struct nv40_context *)pipe; -} - -struct nv40_state_entry { - boolean (*validate)(struct nv40_context *nv40); - struct { - unsigned pipe; - unsigned hw; - } dirty; -}; - -extern void nv40_init_state_functions(struct nv40_context *nv40); -extern void nv40_init_surface_functions(struct nv40_context *nv40); -extern void nv40_init_query_functions(struct nv40_context *nv40); - -extern void nv40_screen_init_miptree_functions(struct pipe_screen *pscreen); - -/* nv40_draw.c */ -extern struct draw_stage *nv40_draw_render_stage(struct nv40_context *nv40); -extern void nv40_draw_elements_swtnl(struct pipe_context *pipe, - struct pipe_buffer *idxbuf, - unsigned ib_size, unsigned mode, - unsigned start, unsigned count); - -/* nv40_vertprog.c */ -extern void nv40_vertprog_destroy(struct nv40_context *, - struct nv40_vertex_program *); - -/* nv40_fragprog.c */ -extern void nv40_fragprog_destroy(struct nv40_context *, - struct nv40_fragment_program *); - -/* nv40_fragtex.c */ -extern void nv40_fragtex_bind(struct nv40_context *); - -/* nv40_state.c and friends */ -extern boolean nv40_state_validate(struct nv40_context *nv40); -extern boolean nv40_state_validate_swtnl(struct nv40_context *nv40); -extern void nv40_state_emit(struct nv40_context *nv40); -extern void nv40_state_flush_notify(struct nouveau_channel *chan); -extern struct nv40_state_entry nv40_state_rasterizer; -extern struct nv40_state_entry nv40_state_scissor; -extern struct nv40_state_entry nv40_state_stipple; -extern struct nv40_state_entry nv40_state_fragprog; -extern struct nv40_state_entry nv40_state_vertprog; -extern struct nv40_state_entry nv40_state_blend; -extern struct nv40_state_entry nv40_state_blend_colour; -extern struct nv40_state_entry nv40_state_zsa; -extern struct nv40_state_entry nv40_state_viewport; -extern struct nv40_state_entry nv40_state_framebuffer; -extern struct nv40_state_entry nv40_state_fragtex; -extern struct nv40_state_entry nv40_state_vbo; -extern struct nv40_state_entry nv40_state_vtxfmt; -extern struct nv40_state_entry nv40_state_sr; - -/* nv40_vbo.c */ -extern void nv40_draw_arrays(struct pipe_context *, unsigned mode, - unsigned start, unsigned count); -extern void nv40_draw_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, - unsigned indexSize, - unsigned mode, unsigned start, - unsigned count); - -/* nv40_clear.c */ -extern void nv40_clear(struct pipe_context *pipe, unsigned buffers, - const float *rgba, double depth, unsigned stencil); - -/* nv40_context.c */ -struct pipe_context * -nv40_create(struct pipe_screen *pscreen, void *priv); - -#endif diff --git a/src/gallium/drivers/nv40/nv40_draw.c b/src/gallium/drivers/nv40/nv40_draw.c deleted file mode 100644 index 48bd84d16c5..00000000000 --- a/src/gallium/drivers/nv40/nv40_draw.c +++ /dev/null @@ -1,360 +0,0 @@ -#include "pipe/p_shader_tokens.h" -#include "util/u_inlines.h" - -#include "util/u_pack_color.h" - -#include "draw/draw_context.h" -#include "draw/draw_vertex.h" -#include "draw/draw_pipe.h" - -#include "nv40_context.h" -#define NV40_SHADER_NO_FUCKEDNESS -#include "nv40_shader.h" - -/* Simple, but crappy, swtnl path, hopefully we wont need to hit this very - * often at all. Uses "quadro style" vertex submission + a fixed vertex - * layout to avoid the need to generate a vertex program or vtxfmt. - */ - -struct nv40_render_stage { - struct draw_stage stage; - struct nv40_context *nv40; - unsigned prim; -}; - -static INLINE struct nv40_render_stage * -nv40_render_stage(struct draw_stage *stage) -{ - return (struct nv40_render_stage *)stage; -} - -static INLINE void -nv40_render_vertex(struct nv40_context *nv40, const struct vertex_header *v) -{ - struct nv40_screen *screen = nv40->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; - unsigned i; - - for (i = 0; i < nv40->swtnl.nr_attribs; i++) { - unsigned idx = nv40->swtnl.draw[i]; - unsigned hw = nv40->swtnl.hw[i]; - - switch (nv40->swtnl.emit[i]) { - case EMIT_OMIT: - break; - case EMIT_1F: - BEGIN_RING(chan, curie, NV40TCL_VTX_ATTR_1F(hw), 1); - OUT_RING (chan, fui(v->data[idx][0])); - break; - case EMIT_2F: - BEGIN_RING(chan, curie, NV40TCL_VTX_ATTR_2F_X(hw), 2); - OUT_RING (chan, fui(v->data[idx][0])); - OUT_RING (chan, fui(v->data[idx][1])); - break; - case EMIT_3F: - BEGIN_RING(chan, curie, NV40TCL_VTX_ATTR_3F_X(hw), 3); - OUT_RING (chan, fui(v->data[idx][0])); - OUT_RING (chan, fui(v->data[idx][1])); - OUT_RING (chan, fui(v->data[idx][2])); - break; - case EMIT_4F: - BEGIN_RING(chan, curie, NV40TCL_VTX_ATTR_4F_X(hw), 4); - OUT_RING (chan, fui(v->data[idx][0])); - OUT_RING (chan, fui(v->data[idx][1])); - OUT_RING (chan, fui(v->data[idx][2])); - OUT_RING (chan, fui(v->data[idx][3])); - break; - case EMIT_4UB: - BEGIN_RING(chan, curie, NV40TCL_VTX_ATTR_4UB(hw), 1); - OUT_RING (chan, pack_ub4(float_to_ubyte(v->data[idx][0]), - float_to_ubyte(v->data[idx][1]), - float_to_ubyte(v->data[idx][2]), - float_to_ubyte(v->data[idx][3]))); - break; - default: - assert(0); - break; - } - } -} - -static INLINE void -nv40_render_prim(struct draw_stage *stage, struct prim_header *prim, - unsigned mode, unsigned count) -{ - struct nv40_render_stage *rs = nv40_render_stage(stage); - struct nv40_context *nv40 = rs->nv40; - - struct nv40_screen *screen = nv40->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; - unsigned i; - - /* Ensure there's room for 4xfloat32 + potentially 3 begin/end */ - if (AVAIL_RING(chan) < ((count * 20) + 6)) { - if (rs->prim != NV40TCL_BEGIN_END_STOP) { - NOUVEAU_ERR("AIII, missed flush\n"); - assert(0); - } - FIRE_RING(chan); - nv40_state_emit(nv40); - } - - /* Switch primitive modes if necessary */ - if (rs->prim != mode) { - if (rs->prim != NV40TCL_BEGIN_END_STOP) { - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); - OUT_RING (chan, NV40TCL_BEGIN_END_STOP); - } - - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); - OUT_RING (chan, mode); - rs->prim = mode; - } - - /* Emit vertex data */ - for (i = 0; i < count; i++) - nv40_render_vertex(nv40, prim->v[i]); - - /* If it's likely we'll need to empty the push buffer soon, finish - * off the primitive now. - */ - if (AVAIL_RING(chan) < ((count * 20) + 6)) { - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); - OUT_RING (chan, NV40TCL_BEGIN_END_STOP); - rs->prim = NV40TCL_BEGIN_END_STOP; - } -} - -static void -nv40_render_point(struct draw_stage *draw, struct prim_header *prim) -{ - nv40_render_prim(draw, prim, NV40TCL_BEGIN_END_POINTS, 1); -} - -static void -nv40_render_line(struct draw_stage *draw, struct prim_header *prim) -{ - nv40_render_prim(draw, prim, NV40TCL_BEGIN_END_LINES, 2); -} - -static void -nv40_render_tri(struct draw_stage *draw, struct prim_header *prim) -{ - nv40_render_prim(draw, prim, NV40TCL_BEGIN_END_TRIANGLES, 3); -} - -static void -nv40_render_flush(struct draw_stage *draw, unsigned flags) -{ - struct nv40_render_stage *rs = nv40_render_stage(draw); - struct nv40_context *nv40 = rs->nv40; - struct nv40_screen *screen = nv40->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; - - if (rs->prim != NV40TCL_BEGIN_END_STOP) { - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); - OUT_RING (chan, NV40TCL_BEGIN_END_STOP); - rs->prim = NV40TCL_BEGIN_END_STOP; - } -} - -static void -nv40_render_reset_stipple_counter(struct draw_stage *draw) -{ -} - -static void -nv40_render_destroy(struct draw_stage *draw) -{ - FREE(draw); -} - -static INLINE void -emit_mov(struct nv40_vertex_program *vp, - unsigned dst, unsigned src, unsigned vor, unsigned mask) -{ - struct nv40_vertex_program_exec *inst; - - vp->insns = realloc(vp->insns, - sizeof(struct nv40_vertex_program_exec) * - ++vp->nr_insns); - inst = &vp->insns[vp->nr_insns - 1]; - - inst->data[0] = 0x401f9c6c; - inst->data[1] = 0x0040000d | (src << 8); - inst->data[2] = 0x8106c083; - inst->data[3] = 0x6041ff80 | (dst << 2) | (mask << 13); - inst->const_index = -1; - inst->has_branch_offset = FALSE; - - vp->ir |= (1 << src); - if (vor != ~0) - vp->or |= (1 << vor); -} - -static struct nv40_vertex_program * -create_drawvp(struct nv40_context *nv40) -{ - struct nv40_vertex_program *vp = CALLOC_STRUCT(nv40_vertex_program); - unsigned i; - - emit_mov(vp, NV40_VP_INST_DEST_POS, 0, ~0, 0xf); - emit_mov(vp, NV40_VP_INST_DEST_COL0, 3, 0, 0xf); - emit_mov(vp, NV40_VP_INST_DEST_COL1, 4, 1, 0xf); - emit_mov(vp, NV40_VP_INST_DEST_BFC0, 3, 2, 0xf); - emit_mov(vp, NV40_VP_INST_DEST_BFC1, 4, 3, 0xf); - emit_mov(vp, NV40_VP_INST_DEST_FOGC, 5, 4, 0x8); - for (i = 0; i < 8; i++) - emit_mov(vp, NV40_VP_INST_DEST_TC(i), 8 + i, 14 + i, 0xf); - - vp->insns[vp->nr_insns - 1].data[3] |= 1; - vp->translated = TRUE; - return vp; -} - -struct draw_stage * -nv40_draw_render_stage(struct nv40_context *nv40) -{ - struct nv40_render_stage *render = CALLOC_STRUCT(nv40_render_stage); - - if (!nv40->swtnl.vertprog) - nv40->swtnl.vertprog = create_drawvp(nv40); - - render->nv40 = nv40; - render->stage.draw = nv40->draw; - render->stage.point = nv40_render_point; - render->stage.line = nv40_render_line; - render->stage.tri = nv40_render_tri; - render->stage.flush = nv40_render_flush; - render->stage.reset_stipple_counter = nv40_render_reset_stipple_counter; - render->stage.destroy = nv40_render_destroy; - - return &render->stage; -} - -void -nv40_draw_elements_swtnl(struct pipe_context *pipe, - struct pipe_buffer *idxbuf, unsigned idxbuf_size, - unsigned mode, unsigned start, unsigned count) -{ - struct nv40_context *nv40 = nv40_context(pipe); - struct pipe_screen *pscreen = pipe->screen; - unsigned i; - void *map; - - if (!nv40_state_validate_swtnl(nv40)) - return; - nv40->state.dirty &= ~(1ULL << NV40_STATE_VTXBUF); - nv40_state_emit(nv40); - - for (i = 0; i < nv40->vtxbuf_nr; i++) { - map = pipe_buffer_map(pscreen, nv40->vtxbuf[i].buffer, - PIPE_BUFFER_USAGE_CPU_READ); - draw_set_mapped_vertex_buffer(nv40->draw, i, map); - } - - if (idxbuf) { - map = pipe_buffer_map(pscreen, idxbuf, - PIPE_BUFFER_USAGE_CPU_READ); - draw_set_mapped_element_buffer(nv40->draw, idxbuf_size, map); - } else { - draw_set_mapped_element_buffer(nv40->draw, 0, NULL); - } - - if (nv40->constbuf[PIPE_SHADER_VERTEX]) { - const unsigned nr = nv40->constbuf_nr[PIPE_SHADER_VERTEX]; - - map = pipe_buffer_map(pscreen, - nv40->constbuf[PIPE_SHADER_VERTEX], - PIPE_BUFFER_USAGE_CPU_READ); - draw_set_mapped_constant_buffer(nv40->draw, PIPE_SHADER_VERTEX, 0, - map, nr); - } - - draw_arrays(nv40->draw, mode, start, count); - - for (i = 0; i < nv40->vtxbuf_nr; i++) - pipe_buffer_unmap(pscreen, nv40->vtxbuf[i].buffer); - - if (idxbuf) - pipe_buffer_unmap(pscreen, idxbuf); - - if (nv40->constbuf[PIPE_SHADER_VERTEX]) - pipe_buffer_unmap(pscreen, nv40->constbuf[PIPE_SHADER_VERTEX]); - - draw_flush(nv40->draw); - pipe->flush(pipe, 0, NULL); -} - -static INLINE void -emit_attrib(struct nv40_context *nv40, unsigned hw, unsigned emit, - unsigned semantic, unsigned index) -{ - unsigned draw_out = draw_find_shader_output(nv40->draw, semantic, index); - unsigned a = nv40->swtnl.nr_attribs++; - - nv40->swtnl.hw[a] = hw; - nv40->swtnl.emit[a] = emit; - nv40->swtnl.draw[a] = draw_out; -} - -static boolean -nv40_state_vtxfmt_validate(struct nv40_context *nv40) -{ - struct nv40_fragment_program *fp = nv40->fragprog; - unsigned colour = 0, texcoords = 0, fog = 0, i; - - /* Determine needed fragprog inputs */ - for (i = 0; i < fp->info.num_inputs; i++) { - switch (fp->info.input_semantic_name[i]) { - case TGSI_SEMANTIC_POSITION: - break; - case TGSI_SEMANTIC_COLOR: - colour |= (1 << fp->info.input_semantic_index[i]); - break; - case TGSI_SEMANTIC_GENERIC: - texcoords |= (1 << fp->info.input_semantic_index[i]); - break; - case TGSI_SEMANTIC_FOG: - fog = 1; - break; - default: - assert(0); - } - } - - nv40->swtnl.nr_attribs = 0; - - /* Map draw vtxprog output to hw attribute IDs */ - for (i = 0; i < 2; i++) { - if (!(colour & (1 << i))) - continue; - emit_attrib(nv40, 3 + i, EMIT_4UB, TGSI_SEMANTIC_COLOR, i); - } - - for (i = 0; i < 8; i++) { - if (!(texcoords & (1 << i))) - continue; - emit_attrib(nv40, 8 + i, EMIT_4F, TGSI_SEMANTIC_GENERIC, i); - } - - if (fog) { - emit_attrib(nv40, 5, EMIT_1F, TGSI_SEMANTIC_FOG, 0); - } - - emit_attrib(nv40, 0, EMIT_3F, TGSI_SEMANTIC_POSITION, 0); - - return FALSE; -} - -struct nv40_state_entry nv40_state_vtxfmt = { - .validate = nv40_state_vtxfmt_validate, - .dirty = { - .pipe = NV40_NEW_ARRAYS | NV40_NEW_FRAGPROG, - .hw = 0 - } -}; - diff --git a/src/gallium/drivers/nv40/nv40_fragtex.c b/src/gallium/drivers/nv40/nv40_fragtex.c deleted file mode 100644 index b60118922a2..00000000000 --- a/src/gallium/drivers/nv40/nv40_fragtex.c +++ /dev/null @@ -1,173 +0,0 @@ -#include "util/u_format.h" - -#include "nv40_context.h" - -#define _(m,tf,ts0x,ts0y,ts0z,ts0w,ts1x,ts1y,ts1z,ts1w,sx,sy,sz,sw) \ -{ \ - TRUE, \ - PIPE_FORMAT_##m, \ - NV40TCL_TEX_FORMAT_FORMAT_##tf, \ - (NV40TCL_TEX_SWIZZLE_S0_X_##ts0x | NV40TCL_TEX_SWIZZLE_S0_Y_##ts0y | \ - NV40TCL_TEX_SWIZZLE_S0_Z_##ts0z | NV40TCL_TEX_SWIZZLE_S0_W_##ts0w | \ - NV40TCL_TEX_SWIZZLE_S1_X_##ts1x | NV40TCL_TEX_SWIZZLE_S1_Y_##ts1y | \ - NV40TCL_TEX_SWIZZLE_S1_Z_##ts1z | NV40TCL_TEX_SWIZZLE_S1_W_##ts1w), \ - ((NV40TCL_TEX_FILTER_SIGNED_RED*sx) | (NV40TCL_TEX_FILTER_SIGNED_GREEN*sy) | \ - (NV40TCL_TEX_FILTER_SIGNED_BLUE*sz) | (NV40TCL_TEX_FILTER_SIGNED_ALPHA*sw)) \ -} - -struct nv40_texture_format { - boolean defined; - uint pipe; - int format; - int swizzle; - int sign; -}; - -static struct nv40_texture_format -nv40_texture_formats[] = { - _(B8G8R8X8_UNORM, A8R8G8B8, S1, S1, S1, ONE, X, Y, Z, W, 0, 0, 0, 0), - _(B8G8R8A8_UNORM, A8R8G8B8, S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), - _(B5G5R5A1_UNORM, A1R5G5B5, S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), - _(B4G4R4A4_UNORM, A4R4G4B4, S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), - _(B5G6R5_UNORM , R5G6B5 , S1, S1, S1, ONE, X, Y, Z, W, 0, 0, 0, 0), - _(L8_UNORM , L8 , S1, S1, S1, ONE, X, X, X, X, 0, 0, 0, 0), - _(A8_UNORM , L8 , ZERO, ZERO, ZERO, S1, X, X, X, X, 0, 0, 0, 0), - _(R16_SNORM , A16 , ZERO, ZERO, S1, ONE, X, X, X, Y, 1, 1, 1, 1), - _(I8_UNORM , L8 , S1, S1, S1, S1, X, X, X, X, 0, 0, 0, 0), - _(L8A8_UNORM , A8L8 , S1, S1, S1, S1, X, X, X, Y, 0, 0, 0, 0), - _(Z16_UNORM , Z16 , S1, S1, S1, ONE, X, X, X, X, 0, 0, 0, 0), - _(S8Z24_UNORM , Z24 , S1, S1, S1, ONE, X, X, X, X, 0, 0, 0, 0), - _(DXT1_RGB , DXT1 , S1, S1, S1, ONE, X, Y, Z, W, 0, 0, 0, 0), - _(DXT1_RGBA , DXT1 , S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), - _(DXT3_RGBA , DXT3 , S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), - _(DXT5_RGBA , DXT5 , S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), - {}, -}; - -static struct nv40_texture_format * -nv40_fragtex_format(uint pipe_format) -{ - struct nv40_texture_format *tf = nv40_texture_formats; - - while (tf->defined) { - if (tf->pipe == pipe_format) - return tf; - tf++; - } - - NOUVEAU_ERR("unknown texture format %s\n", util_format_name(pipe_format)); - return NULL; -} - - -static struct nouveau_stateobj * -nv40_fragtex_build(struct nv40_context *nv40, int unit) -{ - struct nv40_sampler_state *ps = nv40->tex_sampler[unit]; - struct nv40_miptree *nv40mt = nv40->tex_miptree[unit]; - struct nouveau_bo *bo = nouveau_bo(nv40mt->buffer); - struct pipe_texture *pt = &nv40mt->base; - struct nv40_texture_format *tf; - struct nouveau_stateobj *so; - uint32_t txf, txs, txp; - unsigned tex_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; - - tf = nv40_fragtex_format(pt->format); - if (!tf) - assert(0); - - txf = ps->fmt; - txf |= tf->format | 0x8000; - txf |= ((pt->last_level + 1) << NV40TCL_TEX_FORMAT_MIPMAP_COUNT_SHIFT); - - if (1) /* XXX */ - txf |= NV40TCL_TEX_FORMAT_NO_BORDER; - - switch (pt->target) { - case PIPE_TEXTURE_CUBE: - txf |= NV40TCL_TEX_FORMAT_CUBIC; - /* fall-through */ - case PIPE_TEXTURE_2D: - txf |= NV40TCL_TEX_FORMAT_DIMS_2D; - break; - case PIPE_TEXTURE_3D: - txf |= NV40TCL_TEX_FORMAT_DIMS_3D; - break; - case PIPE_TEXTURE_1D: - txf |= NV40TCL_TEX_FORMAT_DIMS_1D; - break; - default: - NOUVEAU_ERR("Unknown target %d\n", pt->target); - return NULL; - } - - if (!(pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) { - txp = 0; - } else { - txp = nv40mt->level[0].pitch; - txf |= NV40TCL_TEX_FORMAT_LINEAR; - } - - txs = tf->swizzle; - - so = so_new(2, 9, 2); - so_method(so, nv40->screen->curie, NV40TCL_TEX_OFFSET(unit), 8); - so_reloc (so, bo, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0); - so_reloc (so, bo, txf, tex_flags | NOUVEAU_BO_OR, - NV40TCL_TEX_FORMAT_DMA0, NV40TCL_TEX_FORMAT_DMA1); - so_data (so, ps->wrap); - so_data (so, NV40TCL_TEX_ENABLE_ENABLE | ps->en); - so_data (so, txs); - so_data (so, ps->filt | tf->sign | 0x2000 /*voodoo*/); - so_data (so, (pt->width0 << NV40TCL_TEX_SIZE0_W_SHIFT) | - pt->height0); - so_data (so, ps->bcol); - so_method(so, nv40->screen->curie, NV40TCL_TEX_SIZE1(unit), 1); - so_data (so, (pt->depth0 << NV40TCL_TEX_SIZE1_DEPTH_SHIFT) | txp); - - return so; -} - -static boolean -nv40_fragtex_validate(struct nv40_context *nv40) -{ - struct nv40_fragment_program *fp = nv40->fragprog; - struct nv40_state *state = &nv40->state; - struct nouveau_stateobj *so; - unsigned samplers, unit; - - samplers = state->fp_samplers & ~fp->samplers; - while (samplers) { - unit = ffs(samplers) - 1; - samplers &= ~(1 << unit); - - so = so_new(1, 1, 0); - so_method(so, nv40->screen->curie, NV40TCL_TEX_ENABLE(unit), 1); - so_data (so, 0); - so_ref(so, &nv40->state.hw[NV40_STATE_FRAGTEX0 + unit]); - state->dirty |= (1ULL << (NV40_STATE_FRAGTEX0 + unit)); - } - - samplers = nv40->dirty_samplers & fp->samplers; - while (samplers) { - unit = ffs(samplers) - 1; - samplers &= ~(1 << unit); - - so = nv40_fragtex_build(nv40, unit); - so_ref(so, &nv40->state.hw[NV40_STATE_FRAGTEX0 + unit]); - so_ref(NULL, &so); - state->dirty |= (1ULL << (NV40_STATE_FRAGTEX0 + unit)); - } - - nv40->state.fp_samplers = fp->samplers; - return FALSE; -} - -struct nv40_state_entry nv40_state_fragtex = { - .validate = nv40_fragtex_validate, - .dirty = { - .pipe = NV40_NEW_SAMPLER | NV40_NEW_FRAGPROG, - .hw = 0 - } -}; - diff --git a/src/gallium/drivers/nv40/nv40_miptree.c b/src/gallium/drivers/nv40/nv40_miptree.c deleted file mode 100644 index 85d7e1f1972..00000000000 --- a/src/gallium/drivers/nv40/nv40_miptree.c +++ /dev/null @@ -1,235 +0,0 @@ -#include "pipe/p_state.h" -#include "pipe/p_defines.h" -#include "util/u_inlines.h" -#include "util/u_format.h" -#include "util/u_math.h" - -#include "nv40_context.h" -#include "../nouveau/nv04_surface_2d.h" - - - -static void -nv40_miptree_layout(struct nv40_miptree *mt) -{ - struct pipe_texture *pt = &mt->base; - uint width = pt->width0; - uint offset = 0; - int nr_faces, l, f; - uint wide_pitch = pt->tex_usage & (PIPE_TEXTURE_USAGE_SAMPLER | - PIPE_TEXTURE_USAGE_DEPTH_STENCIL | - PIPE_TEXTURE_USAGE_RENDER_TARGET | - PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_PRIMARY); - - if (pt->target == PIPE_TEXTURE_CUBE) { - nr_faces = 6; - } else - if (pt->target == PIPE_TEXTURE_3D) { - nr_faces = pt->depth0; - } else { - nr_faces = 1; - } - - for (l = 0; l <= pt->last_level; l++) { - if (wide_pitch && (pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) - mt->level[l].pitch = align(util_format_get_stride(pt->format, pt->width0), 64); - else - mt->level[l].pitch = util_format_get_stride(pt->format, width); - - mt->level[l].image_offset = - CALLOC(nr_faces, sizeof(unsigned)); - - width = u_minify(width, 1); - } - - for (f = 0; f < nr_faces; f++) { - for (l = 0; l < pt->last_level; l++) { - mt->level[l].image_offset[f] = offset; - - if (!(pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR) && - u_minify(pt->width0, l + 1) > 1 && u_minify(pt->height0, l + 1) > 1) - offset += align(mt->level[l].pitch * u_minify(pt->height0, l), 64); - else - offset += mt->level[l].pitch * u_minify(pt->height0, l); - } - - mt->level[l].image_offset[f] = offset; - offset += mt->level[l].pitch * u_minify(pt->height0, l); - } - - mt->total_size = offset; -} - -static struct pipe_texture * -nv40_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *pt) -{ - struct nv40_miptree *mt; - unsigned buf_usage = PIPE_BUFFER_USAGE_PIXEL | - NOUVEAU_BUFFER_USAGE_TEXTURE; - - mt = MALLOC(sizeof(struct nv40_miptree)); - if (!mt) - return NULL; - mt->base = *pt; - pipe_reference_init(&mt->base.reference, 1); - mt->base.screen = pscreen; - - /* Swizzled textures must be POT */ - if (pt->width0 & (pt->width0 - 1) || - pt->height0 & (pt->height0 - 1)) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - else - if (pt->tex_usage & (PIPE_TEXTURE_USAGE_PRIMARY | - PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_DEPTH_STENCIL)) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - else - if (pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - else { - switch (pt->format) { - /* TODO: Figure out which formats can be swizzled */ - case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_B8G8R8X8_UNORM: - case PIPE_FORMAT_R16_SNORM: - { - if (debug_get_bool_option("NOUVEAU_NO_SWIZZLE", FALSE)) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - break; - } - default: - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - } - } - - if (pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC) - buf_usage |= PIPE_BUFFER_USAGE_CPU_READ_WRITE; - - /* apparently we can't render to swizzled surfaces smaller than 64 bytes, so make them linear. - * If the user did not ask for a render target, they can still render to it, but it will cost them an extra copy. - * This also happens for small mipmaps of large textures. */ - if (pt->tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET && util_format_get_stride(pt->format, pt->width0) < 64) - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - - nv40_miptree_layout(mt); - - mt->buffer = pscreen->buffer_create(pscreen, 256, buf_usage, mt->total_size); - if (!mt->buffer) { - FREE(mt); - return NULL; - } - mt->bo = nouveau_bo(mt->buffer); - return &mt->base; -} - -static struct pipe_texture * -nv40_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt, - const unsigned *stride, struct pipe_buffer *pb) -{ - struct nv40_miptree *mt; - - /* Only supports 2D, non-mipmapped textures for the moment */ - if (pt->target != PIPE_TEXTURE_2D || pt->last_level != 0 || - pt->depth0 != 1) - return NULL; - - mt = CALLOC_STRUCT(nv40_miptree); - if (!mt) - return NULL; - - mt->base = *pt; - pipe_reference_init(&mt->base.reference, 1); - mt->base.screen = pscreen; - mt->level[0].pitch = stride[0]; - mt->level[0].image_offset = CALLOC(1, sizeof(unsigned)); - - /* Assume whoever created this buffer expects it to be linear for now */ - mt->base.tex_usage |= NOUVEAU_TEXTURE_USAGE_LINEAR; - - pipe_buffer_reference(&mt->buffer, pb); - mt->bo = nouveau_bo(mt->buffer); - return &mt->base; -} - -static void -nv40_miptree_destroy(struct pipe_texture *pt) -{ - struct nv40_miptree *mt = (struct nv40_miptree *)pt; - int l; - - pipe_buffer_reference(&mt->buffer, NULL); - for (l = 0; l <= pt->last_level; l++) { - if (mt->level[l].image_offset) - FREE(mt->level[l].image_offset); - } - - FREE(mt); -} - -static struct pipe_surface * -nv40_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, - unsigned face, unsigned level, unsigned zslice, - unsigned flags) -{ - struct nv40_miptree *mt = (struct nv40_miptree *)pt; - struct nv04_surface *ns; - - ns = CALLOC_STRUCT(nv04_surface); - if (!ns) - return NULL; - pipe_texture_reference(&ns->base.texture, pt); - ns->base.format = pt->format; - ns->base.width = u_minify(pt->width0, level); - ns->base.height = u_minify(pt->height0, level); - ns->base.usage = flags; - pipe_reference_init(&ns->base.reference, 1); - ns->base.face = face; - ns->base.level = level; - ns->base.zslice = zslice; - ns->pitch = mt->level[level].pitch; - - if (pt->target == PIPE_TEXTURE_CUBE) { - ns->base.offset = mt->level[level].image_offset[face]; - } else - if (pt->target == PIPE_TEXTURE_3D) { - ns->base.offset = mt->level[level].image_offset[zslice]; - } else { - ns->base.offset = mt->level[level].image_offset[0]; - } - - /* create a linear temporary that we can render into if necessary. - * Note that ns->pitch is always a multiple of 64 for linear surfaces and swizzled surfaces are POT, so - * ns->pitch & 63 is equivalent to (ns->pitch < 64 && swizzled)*/ - if((ns->pitch & 63) && (ns->base.usage & (PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER)) == PIPE_BUFFER_USAGE_GPU_WRITE) - return &nv04_surface_wrap_for_render(pscreen, ((struct nv40_screen*)pscreen)->eng2d, ns)->base; - - return &ns->base; -} - -static void -nv40_miptree_surface_del(struct pipe_surface *ps) -{ - struct nv04_surface* ns = (struct nv04_surface*)ps; - if(ns->backing) - { - struct nv40_screen* screen = (struct nv40_screen*)ps->texture->screen; - if(ns->backing->base.usage & PIPE_BUFFER_USAGE_GPU_WRITE) - screen->eng2d->copy(screen->eng2d, &ns->backing->base, 0, 0, ps, 0, 0, ns->base.width, ns->base.height); - nv40_miptree_surface_del(&ns->backing->base); - } - - pipe_texture_reference(&ps->texture, NULL); - FREE(ps); -} - -void -nv40_screen_init_miptree_functions(struct pipe_screen *pscreen) -{ - pscreen->texture_create = nv40_miptree_create; - pscreen->texture_blanket = nv40_miptree_blanket; - pscreen->texture_destroy = nv40_miptree_destroy; - pscreen->get_tex_surface = nv40_miptree_surface_new; - pscreen->tex_surface_destroy = nv40_miptree_surface_del; -} - diff --git a/src/gallium/drivers/nv40/nv40_query.c b/src/gallium/drivers/nv40/nv40_query.c deleted file mode 100644 index 8ed4a67dd03..00000000000 --- a/src/gallium/drivers/nv40/nv40_query.c +++ /dev/null @@ -1,127 +0,0 @@ -#include "pipe/p_context.h" - -#include "nv40_context.h" - -struct nv40_query { - struct nouveau_resource *object; - unsigned type; - boolean ready; - uint64_t result; -}; - -static INLINE struct nv40_query * -nv40_query(struct pipe_query *pipe) -{ - return (struct nv40_query *)pipe; -} - -static struct pipe_query * -nv40_query_create(struct pipe_context *pipe, unsigned query_type) -{ - struct nv40_query *q; - - q = CALLOC(1, sizeof(struct nv40_query)); - q->type = query_type; - - return (struct pipe_query *)q; -} - -static void -nv40_query_destroy(struct pipe_context *pipe, struct pipe_query *pq) -{ - struct nv40_query *q = nv40_query(pq); - - if (q->object) - nouveau_resource_free(&q->object); - FREE(q); -} - -static void -nv40_query_begin(struct pipe_context *pipe, struct pipe_query *pq) -{ - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_query *q = nv40_query(pq); - struct nv40_screen *screen = nv40->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; - - assert(q->type == PIPE_QUERY_OCCLUSION_COUNTER); - - /* Happens when end_query() is called, then another begin_query() - * without querying the result in-between. For now we'll wait for - * the existing query to notify completion, but it could be better. - */ - if (q->object) { - uint64_t tmp; - pipe->get_query_result(pipe, pq, 1, &tmp); - } - - if (nouveau_resource_alloc(nv40->screen->query_heap, 1, NULL, &q->object)) - assert(0); - nouveau_notifier_reset(nv40->screen->query, q->object->start); - - BEGIN_RING(chan, curie, NV40TCL_QUERY_RESET, 1); - OUT_RING (chan, 1); - BEGIN_RING(chan, curie, NV40TCL_QUERY_UNK17CC, 1); - OUT_RING (chan, 1); - - q->ready = FALSE; -} - -static void -nv40_query_end(struct pipe_context *pipe, struct pipe_query *pq) -{ - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_query *q = nv40_query(pq); - struct nv40_screen *screen = nv40->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; - - BEGIN_RING(chan, curie, NV40TCL_QUERY_GET, 1); - OUT_RING (chan, (0x01 << NV40TCL_QUERY_GET_UNK24_SHIFT) | - ((q->object->start * 32) << NV40TCL_QUERY_GET_OFFSET_SHIFT)); - FIRE_RING(chan); -} - -static boolean -nv40_query_result(struct pipe_context *pipe, struct pipe_query *pq, - boolean wait, uint64_t *result) -{ - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_query *q = nv40_query(pq); - - assert(q->object && q->type == PIPE_QUERY_OCCLUSION_COUNTER); - - if (!q->ready) { - unsigned status; - - status = nouveau_notifier_status(nv40->screen->query, - q->object->start); - if (status != NV_NOTIFY_STATE_STATUS_COMPLETED) { - if (wait == FALSE) - return FALSE; - nouveau_notifier_wait_status(nv40->screen->query, - q->object->start, - NV_NOTIFY_STATE_STATUS_COMPLETED, - 0); - } - - q->result = nouveau_notifier_return_val(nv40->screen->query, - q->object->start); - q->ready = TRUE; - nouveau_resource_free(&q->object); - } - - *result = q->result; - return TRUE; -} - -void -nv40_init_query_functions(struct nv40_context *nv40) -{ - nv40->pipe.create_query = nv40_query_create; - nv40->pipe.destroy_query = nv40_query_destroy; - nv40->pipe.begin_query = nv40_query_begin; - nv40->pipe.end_query = nv40_query_end; - nv40->pipe.get_query_result = nv40_query_result; -} diff --git a/src/gallium/drivers/nv40/nv40_screen.c b/src/gallium/drivers/nv40/nv40_screen.c deleted file mode 100644 index 779b7cdcb6f..00000000000 --- a/src/gallium/drivers/nv40/nv40_screen.c +++ /dev/null @@ -1,322 +0,0 @@ -#include "pipe/p_screen.h" - -#include "nv40_context.h" -#include "nv40_video_context.h" -#include "nv40_screen.h" - -#define NV4X_GRCLASS4097_CHIPSETS 0x00000baf -#define NV4X_GRCLASS4497_CHIPSETS 0x00005450 -#define NV6X_GRCLASS4497_CHIPSETS 0x00000088 - -static int -nv40_screen_get_param(struct pipe_screen *pscreen, int param) -{ - struct nv40_screen *screen = nv40_screen(pscreen); - - switch (param) { - case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: - return 16; - case PIPE_CAP_NPOT_TEXTURES: - return 1; - case PIPE_CAP_TWO_SIDED_STENCIL: - return 1; - case PIPE_CAP_GLSL: - return 0; - case PIPE_CAP_ANISOTROPIC_FILTER: - return 1; - case PIPE_CAP_POINT_SPRITE: - return 1; - case PIPE_CAP_MAX_RENDER_TARGETS: - return 4; - case PIPE_CAP_OCCLUSION_QUERY: - return 1; - case PIPE_CAP_TEXTURE_SHADOW_MAP: - return 1; - case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: - return 13; - case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: - return 10; - case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: - return 13; - case PIPE_CAP_TEXTURE_MIRROR_CLAMP: - case PIPE_CAP_TEXTURE_MIRROR_REPEAT: - return 1; - case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS: - return 0; /* We have 4 - but unsupported currently */ - case PIPE_CAP_TGSI_CONT_SUPPORTED: - return 0; - case PIPE_CAP_BLEND_EQUATION_SEPARATE: - return 1; - case NOUVEAU_CAP_HW_VTXBUF: - return 1; - case NOUVEAU_CAP_HW_IDXBUF: - if (screen->curie->grclass == NV40TCL) - return 1; - return 0; - case PIPE_CAP_INDEP_BLEND_ENABLE: - return 0; - case PIPE_CAP_INDEP_BLEND_FUNC: - return 0; - case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: - case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: - return 1; - case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: - case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: - return 0; - case PIPE_CAP_MAX_COMBINED_SAMPLERS: - return 16; - default: - NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param); - return 0; - } -} - -static float -nv40_screen_get_paramf(struct pipe_screen *pscreen, int param) -{ - switch (param) { - case PIPE_CAP_MAX_LINE_WIDTH: - case PIPE_CAP_MAX_LINE_WIDTH_AA: - return 10.0; - case PIPE_CAP_MAX_POINT_WIDTH: - case PIPE_CAP_MAX_POINT_WIDTH_AA: - return 64.0; - case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: - return 16.0; - case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: - return 16.0; - default: - NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param); - return 0.0; - } -} - -static boolean -nv40_screen_surface_format_supported(struct pipe_screen *pscreen, - enum pipe_format format, - enum pipe_texture_target target, - unsigned tex_usage, unsigned geom_flags) -{ - if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) { - switch (format) { - case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_B5G6R5_UNORM: - return TRUE; - default: - break; - } - } else - if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) { - switch (format) { - case PIPE_FORMAT_S8Z24_UNORM: - case PIPE_FORMAT_X8Z24_UNORM: - case PIPE_FORMAT_Z16_UNORM: - return TRUE; - default: - break; - } - } else { - switch (format) { - case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_B5G5R5A1_UNORM: - case PIPE_FORMAT_B4G4R4A4_UNORM: - case PIPE_FORMAT_B5G6R5_UNORM: - case PIPE_FORMAT_R16_SNORM: - case PIPE_FORMAT_L8_UNORM: - case PIPE_FORMAT_A8_UNORM: - case PIPE_FORMAT_I8_UNORM: - case PIPE_FORMAT_L8A8_UNORM: - case PIPE_FORMAT_Z16_UNORM: - case PIPE_FORMAT_S8Z24_UNORM: - case PIPE_FORMAT_DXT1_RGB: - case PIPE_FORMAT_DXT1_RGBA: - case PIPE_FORMAT_DXT3_RGBA: - case PIPE_FORMAT_DXT5_RGBA: - return TRUE; - default: - break; - } - } - - return FALSE; -} - -static struct pipe_buffer * -nv40_surface_buffer(struct pipe_surface *surf) -{ - struct nv40_miptree *mt = (struct nv40_miptree *)surf->texture; - - return mt->buffer; -} - -static void -nv40_screen_destroy(struct pipe_screen *pscreen) -{ - struct nv40_screen *screen = nv40_screen(pscreen); - unsigned i; - - for (i = 0; i < NV40_STATE_MAX; i++) { - if (screen->state[i]) - so_ref(NULL, &screen->state[i]); - } - - nouveau_resource_destroy(&screen->vp_exec_heap); - nouveau_resource_destroy(&screen->vp_data_heap); - nouveau_resource_destroy(&screen->query_heap); - nouveau_notifier_free(&screen->query); - nouveau_notifier_free(&screen->sync); - nouveau_grobj_free(&screen->curie); - nv04_surface_2d_takedown(&screen->eng2d); - - nouveau_screen_fini(&screen->base); - - FREE(pscreen); -} - -struct pipe_screen * -nv40_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) -{ - struct nv40_screen *screen = CALLOC_STRUCT(nv40_screen); - struct nouveau_channel *chan; - struct pipe_screen *pscreen; - struct nouveau_stateobj *so; - unsigned curie_class = 0; - int ret; - - if (!screen) - return NULL; - pscreen = &screen->base.base; - - ret = nouveau_screen_init(&screen->base, dev); - if (ret) { - nv40_screen_destroy(pscreen); - return NULL; - } - chan = screen->base.channel; - - pscreen->winsys = ws; - pscreen->destroy = nv40_screen_destroy; - pscreen->get_param = nv40_screen_get_param; - pscreen->get_paramf = nv40_screen_get_paramf; - pscreen->is_format_supported = nv40_screen_surface_format_supported; - pscreen->context_create = nv40_create; - pscreen->video_context_create = nv40_video_create; - - nv40_screen_init_miptree_functions(pscreen); - nv40_screen_init_transfer_functions(pscreen); - - /* 3D object */ - switch (dev->chipset & 0xf0) { - case 0x40: - if (NV4X_GRCLASS4097_CHIPSETS & (1 << (dev->chipset & 0x0f))) - curie_class = NV40TCL; - else - if (NV4X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f))) - curie_class = NV44TCL; - break; - case 0x60: - if (NV6X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f))) - curie_class = NV44TCL; - break; - } - - if (!curie_class) { - NOUVEAU_ERR("Unknown nv4x chipset: nv%02x\n", dev->chipset); - return NULL; - } - - ret = nouveau_grobj_alloc(chan, 0xbeef3097, curie_class, &screen->curie); - if (ret) { - NOUVEAU_ERR("Error creating 3D object: %d\n", ret); - return FALSE; - } - - /* 2D engine setup */ - screen->eng2d = nv04_surface_2d_init(&screen->base); - screen->eng2d->buf = nv40_surface_buffer; - - /* Notifier for sync purposes */ - ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync); - if (ret) { - NOUVEAU_ERR("Error creating notifier object: %d\n", ret); - nv40_screen_destroy(pscreen); - return NULL; - } - - /* Query objects */ - ret = nouveau_notifier_alloc(chan, 0xbeef0302, 32, &screen->query); - if (ret) { - NOUVEAU_ERR("Error initialising query objects: %d\n", ret); - nv40_screen_destroy(pscreen); - return NULL; - } - - nouveau_resource_init(&screen->query_heap, 0, 32); - if (ret) { - NOUVEAU_ERR("Error initialising query object heap: %d\n", ret); - nv40_screen_destroy(pscreen); - return NULL; - } - - /* Vtxprog resources */ - if (nouveau_resource_init(&screen->vp_exec_heap, 0, 512) || - nouveau_resource_init(&screen->vp_data_heap, 0, 256)) { - nv40_screen_destroy(pscreen); - return NULL; - } - - /* Static curie initialisation */ - so = so_new(16, 25, 0); - so_method(so, screen->curie, NV40TCL_DMA_NOTIFY, 1); - so_data (so, screen->sync->handle); - so_method(so, screen->curie, NV40TCL_DMA_TEXTURE0, 2); - so_data (so, chan->vram->handle); - so_data (so, chan->gart->handle); - so_method(so, screen->curie, NV40TCL_DMA_COLOR1, 1); - so_data (so, chan->vram->handle); - so_method(so, screen->curie, NV40TCL_DMA_COLOR0, 2); - so_data (so, chan->vram->handle); - so_data (so, chan->vram->handle); - so_method(so, screen->curie, NV40TCL_DMA_VTXBUF0, 2); - so_data (so, chan->vram->handle); - so_data (so, chan->gart->handle); - so_method(so, screen->curie, NV40TCL_DMA_FENCE, 2); - so_data (so, 0); - so_data (so, screen->query->handle); - so_method(so, screen->curie, NV40TCL_DMA_UNK01AC, 2); - so_data (so, chan->vram->handle); - so_data (so, chan->vram->handle); - so_method(so, screen->curie, NV40TCL_DMA_COLOR2, 2); - so_data (so, chan->vram->handle); - so_data (so, chan->vram->handle); - - so_method(so, screen->curie, 0x1ea4, 3); - so_data (so, 0x00000010); - so_data (so, 0x01000100); - so_data (so, 0xff800006); - - /* vtxprog output routing */ - so_method(so, screen->curie, 0x1fc4, 1); - so_data (so, 0x06144321); - so_method(so, screen->curie, 0x1fc8, 2); - so_data (so, 0xedcba987); - so_data (so, 0x00000021); - so_method(so, screen->curie, 0x1fd0, 1); - so_data (so, 0x00171615); - so_method(so, screen->curie, 0x1fd4, 1); - so_data (so, 0x001b1a19); - - so_method(so, screen->curie, 0x1ef8, 1); - so_data (so, 0x0020ffff); - so_method(so, screen->curie, 0x1d64, 1); - so_data (so, 0x00d30000); - so_method(so, screen->curie, 0x1e94, 1); - so_data (so, 0x00000001); - - so_emit(chan, so); - so_ref(NULL, &so); - nouveau_pushbuf_flush(chan, 0); - - return pscreen; -} - diff --git a/src/gallium/drivers/nv40/nv40_screen.h b/src/gallium/drivers/nv40/nv40_screen.h deleted file mode 100644 index 9437aa050d4..00000000000 --- a/src/gallium/drivers/nv40/nv40_screen.h +++ /dev/null @@ -1,40 +0,0 @@ -#ifndef __NV40_SCREEN_H__ -#define __NV40_SCREEN_H__ - -#include "nouveau/nouveau_screen.h" -#include "nouveau/nv04_surface_2d.h" - -struct nv40_screen { - struct nouveau_screen base; - - struct nouveau_winsys *nvws; - - struct nv40_context *cur_ctx; - - /* HW graphics objects */ - struct nv04_surface_2d *eng2d; - struct nouveau_grobj *curie; - struct nouveau_notifier *sync; - - /* Query object resources */ - struct nouveau_notifier *query; - struct nouveau_resource *query_heap; - - /* Vtxprog resources */ - struct nouveau_resource *vp_exec_heap; - struct nouveau_resource *vp_data_heap; - - /* Current 3D state of channel */ - struct nouveau_stateobj *state[NV40_STATE_MAX]; -}; - -static INLINE struct nv40_screen * -nv40_screen(struct pipe_screen *screen) -{ - return (struct nv40_screen *)screen; -} - -void -nv40_screen_init_transfer_functions(struct pipe_screen *pscreen); - -#endif diff --git a/src/gallium/drivers/nv40/nv40_shader.h b/src/gallium/drivers/nv40/nv40_shader.h deleted file mode 100644 index 854dccf5486..00000000000 --- a/src/gallium/drivers/nv40/nv40_shader.h +++ /dev/null @@ -1,556 +0,0 @@ -#ifndef __NV40_SHADER_H__ -#define __NV40_SHADER_H__ - -/* Vertex programs instruction set - * - * The NV40 instruction set is very similar to NV30. Most fields are in - * a slightly different position in the instruction however. - * - * Merged instructions - * In some cases it is possible to put two instructions into one opcode - * slot. The rules for when this is OK is not entirely clear to me yet. - * - * There are separate writemasks and dest temp register fields for each - * grouping of instructions. There is however only one field with the - * ID of a result register. Writing to temp/result regs is selected by - * setting VEC_RESULT/SCA_RESULT. - * - * Temporary registers - * The source/dest temp register fields have been extended by 1 bit, to - * give a total of 32 temporary registers. - * - * Relative Addressing - * NV40 can use an address register to index into vertex attribute regs. - * This is done by putting the offset value into INPUT_SRC and setting - * the INDEX_INPUT flag. - * - * Conditional execution (see NV_vertex_program{2,3} for details) - * There is a second condition code register on NV40, it's use is enabled - * by setting the COND_REG_SELECT_1 flag. - * - * Texture lookup - * TODO - */ - -/* ---- OPCODE BITS 127:96 / data DWORD 0 --- */ -#define NV40_VP_INST_VEC_RESULT (1 << 30) -/* uncertain.. */ -#define NV40_VP_INST_COND_UPDATE_ENABLE ((1 << 14)|1<<29) -/* use address reg as index into attribs */ -#define NV40_VP_INST_INDEX_INPUT (1 << 27) -#define NV40_VP_INST_COND_REG_SELECT_1 (1 << 25) -#define NV40_VP_INST_ADDR_REG_SELECT_1 (1 << 24) -#define NV40_VP_INST_SRC2_ABS (1 << 23) -#define NV40_VP_INST_SRC1_ABS (1 << 22) -#define NV40_VP_INST_SRC0_ABS (1 << 21) -#define NV40_VP_INST_VEC_DEST_TEMP_SHIFT 15 -#define NV40_VP_INST_VEC_DEST_TEMP_MASK (0x1F << 15) -#define NV40_VP_INST_COND_TEST_ENABLE (1 << 13) -#define NV40_VP_INST_COND_SHIFT 10 -#define NV40_VP_INST_COND_MASK (0x7 << 10) -# define NV40_VP_INST_COND_FL 0 -# define NV40_VP_INST_COND_LT 1 -# define NV40_VP_INST_COND_EQ 2 -# define NV40_VP_INST_COND_LE 3 -# define NV40_VP_INST_COND_GT 4 -# define NV40_VP_INST_COND_NE 5 -# define NV40_VP_INST_COND_GE 6 -# define NV40_VP_INST_COND_TR 7 -#define NV40_VP_INST_COND_SWZ_X_SHIFT 8 -#define NV40_VP_INST_COND_SWZ_X_MASK (3 << 8) -#define NV40_VP_INST_COND_SWZ_Y_SHIFT 6 -#define NV40_VP_INST_COND_SWZ_Y_MASK (3 << 6) -#define NV40_VP_INST_COND_SWZ_Z_SHIFT 4 -#define NV40_VP_INST_COND_SWZ_Z_MASK (3 << 4) -#define NV40_VP_INST_COND_SWZ_W_SHIFT 2 -#define NV40_VP_INST_COND_SWZ_W_MASK (3 << 2) -#define NV40_VP_INST_COND_SWZ_ALL_SHIFT 2 -#define NV40_VP_INST_COND_SWZ_ALL_MASK (0xFF << 2) -#define NV40_VP_INST_ADDR_SWZ_SHIFT 0 -#define NV40_VP_INST_ADDR_SWZ_MASK (0x03 << 0) -#define NV40_VP_INST0_KNOWN ( \ - NV40_VP_INST_INDEX_INPUT | \ - NV40_VP_INST_COND_REG_SELECT_1 | \ - NV40_VP_INST_ADDR_REG_SELECT_1 | \ - NV40_VP_INST_SRC2_ABS | \ - NV40_VP_INST_SRC1_ABS | \ - NV40_VP_INST_SRC0_ABS | \ - NV40_VP_INST_VEC_DEST_TEMP_MASK | \ - NV40_VP_INST_COND_TEST_ENABLE | \ - NV40_VP_INST_COND_MASK | \ - NV40_VP_INST_COND_SWZ_ALL_MASK | \ - NV40_VP_INST_ADDR_SWZ_MASK) - -/* ---- OPCODE BITS 95:64 / data DWORD 1 --- */ -#define NV40_VP_INST_VEC_OPCODE_SHIFT 22 -#define NV40_VP_INST_VEC_OPCODE_MASK (0x1F << 22) -# define NV40_VP_INST_OP_NOP 0x00 -# define NV40_VP_INST_OP_MOV 0x01 -# define NV40_VP_INST_OP_MUL 0x02 -# define NV40_VP_INST_OP_ADD 0x03 -# define NV40_VP_INST_OP_MAD 0x04 -# define NV40_VP_INST_OP_DP3 0x05 -# define NV40_VP_INST_OP_DPH 0x06 -# define NV40_VP_INST_OP_DP4 0x07 -# define NV40_VP_INST_OP_DST 0x08 -# define NV40_VP_INST_OP_MIN 0x09 -# define NV40_VP_INST_OP_MAX 0x0A -# define NV40_VP_INST_OP_SLT 0x0B -# define NV40_VP_INST_OP_SGE 0x0C -# define NV40_VP_INST_OP_ARL 0x0D -# define NV40_VP_INST_OP_FRC 0x0E -# define NV40_VP_INST_OP_FLR 0x0F -# define NV40_VP_INST_OP_SEQ 0x10 -# define NV40_VP_INST_OP_SFL 0x11 -# define NV40_VP_INST_OP_SGT 0x12 -# define NV40_VP_INST_OP_SLE 0x13 -# define NV40_VP_INST_OP_SNE 0x14 -# define NV40_VP_INST_OP_STR 0x15 -# define NV40_VP_INST_OP_SSG 0x16 -# define NV40_VP_INST_OP_ARR 0x17 -# define NV40_VP_INST_OP_ARA 0x18 -# define NV40_VP_INST_OP_TXL 0x19 -#define NV40_VP_INST_SCA_OPCODE_SHIFT 27 -#define NV40_VP_INST_SCA_OPCODE_MASK (0x1F << 27) -# define NV40_VP_INST_OP_NOP 0x00 -# define NV40_VP_INST_OP_MOV 0x01 -# define NV40_VP_INST_OP_RCP 0x02 -# define NV40_VP_INST_OP_RCC 0x03 -# define NV40_VP_INST_OP_RSQ 0x04 -# define NV40_VP_INST_OP_EXP 0x05 -# define NV40_VP_INST_OP_LOG 0x06 -# define NV40_VP_INST_OP_LIT 0x07 -# define NV40_VP_INST_OP_BRA 0x09 -# define NV40_VP_INST_OP_CAL 0x0B -# define NV40_VP_INST_OP_RET 0x0C -# define NV40_VP_INST_OP_LG2 0x0D -# define NV40_VP_INST_OP_EX2 0x0E -# define NV40_VP_INST_OP_SIN 0x0F -# define NV40_VP_INST_OP_COS 0x10 -# define NV40_VP_INST_OP_PUSHA 0x13 -# define NV40_VP_INST_OP_POPA 0x14 -#define NV40_VP_INST_CONST_SRC_SHIFT 12 -#define NV40_VP_INST_CONST_SRC_MASK (0xFF << 12) -#define NV40_VP_INST_INPUT_SRC_SHIFT 8 -#define NV40_VP_INST_INPUT_SRC_MASK (0x0F << 8) -# define NV40_VP_INST_IN_POS 0 -# define NV40_VP_INST_IN_WEIGHT 1 -# define NV40_VP_INST_IN_NORMAL 2 -# define NV40_VP_INST_IN_COL0 3 -# define NV40_VP_INST_IN_COL1 4 -# define NV40_VP_INST_IN_FOGC 5 -# define NV40_VP_INST_IN_TC0 8 -# define NV40_VP_INST_IN_TC(n) (8+n) -#define NV40_VP_INST_SRC0H_SHIFT 0 -#define NV40_VP_INST_SRC0H_MASK (0xFF << 0) -#define NV40_VP_INST1_KNOWN ( \ - NV40_VP_INST_VEC_OPCODE_MASK | \ - NV40_VP_INST_SCA_OPCODE_MASK | \ - NV40_VP_INST_CONST_SRC_MASK | \ - NV40_VP_INST_INPUT_SRC_MASK | \ - NV40_VP_INST_SRC0H_MASK \ - ) - -/* ---- OPCODE BITS 63:32 / data DWORD 2 --- */ -#define NV40_VP_INST_SRC0L_SHIFT 23 -#define NV40_VP_INST_SRC0L_MASK (0x1FF << 23) -#define NV40_VP_INST_SRC1_SHIFT 6 -#define NV40_VP_INST_SRC1_MASK (0x1FFFF << 6) -#define NV40_VP_INST_SRC2H_SHIFT 0 -#define NV40_VP_INST_SRC2H_MASK (0x3F << 0) -#define NV40_VP_INST_IADDRH_SHIFT 0 -#define NV40_VP_INST_IADDRH_MASK (0x1F << 0) - -/* ---- OPCODE BITS 31:0 / data DWORD 3 --- */ -#define NV40_VP_INST_IADDRL_SHIFT 29 -#define NV40_VP_INST_IADDRL_MASK (7 << 29) -#define NV40_VP_INST_SRC2L_SHIFT 21 -#define NV40_VP_INST_SRC2L_MASK (0x7FF << 21) -#define NV40_VP_INST_SCA_WRITEMASK_SHIFT 17 -#define NV40_VP_INST_SCA_WRITEMASK_MASK (0xF << 17) -# define NV40_VP_INST_SCA_WRITEMASK_X (1 << 20) -# define NV40_VP_INST_SCA_WRITEMASK_Y (1 << 19) -# define NV40_VP_INST_SCA_WRITEMASK_Z (1 << 18) -# define NV40_VP_INST_SCA_WRITEMASK_W (1 << 17) -#define NV40_VP_INST_VEC_WRITEMASK_SHIFT 13 -#define NV40_VP_INST_VEC_WRITEMASK_MASK (0xF << 13) -# define NV40_VP_INST_VEC_WRITEMASK_X (1 << 16) -# define NV40_VP_INST_VEC_WRITEMASK_Y (1 << 15) -# define NV40_VP_INST_VEC_WRITEMASK_Z (1 << 14) -# define NV40_VP_INST_VEC_WRITEMASK_W (1 << 13) -#define NV40_VP_INST_SCA_RESULT (1 << 12) -#define NV40_VP_INST_SCA_DEST_TEMP_SHIFT 7 -#define NV40_VP_INST_SCA_DEST_TEMP_MASK (0x1F << 7) -#define NV40_VP_INST_DEST_SHIFT 2 -#define NV40_VP_INST_DEST_MASK (31 << 2) -# define NV40_VP_INST_DEST_POS 0 -# define NV40_VP_INST_DEST_COL0 1 -# define NV40_VP_INST_DEST_COL1 2 -# define NV40_VP_INST_DEST_BFC0 3 -# define NV40_VP_INST_DEST_BFC1 4 -# define NV40_VP_INST_DEST_FOGC 5 -# define NV40_VP_INST_DEST_PSZ 6 -# define NV40_VP_INST_DEST_TC0 7 -# define NV40_VP_INST_DEST_TC(n) (7+n) -# define NV40_VP_INST_DEST_TEMP 0x1F -#define NV40_VP_INST_INDEX_CONST (1 << 1) -#define NV40_VP_INST_LAST (1 << 0) -#define NV40_VP_INST3_KNOWN ( \ - NV40_VP_INST_SRC2L_MASK |\ - NV40_VP_INST_SCA_WRITEMASK_MASK |\ - NV40_VP_INST_VEC_WRITEMASK_MASK |\ - NV40_VP_INST_SCA_DEST_TEMP_MASK |\ - NV40_VP_INST_DEST_MASK |\ - NV40_VP_INST_INDEX_CONST) - -/* Useful to split the source selection regs into their pieces */ -#define NV40_VP_SRC0_HIGH_SHIFT 9 -#define NV40_VP_SRC0_HIGH_MASK 0x0001FE00 -#define NV40_VP_SRC0_LOW_MASK 0x000001FF -#define NV40_VP_SRC2_HIGH_SHIFT 11 -#define NV40_VP_SRC2_HIGH_MASK 0x0001F800 -#define NV40_VP_SRC2_LOW_MASK 0x000007FF - -/* Source selection - these are the bits you fill NV40_VP_INST_SRCn with */ -#define NV40_VP_SRC_NEGATE (1 << 16) -#define NV40_VP_SRC_SWZ_X_SHIFT 14 -#define NV40_VP_SRC_SWZ_X_MASK (3 << 14) -#define NV40_VP_SRC_SWZ_Y_SHIFT 12 -#define NV40_VP_SRC_SWZ_Y_MASK (3 << 12) -#define NV40_VP_SRC_SWZ_Z_SHIFT 10 -#define NV40_VP_SRC_SWZ_Z_MASK (3 << 10) -#define NV40_VP_SRC_SWZ_W_SHIFT 8 -#define NV40_VP_SRC_SWZ_W_MASK (3 << 8) -#define NV40_VP_SRC_SWZ_ALL_SHIFT 8 -#define NV40_VP_SRC_SWZ_ALL_MASK (0xFF << 8) -#define NV40_VP_SRC_TEMP_SRC_SHIFT 2 -#define NV40_VP_SRC_TEMP_SRC_MASK (0x1F << 2) -#define NV40_VP_SRC_REG_TYPE_SHIFT 0 -#define NV40_VP_SRC_REG_TYPE_MASK (3 << 0) -# define NV40_VP_SRC_REG_TYPE_UNK0 0 -# define NV40_VP_SRC_REG_TYPE_TEMP 1 -# define NV40_VP_SRC_REG_TYPE_INPUT 2 -# define NV40_VP_SRC_REG_TYPE_CONST 3 - - -/* - * Each fragment program opcode appears to be comprised of 4 32-bit values. - * - * 0 - Opcode, output reg/mask, ATTRIB source - * 1 - Source 0 - * 2 - Source 1 - * 3 - Source 2 - * - * There appears to be no special difference between result regs and temp regs. - * result.color == R0.xyzw - * result.depth == R1.z - * When the fragprog contains instructions to write depth, - * NV30_TCL_PRIMITIVE_3D_UNK1D78=0 otherwise it is set to 1. - * - * Constants are inserted directly after the instruction that uses them. - * - * It appears that it's not possible to use two input registers in one - * instruction as the input sourcing is done in the instruction dword - * and not the source selection dwords. As such instructions such as: - * - * ADD result.color, fragment.color, fragment.texcoord[0]; - * - * must be split into two MOV's and then an ADD (nvidia does this) but - * I'm not sure why it's not just one MOV and then source the second input - * in the ADD instruction.. - * - * Negation of the full source is done with NV30_FP_REG_NEGATE, arbitrary - * negation requires multiplication with a const. - * - * Arbitrary swizzling is supported with the exception of SWIZZLE_ZERO and - * SWIZZLE_ONE. - * - * The temp/result regs appear to be initialised to (0.0, 0.0, 0.0, 0.0) as - * SWIZZLE_ZERO is implemented simply by not writing to the relevant components - * of the destination. - * - * Looping - * Loops appear to be fairly expensive on NV40 at least, the proprietary - * driver goes to a lot of effort to avoid using the native looping - * instructions. If the total number of *executed* instructions between - * REP/ENDREP or LOOP/ENDLOOP is <=500, the driver will unroll the loop. - * The maximum loop count is 255. - * - * Conditional execution - * TODO - * - * Non-native instructions: - * LIT - * LRP - MAD+MAD - * SUB - ADD, negate second source - * RSQ - LG2 + EX2 - * POW - LG2 + MUL + EX2 - * SCS - COS + SIN - * XPD - * DP2 - MUL + ADD - * NRM - */ - -//== Opcode / Destination selection == -#define NV40_FP_OP_PROGRAM_END (1 << 0) -#define NV40_FP_OP_OUT_REG_SHIFT 1 -#define NV40_FP_OP_OUT_REG_MASK (63 << 1) -/* Needs to be set when writing outputs to get expected result.. */ -#define NV40_FP_OP_OUT_REG_HALF (1 << 7) -#define NV40_FP_OP_COND_WRITE_ENABLE (1 << 8) -#define NV40_FP_OP_OUTMASK_SHIFT 9 -#define NV40_FP_OP_OUTMASK_MASK (0xF << 9) -# define NV40_FP_OP_OUT_X (1 << 9) -# define NV40_FP_OP_OUT_Y (1 <<10) -# define NV40_FP_OP_OUT_Z (1 <<11) -# define NV40_FP_OP_OUT_W (1 <<12) -/* Uncertain about these, especially the input_src values.. it's possible that - * they can be dynamically changed. - */ -#define NV40_FP_OP_INPUT_SRC_SHIFT 13 -#define NV40_FP_OP_INPUT_SRC_MASK (15 << 13) -# define NV40_FP_OP_INPUT_SRC_POSITION 0x0 -# define NV40_FP_OP_INPUT_SRC_COL0 0x1 -# define NV40_FP_OP_INPUT_SRC_COL1 0x2 -# define NV40_FP_OP_INPUT_SRC_FOGC 0x3 -# define NV40_FP_OP_INPUT_SRC_TC0 0x4 -# define NV40_FP_OP_INPUT_SRC_TC(n) (0x4 + n) -# define NV40_FP_OP_INPUT_SRC_FACING 0xE -#define NV40_FP_OP_TEX_UNIT_SHIFT 17 -#define NV40_FP_OP_TEX_UNIT_MASK (0xF << 17) -#define NV40_FP_OP_PRECISION_SHIFT 22 -#define NV40_FP_OP_PRECISION_MASK (3 << 22) -# define NV40_FP_PRECISION_FP32 0 -# define NV40_FP_PRECISION_FP16 1 -# define NV40_FP_PRECISION_FX12 2 -#define NV40_FP_OP_OPCODE_SHIFT 24 -#define NV40_FP_OP_OPCODE_MASK (0x3F << 24) -# define NV40_FP_OP_OPCODE_NOP 0x00 -# define NV40_FP_OP_OPCODE_MOV 0x01 -# define NV40_FP_OP_OPCODE_MUL 0x02 -# define NV40_FP_OP_OPCODE_ADD 0x03 -# define NV40_FP_OP_OPCODE_MAD 0x04 -# define NV40_FP_OP_OPCODE_DP3 0x05 -# define NV40_FP_OP_OPCODE_DP4 0x06 -# define NV40_FP_OP_OPCODE_DST 0x07 -# define NV40_FP_OP_OPCODE_MIN 0x08 -# define NV40_FP_OP_OPCODE_MAX 0x09 -# define NV40_FP_OP_OPCODE_SLT 0x0A -# define NV40_FP_OP_OPCODE_SGE 0x0B -# define NV40_FP_OP_OPCODE_SLE 0x0C -# define NV40_FP_OP_OPCODE_SGT 0x0D -# define NV40_FP_OP_OPCODE_SNE 0x0E -# define NV40_FP_OP_OPCODE_SEQ 0x0F -# define NV40_FP_OP_OPCODE_FRC 0x10 -# define NV40_FP_OP_OPCODE_FLR 0x11 -# define NV40_FP_OP_OPCODE_KIL 0x12 -# define NV40_FP_OP_OPCODE_PK4B 0x13 -# define NV40_FP_OP_OPCODE_UP4B 0x14 -/* DDX/DDY can only write to XY */ -# define NV40_FP_OP_OPCODE_DDX 0x15 -# define NV40_FP_OP_OPCODE_DDY 0x16 -# define NV40_FP_OP_OPCODE_TEX 0x17 -# define NV40_FP_OP_OPCODE_TXP 0x18 -# define NV40_FP_OP_OPCODE_TXD 0x19 -# define NV40_FP_OP_OPCODE_RCP 0x1A -# define NV40_FP_OP_OPCODE_EX2 0x1C -# define NV40_FP_OP_OPCODE_LG2 0x1D -# define NV40_FP_OP_OPCODE_STR 0x20 -# define NV40_FP_OP_OPCODE_SFL 0x21 -# define NV40_FP_OP_OPCODE_COS 0x22 -# define NV40_FP_OP_OPCODE_SIN 0x23 -# define NV40_FP_OP_OPCODE_PK2H 0x24 -# define NV40_FP_OP_OPCODE_UP2H 0x25 -# define NV40_FP_OP_OPCODE_PK4UB 0x27 -# define NV40_FP_OP_OPCODE_UP4UB 0x28 -# define NV40_FP_OP_OPCODE_PK2US 0x29 -# define NV40_FP_OP_OPCODE_UP2US 0x2A -# define NV40_FP_OP_OPCODE_DP2A 0x2E -# define NV40_FP_OP_OPCODE_TXL 0x2F -# define NV40_FP_OP_OPCODE_TXB 0x31 -# define NV40_FP_OP_OPCODE_DIV 0x3A -# define NV40_FP_OP_OPCODE_UNK_LIT 0x3C -/* The use of these instructions appears to be indicated by bit 31 of DWORD 2.*/ -# define NV40_FP_OP_BRA_OPCODE_BRK 0x0 -# define NV40_FP_OP_BRA_OPCODE_CAL 0x1 -# define NV40_FP_OP_BRA_OPCODE_IF 0x2 -# define NV40_FP_OP_BRA_OPCODE_LOOP 0x3 -# define NV40_FP_OP_BRA_OPCODE_REP 0x4 -# define NV40_FP_OP_BRA_OPCODE_RET 0x5 -#define NV40_FP_OP_OUT_SAT (1 << 31) - -/* high order bits of SRC0 */ -#define NV40_FP_OP_OUT_ABS (1 << 29) -#define NV40_FP_OP_COND_SWZ_W_SHIFT 27 -#define NV40_FP_OP_COND_SWZ_W_MASK (3 << 27) -#define NV40_FP_OP_COND_SWZ_Z_SHIFT 25 -#define NV40_FP_OP_COND_SWZ_Z_MASK (3 << 25) -#define NV40_FP_OP_COND_SWZ_Y_SHIFT 23 -#define NV40_FP_OP_COND_SWZ_Y_MASK (3 << 23) -#define NV40_FP_OP_COND_SWZ_X_SHIFT 21 -#define NV40_FP_OP_COND_SWZ_X_MASK (3 << 21) -#define NV40_FP_OP_COND_SWZ_ALL_SHIFT 21 -#define NV40_FP_OP_COND_SWZ_ALL_MASK (0xFF << 21) -#define NV40_FP_OP_COND_SHIFT 18 -#define NV40_FP_OP_COND_MASK (0x07 << 18) -# define NV40_FP_OP_COND_FL 0 -# define NV40_FP_OP_COND_LT 1 -# define NV40_FP_OP_COND_EQ 2 -# define NV40_FP_OP_COND_LE 3 -# define NV40_FP_OP_COND_GT 4 -# define NV40_FP_OP_COND_NE 5 -# define NV40_FP_OP_COND_GE 6 -# define NV40_FP_OP_COND_TR 7 - -/* high order bits of SRC1 */ -#define NV40_FP_OP_OPCODE_IS_BRANCH (1<<31) -#define NV40_FP_OP_DST_SCALE_SHIFT 28 -#define NV40_FP_OP_DST_SCALE_MASK (3 << 28) -#define NV40_FP_OP_DST_SCALE_1X 0 -#define NV40_FP_OP_DST_SCALE_2X 1 -#define NV40_FP_OP_DST_SCALE_4X 2 -#define NV40_FP_OP_DST_SCALE_8X 3 -#define NV40_FP_OP_DST_SCALE_INV_2X 5 -#define NV40_FP_OP_DST_SCALE_INV_4X 6 -#define NV40_FP_OP_DST_SCALE_INV_8X 7 - -/* SRC1 LOOP */ -#define NV40_FP_OP_LOOP_INCR_SHIFT 19 -#define NV40_FP_OP_LOOP_INCR_MASK (0xFF << 19) -#define NV40_FP_OP_LOOP_INDEX_SHIFT 10 -#define NV40_FP_OP_LOOP_INDEX_MASK (0xFF << 10) -#define NV40_FP_OP_LOOP_COUNT_SHIFT 2 -#define NV40_FP_OP_LOOP_COUNT_MASK (0xFF << 2) - -/* SRC1 IF */ -#define NV40_FP_OP_ELSE_ID_SHIFT 2 -#define NV40_FP_OP_ELSE_ID_MASK (0xFF << 2) - -/* SRC1 CAL */ -#define NV40_FP_OP_IADDR_SHIFT 2 -#define NV40_FP_OP_IADDR_MASK (0xFF << 2) - -/* SRC1 REP - * I have no idea why there are 3 count values here.. but they - * have always been filled with the same value in my tests so - * far.. - */ -#define NV40_FP_OP_REP_COUNT1_SHIFT 2 -#define NV40_FP_OP_REP_COUNT1_MASK (0xFF << 2) -#define NV40_FP_OP_REP_COUNT2_SHIFT 10 -#define NV40_FP_OP_REP_COUNT2_MASK (0xFF << 10) -#define NV40_FP_OP_REP_COUNT3_SHIFT 19 -#define NV40_FP_OP_REP_COUNT3_MASK (0xFF << 19) - -/* SRC2 REP/IF */ -#define NV40_FP_OP_END_ID_SHIFT 2 -#define NV40_FP_OP_END_ID_MASK (0xFF << 2) - -// SRC2 high-order -#define NV40_FP_OP_INDEX_INPUT (1 << 30) -#define NV40_FP_OP_ADDR_INDEX_SHIFT 19 -#define NV40_FP_OP_ADDR_INDEX_MASK (0xF << 19) - -//== Register selection == -#define NV40_FP_REG_TYPE_SHIFT 0 -#define NV40_FP_REG_TYPE_MASK (3 << 0) -# define NV40_FP_REG_TYPE_TEMP 0 -# define NV40_FP_REG_TYPE_INPUT 1 -# define NV40_FP_REG_TYPE_CONST 2 -#define NV40_FP_REG_SRC_SHIFT 2 -#define NV40_FP_REG_SRC_MASK (63 << 2) -#define NV40_FP_REG_SRC_HALF (1 << 8) -#define NV40_FP_REG_SWZ_ALL_SHIFT 9 -#define NV40_FP_REG_SWZ_ALL_MASK (255 << 9) -#define NV40_FP_REG_SWZ_X_SHIFT 9 -#define NV40_FP_REG_SWZ_X_MASK (3 << 9) -#define NV40_FP_REG_SWZ_Y_SHIFT 11 -#define NV40_FP_REG_SWZ_Y_MASK (3 << 11) -#define NV40_FP_REG_SWZ_Z_SHIFT 13 -#define NV40_FP_REG_SWZ_Z_MASK (3 << 13) -#define NV40_FP_REG_SWZ_W_SHIFT 15 -#define NV40_FP_REG_SWZ_W_MASK (3 << 15) -# define NV40_FP_SWIZZLE_X 0 -# define NV40_FP_SWIZZLE_Y 1 -# define NV40_FP_SWIZZLE_Z 2 -# define NV40_FP_SWIZZLE_W 3 -#define NV40_FP_REG_NEGATE (1 << 17) - -#ifndef NV40_SHADER_NO_FUCKEDNESS -#define NV40SR_NONE 0 -#define NV40SR_OUTPUT 1 -#define NV40SR_INPUT 2 -#define NV40SR_TEMP 3 -#define NV40SR_CONST 4 - -struct nv40_sreg { - int type; - int index; - - int dst_scale; - - int negate; - int abs; - int swz[4]; - - int cc_update; - int cc_update_reg; - int cc_test; - int cc_test_reg; - int cc_swz[4]; -}; - -static INLINE struct nv40_sreg -nv40_sr(int type, int index) -{ - struct nv40_sreg temp = { - .type = type, - .index = index, - .dst_scale = DEF_SCALE, - .abs = 0, - .negate = 0, - .swz = { 0, 1, 2, 3 }, - .cc_update = 0, - .cc_update_reg = 0, - .cc_test = DEF_CTEST, - .cc_test_reg = 0, - .cc_swz = { 0, 1, 2, 3 }, - }; - return temp; -} - -static INLINE struct nv40_sreg -nv40_sr_swz(struct nv40_sreg src, int x, int y, int z, int w) -{ - struct nv40_sreg dst = src; - - dst.swz[SWZ_X] = src.swz[x]; - dst.swz[SWZ_Y] = src.swz[y]; - dst.swz[SWZ_Z] = src.swz[z]; - dst.swz[SWZ_W] = src.swz[w]; - return dst; -} - -static INLINE struct nv40_sreg -nv40_sr_neg(struct nv40_sreg src) -{ - src.negate = !src.negate; - return src; -} - -static INLINE struct nv40_sreg -nv40_sr_abs(struct nv40_sreg src) -{ - src.abs = 1; - return src; -} - -static INLINE struct nv40_sreg -nv40_sr_scale(struct nv40_sreg src, int scale) -{ - src.dst_scale = scale; - return src; -} -#endif - -#endif diff --git a/src/gallium/drivers/nv40/nv40_state.c b/src/gallium/drivers/nv40/nv40_state.c deleted file mode 100644 index 4f28675e64c..00000000000 --- a/src/gallium/drivers/nv40/nv40_state.c +++ /dev/null @@ -1,743 +0,0 @@ -#include "pipe/p_state.h" -#include "pipe/p_defines.h" -#include "util/u_inlines.h" - -#include "draw/draw_context.h" - -#include "tgsi/tgsi_parse.h" - -#include "nv40_context.h" -#include "nv40_state.h" - -static void * -nv40_blend_state_create(struct pipe_context *pipe, - const struct pipe_blend_state *cso) -{ - struct nv40_context *nv40 = nv40_context(pipe); - struct nouveau_grobj *curie = nv40->screen->curie; - struct nv40_blend_state *bso = CALLOC(1, sizeof(*bso)); - struct nouveau_stateobj *so = so_new(5, 8, 0); - - if (cso->rt[0].blend_enable) { - so_method(so, curie, NV40TCL_BLEND_ENABLE, 3); - so_data (so, 1); - so_data (so, (nvgl_blend_func(cso->rt[0].alpha_src_factor) << 16) | - nvgl_blend_func(cso->rt[0].rgb_src_factor)); - so_data (so, nvgl_blend_func(cso->rt[0].alpha_dst_factor) << 16 | - nvgl_blend_func(cso->rt[0].rgb_dst_factor)); - so_method(so, curie, NV40TCL_BLEND_EQUATION, 1); - so_data (so, nvgl_blend_eqn(cso->rt[0].alpha_func) << 16 | - nvgl_blend_eqn(cso->rt[0].rgb_func)); - } else { - so_method(so, curie, NV40TCL_BLEND_ENABLE, 1); - so_data (so, 0); - } - - so_method(so, curie, NV40TCL_COLOR_MASK, 1); - so_data (so, (((cso->rt[0].colormask & PIPE_MASK_A) ? (0x01 << 24) : 0) | - ((cso->rt[0].colormask & PIPE_MASK_R) ? (0x01 << 16) : 0) | - ((cso->rt[0].colormask & PIPE_MASK_G) ? (0x01 << 8) : 0) | - ((cso->rt[0].colormask & PIPE_MASK_B) ? (0x01 << 0) : 0))); - - if (cso->logicop_enable) { - so_method(so, curie, NV40TCL_COLOR_LOGIC_OP_ENABLE, 2); - so_data (so, 1); - so_data (so, nvgl_logicop_func(cso->logicop_func)); - } else { - so_method(so, curie, NV40TCL_COLOR_LOGIC_OP_ENABLE, 1); - so_data (so, 0); - } - - so_method(so, curie, NV40TCL_DITHER_ENABLE, 1); - so_data (so, cso->dither ? 1 : 0); - - so_ref(so, &bso->so); - so_ref(NULL, &so); - bso->pipe = *cso; - return (void *)bso; -} - -static void -nv40_blend_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nv40_context *nv40 = nv40_context(pipe); - - nv40->blend = hwcso; - nv40->dirty |= NV40_NEW_BLEND; -} - -static void -nv40_blend_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nv40_blend_state *bso = hwcso; - - so_ref(NULL, &bso->so); - FREE(bso); -} - - -static INLINE unsigned -wrap_mode(unsigned wrap) { - unsigned ret; - - switch (wrap) { - case PIPE_TEX_WRAP_REPEAT: - ret = NV40TCL_TEX_WRAP_S_REPEAT; - break; - case PIPE_TEX_WRAP_MIRROR_REPEAT: - ret = NV40TCL_TEX_WRAP_S_MIRRORED_REPEAT; - break; - case PIPE_TEX_WRAP_CLAMP_TO_EDGE: - ret = NV40TCL_TEX_WRAP_S_CLAMP_TO_EDGE; - break; - case PIPE_TEX_WRAP_CLAMP_TO_BORDER: - ret = NV40TCL_TEX_WRAP_S_CLAMP_TO_BORDER; - break; - case PIPE_TEX_WRAP_CLAMP: - ret = NV40TCL_TEX_WRAP_S_CLAMP; - break; - case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: - ret = NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_EDGE; - break; - case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: - ret = NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_BORDER; - break; - case PIPE_TEX_WRAP_MIRROR_CLAMP: - ret = NV40TCL_TEX_WRAP_S_MIRROR_CLAMP; - break; - default: - NOUVEAU_ERR("unknown wrap mode: %d\n", wrap); - ret = NV40TCL_TEX_WRAP_S_REPEAT; - break; - } - - return ret >> NV40TCL_TEX_WRAP_S_SHIFT; -} - -static void * -nv40_sampler_state_create(struct pipe_context *pipe, - const struct pipe_sampler_state *cso) -{ - struct nv40_sampler_state *ps; - uint32_t filter = 0; - - ps = MALLOC(sizeof(struct nv40_sampler_state)); - - ps->fmt = 0; - if (!cso->normalized_coords) - ps->fmt |= NV40TCL_TEX_FORMAT_RECT; - - ps->wrap = ((wrap_mode(cso->wrap_s) << NV40TCL_TEX_WRAP_S_SHIFT) | - (wrap_mode(cso->wrap_t) << NV40TCL_TEX_WRAP_T_SHIFT) | - (wrap_mode(cso->wrap_r) << NV40TCL_TEX_WRAP_R_SHIFT)); - - ps->en = 0; - if (cso->max_anisotropy >= 2) { - /* no idea, binary driver sets it, works without it.. meh.. */ - ps->wrap |= (1 << 5); - - if (cso->max_anisotropy >= 16) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_16X; - } else - if (cso->max_anisotropy >= 12) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_12X; - } else - if (cso->max_anisotropy >= 10) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_10X; - } else - if (cso->max_anisotropy >= 8) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_8X; - } else - if (cso->max_anisotropy >= 6) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_6X; - } else - if (cso->max_anisotropy >= 4) { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_4X; - } else { - ps->en |= NV40TCL_TEX_ENABLE_ANISO_2X; - } - } - - switch (cso->mag_img_filter) { - case PIPE_TEX_FILTER_LINEAR: - filter |= NV40TCL_TEX_FILTER_MAG_LINEAR; - break; - case PIPE_TEX_FILTER_NEAREST: - default: - filter |= NV40TCL_TEX_FILTER_MAG_NEAREST; - break; - } - - switch (cso->min_img_filter) { - case PIPE_TEX_FILTER_LINEAR: - switch (cso->min_mip_filter) { - case PIPE_TEX_MIPFILTER_NEAREST: - filter |= NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_NEAREST; - break; - case PIPE_TEX_MIPFILTER_LINEAR: - filter |= NV40TCL_TEX_FILTER_MIN_LINEAR_MIPMAP_LINEAR; - break; - case PIPE_TEX_MIPFILTER_NONE: - default: - filter |= NV40TCL_TEX_FILTER_MIN_LINEAR; - break; - } - break; - case PIPE_TEX_FILTER_NEAREST: - default: - switch (cso->min_mip_filter) { - case PIPE_TEX_MIPFILTER_NEAREST: - filter |= NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_NEAREST; - break; - case PIPE_TEX_MIPFILTER_LINEAR: - filter |= NV40TCL_TEX_FILTER_MIN_NEAREST_MIPMAP_LINEAR; - break; - case PIPE_TEX_MIPFILTER_NONE: - default: - filter |= NV40TCL_TEX_FILTER_MIN_NEAREST; - break; - } - break; - } - - ps->filt = filter; - - { - float limit; - - limit = CLAMP(cso->lod_bias, -16.0, 15.0); - ps->filt |= (int)(cso->lod_bias * 256.0) & 0x1fff; - - limit = CLAMP(cso->max_lod, 0.0, 15.0); - ps->en |= (int)(limit * 256.0) << 7; - - limit = CLAMP(cso->min_lod, 0.0, 15.0); - ps->en |= (int)(limit * 256.0) << 19; - } - - - if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) { - switch (cso->compare_func) { - case PIPE_FUNC_NEVER: - ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_NEVER; - break; - case PIPE_FUNC_GREATER: - ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_GREATER; - break; - case PIPE_FUNC_EQUAL: - ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_EQUAL; - break; - case PIPE_FUNC_GEQUAL: - ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_GEQUAL; - break; - case PIPE_FUNC_LESS: - ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_LESS; - break; - case PIPE_FUNC_NOTEQUAL: - ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_NOTEQUAL; - break; - case PIPE_FUNC_LEQUAL: - ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_LEQUAL; - break; - case PIPE_FUNC_ALWAYS: - ps->wrap |= NV40TCL_TEX_WRAP_RCOMP_ALWAYS; - break; - default: - break; - } - } - - ps->bcol = ((float_to_ubyte(cso->border_color[3]) << 24) | - (float_to_ubyte(cso->border_color[0]) << 16) | - (float_to_ubyte(cso->border_color[1]) << 8) | - (float_to_ubyte(cso->border_color[2]) << 0)); - - return (void *)ps; -} - -static void -nv40_sampler_state_bind(struct pipe_context *pipe, unsigned nr, void **sampler) -{ - struct nv40_context *nv40 = nv40_context(pipe); - unsigned unit; - - for (unit = 0; unit < nr; unit++) { - nv40->tex_sampler[unit] = sampler[unit]; - nv40->dirty_samplers |= (1 << unit); - } - - for (unit = nr; unit < nv40->nr_samplers; unit++) { - nv40->tex_sampler[unit] = NULL; - nv40->dirty_samplers |= (1 << unit); - } - - nv40->nr_samplers = nr; - nv40->dirty |= NV40_NEW_SAMPLER; -} - -static void -nv40_sampler_state_delete(struct pipe_context *pipe, void *hwcso) -{ - FREE(hwcso); -} - -static void -nv40_set_sampler_texture(struct pipe_context *pipe, unsigned nr, - struct pipe_texture **miptree) -{ - struct nv40_context *nv40 = nv40_context(pipe); - unsigned unit; - - for (unit = 0; unit < nr; unit++) { - pipe_texture_reference((struct pipe_texture **) - &nv40->tex_miptree[unit], miptree[unit]); - nv40->dirty_samplers |= (1 << unit); - } - - for (unit = nr; unit < nv40->nr_textures; unit++) { - pipe_texture_reference((struct pipe_texture **) - &nv40->tex_miptree[unit], NULL); - nv40->dirty_samplers |= (1 << unit); - } - - nv40->nr_textures = nr; - nv40->dirty |= NV40_NEW_SAMPLER; -} - -static void * -nv40_rasterizer_state_create(struct pipe_context *pipe, - const struct pipe_rasterizer_state *cso) -{ - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_rasterizer_state *rsso = CALLOC(1, sizeof(*rsso)); - struct nouveau_stateobj *so = so_new(9, 19, 0); - struct nouveau_grobj *curie = nv40->screen->curie; - - /*XXX: ignored: - * light_twoside - * point_smooth -nohw - * multisample - */ - - so_method(so, curie, NV40TCL_SHADE_MODEL, 1); - so_data (so, cso->flatshade ? NV40TCL_SHADE_MODEL_FLAT : - NV40TCL_SHADE_MODEL_SMOOTH); - - so_method(so, curie, NV40TCL_LINE_WIDTH, 2); - so_data (so, (unsigned char)(cso->line_width * 8.0) & 0xff); - so_data (so, cso->line_smooth ? 1 : 0); - so_method(so, curie, NV40TCL_LINE_STIPPLE_ENABLE, 2); - so_data (so, cso->line_stipple_enable ? 1 : 0); - so_data (so, (cso->line_stipple_pattern << 16) | - cso->line_stipple_factor); - - so_method(so, curie, NV40TCL_POINT_SIZE, 1); - so_data (so, fui(cso->point_size)); - - so_method(so, curie, NV40TCL_POLYGON_MODE_FRONT, 6); - if (cso->front_winding == PIPE_WINDING_CCW) { - so_data(so, nvgl_polygon_mode(cso->fill_ccw)); - so_data(so, nvgl_polygon_mode(cso->fill_cw)); - switch (cso->cull_mode) { - case PIPE_WINDING_CCW: - so_data(so, NV40TCL_CULL_FACE_FRONT); - break; - case PIPE_WINDING_CW: - so_data(so, NV40TCL_CULL_FACE_BACK); - break; - case PIPE_WINDING_BOTH: - so_data(so, NV40TCL_CULL_FACE_FRONT_AND_BACK); - break; - default: - so_data(so, NV40TCL_CULL_FACE_BACK); - break; - } - so_data(so, NV40TCL_FRONT_FACE_CCW); - } else { - so_data(so, nvgl_polygon_mode(cso->fill_cw)); - so_data(so, nvgl_polygon_mode(cso->fill_ccw)); - switch (cso->cull_mode) { - case PIPE_WINDING_CCW: - so_data(so, NV40TCL_CULL_FACE_BACK); - break; - case PIPE_WINDING_CW: - so_data(so, NV40TCL_CULL_FACE_FRONT); - break; - case PIPE_WINDING_BOTH: - so_data(so, NV40TCL_CULL_FACE_FRONT_AND_BACK); - break; - default: - so_data(so, NV40TCL_CULL_FACE_BACK); - break; - } - so_data(so, NV40TCL_FRONT_FACE_CW); - } - so_data(so, cso->poly_smooth ? 1 : 0); - so_data(so, (cso->cull_mode != PIPE_WINDING_NONE) ? 1 : 0); - - so_method(so, curie, NV40TCL_POLYGON_STIPPLE_ENABLE, 1); - so_data (so, cso->poly_stipple_enable ? 1 : 0); - - so_method(so, curie, NV40TCL_POLYGON_OFFSET_POINT_ENABLE, 3); - if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_POINT) || - (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_POINT)) - so_data(so, 1); - else - so_data(so, 0); - if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_LINE) || - (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_LINE)) - so_data(so, 1); - else - so_data(so, 0); - if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_FILL) || - (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_FILL)) - so_data(so, 1); - else - so_data(so, 0); - if (cso->offset_cw || cso->offset_ccw) { - so_method(so, curie, NV40TCL_POLYGON_OFFSET_FACTOR, 2); - so_data (so, fui(cso->offset_scale)); - so_data (so, fui(cso->offset_units * 2)); - } - - so_method(so, curie, NV40TCL_POINT_SPRITE, 1); - if (cso->point_quad_rasterization) { - unsigned psctl = (1 << 0), i; - - for (i = 0; i < 8; i++) { - if ((cso->sprite_coord_enable >> i) & 1) - psctl |= (1 << (8 + i)); - } - - so_data(so, psctl); - } else { - so_data(so, 0); - } - - so_ref(so, &rsso->so); - so_ref(NULL, &so); - rsso->pipe = *cso; - return (void *)rsso; -} - -static void -nv40_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nv40_context *nv40 = nv40_context(pipe); - - nv40->rasterizer = hwcso; - nv40->dirty |= NV40_NEW_RAST; - nv40->draw_dirty |= NV40_NEW_RAST; -} - -static void -nv40_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nv40_rasterizer_state *rsso = hwcso; - - so_ref(NULL, &rsso->so); - FREE(rsso); -} - -static void * -nv40_depth_stencil_alpha_state_create(struct pipe_context *pipe, - const struct pipe_depth_stencil_alpha_state *cso) -{ - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso)); - struct nouveau_stateobj *so = so_new(6, 20, 0); - struct nouveau_grobj *curie = nv40->screen->curie; - - so_method(so, curie, NV40TCL_DEPTH_FUNC, 3); - so_data (so, nvgl_comparison_op(cso->depth.func)); - so_data (so, cso->depth.writemask ? 1 : 0); - so_data (so, cso->depth.enabled ? 1 : 0); - - so_method(so, curie, NV40TCL_ALPHA_TEST_ENABLE, 3); - so_data (so, cso->alpha.enabled ? 1 : 0); - so_data (so, nvgl_comparison_op(cso->alpha.func)); - so_data (so, float_to_ubyte(cso->alpha.ref_value)); - - if (cso->stencil[0].enabled) { - so_method(so, curie, NV40TCL_STENCIL_FRONT_ENABLE, 3); - so_data (so, cso->stencil[0].enabled ? 1 : 0); - so_data (so, cso->stencil[0].writemask); - so_data (so, nvgl_comparison_op(cso->stencil[0].func)); - so_method(so, curie, NV40TCL_STENCIL_FRONT_FUNC_MASK, 4); - so_data (so, cso->stencil[0].valuemask); - so_data (so, nvgl_stencil_op(cso->stencil[0].fail_op)); - so_data (so, nvgl_stencil_op(cso->stencil[0].zfail_op)); - so_data (so, nvgl_stencil_op(cso->stencil[0].zpass_op)); - } else { - so_method(so, curie, NV40TCL_STENCIL_FRONT_ENABLE, 1); - so_data (so, 0); - } - - if (cso->stencil[1].enabled) { - so_method(so, curie, NV40TCL_STENCIL_BACK_ENABLE, 3); - so_data (so, cso->stencil[1].enabled ? 1 : 0); - so_data (so, cso->stencil[1].writemask); - so_data (so, nvgl_comparison_op(cso->stencil[1].func)); - so_method(so, curie, NV40TCL_STENCIL_BACK_FUNC_MASK, 4); - so_data (so, cso->stencil[1].valuemask); - so_data (so, nvgl_stencil_op(cso->stencil[1].fail_op)); - so_data (so, nvgl_stencil_op(cso->stencil[1].zfail_op)); - so_data (so, nvgl_stencil_op(cso->stencil[1].zpass_op)); - } else { - so_method(so, curie, NV40TCL_STENCIL_BACK_ENABLE, 1); - so_data (so, 0); - } - - so_ref(so, &zsaso->so); - so_ref(NULL, &so); - zsaso->pipe = *cso; - return (void *)zsaso; -} - -static void -nv40_depth_stencil_alpha_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nv40_context *nv40 = nv40_context(pipe); - - nv40->zsa = hwcso; - nv40->dirty |= NV40_NEW_ZSA; -} - -static void -nv40_depth_stencil_alpha_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nv40_zsa_state *zsaso = hwcso; - - so_ref(NULL, &zsaso->so); - FREE(zsaso); -} - -static void * -nv40_vp_state_create(struct pipe_context *pipe, - const struct pipe_shader_state *cso) -{ - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_vertex_program *vp; - - vp = CALLOC(1, sizeof(struct nv40_vertex_program)); - vp->pipe.tokens = tgsi_dup_tokens(cso->tokens); - vp->draw = draw_create_vertex_shader(nv40->draw, &vp->pipe); - - return (void *)vp; -} - -static void -nv40_vp_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nv40_context *nv40 = nv40_context(pipe); - - nv40->vertprog = hwcso; - nv40->dirty |= NV40_NEW_VERTPROG; - nv40->draw_dirty |= NV40_NEW_VERTPROG; -} - -static void -nv40_vp_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_vertex_program *vp = hwcso; - - draw_delete_vertex_shader(nv40->draw, vp->draw); - nv40_vertprog_destroy(nv40, vp); - FREE((void*)vp->pipe.tokens); - FREE(vp); -} - -static void * -nv40_fp_state_create(struct pipe_context *pipe, - const struct pipe_shader_state *cso) -{ - struct nv40_fragment_program *fp; - - fp = CALLOC(1, sizeof(struct nv40_fragment_program)); - fp->pipe.tokens = tgsi_dup_tokens(cso->tokens); - - tgsi_scan_shader(fp->pipe.tokens, &fp->info); - - return (void *)fp; -} - -static void -nv40_fp_state_bind(struct pipe_context *pipe, void *hwcso) -{ - struct nv40_context *nv40 = nv40_context(pipe); - - nv40->fragprog = hwcso; - nv40->dirty |= NV40_NEW_FRAGPROG; -} - -static void -nv40_fp_state_delete(struct pipe_context *pipe, void *hwcso) -{ - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_fragment_program *fp = hwcso; - - nv40_fragprog_destroy(nv40, fp); - FREE((void*)fp->pipe.tokens); - FREE(fp); -} - -static void -nv40_set_blend_color(struct pipe_context *pipe, - const struct pipe_blend_color *bcol) -{ - struct nv40_context *nv40 = nv40_context(pipe); - - nv40->blend_colour = *bcol; - nv40->dirty |= NV40_NEW_BCOL; -} - - static void -nv40_set_stencil_ref(struct pipe_context *pipe, - const struct pipe_stencil_ref *sr) -{ - struct nv40_context *nv40 = nv40_context(pipe); - - nv40->stencil_ref = *sr; - nv40->dirty |= NV40_NEW_SR; -} - -static void -nv40_set_clip_state(struct pipe_context *pipe, - const struct pipe_clip_state *clip) -{ - struct nv40_context *nv40 = nv40_context(pipe); - - nv40->clip = *clip; - nv40->dirty |= NV40_NEW_UCP; - nv40->draw_dirty |= NV40_NEW_UCP; -} - -static void -nv40_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_buffer *buf ) -{ - struct nv40_context *nv40 = nv40_context(pipe); - - nv40->constbuf[shader] = buf; - nv40->constbuf_nr[shader] = buf->size / (4 * sizeof(float)); - - if (shader == PIPE_SHADER_VERTEX) { - nv40->dirty |= NV40_NEW_VERTPROG; - } else - if (shader == PIPE_SHADER_FRAGMENT) { - nv40->dirty |= NV40_NEW_FRAGPROG; - } -} - -static void -nv40_set_framebuffer_state(struct pipe_context *pipe, - const struct pipe_framebuffer_state *fb) -{ - struct nv40_context *nv40 = nv40_context(pipe); - - nv40->framebuffer = *fb; - nv40->dirty |= NV40_NEW_FB; -} - -static void -nv40_set_polygon_stipple(struct pipe_context *pipe, - const struct pipe_poly_stipple *stipple) -{ - struct nv40_context *nv40 = nv40_context(pipe); - - memcpy(nv40->stipple, stipple->stipple, 4 * 32); - nv40->dirty |= NV40_NEW_STIPPLE; -} - -static void -nv40_set_scissor_state(struct pipe_context *pipe, - const struct pipe_scissor_state *s) -{ - struct nv40_context *nv40 = nv40_context(pipe); - - nv40->scissor = *s; - nv40->dirty |= NV40_NEW_SCISSOR; -} - -static void -nv40_set_viewport_state(struct pipe_context *pipe, - const struct pipe_viewport_state *vpt) -{ - struct nv40_context *nv40 = nv40_context(pipe); - - nv40->viewport = *vpt; - nv40->dirty |= NV40_NEW_VIEWPORT; - nv40->draw_dirty |= NV40_NEW_VIEWPORT; -} - -static void -nv40_set_vertex_buffers(struct pipe_context *pipe, unsigned count, - const struct pipe_vertex_buffer *vb) -{ - struct nv40_context *nv40 = nv40_context(pipe); - - memcpy(nv40->vtxbuf, vb, sizeof(*vb) * count); - nv40->vtxbuf_nr = count; - - nv40->dirty |= NV40_NEW_ARRAYS; - nv40->draw_dirty |= NV40_NEW_ARRAYS; -} - -static void -nv40_set_vertex_elements(struct pipe_context *pipe, unsigned count, - const struct pipe_vertex_element *ve) -{ - struct nv40_context *nv40 = nv40_context(pipe); - - memcpy(nv40->vtxelt, ve, sizeof(*ve) * count); - nv40->vtxelt_nr = count; - - nv40->dirty |= NV40_NEW_ARRAYS; - nv40->draw_dirty |= NV40_NEW_ARRAYS; -} - -void -nv40_init_state_functions(struct nv40_context *nv40) -{ - nv40->pipe.create_blend_state = nv40_blend_state_create; - nv40->pipe.bind_blend_state = nv40_blend_state_bind; - nv40->pipe.delete_blend_state = nv40_blend_state_delete; - - nv40->pipe.create_sampler_state = nv40_sampler_state_create; - nv40->pipe.bind_fragment_sampler_states = nv40_sampler_state_bind; - nv40->pipe.delete_sampler_state = nv40_sampler_state_delete; - nv40->pipe.set_fragment_sampler_textures = nv40_set_sampler_texture; - - nv40->pipe.create_rasterizer_state = nv40_rasterizer_state_create; - nv40->pipe.bind_rasterizer_state = nv40_rasterizer_state_bind; - nv40->pipe.delete_rasterizer_state = nv40_rasterizer_state_delete; - - nv40->pipe.create_depth_stencil_alpha_state = - nv40_depth_stencil_alpha_state_create; - nv40->pipe.bind_depth_stencil_alpha_state = - nv40_depth_stencil_alpha_state_bind; - nv40->pipe.delete_depth_stencil_alpha_state = - nv40_depth_stencil_alpha_state_delete; - - nv40->pipe.create_vs_state = nv40_vp_state_create; - nv40->pipe.bind_vs_state = nv40_vp_state_bind; - nv40->pipe.delete_vs_state = nv40_vp_state_delete; - - nv40->pipe.create_fs_state = nv40_fp_state_create; - nv40->pipe.bind_fs_state = nv40_fp_state_bind; - nv40->pipe.delete_fs_state = nv40_fp_state_delete; - - nv40->pipe.set_blend_color = nv40_set_blend_color; - nv40->pipe.set_stencil_ref = nv40_set_stencil_ref; - nv40->pipe.set_clip_state = nv40_set_clip_state; - nv40->pipe.set_constant_buffer = nv40_set_constant_buffer; - nv40->pipe.set_framebuffer_state = nv40_set_framebuffer_state; - nv40->pipe.set_polygon_stipple = nv40_set_polygon_stipple; - nv40->pipe.set_scissor_state = nv40_set_scissor_state; - nv40->pipe.set_viewport_state = nv40_set_viewport_state; - - nv40->pipe.set_vertex_buffers = nv40_set_vertex_buffers; - nv40->pipe.set_vertex_elements = nv40_set_vertex_elements; -} - diff --git a/src/gallium/drivers/nv40/nv40_state_blend.c b/src/gallium/drivers/nv40/nv40_state_blend.c deleted file mode 100644 index 3ff00a37f66..00000000000 --- a/src/gallium/drivers/nv40/nv40_state_blend.c +++ /dev/null @@ -1,41 +0,0 @@ -#include "nv40_context.h" - -static boolean -nv40_state_blend_validate(struct nv40_context *nv40) -{ - so_ref(nv40->blend->so, &nv40->state.hw[NV40_STATE_BLEND]); - return TRUE; -} - -struct nv40_state_entry nv40_state_blend = { - .validate = nv40_state_blend_validate, - .dirty = { - .pipe = NV40_NEW_BLEND, - .hw = NV40_STATE_BLEND - } -}; - -static boolean -nv40_state_blend_colour_validate(struct nv40_context *nv40) -{ - struct nouveau_stateobj *so = so_new(1, 1, 0); - struct pipe_blend_color *bcol = &nv40->blend_colour; - - so_method(so, nv40->screen->curie, NV40TCL_BLEND_COLOR, 1); - so_data (so, ((float_to_ubyte(bcol->color[3]) << 24) | - (float_to_ubyte(bcol->color[0]) << 16) | - (float_to_ubyte(bcol->color[1]) << 8) | - (float_to_ubyte(bcol->color[2]) << 0))); - - so_ref(so, &nv40->state.hw[NV40_STATE_BCOL]); - so_ref(NULL, &so); - return TRUE; -} - -struct nv40_state_entry nv40_state_blend_colour = { - .validate = nv40_state_blend_colour_validate, - .dirty = { - .pipe = NV40_NEW_BCOL, - .hw = NV40_STATE_BCOL - } -}; diff --git a/src/gallium/drivers/nv40/nv40_state_emit.c b/src/gallium/drivers/nv40/nv40_state_emit.c deleted file mode 100644 index 8990f303ce4..00000000000 --- a/src/gallium/drivers/nv40/nv40_state_emit.c +++ /dev/null @@ -1,189 +0,0 @@ -#include "nv40_context.h" -#include "nv40_state.h" -#include "draw/draw_context.h" - -static struct nv40_state_entry *render_states[] = { - &nv40_state_framebuffer, - &nv40_state_rasterizer, - &nv40_state_scissor, - &nv40_state_stipple, - &nv40_state_fragprog, - &nv40_state_fragtex, - &nv40_state_vertprog, - &nv40_state_blend, - &nv40_state_blend_colour, - &nv40_state_zsa, - &nv40_state_sr, - &nv40_state_viewport, - &nv40_state_vbo, - NULL -}; - -static struct nv40_state_entry *swtnl_states[] = { - &nv40_state_framebuffer, - &nv40_state_rasterizer, - &nv40_state_scissor, - &nv40_state_stipple, - &nv40_state_fragprog, - &nv40_state_fragtex, - &nv40_state_vertprog, - &nv40_state_blend, - &nv40_state_blend_colour, - &nv40_state_zsa, - &nv40_state_sr, - &nv40_state_viewport, - &nv40_state_vtxfmt, - NULL -}; - -static void -nv40_state_do_validate(struct nv40_context *nv40, - struct nv40_state_entry **states) -{ - while (*states) { - struct nv40_state_entry *e = *states; - - if (nv40->dirty & e->dirty.pipe) { - if (e->validate(nv40)) - nv40->state.dirty |= (1ULL << e->dirty.hw); - } - - states++; - } - nv40->dirty = 0; -} - -void -nv40_state_emit(struct nv40_context *nv40) -{ - struct nv40_state *state = &nv40->state; - struct nv40_screen *screen = nv40->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; - unsigned i; - uint64_t states; - - /* XXX: race conditions - */ - if (nv40 != screen->cur_ctx) { - for (i = 0; i < NV40_STATE_MAX; i++) { - if (state->hw[i] && screen->state[i] != state->hw[i]) - state->dirty |= (1ULL << i); - } - - screen->cur_ctx = nv40; - } - - for (i = 0, states = state->dirty; states; i++) { - if (!(states & (1ULL << i))) - continue; - so_ref (state->hw[i], &nv40->screen->state[i]); - if (state->hw[i]) - so_emit(chan, nv40->screen->state[i]); - states &= ~(1ULL << i); - } - - if (state->dirty & ((1ULL << NV40_STATE_FRAGPROG) | - (1ULL << NV40_STATE_FRAGTEX0))) { - BEGIN_RING(chan, curie, NV40TCL_TEX_CACHE_CTL, 1); - OUT_RING (chan, 2); - BEGIN_RING(chan, curie, NV40TCL_TEX_CACHE_CTL, 1); - OUT_RING (chan, 1); - } - - state->dirty = 0; -} - -void -nv40_state_flush_notify(struct nouveau_channel *chan) -{ - struct nv40_context *nv40 = chan->user_private; - struct nv40_state *state = &nv40->state; - unsigned i, samplers; - - so_emit_reloc_markers(chan, state->hw[NV40_STATE_FB]); - for (i = 0, samplers = state->fp_samplers; i < 16 && samplers; i++) { - if (!(samplers & (1 << i))) - continue; - so_emit_reloc_markers(chan, - state->hw[NV40_STATE_FRAGTEX0+i]); - samplers &= ~(1ULL << i); - } - so_emit_reloc_markers(chan, state->hw[NV40_STATE_FRAGPROG]); - if (state->hw[NV40_STATE_VTXBUF] && nv40->render_mode == HW) - so_emit_reloc_markers(chan, state->hw[NV40_STATE_VTXBUF]); -} - -boolean -nv40_state_validate(struct nv40_context *nv40) -{ - boolean was_sw = nv40->fallback_swtnl ? TRUE : FALSE; - - if (nv40->render_mode != HW) { - /* Don't even bother trying to go back to hw if none - * of the states that caused swtnl previously have changed. - */ - if ((nv40->fallback_swtnl & nv40->dirty) - != nv40->fallback_swtnl) - return FALSE; - - /* Attempt to go to hwtnl again */ - nv40->pipe.flush(&nv40->pipe, 0, NULL); - nv40->dirty |= (NV40_NEW_VIEWPORT | - NV40_NEW_VERTPROG | - NV40_NEW_ARRAYS); - nv40->render_mode = HW; - } - - nv40_state_do_validate(nv40, render_states); - if (nv40->fallback_swtnl || nv40->fallback_swrast) - return FALSE; - - if (was_sw) - NOUVEAU_ERR("swtnl->hw\n"); - - return TRUE; -} - -boolean -nv40_state_validate_swtnl(struct nv40_context *nv40) -{ - struct draw_context *draw = nv40->draw; - - /* Setup for swtnl */ - if (nv40->render_mode == HW) { - NOUVEAU_ERR("hw->swtnl 0x%08x\n", nv40->fallback_swtnl); - nv40->pipe.flush(&nv40->pipe, 0, NULL); - nv40->dirty |= (NV40_NEW_VIEWPORT | - NV40_NEW_VERTPROG | - NV40_NEW_ARRAYS); - nv40->render_mode = SWTNL; - } - - if (nv40->draw_dirty & NV40_NEW_VERTPROG) - draw_bind_vertex_shader(draw, nv40->vertprog->draw); - - if (nv40->draw_dirty & NV40_NEW_RAST) - draw_set_rasterizer_state(draw, &nv40->rasterizer->pipe); - - if (nv40->draw_dirty & NV40_NEW_UCP) - draw_set_clip_state(draw, &nv40->clip); - - if (nv40->draw_dirty & NV40_NEW_VIEWPORT) - draw_set_viewport_state(draw, &nv40->viewport); - - if (nv40->draw_dirty & NV40_NEW_ARRAYS) { - draw_set_vertex_buffers(draw, nv40->vtxbuf_nr, nv40->vtxbuf); - draw_set_vertex_elements(draw, nv40->vtxelt_nr, nv40->vtxelt); - } - - nv40_state_do_validate(nv40, swtnl_states); - if (nv40->fallback_swrast) { - NOUVEAU_ERR("swtnl->swrast 0x%08x\n", nv40->fallback_swrast); - return FALSE; - } - - nv40->draw_dirty = 0; - return TRUE; -} - diff --git a/src/gallium/drivers/nv40/nv40_state_fb.c b/src/gallium/drivers/nv40/nv40_state_fb.c deleted file mode 100644 index fd3fdfddc09..00000000000 --- a/src/gallium/drivers/nv40/nv40_state_fb.c +++ /dev/null @@ -1,175 +0,0 @@ -#include "nv40_context.h" -#include "nouveau/nouveau_util.h" - -static struct pipe_buffer * -nv40_do_surface_buffer(struct pipe_surface *surface) -{ - struct nv40_miptree *mt = (struct nv40_miptree *)surface->texture; - return mt->buffer; -} - -#define nv40_surface_buffer(ps) nouveau_bo(nv40_do_surface_buffer(ps)) - -static boolean -nv40_state_framebuffer_validate(struct nv40_context *nv40) -{ - struct nouveau_channel *chan = nv40->screen->base.channel; - struct nouveau_grobj *curie = nv40->screen->curie; - struct pipe_framebuffer_state *fb = &nv40->framebuffer; - struct nv04_surface *rt[4], *zeta; - uint32_t rt_enable, rt_format; - int i, colour_format = 0, zeta_format = 0; - struct nouveau_stateobj *so = so_new(18, 24, 10); - unsigned rt_flags = NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM; - unsigned w = fb->width; - unsigned h = fb->height; - - rt_enable = 0; - for (i = 0; i < fb->nr_cbufs; i++) { - if (colour_format) { - assert(colour_format == fb->cbufs[i]->format); - } else { - colour_format = fb->cbufs[i]->format; - rt_enable |= (NV40TCL_RT_ENABLE_COLOR0 << i); - rt[i] = (struct nv04_surface *)fb->cbufs[i]; - } - } - - if (rt_enable & (NV40TCL_RT_ENABLE_COLOR1 | NV40TCL_RT_ENABLE_COLOR2 | - NV40TCL_RT_ENABLE_COLOR3)) - rt_enable |= NV40TCL_RT_ENABLE_MRT; - - if (fb->zsbuf) { - zeta_format = fb->zsbuf->format; - zeta = (struct nv04_surface *)fb->zsbuf; - } - - if (!(rt[0]->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)) { - assert(!(fb->width & (fb->width - 1)) && !(fb->height & (fb->height - 1))); - for (i = 1; i < fb->nr_cbufs; i++) - assert(!(rt[i]->base.texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR)); - - rt_format = NV40TCL_RT_FORMAT_TYPE_SWIZZLED | - log2i(fb->width) << NV40TCL_RT_FORMAT_LOG2_WIDTH_SHIFT | - log2i(fb->height) << NV40TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT; - } - else - rt_format = NV40TCL_RT_FORMAT_TYPE_LINEAR; - - switch (colour_format) { - case PIPE_FORMAT_B8G8R8X8_UNORM: - rt_format |= NV40TCL_RT_FORMAT_COLOR_X8R8G8B8; - break; - case PIPE_FORMAT_B8G8R8A8_UNORM: - case 0: - rt_format |= NV40TCL_RT_FORMAT_COLOR_A8R8G8B8; - break; - case PIPE_FORMAT_B5G6R5_UNORM: - rt_format |= NV40TCL_RT_FORMAT_COLOR_R5G6B5; - break; - default: - assert(0); - } - - switch (zeta_format) { - case PIPE_FORMAT_Z16_UNORM: - rt_format |= NV40TCL_RT_FORMAT_ZETA_Z16; - break; - case PIPE_FORMAT_S8Z24_UNORM: - case PIPE_FORMAT_X8Z24_UNORM: - case 0: - rt_format |= NV40TCL_RT_FORMAT_ZETA_Z24S8; - break; - default: - assert(0); - } - - if (rt_enable & NV40TCL_RT_ENABLE_COLOR0) { - so_method(so, curie, NV40TCL_DMA_COLOR0, 1); - so_reloc (so, nv40_surface_buffer(&rt[0]->base), 0, - rt_flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); - so_method(so, curie, NV40TCL_COLOR0_PITCH, 2); - so_data (so, rt[0]->pitch); - so_reloc (so, nv40_surface_buffer(&rt[0]->base), - rt[0]->base.offset, rt_flags | NOUVEAU_BO_LOW, - 0, 0); - } - - if (rt_enable & NV40TCL_RT_ENABLE_COLOR1) { - so_method(so, curie, NV40TCL_DMA_COLOR1, 1); - so_reloc (so, nv40_surface_buffer(&rt[1]->base), 0, - rt_flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); - so_method(so, curie, NV40TCL_COLOR1_OFFSET, 2); - so_reloc (so, nv40_surface_buffer(&rt[1]->base), - rt[1]->base.offset, rt_flags | NOUVEAU_BO_LOW, - 0, 0); - so_data (so, rt[1]->pitch); - } - - if (rt_enable & NV40TCL_RT_ENABLE_COLOR2) { - so_method(so, curie, NV40TCL_DMA_COLOR2, 1); - so_reloc (so, nv40_surface_buffer(&rt[2]->base), 0, - rt_flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); - so_method(so, curie, NV40TCL_COLOR2_OFFSET, 1); - so_reloc (so, nv40_surface_buffer(&rt[2]->base), - rt[2]->base.offset, rt_flags | NOUVEAU_BO_LOW, - 0, 0); - so_method(so, curie, NV40TCL_COLOR2_PITCH, 1); - so_data (so, rt[2]->pitch); - } - - if (rt_enable & NV40TCL_RT_ENABLE_COLOR3) { - so_method(so, curie, NV40TCL_DMA_COLOR3, 1); - so_reloc (so, nv40_surface_buffer(&rt[3]->base), 0, - rt_flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); - so_method(so, curie, NV40TCL_COLOR3_OFFSET, 1); - so_reloc (so, nv40_surface_buffer(&rt[3]->base), - rt[3]->base.offset, rt_flags | NOUVEAU_BO_LOW, - 0, 0); - so_method(so, curie, NV40TCL_COLOR3_PITCH, 1); - so_data (so, rt[3]->pitch); - } - - if (zeta_format) { - so_method(so, curie, NV40TCL_DMA_ZETA, 1); - so_reloc (so, nv40_surface_buffer(&zeta->base), 0, - rt_flags | NOUVEAU_BO_OR, - chan->vram->handle, chan->gart->handle); - so_method(so, curie, NV40TCL_ZETA_OFFSET, 1); - so_reloc (so, nv40_surface_buffer(&zeta->base), - zeta->base.offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); - so_method(so, curie, NV40TCL_ZETA_PITCH, 1); - so_data (so, zeta->pitch); - } - - so_method(so, curie, NV40TCL_RT_ENABLE, 1); - so_data (so, rt_enable); - so_method(so, curie, NV40TCL_RT_HORIZ, 3); - so_data (so, (w << 16) | 0); - so_data (so, (h << 16) | 0); - so_data (so, rt_format); - so_method(so, curie, NV40TCL_VIEWPORT_HORIZ, 2); - so_data (so, (w << 16) | 0); - so_data (so, (h << 16) | 0); - so_method(so, curie, NV40TCL_VIEWPORT_CLIP_HORIZ(0), 2); - so_data (so, ((w - 1) << 16) | 0); - so_data (so, ((h - 1) << 16) | 0); - so_method(so, curie, 0x1d88, 1); - so_data (so, (1 << 12) | h); - - so_ref(so, &nv40->state.hw[NV40_STATE_FB]); - so_ref(NULL, &so); - return TRUE; -} - -struct nv40_state_entry nv40_state_framebuffer = { - .validate = nv40_state_framebuffer_validate, - .dirty = { - .pipe = NV40_NEW_FB, - .hw = NV40_STATE_FB - } -}; diff --git a/src/gallium/drivers/nv40/nv40_state_rasterizer.c b/src/gallium/drivers/nv40/nv40_state_rasterizer.c deleted file mode 100644 index 9ecda5990f0..00000000000 --- a/src/gallium/drivers/nv40/nv40_state_rasterizer.c +++ /dev/null @@ -1,17 +0,0 @@ -#include "nv40_context.h" - -static boolean -nv40_state_rasterizer_validate(struct nv40_context *nv40) -{ - so_ref(nv40->rasterizer->so, - &nv40->state.hw[NV40_STATE_RAST]); - return TRUE; -} - -struct nv40_state_entry nv40_state_rasterizer = { - .validate = nv40_state_rasterizer_validate, - .dirty = { - .pipe = NV40_NEW_RAST, - .hw = NV40_STATE_RAST - } -}; diff --git a/src/gallium/drivers/nv40/nv40_state_scissor.c b/src/gallium/drivers/nv40/nv40_state_scissor.c deleted file mode 100644 index 753a505e934..00000000000 --- a/src/gallium/drivers/nv40/nv40_state_scissor.c +++ /dev/null @@ -1,36 +0,0 @@ -#include "nv40_context.h" - -static boolean -nv40_state_scissor_validate(struct nv40_context *nv40) -{ - struct pipe_rasterizer_state *rast = &nv40->rasterizer->pipe; - struct pipe_scissor_state *s = &nv40->scissor; - struct nouveau_stateobj *so; - - if (nv40->state.hw[NV40_STATE_SCISSOR] && - (rast->scissor == 0 && nv40->state.scissor_enabled == 0)) - return FALSE; - nv40->state.scissor_enabled = rast->scissor; - - so = so_new(1, 2, 0); - so_method(so, nv40->screen->curie, NV40TCL_SCISSOR_HORIZ, 2); - if (nv40->state.scissor_enabled) { - so_data (so, ((s->maxx - s->minx) << 16) | s->minx); - so_data (so, ((s->maxy - s->miny) << 16) | s->miny); - } else { - so_data (so, 4096 << 16); - so_data (so, 4096 << 16); - } - - so_ref(so, &nv40->state.hw[NV40_STATE_SCISSOR]); - so_ref(NULL, &so); - return TRUE; -} - -struct nv40_state_entry nv40_state_scissor = { - .validate = nv40_state_scissor_validate, - .dirty = { - .pipe = NV40_NEW_SCISSOR | NV40_NEW_RAST, - .hw = NV40_STATE_SCISSOR - } -}; diff --git a/src/gallium/drivers/nv40/nv40_state_stipple.c b/src/gallium/drivers/nv40/nv40_state_stipple.c deleted file mode 100644 index 2b371ebfec0..00000000000 --- a/src/gallium/drivers/nv40/nv40_state_stipple.c +++ /dev/null @@ -1,39 +0,0 @@ -#include "nv40_context.h" - -static boolean -nv40_state_stipple_validate(struct nv40_context *nv40) -{ - struct pipe_rasterizer_state *rast = &nv40->rasterizer->pipe; - struct nouveau_grobj *curie = nv40->screen->curie; - struct nouveau_stateobj *so; - - if (nv40->state.hw[NV40_STATE_STIPPLE] && - (rast->poly_stipple_enable == 0 && nv40->state.stipple_enabled == 0)) - return FALSE; - - if (rast->poly_stipple_enable) { - unsigned i; - - so = so_new(2, 33, 0); - so_method(so, curie, NV40TCL_POLYGON_STIPPLE_ENABLE, 1); - so_data (so, 1); - so_method(so, curie, NV40TCL_POLYGON_STIPPLE_PATTERN(0), 32); - for (i = 0; i < 32; i++) - so_data(so, nv40->stipple[i]); - } else { - so = so_new(1, 1, 0); - so_method(so, curie, NV40TCL_POLYGON_STIPPLE_ENABLE, 1); - so_data (so, 0); - } - - so_ref(so, &nv40->state.hw[NV40_STATE_STIPPLE]); - return TRUE; -} - -struct nv40_state_entry nv40_state_stipple = { - .validate = nv40_state_stipple_validate, - .dirty = { - .pipe = NV40_NEW_STIPPLE | NV40_NEW_RAST, - .hw = NV40_STATE_STIPPLE, - } -}; diff --git a/src/gallium/drivers/nv40/nv40_state_viewport.c b/src/gallium/drivers/nv40/nv40_state_viewport.c deleted file mode 100644 index 3aacb00f996..00000000000 --- a/src/gallium/drivers/nv40/nv40_state_viewport.c +++ /dev/null @@ -1,38 +0,0 @@ -#include "nv40_context.h" - -static boolean -nv40_state_viewport_validate(struct nv40_context *nv40) -{ - struct pipe_viewport_state *vpt = &nv40->viewport; - struct nouveau_stateobj *so; - - if (nv40->state.hw[NV40_STATE_VIEWPORT] && - !(nv40->dirty & NV40_NEW_VIEWPORT)) - return FALSE; - - so = so_new(2, 9, 0); - so_method(so, nv40->screen->curie, - NV40TCL_VIEWPORT_TRANSLATE_X, 8); - so_data (so, fui(vpt->translate[0])); - so_data (so, fui(vpt->translate[1])); - so_data (so, fui(vpt->translate[2])); - so_data (so, fui(vpt->translate[3])); - so_data (so, fui(vpt->scale[0])); - so_data (so, fui(vpt->scale[1])); - so_data (so, fui(vpt->scale[2])); - so_data (so, fui(vpt->scale[3])); - so_method(so, nv40->screen->curie, 0x1d78, 1); - so_data (so, 1); - - so_ref(so, &nv40->state.hw[NV40_STATE_VIEWPORT]); - so_ref(NULL, &so); - return TRUE; -} - -struct nv40_state_entry nv40_state_viewport = { - .validate = nv40_state_viewport_validate, - .dirty = { - .pipe = NV40_NEW_VIEWPORT | NV40_NEW_RAST, - .hw = NV40_STATE_VIEWPORT - } -}; diff --git a/src/gallium/drivers/nv40/nv40_state_zsa.c b/src/gallium/drivers/nv40/nv40_state_zsa.c deleted file mode 100644 index 9cbe7da6db1..00000000000 --- a/src/gallium/drivers/nv40/nv40_state_zsa.c +++ /dev/null @@ -1,41 +0,0 @@ -#include "nv40_context.h" - -static boolean -nv40_state_zsa_validate(struct nv40_context *nv40) -{ - so_ref(nv40->zsa->so, - &nv40->state.hw[NV40_STATE_ZSA]); - return TRUE; -} - -struct nv40_state_entry nv40_state_zsa = { - .validate = nv40_state_zsa_validate, - .dirty = { - .pipe = NV40_NEW_ZSA, - .hw = NV40_STATE_ZSA - } -}; - -static boolean -nv40_state_sr_validate(struct nv40_context *nv40) -{ - struct nouveau_stateobj *so = so_new(2, 2, 0); - struct pipe_stencil_ref *sr = &nv40->stencil_ref; - - so_method(so, nv40->screen->curie, NV40TCL_STENCIL_FRONT_FUNC_REF, 1); - so_data (so, sr->ref_value[0]); - so_method(so, nv40->screen->curie, NV40TCL_STENCIL_BACK_FUNC_REF, 1); - so_data (so, sr->ref_value[1]); - - so_ref(so, &nv40->state.hw[NV40_STATE_SR]); - so_ref(NULL, &so); - return TRUE; -} - -struct nv40_state_entry nv40_state_sr = { - .validate = nv40_state_sr_validate, - .dirty = { - .pipe = NV40_NEW_SR, - .hw = NV40_STATE_SR - } -}; diff --git a/src/gallium/drivers/nv40/nv40_surface.c b/src/gallium/drivers/nv40/nv40_surface.c deleted file mode 100644 index 02ecfd7bbb7..00000000000 --- a/src/gallium/drivers/nv40/nv40_surface.c +++ /dev/null @@ -1,64 +0,0 @@ - -/************************************************************************** - * - * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -#include "pipe/p_defines.h" -#include "util/u_inlines.h" - -#include "util/u_tile.h" - -#include "nv40_context.h" - -static void -nv40_surface_copy(struct pipe_context *pipe, - struct pipe_surface *dest, unsigned destx, unsigned desty, - struct pipe_surface *src, unsigned srcx, unsigned srcy, - unsigned width, unsigned height) -{ - struct nv40_context *nv40 = nv40_context(pipe); - struct nv04_surface_2d *eng2d = nv40->screen->eng2d; - - eng2d->copy(eng2d, dest, destx, desty, src, srcx, srcy, width, height); -} - -static void -nv40_surface_fill(struct pipe_context *pipe, struct pipe_surface *dest, - unsigned destx, unsigned desty, unsigned width, - unsigned height, unsigned value) -{ - struct nv40_context *nv40 = nv40_context(pipe); - struct nv04_surface_2d *eng2d = nv40->screen->eng2d; - - eng2d->fill(eng2d, dest, destx, desty, width, height, value); -} - -void -nv40_init_surface_functions(struct nv40_context *nv40) -{ - nv40->pipe.surface_copy = nv40_surface_copy; - nv40->pipe.surface_fill = nv40_surface_fill; -} diff --git a/src/gallium/drivers/nv40/nv40_transfer.c b/src/gallium/drivers/nv40/nv40_transfer.c deleted file mode 100644 index 0462a042c38..00000000000 --- a/src/gallium/drivers/nv40/nv40_transfer.c +++ /dev/null @@ -1,178 +0,0 @@ -#include "pipe/p_state.h" -#include "pipe/p_defines.h" -#include "util/u_inlines.h" -#include "util/u_format.h" -#include "util/u_memory.h" -#include "util/u_math.h" -#include "nouveau/nouveau_winsys.h" -#include "nv40_context.h" -#include "nv40_screen.h" -#include "nv40_state.h" - -struct nv40_transfer { - struct pipe_transfer base; - struct pipe_surface *surface; - boolean direct; -}; - -static void -nv40_compatible_transfer_tex(struct pipe_texture *pt, unsigned width, unsigned height, - struct pipe_texture *template) -{ - memset(template, 0, sizeof(struct pipe_texture)); - template->target = pt->target; - template->format = pt->format; - template->width0 = width; - template->height0 = height; - template->depth0 = 1; - template->last_level = 0; - template->nr_samples = pt->nr_samples; - - template->tex_usage = PIPE_TEXTURE_USAGE_DYNAMIC | - NOUVEAU_TEXTURE_USAGE_LINEAR; -} - -static struct pipe_transfer * -nv40_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, - unsigned face, unsigned level, unsigned zslice, - enum pipe_transfer_usage usage, - unsigned x, unsigned y, unsigned w, unsigned h) -{ - struct nv40_miptree *mt = (struct nv40_miptree *)pt; - struct nv40_transfer *tx; - struct pipe_texture tx_tex_template, *tx_tex; - - tx = CALLOC_STRUCT(nv40_transfer); - if (!tx) - return NULL; - - pipe_texture_reference(&tx->base.texture, pt); - tx->base.x = x; - tx->base.y = y; - tx->base.width = w; - tx->base.height = h; - tx->base.stride = mt->level[level].pitch; - tx->base.usage = usage; - tx->base.face = face; - tx->base.level = level; - tx->base.zslice = zslice; - - /* Direct access to texture */ - if ((pt->tex_usage & PIPE_TEXTURE_USAGE_DYNAMIC || - debug_get_bool_option("NOUVEAU_NO_TRANSFER", TRUE/*XXX:FALSE*/)) && - pt->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR) - { - tx->direct = true; - tx->surface = pscreen->get_tex_surface(pscreen, pt, - face, level, zslice, - pipe_transfer_buffer_flags(&tx->base)); - return &tx->base; - } - - tx->direct = false; - - nv40_compatible_transfer_tex(pt, w, h, &tx_tex_template); - - tx_tex = pscreen->texture_create(pscreen, &tx_tex_template); - if (!tx_tex) - { - FREE(tx); - return NULL; - } - - tx->base.stride = ((struct nv40_miptree*)tx_tex)->level[0].pitch; - - tx->surface = pscreen->get_tex_surface(pscreen, tx_tex, - 0, 0, 0, - pipe_transfer_buffer_flags(&tx->base)); - - pipe_texture_reference(&tx_tex, NULL); - - if (!tx->surface) - { - pipe_surface_reference(&tx->surface, NULL); - FREE(tx); - return NULL; - } - - if (usage & PIPE_TRANSFER_READ) { - struct nv40_screen *nvscreen = nv40_screen(pscreen); - struct pipe_surface *src; - - src = pscreen->get_tex_surface(pscreen, pt, - face, level, zslice, - PIPE_BUFFER_USAGE_GPU_READ); - - /* TODO: Check if SIFM can deal with x,y,w,h when swizzling */ - /* TODO: Check if SIFM can un-swizzle */ - nvscreen->eng2d->copy(nvscreen->eng2d, - tx->surface, 0, 0, - src, x, y, - w, h); - - pipe_surface_reference(&src, NULL); - } - - return &tx->base; -} - -static void -nv40_transfer_del(struct pipe_transfer *ptx) -{ - struct nv40_transfer *tx = (struct nv40_transfer *)ptx; - - if (!tx->direct && (ptx->usage & PIPE_TRANSFER_WRITE)) { - struct pipe_screen *pscreen = ptx->texture->screen; - struct nv40_screen *nvscreen = nv40_screen(pscreen); - struct pipe_surface *dst; - - dst = pscreen->get_tex_surface(pscreen, ptx->texture, - ptx->face, ptx->level, ptx->zslice, - PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER); - - /* TODO: Check if SIFM can deal with x,y,w,h when swizzling */ - nvscreen->eng2d->copy(nvscreen->eng2d, - dst, tx->base.x, tx->base.y, - tx->surface, 0, 0, - tx->base.width, tx->base.height); - - pipe_surface_reference(&dst, NULL); - } - - pipe_surface_reference(&tx->surface, NULL); - pipe_texture_reference(&ptx->texture, NULL); - FREE(ptx); -} - -static void * -nv40_transfer_map(struct pipe_screen *pscreen, struct pipe_transfer *ptx) -{ - struct nv40_transfer *tx = (struct nv40_transfer *)ptx; - struct nv04_surface *ns = (struct nv04_surface *)tx->surface; - struct nv40_miptree *mt = (struct nv40_miptree *)tx->surface->texture; - void *map = pipe_buffer_map(pscreen, mt->buffer, - pipe_transfer_buffer_flags(ptx)); - - if(!tx->direct) - return map + ns->base.offset; - else - return map + ns->base.offset + ptx->y * ns->pitch + ptx->x * util_format_get_blocksize(ptx->texture->format); -} - -static void -nv40_transfer_unmap(struct pipe_screen *pscreen, struct pipe_transfer *ptx) -{ - struct nv40_transfer *tx = (struct nv40_transfer *)ptx; - struct nv40_miptree *mt = (struct nv40_miptree *)tx->surface->texture; - - pipe_buffer_unmap(pscreen, mt->buffer); -} - -void -nv40_screen_init_transfer_functions(struct pipe_screen *pscreen) -{ - pscreen->get_tex_transfer = nv40_transfer_new; - pscreen->tex_transfer_destroy = nv40_transfer_del; - pscreen->transfer_map = nv40_transfer_map; - pscreen->transfer_unmap = nv40_transfer_unmap; -} diff --git a/src/gallium/drivers/nv40/nv40_vbo.c b/src/gallium/drivers/nv40/nv40_vbo.c deleted file mode 100644 index 7812460d2ed..00000000000 --- a/src/gallium/drivers/nv40/nv40_vbo.c +++ /dev/null @@ -1,565 +0,0 @@ -#include "pipe/p_context.h" -#include "pipe/p_state.h" -#include "util/u_inlines.h" -#include "util/u_format.h" - -#include "nv40_context.h" -#include "nv40_state.h" - -#include "nouveau/nouveau_channel.h" -#include "nouveau/nouveau_pushbuf.h" -#include "nouveau/nouveau_util.h" - -#define FORCE_SWTNL 0 - -static INLINE int -nv40_vbo_format_to_hw(enum pipe_format pipe, unsigned *fmt, unsigned *ncomp) -{ - switch (pipe) { - case PIPE_FORMAT_R32_FLOAT: - case PIPE_FORMAT_R32G32_FLOAT: - case PIPE_FORMAT_R32G32B32_FLOAT: - case PIPE_FORMAT_R32G32B32A32_FLOAT: - *fmt = NV40TCL_VTXFMT_TYPE_FLOAT; - break; - case PIPE_FORMAT_R8_UNORM: - case PIPE_FORMAT_R8G8_UNORM: - case PIPE_FORMAT_R8G8B8_UNORM: - case PIPE_FORMAT_R8G8B8A8_UNORM: - *fmt = NV40TCL_VTXFMT_TYPE_UBYTE; - break; - case PIPE_FORMAT_R16_SSCALED: - case PIPE_FORMAT_R16G16_SSCALED: - case PIPE_FORMAT_R16G16B16_SSCALED: - case PIPE_FORMAT_R16G16B16A16_SSCALED: - *fmt = NV40TCL_VTXFMT_TYPE_USHORT; - break; - default: - NOUVEAU_ERR("Unknown format %s\n", util_format_name(pipe)); - return 1; - } - - switch (pipe) { - case PIPE_FORMAT_R8_UNORM: - case PIPE_FORMAT_R32_FLOAT: - case PIPE_FORMAT_R16_SSCALED: - *ncomp = 1; - break; - case PIPE_FORMAT_R8G8_UNORM: - case PIPE_FORMAT_R32G32_FLOAT: - case PIPE_FORMAT_R16G16_SSCALED: - *ncomp = 2; - break; - case PIPE_FORMAT_R8G8B8_UNORM: - case PIPE_FORMAT_R32G32B32_FLOAT: - case PIPE_FORMAT_R16G16B16_SSCALED: - *ncomp = 3; - break; - case PIPE_FORMAT_R8G8B8A8_UNORM: - case PIPE_FORMAT_R32G32B32A32_FLOAT: - case PIPE_FORMAT_R16G16B16A16_SSCALED: - *ncomp = 4; - break; - default: - NOUVEAU_ERR("Unknown format %s\n", util_format_name(pipe)); - return 1; - } - - return 0; -} - -static boolean -nv40_vbo_set_idxbuf(struct nv40_context *nv40, struct pipe_buffer *ib, - unsigned ib_size) -{ - struct pipe_screen *pscreen = &nv40->screen->base.base; - unsigned type; - - if (!ib) { - nv40->idxbuf = NULL; - nv40->idxbuf_format = 0xdeadbeef; - return FALSE; - } - - if (!pscreen->get_param(pscreen, NOUVEAU_CAP_HW_IDXBUF) || ib_size == 1) - return FALSE; - - switch (ib_size) { - case 2: - type = NV40TCL_IDXBUF_FORMAT_TYPE_U16; - break; - case 4: - type = NV40TCL_IDXBUF_FORMAT_TYPE_U32; - break; - default: - return FALSE; - } - - if (ib != nv40->idxbuf || - type != nv40->idxbuf_format) { - nv40->dirty |= NV40_NEW_ARRAYS; - nv40->idxbuf = ib; - nv40->idxbuf_format = type; - } - - return TRUE; -} - -static boolean -nv40_vbo_static_attrib(struct nv40_context *nv40, struct nouveau_stateobj *so, - int attrib, struct pipe_vertex_element *ve, - struct pipe_vertex_buffer *vb) -{ - struct pipe_screen *pscreen = nv40->pipe.screen; - struct nouveau_grobj *curie = nv40->screen->curie; - unsigned type, ncomp; - void *map; - - if (nv40_vbo_format_to_hw(ve->src_format, &type, &ncomp)) - return FALSE; - - map = pipe_buffer_map(pscreen, vb->buffer, PIPE_BUFFER_USAGE_CPU_READ); - map += vb->buffer_offset + ve->src_offset; - - switch (type) { - case NV40TCL_VTXFMT_TYPE_FLOAT: - { - float *v = map; - - switch (ncomp) { - case 4: - so_method(so, curie, NV40TCL_VTX_ATTR_4F_X(attrib), 4); - so_data (so, fui(v[0])); - so_data (so, fui(v[1])); - so_data (so, fui(v[2])); - so_data (so, fui(v[3])); - break; - case 3: - so_method(so, curie, NV40TCL_VTX_ATTR_3F_X(attrib), 3); - so_data (so, fui(v[0])); - so_data (so, fui(v[1])); - so_data (so, fui(v[2])); - break; - case 2: - so_method(so, curie, NV40TCL_VTX_ATTR_2F_X(attrib), 2); - so_data (so, fui(v[0])); - so_data (so, fui(v[1])); - break; - case 1: - so_method(so, curie, NV40TCL_VTX_ATTR_1F(attrib), 1); - so_data (so, fui(v[0])); - break; - default: - pipe_buffer_unmap(pscreen, vb->buffer); - return FALSE; - } - } - break; - default: - pipe_buffer_unmap(pscreen, vb->buffer); - return FALSE; - } - - pipe_buffer_unmap(pscreen, vb->buffer); - - return TRUE; -} - -void -nv40_draw_arrays(struct pipe_context *pipe, - unsigned mode, unsigned start, unsigned count) -{ - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_screen *screen = nv40->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; - unsigned restart; - - nv40_vbo_set_idxbuf(nv40, NULL, 0); - if (FORCE_SWTNL || !nv40_state_validate(nv40)) { - nv40_draw_elements_swtnl(pipe, NULL, 0, - mode, start, count); - return; - } - - while (count) { - unsigned vc, nr; - - nv40_state_emit(nv40); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, - mode, start, count, &restart); - if (!vc) { - FIRE_RING(chan); - continue; - } - - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - nr = (vc & 0xff); - if (nr) { - BEGIN_RING(chan, curie, NV40TCL_VB_VERTEX_BATCH, 1); - OUT_RING (chan, ((nr - 1) << 24) | start); - start += nr; - } - - nr = vc >> 8; - while (nr) { - unsigned push = nr > 2047 ? 2047 : nr; - - nr -= push; - - BEGIN_RING_NI(chan, curie, NV40TCL_VB_VERTEX_BATCH, push); - while (push--) { - OUT_RING(chan, ((0x100 - 1) << 24) | start); - start += 0x100; - } - } - - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); - OUT_RING (chan, 0); - - count -= vc; - start = restart; - } - - pipe->flush(pipe, 0, NULL); -} - -static INLINE void -nv40_draw_elements_u08(struct nv40_context *nv40, void *ib, - unsigned mode, unsigned start, unsigned count) -{ - struct nv40_screen *screen = nv40->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; - - while (count) { - uint8_t *elts = (uint8_t *)ib + start; - unsigned vc, push, restart; - - nv40_state_emit(nv40); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, - mode, start, count, &restart); - if (vc == 0) { - FIRE_RING(chan); - continue; - } - count -= vc; - - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - if (vc & 1) { - BEGIN_RING(chan, curie, NV40TCL_VB_ELEMENT_U32, 1); - OUT_RING (chan, elts[0]); - elts++; vc--; - } - - while (vc) { - unsigned i; - - push = MIN2(vc, 2047 * 2); - - BEGIN_RING_NI(chan, curie, NV40TCL_VB_ELEMENT_U16, push >> 1); - for (i = 0; i < push; i+=2) - OUT_RING(chan, (elts[i+1] << 16) | elts[i]); - - vc -= push; - elts += push; - } - - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); - OUT_RING (chan, 0); - - start = restart; - } -} - -static INLINE void -nv40_draw_elements_u16(struct nv40_context *nv40, void *ib, - unsigned mode, unsigned start, unsigned count) -{ - struct nv40_screen *screen = nv40->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; - - while (count) { - uint16_t *elts = (uint16_t *)ib + start; - unsigned vc, push, restart; - - nv40_state_emit(nv40); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 2, - mode, start, count, &restart); - if (vc == 0) { - FIRE_RING(chan); - continue; - } - count -= vc; - - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - if (vc & 1) { - BEGIN_RING(chan, curie, NV40TCL_VB_ELEMENT_U32, 1); - OUT_RING (chan, elts[0]); - elts++; vc--; - } - - while (vc) { - unsigned i; - - push = MIN2(vc, 2047 * 2); - - BEGIN_RING_NI(chan, curie, NV40TCL_VB_ELEMENT_U16, push >> 1); - for (i = 0; i < push; i+=2) - OUT_RING(chan, (elts[i+1] << 16) | elts[i]); - - vc -= push; - elts += push; - } - - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); - OUT_RING (chan, 0); - - start = restart; - } -} - -static INLINE void -nv40_draw_elements_u32(struct nv40_context *nv40, void *ib, - unsigned mode, unsigned start, unsigned count) -{ - struct nv40_screen *screen = nv40->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; - - while (count) { - uint32_t *elts = (uint32_t *)ib + start; - unsigned vc, push, restart; - - nv40_state_emit(nv40); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 5, 1, - mode, start, count, &restart); - if (vc == 0) { - FIRE_RING(chan); - continue; - } - count -= vc; - - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - while (vc) { - push = MIN2(vc, 2047); - - BEGIN_RING_NI(chan, curie, NV40TCL_VB_ELEMENT_U32, push); - OUT_RINGp (chan, elts, push); - - vc -= push; - elts += push; - } - - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); - OUT_RING (chan, 0); - - start = restart; - } -} - -static void -nv40_draw_elements_inline(struct pipe_context *pipe, - struct pipe_buffer *ib, unsigned ib_size, - unsigned mode, unsigned start, unsigned count) -{ - struct nv40_context *nv40 = nv40_context(pipe); - struct pipe_screen *pscreen = pipe->screen; - void *map; - - map = pipe_buffer_map(pscreen, ib, PIPE_BUFFER_USAGE_CPU_READ); - if (!ib) { - NOUVEAU_ERR("failed mapping ib\n"); - return; - } - - switch (ib_size) { - case 1: - nv40_draw_elements_u08(nv40, map, mode, start, count); - break; - case 2: - nv40_draw_elements_u16(nv40, map, mode, start, count); - break; - case 4: - nv40_draw_elements_u32(nv40, map, mode, start, count); - break; - default: - NOUVEAU_ERR("invalid idxbuf fmt %d\n", ib_size); - break; - } - - pipe_buffer_unmap(pscreen, ib); -} - -static void -nv40_draw_elements_vbo(struct pipe_context *pipe, - unsigned mode, unsigned start, unsigned count) -{ - struct nv40_context *nv40 = nv40_context(pipe); - struct nv40_screen *screen = nv40->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; - unsigned restart; - - while (count) { - unsigned nr, vc; - - nv40_state_emit(nv40); - - vc = nouveau_vbuf_split(AVAIL_RING(chan), 6, 256, - mode, start, count, &restart); - if (!vc) { - FIRE_RING(chan); - continue; - } - - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); - OUT_RING (chan, nvgl_primitive(mode)); - - nr = (vc & 0xff); - if (nr) { - BEGIN_RING(chan, curie, NV40TCL_VB_INDEX_BATCH, 1); - OUT_RING (chan, ((nr - 1) << 24) | start); - start += nr; - } - - nr = vc >> 8; - while (nr) { - unsigned push = nr > 2047 ? 2047 : nr; - - nr -= push; - - BEGIN_RING_NI(chan, curie, NV40TCL_VB_INDEX_BATCH, push); - while (push--) { - OUT_RING(chan, ((0x100 - 1) << 24) | start); - start += 0x100; - } - } - - BEGIN_RING(chan, curie, NV40TCL_BEGIN_END, 1); - OUT_RING (chan, 0); - - count -= vc; - start = restart; - } -} - -void -nv40_draw_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, unsigned indexSize, - unsigned mode, unsigned start, unsigned count) -{ - struct nv40_context *nv40 = nv40_context(pipe); - boolean idxbuf; - - idxbuf = nv40_vbo_set_idxbuf(nv40, indexBuffer, indexSize); - if (FORCE_SWTNL || !nv40_state_validate(nv40)) { - nv40_draw_elements_swtnl(pipe, NULL, 0, - mode, start, count); - return; - } - - if (idxbuf) { - nv40_draw_elements_vbo(pipe, mode, start, count); - } else { - nv40_draw_elements_inline(pipe, indexBuffer, indexSize, - mode, start, count); - } - - pipe->flush(pipe, 0, NULL); -} - -static boolean -nv40_vbo_validate(struct nv40_context *nv40) -{ - struct nouveau_stateobj *vtxbuf, *vtxfmt, *sattr = NULL; - struct nouveau_grobj *curie = nv40->screen->curie; - struct pipe_buffer *ib = nv40->idxbuf; - unsigned ib_format = nv40->idxbuf_format; - unsigned vb_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; - int hw; - - vtxbuf = so_new(3, 17, 18); - so_method(vtxbuf, curie, NV40TCL_VTXBUF_ADDRESS(0), nv40->vtxelt_nr); - vtxfmt = so_new(1, 16, 0); - so_method(vtxfmt, curie, NV40TCL_VTXFMT(0), nv40->vtxelt_nr); - - for (hw = 0; hw < nv40->vtxelt_nr; hw++) { - struct pipe_vertex_element *ve; - struct pipe_vertex_buffer *vb; - unsigned type, ncomp; - - ve = &nv40->vtxelt[hw]; - vb = &nv40->vtxbuf[ve->vertex_buffer_index]; - - if (!vb->stride) { - if (!sattr) - sattr = so_new(16, 16 * 4, 0); - - if (nv40_vbo_static_attrib(nv40, sattr, hw, ve, vb)) { - so_data(vtxbuf, 0); - so_data(vtxfmt, NV40TCL_VTXFMT_TYPE_FLOAT); - continue; - } - } - - if (nv40_vbo_format_to_hw(ve->src_format, &type, &ncomp)) { - nv40->fallback_swtnl |= NV40_NEW_ARRAYS; - so_ref(NULL, &vtxbuf); - so_ref(NULL, &vtxfmt); - return FALSE; - } - - so_reloc(vtxbuf, nouveau_bo(vb->buffer), - vb->buffer_offset + ve->src_offset, - vb_flags | NOUVEAU_BO_LOW | NOUVEAU_BO_OR, - 0, NV40TCL_VTXBUF_ADDRESS_DMA1); - so_data (vtxfmt, ((vb->stride << NV40TCL_VTXFMT_STRIDE_SHIFT) | - (ncomp << NV40TCL_VTXFMT_SIZE_SHIFT) | type)); - } - - if (ib) { - struct nouveau_bo *bo = nouveau_bo(ib); - - so_method(vtxbuf, curie, NV40TCL_IDXBUF_ADDRESS, 2); - so_reloc (vtxbuf, bo, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0); - so_reloc (vtxbuf, bo, ib_format, vb_flags | NOUVEAU_BO_OR, - 0, NV40TCL_IDXBUF_FORMAT_DMA1); - } - - so_method(vtxbuf, curie, 0x1710, 1); - so_data (vtxbuf, 0); - - so_ref(vtxbuf, &nv40->state.hw[NV40_STATE_VTXBUF]); - so_ref(NULL, &vtxbuf); - nv40->state.dirty |= (1ULL << NV40_STATE_VTXBUF); - so_ref(vtxfmt, &nv40->state.hw[NV40_STATE_VTXFMT]); - so_ref(NULL, &vtxfmt); - nv40->state.dirty |= (1ULL << NV40_STATE_VTXFMT); - so_ref(sattr, &nv40->state.hw[NV40_STATE_VTXATTR]); - so_ref(NULL, &sattr); - nv40->state.dirty |= (1ULL << NV40_STATE_VTXATTR); - return FALSE; -} - -struct nv40_state_entry nv40_state_vbo = { - .validate = nv40_vbo_validate, - .dirty = { - .pipe = NV40_NEW_ARRAYS, - .hw = 0, - } -}; - diff --git a/src/gallium/drivers/nv40/nv40_vertprog.c b/src/gallium/drivers/nv40/nv40_vertprog.c deleted file mode 100644 index b289eef0fc2..00000000000 --- a/src/gallium/drivers/nv40/nv40_vertprog.c +++ /dev/null @@ -1,1048 +0,0 @@ -#include "pipe/p_context.h" -#include "pipe/p_defines.h" -#include "pipe/p_state.h" -#include "util/u_inlines.h" - -#include "pipe/p_shader_tokens.h" -#include "tgsi/tgsi_parse.h" -#include "tgsi/tgsi_util.h" - -#include "nv40_context.h" -#include "nv40_state.h" - -/* TODO (at least...): - * 1. Indexed consts + ARL - * 3. NV_vp11, NV_vp2, NV_vp3 features - * - extra arith opcodes - * - branching - * - texture sampling - * - indexed attribs - * - indexed results - * 4. bugs - */ - -#define SWZ_X 0 -#define SWZ_Y 1 -#define SWZ_Z 2 -#define SWZ_W 3 -#define MASK_X 8 -#define MASK_Y 4 -#define MASK_Z 2 -#define MASK_W 1 -#define MASK_ALL (MASK_X|MASK_Y|MASK_Z|MASK_W) -#define DEF_SCALE 0 -#define DEF_CTEST 0 -#include "nv40_shader.h" - -#define swz(s,x,y,z,w) nv40_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) -#define neg(s) nv40_sr_neg((s)) -#define abs(s) nv40_sr_abs((s)) - -#define NV40_VP_INST_DEST_CLIP(n) ((~0 - 6) + (n)) - -struct nv40_vpc { - struct nv40_vertex_program *vp; - - struct nv40_vertex_program_exec *vpi; - - unsigned r_temps; - unsigned r_temps_discard; - struct nv40_sreg r_result[PIPE_MAX_SHADER_OUTPUTS]; - struct nv40_sreg *r_address; - struct nv40_sreg *r_temp; - - struct nv40_sreg *imm; - unsigned nr_imm; - - unsigned hpos_idx; -}; - -static struct nv40_sreg -temp(struct nv40_vpc *vpc) -{ - int idx = ffs(~vpc->r_temps) - 1; - - if (idx < 0) { - NOUVEAU_ERR("out of temps!!\n"); - assert(0); - return nv40_sr(NV40SR_TEMP, 0); - } - - vpc->r_temps |= (1 << idx); - vpc->r_temps_discard |= (1 << idx); - return nv40_sr(NV40SR_TEMP, idx); -} - -static INLINE void -release_temps(struct nv40_vpc *vpc) -{ - vpc->r_temps &= ~vpc->r_temps_discard; - vpc->r_temps_discard = 0; -} - -static struct nv40_sreg -constant(struct nv40_vpc *vpc, int pipe, float x, float y, float z, float w) -{ - struct nv40_vertex_program *vp = vpc->vp; - struct nv40_vertex_program_data *vpd; - int idx; - - if (pipe >= 0) { - for (idx = 0; idx < vp->nr_consts; idx++) { - if (vp->consts[idx].index == pipe) - return nv40_sr(NV40SR_CONST, idx); - } - } - - idx = vp->nr_consts++; - vp->consts = realloc(vp->consts, sizeof(*vpd) * vp->nr_consts); - vpd = &vp->consts[idx]; - - vpd->index = pipe; - vpd->value[0] = x; - vpd->value[1] = y; - vpd->value[2] = z; - vpd->value[3] = w; - return nv40_sr(NV40SR_CONST, idx); -} - -#define arith(cc,s,o,d,m,s0,s1,s2) \ - nv40_vp_arith((cc), (s), NV40_VP_INST_##o, (d), (m), (s0), (s1), (s2)) - -static void -emit_src(struct nv40_vpc *vpc, uint32_t *hw, int pos, struct nv40_sreg src) -{ - struct nv40_vertex_program *vp = vpc->vp; - uint32_t sr = 0; - - switch (src.type) { - case NV40SR_TEMP: - sr |= (NV40_VP_SRC_REG_TYPE_TEMP << NV40_VP_SRC_REG_TYPE_SHIFT); - sr |= (src.index << NV40_VP_SRC_TEMP_SRC_SHIFT); - break; - case NV40SR_INPUT: - sr |= (NV40_VP_SRC_REG_TYPE_INPUT << - NV40_VP_SRC_REG_TYPE_SHIFT); - vp->ir |= (1 << src.index); - hw[1] |= (src.index << NV40_VP_INST_INPUT_SRC_SHIFT); - break; - case NV40SR_CONST: - sr |= (NV40_VP_SRC_REG_TYPE_CONST << - NV40_VP_SRC_REG_TYPE_SHIFT); - assert(vpc->vpi->const_index == -1 || - vpc->vpi->const_index == src.index); - vpc->vpi->const_index = src.index; - break; - case NV40SR_NONE: - sr |= (NV40_VP_SRC_REG_TYPE_INPUT << - NV40_VP_SRC_REG_TYPE_SHIFT); - break; - default: - assert(0); - } - - if (src.negate) - sr |= NV40_VP_SRC_NEGATE; - - if (src.abs) - hw[0] |= (1 << (21 + pos)); - - sr |= ((src.swz[0] << NV40_VP_SRC_SWZ_X_SHIFT) | - (src.swz[1] << NV40_VP_SRC_SWZ_Y_SHIFT) | - (src.swz[2] << NV40_VP_SRC_SWZ_Z_SHIFT) | - (src.swz[3] << NV40_VP_SRC_SWZ_W_SHIFT)); - - switch (pos) { - case 0: - hw[1] |= ((sr & NV40_VP_SRC0_HIGH_MASK) >> - NV40_VP_SRC0_HIGH_SHIFT) << NV40_VP_INST_SRC0H_SHIFT; - hw[2] |= (sr & NV40_VP_SRC0_LOW_MASK) << - NV40_VP_INST_SRC0L_SHIFT; - break; - case 1: - hw[2] |= sr << NV40_VP_INST_SRC1_SHIFT; - break; - case 2: - hw[2] |= ((sr & NV40_VP_SRC2_HIGH_MASK) >> - NV40_VP_SRC2_HIGH_SHIFT) << NV40_VP_INST_SRC2H_SHIFT; - hw[3] |= (sr & NV40_VP_SRC2_LOW_MASK) << - NV40_VP_INST_SRC2L_SHIFT; - break; - default: - assert(0); - } -} - -static void -emit_dst(struct nv40_vpc *vpc, uint32_t *hw, int slot, struct nv40_sreg dst) -{ - struct nv40_vertex_program *vp = vpc->vp; - - switch (dst.type) { - case NV40SR_TEMP: - hw[3] |= NV40_VP_INST_DEST_MASK; - if (slot == 0) { - hw[0] |= (dst.index << - NV40_VP_INST_VEC_DEST_TEMP_SHIFT); - } else { - hw[3] |= (dst.index << - NV40_VP_INST_SCA_DEST_TEMP_SHIFT); - } - break; - case NV40SR_OUTPUT: - switch (dst.index) { - case NV40_VP_INST_DEST_COL0 : vp->or |= (1 << 0); break; - case NV40_VP_INST_DEST_COL1 : vp->or |= (1 << 1); break; - case NV40_VP_INST_DEST_BFC0 : vp->or |= (1 << 2); break; - case NV40_VP_INST_DEST_BFC1 : vp->or |= (1 << 3); break; - case NV40_VP_INST_DEST_FOGC : vp->or |= (1 << 4); break; - case NV40_VP_INST_DEST_PSZ : vp->or |= (1 << 5); break; - case NV40_VP_INST_DEST_TC(0): vp->or |= (1 << 14); break; - case NV40_VP_INST_DEST_TC(1): vp->or |= (1 << 15); break; - case NV40_VP_INST_DEST_TC(2): vp->or |= (1 << 16); break; - case NV40_VP_INST_DEST_TC(3): vp->or |= (1 << 17); break; - case NV40_VP_INST_DEST_TC(4): vp->or |= (1 << 18); break; - case NV40_VP_INST_DEST_TC(5): vp->or |= (1 << 19); break; - case NV40_VP_INST_DEST_TC(6): vp->or |= (1 << 20); break; - case NV40_VP_INST_DEST_TC(7): vp->or |= (1 << 21); break; - case NV40_VP_INST_DEST_CLIP(0): - vp->or |= (1 << 6); - vp->clip_ctrl |= NV40TCL_CLIP_PLANE_ENABLE_PLANE0; - dst.index = NV40_VP_INST_DEST_FOGC; - break; - case NV40_VP_INST_DEST_CLIP(1): - vp->or |= (1 << 7); - vp->clip_ctrl |= NV40TCL_CLIP_PLANE_ENABLE_PLANE1; - dst.index = NV40_VP_INST_DEST_FOGC; - break; - case NV40_VP_INST_DEST_CLIP(2): - vp->or |= (1 << 8); - vp->clip_ctrl |= NV40TCL_CLIP_PLANE_ENABLE_PLANE2; - dst.index = NV40_VP_INST_DEST_FOGC; - break; - case NV40_VP_INST_DEST_CLIP(3): - vp->or |= (1 << 9); - vp->clip_ctrl |= NV40TCL_CLIP_PLANE_ENABLE_PLANE3; - dst.index = NV40_VP_INST_DEST_PSZ; - break; - case NV40_VP_INST_DEST_CLIP(4): - vp->or |= (1 << 10); - vp->clip_ctrl |= NV40TCL_CLIP_PLANE_ENABLE_PLANE4; - dst.index = NV40_VP_INST_DEST_PSZ; - break; - case NV40_VP_INST_DEST_CLIP(5): - vp->or |= (1 << 11); - vp->clip_ctrl |= NV40TCL_CLIP_PLANE_ENABLE_PLANE5; - dst.index = NV40_VP_INST_DEST_PSZ; - break; - default: - break; - } - - hw[3] |= (dst.index << NV40_VP_INST_DEST_SHIFT); - if (slot == 0) { - hw[0] |= NV40_VP_INST_VEC_RESULT; - hw[0] |= NV40_VP_INST_VEC_DEST_TEMP_MASK | (1<<20); - } else { - hw[3] |= NV40_VP_INST_SCA_RESULT; - hw[3] |= NV40_VP_INST_SCA_DEST_TEMP_MASK; - } - break; - default: - assert(0); - } -} - -static void -nv40_vp_arith(struct nv40_vpc *vpc, int slot, int op, - struct nv40_sreg dst, int mask, - struct nv40_sreg s0, struct nv40_sreg s1, - struct nv40_sreg s2) -{ - struct nv40_vertex_program *vp = vpc->vp; - uint32_t *hw; - - vp->insns = realloc(vp->insns, ++vp->nr_insns * sizeof(*vpc->vpi)); - vpc->vpi = &vp->insns[vp->nr_insns - 1]; - memset(vpc->vpi, 0, sizeof(*vpc->vpi)); - vpc->vpi->const_index = -1; - - hw = vpc->vpi->data; - - hw[0] |= (NV40_VP_INST_COND_TR << NV40_VP_INST_COND_SHIFT); - hw[0] |= ((0 << NV40_VP_INST_COND_SWZ_X_SHIFT) | - (1 << NV40_VP_INST_COND_SWZ_Y_SHIFT) | - (2 << NV40_VP_INST_COND_SWZ_Z_SHIFT) | - (3 << NV40_VP_INST_COND_SWZ_W_SHIFT)); - - if (slot == 0) { - hw[1] |= (op << NV40_VP_INST_VEC_OPCODE_SHIFT); - hw[3] |= NV40_VP_INST_SCA_DEST_TEMP_MASK; - hw[3] |= (mask << NV40_VP_INST_VEC_WRITEMASK_SHIFT); - } else { - hw[1] |= (op << NV40_VP_INST_SCA_OPCODE_SHIFT); - hw[0] |= (NV40_VP_INST_VEC_DEST_TEMP_MASK | (1 << 20)); - hw[3] |= (mask << NV40_VP_INST_SCA_WRITEMASK_SHIFT); - } - - emit_dst(vpc, hw, slot, dst); - emit_src(vpc, hw, 0, s0); - emit_src(vpc, hw, 1, s1); - emit_src(vpc, hw, 2, s2); -} - -static INLINE struct nv40_sreg -tgsi_src(struct nv40_vpc *vpc, const struct tgsi_full_src_register *fsrc) { - struct nv40_sreg src; - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - src = nv40_sr(NV40SR_INPUT, fsrc->Register.Index); - break; - case TGSI_FILE_CONSTANT: - src = constant(vpc, fsrc->Register.Index, 0, 0, 0, 0); - break; - case TGSI_FILE_IMMEDIATE: - src = vpc->imm[fsrc->Register.Index]; - break; - case TGSI_FILE_TEMPORARY: - src = vpc->r_temp[fsrc->Register.Index]; - break; - default: - NOUVEAU_ERR("bad src file\n"); - break; - } - - src.abs = fsrc->Register.Absolute; - src.negate = fsrc->Register.Negate; - src.swz[0] = fsrc->Register.SwizzleX; - src.swz[1] = fsrc->Register.SwizzleY; - src.swz[2] = fsrc->Register.SwizzleZ; - src.swz[3] = fsrc->Register.SwizzleW; - return src; -} - -static INLINE struct nv40_sreg -tgsi_dst(struct nv40_vpc *vpc, const struct tgsi_full_dst_register *fdst) { - struct nv40_sreg dst; - - switch (fdst->Register.File) { - case TGSI_FILE_OUTPUT: - dst = vpc->r_result[fdst->Register.Index]; - break; - case TGSI_FILE_TEMPORARY: - dst = vpc->r_temp[fdst->Register.Index]; - break; - case TGSI_FILE_ADDRESS: - dst = vpc->r_address[fdst->Register.Index]; - break; - default: - NOUVEAU_ERR("bad dst file\n"); - break; - } - - return dst; -} - -static INLINE int -tgsi_mask(uint tgsi) -{ - int mask = 0; - - if (tgsi & TGSI_WRITEMASK_X) mask |= MASK_X; - if (tgsi & TGSI_WRITEMASK_Y) mask |= MASK_Y; - if (tgsi & TGSI_WRITEMASK_Z) mask |= MASK_Z; - if (tgsi & TGSI_WRITEMASK_W) mask |= MASK_W; - return mask; -} - -static boolean -src_native_swz(struct nv40_vpc *vpc, const struct tgsi_full_src_register *fsrc, - struct nv40_sreg *src) -{ - const struct nv40_sreg none = nv40_sr(NV40SR_NONE, 0); - struct nv40_sreg tgsi = tgsi_src(vpc, fsrc); - uint mask = 0; - uint c; - - for (c = 0; c < 4; c++) { - switch (tgsi_util_get_full_src_register_swizzle(fsrc, c)) { - case TGSI_SWIZZLE_X: - case TGSI_SWIZZLE_Y: - case TGSI_SWIZZLE_Z: - case TGSI_SWIZZLE_W: - mask |= tgsi_mask(1 << c); - break; - default: - assert(0); - } - } - - if (mask == MASK_ALL) - return TRUE; - - *src = temp(vpc); - - if (mask) - arith(vpc, 0, OP_MOV, *src, mask, tgsi, none, none); - - return FALSE; -} - -static boolean -nv40_vertprog_parse_instruction(struct nv40_vpc *vpc, - const struct tgsi_full_instruction *finst) -{ - struct nv40_sreg src[3], dst, tmp; - struct nv40_sreg none = nv40_sr(NV40SR_NONE, 0); - int mask; - int ai = -1, ci = -1, ii = -1; - int i; - - if (finst->Instruction.Opcode == TGSI_OPCODE_END) - return TRUE; - - for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *fsrc; - - fsrc = &finst->Src[i]; - if (fsrc->Register.File == TGSI_FILE_TEMPORARY) { - src[i] = tgsi_src(vpc, fsrc); - } - } - - for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { - const struct tgsi_full_src_register *fsrc; - - fsrc = &finst->Src[i]; - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - case TGSI_FILE_CONSTANT: - case TGSI_FILE_TEMPORARY: - if (!src_native_swz(vpc, fsrc, &src[i])) - continue; - break; - default: - break; - } - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: - if (ai == -1 || ai == fsrc->Register.Index) { - ai = fsrc->Register.Index; - src[i] = tgsi_src(vpc, fsrc); - } else { - src[i] = temp(vpc); - arith(vpc, 0, OP_MOV, src[i], MASK_ALL, - tgsi_src(vpc, fsrc), none, none); - } - break; - case TGSI_FILE_CONSTANT: - if ((ci == -1 && ii == -1) || - ci == fsrc->Register.Index) { - ci = fsrc->Register.Index; - src[i] = tgsi_src(vpc, fsrc); - } else { - src[i] = temp(vpc); - arith(vpc, 0, OP_MOV, src[i], MASK_ALL, - tgsi_src(vpc, fsrc), none, none); - } - break; - case TGSI_FILE_IMMEDIATE: - if ((ci == -1 && ii == -1) || - ii == fsrc->Register.Index) { - ii = fsrc->Register.Index; - src[i] = tgsi_src(vpc, fsrc); - } else { - src[i] = temp(vpc); - arith(vpc, 0, OP_MOV, src[i], MASK_ALL, - tgsi_src(vpc, fsrc), none, none); - } - break; - case TGSI_FILE_TEMPORARY: - /* handled above */ - break; - default: - NOUVEAU_ERR("bad src file\n"); - return FALSE; - } - } - - dst = tgsi_dst(vpc, &finst->Dst[0]); - mask = tgsi_mask(finst->Dst[0].Register.WriteMask); - - switch (finst->Instruction.Opcode) { - case TGSI_OPCODE_ABS: - arith(vpc, 0, OP_MOV, dst, mask, abs(src[0]), none, none); - break; - case TGSI_OPCODE_ADD: - arith(vpc, 0, OP_ADD, dst, mask, src[0], none, src[1]); - break; - case TGSI_OPCODE_ARL: - arith(vpc, 0, OP_ARL, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_DP3: - arith(vpc, 0, OP_DP3, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DP4: - arith(vpc, 0, OP_DP4, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DPH: - arith(vpc, 0, OP_DPH, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_DST: - arith(vpc, 0, OP_DST, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_EX2: - arith(vpc, 1, OP_EX2, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_EXP: - arith(vpc, 1, OP_EXP, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_FLR: - arith(vpc, 0, OP_FLR, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_FRC: - arith(vpc, 0, OP_FRC, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_LG2: - arith(vpc, 1, OP_LG2, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_LIT: - arith(vpc, 1, OP_LIT, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_LOG: - arith(vpc, 1, OP_LOG, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_MAD: - arith(vpc, 0, OP_MAD, dst, mask, src[0], src[1], src[2]); - break; - case TGSI_OPCODE_MAX: - arith(vpc, 0, OP_MAX, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_MIN: - arith(vpc, 0, OP_MIN, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_MOV: - arith(vpc, 0, OP_MOV, dst, mask, src[0], none, none); - break; - case TGSI_OPCODE_MUL: - arith(vpc, 0, OP_MUL, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_POW: - tmp = temp(vpc); - arith(vpc, 1, OP_LG2, tmp, MASK_X, none, none, - swz(src[0], X, X, X, X)); - arith(vpc, 0, OP_MUL, tmp, MASK_X, swz(tmp, X, X, X, X), - swz(src[1], X, X, X, X), none); - arith(vpc, 1, OP_EX2, dst, mask, none, none, - swz(tmp, X, X, X, X)); - break; - case TGSI_OPCODE_RCP: - arith(vpc, 1, OP_RCP, dst, mask, none, none, src[0]); - break; - case TGSI_OPCODE_RET: - break; - case TGSI_OPCODE_RSQ: - arith(vpc, 1, OP_RSQ, dst, mask, none, none, abs(src[0])); - break; - case TGSI_OPCODE_SGE: - arith(vpc, 0, OP_SGE, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SLT: - arith(vpc, 0, OP_SLT, dst, mask, src[0], src[1], none); - break; - case TGSI_OPCODE_SUB: - arith(vpc, 0, OP_ADD, dst, mask, src[0], none, neg(src[1])); - break; - case TGSI_OPCODE_XPD: - tmp = temp(vpc); - arith(vpc, 0, OP_MUL, tmp, mask, - swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none); - arith(vpc, 0, OP_MAD, dst, (mask & ~MASK_W), - swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), - neg(tmp)); - break; - default: - NOUVEAU_ERR("invalid opcode %d\n", finst->Instruction.Opcode); - return FALSE; - } - - release_temps(vpc); - return TRUE; -} - -static boolean -nv40_vertprog_parse_decl_output(struct nv40_vpc *vpc, - const struct tgsi_full_declaration *fdec) -{ - unsigned idx = fdec->Range.First; - int hw; - - switch (fdec->Semantic.Name) { - case TGSI_SEMANTIC_POSITION: - hw = NV40_VP_INST_DEST_POS; - vpc->hpos_idx = idx; - break; - case TGSI_SEMANTIC_COLOR: - if (fdec->Semantic.Index == 0) { - hw = NV40_VP_INST_DEST_COL0; - } else - if (fdec->Semantic.Index == 1) { - hw = NV40_VP_INST_DEST_COL1; - } else { - NOUVEAU_ERR("bad colour semantic index\n"); - return FALSE; - } - break; - case TGSI_SEMANTIC_BCOLOR: - if (fdec->Semantic.Index == 0) { - hw = NV40_VP_INST_DEST_BFC0; - } else - if (fdec->Semantic.Index == 1) { - hw = NV40_VP_INST_DEST_BFC1; - } else { - NOUVEAU_ERR("bad bcolour semantic index\n"); - return FALSE; - } - break; - case TGSI_SEMANTIC_FOG: - hw = NV40_VP_INST_DEST_FOGC; - break; - case TGSI_SEMANTIC_PSIZE: - hw = NV40_VP_INST_DEST_PSZ; - break; - case TGSI_SEMANTIC_GENERIC: - if (fdec->Semantic.Index <= 7) { - hw = NV40_VP_INST_DEST_TC(fdec->Semantic.Index); - } else { - NOUVEAU_ERR("bad generic semantic index\n"); - return FALSE; - } - break; - case TGSI_SEMANTIC_EDGEFLAG: - /* not really an error just a fallback */ - NOUVEAU_ERR("cannot handle edgeflag output\n"); - return FALSE; - default: - NOUVEAU_ERR("bad output semantic\n"); - return FALSE; - } - - vpc->r_result[idx] = nv40_sr(NV40SR_OUTPUT, hw); - return TRUE; -} - -static boolean -nv40_vertprog_prepare(struct nv40_vpc *vpc) -{ - struct tgsi_parse_context p; - int high_temp = -1, high_addr = -1, nr_imm = 0, i; - - tgsi_parse_init(&p, vpc->vp->pipe.tokens); - while (!tgsi_parse_end_of_tokens(&p)) { - const union tgsi_full_token *tok = &p.FullToken; - - tgsi_parse_token(&p); - switch(tok->Token.Type) { - case TGSI_TOKEN_TYPE_IMMEDIATE: - nr_imm++; - break; - case TGSI_TOKEN_TYPE_DECLARATION: - { - const struct tgsi_full_declaration *fdec; - - fdec = &p.FullToken.FullDeclaration; - switch (fdec->Declaration.File) { - case TGSI_FILE_TEMPORARY: - if (fdec->Range.Last > high_temp) { - high_temp = - fdec->Range.Last; - } - break; -#if 0 /* this would be nice.. except gallium doesn't track it */ - case TGSI_FILE_ADDRESS: - if (fdec->Range.Last > high_addr) { - high_addr = - fdec->Range.Last; - } - break; -#endif - case TGSI_FILE_OUTPUT: - if (!nv40_vertprog_parse_decl_output(vpc, fdec)) - return FALSE; - break; - default: - break; - } - } - break; -#if 1 /* yay, parse instructions looking for address regs instead */ - case TGSI_TOKEN_TYPE_INSTRUCTION: - { - const struct tgsi_full_instruction *finst; - const struct tgsi_full_dst_register *fdst; - - finst = &p.FullToken.FullInstruction; - fdst = &finst->Dst[0]; - - if (fdst->Register.File == TGSI_FILE_ADDRESS) { - if (fdst->Register.Index > high_addr) - high_addr = fdst->Register.Index; - } - - } - break; -#endif - default: - break; - } - } - tgsi_parse_free(&p); - - if (nr_imm) { - vpc->imm = CALLOC(nr_imm, sizeof(struct nv40_sreg)); - assert(vpc->imm); - } - - if (++high_temp) { - vpc->r_temp = CALLOC(high_temp, sizeof(struct nv40_sreg)); - for (i = 0; i < high_temp; i++) - vpc->r_temp[i] = temp(vpc); - } - - if (++high_addr) { - vpc->r_address = CALLOC(high_addr, sizeof(struct nv40_sreg)); - for (i = 0; i < high_addr; i++) - vpc->r_address[i] = temp(vpc); - } - - vpc->r_temps_discard = 0; - return TRUE; -} - -static void -nv40_vertprog_translate(struct nv40_context *nv40, - struct nv40_vertex_program *vp) -{ - struct tgsi_parse_context parse; - struct nv40_vpc *vpc = NULL; - struct nv40_sreg none = nv40_sr(NV40SR_NONE, 0); - int i; - - vpc = CALLOC(1, sizeof(struct nv40_vpc)); - if (!vpc) - return; - vpc->vp = vp; - - if (!nv40_vertprog_prepare(vpc)) { - FREE(vpc); - return; - } - - /* Redirect post-transform vertex position to a temp if user clip - * planes are enabled. We need to append code the the vtxprog - * to handle clip planes later. - */ - if (vp->ucp.nr) { - vpc->r_result[vpc->hpos_idx] = temp(vpc); - vpc->r_temps_discard = 0; - } - - tgsi_parse_init(&parse, vp->pipe.tokens); - - while (!tgsi_parse_end_of_tokens(&parse)) { - tgsi_parse_token(&parse); - - switch (parse.FullToken.Token.Type) { - case TGSI_TOKEN_TYPE_IMMEDIATE: - { - const struct tgsi_full_immediate *imm; - - imm = &parse.FullToken.FullImmediate; - assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32); - assert(imm->Immediate.NrTokens == 4 + 1); - vpc->imm[vpc->nr_imm++] = - constant(vpc, -1, - imm->u[0].Float, - imm->u[1].Float, - imm->u[2].Float, - imm->u[3].Float); - } - break; - case TGSI_TOKEN_TYPE_INSTRUCTION: - { - const struct tgsi_full_instruction *finst; - finst = &parse.FullToken.FullInstruction; - if (!nv40_vertprog_parse_instruction(vpc, finst)) - goto out_err; - } - break; - default: - break; - } - } - - /* Write out HPOS if it was redirected to a temp earlier */ - if (vpc->r_result[vpc->hpos_idx].type != NV40SR_OUTPUT) { - struct nv40_sreg hpos = nv40_sr(NV40SR_OUTPUT, - NV40_VP_INST_DEST_POS); - struct nv40_sreg htmp = vpc->r_result[vpc->hpos_idx]; - - arith(vpc, 0, OP_MOV, hpos, MASK_ALL, htmp, none, none); - } - - /* Insert code to handle user clip planes */ - for (i = 0; i < vp->ucp.nr; i++) { - struct nv40_sreg cdst = nv40_sr(NV40SR_OUTPUT, - NV40_VP_INST_DEST_CLIP(i)); - struct nv40_sreg ceqn = constant(vpc, -1, - nv40->clip.ucp[i][0], - nv40->clip.ucp[i][1], - nv40->clip.ucp[i][2], - nv40->clip.ucp[i][3]); - struct nv40_sreg htmp = vpc->r_result[vpc->hpos_idx]; - unsigned mask; - - switch (i) { - case 0: case 3: mask = MASK_Y; break; - case 1: case 4: mask = MASK_Z; break; - case 2: case 5: mask = MASK_W; break; - default: - NOUVEAU_ERR("invalid clip dist #%d\n", i); - goto out_err; - } - - arith(vpc, 0, OP_DP4, cdst, mask, htmp, ceqn, none); - } - - vp->insns[vp->nr_insns - 1].data[3] |= NV40_VP_INST_LAST; - vp->translated = TRUE; -out_err: - tgsi_parse_free(&parse); - if (vpc->r_temp) - FREE(vpc->r_temp); - if (vpc->r_address) - FREE(vpc->r_address); - if (vpc->imm) - FREE(vpc->imm); - FREE(vpc); -} - -static boolean -nv40_vertprog_validate(struct nv40_context *nv40) -{ - struct pipe_screen *pscreen = nv40->pipe.screen; - struct nv40_screen *screen = nv40->screen; - struct nouveau_channel *chan = screen->base.channel; - struct nouveau_grobj *curie = screen->curie; - struct nv40_vertex_program *vp; - struct pipe_buffer *constbuf; - boolean upload_code = FALSE, upload_data = FALSE; - int i; - - if (nv40->render_mode == HW) { - vp = nv40->vertprog; - constbuf = nv40->constbuf[PIPE_SHADER_VERTEX]; - - if ((nv40->dirty & NV40_NEW_UCP) || - memcmp(&nv40->clip, &vp->ucp, sizeof(vp->ucp))) { - nv40_vertprog_destroy(nv40, vp); - memcpy(&vp->ucp, &nv40->clip, sizeof(vp->ucp)); - } - } else { - vp = nv40->swtnl.vertprog; - constbuf = NULL; - } - - /* Translate TGSI shader into hw bytecode */ - if (vp->translated) - goto check_gpu_resources; - - nv40->fallback_swtnl &= ~NV40_NEW_VERTPROG; - nv40_vertprog_translate(nv40, vp); - if (!vp->translated) { - nv40->fallback_swtnl |= NV40_NEW_VERTPROG; - return FALSE; - } - -check_gpu_resources: - /* Allocate hw vtxprog exec slots */ - if (!vp->exec) { - struct nouveau_resource *heap = nv40->screen->vp_exec_heap; - struct nouveau_stateobj *so; - uint vplen = vp->nr_insns; - - if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec)) { - while (heap->next && heap->size < vplen) { - struct nv40_vertex_program *evict; - - evict = heap->next->priv; - nouveau_resource_free(&evict->exec); - } - - if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec)) - assert(0); - } - - so = so_new(3, 4, 0); - so_method(so, curie, NV40TCL_VP_START_FROM_ID, 1); - so_data (so, vp->exec->start); - so_method(so, curie, NV40TCL_VP_ATTRIB_EN, 2); - so_data (so, vp->ir); - so_data (so, vp->or); - so_method(so, curie, NV40TCL_CLIP_PLANE_ENABLE, 1); - so_data (so, vp->clip_ctrl); - so_ref(so, &vp->so); - so_ref(NULL, &so); - - upload_code = TRUE; - } - - /* Allocate hw vtxprog const slots */ - if (vp->nr_consts && !vp->data) { - struct nouveau_resource *heap = nv40->screen->vp_data_heap; - - if (nouveau_resource_alloc(heap, vp->nr_consts, vp, &vp->data)) { - while (heap->next && heap->size < vp->nr_consts) { - struct nv40_vertex_program *evict; - - evict = heap->next->priv; - nouveau_resource_free(&evict->data); - } - - if (nouveau_resource_alloc(heap, vp->nr_consts, vp, &vp->data)) - assert(0); - } - - /*XXX: handle this some day */ - assert(vp->data->start >= vp->data_start_min); - - upload_data = TRUE; - if (vp->data_start != vp->data->start) - upload_code = TRUE; - } - - /* If exec or data segments moved we need to patch the program to - * fixup offsets and register IDs. - */ - if (vp->exec_start != vp->exec->start) { - for (i = 0; i < vp->nr_insns; i++) { - struct nv40_vertex_program_exec *vpi = &vp->insns[i]; - - if (vpi->has_branch_offset) { - assert(0); - } - } - - vp->exec_start = vp->exec->start; - } - - if (vp->nr_consts && vp->data_start != vp->data->start) { - for (i = 0; i < vp->nr_insns; i++) { - struct nv40_vertex_program_exec *vpi = &vp->insns[i]; - - if (vpi->const_index >= 0) { - vpi->data[1] &= ~NV40_VP_INST_CONST_SRC_MASK; - vpi->data[1] |= - (vpi->const_index + vp->data->start) << - NV40_VP_INST_CONST_SRC_SHIFT; - - } - } - - vp->data_start = vp->data->start; - } - - /* Update + Upload constant values */ - if (vp->nr_consts) { - float *map = NULL; - - if (constbuf) { - map = pipe_buffer_map(pscreen, constbuf, - PIPE_BUFFER_USAGE_CPU_READ); - } - - for (i = 0; i < vp->nr_consts; i++) { - struct nv40_vertex_program_data *vpd = &vp->consts[i]; - - if (vpd->index >= 0) { - if (!upload_data && - !memcmp(vpd->value, &map[vpd->index * 4], - 4 * sizeof(float))) - continue; - memcpy(vpd->value, &map[vpd->index * 4], - 4 * sizeof(float)); - } - - BEGIN_RING(chan, curie, NV40TCL_VP_UPLOAD_CONST_ID, 5); - OUT_RING (chan, i + vp->data->start); - OUT_RINGp (chan, (uint32_t *)vpd->value, 4); - } - - if (constbuf) - pscreen->buffer_unmap(pscreen, constbuf); - } - - /* Upload vtxprog */ - if (upload_code) { -#if 0 - for (i = 0; i < vp->nr_insns; i++) { - NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[0]); - NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[1]); - NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[2]); - NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[3]); - } -#endif - BEGIN_RING(chan, curie, NV40TCL_VP_UPLOAD_FROM_ID, 1); - OUT_RING (chan, vp->exec->start); - for (i = 0; i < vp->nr_insns; i++) { - BEGIN_RING(chan, curie, NV40TCL_VP_UPLOAD_INST(0), 4); - OUT_RINGp (chan, vp->insns[i].data, 4); - } - } - - if (vp->so != nv40->state.hw[NV40_STATE_VERTPROG]) { - so_ref(vp->so, &nv40->state.hw[NV40_STATE_VERTPROG]); - return TRUE; - } - - return FALSE; -} - -void -nv40_vertprog_destroy(struct nv40_context *nv40, struct nv40_vertex_program *vp) -{ - vp->translated = FALSE; - - if (vp->nr_insns) { - FREE(vp->insns); - vp->insns = NULL; - vp->nr_insns = 0; - } - - if (vp->nr_consts) { - FREE(vp->consts); - vp->consts = NULL; - vp->nr_consts = 0; - } - - nouveau_resource_free(&vp->exec); - vp->exec_start = 0; - nouveau_resource_free(&vp->data); - vp->data_start = 0; - vp->data_start_min = 0; - - vp->ir = vp->or = vp->clip_ctrl = 0; - so_ref(NULL, &vp->so); -} - -struct nv40_state_entry nv40_state_vertprog = { - .validate = nv40_vertprog_validate, - .dirty = { - .pipe = NV40_NEW_VERTPROG | NV40_NEW_UCP, - .hw = NV40_STATE_VERTPROG, - } -}; - diff --git a/src/gallium/drivers/nv50/Makefile b/src/gallium/drivers/nv50/Makefile index 612aea28a34..e31e6f8662a 100644 --- a/src/gallium/drivers/nv50/Makefile +++ b/src/gallium/drivers/nv50/Makefile @@ -4,18 +4,21 @@ include $(TOP)/configs/current LIBNAME = nv50 C_SOURCES = \ + nv50_buffer.c \ nv50_clear.c \ nv50_context.c \ nv50_draw.c \ nv50_miptree.c \ nv50_query.c \ nv50_program.c \ + nv50_resource.c \ nv50_screen.c \ nv50_state.c \ nv50_state_validate.c \ nv50_surface.c \ nv50_tex.c \ nv50_transfer.c \ - nv50_vbo.c + nv50_vbo.c \ + nv50_push.c include ../../Makefile.template diff --git a/src/gallium/drivers/nv50/SConscript b/src/gallium/drivers/nv50/SConscript new file mode 100644 index 00000000000..8625f926221 --- /dev/null +++ b/src/gallium/drivers/nv50/SConscript @@ -0,0 +1,26 @@ +Import('*') + +env = env.Clone() + +nv50 = env.ConvenienceLibrary( + target = 'nv50', + source = [ + 'nv50_buffer.c', + 'nv50_clear.c', + 'nv50_context.c', + 'nv50_draw.c', + 'nv50_miptree.c', + 'nv50_query.c', + 'nv50_program.c', + 'nv50_resource.c', + 'nv50_screen.c', + 'nv50_state.c', + 'nv50_state_validate.c', + 'nv50_surface.c', + 'nv50_tex.c', + 'nv50_transfer.c', + 'nv50_vbo.c', + 'nv50_push.c', + ]) + +Export('nv50') diff --git a/src/gallium/drivers/nv50/nv50_buffer.c b/src/gallium/drivers/nv50/nv50_buffer.c new file mode 100644 index 00000000000..dacfee9799c --- /dev/null +++ b/src/gallium/drivers/nv50/nv50_buffer.c @@ -0,0 +1,150 @@ + +#include "util/u_inlines.h" +#include "util/u_memory.h" +#include "util/u_math.h" + +#include "nouveau/nouveau_screen.h" +#include "nouveau/nouveau_winsys.h" +#include "nv50_resource.h" + + + +static void nv50_buffer_destroy(struct pipe_screen *pscreen, + struct pipe_resource *presource) +{ + struct nv50_resource *buffer = nv50_resource(presource); + + nouveau_screen_bo_release(pscreen, buffer->bo); + FREE(buffer); +} + + + + +/* Utility functions for transfer create/destroy are hooked in and + * just record the arguments to those functions. + */ +static void * +nv50_buffer_transfer_map( struct pipe_context *pipe, + struct pipe_transfer *transfer ) +{ + struct nv50_resource *buffer = nv50_resource(transfer->resource); + uint8_t *map; + + map = nouveau_screen_bo_map_range( pipe->screen, + buffer->bo, + transfer->box.x, + transfer->box.width, + nouveau_screen_transfer_flags(transfer->usage) ); + if (map == NULL) + return NULL; + + return map + transfer->box.x; +} + + + +static void nv50_buffer_transfer_flush_region( struct pipe_context *pipe, + struct pipe_transfer *transfer, + const struct pipe_box *box) +{ + struct nv50_resource *buffer = nv50_resource(transfer->resource); + + nouveau_screen_bo_map_flush_range(pipe->screen, + buffer->bo, + transfer->box.x + box->x, + box->width); +} + +static void nv50_buffer_transfer_unmap( struct pipe_context *pipe, + struct pipe_transfer *transfer ) +{ + struct nv50_resource *buffer = nv50_resource(transfer->resource); + + nouveau_screen_bo_unmap(pipe->screen, buffer->bo); +} + + + + +const struct u_resource_vtbl nv50_buffer_vtbl = +{ + u_default_resource_get_handle, /* get_handle */ + nv50_buffer_destroy, /* resource_destroy */ + NULL, /* is_resource_referenced */ + u_default_get_transfer, /* get_transfer */ + u_default_transfer_destroy, /* transfer_destroy */ + nv50_buffer_transfer_map, /* transfer_map */ + nv50_buffer_transfer_flush_region, /* transfer_flush_region */ + nv50_buffer_transfer_unmap, /* transfer_unmap */ + u_default_transfer_inline_write /* transfer_inline_write */ +}; + + + + +struct pipe_resource * +nv50_buffer_create(struct pipe_screen *pscreen, + const struct pipe_resource *template) +{ + struct nv50_resource *buffer; + + buffer = CALLOC_STRUCT(nv50_resource); + if (!buffer) + return NULL; + + buffer->base = *template; + buffer->vtbl = &nv50_buffer_vtbl; + pipe_reference_init(&buffer->base.reference, 1); + buffer->base.screen = pscreen; + + buffer->bo = nouveau_screen_bo_new(pscreen, + 16, + buffer->base.usage, + buffer->base.bind, + buffer->base.width0); + + if (buffer->bo == NULL) + goto fail; + + return &buffer->base; + +fail: + FREE(buffer); + return NULL; +} + + +struct pipe_resource * +nv50_user_buffer_create(struct pipe_screen *pscreen, + void *ptr, + unsigned bytes, + unsigned bind) +{ + struct nv50_resource *buffer; + + buffer = CALLOC_STRUCT(nv50_resource); + if (!buffer) + return NULL; + + pipe_reference_init(&buffer->base.reference, 1); + buffer->vtbl = &nv50_buffer_vtbl; + buffer->base.screen = pscreen; + buffer->base.format = PIPE_FORMAT_R8_UNORM; + buffer->base.usage = PIPE_USAGE_IMMUTABLE; + buffer->base.bind = bind; + buffer->base.width0 = bytes; + buffer->base.height0 = 1; + buffer->base.depth0 = 1; + + buffer->bo = nouveau_screen_bo_user(pscreen, ptr, bytes); + if (!buffer->bo) + goto fail; + + return &buffer->base; + +fail: + FREE(buffer); + return NULL; +} + diff --git a/src/gallium/drivers/nv50/nv50_clear.c b/src/gallium/drivers/nv50/nv50_clear.c index e0b2d2880b0..5447904e9ca 100644 --- a/src/gallium/drivers/nv50/nv50_clear.c +++ b/src/gallium/drivers/nv50/nv50_clear.c @@ -35,8 +35,11 @@ nv50_clear(struct pipe_context *pipe, unsigned buffers, struct nouveau_grobj *tesla = nv50->screen->tesla; struct pipe_framebuffer_state *fb = &nv50->framebuffer; unsigned mode = 0, i; + const unsigned dirty = nv50->dirty; - if (!nv50_state_validate(nv50)) + /* don't need NEW_BLEND, NV50TCL_COLOR_MASK doesn't affect CLEAR_BUFFERS */ + nv50->dirty &= NV50_NEW_FRAMEBUFFER | NV50_NEW_SCISSOR; + if (!nv50_state_validate(nv50, 64)) return; if (buffers & PIPE_CLEAR_COLOR && fb->nr_cbufs) { @@ -64,5 +67,6 @@ nv50_clear(struct pipe_context *pipe, unsigned buffers, BEGIN_RING(chan, tesla, NV50TCL_CLEAR_BUFFERS, 1); OUT_RING (chan, (i << 6) | 0x3c); } + nv50->dirty = dirty; } diff --git a/src/gallium/drivers/nv50/nv50_context.c b/src/gallium/drivers/nv50/nv50_context.c index 7be12fcdef4..915a9254025 100644 --- a/src/gallium/drivers/nv50/nv50_context.c +++ b/src/gallium/drivers/nv50/nv50_context.c @@ -25,6 +25,7 @@ #include "nv50_context.h" #include "nv50_screen.h" +#include "nv50_resource.h" static void nv50_flush(struct pipe_context *pipe, unsigned flags, @@ -46,43 +47,13 @@ static void nv50_destroy(struct pipe_context *pipe) { struct nv50_context *nv50 = nv50_context(pipe); + int i; - if (nv50->state.fb) - so_ref(NULL, &nv50->state.fb); - if (nv50->state.blend) - so_ref(NULL, &nv50->state.blend); - if (nv50->state.blend_colour) - so_ref(NULL, &nv50->state.blend_colour); - if (nv50->state.zsa) - so_ref(NULL, &nv50->state.zsa); - if (nv50->state.rast) - so_ref(NULL, &nv50->state.rast); - if (nv50->state.stipple) - so_ref(NULL, &nv50->state.stipple); - if (nv50->state.scissor) - so_ref(NULL, &nv50->state.scissor); - if (nv50->state.viewport) - so_ref(NULL, &nv50->state.viewport); - if (nv50->state.tsc_upload) - so_ref(NULL, &nv50->state.tsc_upload); - if (nv50->state.tic_upload) - so_ref(NULL, &nv50->state.tic_upload); - if (nv50->state.vertprog) - so_ref(NULL, &nv50->state.vertprog); - if (nv50->state.fragprog) - so_ref(NULL, &nv50->state.fragprog); - if (nv50->state.geomprog) - so_ref(NULL, &nv50->state.geomprog); - if (nv50->state.fp_linkage) - so_ref(NULL, &nv50->state.fp_linkage); - if (nv50->state.gp_linkage) - so_ref(NULL, &nv50->state.gp_linkage); - if (nv50->state.vtxfmt) - so_ref(NULL, &nv50->state.vtxfmt); - if (nv50->state.vtxbuf) - so_ref(NULL, &nv50->state.vtxbuf); - if (nv50->state.vtxattr) - so_ref(NULL, &nv50->state.vtxattr); + for (i = 0; i < 64; i++) { + if (!nv50->state.hw[i]) + continue; + so_ref(NULL, &nv50->state.hw[i]); + } draw_destroy(nv50->draw); @@ -119,17 +90,14 @@ nv50_create(struct pipe_screen *pscreen, void *priv) nv50->pipe.flush = nv50_flush; - nv50->pipe.is_texture_referenced = nouveau_is_texture_referenced; - nv50->pipe.is_buffer_referenced = nouveau_is_buffer_referenced; - screen->base.channel->user_private = nv50; - screen->base.channel->flush_notify = nv50_state_flush_notify; nv50_init_surface_functions(nv50); nv50_init_state_functions(nv50); nv50_init_query_functions(nv50); + nv50_init_resource_functions(&nv50->pipe); - nv50->draw = draw_create(); + nv50->draw = draw_create(&nv50->pipe); assert(nv50->draw); draw_set_rasterize_stage(nv50->draw, nv50_draw_render_stage(nv50)); diff --git a/src/gallium/drivers/nv50/nv50_context.h b/src/gallium/drivers/nv50/nv50_context.h index c540594b949..61807dd999b 100644 --- a/src/gallium/drivers/nv50/nv50_context.h +++ b/src/gallium/drivers/nv50/nv50_context.h @@ -16,7 +16,6 @@ #include "nouveau/nouveau_winsys.h" #include "nouveau/nouveau_gldefs.h" #include "nouveau/nouveau_stateobj.h" -#include "nouveau/nouveau_context.h" #include "nv50_screen.h" #include "nv50_program.h" @@ -72,6 +71,23 @@ struct nv50_sampler_stateobj { unsigned tsc[8]; }; +struct nv50_sampler_view { + struct pipe_sampler_view pipe; + uint32_t tic[8]; +}; + +struct nv50_vtxelt_stateobj { + struct pipe_vertex_element pipe[16]; + unsigned num_elements; + uint32_t hw[16]; +}; + +static INLINE struct nv50_sampler_view * +nv50_sampler_view(struct pipe_sampler_view *view) +{ + return (struct nv50_sampler_view *)view; +} + static INLINE unsigned get_tile_height(uint32_t tile_mode) { @@ -84,25 +100,6 @@ get_tile_depth(uint32_t tile_mode) return 1 << (tile_mode >> 4); } -struct nv50_miptree_level { - int *image_offset; - unsigned pitch; - unsigned tile_mode; -}; - -struct nv50_miptree { - struct nouveau_miptree base; - - struct nv50_miptree_level level[PIPE_MAX_TEXTURE_LEVELS]; - int image_nr; - int total_size; -}; - -static INLINE struct nv50_miptree * -nv50_miptree(struct pipe_texture *pt) -{ - return (struct nv50_miptree *)pt; -} struct nv50_surface { struct pipe_surface base; @@ -115,30 +112,12 @@ nv50_surface(struct pipe_surface *pt) } struct nv50_state { - unsigned dirty; + struct nouveau_stateobj *hw[64]; + uint64_t hw_dirty; - struct nouveau_stateobj *fb; - struct nouveau_stateobj *blend; - struct nouveau_stateobj *blend_colour; - struct nouveau_stateobj *zsa; - struct nouveau_stateobj *stencil_ref; - struct nouveau_stateobj *rast; - struct nouveau_stateobj *stipple; - struct nouveau_stateobj *scissor; - unsigned scissor_enabled; - struct nouveau_stateobj *viewport; - struct nouveau_stateobj *tsc_upload; - struct nouveau_stateobj *tic_upload; - unsigned miptree_nr[PIPE_SHADER_TYPES]; - struct nouveau_stateobj *vertprog; - struct nouveau_stateobj *fragprog; - struct nouveau_stateobj *geomprog; - struct nouveau_stateobj *fp_linkage; - struct nouveau_stateobj *gp_linkage; - struct nouveau_stateobj *vtxfmt; + unsigned sampler_view_nr[3]; struct nouveau_stateobj *vtxbuf; struct nouveau_stateobj *vtxattr; - struct nouveau_stateobj *instbuf; unsigned vtxelt_nr; }; @@ -164,17 +143,16 @@ struct nv50_context { struct nv50_program *vertprog; struct nv50_program *fragprog; struct nv50_program *geomprog; - struct pipe_buffer *constbuf[PIPE_SHADER_TYPES]; + struct pipe_resource *constbuf[PIPE_SHADER_TYPES]; struct pipe_vertex_buffer vtxbuf[PIPE_MAX_ATTRIBS]; unsigned vtxbuf_nr; - struct pipe_vertex_element vtxelt[PIPE_MAX_ATTRIBS]; - unsigned vtxelt_nr; - struct nv50_sampler_stateobj *sampler[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; - unsigned sampler_nr[PIPE_SHADER_TYPES]; - struct nv50_miptree *miptree[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; - unsigned miptree_nr[PIPE_SHADER_TYPES]; + struct nv50_vtxelt_stateobj *vtxelt; + struct nv50_sampler_stateobj *sampler[3][PIPE_MAX_SAMPLERS]; + unsigned sampler_nr[3]; + struct pipe_sampler_view *sampler_views[3][PIPE_MAX_SAMPLERS]; + unsigned sampler_view_nr[3]; - uint16_t vbo_fifo; + unsigned vbo_fifo; }; static INLINE struct nv50_context * @@ -186,6 +164,7 @@ nv50_context(struct pipe_context *pipe) extern void nv50_init_surface_functions(struct nv50_context *nv50); extern void nv50_init_state_functions(struct nv50_context *nv50); extern void nv50_init_query_functions(struct nv50_context *nv50); +extern void nv50_init_transfer_functions(struct nv50_context *nv50); extern void nv50_screen_init_miptree_functions(struct pipe_screen *pscreen); @@ -205,35 +184,48 @@ extern void nv50_draw_arrays_instanced(struct pipe_context *, unsigned mode, unsigned startInstance, unsigned instanceCount); extern void nv50_draw_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, - unsigned indexSize, + struct pipe_resource *indexBuffer, + unsigned indexSize, int indexBias, unsigned mode, unsigned start, unsigned count); extern void nv50_draw_elements_instanced(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, - unsigned indexSize, + struct pipe_resource *indexBuffer, + unsigned indexSize, int indexBias, unsigned mode, unsigned start, unsigned count, unsigned startInstance, unsigned instanceCount); -extern void nv50_vbo_validate(struct nv50_context *nv50); +extern void nv50_vtxelt_construct(struct nv50_vtxelt_stateobj *cso); +extern struct nouveau_stateobj *nv50_vbo_validate(struct nv50_context *nv50); + +/* nv50_push.c */ +extern void +nv50_push_elements_instanced(struct pipe_context *, struct pipe_resource *, + unsigned idxsize, int idxbias, + unsigned mode, unsigned start, + unsigned count, unsigned i_start, + unsigned i_count); /* nv50_clear.c */ extern void nv50_clear(struct pipe_context *pipe, unsigned buffers, const float *rgba, double depth, unsigned stencil); /* nv50_program.c */ -extern void nv50_vertprog_validate(struct nv50_context *nv50); -extern void nv50_fragprog_validate(struct nv50_context *nv50); -extern void nv50_geomprog_validate(struct nv50_context *nv50); -extern void nv50_fp_linkage_validate(struct nv50_context *nv50); -extern void nv50_gp_linkage_validate(struct nv50_context *nv50); +extern struct nouveau_stateobj * +nv50_vertprog_validate(struct nv50_context *nv50); +extern struct nouveau_stateobj * +nv50_fragprog_validate(struct nv50_context *nv50); +extern struct nouveau_stateobj * +nv50_geomprog_validate(struct nv50_context *nv50); +extern struct nouveau_stateobj * +nv50_fp_linkage_validate(struct nv50_context *nv50); +extern struct nouveau_stateobj * +nv50_gp_linkage_validate(struct nv50_context *nv50); extern void nv50_program_destroy(struct nv50_context *nv50, struct nv50_program *p); /* nv50_state_validate.c */ -extern boolean nv50_state_validate(struct nv50_context *nv50); -extern void nv50_state_flush_notify(struct nouveau_channel *chan); +extern boolean nv50_state_validate(struct nv50_context *nv50, unsigned dwords); extern void nv50_so_init_sifc(struct nv50_context *nv50, struct nouveau_stateobj *so, @@ -241,18 +233,44 @@ extern void nv50_so_init_sifc(struct nv50_context *nv50, unsigned offset, unsigned size); /* nv50_tex.c */ -extern void nv50_tex_validate(struct nv50_context *); +extern boolean nv50_tex_construct(struct nv50_sampler_view *view); +extern void nv50_tex_relocs(struct nv50_context *); +extern struct nouveau_stateobj *nv50_tex_validate(struct nv50_context *); -/* nv50_transfer.c */ -extern void -nv50_upload_sifc(struct nv50_context *nv50, - struct nouveau_bo *bo, unsigned dst_offset, unsigned reloc, - unsigned dst_format, int dst_w, int dst_h, int dst_pitch, - void *src, unsigned src_format, int src_pitch, - int x, int y, int w, int h, int cpp); /* nv50_context.c */ struct pipe_context * nv50_create(struct pipe_screen *pscreen, void *priv); +static INLINE unsigned +nv50_prim(unsigned mode) +{ + switch (mode) { + case PIPE_PRIM_POINTS: return NV50TCL_VERTEX_BEGIN_POINTS; + case PIPE_PRIM_LINES: return NV50TCL_VERTEX_BEGIN_LINES; + case PIPE_PRIM_LINE_LOOP: return NV50TCL_VERTEX_BEGIN_LINE_LOOP; + case PIPE_PRIM_LINE_STRIP: return NV50TCL_VERTEX_BEGIN_LINE_STRIP; + case PIPE_PRIM_TRIANGLES: return NV50TCL_VERTEX_BEGIN_TRIANGLES; + case PIPE_PRIM_TRIANGLE_STRIP: + return NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP; + case PIPE_PRIM_TRIANGLE_FAN: return NV50TCL_VERTEX_BEGIN_TRIANGLE_FAN; + case PIPE_PRIM_QUADS: return NV50TCL_VERTEX_BEGIN_QUADS; + case PIPE_PRIM_QUAD_STRIP: return NV50TCL_VERTEX_BEGIN_QUAD_STRIP; + case PIPE_PRIM_POLYGON: return NV50TCL_VERTEX_BEGIN_POLYGON; + case PIPE_PRIM_LINES_ADJACENCY: + return NV50TCL_VERTEX_BEGIN_LINES_ADJACENCY; + case PIPE_PRIM_LINE_STRIP_ADJACENCY: + return NV50TCL_VERTEX_BEGIN_LINE_STRIP_ADJACENCY; + case PIPE_PRIM_TRIANGLES_ADJACENCY: + return NV50TCL_VERTEX_BEGIN_TRIANGLES_ADJACENCY; + case PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY: + return NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP_ADJACENCY; + default: + break; + } + + NOUVEAU_ERR("invalid primitive type %d\n", mode); + return NV50TCL_VERTEX_BEGIN_POINTS; +} + #endif diff --git a/src/gallium/drivers/nv50/nv50_miptree.c b/src/gallium/drivers/nv50/nv50_miptree.c index 3f9d869d7a4..b7cd92158fe 100644 --- a/src/gallium/drivers/nv50/nv50_miptree.c +++ b/src/gallium/drivers/nv50/nv50_miptree.c @@ -26,6 +26,8 @@ #include "util/u_format.h" #include "nv50_context.h" +#include "nv50_resource.h" +#include "nv50_transfer.h" /* The restrictions in tile mode selection probably aren't necessary. */ static INLINE uint32_t @@ -70,18 +72,76 @@ get_zslice_offset(unsigned tile_mode, unsigned z, unsigned pitch, unsigned nb_h) return (z % tile_d) * pitch_2d + (z / tile_d) * pitch_3d; } -static struct pipe_texture * -nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *tmp) + + + +static void +nv50_miptree_destroy(struct pipe_screen *pscreen, + struct pipe_resource *pt) +{ + struct nv50_miptree *mt = nv50_miptree(pt); + unsigned l; + + for (l = 0; l <= pt->last_level; ++l) + FREE(mt->level[l].image_offset); + + nouveau_screen_bo_release(pscreen, mt->base.bo); + FREE(mt); +} + +static boolean +nv50_miptree_get_handle(struct pipe_screen *pscreen, + struct pipe_resource *pt, + struct winsys_handle *whandle) +{ + struct nv50_miptree *mt = nv50_miptree(pt); + unsigned stride; + + + if (!mt || !mt->base.bo) + return FALSE; + + stride = util_format_get_stride(mt->base.base.format, + mt->base.base.width0); + + return nouveau_screen_bo_get_handle(pscreen, + mt->base.bo, + stride, + whandle); +} + + +const struct u_resource_vtbl nv50_miptree_vtbl = +{ + nv50_miptree_get_handle, /* get_handle */ + nv50_miptree_destroy, /* resource_destroy */ + NULL, /* is_resource_referenced */ + nv50_miptree_transfer_new, /* get_transfer */ + nv50_miptree_transfer_del, /* transfer_destroy */ + nv50_miptree_transfer_map, /* transfer_map */ + u_default_transfer_flush_region, /* transfer_flush_region */ + nv50_miptree_transfer_unmap, /* transfer_unmap */ + u_default_transfer_inline_write /* transfer_inline_write */ +}; + + + +struct pipe_resource * +nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_resource *tmp) { struct nouveau_device *dev = nouveau_screen(pscreen)->device; struct nv50_miptree *mt = CALLOC_STRUCT(nv50_miptree); - struct pipe_texture *pt = &mt->base.base; + struct pipe_resource *pt = &mt->base.base; unsigned width = tmp->width0, height = tmp->height0; unsigned depth = tmp->depth0, image_alignment; uint32_t tile_flags; int ret, i, l; + if (!mt) + return NULL; + *pt = *tmp; + mt->base.vtbl = &nv50_miptree_vtbl; pipe_reference_init(&pt->reference, 1); pt->screen = pscreen; @@ -89,14 +149,14 @@ nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *tmp) case PIPE_FORMAT_Z32_FLOAT: tile_flags = 0x4800; break; - case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: tile_flags = 0x1800; break; case PIPE_FORMAT_Z16_UNORM: tile_flags = 0x6c00; break; case PIPE_FORMAT_Z24X8_UNORM: - case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: tile_flags = 0x2800; break; case PIPE_FORMAT_R32G32B32A32_FLOAT: @@ -104,7 +164,7 @@ nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *tmp) tile_flags = 0x7400; break; default: - if ((pt->tex_usage & PIPE_TEXTURE_USAGE_PRIMARY) && + if ((pt->bind & PIPE_BIND_SCANOUT) && util_format_get_blocksizebits(pt->format) == 32) tile_flags = 0x7a00; else @@ -165,49 +225,54 @@ nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *tmp) return pt; } -static struct pipe_texture * -nv50_miptree_blanket(struct pipe_screen *pscreen, const struct pipe_texture *pt, - const unsigned *stride, struct pipe_buffer *pb) + +struct pipe_resource * +nv50_miptree_from_handle(struct pipe_screen *pscreen, + const struct pipe_resource *template, + struct winsys_handle *whandle) { - struct nouveau_bo *bo = nouveau_bo(pb); struct nv50_miptree *mt; + unsigned stride; /* Only supports 2D, non-mipmapped textures for the moment */ - if (pt->target != PIPE_TEXTURE_2D || pt->last_level != 0 || - pt->depth0 != 1) + if (template->target != PIPE_TEXTURE_2D || + template->last_level != 0 || + template->depth0 != 1) return NULL; mt = CALLOC_STRUCT(nv50_miptree); if (!mt) return NULL; - mt->base.base = *pt; + mt->base.bo = nouveau_screen_bo_from_handle(pscreen, whandle, &stride); + if (mt->base.bo == NULL) { + FREE(mt); + return NULL; + } + + + mt->base.base = *template; + mt->base.vtbl = &nv50_miptree_vtbl; pipe_reference_init(&mt->base.base.reference, 1); mt->base.base.screen = pscreen; mt->image_nr = 1; - mt->level[0].pitch = *stride; + mt->level[0].pitch = stride; mt->level[0].image_offset = CALLOC(1, sizeof(unsigned)); - mt->level[0].tile_mode = bo->tile_mode; + mt->level[0].tile_mode = mt->base.bo->tile_mode; - nouveau_bo_ref(bo, &mt->base.bo); + /* XXX: Need to adjust bo refcount?? + */ + /* nouveau_bo_ref(bo, &mt->base.bo); */ return &mt->base.base; } -static void -nv50_miptree_destroy(struct pipe_texture *pt) -{ - struct nv50_miptree *mt = nv50_miptree(pt); - unsigned l; - for (l = 0; l <= pt->last_level; ++l) - FREE(mt->level[l].image_offset); - nouveau_bo_ref(NULL, &mt->base.bo); - FREE(mt); -} +/* Surface functions + */ -static struct pipe_surface * -nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, +struct pipe_surface * +nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_resource *pt, unsigned face, unsigned level, unsigned zslice, unsigned flags) { @@ -222,7 +287,7 @@ nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, ps = CALLOC_STRUCT(pipe_surface); if (!ps) return NULL; - pipe_texture_reference(&ps->texture, pt); + pipe_resource_reference(&ps->texture, pt); ps->format = pt->format; ps->width = u_minify(pt->width0, level); ps->height = u_minify(pt->height0, level); @@ -242,22 +307,11 @@ nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_texture *pt, return ps; } -static void +void nv50_miptree_surface_del(struct pipe_surface *ps) { struct nv50_surface *s = nv50_surface(ps); - pipe_texture_reference(&ps->texture, NULL); + pipe_resource_reference(&ps->texture, NULL); FREE(s); } - -void -nv50_screen_init_miptree_functions(struct pipe_screen *pscreen) -{ - pscreen->texture_create = nv50_miptree_create; - pscreen->texture_blanket = nv50_miptree_blanket; - pscreen->texture_destroy = nv50_miptree_destroy; - pscreen->get_tex_surface = nv50_miptree_surface_new; - pscreen->tex_surface_destroy = nv50_miptree_surface_del; -} - diff --git a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c index 2372cbbef69..b8b6b12120b 100644 --- a/src/gallium/drivers/nv50/nv50_program.c +++ b/src/gallium/drivers/nv50/nv50_program.c @@ -30,6 +30,7 @@ #include "tgsi/tgsi_util.h" #include "nv50_context.h" +#include "nv50_transfer.h" #define NV50_SU_MAX_TEMP 127 #define NV50_SU_MAX_ADDR 4 @@ -599,8 +600,8 @@ static void emit_interp(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *iv, unsigned mode) { - assert(dst->rhw != -1); struct nv50_program_exec *e = exec(pc); + assert(dst->rhw != -1); e->inst[0] |= 0x80000000; set_dst(pc, dst, e); @@ -1614,7 +1615,7 @@ emit_lit(struct nv50_pc *pc, struct nv50_reg **dst, unsigned mask, struct nv50_reg *zero = alloc_immd(pc, 0.0); struct nv50_reg *neg128 = alloc_immd(pc, -127.999999); struct nv50_reg *pos128 = alloc_immd(pc, 127.999999); - struct nv50_reg *tmp[4]; + struct nv50_reg *tmp[4] = { 0 }; boolean allow32 = pc->allow32; pc->allow32 = FALSE; @@ -2552,7 +2553,7 @@ nv50_program_tx_insn(struct nv50_pc *pc, const struct tgsi_full_instruction *inst) { struct nv50_reg *rdst[4], *dst[4], *brdc, *src[3][4], *temp; - unsigned mask, sat, unit; + unsigned mask, sat, unit = 0; int i, c; mask = inst->Dst[0].Register.WriteMask; @@ -3530,7 +3531,7 @@ nv50_program_tx_prep(struct nv50_pc *pc) struct tgsi_parse_context tp; struct nv50_program *p = pc->p; boolean ret = FALSE; - unsigned i, c, instance_id, vertex_id, flat_nr = 0; + unsigned i, c, instance_id = 0, vertex_id = 0, flat_nr = 0; tgsi_parse_init(&tp, pc->p->pipe.tokens); while (!tgsi_parse_end_of_tokens(&tp)) { @@ -3728,7 +3729,7 @@ nv50_program_tx_prep(struct nv50_pc *pc) copy_semantic_info(p); } else if (p->type == PIPE_SHADER_FRAGMENT) { - int rid, aid; + int rid = 0, aid; unsigned n = 0, m = pc->attr_nr - flat_nr; pc->allow32 = TRUE; @@ -3762,7 +3763,7 @@ nv50_program_tx_prep(struct nv50_pc *pc) p->cfg.in[n].hw = rid = aid; i = p->cfg.in[n].id; - if (p->info.input_semantic_name[n] == + if (p->info.input_semantic_name[i] == TGSI_SEMANTIC_FACE) { load_frontfacing(pc, &pc->attr[i * 4]); continue; @@ -3821,7 +3822,7 @@ nv50_program_tx_prep(struct nv50_pc *pc) for (rid = 0; i < pc->result_nr * 4; i++) pc->result[i].rhw = rid++; if (p->info.writes_z) - pc->result[2].rhw = rid; + pc->result[2].rhw = rid++; p->cfg.high_result = rid; @@ -4157,7 +4158,8 @@ nv50_program_upload_data(struct nv50_context *nv50, uint32_t *map, static void nv50_program_validate_data(struct nv50_context *nv50, struct nv50_program *p) { - struct pipe_screen *pscreen = nv50->pipe.screen; + struct pipe_context *pipe = &nv50->pipe; + struct pipe_transfer *transfer; if (!p->data[0] && p->immd_nr) { struct nouveau_resource *heap = nv50->screen->immd_heap[0]; @@ -4182,9 +4184,10 @@ nv50_program_validate_data(struct nv50_context *nv50, struct nv50_program *p) if (p->param_nr) { unsigned cb; - uint32_t *map = pipe_buffer_map(pscreen, + uint32_t *map = pipe_buffer_map(pipe, nv50->constbuf[p->type], - PIPE_BUFFER_USAGE_CPU_READ); + PIPE_TRANSFER_READ, + &transfer); switch (p->type) { case PIPE_SHADER_GEOMETRY: cb = NV50_CB_PGP; break; case PIPE_SHADER_FRAGMENT: cb = NV50_CB_PFP; break; @@ -4195,7 +4198,8 @@ nv50_program_validate_data(struct nv50_context *nv50, struct nv50_program *p) } nv50_program_upload_data(nv50, map, 0, p->param_nr, cb); - pipe_buffer_unmap(pscreen, nv50->constbuf[p->type]); + pipe_buffer_unmap(pipe, nv50->constbuf[p->type], + transfer); } } @@ -4270,7 +4274,7 @@ nv50_program_validate_code(struct nv50_context *nv50, struct nv50_program *p) FREE(up); } -void +struct nouveau_stateobj * nv50_vertprog_validate(struct nv50_context *nv50) { struct nouveau_grobj *tesla = nv50->screen->tesla; @@ -4286,6 +4290,9 @@ nv50_vertprog_validate(struct nv50_context *nv50) nv50_program_validate_data(nv50, p); nv50_program_validate_code(nv50, p); + if (!(nv50->dirty & NV50_NEW_VERTPROG)) + return NULL; + so = so_new(5, 7, 2); so_method(so, tesla, NV50TCL_VP_ADDRESS_HIGH, 2); so_reloc (so, p->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | @@ -4301,11 +4308,10 @@ nv50_vertprog_validate(struct nv50_context *nv50) so_data (so, p->cfg.high_temp); so_method(so, tesla, NV50TCL_VP_START_ID, 1); so_data (so, 0); /* program start offset */ - so_ref(so, &nv50->state.vertprog); - so_ref(NULL, &so); + return so; } -void +struct nouveau_stateobj * nv50_fragprog_validate(struct nv50_context *nv50) { struct nouveau_grobj *tesla = nv50->screen->tesla; @@ -4321,6 +4327,9 @@ nv50_fragprog_validate(struct nv50_context *nv50) nv50_program_validate_data(nv50, p); nv50_program_validate_code(nv50, p); + if (!(nv50->dirty & NV50_NEW_FRAGPROG)) + return NULL; + so = so_new(6, 7, 2); so_method(so, tesla, NV50TCL_FP_ADDRESS_HIGH, 2); so_reloc (so, p->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | @@ -4337,11 +4346,10 @@ nv50_fragprog_validate(struct nv50_context *nv50) so_data (so, p->cfg.regs[3]); so_method(so, tesla, NV50TCL_FP_START_ID, 1); so_data (so, 0); /* program start offset */ - so_ref(so, &nv50->state.fragprog); - so_ref(NULL, &so); + return so; } -void +struct nouveau_stateobj * nv50_geomprog_validate(struct nv50_context *nv50) { struct nouveau_grobj *tesla = nv50->screen->tesla; @@ -4357,6 +4365,9 @@ nv50_geomprog_validate(struct nv50_context *nv50) nv50_program_validate_data(nv50, p); nv50_program_validate_code(nv50, p); + if (!(nv50->dirty & NV50_NEW_GEOMPROG)) + return NULL; + so = so_new(6, 7, 2); so_method(so, tesla, NV50TCL_GP_ADDRESS_HIGH, 2); so_reloc (so, p->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | @@ -4373,8 +4384,7 @@ nv50_geomprog_validate(struct nv50_context *nv50) so_data (so, p->cfg.vert_count); so_method(so, tesla, NV50TCL_GP_START_ID, 1); so_data (so, 0); - so_ref(so, &nv50->state.geomprog); - so_ref(NULL, &so); + return so; } static uint32_t @@ -4454,7 +4464,7 @@ nv50_vec4_map(uint32_t *map32, int mid, uint8_t zval, uint32_t lin[4], return mid; } -void +struct nouveau_stateobj * nv50_fp_linkage_validate(struct nv50_context *nv50) { struct nouveau_grobj *tesla = nv50->screen->tesla; @@ -4540,7 +4550,7 @@ nv50_fp_linkage_validate(struct nv50_context *nv50) so = so_new(10, 54, 0); n = (m + 3) / 4; - assert(m <= 32); + assert(m <= 64); if (vp->type == PIPE_SHADER_GEOMETRY) { so_method(so, tesla, NV50TCL_GP_RESULT_MAP_SIZE, 1); so_data (so, m); @@ -4580,8 +4590,7 @@ nv50_fp_linkage_validate(struct nv50_context *nv50) so_method(so, tesla, NV50TCL_GP_ENABLE, 1); so_data (so, (vp->type == PIPE_SHADER_GEOMETRY) ? 1 : 0); - so_ref(so, &nv50->state.fp_linkage); - so_ref(NULL, &so); + return so; } static int @@ -4592,7 +4601,7 @@ construct_vp_gp_mapping(uint32_t *map32, int m, int i, j, c; for (i = 0; i < gp->cfg.in_nr; ++i) { - uint8_t oid, mv = 0, mg = gp->cfg.in[i].mask; + uint8_t oid = 0, mv = 0, mg = gp->cfg.in[i].mask; for (j = 0; j < vp->cfg.out_nr; ++j) { if (vp->cfg.out[j].sn == gp->cfg.in[i].sn && @@ -4615,7 +4624,7 @@ construct_vp_gp_mapping(uint32_t *map32, int m, return m; } -void +struct nouveau_stateobj * nv50_gp_linkage_validate(struct nv50_context *nv50) { struct nouveau_grobj *tesla = nv50->screen->tesla; @@ -4625,10 +4634,8 @@ nv50_gp_linkage_validate(struct nv50_context *nv50) uint32_t map[16]; int m = 0; - if (!gp) { - so_ref(NULL, &nv50->state.gp_linkage); - return; - } + if (!gp) + return NULL; memset(map, 0, sizeof(map)); m = construct_vp_gp_mapping(map, m, vp, gp); @@ -4646,8 +4653,7 @@ nv50_gp_linkage_validate(struct nv50_context *nv50) so_method(so, tesla, NV50TCL_VP_RESULT_MAP(0), m); so_datap (so, map, m); - so_ref(so, &nv50->state.gp_linkage); - so_ref(NULL, &so); + return so; } void diff --git a/src/gallium/drivers/nv50/nv50_push.c b/src/gallium/drivers/nv50/nv50_push.c new file mode 100644 index 00000000000..244242b8434 --- /dev/null +++ b/src/gallium/drivers/nv50/nv50_push.c @@ -0,0 +1,360 @@ +#include "pipe/p_context.h" +#include "pipe/p_state.h" +#include "util/u_inlines.h" +#include "util/u_format.h" + +#include "nouveau/nouveau_util.h" +#include "nv50_context.h" +#include "nv50_resource.h" + +struct push_context { + struct nv50_context *nv50; + + unsigned vtx_size; + + void *idxbuf; + int32_t idxbias; + unsigned idxsize; + + float edgeflag; + int edgeflag_attr; + + struct { + void *map; + unsigned stride; + unsigned divisor; + unsigned step; + void (*push)(struct nouveau_channel *, void *); + } attr[16]; + unsigned attr_nr; +}; + +static void +emit_b32_1(struct nouveau_channel *chan, void *data) +{ + uint32_t *v = data; + + OUT_RING(chan, v[0]); +} + +static void +emit_b32_2(struct nouveau_channel *chan, void *data) +{ + uint32_t *v = data; + + OUT_RING(chan, v[0]); + OUT_RING(chan, v[1]); +} + +static void +emit_b32_3(struct nouveau_channel *chan, void *data) +{ + uint32_t *v = data; + + OUT_RING(chan, v[0]); + OUT_RING(chan, v[1]); + OUT_RING(chan, v[2]); +} + +static void +emit_b32_4(struct nouveau_channel *chan, void *data) +{ + uint32_t *v = data; + + OUT_RING(chan, v[0]); + OUT_RING(chan, v[1]); + OUT_RING(chan, v[2]); + OUT_RING(chan, v[3]); +} + +static void +emit_b16_1(struct nouveau_channel *chan, void *data) +{ + uint16_t *v = data; + + OUT_RING(chan, v[0]); +} + +static void +emit_b16_3(struct nouveau_channel *chan, void *data) +{ + uint16_t *v = data; + + OUT_RING(chan, (v[1] << 16) | v[0]); + OUT_RING(chan, v[2]); +} + +static void +emit_b08_1(struct nouveau_channel *chan, void *data) +{ + uint8_t *v = data; + + OUT_RING(chan, v[0]); +} + +static void +emit_b08_3(struct nouveau_channel *chan, void *data) +{ + uint8_t *v = data; + + OUT_RING(chan, (v[2] << 16) | (v[1] << 8) | v[0]); +} + +static INLINE void +emit_vertex(struct push_context *ctx, unsigned n) +{ + struct nouveau_grobj *tesla = ctx->nv50->screen->tesla; + struct nouveau_channel *chan = tesla->channel; + int i; + + if (ctx->edgeflag_attr < 16) { + float *edgeflag = ctx->attr[ctx->edgeflag_attr].map + + ctx->attr[ctx->edgeflag_attr].stride * n; + + if (*edgeflag != ctx->edgeflag) { + BEGIN_RING(chan, tesla, NV50TCL_EDGEFLAG_ENABLE, 1); + OUT_RING (chan, *edgeflag ? 1 : 0); + ctx->edgeflag = *edgeflag; + } + } + + BEGIN_RING_NI(chan, tesla, NV50TCL_VERTEX_DATA, ctx->vtx_size); + for (i = 0; i < ctx->attr_nr; i++) + ctx->attr[i].push(chan, ctx->attr[i].map + ctx->attr[i].stride * n); +} + +static void +emit_edgeflag(void *priv, boolean enabled) +{ + struct push_context *ctx = priv; + struct nouveau_grobj *tesla = ctx->nv50->screen->tesla; + struct nouveau_channel *chan = tesla->channel; + + BEGIN_RING(chan, tesla, NV50TCL_EDGEFLAG_ENABLE, 1); + OUT_RING (chan, enabled ? 1 : 0); +} + +static void +emit_elt08(void *priv, unsigned start, unsigned count) +{ + struct push_context *ctx = priv; + uint8_t *idxbuf = ctx->idxbuf; + + while (count--) + emit_vertex(ctx, idxbuf[start++]); +} + +static void +emit_elt08_biased(void *priv, unsigned start, unsigned count) +{ + struct push_context *ctx = priv; + uint8_t *idxbuf = ctx->idxbuf; + + while (count--) + emit_vertex(ctx, idxbuf[start++] + ctx->idxbias); +} + +static void +emit_elt16(void *priv, unsigned start, unsigned count) +{ + struct push_context *ctx = priv; + uint16_t *idxbuf = ctx->idxbuf; + + while (count--) + emit_vertex(ctx, idxbuf[start++]); +} + +static void +emit_elt16_biased(void *priv, unsigned start, unsigned count) +{ + struct push_context *ctx = priv; + uint16_t *idxbuf = ctx->idxbuf; + + while (count--) + emit_vertex(ctx, idxbuf[start++] + ctx->idxbias); +} + +static void +emit_elt32(void *priv, unsigned start, unsigned count) +{ + struct push_context *ctx = priv; + uint32_t *idxbuf = ctx->idxbuf; + + while (count--) + emit_vertex(ctx, idxbuf[start++]); +} + +static void +emit_elt32_biased(void *priv, unsigned start, unsigned count) +{ + struct push_context *ctx = priv; + uint32_t *idxbuf = ctx->idxbuf; + + while (count--) + emit_vertex(ctx, idxbuf[start++] + ctx->idxbias); +} + +static void +emit_verts(void *priv, unsigned start, unsigned count) +{ + while (count--) + emit_vertex(priv, start++); +} + +void +nv50_push_elements_instanced(struct pipe_context *pipe, + struct pipe_resource *idxbuf, + unsigned idxsize, int idxbias, + unsigned mode, unsigned start, unsigned count, + unsigned i_start, unsigned i_count) +{ + struct nv50_context *nv50 = nv50_context(pipe); + struct nouveau_grobj *tesla = nv50->screen->tesla; + struct nouveau_channel *chan = tesla->channel; + struct push_context ctx; + const unsigned p_overhead = 4 + /* begin/end */ + 4; /* potential edgeflag enable/disable */ + const unsigned v_overhead = 1 + /* VERTEX_DATA packet header */ + 2; /* potential edgeflag modification */ + struct u_split_prim s; + unsigned vtx_size; + boolean nzi = FALSE; + int i; + + ctx.nv50 = nv50; + ctx.attr_nr = 0; + ctx.idxbuf = NULL; + ctx.vtx_size = 0; + ctx.edgeflag = 0.5f; + ctx.edgeflag_attr = nv50->vertprog->cfg.edgeflag_in; + + /* map vertex buffers, determine vertex size */ + for (i = 0; i < nv50->vtxelt->num_elements; i++) { + struct pipe_vertex_element *ve = &nv50->vtxelt->pipe[i]; + struct pipe_vertex_buffer *vb = &nv50->vtxbuf[ve->vertex_buffer_index]; + struct nouveau_bo *bo = nv50_resource(vb->buffer)->bo; + unsigned size, nr_components, n; + + if (!(nv50->vbo_fifo & (1 << i))) + continue; + n = ctx.attr_nr++; + + if (nouveau_bo_map(bo, NOUVEAU_BO_RD)) { + assert(bo->map); + return; + } + ctx.attr[n].map = bo->map + vb->buffer_offset + ve->src_offset; + nouveau_bo_unmap(bo); + + ctx.attr[n].stride = vb->stride; + ctx.attr[n].divisor = ve->instance_divisor; + if (ctx.attr[n].divisor) { + ctx.attr[n].step = i_start % ve->instance_divisor; + ctx.attr[n].map += i_start * vb->stride; + } + + size = util_format_get_component_bits(ve->src_format, + UTIL_FORMAT_COLORSPACE_RGB, 0); + nr_components = util_format_get_nr_components(ve->src_format); + switch (size) { + case 8: + switch (nr_components) { + case 1: ctx.attr[n].push = emit_b08_1; break; + case 2: ctx.attr[n].push = emit_b16_1; break; + case 3: ctx.attr[n].push = emit_b08_3; break; + case 4: ctx.attr[n].push = emit_b32_1; break; + } + ctx.vtx_size++; + break; + case 16: + switch (nr_components) { + case 1: ctx.attr[n].push = emit_b16_1; break; + case 2: ctx.attr[n].push = emit_b32_1; break; + case 3: ctx.attr[n].push = emit_b16_3; break; + case 4: ctx.attr[n].push = emit_b32_2; break; + } + ctx.vtx_size += (nr_components + 1) >> 1; + break; + case 32: + switch (nr_components) { + case 1: ctx.attr[n].push = emit_b32_1; break; + case 2: ctx.attr[n].push = emit_b32_2; break; + case 3: ctx.attr[n].push = emit_b32_3; break; + case 4: ctx.attr[n].push = emit_b32_4; break; + } + ctx.vtx_size += nr_components; + break; + default: + assert(0); + return; + } + } + vtx_size = ctx.vtx_size + v_overhead; + + /* map index buffer, if present */ + if (idxbuf) { + struct nouveau_bo *bo = nv50_resource(idxbuf)->bo; + + if (nouveau_bo_map(bo, NOUVEAU_BO_RD)) { + assert(bo->map); + return; + } + ctx.idxbuf = bo->map; + ctx.idxbias = idxbias; + ctx.idxsize = idxsize; + nouveau_bo_unmap(bo); + } + + s.priv = &ctx; + s.edge = emit_edgeflag; + if (idxbuf) { + if (idxsize == 1) + s.emit = idxbias ? emit_elt08_biased : emit_elt08; + else + if (idxsize == 2) + s.emit = idxbias ? emit_elt16_biased : emit_elt16; + else + s.emit = idxbias ? emit_elt32_biased : emit_elt32; + } else + s.emit = emit_verts; + + /* per-instance loop */ + BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 2); + OUT_RING (chan, NV50_CB_AUX | (24 << 8)); + OUT_RING (chan, i_start); + while (i_count--) { + unsigned max_verts; + boolean done; + + for (i = 0; i < ctx.attr_nr; i++) { + if (!ctx.attr[i].divisor || + ctx.attr[i].divisor != ++ctx.attr[i].step) + continue; + ctx.attr[i].step = 0; + ctx.attr[i].map += ctx.attr[i].stride; + } + + u_split_prim_init(&s, mode, start, count); + do { + if (AVAIL_RING(chan) < p_overhead + (6 * vtx_size)) { + FIRE_RING(chan); + if (!nv50_state_validate(nv50, p_overhead + (6 * vtx_size))) { + assert(0); + return; + } + } + + max_verts = AVAIL_RING(chan); + max_verts -= p_overhead; + max_verts /= vtx_size; + + BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1); + OUT_RING (chan, nv50_prim(s.mode) | (nzi ? (1 << 28) : 0)); + done = u_split_prim_next(&s, max_verts); + BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1); + OUT_RING (chan, 0); + } while (!done); + + nzi = TRUE; + } +} diff --git a/src/gallium/drivers/nv50/nv50_resource.c b/src/gallium/drivers/nv50/nv50_resource.c new file mode 100644 index 00000000000..cfdb60418b5 --- /dev/null +++ b/src/gallium/drivers/nv50/nv50_resource.c @@ -0,0 +1,67 @@ + +#include "pipe/p_context.h" +#include "nv50_resource.h" +#include "nouveau/nouveau_screen.h" + + +/* This doesn't look quite right - this query is supposed to ask + * whether the particular context has references to the resource in + * any unflushed rendering command buffer, and hence requires a + * pipe->flush() for serializing some modification to that resource. + * + * This seems to be answering the question of whether the resource is + * currently on hardware. + */ +static unsigned int +nv50_resource_is_referenced(struct pipe_context *pipe, + struct pipe_resource *resource, + unsigned face, unsigned level) +{ + return nouveau_reference_flags(nv50_resource(resource)->bo); +} + +static struct pipe_resource * +nv50_resource_create(struct pipe_screen *screen, + const struct pipe_resource *template) +{ + if (template->target == PIPE_BUFFER) + return nv50_buffer_create(screen, template); + else + return nv50_miptree_create(screen, template); +} + +static struct pipe_resource * +nv50_resource_from_handle(struct pipe_screen * screen, + const struct pipe_resource *template, + struct winsys_handle *whandle) +{ + if (template->target == PIPE_BUFFER) + return NULL; + else + return nv50_miptree_from_handle(screen, template, whandle); +} + +void +nv50_init_resource_functions(struct pipe_context *pcontext) +{ + pcontext->get_transfer = u_get_transfer_vtbl; + pcontext->transfer_map = u_transfer_map_vtbl; + pcontext->transfer_flush_region = u_transfer_flush_region_vtbl; + pcontext->transfer_unmap = u_transfer_unmap_vtbl; + pcontext->transfer_destroy = u_transfer_destroy_vtbl; + pcontext->transfer_inline_write = u_transfer_inline_write_vtbl; + pcontext->is_resource_referenced = nv50_resource_is_referenced; +} + +void +nv50_screen_init_resource_functions(struct pipe_screen *pscreen) +{ + pscreen->resource_create = nv50_resource_create; + pscreen->resource_from_handle = nv50_resource_from_handle; + pscreen->resource_get_handle = u_resource_get_handle_vtbl; + pscreen->resource_destroy = u_resource_destroy_vtbl; + pscreen->user_buffer_create = nv50_user_buffer_create; + + pscreen->get_tex_surface = nv50_miptree_surface_new; + pscreen->tex_surface_destroy = nv50_miptree_surface_del; +} diff --git a/src/gallium/drivers/nv50/nv50_resource.h b/src/gallium/drivers/nv50/nv50_resource.h new file mode 100644 index 00000000000..f435a5892e5 --- /dev/null +++ b/src/gallium/drivers/nv50/nv50_resource.h @@ -0,0 +1,98 @@ + +#ifndef NV50_RESOURCE_H +#define NV50_RESOURCE_H + +#include "util/u_transfer.h" + +#include "nouveau/nouveau_winsys.h" + +struct pipe_resource; +struct nouveau_bo; + + +/* This gets further specialized into either buffer or texture + * structures. In the future we'll want to remove much of that + * distinction, but for now try to keep as close to the existing code + * as possible and use the vtbl struct to choose between the two + * underlying implementations. + */ +struct nv50_resource { + struct pipe_resource base; + const struct u_resource_vtbl *vtbl; + struct nouveau_bo *bo; +}; + +struct nv50_miptree_level { + int *image_offset; + unsigned pitch; + unsigned tile_mode; +}; + +#define NV50_MAX_TEXTURE_LEVELS 16 + +struct nv50_miptree { + struct nv50_resource base; + + struct nv50_miptree_level level[NV50_MAX_TEXTURE_LEVELS]; + int image_nr; + int total_size; +}; + +static INLINE struct nv50_miptree * +nv50_miptree(struct pipe_resource *pt) +{ + return (struct nv50_miptree *)pt; +} + + +static INLINE +struct nv50_resource *nv50_resource(struct pipe_resource *resource) +{ + return (struct nv50_resource *)resource; +} + +/* is resource mapped into the GPU's address space (i.e. VRAM or GART) ? */ +static INLINE boolean +nv50_resource_mapped_by_gpu(struct pipe_resource *resource) +{ + return nv50_resource(resource)->bo->handle; +} + +void +nv50_init_resource_functions(struct pipe_context *pcontext); + +void +nv50_screen_init_resource_functions(struct pipe_screen *pscreen); + +/* Internal functions + */ +struct pipe_resource * +nv50_miptree_create(struct pipe_screen *pscreen, + const struct pipe_resource *tmp); + +struct pipe_resource * +nv50_miptree_from_handle(struct pipe_screen *pscreen, + const struct pipe_resource *template, + struct winsys_handle *whandle); + +struct pipe_resource * +nv50_buffer_create(struct pipe_screen *pscreen, + const struct pipe_resource *template); + +struct pipe_resource * +nv50_user_buffer_create(struct pipe_screen *screen, + void *ptr, + unsigned bytes, + unsigned usage); + + +struct pipe_surface * +nv50_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_resource *pt, + unsigned face, unsigned level, unsigned zslice, + unsigned flags); + +void +nv50_miptree_surface_del(struct pipe_surface *ps); + + +#endif diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c index eed6031eafa..ad17991be9a 100644 --- a/src/gallium/drivers/nv50/nv50_screen.c +++ b/src/gallium/drivers/nv50/nv50_screen.c @@ -24,6 +24,7 @@ #include "nv50_context.h" #include "nv50_screen.h" +#include "nv50_resource.h" #include "nouveau/nouveau_stateobj.h" @@ -33,7 +34,7 @@ nv50_screen_is_format_supported(struct pipe_screen *pscreen, enum pipe_texture_target target, unsigned tex_usage, unsigned geom_flags) { - if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) { + if (tex_usage & PIPE_BIND_RENDER_TARGET) { switch (format) { case PIPE_FORMAT_B8G8R8X8_UNORM: case PIPE_FORMAT_B8G8R8A8_UNORM: @@ -48,12 +49,12 @@ nv50_screen_is_format_supported(struct pipe_screen *pscreen, break; } } else - if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) { + if (tex_usage & PIPE_BIND_DEPTH_STENCIL) { switch (format) { case PIPE_FORMAT_Z32_FLOAT: - case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: case PIPE_FORMAT_Z24X8_UNORM: - case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: return TRUE; default: break; @@ -75,8 +76,8 @@ nv50_screen_is_format_supported(struct pipe_screen *pscreen, case PIPE_FORMAT_DXT1_RGBA: case PIPE_FORMAT_DXT3_RGBA: case PIPE_FORMAT_DXT5_RGBA: - case PIPE_FORMAT_S8Z24_UNORM: - case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: case PIPE_FORMAT_Z32_FLOAT: case PIPE_FORMAT_R16G16B16A16_SNORM: case PIPE_FORMAT_R16G16B16A16_UNORM: @@ -107,7 +108,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, int param) case PIPE_CAP_TWO_SIDED_STENCIL: return 1; case PIPE_CAP_GLSL: - return 0; + return 1; case PIPE_CAP_ANISOTROPIC_FILTER: return 1; case PIPE_CAP_POINT_SPRITE: @@ -131,10 +132,6 @@ nv50_screen_get_param(struct pipe_screen *pscreen, int param) return 1; case PIPE_CAP_BLEND_EQUATION_SEPARATE: return 1; - case NOUVEAU_CAP_HW_VTXBUF: - return 1; - case NOUVEAU_CAP_HW_IDXBUF: - return 1; case PIPE_CAP_INDEP_BLEND_ENABLE: return 1; case PIPE_CAP_INDEP_BLEND_FUNC: @@ -188,8 +185,6 @@ nv50_screen_destroy(struct pipe_screen *pscreen) nouveau_bo_ref(NULL, &screen->tic); if (screen->tsc) nouveau_bo_ref(NULL, &screen->tsc); - if (screen->static_init) - so_ref(NULL, &screen->static_init); nouveau_notifier_free(&screen->sync); nouveau_grobj_free(&screen->tesla); @@ -202,26 +197,53 @@ nv50_screen_destroy(struct pipe_screen *pscreen) FREE(screen); } -static int -nv50_pre_pipebuffer_map(struct pipe_screen *pscreen, struct pipe_buffer *pb, - unsigned usage) +#define BGN_RELOC(ch, bo, gr, m, n, fl) \ + OUT_RELOC(ch, bo, (n << 18) | (gr->subc << 13) | m, fl, 0, 0) + +void +nv50_screen_relocs(struct nv50_screen *screen) { - struct nv50_screen *screen = nv50_screen(pscreen); - struct nv50_context *ctx = screen->cur_ctx; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *tesla = screen->tesla; + unsigned i; + const unsigned rl = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_DUMMY; - if (!(pb->usage & PIPE_BUFFER_USAGE_VERTEX)) - return 0; + MARK_RING (chan, 28, 26); - /* Our vtxbuf got mapped, it can no longer be considered part of current - * state, remove it to avoid emitting reloc markers. - */ - if (ctx && ctx->state.vtxbuf && so_bo_is_reloc(ctx->state.vtxbuf, - nouveau_bo(pb))) { - so_ref(NULL, &ctx->state.vtxbuf); - ctx->dirty |= NV50_NEW_ARRAYS; - } + /* cause grobj autobind */ + BEGIN_RING(chan, tesla, 0x0100, 1); + OUT_RING (chan, 0); + + BGN_RELOC (chan, screen->tic, tesla, NV50TCL_TIC_ADDRESS_HIGH, 2, rl); + OUT_RELOCh(chan, screen->tic, 0, rl); + OUT_RELOCl(chan, screen->tic, 0, rl); + + BGN_RELOC (chan, screen->tsc, tesla, NV50TCL_TSC_ADDRESS_HIGH, 2, rl); + OUT_RELOCh(chan, screen->tsc, 0, rl); + OUT_RELOCl(chan, screen->tsc, 0, rl); + + BGN_RELOC (chan, screen->constbuf_misc[0], + tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3, rl); + OUT_RELOCh(chan, screen->constbuf_misc[0], 0, rl); + OUT_RELOCl(chan, screen->constbuf_misc[0], 0, rl); + OUT_RELOC (chan, screen->constbuf_misc[0], + (NV50_CB_PMISC << 16) | 0x0200, rl, 0, 0); - return 0; + BGN_RELOC (chan, screen->constbuf_misc[0], + tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3, rl); + OUT_RELOCh(chan, screen->constbuf_misc[0], 0x200, rl); + OUT_RELOCl(chan, screen->constbuf_misc[0], 0x200, rl); + OUT_RELOC (chan, screen->constbuf_misc[0], + (NV50_CB_AUX << 16) | 0x0200, rl, 0, 0); + + for (i = 0; i < 3; ++i) { + BGN_RELOC (chan, screen->constbuf_parm[i], + tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3, rl); + OUT_RELOCh(chan, screen->constbuf_parm[i], 0, rl); + OUT_RELOCl(chan, screen->constbuf_parm[i], 0, rl); + OUT_RELOC (chan, screen->constbuf_parm[i], + ((NV50_CB_PVP + i) << 16) | 0x0800, rl, 0, 0); + } } struct pipe_screen * @@ -230,10 +252,10 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) struct nv50_screen *screen = CALLOC_STRUCT(nv50_screen); struct nouveau_channel *chan; struct pipe_screen *pscreen; - struct nouveau_stateobj *so; unsigned chipset = dev->chipset; unsigned tesla_class = 0; int ret, i; + const unsigned rl = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD; if (!screen) return NULL; @@ -252,10 +274,8 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) pscreen->get_paramf = nv50_screen_get_paramf; pscreen->is_format_supported = nv50_screen_is_format_supported; pscreen->context_create = nv50_create; - screen->base.pre_pipebuffer_map_callback = nv50_pre_pipebuffer_map; - nv50_screen_init_miptree_functions(pscreen); - nv50_transfer_init_screen_functions(pscreen); + nv50_screen_init_resource_functions(pscreen); /* DMA engine object */ ret = nouveau_grobj_alloc(chan, 0xbeef5039, @@ -309,6 +329,9 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) return NULL; } + /* this is necessary for the new RING_3D / statebuffer code */ + BIND_RING(chan, screen->tesla, 7); + /* Sync notifier */ ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync); if (ret) { @@ -318,64 +341,58 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) } /* Static M2MF init */ - so = so_new(1, 3, 0); - so_method(so, screen->m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 3); - so_data (so, screen->sync->handle); - so_data (so, chan->vram->handle); - so_data (so, chan->vram->handle); - so_emit(chan, so); - so_ref (NULL, &so); + BEGIN_RING(chan, screen->m2mf, + NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 3); + OUT_RING (chan, screen->sync->handle); + OUT_RING (chan, chan->vram->handle); + OUT_RING (chan, chan->vram->handle); /* Static 2D init */ - so = so_new(4, 7, 0); - so_method(so, screen->eng2d, NV50_2D_DMA_NOTIFY, 4); - so_data (so, screen->sync->handle); - so_data (so, chan->vram->handle); - so_data (so, chan->vram->handle); - so_data (so, chan->vram->handle); - so_method(so, screen->eng2d, NV50_2D_OPERATION, 1); - so_data (so, NV50_2D_OPERATION_SRCCOPY); - so_method(so, screen->eng2d, NV50_2D_CLIP_ENABLE, 1); - so_data (so, 0); - so_method(so, screen->eng2d, 0x0888, 1); - so_data (so, 1); - so_emit(chan, so); - so_ref(NULL, &so); + BEGIN_RING(chan, screen->eng2d, NV50_2D_DMA_NOTIFY, 4); + OUT_RING (chan, screen->sync->handle); + OUT_RING (chan, chan->vram->handle); + OUT_RING (chan, chan->vram->handle); + OUT_RING (chan, chan->vram->handle); + BEGIN_RING(chan, screen->eng2d, NV50_2D_OPERATION, 1); + OUT_RING (chan, NV50_2D_OPERATION_SRCCOPY); + BEGIN_RING(chan, screen->eng2d, NV50_2D_CLIP_ENABLE, 1); + OUT_RING (chan, 0); + BEGIN_RING(chan, screen->eng2d, 0x0888, 1); + OUT_RING (chan, 1); /* Static tesla init */ - so = so_new(47, 95, 24); - - so_method(so, screen->tesla, NV50TCL_COND_MODE, 1); - so_data (so, NV50TCL_COND_MODE_ALWAYS); - so_method(so, screen->tesla, NV50TCL_DMA_NOTIFY, 1); - so_data (so, screen->sync->handle); - so_method(so, screen->tesla, NV50TCL_DMA_ZETA, 11); + BEGIN_RING(chan, screen->tesla, NV50TCL_COND_MODE, 1); + OUT_RING (chan, NV50TCL_COND_MODE_ALWAYS); + BEGIN_RING(chan, screen->tesla, NV50TCL_DMA_NOTIFY, 1); + OUT_RING (chan, screen->sync->handle); + BEGIN_RING(chan, screen->tesla, NV50TCL_DMA_ZETA, 11); for (i = 0; i < 11; i++) - so_data(so, chan->vram->handle); - so_method(so, screen->tesla, NV50TCL_DMA_COLOR(0), - NV50TCL_DMA_COLOR__SIZE); + OUT_RING (chan, chan->vram->handle); + BEGIN_RING(chan, screen->tesla, + NV50TCL_DMA_COLOR(0), NV50TCL_DMA_COLOR__SIZE); for (i = 0; i < NV50TCL_DMA_COLOR__SIZE; i++) - so_data(so, chan->vram->handle); - so_method(so, screen->tesla, NV50TCL_RT_CONTROL, 1); - so_data (so, 1); + OUT_RING (chan, chan->vram->handle); + + BEGIN_RING(chan, screen->tesla, NV50TCL_RT_CONTROL, 1); + OUT_RING (chan, 1); /* activate all 32 lanes (threads) in a warp */ - so_method(so, screen->tesla, NV50TCL_WARP_HALVES, 1); - so_data (so, 0x2); - so_method(so, screen->tesla, 0x1400, 1); - so_data (so, 0xf); + BEGIN_RING(chan, screen->tesla, NV50TCL_REG_MODE, 1); + OUT_RING (chan, NV50TCL_REG_MODE_STRIPED); + BEGIN_RING(chan, screen->tesla, 0x1400, 1); + OUT_RING (chan, 0xf); /* max TIC (bits 4:8) & TSC (ignored) bindings, per program type */ for (i = 0; i < 3; ++i) { - so_method(so, screen->tesla, NV50TCL_TEX_LIMITS(i), 1); - so_data (so, 0x54); + BEGIN_RING(chan, screen->tesla, NV50TCL_TEX_LIMITS(i), 1); + OUT_RING (chan, 0x54); } /* origin is top left (set to 1 for bottom left) */ - so_method(so, screen->tesla, NV50TCL_Y_ORIGIN_BOTTOM, 1); - so_data (so, 0); - so_method(so, screen->tesla, NV50TCL_VP_REG_ALLOC_RESULT, 1); - so_data (so, 8); + BEGIN_RING(chan, screen->tesla, NV50TCL_Y_ORIGIN_BOTTOM, 1); + OUT_RING (chan, 0); + BEGIN_RING(chan, screen->tesla, NV50TCL_VP_REG_ALLOC_RESULT, 1); + OUT_RING (chan, 8); /* constant buffers for immediates and VP/FP parameters */ ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, (32 * 4) * 4, @@ -384,6 +401,14 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) nv50_screen_destroy(pscreen); return NULL; } + BEGIN_RING(chan, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3); + OUT_RELOCh(chan, screen->constbuf_misc[0], 0, rl); + OUT_RELOCl(chan, screen->constbuf_misc[0], 0, rl); + OUT_RING (chan, (NV50_CB_PMISC << 16) | 0x0200); + BEGIN_RING(chan, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3); + OUT_RELOCh(chan, screen->constbuf_misc[0], 0x200, rl); + OUT_RELOCl(chan, screen->constbuf_misc[0], 0x200, rl); + OUT_RING (chan, (NV50_CB_AUX << 16) | 0x0200); for (i = 0; i < 3; i++) { ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, (256 * 4) * 4, @@ -392,6 +417,10 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) nv50_screen_destroy(pscreen); return NULL; } + BEGIN_RING(chan, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3); + OUT_RELOCh(chan, screen->constbuf_parm[i], 0, rl); + OUT_RELOCl(chan, screen->constbuf_parm[i], 0, rl); + OUT_RING (chan, ((NV50_CB_PVP + i) << 16) | 0x0800); } if (nouveau_resource_init(&screen->immd_heap[0], 0, 128) || @@ -403,123 +432,71 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) return NULL; } - /* - // map constant buffers: - // B = buffer ID (maybe more than 1 byte) - // N = CB index used in shader instruction - // P = program type (0 = VP, 2 = GP, 3 = FP) - so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1); - so_data (so, 0x000BBNP1); - */ - - so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3); - so_reloc (so, screen->constbuf_misc[0], 0, NOUVEAU_BO_VRAM | - NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0); - so_reloc (so, screen->constbuf_misc[0], 0, NOUVEAU_BO_VRAM | - NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0); - so_data (so, (NV50_CB_PMISC << 16) | 0x00000200); - so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1); - so_data (so, 0x00000001 | (NV50_CB_PMISC << 12)); - so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1); - so_data (so, 0x00000021 | (NV50_CB_PMISC << 12)); - so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1); - so_data (so, 0x00000031 | (NV50_CB_PMISC << 12)); - - /* bind auxiliary constbuf to immediate data bo */ - so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3); - so_reloc (so, screen->constbuf_misc[0], (128 * 4) * 4, - NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0); - so_reloc (so, screen->constbuf_misc[0], (128 * 4) * 4, - NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0); - so_data (so, (NV50_CB_AUX << 16) | 0x00000200); - so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1); - so_data (so, 0x00000201 | (NV50_CB_AUX << 12)); - so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1); - so_data (so, 0x00000221 | (NV50_CB_AUX << 12)); - - so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3); - so_reloc (so, screen->constbuf_parm[PIPE_SHADER_VERTEX], 0, - NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0); - so_reloc (so, screen->constbuf_parm[PIPE_SHADER_VERTEX], 0, - NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0); - so_data (so, (NV50_CB_PVP << 16) | 0x00000800); - so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1); - so_data (so, 0x00000101 | (NV50_CB_PVP << 12)); - - so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3); - so_reloc (so, screen->constbuf_parm[PIPE_SHADER_GEOMETRY], 0, - NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0); - so_reloc (so, screen->constbuf_parm[PIPE_SHADER_GEOMETRY], 0, - NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0); - so_data (so, (NV50_CB_PGP << 16) | 0x00000800); - so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1); - so_data (so, 0x00000121 | (NV50_CB_PGP << 12)); - - so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3); - so_reloc (so, screen->constbuf_parm[PIPE_SHADER_FRAGMENT], 0, - NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0); - so_reloc (so, screen->constbuf_parm[PIPE_SHADER_FRAGMENT], 0, - NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0); - so_data (so, (NV50_CB_PFP << 16) | 0x00000800); - so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1); - so_data (so, 0x00000131 | (NV50_CB_PFP << 12)); - - ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, PIPE_SHADER_TYPES*32*32, + ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, 3 * 32 * (8 * 4), &screen->tic); if (ret) { nv50_screen_destroy(pscreen); return NULL; } + BEGIN_RING(chan, screen->tesla, NV50TCL_TIC_ADDRESS_HIGH, 3); + OUT_RELOCh(chan, screen->tic, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); + OUT_RELOCl(chan, screen->tic, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); + OUT_RING (chan, 3 * 32 - 1); - so_method(so, screen->tesla, NV50TCL_TIC_ADDRESS_HIGH, 3); - so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM | - NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0); - so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM | - NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0); - so_data (so, PIPE_SHADER_TYPES * 32 - 1); - - ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, PIPE_SHADER_TYPES*32*32, + ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, 3 * 32 * (8 * 4), &screen->tsc); if (ret) { nv50_screen_destroy(pscreen); return NULL; } - - so_method(so, screen->tesla, NV50TCL_TSC_ADDRESS_HIGH, 3); - so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM | - NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0); - so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM | - NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0); - so_data (so, 0x00000000); /* ignored if TSC_LINKED (0x1234) = 1 */ - + BEGIN_RING(chan, screen->tesla, NV50TCL_TSC_ADDRESS_HIGH, 3); + OUT_RELOCh(chan, screen->tsc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); + OUT_RELOCl(chan, screen->tsc, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD); + OUT_RING (chan, 0); /* ignored if TSC_LINKED (0x1234) == 1 */ + + /* map constant buffers: + * B = buffer ID (maybe more than 1 byte) + * N = CB index used in shader instruction + * P = program type (0 = VP, 2 = GP, 3 = FP) + * SET_PROGRAM_CB = 0x000BBNP1 + */ + BEGIN_RING_NI(chan, screen->tesla, NV50TCL_SET_PROGRAM_CB, 8); + /* bind immediate buffer */ + OUT_RING (chan, 0x001 | (NV50_CB_PMISC << 12)); + OUT_RING (chan, 0x021 | (NV50_CB_PMISC << 12)); + OUT_RING (chan, 0x031 | (NV50_CB_PMISC << 12)); + /* bind auxiliary constbuf to immediate data bo */ + OUT_RING (chan, 0x201 | (NV50_CB_AUX << 12)); + OUT_RING (chan, 0x221 | (NV50_CB_AUX << 12)); + /* bind parameter buffers */ + OUT_RING (chan, 0x101 | (NV50_CB_PVP << 12)); + OUT_RING (chan, 0x121 | (NV50_CB_PGP << 12)); + OUT_RING (chan, 0x131 | (NV50_CB_PFP << 12)); /* Vertex array limits - max them out */ for (i = 0; i < 16; i++) { - so_method(so, screen->tesla, NV50TCL_VERTEX_ARRAY_LIMIT_HIGH(i), 2); - so_data (so, 0x000000ff); - so_data (so, 0xffffffff); + BEGIN_RING(chan, screen->tesla, + NV50TCL_VERTEX_ARRAY_LIMIT_HIGH(i), 2); + OUT_RING (chan, 0x000000ff); + OUT_RING (chan, 0xffffffff); } - so_method(so, screen->tesla, NV50TCL_DEPTH_RANGE_NEAR(0), 2); - so_data (so, fui(0.0)); - so_data (so, fui(1.0)); + BEGIN_RING(chan, screen->tesla, NV50TCL_DEPTH_RANGE_NEAR(0), 2); + OUT_RINGf (chan, 0.0f); + OUT_RINGf (chan, 1.0f); /* no dynamic combination of TIC & TSC entries => only BIND_TIC used */ - so_method(so, screen->tesla, NV50TCL_LINKED_TSC, 1); - so_data (so, 1); - - /* activate first scissor rectangle */ - so_method(so, screen->tesla, NV50TCL_SCISSOR_ENABLE(0), 1); - so_data (so, 1); + BEGIN_RING(chan, screen->tesla, NV50TCL_LINKED_TSC, 1); + OUT_RING (chan, 1); - so_method(so, screen->tesla, NV50TCL_EDGEFLAG_ENABLE, 1); - so_data (so, 1); /* default edgeflag to TRUE */ + BEGIN_RING(chan, screen->tesla, NV50TCL_EDGEFLAG_ENABLE, 1); + OUT_RING (chan, 1); /* default edgeflag to TRUE */ - so_emit(chan, so); - so_ref (so, &screen->static_init); - so_ref (NULL, &so); - nouveau_pushbuf_flush(chan, 0); + FIRE_RING (chan); + screen->force_push = debug_get_bool_option("NV50_ALWAYS_PUSH", FALSE); + if(!screen->force_push) + screen->base.vertex_buffer_flags = screen->base.index_buffer_flags = NOUVEAU_BO_GART; return pscreen; } diff --git a/src/gallium/drivers/nv50/nv50_screen.h b/src/gallium/drivers/nv50/nv50_screen.h index 2687b721277..40ebbee72e2 100644 --- a/src/gallium/drivers/nv50/nv50_screen.h +++ b/src/gallium/drivers/nv50/nv50_screen.h @@ -2,7 +2,8 @@ #define __NV50_SCREEN_H__ #include "nouveau/nouveau_screen.h" -#include "nv50_context.h" + +struct nv50_context; struct nv50_screen { struct nouveau_screen base; @@ -22,12 +23,12 @@ struct nv50_screen { struct nouveau_resource *immd_heap[1]; struct nouveau_resource *parm_heap[PIPE_SHADER_TYPES]; - struct pipe_buffer *strm_vbuf[16]; + struct pipe_resource *strm_vbuf[16]; struct nouveau_bo *tic; struct nouveau_bo *tsc; - struct nouveau_stateobj *static_init; + boolean force_push; }; static INLINE struct nv50_screen * @@ -36,6 +37,6 @@ nv50_screen(struct pipe_screen *screen) return (struct nv50_screen *)screen; } -void nv50_transfer_init_screen_functions(struct pipe_screen *); +extern void nv50_screen_relocs(struct nv50_screen *); #endif diff --git a/src/gallium/drivers/nv50/nv50_state.c b/src/gallium/drivers/nv50/nv50_state.c index 7d304907b65..e885a2b7196 100644 --- a/src/gallium/drivers/nv50/nv50_state.c +++ b/src/gallium/drivers/nv50/nv50_state.c @@ -238,6 +238,9 @@ nv50_sampler_state_create(struct pipe_context *pipe, return (void *)sso; } +/* type == 0 for VPs, 1 for GPs, 2 for FPs, which is how the + * relevant tesla methods are indexed (NV50TCL_BIND_TSC etc.) + */ static INLINE void nv50_sampler_state_bind(struct pipe_context *pipe, unsigned type, unsigned nr, void **sampler) @@ -253,13 +256,13 @@ nv50_sampler_state_bind(struct pipe_context *pipe, unsigned type, static void nv50_vp_sampler_state_bind(struct pipe_context *pipe, unsigned nr, void **s) { - nv50_sampler_state_bind(pipe, PIPE_SHADER_VERTEX, nr, s); + nv50_sampler_state_bind(pipe, 0, nr, s); } static void nv50_fp_sampler_state_bind(struct pipe_context *pipe, unsigned nr, void **s) { - nv50_sampler_state_bind(pipe, PIPE_SHADER_FRAGMENT, nr, s); + nv50_sampler_state_bind(pipe, 2, nr, s); } static void @@ -269,40 +272,74 @@ nv50_sampler_state_delete(struct pipe_context *pipe, void *hwcso) } static INLINE void -nv50_set_sampler_texture(struct pipe_context *pipe, unsigned type, - unsigned nr, struct pipe_texture **pt) +nv50_set_sampler_views(struct pipe_context *pipe, unsigned p, + unsigned nr, + struct pipe_sampler_view **views) { struct nv50_context *nv50 = nv50_context(pipe); unsigned i; for (i = 0; i < nr; i++) - pipe_texture_reference((void *)&nv50->miptree[type][i], pt[i]); - for (i = nr; i < nv50->miptree_nr[type]; i++) - pipe_texture_reference((void *)&nv50->miptree[type][i], NULL); + pipe_sampler_view_reference(&nv50->sampler_views[p][i], + views[i]); + + for (i = nr; i < nv50->sampler_view_nr[p]; i++) + pipe_sampler_view_reference(&nv50->sampler_views[p][i], NULL); - nv50->miptree_nr[type] = nr; + nv50->sampler_view_nr[p] = nr; nv50->dirty |= NV50_NEW_TEXTURE; } static void -nv50_set_vp_sampler_textures(struct pipe_context *pipe, - unsigned nr, struct pipe_texture **pt) +nv50_set_vp_sampler_views(struct pipe_context *pipe, + unsigned nr, + struct pipe_sampler_view **views) { - nv50_set_sampler_texture(pipe, PIPE_SHADER_VERTEX, nr, pt); + nv50_set_sampler_views(pipe, 0, nr, views); } static void -nv50_set_fp_sampler_textures(struct pipe_context *pipe, - unsigned nr, struct pipe_texture **pt) +nv50_set_fp_sampler_views(struct pipe_context *pipe, + unsigned nr, + struct pipe_sampler_view **views) +{ + nv50_set_sampler_views(pipe, 2, nr, views); +} + +static void +nv50_sampler_view_destroy(struct pipe_context *pipe, + struct pipe_sampler_view *view) +{ + pipe_resource_reference(&view->texture, NULL); + FREE(nv50_sampler_view(view)); +} + +static struct pipe_sampler_view * +nv50_create_sampler_view(struct pipe_context *pipe, + struct pipe_resource *texture, + const struct pipe_sampler_view *templ) { - nv50_set_sampler_texture(pipe, PIPE_SHADER_FRAGMENT, nr, pt); + struct nv50_sampler_view *view = CALLOC_STRUCT(nv50_sampler_view); + + view->pipe = *templ; + view->pipe.reference.count = 1; + view->pipe.texture = NULL; + pipe_resource_reference(&view->pipe.texture, texture); + view->pipe.context = pipe; + + if (!nv50_tex_construct(view)) { + nv50_sampler_view_destroy(pipe, &view->pipe); + return NULL; + } + return &view->pipe; } + static void * nv50_rasterizer_state_create(struct pipe_context *pipe, const struct pipe_rasterizer_state *cso) { - struct nouveau_stateobj *so = so_new(15, 21, 0); + struct nouveau_stateobj *so = so_new(16, 22, 0); struct nouveau_grobj *tesla = nv50_context(pipe)->screen->tesla; struct nv50_rasterizer_stateobj *rso = CALLOC_STRUCT(nv50_rasterizer_stateobj); @@ -314,6 +351,9 @@ nv50_rasterizer_state_create(struct pipe_context *pipe, * - point_sprite / sprite_coord_mode */ + so_method(so, tesla, NV50TCL_SCISSOR_ENABLE(0), 1); + so_data (so, cso->scissor); + so_method(so, tesla, NV50TCL_SHADE_MODEL, 1); so_data (so, cso->flatshade ? NV50TCL_SHADE_MODEL_FLAT : NV50TCL_SHADE_MODEL_SMOOTH); @@ -650,7 +690,7 @@ nv50_set_clip_state(struct pipe_context *pipe, static void nv50_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_buffer *buf ) + struct pipe_resource *buf ) { struct nv50_context *nv50 = nv50_context(pipe); @@ -720,15 +760,34 @@ nv50_set_vertex_buffers(struct pipe_context *pipe, unsigned count, nv50->dirty |= NV50_NEW_ARRAYS; } +static void * +nv50_vtxelts_state_create(struct pipe_context *pipe, + unsigned num_elements, + const struct pipe_vertex_element *elements) +{ + struct nv50_vtxelt_stateobj *cso = CALLOC_STRUCT(nv50_vtxelt_stateobj); + + assert(num_elements < 16); /* not doing fallbacks yet */ + cso->num_elements = num_elements; + memcpy(cso->pipe, elements, num_elements * sizeof(*elements)); + + nv50_vtxelt_construct(cso); + + return (void *)cso; +} + static void -nv50_set_vertex_elements(struct pipe_context *pipe, unsigned count, - const struct pipe_vertex_element *ve) +nv50_vtxelts_state_delete(struct pipe_context *pipe, void *hwcso) { - struct nv50_context *nv50 = nv50_context(pipe); + FREE(hwcso); +} - memcpy(nv50->vtxelt, ve, sizeof(*ve) * count); - nv50->vtxelt_nr = count; +static void +nv50_vtxelts_state_bind(struct pipe_context *pipe, void *hwcso) +{ + struct nv50_context *nv50 = nv50_context(pipe); + nv50->vtxelt = hwcso; nv50->dirty |= NV50_NEW_ARRAYS; } @@ -743,8 +802,10 @@ nv50_init_state_functions(struct nv50_context *nv50) nv50->pipe.delete_sampler_state = nv50_sampler_state_delete; nv50->pipe.bind_fragment_sampler_states = nv50_fp_sampler_state_bind; nv50->pipe.bind_vertex_sampler_states = nv50_vp_sampler_state_bind; - nv50->pipe.set_fragment_sampler_textures = nv50_set_fp_sampler_textures; - nv50->pipe.set_vertex_sampler_textures = nv50_set_vp_sampler_textures; + nv50->pipe.set_fragment_sampler_views = nv50_set_fp_sampler_views; + nv50->pipe.set_vertex_sampler_views = nv50_set_vp_sampler_views; + nv50->pipe.create_sampler_view = nv50_create_sampler_view; + nv50->pipe.sampler_view_destroy = nv50_sampler_view_destroy; nv50->pipe.create_rasterizer_state = nv50_rasterizer_state_create; nv50->pipe.bind_rasterizer_state = nv50_rasterizer_state_bind; @@ -778,7 +839,10 @@ nv50_init_state_functions(struct nv50_context *nv50) nv50->pipe.set_scissor_state = nv50_set_scissor_state; nv50->pipe.set_viewport_state = nv50_set_viewport_state; + nv50->pipe.create_vertex_elements_state = nv50_vtxelts_state_create; + nv50->pipe.delete_vertex_elements_state = nv50_vtxelts_state_delete; + nv50->pipe.bind_vertex_elements_state = nv50_vtxelts_state_bind; + nv50->pipe.set_vertex_buffers = nv50_set_vertex_buffers; - nv50->pipe.set_vertex_elements = nv50_set_vertex_elements; } diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c index c974cc92dcc..14c3490599d 100644 --- a/src/gallium/drivers/nv50/nv50_state_validate.c +++ b/src/gallium/drivers/nv50/nv50_state_validate.c @@ -23,15 +23,16 @@ #include "util/u_format.h" #include "nv50_context.h" +#include "nv50_resource.h" #include "nouveau/nouveau_stateobj.h" -static void -nv50_state_validate_fb(struct nv50_context *nv50) +static struct nouveau_stateobj * +validate_fb(struct nv50_context *nv50) { struct nouveau_grobj *tesla = nv50->screen->tesla; struct nouveau_stateobj *so = so_new(32, 79, 18); struct pipe_framebuffer_state *fb = &nv50->framebuffer; - unsigned i, w, h, gw = 0; + unsigned i, w = 0, h = 0, gw = 0; /* Set nr of active RTs and select RT for each colour output. * FP result 0 always goes to RT[0], bits 4 - 6 are ignored. @@ -43,7 +44,7 @@ nv50_state_validate_fb(struct nv50_context *nv50) (4 << 16) | (5 << 19) | (6 << 22) | (7 << 25)); for (i = 0; i < fb->nr_cbufs; i++) { - struct pipe_texture *pt = fb->cbufs[i]->texture; + struct pipe_resource *pt = fb->cbufs[i]->texture; struct nouveau_bo *bo = nv50_miptree(pt)->base.bo; if (!gw) { @@ -104,7 +105,7 @@ nv50_state_validate_fb(struct nv50_context *nv50) } if (fb->zsbuf) { - struct pipe_texture *pt = fb->zsbuf->texture; + struct pipe_resource *pt = fb->zsbuf->texture; struct nouveau_bo *bo = nv50_miptree(pt)->base.bo; if (!gw) { @@ -122,13 +123,13 @@ nv50_state_validate_fb(struct nv50_context *nv50) so_reloc (so, bo, fb->zsbuf->offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW | NOUVEAU_BO_RDWR, 0, 0); switch (fb->zsbuf->format) { - case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: so_data(so, NV50TCL_ZETA_FORMAT_S8Z24_UNORM); break; case PIPE_FORMAT_Z24X8_UNORM: so_data(so, NV50TCL_ZETA_FORMAT_X8Z24_UNORM); break; - case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: so_data(so, NV50TCL_ZETA_FORMAT_Z24S8_UNORM); break; case PIPE_FORMAT_Z32_FLOAT: @@ -167,12 +168,7 @@ nv50_state_validate_fb(struct nv50_context *nv50) so_data (so, w << 16); so_data (so, h << 16); - /* we set scissors to framebuffer size when they're 'turned off' */ - nv50->dirty |= NV50_NEW_SCISSOR; - so_ref(NULL, &nv50->state.scissor); - - so_ref(so, &nv50->state.fb); - so_ref(NULL, &so); + return so; } static void @@ -199,263 +195,254 @@ nv50_validate_samplers(struct nv50_context *nv50, struct nouveau_stateobj *so, } } -static void -nv50_state_emit(struct nv50_context *nv50) +static struct nouveau_stateobj * +validate_blend(struct nv50_context *nv50) { - struct nv50_screen *screen = nv50->screen; - struct nouveau_channel *chan = screen->base.channel; + struct nouveau_stateobj *so = NULL; + so_ref(nv50->blend->so, &so); + return so; +} - /* XXX: this is racy for multiple contexts active on separate - * threads. - */ - if (screen->cur_ctx != nv50) { - if (nv50->state.fb) - nv50->state.dirty |= NV50_NEW_FRAMEBUFFER; - if (nv50->state.blend) - nv50->state.dirty |= NV50_NEW_BLEND; - if (nv50->state.zsa) - nv50->state.dirty |= NV50_NEW_ZSA; - if (nv50->state.vertprog) - nv50->state.dirty |= NV50_NEW_VERTPROG; - if (nv50->state.fragprog) - nv50->state.dirty |= NV50_NEW_FRAGPROG; - if (nv50->state.geomprog) - nv50->state.dirty |= NV50_NEW_GEOMPROG; - if (nv50->state.rast) - nv50->state.dirty |= NV50_NEW_RASTERIZER; - if (nv50->state.blend_colour) - nv50->state.dirty |= NV50_NEW_BLEND_COLOUR; - if (nv50->state.stencil_ref) - nv50->state.dirty |= NV50_NEW_STENCIL_REF; - if (nv50->state.stipple) - nv50->state.dirty |= NV50_NEW_STIPPLE; - if (nv50->state.scissor) - nv50->state.dirty |= NV50_NEW_SCISSOR; - if (nv50->state.viewport) - nv50->state.dirty |= NV50_NEW_VIEWPORT; - if (nv50->state.tsc_upload) - nv50->state.dirty |= NV50_NEW_SAMPLER; - if (nv50->state.tic_upload) - nv50->state.dirty |= NV50_NEW_TEXTURE; - if (nv50->state.vtxfmt && nv50->state.vtxbuf) - nv50->state.dirty |= NV50_NEW_ARRAYS; - screen->cur_ctx = nv50; - } +static struct nouveau_stateobj * +validate_zsa(struct nv50_context *nv50) +{ + struct nouveau_stateobj *so = NULL; + so_ref(nv50->zsa->so, &so); + return so; +} - if (nv50->state.dirty & NV50_NEW_FRAMEBUFFER) - so_emit(chan, nv50->state.fb); - if (nv50->state.dirty & NV50_NEW_BLEND) - so_emit(chan, nv50->state.blend); - if (nv50->state.dirty & NV50_NEW_ZSA) - so_emit(chan, nv50->state.zsa); - if (nv50->state.dirty & NV50_NEW_VERTPROG) - so_emit(chan, nv50->state.vertprog); - if (nv50->state.dirty & NV50_NEW_FRAGPROG) - so_emit(chan, nv50->state.fragprog); - if (nv50->state.dirty & NV50_NEW_GEOMPROG && nv50->state.geomprog) - so_emit(chan, nv50->state.geomprog); - if (nv50->state.dirty & (NV50_NEW_FRAGPROG | NV50_NEW_VERTPROG | - NV50_NEW_GEOMPROG | NV50_NEW_RASTERIZER)) - so_emit(chan, nv50->state.fp_linkage); - if ((nv50->state.dirty & (NV50_NEW_VERTPROG | NV50_NEW_GEOMPROG)) - && nv50->state.gp_linkage) - so_emit(chan, nv50->state.gp_linkage); - if (nv50->state.dirty & NV50_NEW_RASTERIZER) - so_emit(chan, nv50->state.rast); - if (nv50->state.dirty & NV50_NEW_BLEND_COLOUR) - so_emit(chan, nv50->state.blend_colour); - if (nv50->state.dirty & NV50_NEW_STENCIL_REF) - so_emit(chan, nv50->state.stencil_ref); - if (nv50->state.dirty & NV50_NEW_STIPPLE) - so_emit(chan, nv50->state.stipple); - if (nv50->state.dirty & NV50_NEW_SCISSOR) - so_emit(chan, nv50->state.scissor); - if (nv50->state.dirty & NV50_NEW_VIEWPORT) - so_emit(chan, nv50->state.viewport); - if (nv50->state.dirty & NV50_NEW_SAMPLER) - so_emit(chan, nv50->state.tsc_upload); - if (nv50->state.dirty & NV50_NEW_TEXTURE) - so_emit(chan, nv50->state.tic_upload); - if (nv50->state.dirty & NV50_NEW_ARRAYS) { - so_emit(chan, nv50->state.vtxfmt); - so_emit(chan, nv50->state.vtxbuf); - if (nv50->state.vtxattr) - so_emit(chan, nv50->state.vtxattr); - } - nv50->state.dirty = 0; +static struct nouveau_stateobj * +validate_rast(struct nv50_context *nv50) +{ + struct nouveau_stateobj *so = NULL; + so_ref(nv50->rasterizer->so, &so); + return so; +} + +static struct nouveau_stateobj * +validate_blend_colour(struct nv50_context *nv50) +{ + struct nouveau_grobj *tesla = nv50->screen->tesla; + struct nouveau_stateobj *so = so_new(1, 4, 0); + + so_method(so, tesla, NV50TCL_BLEND_COLOR(0), 4); + so_data (so, fui(nv50->blend_colour.color[0])); + so_data (so, fui(nv50->blend_colour.color[1])); + so_data (so, fui(nv50->blend_colour.color[2])); + so_data (so, fui(nv50->blend_colour.color[3])); + return so; } -void -nv50_state_flush_notify(struct nouveau_channel *chan) +static struct nouveau_stateobj * +validate_stencil_ref(struct nv50_context *nv50) { - struct nv50_context *nv50 = chan->user_private; + struct nouveau_grobj *tesla = nv50->screen->tesla; + struct nouveau_stateobj *so = so_new(2, 2, 0); - if (nv50->state.tic_upload && !(nv50->dirty & NV50_NEW_TEXTURE)) - so_emit(chan, nv50->state.tic_upload); + so_method(so, tesla, NV50TCL_STENCIL_FRONT_FUNC_REF, 1); + so_data (so, nv50->stencil_ref.ref_value[0]); + so_method(so, tesla, NV50TCL_STENCIL_BACK_FUNC_REF, 1); + so_data (so, nv50->stencil_ref.ref_value[1]); + return so; +} - so_emit_reloc_markers(chan, nv50->state.fb); - so_emit_reloc_markers(chan, nv50->state.vertprog); - so_emit_reloc_markers(chan, nv50->state.fragprog); - so_emit_reloc_markers(chan, nv50->state.vtxbuf); - so_emit_reloc_markers(chan, nv50->screen->static_init); +static struct nouveau_stateobj * +validate_stipple(struct nv50_context *nv50) +{ + struct nouveau_grobj *tesla = nv50->screen->tesla; + struct nouveau_stateobj *so = so_new(1, 32, 0); + int i; - if (nv50->state.instbuf) - so_emit_reloc_markers(chan, nv50->state.instbuf); + so_method(so, tesla, NV50TCL_POLYGON_STIPPLE_PATTERN(0), 32); + for (i = 0; i < 32; i++) + so_data(so, util_bswap32(nv50->stipple.stipple[i])); + return so; } -boolean -nv50_state_validate(struct nv50_context *nv50) +static struct nouveau_stateobj * +validate_scissor(struct nv50_context *nv50) { struct nouveau_grobj *tesla = nv50->screen->tesla; + struct pipe_scissor_state *s = &nv50->scissor; struct nouveau_stateobj *so; - unsigned i; - - if (nv50->dirty & NV50_NEW_FRAMEBUFFER) - nv50_state_validate_fb(nv50); - if (nv50->dirty & NV50_NEW_BLEND) - so_ref(nv50->blend->so, &nv50->state.blend); + so = so_new(1, 2, 0); + so_method(so, tesla, NV50TCL_SCISSOR_HORIZ(0), 2); + so_data (so, (s->maxx << 16) | s->minx); + so_data (so, (s->maxy << 16) | s->miny); + return so; +} - if (nv50->dirty & NV50_NEW_ZSA) - so_ref(nv50->zsa->so, &nv50->state.zsa); +static struct nouveau_stateobj * +validate_viewport(struct nv50_context *nv50) +{ + struct nouveau_grobj *tesla = nv50->screen->tesla; + struct nouveau_stateobj *so = so_new(5, 9, 0); + + so_method(so, tesla, NV50TCL_VIEWPORT_TRANSLATE_X(0), 3); + so_data (so, fui(nv50->viewport.translate[0])); + so_data (so, fui(nv50->viewport.translate[1])); + so_data (so, fui(nv50->viewport.translate[2])); + so_method(so, tesla, NV50TCL_VIEWPORT_SCALE_X(0), 3); + so_data (so, fui(nv50->viewport.scale[0])); + so_data (so, fui(nv50->viewport.scale[1])); + so_data (so, fui(nv50->viewport.scale[2])); + + so_method(so, tesla, NV50TCL_VIEWPORT_TRANSFORM_EN, 1); + so_data (so, 1); + /* 0x0000 = remove whole primitive only (xyz) + * 0x1018 = remove whole primitive only (xy), clamp z + * 0x1080 = clip primitive (xyz) + * 0x1098 = clip primitive (xy), clamp z + */ + so_method(so, tesla, NV50TCL_VIEW_VOLUME_CLIP_CTRL, 1); + so_data (so, 0x1080); + /* no idea what 0f90 does */ + so_method(so, tesla, 0x0f90, 1); + so_data (so, 0); - if (nv50->dirty & (NV50_NEW_VERTPROG | NV50_NEW_VERTPROG_CB)) - nv50_vertprog_validate(nv50); + return so; +} - if (nv50->dirty & (NV50_NEW_FRAGPROG | NV50_NEW_FRAGPROG_CB)) - nv50_fragprog_validate(nv50); +static struct nouveau_stateobj * +validate_sampler(struct nv50_context *nv50) +{ + struct nouveau_grobj *tesla = nv50->screen->tesla; + struct nouveau_stateobj *so; + unsigned nr = 0, i; - if (nv50->dirty & (NV50_NEW_GEOMPROG | NV50_NEW_GEOMPROG_CB)) - nv50_geomprog_validate(nv50); + for (i = 0; i < 3; ++i) + nr += nv50->sampler_nr[i]; - if (nv50->dirty & (NV50_NEW_FRAGPROG | NV50_NEW_VERTPROG | - NV50_NEW_GEOMPROG | NV50_NEW_RASTERIZER)) - nv50_fp_linkage_validate(nv50); + so = so_new(1 + 5 * 3, 1 + 19 * 3 + nr * 8, 3 * 2); - if (nv50->dirty & (NV50_NEW_GEOMPROG | NV50_NEW_VERTPROG)) - nv50_gp_linkage_validate(nv50); + nv50_validate_samplers(nv50, so, 0); /* VP */ + nv50_validate_samplers(nv50, so, 2); /* FP */ - if (nv50->dirty & NV50_NEW_RASTERIZER) - so_ref(nv50->rasterizer->so, &nv50->state.rast); + so_method(so, tesla, 0x1334, 1); /* flush TSC */ + so_data (so, 0); - if (nv50->dirty & NV50_NEW_BLEND_COLOUR) { - so = so_new(1, 4, 0); - so_method(so, tesla, NV50TCL_BLEND_COLOR(0), 4); - so_data (so, fui(nv50->blend_colour.color[0])); - so_data (so, fui(nv50->blend_colour.color[1])); - so_data (so, fui(nv50->blend_colour.color[2])); - so_data (so, fui(nv50->blend_colour.color[3])); - so_ref(so, &nv50->state.blend_colour); - so_ref(NULL, &so); - } + return so; +} - if (nv50->dirty & NV50_NEW_STENCIL_REF) { - so = so_new(2, 2, 0); - so_method(so, tesla, NV50TCL_STENCIL_FRONT_FUNC_REF, 1); - so_data (so, nv50->stencil_ref.ref_value[0]); - so_method(so, tesla, NV50TCL_STENCIL_BACK_FUNC_REF, 1); - so_data (so, nv50->stencil_ref.ref_value[1]); - so_ref(so, &nv50->state.stencil_ref); - so_ref(NULL, &so); - } +static struct nouveau_stateobj * +validate_vtxbuf(struct nv50_context *nv50) +{ + struct nouveau_stateobj *so = NULL; + so_ref(nv50->state.vtxbuf, &so); + return so; +} - if (nv50->dirty & NV50_NEW_STIPPLE) { - so = so_new(1, 32, 0); - so_method(so, tesla, NV50TCL_POLYGON_STIPPLE_PATTERN(0), 32); - for (i = 0; i < 32; i++) - so_data(so, util_bswap32(nv50->stipple.stipple[i])); - so_ref(so, &nv50->state.stipple); - so_ref(NULL, &so); - } +static struct nouveau_stateobj * +validate_vtxattr(struct nv50_context *nv50) +{ + struct nouveau_stateobj *so = NULL; + so_ref(nv50->state.vtxattr, &so); + return so; +} - if (nv50->dirty & (NV50_NEW_SCISSOR | NV50_NEW_RASTERIZER)) { - struct pipe_rasterizer_state *rast = &nv50->rasterizer->pipe; - struct pipe_scissor_state *s = &nv50->scissor; +struct state_validate { + struct nouveau_stateobj *(*func)(struct nv50_context *nv50); + unsigned states; +} validate_list[] = { + { validate_fb , NV50_NEW_FRAMEBUFFER }, + { validate_blend , NV50_NEW_BLEND }, + { validate_zsa , NV50_NEW_ZSA }, + { nv50_vertprog_validate , NV50_NEW_VERTPROG | NV50_NEW_VERTPROG_CB }, + { nv50_fragprog_validate , NV50_NEW_FRAGPROG | NV50_NEW_FRAGPROG_CB }, + { nv50_geomprog_validate , NV50_NEW_GEOMPROG | NV50_NEW_GEOMPROG_CB }, + { nv50_fp_linkage_validate, NV50_NEW_VERTPROG | NV50_NEW_GEOMPROG | + NV50_NEW_FRAGPROG | NV50_NEW_RASTERIZER }, + { nv50_gp_linkage_validate, NV50_NEW_VERTPROG | NV50_NEW_GEOMPROG }, + { validate_rast , NV50_NEW_RASTERIZER }, + { validate_blend_colour , NV50_NEW_BLEND_COLOUR }, + { validate_stencil_ref , NV50_NEW_STENCIL_REF }, + { validate_stipple , NV50_NEW_STIPPLE }, + { validate_scissor , NV50_NEW_SCISSOR }, + { validate_viewport , NV50_NEW_VIEWPORT }, + { validate_sampler , NV50_NEW_SAMPLER }, + { nv50_tex_validate , NV50_NEW_TEXTURE | NV50_NEW_SAMPLER }, + { nv50_vbo_validate , NV50_NEW_ARRAYS }, + { validate_vtxbuf , NV50_NEW_ARRAYS }, + { validate_vtxattr , NV50_NEW_ARRAYS }, + {} +}; +#define validate_list_len (sizeof(validate_list) / sizeof(validate_list[0])) - if (nv50->state.scissor && - (rast->scissor == 0 && nv50->state.scissor_enabled == 0)) - goto scissor_uptodate; - nv50->state.scissor_enabled = rast->scissor; +boolean +nv50_state_validate(struct nv50_context *nv50, unsigned wait_dwords) +{ + struct nouveau_channel *chan = nv50->screen->base.channel; + struct nouveau_grobj *tesla = nv50->screen->tesla; + unsigned nr_relocs = 128, nr_dwords = wait_dwords + 128 + 4; + int ret, i; - so = so_new(1, 2, 0); - so_method(so, tesla, NV50TCL_SCISSOR_HORIZ(0), 2); - if (nv50->state.scissor_enabled) { - so_data(so, (s->maxx << 16) | s->minx); - so_data(so, (s->maxy << 16) | s->miny); - } else { - so_data(so, (nv50->framebuffer.width << 16)); - so_data(so, (nv50->framebuffer.height << 16)); - } - so_ref(so, &nv50->state.scissor); - so_ref(NULL, &so); - nv50->state.dirty |= NV50_NEW_SCISSOR; - } -scissor_uptodate: - - if (nv50->dirty & (NV50_NEW_VIEWPORT | NV50_NEW_RASTERIZER)) { - if (nv50->state.viewport && - !(nv50->dirty & NV50_NEW_VIEWPORT)) - goto viewport_uptodate; - - so = so_new(5, 9, 0); - so_method(so, tesla, NV50TCL_VIEWPORT_TRANSLATE_X(0), 3); - so_data (so, fui(nv50->viewport.translate[0])); - so_data (so, fui(nv50->viewport.translate[1])); - so_data (so, fui(nv50->viewport.translate[2])); - so_method(so, tesla, NV50TCL_VIEWPORT_SCALE_X(0), 3); - so_data (so, fui(nv50->viewport.scale[0])); - so_data (so, fui(nv50->viewport.scale[1])); - so_data (so, fui(nv50->viewport.scale[2])); - - so_method(so, tesla, NV50TCL_VIEWPORT_TRANSFORM_EN, 1); - so_data (so, 1); - /* 0x0000 = remove whole primitive only (xyz) - * 0x1018 = remove whole primitive only (xy), clamp z - * 0x1080 = clip primitive (xyz) - * 0x1098 = clip primitive (xy), clamp z - */ - so_method(so, tesla, NV50TCL_VIEW_VOLUME_CLIP_CTRL, 1); - so_data (so, 0x1080); - /* no idea what 0f90 does */ - so_method(so, tesla, 0x0f90, 1); - so_data (so, 0); + for (i = 0; i < validate_list_len; i++) { + struct state_validate *validate = &validate_list[i]; + struct nouveau_stateobj *so; - so_ref(so, &nv50->state.viewport); - so_ref(NULL, &so); - nv50->state.dirty |= NV50_NEW_VIEWPORT; - } -viewport_uptodate: + if (!(nv50->dirty & validate->states)) + continue; - if (nv50->dirty & NV50_NEW_SAMPLER) { - unsigned nr = 0; + so = validate->func(nv50); + if (!so) + continue; - for (i = 0; i < PIPE_SHADER_TYPES; ++i) - nr += nv50->sampler_nr[i]; + nr_dwords += (so->total + so->cur); + nr_relocs += so->cur_reloc; - so = so_new(1 + 5 * PIPE_SHADER_TYPES, - 1 + 19 * PIPE_SHADER_TYPES + nr * 8, - PIPE_SHADER_TYPES * 2); + so_ref(so, &nv50->state.hw[i]); + so_ref(NULL, &so); + nv50->state.hw_dirty |= (1 << i); + } + nv50->dirty = 0; - nv50_validate_samplers(nv50, so, PIPE_SHADER_VERTEX); - nv50_validate_samplers(nv50, so, PIPE_SHADER_FRAGMENT); + if (nv50->screen->cur_ctx != nv50) { + for (i = 0; i < validate_list_len; i++) { + if (!nv50->state.hw[i] || + (nv50->state.hw_dirty & (1 << i))) + continue; - so_method(so, tesla, 0x1334, 1); /* flush TSC */ - so_data (so, 0); + nr_dwords += (nv50->state.hw[i]->total + + nv50->state.hw[i]->cur); + nr_relocs += nv50->state.hw[i]->cur_reloc; + nv50->state.hw_dirty |= (1 << i); + } - so_ref(so, &nv50->state.tsc_upload); - so_ref(NULL, &so); + nv50->screen->cur_ctx = nv50; } - if (nv50->dirty & (NV50_NEW_TEXTURE | NV50_NEW_SAMPLER)) - nv50_tex_validate(nv50); + ret = MARK_RING(chan, nr_dwords, nr_relocs); + if (ret) { + debug_printf("MARK_RING(%d, %d) failed: %d\n", + nr_dwords, nr_relocs, ret); + return FALSE; + } - if (nv50->dirty & NV50_NEW_ARRAYS) - nv50_vbo_validate(nv50); + while (nv50->state.hw_dirty) { + i = ffs(nv50->state.hw_dirty) - 1; + nv50->state.hw_dirty &= ~(1 << i); - nv50->state.dirty |= nv50->dirty; - nv50->dirty = 0; - nv50_state_emit(nv50); + so_emit(chan, nv50->state.hw[i]); + } + /* Yes, really, we need to do this. If a buffer that is referenced + * on the hardware isn't part of changed state above, without doing + * this the kernel is given no clue that the buffer is being used + * still. This can cause all sorts of fun issues. + */ + nv50_tex_relocs(nv50); + so_emit_reloc_markers(chan, nv50->state.hw[0]); /* fb */ + so_emit_reloc_markers(chan, nv50->state.hw[3]); /* vp */ + so_emit_reloc_markers(chan, nv50->state.hw[4]); /* fp */ + so_emit_reloc_markers(chan, nv50->state.hw[17]); /* vb */ + nv50_screen_relocs(nv50->screen); + + /* No idea.. */ + BEGIN_RING(chan, tesla, 0x142c, 1); + OUT_RING (chan, 0); + BEGIN_RING(chan, tesla, 0x142c, 1); + OUT_RING (chan, 0); return TRUE; } diff --git a/src/gallium/drivers/nv50/nv50_surface.c b/src/gallium/drivers/nv50/nv50_surface.c index cabd148bc5b..c2d9e835260 100644 --- a/src/gallium/drivers/nv50/nv50_surface.c +++ b/src/gallium/drivers/nv50/nv50_surface.c @@ -24,10 +24,12 @@ #include <stdint.h> #include "nouveau/nouveau_pushbuf.h" #include "nv50_context.h" +#include "nv50_resource.h" #include "pipe/p_defines.h" #include "util/u_inlines.h" #include "util/u_tile.h" +#include "util/u_format.h" static INLINE int nv50_format(enum pipe_format format) @@ -37,10 +39,35 @@ nv50_format(enum pipe_format format) return NV50_2D_DST_FORMAT_A8R8G8B8_UNORM; case PIPE_FORMAT_B8G8R8X8_UNORM: return NV50_2D_DST_FORMAT_X8R8G8B8_UNORM; + case PIPE_FORMAT_B8G8R8A8_SRGB: + return NV50_2D_DST_FORMAT_A8R8G8B8_SRGB; + case PIPE_FORMAT_B8G8R8X8_SRGB: + return NV50_2D_DST_FORMAT_X8R8G8B8_SRGB; case PIPE_FORMAT_B5G6R5_UNORM: return NV50_2D_DST_FORMAT_R5G6B5_UNORM; + case PIPE_FORMAT_B5G5R5A1_UNORM: + return NV50_2D_DST_FORMAT_A1R5G5B5_UNORM; case PIPE_FORMAT_A8_UNORM: + case PIPE_FORMAT_I8_UNORM: + case PIPE_FORMAT_L8_UNORM: return NV50_2D_DST_FORMAT_R8_UNORM; + case PIPE_FORMAT_R32G32B32A32_FLOAT: + return NV50_2D_DST_FORMAT_R32G32B32A32_FLOAT; + case PIPE_FORMAT_R32G32B32_FLOAT: + return NV50_2D_DST_FORMAT_R32G32B32X32_FLOAT; + case PIPE_FORMAT_Z32_FLOAT: + return NV50_2D_DST_FORMAT_R32_FLOAT; + + /* only because we require src format == dst format: */ + case PIPE_FORMAT_R16G16_SNORM: + case PIPE_FORMAT_R16G16_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: + return NV50_2D_DST_FORMAT_A8R8G8B8_UNORM; + case PIPE_FORMAT_L8A8_UNORM: + case PIPE_FORMAT_B4G4R4A4_UNORM: + return NV50_2D_DST_FORMAT_R16_UNORM; + default: return -1; } @@ -57,8 +84,11 @@ nv50_surface_set(struct nv50_screen *screen, struct pipe_surface *ps, int dst) int flags = NOUVEAU_BO_VRAM | (dst ? NOUVEAU_BO_WR : NOUVEAU_BO_RD); format = nv50_format(ps->format); - if (format < 0) + if (format < 0) { + NOUVEAU_ERR("invalid/unsupported surface format: %s\n", + util_format_name(ps->format)); return 1; + } if (!bo->tile_flags) { MARK_RING (chan, 9, 2); /* flush on lack of space or relocs */ diff --git a/src/gallium/drivers/nv50/nv50_tex.c b/src/gallium/drivers/nv50/nv50_tex.c index de0560e20cd..5ea0c1d7264 100644 --- a/src/gallium/drivers/nv50/nv50_tex.c +++ b/src/gallium/drivers/nv50/nv50_tex.c @@ -22,32 +22,24 @@ #include "nv50_context.h" #include "nv50_texture.h" +#include "nv50_resource.h" #include "nouveau/nouveau_stateobj.h" +#include "nouveau/nouveau_reloc.h" #include "util/u_format.h" #define _MIXED(pf, t0, t1, t2, t3, cr, cg, cb, ca, f) \ -{ \ - PIPE_FORMAT_##pf, \ +[PIPE_FORMAT_##pf] = ( \ NV50TIC_0_0_MAPR_##cr | NV50TIC_0_0_TYPER_##t0 | \ NV50TIC_0_0_MAPG_##cg | NV50TIC_0_0_TYPEG_##t1 | \ NV50TIC_0_0_MAPB_##cb | NV50TIC_0_0_TYPEB_##t2 | \ NV50TIC_0_0_MAPA_##ca | NV50TIC_0_0_TYPEA_##t3 | \ - NV50TIC_0_0_FMT_##f \ -} + NV50TIC_0_0_FMT_##f) #define _(pf, t, cr, cg, cb, ca, f) _MIXED(pf, t, t, t, t, cr, cg, cb, ca, f) -struct nv50_texture_format { - enum pipe_format pf; - uint32_t hw; -}; - -#define NV50_TEX_FORMAT_LIST_SIZE \ - (sizeof(nv50_tex_format_list) / sizeof(struct nv50_texture_format)) - -static const struct nv50_texture_format nv50_tex_format_list[] = +static const uint32_t nv50_texture_formats[PIPE_FORMAT_COUNT] = { _(B8G8R8A8_UNORM, UNORM, C2, C1, C0, C3, 8_8_8_8), _(B8G8R8A8_SRGB, UNORM, C2, C1, C0, C3, 8_8_8_8), @@ -59,18 +51,20 @@ static const struct nv50_texture_format nv50_tex_format_list[] = _(B5G6R5_UNORM, UNORM, C2, C1, C0, ONE, 5_6_5), _(L8_UNORM, UNORM, C0, C0, C0, ONE, 8), + _(L8_SRGB, UNORM, C0, C0, C0, ONE, 8), _(A8_UNORM, UNORM, ZERO, ZERO, ZERO, C0, 8), _(I8_UNORM, UNORM, C0, C0, C0, C0, 8), _(L8A8_UNORM, UNORM, C0, C0, C0, C1, 8_8), + _(L8A8_SRGB, UNORM, C0, C0, C0, C1, 8_8), _(DXT1_RGB, UNORM, C0, C1, C2, ONE, DXT1), _(DXT1_RGBA, UNORM, C0, C1, C2, C3, DXT1), _(DXT3_RGBA, UNORM, C0, C1, C2, C3, DXT3), _(DXT5_RGBA, UNORM, C0, C1, C2, C3, DXT5), - _MIXED(S8Z24_UNORM, UINT, UNORM, UINT, UINT, C1, C1, C1, ONE, 24_8), - _MIXED(Z24S8_UNORM, UNORM, UINT, UINT, UINT, C0, C0, C0, ONE, 8_24), + _MIXED(S8_USCALED_Z24_UNORM, UINT, UNORM, UINT, UINT, C1, C1, C1, ONE, 24_8), + _MIXED(Z24_UNORM_S8_USCALED, UNORM, UINT, UINT, UINT, C0, C0, C0, ONE, 8_24), _(R16G16B16A16_SNORM, UNORM, C0, C1, C2, C3, 16_16_16_16), _(R16G16B16A16_UNORM, SNORM, C0, C1, C2, C3, 16_16_16_16), @@ -80,149 +74,211 @@ static const struct nv50_texture_format nv50_tex_format_list[] = _(R16G16_UNORM, UNORM, C0, C1, ZERO, ONE, 16_16), _MIXED(Z32_FLOAT, FLOAT, UINT, UINT, UINT, C0, C0, C0, ONE, 32_DEPTH) - }; #undef _ #undef _MIXED -static int -nv50_tex_construct(struct nv50_context *nv50, struct nouveau_stateobj *so, - struct nv50_miptree *mt, int unit, unsigned p) +static INLINE uint32_t +nv50_tic_swizzle(uint32_t tc, unsigned swz) +{ + switch (swz) { + case PIPE_SWIZZLE_RED: + return (tc & NV50TIC_0_0_MAPR_MASK) >> NV50TIC_0_0_MAPR_SHIFT; + case PIPE_SWIZZLE_GREEN: + return (tc & NV50TIC_0_0_MAPG_MASK) >> NV50TIC_0_0_MAPG_SHIFT; + case PIPE_SWIZZLE_BLUE: + return (tc & NV50TIC_0_0_MAPB_MASK) >> NV50TIC_0_0_MAPB_SHIFT; + case PIPE_SWIZZLE_ALPHA: + return (tc & NV50TIC_0_0_MAPA_MASK) >> NV50TIC_0_0_MAPA_SHIFT; + case PIPE_SWIZZLE_ONE: + return 7; + case PIPE_SWIZZLE_ZERO: + default: + return 0; + } +} + +boolean +nv50_tex_construct(struct nv50_sampler_view *view) { - unsigned i; - uint32_t mode; const struct util_format_description *desc; + struct nv50_miptree *mt = nv50_miptree(view->pipe.texture); + uint32_t swz[4], *tic = view->tic; - for (i = 0; i < NV50_TEX_FORMAT_LIST_SIZE; i++) - if (nv50_tex_format_list[i].pf == mt->base.base.format) - break; - if (i == NV50_TEX_FORMAT_LIST_SIZE) - return 1; - - if (nv50->sampler[p][unit]->normalized) - mode = 0x50001000 | (1 << 31); - else { - mode = 0x50001000 | (7 << 14); - assert(mt->base.base.target == PIPE_TEXTURE_2D); - } + tic[0] = nv50_texture_formats[view->pipe.format]; - mode |= ((mt->base.bo->tile_mode & 0x0f) << 22) | - ((mt->base.bo->tile_mode & 0xf0) << 21); + swz[0] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_r); + swz[1] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_g); + swz[2] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_b); + swz[3] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_a); + view->tic[0] = (tic[0] & ~NV50TIC_0_0_SWIZZLE_MASK) | + (swz[0] << NV50TIC_0_0_MAPR_SHIFT) | + (swz[1] << NV50TIC_0_0_MAPG_SHIFT) | + (swz[2] << NV50TIC_0_0_MAPB_SHIFT) | + (swz[3] << NV50TIC_0_0_MAPA_SHIFT); - desc = util_format_description(mt->base.base.format); - assert(desc); + tic[2] = 0x50001000; + tic[2] |= ((mt->base.bo->tile_mode & 0x0f) << 22) | + ((mt->base.bo->tile_mode & 0xf0) << 21); + desc = util_format_description(mt->base.base.format); if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB) - mode |= 0x0400; + tic[2] |= NV50TIC_0_2_COLORSPACE_SRGB; switch (mt->base.base.target) { case PIPE_TEXTURE_1D: + tic[2] |= NV50TIC_0_2_TARGET_1D; break; case PIPE_TEXTURE_2D: - mode |= (1 << 14); + tic[2] |= NV50TIC_0_2_TARGET_2D; break; case PIPE_TEXTURE_3D: - mode |= (2 << 14); + tic[2] |= NV50TIC_0_2_TARGET_3D; break; case PIPE_TEXTURE_CUBE: - mode |= (3 << 14); + tic[2] |= NV50TIC_0_2_TARGET_CUBE; break; default: - assert(!"unsupported texture target"); - break; + NOUVEAU_ERR("invalid texture target: %d\n", + mt->base.base.target); + return FALSE; } - so_data (so, nv50_tex_format_list[i].hw); - so_reloc(so, mt->base.bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW | - NOUVEAU_BO_RD, 0, 0); - so_data (so, mode); - so_data (so, 0x00300000); - so_data (so, mt->base.base.width0 | (1 << 31)); - so_data (so, (mt->base.base.last_level << 28) | - (mt->base.base.depth0 << 16) | mt->base.base.height0); - so_data (so, 0x03000000); - so_data (so, mt->base.base.last_level << 4); - - return 0; -} + tic[3] = 0x00300000; + + tic[4] = (1 << 31) | mt->base.base.width0; + tic[5] = (mt->base.base.last_level << 28) | + (mt->base.base.depth0 << 16) | mt->base.base.height0; + + tic[6] = 0x03000000; -#ifndef NV50TCL_BIND_TIC -#define NV50TCL_BIND_TIC(n) (0x1448 + 8 * n) -#endif + tic[7] = (view->pipe.last_level << 4) | view->pipe.first_level; -static boolean + return TRUE; +} + +static int nv50_validate_textures(struct nv50_context *nv50, struct nouveau_stateobj *so, unsigned p) { - static const unsigned p_remap[PIPE_SHADER_TYPES] = { 0, 2, 1 }; - struct nouveau_grobj *eng2d = nv50->screen->eng2d; struct nouveau_grobj *tesla = nv50->screen->tesla; - unsigned unit, j, p_hw = p_remap[p]; + unsigned unit, j; + + const unsigned rll = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW; + const unsigned rlh = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH + | NOUVEAU_BO_OR; nv50_so_init_sifc(nv50, so, nv50->screen->tic, NOUVEAU_BO_VRAM, - p * (32 * 8 * 4), nv50->miptree_nr[p] * 8 * 4); + p * (32 * 8 * 4), nv50->sampler_view_nr[p] * 8 * 4); - for (unit = 0; unit < nv50->miptree_nr[p]; ++unit) { - struct nv50_miptree *mt = nv50->miptree[p][unit]; + for (unit = 0; unit < nv50->sampler_view_nr[p]; ++unit) { + struct nv50_sampler_view *view = + nv50_sampler_view(nv50->sampler_views[p][unit]); so_method(so, eng2d, NV50_2D_SIFC_DATA | (2 << 29), 8); - if (mt) { - if (nv50_tex_construct(nv50, so, mt, unit, p)) - return FALSE; + if (view) { + uint32_t tic2 = view->tic[2]; + struct nv50_miptree *mt = + nv50_miptree(view->pipe.texture); + + tic2 &= ~NV50TIC_0_2_NORMALIZED_COORDS; + if (nv50->sampler[p][unit]->normalized) + tic2 |= NV50TIC_0_2_NORMALIZED_COORDS; + view->tic[2] = tic2; + + so_data (so, view->tic[0]); + so_reloc (so, mt->base.bo, 0, rll, 0, 0); + so_reloc (so, mt->base.bo, 0, rlh, tic2, tic2); + so_datap (so, &view->tic[3], 5); + /* Set TEX insn $t src binding $unit in program type p * to TIC, TSC entry (32 * p + unit), mark valid (1). */ - so_method(so, tesla, NV50TCL_BIND_TIC(p_hw), 1); + so_method(so, tesla, NV50TCL_BIND_TIC(p), 1); so_data (so, ((32 * p + unit) << 9) | (unit << 1) | 1); } else { for (j = 0; j < 8; ++j) so_data(so, 0); - so_method(so, tesla, NV50TCL_BIND_TIC(p_hw), 1); + so_method(so, tesla, NV50TCL_BIND_TIC(p), 1); so_data (so, (unit << 1) | 0); } } - for (; unit < nv50->state.miptree_nr[p]; unit++) { + for (; unit < nv50->state.sampler_view_nr[p]; unit++) { /* Make other bindings invalid. */ - so_method(so, tesla, NV50TCL_BIND_TIC(p_hw), 1); + so_method(so, tesla, NV50TCL_BIND_TIC(p), 1); so_data (so, (unit << 1) | 0); } - nv50->state.miptree_nr[p] = nv50->miptree_nr[p]; + nv50->state.sampler_view_nr[p] = nv50->sampler_view_nr[p]; return TRUE; } +static void +nv50_emit_texture_relocs(struct nv50_context *nv50, int prog) +{ + struct nouveau_channel *chan = nv50->screen->base.channel; + struct nouveau_bo *tic = nv50->screen->tic; + int unit; + + for (unit = 0; unit < nv50->sampler_view_nr[prog]; unit++) { + struct nv50_sampler_view *view; + struct nv50_miptree *mt; + const unsigned base = ((prog * 32) + unit) * 32; + + view = nv50_sampler_view(nv50->sampler_views[prog][unit]); + if (!view) + continue; + mt = nv50_miptree(view->pipe.texture); + + nouveau_reloc_emit(chan, tic, base + 4, NULL, mt->base.bo, 0, 0, + NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | + NOUVEAU_BO_LOW, 0, 0); + nouveau_reloc_emit(chan, tic, base + 8, NULL, mt->base.bo, 0, 0, + NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | + NOUVEAU_BO_HIGH, view->tic[2], view->tic[2]); + } +} + void +nv50_tex_relocs(struct nv50_context *nv50) +{ + nv50_emit_texture_relocs(nv50, 2); /* FP */ + nv50_emit_texture_relocs(nv50, 0); /* VP */ +} + +struct nouveau_stateobj * nv50_tex_validate(struct nv50_context *nv50) { struct nouveau_stateobj *so; struct nouveau_grobj *tesla = nv50->screen->tesla; - unsigned p, start, push, nrlc; - - for (nrlc = 0, start = 0, push = 0, p = 0; p < PIPE_SHADER_TYPES; ++p) { - start += MAX2(nv50->miptree_nr[p], nv50->state.miptree_nr[p]); - push += MAX2(nv50->miptree_nr[p], nv50->state.miptree_nr[p]); - nrlc += nv50->miptree_nr[p]; + unsigned p, m = 0, d = 0, r = 0; + + for (p = 0; p < 3; ++p) { + unsigned nr = MAX2(nv50->sampler_view_nr[p], + nv50->state.sampler_view_nr[p]); + m += nr; + d += nr; + r += nv50->sampler_view_nr[p]; } - start = start * 2 + 4 * PIPE_SHADER_TYPES + 2; - push = push * 9 + 19 * PIPE_SHADER_TYPES + 2; - nrlc = nrlc * 2 + 2 * PIPE_SHADER_TYPES; + m = m * 2 + 3 * 4 + 1; + d = d * 9 + 3 * 19 + 1; + r = r * 2 + 3 * 2; - so = so_new(start, push, nrlc); + so = so_new(m, d, r); - if (nv50_validate_textures(nv50, so, PIPE_SHADER_VERTEX) == FALSE || - nv50_validate_textures(nv50, so, PIPE_SHADER_FRAGMENT) == FALSE) { + if (nv50_validate_textures(nv50, so, 0) == FALSE || + nv50_validate_textures(nv50, so, 2) == FALSE) { so_ref(NULL, &so); NOUVEAU_ERR("failed tex validate\n"); - return; + return NULL; } so_method(so, tesla, 0x1330, 1); /* flush TIC */ so_data (so, 0); - so_ref(so, &nv50->state.tic_upload); - so_ref(NULL, &so); + return so; } diff --git a/src/gallium/drivers/nv50/nv50_texture.h b/src/gallium/drivers/nv50/nv50_texture.h index b870302019a..3475d3e4326 100644 --- a/src/gallium/drivers/nv50/nv50_texture.h +++ b/src/gallium/drivers/nv50/nv50_texture.h @@ -7,7 +7,9 @@ */ /* Texture image control block */ +#define NV50TIC_0_0_SWIZZLE_MASK 0x3ffc0000 #define NV50TIC_0_0_MAPA_MASK 0x38000000 +#define NV50TIC_0_0_MAPA_SHIFT 27 #define NV50TIC_0_0_MAPA_ZERO 0x00000000 #define NV50TIC_0_0_MAPA_C0 0x10000000 #define NV50TIC_0_0_MAPA_C1 0x18000000 @@ -15,6 +17,7 @@ #define NV50TIC_0_0_MAPA_C3 0x28000000 #define NV50TIC_0_0_MAPA_ONE 0x38000000 #define NV50TIC_0_0_MAPB_MASK 0x07000000 +#define NV50TIC_0_0_MAPB_SHIFT 24 #define NV50TIC_0_0_MAPB_ZERO 0x00000000 #define NV50TIC_0_0_MAPB_C0 0x02000000 #define NV50TIC_0_0_MAPB_C1 0x03000000 @@ -22,6 +25,7 @@ #define NV50TIC_0_0_MAPB_C3 0x05000000 #define NV50TIC_0_0_MAPB_ONE 0x07000000 #define NV50TIC_0_0_MAPG_MASK 0x00e00000 +#define NV50TIC_0_0_MAPG_SHIFT 21 #define NV50TIC_0_0_MAPG_ZERO 0x00000000 #define NV50TIC_0_0_MAPG_C0 0x00400000 #define NV50TIC_0_0_MAPG_C1 0x00600000 @@ -29,6 +33,7 @@ #define NV50TIC_0_0_MAPG_C3 0x00a00000 #define NV50TIC_0_0_MAPG_ONE 0x00e00000 #define NV50TIC_0_0_MAPR_MASK 0x001c0000 +#define NV50TIC_0_0_MAPR_SHIFT 18 #define NV50TIC_0_0_MAPR_ZERO 0x00000000 #define NV50TIC_0_0_MAPR_C0 0x00080000 #define NV50TIC_0_0_MAPR_C1 0x000c0000 @@ -89,22 +94,39 @@ #define NV50TIC_0_1_OFFSET_LOW_MASK 0xffffffff #define NV50TIC_0_1_OFFSET_LOW_SHIFT 0 -#define NV50TIC_0_2_UNKNOWN_MASK 0xffffffff +#define NV50TIC_0_2_COLORSPACE_SRGB 0x00000400 +#define NV50TIC_0_2_TARGET_1D 0x00000000 +#define NV50TIC_0_2_TARGET_2D 0x00004000 +#define NV50TIC_0_2_TARGET_3D 0x00008000 +#define NV50TIC_0_2_TARGET_CUBE 0x0000c000 +#define NV50TIC_0_2_TARGET_1D_ARRAY 0x00010000 +#define NV50TIC_0_2_TARGET_2D_ARRAY 0x00014000 +#define NV50TIC_0_2_TARGET_BUFFER 0x00018000 +#define NV50TIC_0_2_TARGET_RECT 0x0001c000 +/* #define NV50TIC_0_0_TILE_MODE_LINEAR 0x00040000 */ +#define NV50TIC_0_2_TILE_MODE_Y_MASK 0x01c00000 +#define NV50TIC_0_2_TILE_MODE_Y_SHIFT 22 +#define NV50TIC_0_2_TILE_MODE_Z_MASK 0x0e000000 +#define NV50TIC_0_2_TILE_MODE_Z_SHIFT 25 +#define NV50TIC_0_2_NORMALIZED_COORDS 0x80000000 #define NV50TIC_0_3_UNKNOWN_MASK 0xffffffff #define NV50TIC_0_4_WIDTH_MASK 0x0000ffff #define NV50TIC_0_4_WIDTH_SHIFT 0 -#define NV50TIC_0_5_DEPTH_MASK 0xffff0000 +#define NV50TIC_0_5_LAST_LEVEL_MASK 0xf0000000 +#define NV50TIC_0_5_LAST_LEVEL_SHIFT 28 +#define NV50TIC_0_5_DEPTH_MASK 0x0fff0000 #define NV50TIC_0_5_DEPTH_SHIFT 16 #define NV50TIC_0_5_HEIGHT_MASK 0x0000ffff #define NV50TIC_0_5_HEIGHT_SHIFT 0 - #define NV50TIC_0_6_UNKNOWN_MASK 0xffffffff -#define NV50TIC_0_7_OFFSET_HIGH_MASK 0xffffffff -#define NV50TIC_0_7_OFFSET_HIGH_SHIFT 0 +#define NV50TIC_0_7_BASE_LEVEL_MASK 0x0000000f +#define NV50TIC_0_7_BASE_LEVEL_SHIFT 0 +#define NV50TIC_0_7_MAX_LEVEL_MASK 0x000000f0 +#define NV50TIC_0_7_MAX_LEVEL_SHIFT 4 /* Texture sampler control block */ #define NV50TSC_1_0_WRAPS_MASK 0x00000007 diff --git a/src/gallium/drivers/nv50/nv50_transfer.c b/src/gallium/drivers/nv50/nv50_transfer.c index 7c360e9e73a..c5581a6f9d0 100644 --- a/src/gallium/drivers/nv50/nv50_transfer.c +++ b/src/gallium/drivers/nv50/nv50_transfer.c @@ -5,10 +5,13 @@ #include "util/u_math.h" #include "nv50_context.h" +#include "nv50_transfer.h" +#include "nv50_resource.h" struct nv50_transfer { struct pipe_transfer base; struct nouveau_bo *bo; + int map_refcnt; unsigned level_offset; unsigned level_tiling; int level_pitch; @@ -120,43 +123,51 @@ nv50_transfer_rect_m2mf(struct pipe_screen *pscreen, } } -static struct pipe_transfer * -nv50_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, - unsigned face, unsigned level, unsigned zslice, - enum pipe_transfer_usage usage, - unsigned x, unsigned y, unsigned w, unsigned h) +struct pipe_transfer * +nv50_miptree_transfer_new(struct pipe_context *pcontext, + struct pipe_resource *pt, + struct pipe_subresource sr, + unsigned usage, + const struct pipe_box *box) { + struct pipe_screen *pscreen = pcontext->screen; struct nouveau_device *dev = nouveau_screen(pscreen)->device; struct nv50_miptree *mt = nv50_miptree(pt); - struct nv50_miptree_level *lvl = &mt->level[level]; + struct nv50_miptree_level *lvl = &mt->level[sr.level]; struct nv50_transfer *tx; unsigned nx, ny, image = 0; int ret; if (pt->target == PIPE_TEXTURE_CUBE) - image = face; + image = sr.face; tx = CALLOC_STRUCT(nv50_transfer); if (!tx) return NULL; - pipe_texture_reference(&tx->base.texture, pt); - tx->nblocksx = util_format_get_nblocksx(pt->format, u_minify(pt->width0, level)); - tx->nblocksy = util_format_get_nblocksy(pt->format, u_minify(pt->height0, level)); - tx->base.width = w; - tx->base.height = h; + /* Don't handle 3D transfers yet. + */ + assert(box->depth == 1); + + + pipe_resource_reference(&tx->base.resource, pt); + tx->base.sr = sr; + tx->base.usage = usage; + tx->base.box = *box; + tx->nblocksx = util_format_get_nblocksx(pt->format, u_minify(pt->width0, sr.level)); + tx->nblocksy = util_format_get_nblocksy(pt->format, u_minify(pt->height0, sr.level)); tx->base.stride = tx->nblocksx * util_format_get_blocksize(pt->format); tx->base.usage = usage; tx->level_pitch = lvl->pitch; - tx->level_width = u_minify(mt->base.base.width0, level); - tx->level_height = u_minify(mt->base.base.height0, level); - tx->level_depth = u_minify(mt->base.base.depth0, level); + tx->level_width = u_minify(mt->base.base.width0, sr.level); + tx->level_height = u_minify(mt->base.base.height0, sr.level); + tx->level_depth = u_minify(mt->base.base.depth0, sr.level); tx->level_offset = lvl->image_offset[image]; tx->level_tiling = lvl->tile_mode; - tx->level_z = zslice; - tx->level_x = util_format_get_nblocksx(pt->format, x); - tx->level_y = util_format_get_nblocksy(pt->format, y); + tx->level_z = box->z; + tx->level_x = util_format_get_nblocksx(pt->format, box->x); + tx->level_y = util_format_get_nblocksy(pt->format, box->y); ret = nouveau_bo_new(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0, tx->nblocksy * tx->base.stride, &tx->bo); if (ret) { @@ -165,12 +176,12 @@ nv50_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, } if (usage & PIPE_TRANSFER_READ) { - nx = util_format_get_nblocksx(pt->format, tx->base.width); - ny = util_format_get_nblocksy(pt->format, tx->base.height); + nx = util_format_get_nblocksx(pt->format, box->width); + ny = util_format_get_nblocksy(pt->format, box->height); nv50_transfer_rect_m2mf(pscreen, mt->base.bo, tx->level_offset, tx->level_pitch, tx->level_tiling, - x, y, zslice, + box->x, box->y, box->z, tx->nblocksx, tx->nblocksy, tx->level_depth, tx->bo, 0, @@ -185,18 +196,19 @@ nv50_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt, return &tx->base; } -static void -nv50_transfer_del(struct pipe_transfer *ptx) +void +nv50_miptree_transfer_del(struct pipe_context *pcontext, + struct pipe_transfer *ptx) { struct nv50_transfer *tx = (struct nv50_transfer *)ptx; - struct nv50_miptree *mt = nv50_miptree(ptx->texture); - struct pipe_texture *pt = ptx->texture; + struct nv50_miptree *mt = nv50_miptree(ptx->resource); + struct pipe_resource *pt = ptx->resource; - unsigned nx = util_format_get_nblocksx(pt->format, tx->base.width); - unsigned ny = util_format_get_nblocksy(pt->format, tx->base.height); + unsigned nx = util_format_get_nblocksx(pt->format, tx->base.box.width); + unsigned ny = util_format_get_nblocksy(pt->format, tx->base.box.height); if (ptx->usage & PIPE_TRANSFER_WRITE) { - struct pipe_screen *pscreen = pt->screen; + struct pipe_screen *pscreen = pcontext->screen; nv50_transfer_rect_m2mf(pscreen, tx->bo, 0, tx->base.stride, tx->bo->tile_mode, @@ -213,44 +225,45 @@ nv50_transfer_del(struct pipe_transfer *ptx) } nouveau_bo_ref(NULL, &tx->bo); - pipe_texture_reference(&ptx->texture, NULL); + pipe_resource_reference(&ptx->resource, NULL); FREE(ptx); } -static void * -nv50_transfer_map(struct pipe_screen *pscreen, struct pipe_transfer *ptx) +void * +nv50_miptree_transfer_map(struct pipe_context *pcontext, + struct pipe_transfer *ptx) { struct nv50_transfer *tx = (struct nv50_transfer *)ptx; unsigned flags = 0; int ret; + if (tx->map_refcnt++) + return tx->bo->map; + if (ptx->usage & PIPE_TRANSFER_WRITE) flags |= NOUVEAU_BO_WR; if (ptx->usage & PIPE_TRANSFER_READ) flags |= NOUVEAU_BO_RD; ret = nouveau_bo_map(tx->bo, flags); - if (ret) + if (ret) { + tx->map_refcnt = 0; return NULL; + } return tx->bo->map; } -static void -nv50_transfer_unmap(struct pipe_screen *pscreen, struct pipe_transfer *ptx) +void +nv50_miptree_transfer_unmap(struct pipe_context *pcontext, + struct pipe_transfer *ptx) { struct nv50_transfer *tx = (struct nv50_transfer *)ptx; + if (--tx->map_refcnt) + return; nouveau_bo_unmap(tx->bo); } -void -nv50_transfer_init_screen_functions(struct pipe_screen *pscreen) -{ - pscreen->get_tex_transfer = nv50_transfer_new; - pscreen->tex_transfer_destroy = nv50_transfer_del; - pscreen->transfer_map = nv50_transfer_map; - pscreen->transfer_unmap = nv50_transfer_unmap; -} void nv50_upload_sifc(struct nv50_context *nv50, @@ -331,7 +344,7 @@ nv50_upload_sifc(struct nv50_context *nv50, count -= nr; } - src += src_pitch; + src = (uint8_t *) src + src_pitch; } BEGIN_RING(chan, tesla, NV50TCL_CODE_CB_FLUSH, 1); diff --git a/src/gallium/drivers/nv50/nv50_transfer.h b/src/gallium/drivers/nv50/nv50_transfer.h new file mode 100644 index 00000000000..663503547cb --- /dev/null +++ b/src/gallium/drivers/nv50/nv50_transfer.h @@ -0,0 +1,31 @@ + +#ifndef NV50_TRANSFER_H +#define NV50_TRANSFER_H + +#include "pipe/p_state.h" + + +struct pipe_transfer * +nv50_miptree_transfer_new(struct pipe_context *pcontext, + struct pipe_resource *pt, + struct pipe_subresource sr, + unsigned usage, + const struct pipe_box *box); +void +nv50_miptree_transfer_del(struct pipe_context *pcontext, + struct pipe_transfer *ptx); +void * +nv50_miptree_transfer_map(struct pipe_context *pcontext, + struct pipe_transfer *ptx); +void +nv50_miptree_transfer_unmap(struct pipe_context *pcontext, + struct pipe_transfer *ptx); + +extern void +nv50_upload_sifc(struct nv50_context *nv50, + struct nouveau_bo *bo, unsigned dst_offset, unsigned reloc, + unsigned dst_format, int dst_w, int dst_h, int dst_pitch, + void *src, unsigned src_format, int src_pitch, + int x, int y, int w, int h, int cpp); + +#endif diff --git a/src/gallium/drivers/nv50/nv50_vbo.c b/src/gallium/drivers/nv50/nv50_vbo.c index 1c8ee0b9adf..864cb09352a 100644 --- a/src/gallium/drivers/nv50/nv50_vbo.c +++ b/src/gallium/drivers/nv50/nv50_vbo.c @@ -25,52 +25,9 @@ #include "util/u_inlines.h" #include "util/u_format.h" +#include "nouveau/nouveau_util.h" #include "nv50_context.h" - -static boolean -nv50_push_elements_u08(struct nv50_context *, uint8_t *, unsigned); - -static boolean -nv50_push_elements_u16(struct nv50_context *, uint16_t *, unsigned); - -static boolean -nv50_push_elements_u32(struct nv50_context *, uint32_t *, unsigned); - -static boolean -nv50_push_arrays(struct nv50_context *, unsigned, unsigned); - -#define NV50_USING_LOATHED_EDGEFLAG(ctx) ((ctx)->vertprog->cfg.edgeflag_in < 16) - -static INLINE unsigned -nv50_prim(unsigned mode) -{ - switch (mode) { - case PIPE_PRIM_POINTS: return NV50TCL_VERTEX_BEGIN_POINTS; - case PIPE_PRIM_LINES: return NV50TCL_VERTEX_BEGIN_LINES; - case PIPE_PRIM_LINE_LOOP: return NV50TCL_VERTEX_BEGIN_LINE_LOOP; - case PIPE_PRIM_LINE_STRIP: return NV50TCL_VERTEX_BEGIN_LINE_STRIP; - case PIPE_PRIM_TRIANGLES: return NV50TCL_VERTEX_BEGIN_TRIANGLES; - case PIPE_PRIM_TRIANGLE_STRIP: - return NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP; - case PIPE_PRIM_TRIANGLE_FAN: return NV50TCL_VERTEX_BEGIN_TRIANGLE_FAN; - case PIPE_PRIM_QUADS: return NV50TCL_VERTEX_BEGIN_QUADS; - case PIPE_PRIM_QUAD_STRIP: return NV50TCL_VERTEX_BEGIN_QUAD_STRIP; - case PIPE_PRIM_POLYGON: return NV50TCL_VERTEX_BEGIN_POLYGON; - case PIPE_PRIM_LINES_ADJACENCY: - return NV50TCL_VERTEX_BEGIN_LINES_ADJACENCY; - case PIPE_PRIM_LINE_STRIP_ADJACENCY: - return NV50TCL_VERTEX_BEGIN_LINE_STRIP_ADJACENCY; - case PIPE_PRIM_TRIANGLES_ADJACENCY: - return NV50TCL_VERTEX_BEGIN_TRIANGLES_ADJACENCY; - case PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY: - return NV50TCL_VERTEX_BEGIN_TRIANGLE_STRIP_ADJACENCY; - default: - break; - } - - NOUVEAU_ERR("invalid primitive type %d\n", mode); - return NV50TCL_VERTEX_BEGIN_POINTS; -} +#include "nv50_resource.h" static INLINE uint32_t nv50_vbo_type_to_hw(enum pipe_format format) @@ -139,15 +96,16 @@ nv50_vbo_vtxelt_to_hw(struct pipe_vertex_element *ve) uint32_t hw_type, hw_size; enum pipe_format pf = ve->src_format; const struct util_format_description *desc; - unsigned size; + unsigned size, nr_components; desc = util_format_description(pf); assert(desc); size = util_format_get_component_bits(pf, UTIL_FORMAT_COLORSPACE_RGB, 0); + nr_components = util_format_get_nr_components(pf); hw_type = nv50_vbo_type_to_hw(pf); - hw_size = nv50_vbo_size_to_hw(size, ve->nr_components); + hw_size = nv50_vbo_size_to_hw(size, nr_components); if (!hw_type || !hw_size) { NOUVEAU_ERR("unsupported vbo format: %s\n", util_format_name(pf)); @@ -161,250 +119,58 @@ nv50_vbo_vtxelt_to_hw(struct pipe_vertex_element *ve) return (hw_type | hw_size); } -/* For instanced drawing from user buffers, hitting the FIFO repeatedly - * with the same vertex data is probably worse than uploading all data. - */ -static boolean -nv50_upload_vtxbuf(struct nv50_context *nv50, unsigned i) -{ - struct nv50_screen *nscreen = nv50->screen; - struct pipe_screen *pscreen = &nscreen->base.base; - struct pipe_buffer *buf = nscreen->strm_vbuf[i]; - struct pipe_vertex_buffer *vb = &nv50->vtxbuf[i]; - uint8_t *src; - unsigned size = align(vb->buffer->size, 4096); - - if (buf && buf->size < size) - pipe_buffer_reference(&nscreen->strm_vbuf[i], NULL); - - if (!nscreen->strm_vbuf[i]) { - nscreen->strm_vbuf[i] = pipe_buffer_create( - pscreen, 0, PIPE_BUFFER_USAGE_VERTEX, size); - buf = nscreen->strm_vbuf[i]; - } - - src = pipe_buffer_map(pscreen, vb->buffer, PIPE_BUFFER_USAGE_CPU_READ); - if (!src) - return FALSE; - src += vb->buffer_offset; - - size = (vb->max_index + 1) * vb->stride + 16; /* + 16 is for stride 0 */ - if (vb->buffer_offset + size > vb->buffer->size) - size = vb->buffer->size - vb->buffer_offset; - - pipe_buffer_write(pscreen, buf, vb->buffer_offset, size, src); - pipe_buffer_unmap(pscreen, vb->buffer); - - vb->buffer = buf; /* don't pipe_reference, this is a private copy */ - return TRUE; -} - -static void -nv50_upload_user_vbufs(struct nv50_context *nv50) -{ - unsigned i; - - if (nv50->vbo_fifo) - nv50->dirty |= NV50_NEW_ARRAYS; - if (!(nv50->dirty & NV50_NEW_ARRAYS)) - return; - - for (i = 0; i < nv50->vtxbuf_nr; ++i) { - if (nv50->vtxbuf[i].buffer->usage & PIPE_BUFFER_USAGE_VERTEX) - continue; - nv50_upload_vtxbuf(nv50, i); - } -} - -static void -nv50_set_static_vtxattr(struct nv50_context *nv50, unsigned i, void *data) -{ - struct nouveau_grobj *tesla = nv50->screen->tesla; - struct nouveau_channel *chan = tesla->channel; - float v[4]; - - util_format_read_4f(nv50->vtxelt[i].src_format, - v, 0, data, 0, 0, 0, 1, 1); - - switch (nv50->vtxelt[i].nr_components) { - case 4: - BEGIN_RING(chan, tesla, NV50TCL_VTX_ATTR_4F_X(i), 4); - OUT_RINGf (chan, v[0]); - OUT_RINGf (chan, v[1]); - OUT_RINGf (chan, v[2]); - OUT_RINGf (chan, v[3]); - break; - case 3: - BEGIN_RING(chan, tesla, NV50TCL_VTX_ATTR_3F_X(i), 3); - OUT_RINGf (chan, v[0]); - OUT_RINGf (chan, v[1]); - OUT_RINGf (chan, v[2]); - break; - case 2: - BEGIN_RING(chan, tesla, NV50TCL_VTX_ATTR_2F_X(i), 2); - OUT_RINGf (chan, v[0]); - OUT_RINGf (chan, v[1]); - break; - case 1: - BEGIN_RING(chan, tesla, NV50TCL_VTX_ATTR_1F(i), 1); - OUT_RINGf (chan, v[0]); - break; - default: - assert(0); - break; - } -} - -static unsigned -init_per_instance_arrays_immd(struct nv50_context *nv50, - unsigned startInstance, - unsigned pos[16], unsigned step[16]) -{ - struct nouveau_bo *bo; - unsigned i, b, count = 0; - - for (i = 0; i < nv50->vtxelt_nr; ++i) { - if (!nv50->vtxelt[i].instance_divisor) - continue; - ++count; - b = nv50->vtxelt[i].vertex_buffer_index; - - pos[i] = nv50->vtxelt[i].src_offset + - nv50->vtxbuf[b].buffer_offset + - startInstance * nv50->vtxbuf[b].stride; - step[i] = startInstance % nv50->vtxelt[i].instance_divisor; - - bo = nouveau_bo(nv50->vtxbuf[b].buffer); - if (!bo->map) - nouveau_bo_map(bo, NOUVEAU_BO_RD); - - nv50_set_static_vtxattr(nv50, i, (uint8_t *)bo->map + pos[i]); - } - - return count; -} - -static unsigned -init_per_instance_arrays(struct nv50_context *nv50, - unsigned startInstance, - unsigned pos[16], unsigned step[16]) -{ - struct nouveau_grobj *tesla = nv50->screen->tesla; - struct nouveau_channel *chan = tesla->channel; +struct instance { struct nouveau_bo *bo; - struct nouveau_stateobj *so; - unsigned i, b, count = 0; - const uint32_t rl = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; - - if (nv50->vbo_fifo) - return init_per_instance_arrays_immd(nv50, startInstance, - pos, step); - - so = so_new(nv50->vtxelt_nr, nv50->vtxelt_nr * 2, nv50->vtxelt_nr * 2); - - for (i = 0; i < nv50->vtxelt_nr; ++i) { - if (!nv50->vtxelt[i].instance_divisor) - continue; - ++count; - b = nv50->vtxelt[i].vertex_buffer_index; - - pos[i] = nv50->vtxelt[i].src_offset + - nv50->vtxbuf[b].buffer_offset + - startInstance * nv50->vtxbuf[b].stride; - - if (!startInstance) { - step[i] = 0; - continue; - } - step[i] = startInstance % nv50->vtxelt[i].instance_divisor; - - bo = nouveau_bo(nv50->vtxbuf[b].buffer); - - so_method(so, tesla, NV50TCL_VERTEX_ARRAY_START_HIGH(i), 2); - so_reloc (so, bo, pos[i], rl | NOUVEAU_BO_HIGH, 0, 0); - so_reloc (so, bo, pos[i], rl | NOUVEAU_BO_LOW, 0, 0); - } - - if (count && startInstance) { - so_ref (so, &nv50->state.instbuf); /* for flush notify */ - so_emit(chan, nv50->state.instbuf); - } - so_ref (NULL, &so); - - return count; -} + unsigned delta; + unsigned stride; + unsigned step; + unsigned divisor; +}; static void -step_per_instance_arrays_immd(struct nv50_context *nv50, - unsigned pos[16], unsigned step[16]) +instance_init(struct nv50_context *nv50, struct instance *a, unsigned first) { - struct nouveau_bo *bo; - unsigned i, b; + int i; - for (i = 0; i < nv50->vtxelt_nr; ++i) { - if (!nv50->vtxelt[i].instance_divisor) - continue; - if (++step[i] != nv50->vtxelt[i].instance_divisor) - continue; - b = nv50->vtxelt[i].vertex_buffer_index; - bo = nouveau_bo(nv50->vtxbuf[b].buffer); + for (i = 0; i < nv50->vtxelt->num_elements; i++) { + struct pipe_vertex_element *ve = &nv50->vtxelt->pipe[i]; + struct pipe_vertex_buffer *vb; - step[i] = 0; - pos[i] += nv50->vtxbuf[b].stride; + a[i].divisor = ve->instance_divisor; + if (a[i].divisor) { + vb = &nv50->vtxbuf[ve->vertex_buffer_index]; - nv50_set_static_vtxattr(nv50, i, (uint8_t *)bo->map + pos[i]); + a[i].bo = nv50_resource(vb->buffer)->bo; + a[i].stride = vb->stride; + a[i].step = first % a[i].divisor; + a[i].delta = vb->buffer_offset + ve->src_offset + + (first * a[i].stride); + } } } static void -step_per_instance_arrays(struct nv50_context *nv50, - unsigned pos[16], unsigned step[16]) +instance_step(struct nv50_context *nv50, struct instance *a) { + struct nouveau_channel *chan = nv50->screen->tesla->channel; struct nouveau_grobj *tesla = nv50->screen->tesla; - struct nouveau_channel *chan = tesla->channel; - struct nouveau_bo *bo; - struct nouveau_stateobj *so; - unsigned i, b; - const uint32_t rl = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; - - if (nv50->vbo_fifo) { - step_per_instance_arrays_immd(nv50, pos, step); - return; - } - - so = so_new(nv50->vtxelt_nr, nv50->vtxelt_nr * 2, nv50->vtxelt_nr * 2); + int i; - for (i = 0; i < nv50->vtxelt_nr; ++i) { - if (!nv50->vtxelt[i].instance_divisor) + for (i = 0; i < nv50->vtxelt->num_elements; i++) { + if (!a[i].divisor) continue; - b = nv50->vtxelt[i].vertex_buffer_index; - if (++step[i] == nv50->vtxelt[i].instance_divisor) { - step[i] = 0; - pos[i] += nv50->vtxbuf[b].stride; + BEGIN_RING(chan, tesla, + NV50TCL_VERTEX_ARRAY_START_HIGH(i), 2); + OUT_RELOCh(chan, a[i].bo, a[i].delta, NOUVEAU_BO_RD | + NOUVEAU_BO_VRAM | NOUVEAU_BO_GART); + OUT_RELOCl(chan, a[i].bo, a[i].delta, NOUVEAU_BO_RD | + NOUVEAU_BO_VRAM | NOUVEAU_BO_GART); + if (++a[i].step == a[i].divisor) { + a[i].step = 0; + a[i].delta += a[i].stride; } - - bo = nouveau_bo(nv50->vtxbuf[b].buffer); - - so_method(so, tesla, NV50TCL_VERTEX_ARRAY_START_HIGH(i), 2); - so_reloc (so, bo, pos[i], rl | NOUVEAU_BO_HIGH, 0, 0); - so_reloc (so, bo, pos[i], rl | NOUVEAU_BO_LOW, 0, 0); } - - so_ref (so, &nv50->state.instbuf); /* for flush notify */ - so_ref (NULL, &so); - - so_emit(chan, nv50->state.instbuf); -} - -static INLINE void -nv50_unmap_vbufs(struct nv50_context *nv50) -{ - unsigned i; - - for (i = 0; i < nv50->vtxbuf_nr; ++i) - if (nouveau_bo(nv50->vtxbuf[i].buffer)->map) - nouveau_bo_unmap(nouveau_bo(nv50->vtxbuf[i].buffer)); } void @@ -415,303 +181,296 @@ nv50_draw_arrays_instanced(struct pipe_context *pipe, struct nv50_context *nv50 = nv50_context(pipe); struct nouveau_channel *chan = nv50->screen->tesla->channel; struct nouveau_grobj *tesla = nv50->screen->tesla; - unsigned i, nz_divisors; - unsigned step[16], pos[16]; + struct instance a[16]; + unsigned prim = nv50_prim(mode); - if (!NV50_USING_LOATHED_EDGEFLAG(nv50)) - nv50_upload_user_vbufs(nv50); - - nv50_state_validate(nv50); + instance_init(nv50, a, startInstance); + if (!nv50_state_validate(nv50, 10 + 16*3)) + return; - nz_divisors = init_per_instance_arrays(nv50, startInstance, pos, step); + if (nv50->vbo_fifo) { + nv50_push_elements_instanced(pipe, NULL, 0, 0, mode, start, + count, startInstance, + instanceCount); + return; + } BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 2); OUT_RING (chan, NV50_CB_AUX | (24 << 8)); OUT_RING (chan, startInstance); + while (instanceCount--) { + if (AVAIL_RING(chan) < (7 + 16*3)) { + FIRE_RING(chan); + if (!nv50_state_validate(nv50, 7 + 16*3)) { + assert(0); + return; + } + } + instance_step(nv50, a); - BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1); - OUT_RING (chan, nv50_prim(mode)); - - if (nv50->vbo_fifo) - nv50_push_arrays(nv50, start, count); - else { + BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1); + OUT_RING (chan, prim); BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BUFFER_FIRST, 2); OUT_RING (chan, start); OUT_RING (chan, count); - } - BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1); - OUT_RING (chan, 0); - - for (i = 1; i < instanceCount; i++) { - if (nz_divisors) /* any non-zero array divisors ? */ - step_per_instance_arrays(nv50, pos, step); - - BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1); - OUT_RING (chan, nv50_prim(mode) | (1 << 28)); - - if (nv50->vbo_fifo) - nv50_push_arrays(nv50, start, count); - else { - BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BUFFER_FIRST, 2); - OUT_RING (chan, start); - OUT_RING (chan, count); - } BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1); OUT_RING (chan, 0); - } - nv50_unmap_vbufs(nv50); - so_ref(NULL, &nv50->state.instbuf); + prim |= (1 << 28); + } } void nv50_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start, unsigned count) { - struct nv50_context *nv50 = nv50_context(pipe); - struct nouveau_channel *chan = nv50->screen->tesla->channel; - struct nouveau_grobj *tesla = nv50->screen->tesla; - boolean ret; - - nv50_state_validate(nv50); - - BEGIN_RING(chan, tesla, 0x142c, 1); - OUT_RING (chan, 0); - BEGIN_RING(chan, tesla, 0x142c, 1); - OUT_RING (chan, 0); - - BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1); - OUT_RING (chan, nv50_prim(mode)); - - if (nv50->vbo_fifo) - ret = nv50_push_arrays(nv50, start, count); - else { - BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BUFFER_FIRST, 2); - OUT_RING (chan, start); - OUT_RING (chan, count); - ret = TRUE; - } - BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1); - OUT_RING (chan, 0); - - nv50_unmap_vbufs(nv50); - - /* XXX: not sure what to do if ret != TRUE: flush and retry? - */ - assert(ret); + nv50_draw_arrays_instanced(pipe, mode, start, count, 0, 1); } -static INLINE boolean -nv50_draw_elements_inline_u08(struct nv50_context *nv50, uint8_t *map, - unsigned start, unsigned count) -{ - struct nouveau_channel *chan = nv50->screen->tesla->channel; - struct nouveau_grobj *tesla = nv50->screen->tesla; - - map += start; +struct inline_ctx { + struct nv50_context *nv50; + void *map; +}; - if (nv50->vbo_fifo) - return nv50_push_elements_u08(nv50, map, count); +static void +inline_elt08(void *priv, unsigned start, unsigned count) +{ + struct inline_ctx *ctx = priv; + struct nouveau_grobj *tesla = ctx->nv50->screen->tesla; + struct nouveau_channel *chan = tesla->channel; + uint8_t *map = (uint8_t *)ctx->map + start; if (count & 1) { BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U32, 1); OUT_RING (chan, map[0]); map++; - count--; + count &= ~1; } - while (count) { - unsigned nr = count > 2046 ? 2046 : count; - int i; - - BEGIN_RING_NI(chan, tesla, NV50TCL_VB_ELEMENT_U16, nr >> 1); - for (i = 0; i < nr; i += 2) - OUT_RING (chan, (map[i + 1] << 16) | map[i]); + count >>= 1; + if (!count) + return; - count -= nr; - map += nr; + BEGIN_RING_NI(chan, tesla, NV50TCL_VB_ELEMENT_U16, count); + while (count--) { + OUT_RING(chan, (map[1] << 16) | map[0]); + map += 2; } - return TRUE; } -static INLINE boolean -nv50_draw_elements_inline_u16(struct nv50_context *nv50, uint16_t *map, - unsigned start, unsigned count) +static void +inline_elt16(void *priv, unsigned start, unsigned count) { - struct nouveau_channel *chan = nv50->screen->tesla->channel; - struct nouveau_grobj *tesla = nv50->screen->tesla; - - map += start; - - if (nv50->vbo_fifo) - return nv50_push_elements_u16(nv50, map, count); + struct inline_ctx *ctx = priv; + struct nouveau_grobj *tesla = ctx->nv50->screen->tesla; + struct nouveau_channel *chan = tesla->channel; + uint16_t *map = (uint16_t *)ctx->map + start; if (count & 1) { BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U32, 1); OUT_RING (chan, map[0]); + count &= ~1; map++; - count--; } - while (count) { - unsigned nr = count > 2046 ? 2046 : count; - int i; - - BEGIN_RING_NI(chan, tesla, NV50TCL_VB_ELEMENT_U16, nr >> 1); - for (i = 0; i < nr; i += 2) - OUT_RING (chan, (map[i + 1] << 16) | map[i]); + count >>= 1; + if (!count) + return; - count -= nr; - map += nr; + BEGIN_RING_NI(chan, tesla, NV50TCL_VB_ELEMENT_U16, count); + while (count--) { + OUT_RING(chan, (map[1] << 16) | map[0]); + map += 2; } - return TRUE; } -static INLINE boolean -nv50_draw_elements_inline_u32(struct nv50_context *nv50, uint32_t *map, - unsigned start, unsigned count) +static void +inline_elt32(void *priv, unsigned start, unsigned count) { + struct inline_ctx *ctx = priv; + struct nouveau_grobj *tesla = ctx->nv50->screen->tesla; + struct nouveau_channel *chan = tesla->channel; + + BEGIN_RING_NI(chan, tesla, NV50TCL_VB_ELEMENT_U32, count); + OUT_RINGp (chan, (uint32_t *)ctx->map + start, count); +} + +static void +inline_edgeflag(void *priv, boolean enabled) +{ + struct inline_ctx *ctx = priv; + struct nouveau_grobj *tesla = ctx->nv50->screen->tesla; + struct nouveau_channel *chan = tesla->channel; + + BEGIN_RING(chan, tesla, NV50TCL_EDGEFLAG_ENABLE, 1); + OUT_RING (chan, enabled ? 1 : 0); +} + +static void +nv50_draw_elements_inline(struct pipe_context *pipe, + struct pipe_resource *indexBuffer, unsigned indexSize, + unsigned mode, unsigned start, unsigned count, + unsigned startInstance, unsigned instanceCount) +{ + struct nv50_context *nv50 = nv50_context(pipe); struct nouveau_channel *chan = nv50->screen->tesla->channel; struct nouveau_grobj *tesla = nv50->screen->tesla; + struct pipe_transfer *transfer; + struct instance a[16]; + struct inline_ctx ctx; + struct u_split_prim s; + boolean nzi = FALSE; + unsigned overhead; + + overhead = 16*3; /* potential instance adjustments */ + overhead += 4; /* Begin()/End() */ + overhead += 4; /* potential edgeflag disable/reenable */ + overhead += 3; /* potentially 3 VTX_ELT_U16/U32 packet headers */ + + s.priv = &ctx; + if (indexSize == 1) + s.emit = inline_elt08; + else + if (indexSize == 2) + s.emit = inline_elt16; + else + s.emit = inline_elt32; + s.edge = inline_edgeflag; + + ctx.nv50 = nv50; + ctx.map = pipe_buffer_map(pipe, indexBuffer, PIPE_TRANSFER_READ, &transfer); + assert(ctx.map); + if (!ctx.map) + return; - map += start; + instance_init(nv50, a, startInstance); + if (!nv50_state_validate(nv50, overhead + 6 + 3)) + return; - if (nv50->vbo_fifo) - return nv50_push_elements_u32(nv50, map, count); + BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 2); + OUT_RING (chan, NV50_CB_AUX | (24 << 8)); + OUT_RING (chan, startInstance); + while (instanceCount--) { + unsigned max_verts; + boolean done; + + u_split_prim_init(&s, mode, start, count); + do { + if (AVAIL_RING(chan) < (overhead + 6)) { + FIRE_RING(chan); + if (!nv50_state_validate(nv50, (overhead + 6))) { + assert(0); + return; + } + } - while (count) { - unsigned nr = count > 2047 ? 2047 : count; + max_verts = AVAIL_RING(chan) - overhead; + if (max_verts > 2047) + max_verts = 2047; + if (indexSize != 4) + max_verts <<= 1; + instance_step(nv50, a); - BEGIN_RING_NI(chan, tesla, NV50TCL_VB_ELEMENT_U32, nr); - OUT_RINGp (chan, map, nr); + BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1); + OUT_RING (chan, nv50_prim(s.mode) | (nzi ? (1<<28) : 0)); + done = u_split_prim_next(&s, max_verts); + BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1); + OUT_RING (chan, 0); + } while (!done); - count -= nr; - map += nr; + nzi = TRUE; } - return TRUE; -} -static INLINE void -nv50_draw_elements_inline(struct nv50_context *nv50, - void *map, unsigned indexSize, - unsigned start, unsigned count) -{ - switch (indexSize) { - case 1: - nv50_draw_elements_inline_u08(nv50, map, start, count); - break; - case 2: - nv50_draw_elements_inline_u16(nv50, map, start, count); - break; - case 4: - nv50_draw_elements_inline_u32(nv50, map, start, count); - break; - } + pipe_buffer_unmap(pipe, indexBuffer, transfer); } void nv50_draw_elements_instanced(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, - unsigned indexSize, + struct pipe_resource *indexBuffer, + unsigned indexSize, int indexBias, unsigned mode, unsigned start, unsigned count, unsigned startInstance, unsigned instanceCount) { struct nv50_context *nv50 = nv50_context(pipe); + struct nouveau_channel *chan = nv50->screen->tesla->channel; struct nouveau_grobj *tesla = nv50->screen->tesla; - struct nouveau_channel *chan = tesla->channel; - struct pipe_screen *pscreen = pipe->screen; - void *map; - unsigned i, nz_divisors; - unsigned step[16], pos[16]; + struct instance a[16]; + unsigned prim = nv50_prim(mode); - map = pipe_buffer_map(pscreen, indexBuffer, PIPE_BUFFER_USAGE_CPU_READ); + instance_init(nv50, a, startInstance); + if (!nv50_state_validate(nv50, 13 + 16*3)) + return; - if (!NV50_USING_LOATHED_EDGEFLAG(nv50)) - nv50_upload_user_vbufs(nv50); + if (nv50->vbo_fifo) { + nv50_push_elements_instanced(pipe, indexBuffer, indexSize, + indexBias, mode, start, count, + startInstance, instanceCount); + return; + } - nv50_state_validate(nv50); + /* indices are uint32 internally, so large indexBias means negative */ + BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_BASE, 1); + OUT_RING (chan, indexBias); - nz_divisors = init_per_instance_arrays(nv50, startInstance, pos, step); + if (!nv50_resource_mapped_by_gpu(indexBuffer) || indexSize == 1) { + nv50_draw_elements_inline(pipe, indexBuffer, indexSize, + mode, start, count, startInstance, + instanceCount); + return; + } BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 2); OUT_RING (chan, NV50_CB_AUX | (24 << 8)); OUT_RING (chan, startInstance); - - BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1); - OUT_RING (chan, nv50_prim(mode)); - - nv50_draw_elements_inline(nv50, map, indexSize, start, count); - - BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1); - OUT_RING (chan, 0); - - for (i = 1; i < instanceCount; ++i) { - if (nz_divisors) /* any non-zero array divisors ? */ - step_per_instance_arrays(nv50, pos, step); + while (instanceCount--) { + if (AVAIL_RING(chan) < (7 + 16*3)) { + FIRE_RING(chan); + if (!nv50_state_validate(nv50, 10 + 16*3)) { + assert(0); + return; + } + } + instance_step(nv50, a); BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1); - OUT_RING (chan, nv50_prim(mode) | (1 << 28)); - - nv50_draw_elements_inline(nv50, map, indexSize, start, count); - + OUT_RING (chan, prim); + if (indexSize == 4) { + BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U32 | 0x30000, 0); + OUT_RING (chan, count); + nouveau_pushbuf_submit(chan, + nv50_resource(indexBuffer)->bo, + start << 2, count << 2); + } else + if (indexSize == 2) { + unsigned vb_start = (start & ~1); + unsigned vb_end = (start + count + 1) & ~1; + unsigned dwords = (vb_end - vb_start) >> 1; + + BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U16_SETUP, 1); + OUT_RING (chan, ((start & 1) << 31) | count); + BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U16 | 0x30000, 0); + OUT_RING (chan, dwords); + nouveau_pushbuf_submit(chan, + nv50_resource(indexBuffer)->bo, + vb_start << 1, dwords << 2); + BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U16_SETUP, 1); + OUT_RING (chan, 0); + } BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1); OUT_RING (chan, 0); - } - nv50_unmap_vbufs(nv50); - so_ref(NULL, &nv50->state.instbuf); + prim |= (1 << 28); + } } void nv50_draw_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, unsigned indexSize, + struct pipe_resource *indexBuffer, + unsigned indexSize, int indexBias, unsigned mode, unsigned start, unsigned count) { - struct nv50_context *nv50 = nv50_context(pipe); - struct nouveau_channel *chan = nv50->screen->tesla->channel; - struct nouveau_grobj *tesla = nv50->screen->tesla; - struct pipe_screen *pscreen = pipe->screen; - void *map; - - nv50_state_validate(nv50); - - BEGIN_RING(chan, tesla, 0x142c, 1); - OUT_RING (chan, 0); - BEGIN_RING(chan, tesla, 0x142c, 1); - OUT_RING (chan, 0); - - BEGIN_RING(chan, tesla, NV50TCL_VERTEX_BEGIN, 1); - OUT_RING (chan, nv50_prim(mode)); - - if (!nv50->vbo_fifo && indexSize == 4) { - BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U32 | 0x30000, 0); - OUT_RING (chan, count); - nouveau_pushbuf_submit(chan, nouveau_bo(indexBuffer), - start << 2, count << 2); - } else - if (!nv50->vbo_fifo && indexSize == 2) { - unsigned vb_start = (start & ~1); - unsigned vb_end = (start + count + 1) & ~1; - unsigned dwords = (vb_end - vb_start) >> 1; - - BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U16_SETUP, 1); - OUT_RING (chan, ((start & 1) << 31) | count); - BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U16 | 0x30000, 0); - OUT_RING (chan, dwords); - nouveau_pushbuf_submit(chan, nouveau_bo(indexBuffer), - vb_start << 1, dwords << 2); - BEGIN_RING(chan, tesla, NV50TCL_VB_ELEMENT_U16_SETUP, 1); - OUT_RING (chan, 0); - } else { - map = pipe_buffer_map(pscreen, indexBuffer, - PIPE_BUFFER_USAGE_CPU_READ); - nv50_draw_elements_inline(nv50, map, indexSize, start, count); - nv50_unmap_vbufs(nv50); - pipe_buffer_unmap(pscreen, indexBuffer); - } - - BEGIN_RING(chan, tesla, NV50TCL_VERTEX_END, 1); - OUT_RING (chan, 0); + nv50_draw_elements_instanced(pipe, indexBuffer, indexSize, indexBias, + mode, start, count, 0, 1); } static INLINE boolean @@ -723,9 +482,10 @@ nv50_vbo_static_attrib(struct nv50_context *nv50, unsigned attrib, { struct nouveau_stateobj *so; struct nouveau_grobj *tesla = nv50->screen->tesla; - struct nouveau_bo *bo = nouveau_bo(vb->buffer); + struct nouveau_bo *bo = nv50_resource(vb->buffer)->bo; float v[4]; int ret; + unsigned nr_components = util_format_get_nr_components(ve->src_format); ret = nouveau_bo_map(bo, NOUVEAU_BO_RD); if (ret) @@ -736,9 +496,10 @@ nv50_vbo_static_attrib(struct nv50_context *nv50, unsigned attrib, 0, 0, 1, 1); so = *pso; if (!so) - *pso = so = so_new(nv50->vtxelt_nr, nv50->vtxelt_nr * 4, 0); + *pso = so = so_new(nv50->vtxelt->num_elements, + nv50->vtxelt->num_elements * 4, 0); - switch (ve->nr_components) { + switch (nr_components) { case 4: so_method(so, tesla, NV50TCL_VTX_ATTR_4F_X(attrib), 4); so_data (so, fui(v[0])); @@ -775,6 +536,18 @@ nv50_vbo_static_attrib(struct nv50_context *nv50, unsigned attrib, } void +nv50_vtxelt_construct(struct nv50_vtxelt_stateobj *cso) +{ + unsigned i; + + for (i = 0; i < cso->num_elements; ++i) { + struct pipe_vertex_element *ve = &cso->pipe[i]; + + cso->hw[i] = nv50_vbo_vtxelt_to_hw(ve); + } +} + +struct nouveau_stateobj * nv50_vbo_validate(struct nv50_context *nv50) { struct nouveau_grobj *tesla = nv50->screen->tesla; @@ -783,30 +556,32 @@ nv50_vbo_validate(struct nv50_context *nv50) /* don't validate if Gallium took away our buffers */ if (nv50->vtxbuf_nr == 0) - return; + return NULL; + nv50->vbo_fifo = 0; + if (nv50->screen->force_push || + nv50->vertprog->cfg.edgeflag_in < 16) + nv50->vbo_fifo = 0xffff; - for (i = 0; i < nv50->vtxbuf_nr; ++i) + for (i = 0; i < nv50->vtxbuf_nr; i++) { if (nv50->vtxbuf[i].stride && - !(nv50->vtxbuf[i].buffer->usage & PIPE_BUFFER_USAGE_VERTEX)) + !nv50_resource_mapped_by_gpu(nv50->vtxbuf[i].buffer)) nv50->vbo_fifo = 0xffff; + } - if (NV50_USING_LOATHED_EDGEFLAG(nv50)) - nv50->vbo_fifo = 0xffff; /* vertprog can't set edgeflag */ - - n_ve = MAX2(nv50->vtxelt_nr, nv50->state.vtxelt_nr); + n_ve = MAX2(nv50->vtxelt->num_elements, nv50->state.vtxelt_nr); vtxattr = NULL; - vtxbuf = so_new(n_ve * 2, n_ve * 5, nv50->vtxelt_nr * 4); + vtxbuf = so_new(n_ve * 2, n_ve * 5, nv50->vtxelt->num_elements * 4); vtxfmt = so_new(1, n_ve, 0); so_method(vtxfmt, tesla, NV50TCL_VERTEX_ARRAY_ATTRIB(0), n_ve); - for (i = 0; i < nv50->vtxelt_nr; i++) { - struct pipe_vertex_element *ve = &nv50->vtxelt[i]; + for (i = 0; i < nv50->vtxelt->num_elements; i++) { + struct pipe_vertex_element *ve = &nv50->vtxelt->pipe[i]; struct pipe_vertex_buffer *vb = &nv50->vtxbuf[ve->vertex_buffer_index]; - struct nouveau_bo *bo = nouveau_bo(vb->buffer); - uint32_t hw = nv50_vbo_vtxelt_to_hw(ve); + struct nouveau_bo *bo = nv50_resource(vb->buffer)->bo; + uint32_t hw = nv50->vtxelt->hw[i]; if (!vb->stride && nv50_vbo_static_attrib(nv50, i, &vtxattr, ve, vb)) { @@ -821,13 +596,13 @@ nv50_vbo_validate(struct nv50_context *nv50) } if (nv50->vbo_fifo) { - so_data (vtxfmt, hw | - (ve->instance_divisor ? (1 << 4) : i)); + so_data (vtxfmt, hw | (ve->instance_divisor ? (1 << 4) : i)); so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_FORMAT(i), 1); so_data (vtxbuf, 0); continue; } + so_data(vtxfmt, hw | i); so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_FORMAT(i), 3); @@ -842,10 +617,10 @@ nv50_vbo_validate(struct nv50_context *nv50) /* vertex array limits */ so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_LIMIT_HIGH(i), 2); - so_reloc (vtxbuf, bo, vb->buffer->size - 1, + so_reloc (vtxbuf, bo, vb->buffer->width0 - 1, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0); - so_reloc (vtxbuf, bo, vb->buffer->size - 1, + so_reloc (vtxbuf, bo, vb->buffer->width0 - 1, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0); } @@ -855,355 +630,13 @@ nv50_vbo_validate(struct nv50_context *nv50) so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_FORMAT(i), 1); so_data (vtxbuf, 0); } - nv50->state.vtxelt_nr = nv50->vtxelt_nr; + nv50->state.vtxelt_nr = nv50->vtxelt->num_elements; - so_ref (vtxfmt, &nv50->state.vtxfmt); so_ref (vtxbuf, &nv50->state.vtxbuf); so_ref (vtxattr, &nv50->state.vtxattr); so_ref (NULL, &vtxbuf); - so_ref (NULL, &vtxfmt); so_ref (NULL, &vtxattr); + return vtxfmt; } -typedef void (*pfn_push)(struct nouveau_channel *, void *); - -struct nv50_vbo_emitctx -{ - pfn_push push[16]; - uint8_t *map[16]; - unsigned stride[16]; - unsigned nr_ve; - unsigned vtx_dwords; - unsigned vtx_max; - - float edgeflag; - unsigned ve_edgeflag; -}; - -static INLINE void -emit_vtx_next(struct nouveau_channel *chan, struct nv50_vbo_emitctx *emit) -{ - unsigned i; - - for (i = 0; i < emit->nr_ve; ++i) { - emit->push[i](chan, emit->map[i]); - emit->map[i] += emit->stride[i]; - } -} - -static INLINE void -emit_vtx(struct nouveau_channel *chan, struct nv50_vbo_emitctx *emit, - uint32_t vi) -{ - unsigned i; - - for (i = 0; i < emit->nr_ve; ++i) - emit->push[i](chan, emit->map[i] + emit->stride[i] * vi); -} - -static INLINE boolean -nv50_map_vbufs(struct nv50_context *nv50) -{ - int i; - - for (i = 0; i < nv50->vtxbuf_nr; ++i) { - struct pipe_vertex_buffer *vb = &nv50->vtxbuf[i]; - unsigned size = vb->stride * (vb->max_index + 1) + 16; - - if (nouveau_bo(vb->buffer)->map) - continue; - - size = vb->stride * (vb->max_index + 1) + 16; - size = MIN2(size, vb->buffer->size); - if (!size) - size = vb->buffer->size; - - if (nouveau_bo_map_range(nouveau_bo(vb->buffer), - 0, size, NOUVEAU_BO_RD)) - break; - } - - if (i == nv50->vtxbuf_nr) - return TRUE; - for (; i >= 0; --i) - nouveau_bo_unmap(nouveau_bo(nv50->vtxbuf[i].buffer)); - return FALSE; -} - -static void -emit_b32_1(struct nouveau_channel *chan, void *data) -{ - uint32_t *v = data; - - OUT_RING(chan, v[0]); -} - -static void -emit_b32_2(struct nouveau_channel *chan, void *data) -{ - uint32_t *v = data; - - OUT_RING(chan, v[0]); - OUT_RING(chan, v[1]); -} - -static void -emit_b32_3(struct nouveau_channel *chan, void *data) -{ - uint32_t *v = data; - - OUT_RING(chan, v[0]); - OUT_RING(chan, v[1]); - OUT_RING(chan, v[2]); -} - -static void -emit_b32_4(struct nouveau_channel *chan, void *data) -{ - uint32_t *v = data; - - OUT_RING(chan, v[0]); - OUT_RING(chan, v[1]); - OUT_RING(chan, v[2]); - OUT_RING(chan, v[3]); -} - -static void -emit_b16_1(struct nouveau_channel *chan, void *data) -{ - uint16_t *v = data; - OUT_RING(chan, v[0]); -} - -static void -emit_b16_3(struct nouveau_channel *chan, void *data) -{ - uint16_t *v = data; - - OUT_RING(chan, (v[1] << 16) | v[0]); - OUT_RING(chan, v[2]); -} - -static void -emit_b08_1(struct nouveau_channel *chan, void *data) -{ - uint8_t *v = data; - - OUT_RING(chan, v[0]); -} - -static void -emit_b08_3(struct nouveau_channel *chan, void *data) -{ - uint8_t *v = data; - - OUT_RING(chan, (v[2] << 16) | (v[1] << 8) | v[0]); -} - -static boolean -emit_prepare(struct nv50_context *nv50, struct nv50_vbo_emitctx *emit, - unsigned start) -{ - unsigned i; - - if (nv50_map_vbufs(nv50) == FALSE) - return FALSE; - - emit->ve_edgeflag = nv50->vertprog->cfg.edgeflag_in; - - emit->edgeflag = 0.5f; - emit->nr_ve = 0; - emit->vtx_dwords = 0; - - for (i = 0; i < nv50->vtxelt_nr; ++i) { - struct pipe_vertex_element *ve; - struct pipe_vertex_buffer *vb; - unsigned n, size; - const struct util_format_description *desc; - - ve = &nv50->vtxelt[i]; - vb = &nv50->vtxbuf[ve->vertex_buffer_index]; - if (!(nv50->vbo_fifo & (1 << i)) || ve->instance_divisor) - continue; - n = emit->nr_ve++; - - emit->stride[n] = vb->stride; - emit->map[n] = (uint8_t *)nouveau_bo(vb->buffer)->map + - vb->buffer_offset + - (start * vb->stride + ve->src_offset); - - desc = util_format_description(ve->src_format); - assert(desc); - - size = util_format_get_component_bits( - ve->src_format, UTIL_FORMAT_COLORSPACE_RGB, 0); - - assert(ve->nr_components > 0 && ve->nr_components <= 4); - - /* It shouldn't be necessary to push the implicit 1s - * for case 3 and size 8 cases 1, 2, 3. - */ - switch (size) { - default: - NOUVEAU_ERR("unsupported vtxelt size: %u\n", size); - return FALSE; - case 32: - switch (ve->nr_components) { - case 1: emit->push[n] = emit_b32_1; break; - case 2: emit->push[n] = emit_b32_2; break; - case 3: emit->push[n] = emit_b32_3; break; - case 4: emit->push[n] = emit_b32_4; break; - } - emit->vtx_dwords += ve->nr_components; - break; - case 16: - switch (ve->nr_components) { - case 1: emit->push[n] = emit_b16_1; break; - case 2: emit->push[n] = emit_b32_1; break; - case 3: emit->push[n] = emit_b16_3; break; - case 4: emit->push[n] = emit_b32_2; break; - } - emit->vtx_dwords += (ve->nr_components + 1) >> 1; - break; - case 8: - switch (ve->nr_components) { - case 1: emit->push[n] = emit_b08_1; break; - case 2: emit->push[n] = emit_b16_1; break; - case 3: emit->push[n] = emit_b08_3; break; - case 4: emit->push[n] = emit_b32_1; break; - } - emit->vtx_dwords += 1; - break; - } - } - - emit->vtx_max = 512 / emit->vtx_dwords; - if (emit->ve_edgeflag < 16) - emit->vtx_max = 1; - - return TRUE; -} - -static INLINE void -set_edgeflag(struct nouveau_channel *chan, - struct nouveau_grobj *tesla, - struct nv50_vbo_emitctx *emit, uint32_t index) -{ - unsigned i = emit->ve_edgeflag; - - if (i < 16) { - float f = *((float *)(emit->map[i] + index * emit->stride[i])); - - if (emit->edgeflag != f) { - emit->edgeflag = f; - - BEGIN_RING(chan, tesla, 0x15e4, 1); - OUT_RING (chan, f ? 1 : 0); - } - } -} - -static boolean -nv50_push_arrays(struct nv50_context *nv50, unsigned start, unsigned count) -{ - struct nouveau_channel *chan = nv50->screen->base.channel; - struct nouveau_grobj *tesla = nv50->screen->tesla; - struct nv50_vbo_emitctx emit; - - if (emit_prepare(nv50, &emit, start) == FALSE) - return FALSE; - - while (count) { - unsigned i, dw, nr = MIN2(count, emit.vtx_max); - dw = nr * emit.vtx_dwords; - - set_edgeflag(chan, tesla, &emit, 0); /* nr will be 1 */ - - BEGIN_RING_NI(chan, tesla, NV50TCL_VERTEX_DATA, dw); - for (i = 0; i < nr; ++i) - emit_vtx_next(chan, &emit); - - count -= nr; - } - - return TRUE; -} - -static boolean -nv50_push_elements_u32(struct nv50_context *nv50, uint32_t *map, unsigned count) -{ - struct nouveau_channel *chan = nv50->screen->base.channel; - struct nouveau_grobj *tesla = nv50->screen->tesla; - struct nv50_vbo_emitctx emit; - - if (emit_prepare(nv50, &emit, 0) == FALSE) - return FALSE; - - while (count) { - unsigned i, dw, nr = MIN2(count, emit.vtx_max); - dw = nr * emit.vtx_dwords; - - set_edgeflag(chan, tesla, &emit, *map); - - BEGIN_RING_NI(chan, tesla, NV50TCL_VERTEX_DATA, dw); - for (i = 0; i < nr; ++i) - emit_vtx(chan, &emit, *map++); - - count -= nr; - } - - return TRUE; -} - -static boolean -nv50_push_elements_u16(struct nv50_context *nv50, uint16_t *map, unsigned count) -{ - struct nouveau_channel *chan = nv50->screen->base.channel; - struct nouveau_grobj *tesla = nv50->screen->tesla; - struct nv50_vbo_emitctx emit; - - if (emit_prepare(nv50, &emit, 0) == FALSE) - return FALSE; - - while (count) { - unsigned i, dw, nr = MIN2(count, emit.vtx_max); - dw = nr * emit.vtx_dwords; - - set_edgeflag(chan, tesla, &emit, *map); - - BEGIN_RING_NI(chan, tesla, NV50TCL_VERTEX_DATA, dw); - for (i = 0; i < nr; ++i) - emit_vtx(chan, &emit, *map++); - - count -= nr; - } - - return TRUE; -} - -static boolean -nv50_push_elements_u08(struct nv50_context *nv50, uint8_t *map, unsigned count) -{ - struct nouveau_channel *chan = nv50->screen->base.channel; - struct nouveau_grobj *tesla = nv50->screen->tesla; - struct nv50_vbo_emitctx emit; - - if (emit_prepare(nv50, &emit, 0) == FALSE) - return FALSE; - - while (count) { - unsigned i, dw, nr = MIN2(count, emit.vtx_max); - dw = nr * emit.vtx_dwords; - - set_edgeflag(chan, tesla, &emit, *map); - - BEGIN_RING_NI(chan, tesla, NV50TCL_VERTEX_DATA, dw); - for (i = 0; i < nr; ++i) - emit_vtx(chan, &emit, *map++); - - count -= nr; - } - - return TRUE; -} diff --git a/src/gallium/drivers/nvfx/Makefile b/src/gallium/drivers/nvfx/Makefile new file mode 100644 index 00000000000..c1d57ca3969 --- /dev/null +++ b/src/gallium/drivers/nvfx/Makefile @@ -0,0 +1,37 @@ +TOP = ../../../.. +include $(TOP)/configs/current + +LIBNAME = nvfx + +C_SOURCES = \ + nv04_surface_2d.c \ + nvfx_buffer.c \ + nvfx_context.c \ + nvfx_clear.c \ + nvfx_draw.c \ + nvfx_fragprog.c \ + nvfx_fragtex.c \ + nv30_fragtex.c \ + nv40_fragtex.c \ + nvfx_miptree.c \ + nvfx_query.c \ + nvfx_resource.c \ + nvfx_screen.c \ + nvfx_state.c \ + nvfx_state_blend.c \ + nvfx_state_emit.c \ + nvfx_state_fb.c \ + nvfx_state_rasterizer.c \ + nvfx_state_scissor.c \ + nvfx_state_stipple.c \ + nvfx_state_viewport.c \ + nvfx_state_zsa.c \ + nvfx_surface.c \ + nvfx_transfer.c \ + nvfx_vbo.c \ + nvfx_vertprog.c + +LIBRARY_INCLUDES = \ + -I$(TOP)/src/gallium/drivers/nouveau/include + +include ../../Makefile.template diff --git a/src/gallium/drivers/nvfx/SConscript b/src/gallium/drivers/nvfx/SConscript new file mode 100644 index 00000000000..02d931b10e8 --- /dev/null +++ b/src/gallium/drivers/nvfx/SConscript @@ -0,0 +1,40 @@ +Import('*') + +env = env.Clone() + +env.PrependUnique(delete_existing=1, CPPPATH = [ + '#/src/gallium/drivers', +]) + +nvfx = env.ConvenienceLibrary( + target = 'nvfx', + source = [ + 'nv04_surface_2d.c', + 'nvfx_buffer.c', + 'nvfx_context.c', + 'nvfx_clear.c', + 'nvfx_draw.c', + 'nvfx_fragprog.c', + 'nvfx_fragtex.c', + 'nv30_fragtex.c', + 'nv40_fragtex.c', + 'nvfx_miptree.c', + 'nvfx_query.c', + 'nvfx_resource.c', + 'nvfx_screen.c', + 'nvfx_state.c', + 'nvfx_state_blend.c', + 'nvfx_state_emit.c', + 'nvfx_state_fb.c', + 'nvfx_state_rasterizer.c', + 'nvfx_state_scissor.c', + 'nvfx_state_stipple.c', + 'nvfx_state_viewport.c', + 'nvfx_state_zsa.c', + 'nvfx_surface.c', + 'nvfx_transfer.c', + 'nvfx_vbo.c', + 'nvfx_vertprog.c', + ]) + +Export('nvfx') diff --git a/src/gallium/drivers/nouveau/nv04_surface_2d.c b/src/gallium/drivers/nvfx/nv04_surface_2d.c index b074547c4da..4ed574227d6 100644 --- a/src/gallium/drivers/nouveau/nv04_surface_2d.c +++ b/src/gallium/drivers/nvfx/nv04_surface_2d.c @@ -25,7 +25,7 @@ nv04_surface_format(enum pipe_format format) case PIPE_FORMAT_B8G8R8X8_UNORM: case PIPE_FORMAT_B8G8R8A8_UNORM: return NV04_CONTEXT_SURFACES_2D_FORMAT_A8R8G8B8; - case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: case PIPE_FORMAT_X8Z24_UNORM: return NV04_CONTEXT_SURFACES_2D_FORMAT_Y32; default: @@ -45,7 +45,7 @@ nv04_rect_format(enum pipe_format format) return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A16R5G6B5; case PIPE_FORMAT_B8G8R8X8_UNORM: case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: case PIPE_FORMAT_X8Z24_UNORM: return NV04_GDI_RECTANGLE_TEXT_COLOR_FORMAT_A8R8G8B8; default: @@ -125,8 +125,8 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx, struct nouveau_channel *chan = ctx->swzsurf->channel; struct nouveau_grobj *swzsurf = ctx->swzsurf; struct nouveau_grobj *sifm = ctx->sifm; - struct nouveau_bo *src_bo = nouveau_bo(ctx->buf(src)); - struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst)); + struct nouveau_bo *src_bo = ctx->buf(src); + struct nouveau_bo *dst_bo = ctx->buf(dst); const unsigned src_pitch = ((struct nv04_surface *)src)->pitch; /* Max width & height may not be the same on all HW, but must be POT */ const unsigned max_w = 1024; @@ -148,7 +148,7 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx, BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_DMA_IMAGE, 1); OUT_RELOCo(chan, dst_bo, - NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_FORMAT, 1); OUT_RING (chan, nv04_surface_format(dst->format) | @@ -171,7 +171,7 @@ nv04_surface_copy_swizzle(struct nv04_surface_2d *ctx, BEGIN_RING(chan, swzsurf, NV04_SWIZZLED_SURFACE_OFFSET, 1); OUT_RELOCl(chan, dst_bo, dst->offset, - NOUVEAU_BO_GART | NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); + NOUVEAU_BO_VRAM | NOUVEAU_BO_WR); BEGIN_RING(chan, sifm, NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION, 9); OUT_RING (chan, NV05_SCALED_IMAGE_FROM_MEMORY_COLOR_CONVERSION_TRUNCATE); @@ -205,8 +205,8 @@ nv04_surface_copy_m2mf(struct nv04_surface_2d *ctx, { struct nouveau_channel *chan = ctx->m2mf->channel; struct nouveau_grobj *m2mf = ctx->m2mf; - struct nouveau_bo *src_bo = nouveau_bo(ctx->buf(src)); - struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst)); + struct nouveau_bo *src_bo = ctx->buf(src); + struct nouveau_bo *dst_bo = ctx->buf(dst); unsigned src_pitch = ((struct nv04_surface *)src)->pitch; unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch; unsigned dst_offset = dst->offset + dy * dst_pitch + @@ -252,8 +252,8 @@ nv04_surface_copy_blit(struct nv04_surface_2d *ctx, struct pipe_surface *dst, struct nouveau_channel *chan = ctx->surf2d->channel; struct nouveau_grobj *surf2d = ctx->surf2d; struct nouveau_grobj *blit = ctx->blit; - struct nouveau_bo *src_bo = nouveau_bo(ctx->buf(src)); - struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst)); + struct nouveau_bo *src_bo = ctx->buf(src); + struct nouveau_bo *dst_bo = ctx->buf(dst); unsigned src_pitch = ((struct nv04_surface *)src)->pitch; unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch; int format; @@ -285,10 +285,8 @@ nv04_surface_copy(struct nv04_surface_2d *ctx, struct pipe_surface *dst, int dx, int dy, struct pipe_surface *src, int sx, int sy, int w, int h) { - unsigned src_pitch = ((struct nv04_surface *)src)->pitch; - unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch; - int src_linear = src->texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR; - int dst_linear = dst->texture->tex_usage & NOUVEAU_TEXTURE_USAGE_LINEAR; + int src_linear = src->texture->flags & NVFX_RESOURCE_FLAG_LINEAR; + int dst_linear = dst->texture->flags & NVFX_RESOURCE_FLAG_LINEAR; assert(src->format == dst->format); @@ -298,16 +296,11 @@ nv04_surface_copy(struct nv04_surface_2d *ctx, struct pipe_surface *dst, return; } - /* NV_CONTEXT_SURFACES_2D has buffer alignment restrictions, fallback - * to NV_MEMORY_TO_MEMORY_FORMAT in this case. - */ - if ((src->offset & 63) || (dst->offset & 63) || - (src_pitch & 63) || (dst_pitch & 63)) { - nv04_surface_copy_m2mf(ctx, dst, dx, dy, src, sx, sy, w, h); - return; - } - - nv04_surface_copy_blit(ctx, dst, dx, dy, src, sx, sy, w, h); + /* Use M2MF instead of the blitter since it always works + * Any possible performance drop is likely to be not very significant + * and dwarfed anyway by the current buffer management problems + */ + nv04_surface_copy_m2mf(ctx, dst, dx, dy, src, sx, sy, w, h); } static void @@ -317,7 +310,7 @@ nv04_surface_fill(struct nv04_surface_2d *ctx, struct pipe_surface *dst, struct nouveau_channel *chan = ctx->surf2d->channel; struct nouveau_grobj *surf2d = ctx->surf2d; struct nouveau_grobj *rect = ctx->rect; - struct nouveau_bo *dst_bo = nouveau_bo(ctx->buf(dst)); + struct nouveau_bo *dst_bo = ctx->buf(dst); unsigned dst_pitch = ((struct nv04_surface *)dst)->pitch; int cs2d_format, gdirect_format; @@ -501,27 +494,21 @@ nv04_surface_2d_init(struct nouveau_screen *screen) } struct nv04_surface* -nv04_surface_wrap_for_render(struct pipe_screen *pscreen, struct nv04_surface_2d* eng2d, struct nv04_surface* ns) +nv04_surface_wrap_for_render(struct pipe_screen *pscreen, + struct nv04_surface_2d* eng2d, struct nv04_surface* ns) { + struct pipe_resource templ; + struct pipe_resource* temp_tex; + struct nv04_surface* temp_ns; int temp_flags; - // printf("creating temp, flags is %i!\n", flags); + temp_flags = (ns->base.usage | + PIPE_BIND_BLIT_SOURCE | + PIPE_BIND_BLIT_DESTINATION); - if(ns->base.usage & PIPE_BUFFER_USAGE_DISCARD) - { - temp_flags = ns->base.usage | PIPE_BUFFER_USAGE_GPU_READ; - ns->base.usage = PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER | PIPE_BUFFER_USAGE_DISCARD; - } - else - { - temp_flags = ns->base.usage | PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE; - ns->base.usage = PIPE_BUFFER_USAGE_GPU_WRITE | NOUVEAU_BUFFER_USAGE_NO_RENDER | PIPE_BUFFER_USAGE_GPU_READ; - } + ns->base.usage = (PIPE_BIND_BLIT_SOURCE | + PIPE_BIND_BLIT_DESTINATION); - struct nv40_screen* screen = (struct nv40_screen*)pscreen; - ns->base.usage = PIPE_BUFFER_USAGE_GPU_READ | PIPE_BUFFER_USAGE_GPU_WRITE; - - struct pipe_texture templ; memset(&templ, 0, sizeof(templ)); templ.format = ns->base.texture->format; templ.target = PIPE_TEXTURE_2D; @@ -533,15 +520,16 @@ nv04_surface_wrap_for_render(struct pipe_screen *pscreen, struct nv04_surface_2d // TODO: this is probably wrong and we should specifically handle multisampling somehow once it is implemented templ.nr_samples = ns->base.texture->nr_samples; - templ.tex_usage = ns->base.texture->tex_usage | PIPE_TEXTURE_USAGE_RENDER_TARGET; + templ.bind = ns->base.texture->bind | PIPE_BIND_RENDER_TARGET; - struct pipe_texture* temp_tex = pscreen->texture_create(pscreen, &templ); - struct nv04_surface* temp_ns = (struct nv04_surface*)pscreen->get_tex_surface(pscreen, temp_tex, 0, 0, 0, temp_flags); + temp_tex = pscreen->resource_create(pscreen, &templ); + temp_ns = (struct nv04_surface*)pscreen->get_tex_surface(pscreen, temp_tex, 0, 0, 0, temp_flags); temp_ns->backing = ns; - if(ns->base.usage & PIPE_BUFFER_USAGE_GPU_READ) - eng2d->copy(eng2d, &temp_ns->backing->base, 0, 0, &ns->base, 0, 0, ns->base.width, ns->base.height); + if(ns->base.usage & PIPE_BIND_BLIT_SOURCE) + eng2d->copy(eng2d, &temp_ns->backing->base, + 0, 0, &ns->base, + 0, 0, ns->base.width, ns->base.height); return temp_ns; } - diff --git a/src/gallium/drivers/nouveau/nv04_surface_2d.h b/src/gallium/drivers/nvfx/nv04_surface_2d.h index ce696a11a39..2123c3ed08b 100644 --- a/src/gallium/drivers/nouveau/nv04_surface_2d.h +++ b/src/gallium/drivers/nvfx/nv04_surface_2d.h @@ -1,6 +1,10 @@ #ifndef __NV04_SURFACE_2D_H__ #define __NV04_SURFACE_2D_H__ +#include "pipe/p_state.h" + +struct nouveau_screen; + struct nv04_surface { struct pipe_surface base; unsigned pitch; @@ -16,7 +20,7 @@ struct nv04_surface_2d { struct nouveau_grobj *blit; struct nouveau_grobj *sifm; - struct pipe_buffer *(*buf)(struct pipe_surface *); + struct nouveau_bo *(*buf)(struct pipe_surface *); void (*copy)(struct nv04_surface_2d *, struct pipe_surface *dst, int dx, int dy, struct pipe_surface *src, int sx, int sy, @@ -34,4 +38,6 @@ nv04_surface_2d_takedown(struct nv04_surface_2d **); struct nv04_surface* nv04_surface_wrap_for_render(struct pipe_screen *pscreen, struct nv04_surface_2d* eng2d, struct nv04_surface* ns); +#define NVFX_RESOURCE_FLAG_LINEAR (PIPE_RESOURCE_FLAG_DRV_PRIV << 0) + #endif diff --git a/src/gallium/drivers/nv30/nv30_fragtex.c b/src/gallium/drivers/nvfx/nv30_fragtex.c index f7d98f3f208..dec073ac900 100644 --- a/src/gallium/drivers/nv30/nv30_fragtex.c +++ b/src/gallium/drivers/nvfx/nv30_fragtex.c @@ -1,7 +1,38 @@ #include "util/u_format.h" -#include "nv30_context.h" +#include "nvfx_context.h" #include "nouveau/nouveau_util.h" +#include "nvfx_tex.h" +#include "nvfx_resource.h" + +void +nv30_sampler_state_init(struct pipe_context *pipe, + struct nvfx_sampler_state *ps, + const struct pipe_sampler_state *cso) +{ + if (cso->max_anisotropy >= 8) { + ps->en |= NV34TCL_TX_ENABLE_ANISO_8X; + } else + if (cso->max_anisotropy >= 4) { + ps->en |= NV34TCL_TX_ENABLE_ANISO_4X; + } else + if (cso->max_anisotropy >= 2) { + ps->en |= NV34TCL_TX_ENABLE_ANISO_2X; + } + + { + float limit; + + limit = CLAMP(cso->lod_bias, -16.0, 15.0); + ps->filt |= (int)(cso->lod_bias * 256.0) & 0x1fff; + + limit = CLAMP(cso->max_lod, 0.0, 15.0); + ps->en |= (int)(limit) << 14 /*NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT*/; + + limit = CLAMP(cso->min_lod, 0.0, 15.0); + ps->en |= (int)(limit) << 26 /*NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT*/; + } +} #define _(m,tf,ts0x,ts0y,ts0z,ts0w,ts1x,ts1y,ts1z,ts1w) \ { \ @@ -33,7 +64,7 @@ nv30_texture_formats[] = { _(I8_UNORM , L8 , S1, S1, S1, S1, X, X, X, X), _(L8A8_UNORM , A8L8 , S1, S1, S1, S1, X, X, X, Y), _(Z16_UNORM , R5G6B5 , S1, S1, S1, ONE, X, X, X, X), - _(S8Z24_UNORM , A8R8G8B8, S1, S1, S1, ONE, X, X, X, X), + _(S8_USCALED_Z24_UNORM , A8R8G8B8, S1, S1, S1, ONE, X, X, X, X), _(DXT1_RGB , DXT1 , S1, S1, S1, ONE, X, Y, Z, W), _(DXT1_RGBA , DXT1 , S1, S1, S1, S1, X, Y, Z, W), _(DXT3_RGBA , DXT3 , S1, S1, S1, S1, X, Y, Z, W), @@ -57,21 +88,21 @@ nv30_fragtex_format(uint pipe_format) } -static struct nouveau_stateobj * -nv30_fragtex_build(struct nv30_context *nv30, int unit) +void +nv30_fragtex_set(struct nvfx_context *nvfx, int unit) { - struct nv30_sampler_state *ps = nv30->tex_sampler[unit]; - struct nv30_miptree *nv30mt = nv30->tex_miptree[unit]; - struct pipe_texture *pt = &nv30mt->base; - struct nouveau_bo *bo = nouveau_bo(nv30mt->buffer); + struct nvfx_sampler_state *ps = nvfx->tex_sampler[unit]; + struct nvfx_miptree *nv30mt = (struct nvfx_miptree *)nvfx->fragment_sampler_views[unit]->texture; + struct pipe_resource *pt = &nv30mt->base.base; + struct nouveau_bo *bo = nv30mt->base.bo; struct nv30_texture_format *tf; - struct nouveau_stateobj *so; + struct nouveau_channel* chan = nvfx->screen->base.channel; uint32_t txf, txs; unsigned tex_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; tf = nv30_fragtex_format(pt->format); if (!tf) - return NULL; + return; txf = tf->format; txf |= ((pt->last_level>0) ? NV34TCL_TX_FORMAT_MIPMAP : 0); @@ -95,67 +126,24 @@ nv30_fragtex_build(struct nv30_context *nv30, int unit) break; default: NOUVEAU_ERR("Unknown target %d\n", pt->target); - return NULL; + return; } txs = tf->swizzle; - so = so_new(1, 8, 2); - so_method(so, nv30->screen->rankine, NV34TCL_TX_OFFSET(unit), 8); - so_reloc (so, bo, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0); - so_reloc (so, bo, txf, tex_flags | NOUVEAU_BO_OR, + MARK_RING(chan, 9, 2); + OUT_RING(chan, RING_3D(NV34TCL_TX_OFFSET(unit), 8)); + OUT_RELOC(chan, bo, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0); + OUT_RELOC(chan, bo, txf, tex_flags | NOUVEAU_BO_OR, NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1); - so_data (so, ps->wrap); - so_data (so, NV34TCL_TX_ENABLE_ENABLE | ps->en); - so_data (so, txs); - so_data (so, ps->filt | 0x2000 /*voodoo*/); - so_data (so, (pt->width0 << NV34TCL_TX_NPOT_SIZE_W_SHIFT) | + OUT_RING(chan, ps->wrap); + OUT_RING(chan, NV34TCL_TX_ENABLE_ENABLE | ps->en); + OUT_RING(chan, txs); + OUT_RING(chan, ps->filt | 0x2000 /*voodoo*/); + OUT_RING(chan, (pt->width0 << NV34TCL_TX_NPOT_SIZE_W_SHIFT) | pt->height0); - so_data (so, ps->bcol); - - return so; -} - -static boolean -nv30_fragtex_validate(struct nv30_context *nv30) -{ - struct nv30_fragment_program *fp = nv30->fragprog; - struct nv30_state *state = &nv30->state; - struct nouveau_stateobj *so; - unsigned samplers, unit; - - samplers = state->fp_samplers & ~fp->samplers; - while (samplers) { - unit = ffs(samplers) - 1; - samplers &= ~(1 << unit); - - so = so_new(1, 1, 0); - so_method(so, nv30->screen->rankine, NV34TCL_TX_ENABLE(unit), 1); - so_data (so, 0); - so_ref(so, &nv30->state.hw[NV30_STATE_FRAGTEX0 + unit]); - so_ref(NULL, &so); - state->dirty |= (1ULL << (NV30_STATE_FRAGTEX0 + unit)); - } - - samplers = nv30->dirty_samplers & fp->samplers; - while (samplers) { - unit = ffs(samplers) - 1; - samplers &= ~(1 << unit); + OUT_RING(chan, ps->bcol); - so = nv30_fragtex_build(nv30, unit); - so_ref(so, &nv30->state.hw[NV30_STATE_FRAGTEX0 + unit]); - so_ref(NULL, &so); - state->dirty |= (1ULL << (NV30_STATE_FRAGTEX0 + unit)); - } - - nv30->state.fp_samplers = fp->samplers; - return FALSE; + nvfx->hw_txf[unit] = txf; + nvfx->hw_samplers |= (1 << unit); } - -struct nv30_state_entry nv30_state_fragtex = { - .validate = nv30_fragtex_validate, - .dirty = { - .pipe = NV30_NEW_SAMPLER | NV30_NEW_FRAGPROG, - .hw = 0 - } -}; diff --git a/src/gallium/drivers/nvfx/nv30_vertprog.h b/src/gallium/drivers/nvfx/nv30_vertprog.h new file mode 100644 index 00000000000..ec0444c07f8 --- /dev/null +++ b/src/gallium/drivers/nvfx/nv30_vertprog.h @@ -0,0 +1,169 @@ +#ifndef __NV30_SHADER_H__ +#define __NV30_SHADER_H__ + +/* Vertex programs instruction set + * + * 128bit opcodes, split into 4 32-bit ones for ease of use. + * + * Non-native instructions + * ABS - MOV + NV40_VP_INST0_DEST_ABS + * POW - EX2 + MUL + LG2 + * SUB - ADD, second source negated + * SWZ - MOV + * XPD - + * + * Register access + * - Only one INPUT can be accessed per-instruction (move extras into TEMPs) + * - Only one CONST can be accessed per-instruction (move extras into TEMPs) + * + * Relative Addressing + * According to the value returned for + * MAX_PROGRAM_NATIVE_ADDRESS_REGISTERS_ARB + * + * there are only two address registers available. The destination in the + * ARL instruction is set to TEMP <n> (The temp isn't actually written). + * + * When using vanilla ARB_v_p, the proprietary driver will squish both the + * available ADDRESS regs into the first hardware reg in the X and Y + * components. + * + * To use an address reg as an index into consts, the CONST_SRC is set to + * (const_base + offset) and INDEX_CONST is set. + * + * To access the second address reg use ADDR_REG_SELECT_1. A particular + * component of the address regs is selected with ADDR_SWZ. + * + * Only one address register can be accessed per instruction. + * + * Conditional execution (see NV_vertex_program{2,3} for details) Conditional + * execution of an instruction is enabled by setting COND_TEST_ENABLE, and + * selecting the condition which will allow the test to pass with + * COND_{FL,LT,...}. It is possible to swizzle the values in the condition + * register, which allows for testing against an individual component. + * + * Branching: + * + * The BRA/CAL instructions seem to follow a slightly different opcode + * layout. The destination instruction ID (IADDR) overlaps a source field. + * Instruction ID's seem to be numbered based on the UPLOAD_FROM_ID FIFO + * command, and is incremented automatically on each UPLOAD_INST FIFO + * command. + * + * Conditional branching is achieved by using the condition tests described + * above. There doesn't appear to be dedicated looping instructions, but + * this can be done using a temp reg + conditional branching. + * + * Subroutines may be uploaded before the main program itself, but the first + * executed instruction is determined by the PROGRAM_START_ID FIFO command. + * + */ + +/* DWORD 0 */ + +#define NV30_VP_INST_ADDR_REG_SELECT_1 (1 << 24) +#define NV30_VP_INST_SRC2_ABS (1 << 23) /* guess */ +#define NV30_VP_INST_SRC1_ABS (1 << 22) /* guess */ +#define NV30_VP_INST_SRC0_ABS (1 << 21) /* guess */ +#define NV30_VP_INST_VEC_RESULT (1 << 20) +#define NV30_VP_INST_DEST_TEMP_ID_SHIFT 16 +#define NV30_VP_INST_DEST_TEMP_ID_MASK (0x0F << 16) +#define NV30_VP_INST_COND_UPDATE_ENABLE (1<<15) +#define NV30_VP_INST_VEC_DEST_TEMP_MASK (0xF << 16) +#define NV30_VP_INST_COND_TEST_ENABLE (1<<14) +#define NV30_VP_INST_COND_SHIFT 11 +#define NV30_VP_INST_COND_MASK (0x07 << 11) +#define NV30_VP_INST_COND_SWZ_X_SHIFT 9 +#define NV30_VP_INST_COND_SWZ_X_MASK (0x03 << 9) +#define NV30_VP_INST_COND_SWZ_Y_SHIFT 7 +#define NV30_VP_INST_COND_SWZ_Y_MASK (0x03 << 7) +#define NV30_VP_INST_COND_SWZ_Z_SHIFT 5 +#define NV30_VP_INST_COND_SWZ_Z_MASK (0x03 << 5) +#define NV30_VP_INST_COND_SWZ_W_SHIFT 3 +#define NV30_VP_INST_COND_SWZ_W_MASK (0x03 << 3) +#define NV30_VP_INST_COND_SWZ_ALL_SHIFT 3 +#define NV30_VP_INST_COND_SWZ_ALL_MASK (0xFF << 3) +#define NV30_VP_INST_ADDR_SWZ_SHIFT 1 +#define NV30_VP_INST_ADDR_SWZ_MASK (0x03 << 1) +#define NV30_VP_INST_SCA_OPCODEH_SHIFT 0 +#define NV30_VP_INST_SCA_OPCODEH_MASK (0x01 << 0) + +/* DWORD 1 */ +#define NV30_VP_INST_SCA_OPCODEL_SHIFT 28 +#define NV30_VP_INST_SCA_OPCODEL_MASK (0x0F << 28) +#define NV30_VP_INST_VEC_OPCODE_SHIFT 23 +#define NV30_VP_INST_VEC_OPCODE_MASK (0x1F << 23) +#define NV30_VP_INST_CONST_SRC_SHIFT 14 +#define NV30_VP_INST_CONST_SRC_MASK (0xFF << 14) +#define NV30_VP_INST_INPUT_SRC_SHIFT 9 /*NV20*/ +#define NV30_VP_INST_INPUT_SRC_MASK (0x0F << 9) /*NV20*/ +#define NV30_VP_INST_SRC0H_SHIFT 0 /*NV20*/ +#define NV30_VP_INST_SRC0H_MASK (0x1FF << 0) /*NV20*/ + +/* Please note: the IADDR fields overlap other fields because they are used + * only for branch instructions. See Branching: label above + * + * DWORD 2 + */ +#define NV30_VP_INST_SRC0L_SHIFT 26 /*NV20*/ +#define NV30_VP_INST_SRC0L_MASK (0x3F <<26) /* NV30_VP_SRC0_LOW_MASK << 26 */ +#define NV30_VP_INST_SRC1_SHIFT 11 /*NV20*/ +#define NV30_VP_INST_SRC1_MASK (0x7FFF<<11) /*NV20*/ +#define NV30_VP_INST_SRC2H_SHIFT 0 /*NV20*/ +#define NV30_VP_INST_SRC2H_MASK (0x7FF << 0) /* NV30_VP_SRC2_HIGH_MASK >> 4*/ +#define NV30_VP_INST_IADDR_SHIFT 2 +#define NV30_VP_INST_IADDR_MASK (0xF << 28) /* NV30_VP_SRC2_LOW_MASK << 28 */ + +/* DWORD 3 */ +#define NV30_VP_INST_SRC2L_SHIFT 28 /*NV20*/ +#define NV30_VP_INST_SRC2L_MASK (0x0F <<28) /*NV20*/ +#define NV30_VP_INST_STEMP_WRITEMASK_SHIFT 24 +#define NV30_VP_INST_STEMP_WRITEMASK_MASK (0x0F << 24) +#define NV30_VP_INST_VTEMP_WRITEMASK_SHIFT 20 +#define NV30_VP_INST_VTEMP_WRITEMASK_MASK (0x0F << 20) +#define NV30_VP_INST_SDEST_WRITEMASK_SHIFT 16 +#define NV30_VP_INST_SDEST_WRITEMASK_MASK (0x0F << 16) +#define NV30_VP_INST_VDEST_WRITEMASK_SHIFT 12 /*NV20*/ +#define NV30_VP_INST_VDEST_WRITEMASK_MASK (0x0F << 12) /*NV20*/ +#define NV30_VP_INST_DEST_SHIFT 2 +#define NV30_VP_INST_DEST_MASK (0x0F << 2) +# define NV30_VP_INST_DEST_POS 0 +# define NV30_VP_INST_DEST_BFC0 1 +# define NV30_VP_INST_DEST_BFC1 2 +# define NV30_VP_INST_DEST_COL0 3 +# define NV30_VP_INST_DEST_COL1 4 +# define NV30_VP_INST_DEST_FOGC 5 +# define NV30_VP_INST_DEST_PSZ 6 +# define NV30_VP_INST_DEST_TC(n) (8+n) + +/* Useful to split the source selection regs into their pieces */ +#define NV30_VP_SRC0_HIGH_SHIFT 6 +#define NV30_VP_SRC0_HIGH_MASK 0x00007FC0 +#define NV30_VP_SRC0_LOW_MASK 0x0000003F +#define NV30_VP_SRC2_HIGH_SHIFT 4 +#define NV30_VP_SRC2_HIGH_MASK 0x00007FF0 +#define NV30_VP_SRC2_LOW_MASK 0x0000000F + + +/* Source-register definition - matches NV20 exactly */ +#define NV30_VP_SRC_NEGATE (1<<14) +#define NV30_VP_SRC_SWZ_X_SHIFT 12 +#define NV30_VP_SRC_REG_SWZ_X_MASK (0x03 <<12) +#define NV30_VP_SRC_SWZ_Y_SHIFT 10 +#define NV30_VP_SRC_REG_SWZ_Y_MASK (0x03 <<10) +#define NV30_VP_SRC_SWZ_Z_SHIFT 8 +#define NV30_VP_SRC_REG_SWZ_Z_MASK (0x03 << 8) +#define NV30_VP_SRC_SWZ_W_SHIFT 6 +#define NV30_VP_SRC_REG_SWZ_W_MASK (0x03 << 6) +#define NV30_VP_SRC_REG_SWZ_ALL_SHIFT 6 +#define NV30_VP_SRC_REG_SWZ_ALL_MASK (0xFF << 6) +#define NV30_VP_SRC_TEMP_SRC_SHIFT 2 +#define NV30_VP_SRC_REG_TEMP_ID_MASK (0x0F << 0) +#define NV30_VP_SRC_REG_TYPE_SHIFT 0 +#define NV30_VP_SRC_REG_TYPE_MASK (0x03 << 0) +#define NV30_VP_SRC_REG_TYPE_TEMP 1 +#define NV30_VP_SRC_REG_TYPE_INPUT 2 +#define NV30_VP_SRC_REG_TYPE_CONST 3 /* guess */ + +#include "nvfx_shader.h" + +#endif diff --git a/src/gallium/drivers/nvfx/nv40_fragtex.c b/src/gallium/drivers/nvfx/nv40_fragtex.c new file mode 100644 index 00000000000..0068b1ba54a --- /dev/null +++ b/src/gallium/drivers/nvfx/nv40_fragtex.c @@ -0,0 +1,176 @@ +#include "util/u_format.h" +#include "nvfx_context.h" +#include "nvfx_tex.h" +#include "nvfx_resource.h" + +void +nv40_sampler_state_init(struct pipe_context *pipe, + struct nvfx_sampler_state *ps, + const struct pipe_sampler_state *cso) +{ + if (cso->max_anisotropy >= 2) { + /* no idea, binary driver sets it, works without it.. meh.. */ + ps->wrap |= (1 << 5); + + if (cso->max_anisotropy >= 16) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_16X; + } else + if (cso->max_anisotropy >= 12) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_12X; + } else + if (cso->max_anisotropy >= 10) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_10X; + } else + if (cso->max_anisotropy >= 8) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_8X; + } else + if (cso->max_anisotropy >= 6) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_6X; + } else + if (cso->max_anisotropy >= 4) { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_4X; + } else { + ps->en |= NV40TCL_TEX_ENABLE_ANISO_2X; + } + } + + { + float limit; + + limit = CLAMP(cso->lod_bias, -16.0, 15.0); + ps->filt |= (int)(cso->lod_bias * 256.0) & 0x1fff; + + limit = CLAMP(cso->max_lod, 0.0, 15.0); + ps->en |= (int)(limit * 256.0) << 7; + + limit = CLAMP(cso->min_lod, 0.0, 15.0); + ps->en |= (int)(limit * 256.0) << 19; + } +} + +#define _(m,tf,ts0x,ts0y,ts0z,ts0w,ts1x,ts1y,ts1z,ts1w,sx,sy,sz,sw) \ +{ \ + TRUE, \ + PIPE_FORMAT_##m, \ + NV40TCL_TEX_FORMAT_FORMAT_##tf, \ + (NV34TCL_TX_SWIZZLE_S0_X_##ts0x | NV34TCL_TX_SWIZZLE_S0_Y_##ts0y | \ + NV34TCL_TX_SWIZZLE_S0_Z_##ts0z | NV34TCL_TX_SWIZZLE_S0_W_##ts0w | \ + NV34TCL_TX_SWIZZLE_S1_X_##ts1x | NV34TCL_TX_SWIZZLE_S1_Y_##ts1y | \ + NV34TCL_TX_SWIZZLE_S1_Z_##ts1z | NV34TCL_TX_SWIZZLE_S1_W_##ts1w), \ + ((NV34TCL_TX_FILTER_SIGNED_RED*sx) | (NV34TCL_TX_FILTER_SIGNED_GREEN*sy) | \ + (NV34TCL_TX_FILTER_SIGNED_BLUE*sz) | (NV34TCL_TX_FILTER_SIGNED_ALPHA*sw)) \ +} + +struct nv40_texture_format { + boolean defined; + uint pipe; + int format; + int swizzle; + int sign; +}; + +static struct nv40_texture_format +nv40_texture_formats[] = { + _(B8G8R8X8_UNORM, A8R8G8B8, S1, S1, S1, ONE, X, Y, Z, W, 0, 0, 0, 0), + _(B8G8R8A8_UNORM, A8R8G8B8, S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), + _(B5G5R5A1_UNORM, A1R5G5B5, S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), + _(B4G4R4A4_UNORM, A4R4G4B4, S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), + _(B5G6R5_UNORM , R5G6B5 , S1, S1, S1, ONE, X, Y, Z, W, 0, 0, 0, 0), + _(L8_UNORM , L8 , S1, S1, S1, ONE, X, X, X, X, 0, 0, 0, 0), + _(A8_UNORM , L8 , ZERO, ZERO, ZERO, S1, X, X, X, X, 0, 0, 0, 0), + _(R16_SNORM , A16 , ZERO, ZERO, S1, ONE, X, X, X, Y, 1, 1, 1, 1), + _(I8_UNORM , L8 , S1, S1, S1, S1, X, X, X, X, 0, 0, 0, 0), + _(L8A8_UNORM , A8L8 , S1, S1, S1, S1, X, X, X, Y, 0, 0, 0, 0), + _(Z16_UNORM , Z16 , S1, S1, S1, ONE, X, X, X, X, 0, 0, 0, 0), + _(S8_USCALED_Z24_UNORM , Z24 , S1, S1, S1, ONE, X, X, X, X, 0, 0, 0, 0), + _(DXT1_RGB , DXT1 , S1, S1, S1, ONE, X, Y, Z, W, 0, 0, 0, 0), + _(DXT1_RGBA , DXT1 , S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), + _(DXT3_RGBA , DXT3 , S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), + _(DXT5_RGBA , DXT5 , S1, S1, S1, S1, X, Y, Z, W, 0, 0, 0, 0), + {}, +}; + +static struct nv40_texture_format * +nv40_fragtex_format(uint pipe_format) +{ + struct nv40_texture_format *tf = nv40_texture_formats; + + while (tf->defined) { + if (tf->pipe == pipe_format) + return tf; + tf++; + } + + NOUVEAU_ERR("unknown texture format %s\n", util_format_name(pipe_format)); + return NULL; +} + + +void +nv40_fragtex_set(struct nvfx_context *nvfx, int unit) +{ + struct nouveau_channel* chan = nvfx->screen->base.channel; + struct nvfx_sampler_state *ps = nvfx->tex_sampler[unit]; + struct nvfx_miptree *nv40mt = (struct nvfx_miptree *)nvfx->fragment_sampler_views[unit]->texture; + struct nouveau_bo *bo = nv40mt->base.bo; + struct pipe_resource *pt = &nv40mt->base.base; + struct nv40_texture_format *tf; + + uint32_t txf, txs, txp; + unsigned tex_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; + + tf = nv40_fragtex_format(pt->format); + if (!tf) + assert(0); + + txf = ps->fmt; + txf |= tf->format | 0x8000; + txf |= ((pt->last_level + 1) << NV40TCL_TEX_FORMAT_MIPMAP_COUNT_SHIFT); + + if (1) /* XXX */ + txf |= NV34TCL_TX_FORMAT_NO_BORDER; + + switch (pt->target) { + case PIPE_TEXTURE_CUBE: + txf |= NV34TCL_TX_FORMAT_CUBIC; + /* fall-through */ + case PIPE_TEXTURE_2D: + txf |= NV34TCL_TX_FORMAT_DIMS_2D; + break; + case PIPE_TEXTURE_3D: + txf |= NV34TCL_TX_FORMAT_DIMS_3D; + break; + case PIPE_TEXTURE_1D: + txf |= NV34TCL_TX_FORMAT_DIMS_1D; + break; + default: + NOUVEAU_ERR("Unknown target %d\n", pt->target); + return; + } + + if (!(pt->flags & NVFX_RESOURCE_FLAG_LINEAR)) { + txp = 0; + } else { + txp = nv40mt->level[0].pitch; + txf |= NV40TCL_TEX_FORMAT_LINEAR; + } + + txs = tf->swizzle; + + MARK_RING(chan, 11 + 2 * !unit, 2); + OUT_RING(chan, RING_3D(NV34TCL_TX_OFFSET(unit), 8)); + OUT_RELOC(chan, bo, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0); + OUT_RELOC(chan, bo, txf, tex_flags | NOUVEAU_BO_OR, + NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1); + OUT_RING(chan, ps->wrap); + OUT_RING(chan, NV40TCL_TEX_ENABLE_ENABLE | ps->en); + OUT_RING(chan, txs); + OUT_RING(chan, ps->filt | tf->sign | 0x2000 /*voodoo*/); + OUT_RING(chan, (pt->width0 << NV34TCL_TX_NPOT_SIZE_W_SHIFT) | pt->height0); + OUT_RING(chan, ps->bcol); + OUT_RING(chan, RING_3D(NV40TCL_TEX_SIZE1(unit), 1)); + OUT_RING(chan, (pt->depth0 << NV40TCL_TEX_SIZE1_DEPTH_SHIFT) | txp); + + nvfx->hw_txf[unit] = txf; + nvfx->hw_samplers |= (1 << unit); +} diff --git a/src/gallium/drivers/nvfx/nv40_vertprog.h b/src/gallium/drivers/nvfx/nv40_vertprog.h new file mode 100644 index 00000000000..7337293babc --- /dev/null +++ b/src/gallium/drivers/nvfx/nv40_vertprog.h @@ -0,0 +1,177 @@ +#ifndef __NV40_SHADER_H__ +#define __NV40_SHADER_H__ + +/* Vertex programs instruction set + * + * The NV40 instruction set is very similar to NV30. Most fields are in + * a slightly different position in the instruction however. + * + * Merged instructions + * In some cases it is possible to put two instructions into one opcode + * slot. The rules for when this is OK is not entirely clear to me yet. + * + * There are separate writemasks and dest temp register fields for each + * grouping of instructions. There is however only one field with the + * ID of a result register. Writing to temp/result regs is selected by + * setting VEC_RESULT/SCA_RESULT. + * + * Temporary registers + * The source/dest temp register fields have been extended by 1 bit, to + * give a total of 32 temporary registers. + * + * Relative Addressing + * NV40 can use an address register to index into vertex attribute regs. + * This is done by putting the offset value into INPUT_SRC and setting + * the INDEX_INPUT flag. + * + * Conditional execution (see NV_vertex_program{2,3} for details) + * There is a second condition code register on NV40, it's use is enabled + * by setting the COND_REG_SELECT_1 flag. + * + * Texture lookup + * TODO + */ + +/* ---- OPCODE BITS 127:96 / data DWORD 0 --- */ +#define NV40_VP_INST_VEC_RESULT (1 << 30) +/* uncertain.. */ +#define NV40_VP_INST_COND_UPDATE_ENABLE ((1 << 14)|1<<29) +/* use address reg as index into attribs */ +#define NV40_VP_INST_INDEX_INPUT (1 << 27) +#define NV40_VP_INST_COND_REG_SELECT_1 (1 << 25) +#define NV40_VP_INST_ADDR_REG_SELECT_1 (1 << 24) +#define NV40_VP_INST_SRC2_ABS (1 << 23) +#define NV40_VP_INST_SRC1_ABS (1 << 22) +#define NV40_VP_INST_SRC0_ABS (1 << 21) +#define NV40_VP_INST_VEC_DEST_TEMP_SHIFT 15 +#define NV40_VP_INST_VEC_DEST_TEMP_MASK (0x1F << 15) +#define NV40_VP_INST_COND_TEST_ENABLE (1 << 13) +#define NV40_VP_INST_COND_SHIFT 10 +#define NV40_VP_INST_COND_MASK (0x7 << 10) +#define NV40_VP_INST_COND_SWZ_X_SHIFT 8 +#define NV40_VP_INST_COND_SWZ_X_MASK (3 << 8) +#define NV40_VP_INST_COND_SWZ_Y_SHIFT 6 +#define NV40_VP_INST_COND_SWZ_Y_MASK (3 << 6) +#define NV40_VP_INST_COND_SWZ_Z_SHIFT 4 +#define NV40_VP_INST_COND_SWZ_Z_MASK (3 << 4) +#define NV40_VP_INST_COND_SWZ_W_SHIFT 2 +#define NV40_VP_INST_COND_SWZ_W_MASK (3 << 2) +#define NV40_VP_INST_COND_SWZ_ALL_SHIFT 2 +#define NV40_VP_INST_COND_SWZ_ALL_MASK (0xFF << 2) +#define NV40_VP_INST_ADDR_SWZ_SHIFT 0 +#define NV40_VP_INST_ADDR_SWZ_MASK (0x03 << 0) +#define NV40_VP_INST0_KNOWN ( \ + NV40_VP_INST_INDEX_INPUT | \ + NV40_VP_INST_COND_REG_SELECT_1 | \ + NV40_VP_INST_ADDR_REG_SELECT_1 | \ + NV40_VP_INST_SRC2_ABS | \ + NV40_VP_INST_SRC1_ABS | \ + NV40_VP_INST_SRC0_ABS | \ + NV40_VP_INST_VEC_DEST_TEMP_MASK | \ + NV40_VP_INST_COND_TEST_ENABLE | \ + NV40_VP_INST_COND_MASK | \ + NV40_VP_INST_COND_SWZ_ALL_MASK | \ + NV40_VP_INST_ADDR_SWZ_MASK) + +/* ---- OPCODE BITS 95:64 / data DWORD 1 --- */ +#define NV40_VP_INST_VEC_OPCODE_SHIFT 22 +#define NV40_VP_INST_VEC_OPCODE_MASK (0x1F << 22) +#define NV40_VP_INST_SCA_OPCODE_SHIFT 27 +#define NV40_VP_INST_SCA_OPCODE_MASK (0x1F << 27) +#define NV40_VP_INST_CONST_SRC_SHIFT 12 +#define NV40_VP_INST_CONST_SRC_MASK (0xFF << 12) +#define NV40_VP_INST_INPUT_SRC_SHIFT 8 +#define NV40_VP_INST_INPUT_SRC_MASK (0x0F << 8) +#define NV40_VP_INST_SRC0H_SHIFT 0 +#define NV40_VP_INST_SRC0H_MASK (0xFF << 0) +#define NV40_VP_INST1_KNOWN ( \ + NV40_VP_INST_VEC_OPCODE_MASK | \ + NV40_VP_INST_SCA_OPCODE_MASK | \ + NV40_VP_INST_CONST_SRC_MASK | \ + NV40_VP_INST_INPUT_SRC_MASK | \ + NV40_VP_INST_SRC0H_MASK \ + ) + +/* ---- OPCODE BITS 63:32 / data DWORD 2 --- */ +#define NV40_VP_INST_SRC0L_SHIFT 23 +#define NV40_VP_INST_SRC0L_MASK (0x1FF << 23) +#define NV40_VP_INST_SRC1_SHIFT 6 +#define NV40_VP_INST_SRC1_MASK (0x1FFFF << 6) +#define NV40_VP_INST_SRC2H_SHIFT 0 +#define NV40_VP_INST_SRC2H_MASK (0x3F << 0) +#define NV40_VP_INST_IADDRH_SHIFT 0 +#define NV40_VP_INST_IADDRH_MASK (0x1F << 0) + +/* ---- OPCODE BITS 31:0 / data DWORD 3 --- */ +#define NV40_VP_INST_IADDRL_SHIFT 29 +#define NV40_VP_INST_IADDRL_MASK (7 << 29) +#define NV40_VP_INST_SRC2L_SHIFT 21 +#define NV40_VP_INST_SRC2L_MASK (0x7FF << 21) +#define NV40_VP_INST_SCA_WRITEMASK_SHIFT 17 +#define NV40_VP_INST_SCA_WRITEMASK_MASK (0xF << 17) +# define NV40_VP_INST_SCA_WRITEMASK_X (1 << 20) +# define NV40_VP_INST_SCA_WRITEMASK_Y (1 << 19) +# define NV40_VP_INST_SCA_WRITEMASK_Z (1 << 18) +# define NV40_VP_INST_SCA_WRITEMASK_W (1 << 17) +#define NV40_VP_INST_VEC_WRITEMASK_SHIFT 13 +#define NV40_VP_INST_VEC_WRITEMASK_MASK (0xF << 13) +# define NV40_VP_INST_VEC_WRITEMASK_X (1 << 16) +# define NV40_VP_INST_VEC_WRITEMASK_Y (1 << 15) +# define NV40_VP_INST_VEC_WRITEMASK_Z (1 << 14) +# define NV40_VP_INST_VEC_WRITEMASK_W (1 << 13) +#define NV40_VP_INST_SCA_RESULT (1 << 12) +#define NV40_VP_INST_SCA_DEST_TEMP_SHIFT 7 +#define NV40_VP_INST_SCA_DEST_TEMP_MASK (0x1F << 7) +#define NV40_VP_INST_DEST_SHIFT 2 +#define NV40_VP_INST_DEST_MASK (31 << 2) +# define NV40_VP_INST_DEST_POS 0 +# define NV40_VP_INST_DEST_COL0 1 +# define NV40_VP_INST_DEST_COL1 2 +# define NV40_VP_INST_DEST_BFC0 3 +# define NV40_VP_INST_DEST_BFC1 4 +# define NV40_VP_INST_DEST_FOGC 5 +# define NV40_VP_INST_DEST_PSZ 6 +# define NV40_VP_INST_DEST_TC0 7 +# define NV40_VP_INST_DEST_TC(n) (7+n) +# define NV40_VP_INST_DEST_TEMP 0x1F +#define NV40_VP_INST_INDEX_CONST (1 << 1) +#define NV40_VP_INST3_KNOWN ( \ + NV40_VP_INST_SRC2L_MASK |\ + NV40_VP_INST_SCA_WRITEMASK_MASK |\ + NV40_VP_INST_VEC_WRITEMASK_MASK |\ + NV40_VP_INST_SCA_DEST_TEMP_MASK |\ + NV40_VP_INST_DEST_MASK |\ + NV40_VP_INST_INDEX_CONST) + +/* Useful to split the source selection regs into their pieces */ +#define NV40_VP_SRC0_HIGH_SHIFT 9 +#define NV40_VP_SRC0_HIGH_MASK 0x0001FE00 +#define NV40_VP_SRC0_LOW_MASK 0x000001FF +#define NV40_VP_SRC2_HIGH_SHIFT 11 +#define NV40_VP_SRC2_HIGH_MASK 0x0001F800 +#define NV40_VP_SRC2_LOW_MASK 0x000007FF + +/* Source selection - these are the bits you fill NV40_VP_INST_SRCn with */ +#define NV40_VP_SRC_NEGATE (1 << 16) +#define NV40_VP_SRC_SWZ_X_SHIFT 14 +#define NV40_VP_SRC_SWZ_X_MASK (3 << 14) +#define NV40_VP_SRC_SWZ_Y_SHIFT 12 +#define NV40_VP_SRC_SWZ_Y_MASK (3 << 12) +#define NV40_VP_SRC_SWZ_Z_SHIFT 10 +#define NV40_VP_SRC_SWZ_Z_MASK (3 << 10) +#define NV40_VP_SRC_SWZ_W_SHIFT 8 +#define NV40_VP_SRC_SWZ_W_MASK (3 << 8) +#define NV40_VP_SRC_SWZ_ALL_SHIFT 8 +#define NV40_VP_SRC_SWZ_ALL_MASK (0xFF << 8) +#define NV40_VP_SRC_TEMP_SRC_SHIFT 2 +#define NV40_VP_SRC_TEMP_SRC_MASK (0x1F << 2) +#define NV40_VP_SRC_REG_TYPE_SHIFT 0 +#define NV40_VP_SRC_REG_TYPE_MASK (3 << 0) +# define NV40_VP_SRC_REG_TYPE_UNK0 0 +# define NV40_VP_SRC_REG_TYPE_TEMP 1 +# define NV40_VP_SRC_REG_TYPE_INPUT 2 +# define NV40_VP_SRC_REG_TYPE_CONST 3 + +#include "nvfx_shader.h" + +#endif diff --git a/src/gallium/drivers/nvfx/nvfx_buffer.c b/src/gallium/drivers/nvfx/nvfx_buffer.c new file mode 100644 index 00000000000..05b824b8f74 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_buffer.c @@ -0,0 +1,153 @@ + +#include "util/u_inlines.h" +#include "util/u_memory.h" +#include "util/u_math.h" + +#include "nouveau/nouveau_screen.h" +#include "nouveau/nouveau_winsys.h" +#include "nvfx_resource.h" + + +/* Currently using separate implementations for buffers and textures, + * even though gallium has a unified abstraction of these objects. + * Eventually these should be combined, and mechanisms like transfers + * be adapted to work for both buffer and texture uploads. + */ +static void nvfx_buffer_destroy(struct pipe_screen *pscreen, + struct pipe_resource *presource) +{ + struct nvfx_resource *buffer = nvfx_resource(presource); + + nouveau_screen_bo_release(pscreen, buffer->bo); + FREE(buffer); +} + + + + +/* Utility functions for transfer create/destroy are hooked in and + * just record the arguments to those functions. + */ +static void * +nvfx_buffer_transfer_map( struct pipe_context *pipe, + struct pipe_transfer *transfer ) +{ + struct nvfx_resource *buffer = nvfx_resource(transfer->resource); + uint8_t *map; + + map = nouveau_screen_bo_map_range( pipe->screen, + buffer->bo, + transfer->box.x, + transfer->box.width, + nouveau_screen_transfer_flags(transfer->usage) ); + if (map == NULL) + return NULL; + + return map + transfer->box.x; +} + + + +static void nvfx_buffer_transfer_flush_region( struct pipe_context *pipe, + struct pipe_transfer *transfer, + const struct pipe_box *box) +{ + struct nvfx_resource *buffer = nvfx_resource(transfer->resource); + + nouveau_screen_bo_map_flush_range(pipe->screen, + buffer->bo, + transfer->box.x + box->x, + box->width); +} + +static void nvfx_buffer_transfer_unmap( struct pipe_context *pipe, + struct pipe_transfer *transfer ) +{ + struct nvfx_resource *buffer = nvfx_resource(transfer->resource); + + nouveau_screen_bo_unmap(pipe->screen, buffer->bo); +} + + + + +struct u_resource_vtbl nvfx_buffer_vtbl = +{ + u_default_resource_get_handle, /* get_handle */ + nvfx_buffer_destroy, /* resource_destroy */ + NULL, /* is_resource_referenced */ + u_default_get_transfer, /* get_transfer */ + u_default_transfer_destroy, /* transfer_destroy */ + nvfx_buffer_transfer_map, /* transfer_map */ + nvfx_buffer_transfer_flush_region, /* transfer_flush_region */ + nvfx_buffer_transfer_unmap, /* transfer_unmap */ + u_default_transfer_inline_write /* transfer_inline_write */ +}; + + + +struct pipe_resource * +nvfx_buffer_create(struct pipe_screen *pscreen, + const struct pipe_resource *template) +{ + struct nvfx_resource *buffer; + + buffer = CALLOC_STRUCT(nvfx_resource); + if (!buffer) + return NULL; + + buffer->base = *template; + buffer->vtbl = &nvfx_buffer_vtbl; + pipe_reference_init(&buffer->base.reference, 1); + buffer->base.screen = pscreen; + + buffer->bo = nouveau_screen_bo_new(pscreen, + 16, + buffer->base.usage, + buffer->base.bind, + buffer->base.width0); + + if (buffer->bo == NULL) + goto fail; + + return &buffer->base; + +fail: + FREE(buffer); + return NULL; +} + + +struct pipe_resource * +nvfx_user_buffer_create(struct pipe_screen *pscreen, + void *ptr, + unsigned bytes, + unsigned usage) +{ + struct nvfx_resource *buffer; + + buffer = CALLOC_STRUCT(nvfx_resource); + if (!buffer) + return NULL; + + pipe_reference_init(&buffer->base.reference, 1); + buffer->vtbl = &nvfx_buffer_vtbl; + buffer->base.screen = pscreen; + buffer->base.format = PIPE_FORMAT_R8_UNORM; + buffer->base.usage = PIPE_USAGE_IMMUTABLE; + buffer->base.bind = usage; + buffer->base.width0 = bytes; + buffer->base.height0 = 1; + buffer->base.depth0 = 1; + + buffer->bo = nouveau_screen_bo_user(pscreen, ptr, bytes); + if (!buffer->bo) + goto fail; + + return &buffer->base; + +fail: + FREE(buffer); + return NULL; +} + diff --git a/src/gallium/drivers/nv40/nv40_clear.c b/src/gallium/drivers/nvfx/nvfx_clear.c index ddf13addf3b..2be70fcee40 100644 --- a/src/gallium/drivers/nv40/nv40_clear.c +++ b/src/gallium/drivers/nvfx/nvfx_clear.c @@ -3,12 +3,12 @@ #include "pipe/p_state.h" #include "util/u_clear.h" -#include "nv40_context.h" +#include "nvfx_context.h" void -nv40_clear(struct pipe_context *pipe, unsigned buffers, +nvfx_clear(struct pipe_context *pipe, unsigned buffers, const float *rgba, double depth, unsigned stencil) { - util_clear(pipe, &nv40_context(pipe)->framebuffer, buffers, rgba, depth, + util_clear(pipe, &nvfx_context(pipe)->framebuffer, buffers, rgba, depth, stencil); } diff --git a/src/gallium/drivers/nvfx/nvfx_context.c b/src/gallium/drivers/nvfx/nvfx_context.c new file mode 100644 index 00000000000..6d2dc4d5bf6 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_context.c @@ -0,0 +1,84 @@ +#include "draw/draw_context.h" +#include "pipe/p_defines.h" + +#include "nvfx_context.h" +#include "nvfx_screen.h" +#include "nvfx_resource.h" + +static void +nvfx_flush(struct pipe_context *pipe, unsigned flags, + struct pipe_fence_handle **fence) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + + if (flags & PIPE_FLUSH_TEXTURE_CACHE) { + BEGIN_RING(chan, eng3d, 0x1fd8, 1); + OUT_RING (chan, 2); + BEGIN_RING(chan, eng3d, 0x1fd8, 1); + OUT_RING (chan, 1); + } + + FIRE_RING(chan); + if (fence) + *fence = NULL; +} + +static void +nvfx_destroy(struct pipe_context *pipe) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + if (nvfx->draw) + draw_destroy(nvfx->draw); + FREE(nvfx); +} + +struct pipe_context * +nvfx_create(struct pipe_screen *pscreen, void *priv) +{ + struct nvfx_screen *screen = nvfx_screen(pscreen); + struct pipe_winsys *ws = pscreen->winsys; + struct nvfx_context *nvfx; + struct nouveau_winsys *nvws = screen->nvws; + + nvfx = CALLOC(1, sizeof(struct nvfx_context)); + if (!nvfx) + return NULL; + nvfx->screen = screen; + + nvfx->nvws = nvws; + + nvfx->pipe.winsys = ws; + nvfx->pipe.screen = pscreen; + nvfx->pipe.priv = priv; + nvfx->pipe.destroy = nvfx_destroy; + nvfx->pipe.draw_arrays = nvfx_draw_arrays; + nvfx->pipe.draw_elements = nvfx_draw_elements; + nvfx->pipe.clear = nvfx_clear; + nvfx->pipe.flush = nvfx_flush; + + screen->base.channel->user_private = nvfx; + + nvfx->is_nv4x = screen->is_nv4x; + + nvfx_init_query_functions(nvfx); + nvfx_init_surface_functions(nvfx); + nvfx_init_state_functions(nvfx); + nvfx_init_resource_functions(&nvfx->pipe); + + /* Create, configure, and install fallback swtnl path */ + nvfx->draw = draw_create(&nvfx->pipe); + draw_wide_point_threshold(nvfx->draw, 9999999.0); + draw_wide_line_threshold(nvfx->draw, 9999999.0); + draw_enable_line_stipple(nvfx->draw, FALSE); + draw_enable_point_sprites(nvfx->draw, FALSE); + draw_set_rasterize_stage(nvfx->draw, nvfx_draw_render_stage(nvfx)); + + /* set these to that we init them on first validation */ + nvfx->state.scissor_enabled = ~0; + nvfx->state.stipple_enabled = ~0; + return &nvfx->pipe; +} diff --git a/src/gallium/drivers/nvfx/nvfx_context.h b/src/gallium/drivers/nvfx/nvfx_context.h new file mode 100644 index 00000000000..e48f9f3aa88 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_context.h @@ -0,0 +1,251 @@ +#ifndef __NVFX_CONTEXT_H__ +#define __NVFX_CONTEXT_H__ + +#include <stdio.h> + +#include "pipe/p_context.h" +#include "pipe/p_defines.h" +#include "pipe/p_state.h" +#include "pipe/p_compiler.h" + +#include "util/u_memory.h" +#include "util/u_math.h" +#include "util/u_inlines.h" + +#include "draw/draw_vertex.h" + +#include "nouveau/nouveau_winsys.h" +#include "nouveau/nouveau_gldefs.h" + +#include "nvfx_state.h" + +#define NOUVEAU_ERR(fmt, args...) \ + fprintf(stderr, "%s:%d - "fmt, __func__, __LINE__, ##args); +#define NOUVEAU_MSG(fmt, args...) \ + fprintf(stderr, "nouveau: "fmt, ##args); + +#include "nvfx_screen.h" + +#define NVFX_NEW_BLEND (1 << 0) +#define NVFX_NEW_RAST (1 << 1) +#define NVFX_NEW_ZSA (1 << 2) +#define NVFX_NEW_SAMPLER (1 << 3) +#define NVFX_NEW_FB (1 << 4) +#define NVFX_NEW_STIPPLE (1 << 5) +#define NVFX_NEW_SCISSOR (1 << 6) +#define NVFX_NEW_VIEWPORT (1 << 7) +#define NVFX_NEW_BCOL (1 << 8) +#define NVFX_NEW_VERTPROG (1 << 9) +#define NVFX_NEW_FRAGPROG (1 << 10) +#define NVFX_NEW_ARRAYS (1 << 11) +#define NVFX_NEW_UCP (1 << 12) +#define NVFX_NEW_SR (1 << 13) +#define NVFX_NEW_VERTCONST (1 << 14) +#define NVFX_NEW_FRAGCONST (1 << 15) + +struct nvfx_rasterizer_state { + struct pipe_rasterizer_state pipe; + unsigned sb_len; + uint32_t sb[32]; +}; + +struct nvfx_zsa_state { + struct pipe_depth_stencil_alpha_state pipe; + unsigned sb_len; + uint32_t sb[26]; +}; + +struct nvfx_blend_state { + struct pipe_blend_state pipe; + unsigned sb_len; + uint32_t sb[13]; +}; + + +struct nvfx_state { + unsigned scissor_enabled; + unsigned stipple_enabled; + unsigned fp_samplers; +}; + +struct nvfx_vtxelt_state { + struct pipe_vertex_element pipe[16]; + unsigned num_elements; +}; + +struct nvfx_render_target { + struct nouveau_bo* bo; + unsigned offset; + unsigned pitch; +}; + +struct nvfx_context { + struct pipe_context pipe; + + struct nouveau_winsys *nvws; + struct nvfx_screen *screen; + + unsigned is_nv4x; /* either 0 or ~0 */ + + struct draw_context *draw; + + /* HW state derived from pipe states */ + struct nvfx_state state; + struct { + struct nvfx_vertex_program *vertprog; + + unsigned nr_attribs; + unsigned hw[PIPE_MAX_SHADER_INPUTS]; + unsigned draw[PIPE_MAX_SHADER_INPUTS]; + unsigned emit[PIPE_MAX_SHADER_INPUTS]; + } swtnl; + + enum { + HW, SWTNL, SWRAST + } render_mode; + unsigned fallback_swtnl; + + /* Context state */ + unsigned dirty, draw_dirty; + struct pipe_scissor_state scissor; + unsigned stipple[32]; + struct pipe_clip_state clip; + struct nvfx_vertex_program *vertprog; + struct nvfx_fragment_program *fragprog; + struct pipe_resource *constbuf[PIPE_SHADER_TYPES]; + unsigned constbuf_nr[PIPE_SHADER_TYPES]; + struct nvfx_rasterizer_state *rasterizer; + struct nvfx_zsa_state *zsa; + struct nvfx_blend_state *blend; + struct pipe_blend_color blend_colour; + struct pipe_stencil_ref stencil_ref; + struct pipe_viewport_state viewport; + struct pipe_framebuffer_state framebuffer; + struct pipe_resource *idxbuf; + unsigned idxbuf_format; + struct nvfx_sampler_state *tex_sampler[PIPE_MAX_SAMPLERS]; + struct pipe_sampler_view *fragment_sampler_views[PIPE_MAX_SAMPLERS]; + unsigned nr_samplers; + unsigned nr_textures; + unsigned dirty_samplers; + struct pipe_vertex_buffer vtxbuf[PIPE_MAX_ATTRIBS]; + unsigned vtxbuf_nr; + struct nvfx_vtxelt_state *vtxelt; + + unsigned vbo_bo; + unsigned hw_vtxelt_nr; + uint8_t hw_samplers; + uint32_t hw_txf[8]; + struct nvfx_render_target hw_rt[4]; + struct nvfx_render_target hw_zeta; +}; + +static INLINE struct nvfx_context * +nvfx_context(struct pipe_context *pipe) +{ + return (struct nvfx_context *)pipe; +} + +extern struct nvfx_state_entry nvfx_state_blend; +extern struct nvfx_state_entry nvfx_state_blend_colour; +extern struct nvfx_state_entry nvfx_state_fragprog; +extern struct nvfx_state_entry nvfx_state_fragtex; +extern struct nvfx_state_entry nvfx_state_framebuffer; +extern struct nvfx_state_entry nvfx_state_rasterizer; +extern struct nvfx_state_entry nvfx_state_scissor; +extern struct nvfx_state_entry nvfx_state_sr; +extern struct nvfx_state_entry nvfx_state_stipple; +extern struct nvfx_state_entry nvfx_state_vbo; +extern struct nvfx_state_entry nvfx_state_vertprog; +extern struct nvfx_state_entry nvfx_state_viewport; +extern struct nvfx_state_entry nvfx_state_vtxfmt; +extern struct nvfx_state_entry nvfx_state_zsa; + +extern void nvfx_init_query_functions(struct nvfx_context *nvfx); +extern void nvfx_init_surface_functions(struct nvfx_context *nvfx); + +/* nvfx_context.c */ +struct pipe_context * +nvfx_create(struct pipe_screen *pscreen, void *priv); + +/* nvfx_clear.c */ +extern void nvfx_clear(struct pipe_context *pipe, unsigned buffers, + const float *rgba, double depth, unsigned stencil); + +/* nvfx_draw.c */ +extern struct draw_stage *nvfx_draw_render_stage(struct nvfx_context *nvfx); +extern void nvfx_draw_elements_swtnl(struct pipe_context *pipe, + struct pipe_resource *idxbuf, + unsigned ib_size, int ib_bias, + unsigned mode, + unsigned start, unsigned count); +extern void nvfx_vtxfmt_validate(struct nvfx_context *nvfx); + +/* nvfx_fb.c */ +extern void nvfx_state_framebuffer_validate(struct nvfx_context *nvfx); +void +nvfx_framebuffer_relocate(struct nvfx_context *nvfx); + +/* nvfx_fragprog.c */ +extern void nvfx_fragprog_destroy(struct nvfx_context *, + struct nvfx_fragment_program *); +extern void nvfx_fragprog_validate(struct nvfx_context *nvfx); +extern void +nvfx_fragprog_relocate(struct nvfx_context *nvfx); + +/* nvfx_fragtex.c */ +extern void nvfx_fragtex_validate(struct nvfx_context *nvfx); +extern void +nvfx_fragtex_relocate(struct nvfx_context *nvfx); + +/* nv30_fragtex.c */ +extern void +nv30_sampler_state_init(struct pipe_context *pipe, + struct nvfx_sampler_state *ps, + const struct pipe_sampler_state *cso); +extern void nv30_fragtex_set(struct nvfx_context *nvfx, int unit); + +/* nv40_fragtex.c */ +extern void +nv40_sampler_state_init(struct pipe_context *pipe, + struct nvfx_sampler_state *ps, + const struct pipe_sampler_state *cso); +extern void nv40_fragtex_set(struct nvfx_context *nvfx, int unit); + +/* nvfx_state.c */ +extern void nvfx_init_state_functions(struct nvfx_context *nvfx); +extern void nvfx_state_scissor_validate(struct nvfx_context *nvfx); +extern void nvfx_state_stipple_validate(struct nvfx_context *nvfx); +extern void nvfx_state_blend_validate(struct nvfx_context *nvfx); +extern void nvfx_state_blend_colour_validate(struct nvfx_context *nvfx); +extern void nvfx_state_viewport_validate(struct nvfx_context *nvfx); +extern void nvfx_state_rasterizer_validate(struct nvfx_context *nvfx); +extern void nvfx_state_sr_validate(struct nvfx_context *nvfx); +extern void nvfx_state_zsa_validate(struct nvfx_context *nvfx); + +/* nvfx_state_emit.c */ +extern void nvfx_state_relocate(struct nvfx_context *nvfx); +extern boolean nvfx_state_validate(struct nvfx_context *nvfx); +extern boolean nvfx_state_validate_swtnl(struct nvfx_context *nvfx); +extern void nvfx_state_emit(struct nvfx_context *nvfx); + +/* nvfx_transfer.c */ +extern void nvfx_init_transfer_functions(struct nvfx_context *nvfx); + +/* nvfx_vbo.c */ +extern boolean nvfx_vbo_validate(struct nvfx_context *nvfx); +extern void nvfx_vbo_relocate(struct nvfx_context *nvfx); +extern void nvfx_draw_arrays(struct pipe_context *, unsigned mode, + unsigned start, unsigned count); +extern void nvfx_draw_elements(struct pipe_context *pipe, + struct pipe_resource *indexBuffer, + unsigned indexSize, int indexBias, + unsigned mode, unsigned start, + unsigned count); + +/* nvfx_vertprog.c */ +extern boolean nvfx_vertprog_validate(struct nvfx_context *nvfx); +extern void nvfx_vertprog_destroy(struct nvfx_context *, + struct nvfx_vertex_program *); + +#endif diff --git a/src/gallium/drivers/nvfx/nvfx_draw.c b/src/gallium/drivers/nvfx/nvfx_draw.c new file mode 100644 index 00000000000..22cff370b77 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_draw.c @@ -0,0 +1,350 @@ +#include "pipe/p_shader_tokens.h" +#include "util/u_inlines.h" +#include "tgsi/tgsi_ureg.h" + +#include "util/u_pack_color.h" + +#include "draw/draw_context.h" +#include "draw/draw_vertex.h" +#include "draw/draw_pipe.h" + +#include "nvfx_context.h" + +/* Simple, but crappy, swtnl path, hopefully we wont need to hit this very + * often at all. Uses "quadro style" vertex submission + a fixed vertex + * layout to avoid the need to generate a vertex program or vtxfmt. + */ + +struct nvfx_render_stage { + struct draw_stage stage; + struct nvfx_context *nvfx; + unsigned prim; +}; + +static INLINE struct nvfx_render_stage * +nvfx_render_stage(struct draw_stage *stage) +{ + return (struct nvfx_render_stage *)stage; +} + +static INLINE void +nvfx_render_vertex(struct nvfx_context *nvfx, const struct vertex_header *v) +{ + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + unsigned i; + + for (i = 0; i < nvfx->swtnl.nr_attribs; i++) { + unsigned idx = nvfx->swtnl.draw[i]; + unsigned hw = nvfx->swtnl.hw[i]; + + switch (nvfx->swtnl.emit[i]) { + case EMIT_OMIT: + break; + case EMIT_1F: + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_1F(hw), 1); + OUT_RING (chan, fui(v->data[idx][0])); + break; + case EMIT_2F: + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_2F_X(hw), 2); + OUT_RING (chan, fui(v->data[idx][0])); + OUT_RING (chan, fui(v->data[idx][1])); + break; + case EMIT_3F: + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_3F_X(hw), 3); + OUT_RING (chan, fui(v->data[idx][0])); + OUT_RING (chan, fui(v->data[idx][1])); + OUT_RING (chan, fui(v->data[idx][2])); + break; + case EMIT_4F: + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_4F_X(hw), 4); + OUT_RING (chan, fui(v->data[idx][0])); + OUT_RING (chan, fui(v->data[idx][1])); + OUT_RING (chan, fui(v->data[idx][2])); + OUT_RING (chan, fui(v->data[idx][3])); + break; + case 0xff: + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_4F_X(hw), 4); + OUT_RING (chan, fui(v->data[idx][0] / v->data[idx][3])); + OUT_RING (chan, fui(v->data[idx][1] / v->data[idx][3])); + OUT_RING (chan, fui(v->data[idx][2] / v->data[idx][3])); + OUT_RING (chan, fui(1.0f / v->data[idx][3])); + break; + case EMIT_4UB: + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_4UB(hw), 1); + OUT_RING (chan, pack_ub4(float_to_ubyte(v->data[idx][0]), + float_to_ubyte(v->data[idx][1]), + float_to_ubyte(v->data[idx][2]), + float_to_ubyte(v->data[idx][3]))); + case EMIT_4UB_BGRA: + BEGIN_RING(chan, eng3d, NV34TCL_VTX_ATTR_4UB(hw), 1); + OUT_RING (chan, pack_ub4(float_to_ubyte(v->data[idx][2]), + float_to_ubyte(v->data[idx][1]), + float_to_ubyte(v->data[idx][0]), + float_to_ubyte(v->data[idx][3]))); + break; + default: + assert(0); + break; + } + } +} + +static INLINE void +nvfx_render_prim(struct draw_stage *stage, struct prim_header *prim, + unsigned mode, unsigned count) +{ + struct nvfx_render_stage *rs = nvfx_render_stage(stage); + struct nvfx_context *nvfx = rs->nvfx; + + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + unsigned i; + + /* Ensure there's room for 4xfloat32 + potentially 3 begin/end */ + if (AVAIL_RING(chan) < ((count * 20) + 6)) { + if (rs->prim != NV34TCL_VERTEX_BEGIN_END_STOP) { + NOUVEAU_ERR("AIII, missed flush\n"); + assert(0); + } + FIRE_RING(chan); + nvfx_state_emit(nvfx); + } + + /* Switch primitive modes if necessary */ + if (rs->prim != mode) { + if (rs->prim != NV34TCL_VERTEX_BEGIN_END_STOP) { + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, NV34TCL_VERTEX_BEGIN_END_STOP); + } + + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, mode); + rs->prim = mode; + } + + /* Emit vertex data */ + for (i = 0; i < count; i++) + nvfx_render_vertex(nvfx, prim->v[i]); + + /* If it's likely we'll need to empty the push buffer soon, finish + * off the primitive now. + */ + if (AVAIL_RING(chan) < ((count * 20) + 6)) { + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, NV34TCL_VERTEX_BEGIN_END_STOP); + rs->prim = NV34TCL_VERTEX_BEGIN_END_STOP; + } +} + +static void +nvfx_render_point(struct draw_stage *draw, struct prim_header *prim) +{ + nvfx_render_prim(draw, prim, NV34TCL_VERTEX_BEGIN_END_POINTS, 1); +} + +static void +nvfx_render_line(struct draw_stage *draw, struct prim_header *prim) +{ + nvfx_render_prim(draw, prim, NV34TCL_VERTEX_BEGIN_END_LINES, 2); +} + +static void +nvfx_render_tri(struct draw_stage *draw, struct prim_header *prim) +{ + nvfx_render_prim(draw, prim, NV34TCL_VERTEX_BEGIN_END_TRIANGLES, 3); +} + +static void +nvfx_render_flush(struct draw_stage *draw, unsigned flags) +{ + struct nvfx_render_stage *rs = nvfx_render_stage(draw); + struct nvfx_context *nvfx = rs->nvfx; + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + + if (rs->prim != NV34TCL_VERTEX_BEGIN_END_STOP) { + BEGIN_RING(chan, eng3d, NV34TCL_VERTEX_BEGIN_END, 1); + OUT_RING (chan, NV34TCL_VERTEX_BEGIN_END_STOP); + rs->prim = NV34TCL_VERTEX_BEGIN_END_STOP; + } +} + +static void +nvfx_render_reset_stipple_counter(struct draw_stage *draw) +{ +} + +static void +nvfx_render_destroy(struct draw_stage *draw) +{ + FREE(draw); +} + +static struct nvfx_vertex_program * +nvfx_create_drawvp(struct nvfx_context *nvfx) +{ + struct ureg_program *ureg; + uint i; + + ureg = ureg_create( TGSI_PROCESSOR_VERTEX ); + if (ureg == NULL) + return NULL; + + ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0), ureg_DECL_vs_input(ureg, 0)); + ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, 0), ureg_DECL_vs_input(ureg, 3)); + ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, 1), ureg_DECL_vs_input(ureg, 4)); + ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_BCOLOR, 0), ureg_DECL_vs_input(ureg, 3)); + ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_BCOLOR, 1), ureg_DECL_vs_input(ureg, 4)); + ureg_MOV(ureg, + ureg_writemask(ureg_DECL_output(ureg, TGSI_SEMANTIC_FOG, 1), TGSI_WRITEMASK_X), + ureg_DECL_vs_input(ureg, 5)); + for (i = 0; i < 8; ++i) + ureg_MOV(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_GENERIC, i), ureg_DECL_vs_input(ureg, 8 + i)); + + ureg_END( ureg ); + + return ureg_create_shader_and_destroy( ureg, &nvfx->pipe ); +} + +struct draw_stage * +nvfx_draw_render_stage(struct nvfx_context *nvfx) +{ + struct nvfx_render_stage *render = CALLOC_STRUCT(nvfx_render_stage); + + if (!nvfx->swtnl.vertprog) + nvfx->swtnl.vertprog = nvfx_create_drawvp(nvfx); + + render->nvfx = nvfx; + render->stage.draw = nvfx->draw; + render->stage.point = nvfx_render_point; + render->stage.line = nvfx_render_line; + render->stage.tri = nvfx_render_tri; + render->stage.flush = nvfx_render_flush; + render->stage.reset_stipple_counter = nvfx_render_reset_stipple_counter; + render->stage.destroy = nvfx_render_destroy; + + return &render->stage; +} + +void +nvfx_draw_elements_swtnl(struct pipe_context *pipe, + struct pipe_resource *idxbuf, + unsigned idxbuf_size, int idxbuf_bias, + unsigned mode, unsigned start, unsigned count) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS]; + struct pipe_transfer *ib_transfer = NULL; + struct pipe_transfer *cb_transfer = NULL; + unsigned i; + void *map; + + if (!nvfx_state_validate_swtnl(nvfx)) + return; + nvfx_state_emit(nvfx); + + for (i = 0; i < nvfx->vtxbuf_nr; i++) { + map = pipe_buffer_map(pipe, nvfx->vtxbuf[i].buffer, + PIPE_TRANSFER_READ, + &vb_transfer[i]); + draw_set_mapped_vertex_buffer(nvfx->draw, i, map); + } + + if (idxbuf) { + map = pipe_buffer_map(pipe, idxbuf, + PIPE_TRANSFER_READ, + &ib_transfer); + draw_set_mapped_element_buffer(nvfx->draw, idxbuf_size, idxbuf_bias, map); + } else { + draw_set_mapped_element_buffer(nvfx->draw, 0, 0, NULL); + } + + if (nvfx->constbuf[PIPE_SHADER_VERTEX]) { + const unsigned nr = nvfx->constbuf_nr[PIPE_SHADER_VERTEX]; + + map = pipe_buffer_map(pipe, + nvfx->constbuf[PIPE_SHADER_VERTEX], + PIPE_TRANSFER_READ, + &cb_transfer); + draw_set_mapped_constant_buffer(nvfx->draw, PIPE_SHADER_VERTEX, 0, + map, nr); + } + + draw_arrays(nvfx->draw, mode, start, count); + + for (i = 0; i < nvfx->vtxbuf_nr; i++) + pipe_buffer_unmap(pipe, nvfx->vtxbuf[i].buffer, vb_transfer[i]); + + if (idxbuf) + pipe_buffer_unmap(pipe, idxbuf, ib_transfer); + + if (nvfx->constbuf[PIPE_SHADER_VERTEX]) + pipe_buffer_unmap(pipe, nvfx->constbuf[PIPE_SHADER_VERTEX], + cb_transfer); + + draw_flush(nvfx->draw); + pipe->flush(pipe, 0, NULL); +} + +static INLINE void +emit_attrib(struct nvfx_context *nvfx, unsigned hw, unsigned emit, + unsigned semantic, unsigned index) +{ + unsigned draw_out = draw_find_shader_output(nvfx->draw, semantic, index); + unsigned a = nvfx->swtnl.nr_attribs++; + + nvfx->swtnl.hw[a] = hw; + nvfx->swtnl.emit[a] = emit; + nvfx->swtnl.draw[a] = draw_out; +} + +void +nvfx_vtxfmt_validate(struct nvfx_context *nvfx) +{ + struct nvfx_fragment_program *fp = nvfx->fragprog; + unsigned colour = 0, texcoords = 0, fog = 0, i; + + /* Determine needed fragprog inputs */ + for (i = 0; i < fp->info.num_inputs; i++) { + switch (fp->info.input_semantic_name[i]) { + case TGSI_SEMANTIC_POSITION: + break; + case TGSI_SEMANTIC_COLOR: + colour |= (1 << fp->info.input_semantic_index[i]); + break; + case TGSI_SEMANTIC_GENERIC: + texcoords |= (1 << fp->info.input_semantic_index[i]); + break; + case TGSI_SEMANTIC_FOG: + fog = 1; + break; + default: + assert(0); + } + } + + nvfx->swtnl.nr_attribs = 0; + + /* Map draw vtxprog output to hw attribute IDs */ + for (i = 0; i < 2; i++) { + if (!(colour & (1 << i))) + continue; + emit_attrib(nvfx, 3 + i, EMIT_4F, TGSI_SEMANTIC_COLOR, i); + } + + for (i = 0; i < 8; i++) { + if (!(texcoords & (1 << i))) + continue; + emit_attrib(nvfx, 8 + i, EMIT_4F, TGSI_SEMANTIC_GENERIC, i); + } + + if (fog) { + emit_attrib(nvfx, 5, EMIT_1F, TGSI_SEMANTIC_FOG, 0); + } + + emit_attrib(nvfx, 0, 0xff, TGSI_SEMANTIC_POSITION, 0); +} diff --git a/src/gallium/drivers/nv40/nv40_fragprog.c b/src/gallium/drivers/nvfx/nvfx_fragprog.c index dc24f9b08a5..6772d9bd516 100644 --- a/src/gallium/drivers/nv40/nv40_fragprog.c +++ b/src/gallium/drivers/nvfx/nvfx_fragprog.c @@ -7,37 +7,20 @@ #include "tgsi/tgsi_parse.h" #include "tgsi/tgsi_util.h" -#include "nv40_context.h" - -#define SWZ_X 0 -#define SWZ_Y 1 -#define SWZ_Z 2 -#define SWZ_W 3 -#define MASK_X 1 -#define MASK_Y 2 -#define MASK_Z 4 -#define MASK_W 8 -#define MASK_ALL (MASK_X|MASK_Y|MASK_Z|MASK_W) -#define DEF_SCALE NV40_FP_OP_DST_SCALE_1X -#define DEF_CTEST NV40_FP_OP_COND_TR -#include "nv40_shader.h" - -#define swz(s,x,y,z,w) nv40_sr_swz((s), SWZ_##x, SWZ_##y, SWZ_##z, SWZ_##w) -#define neg(s) nv40_sr_neg((s)) -#define abs(s) nv40_sr_abs((s)) -#define scale(s,v) nv40_sr_scale((s), NV40_FP_OP_DST_SCALE_##v) +#include "nvfx_context.h" +#include "nvfx_shader.h" #define MAX_CONSTS 128 #define MAX_IMM 32 -struct nv40_fpc { - struct nv40_fragment_program *fp; +struct nvfx_fpc { + struct nvfx_fragment_program *fp; uint attrib_map[PIPE_MAX_SHADER_INPUTS]; unsigned r_temps; unsigned r_temps_discard; - struct nv40_sreg r_result[PIPE_MAX_SHADER_OUTPUTS]; - struct nv40_sreg *r_temp; + struct nvfx_sreg r_result[PIPE_MAX_SHADER_OUTPUTS]; + struct nvfx_sreg *r_temp; int num_regs; @@ -50,35 +33,35 @@ struct nv40_fpc { } consts[MAX_CONSTS]; int nr_consts; - struct nv40_sreg imm[MAX_IMM]; + struct nvfx_sreg imm[MAX_IMM]; unsigned nr_imm; }; -static INLINE struct nv40_sreg -temp(struct nv40_fpc *fpc) +static INLINE struct nvfx_sreg +temp(struct nvfx_fpc *fpc) { int idx = ffs(~fpc->r_temps) - 1; if (idx < 0) { NOUVEAU_ERR("out of temps!!\n"); assert(0); - return nv40_sr(NV40SR_TEMP, 0); + return nvfx_sr(NVFXSR_TEMP, 0); } fpc->r_temps |= (1 << idx); fpc->r_temps_discard |= (1 << idx); - return nv40_sr(NV40SR_TEMP, idx); + return nvfx_sr(NVFXSR_TEMP, idx); } static INLINE void -release_temps(struct nv40_fpc *fpc) +release_temps(struct nvfx_fpc *fpc) { fpc->r_temps &= ~fpc->r_temps_discard; fpc->r_temps_discard = 0; } -static INLINE struct nv40_sreg -constant(struct nv40_fpc *fpc, int pipe, float vals[4]) +static INLINE struct nvfx_sreg +constant(struct nvfx_fpc *fpc, int pipe, float vals[4]) { int idx; @@ -89,45 +72,45 @@ constant(struct nv40_fpc *fpc, int pipe, float vals[4]) fpc->consts[idx].pipe = pipe; if (pipe == -1) memcpy(fpc->consts[idx].vals, vals, 4 * sizeof(float)); - return nv40_sr(NV40SR_CONST, idx); + return nvfx_sr(NVFXSR_CONST, idx); } #define arith(cc,s,o,d,m,s0,s1,s2) \ - nv40_fp_arith((cc), (s), NV40_FP_OP_OPCODE_##o, \ + nvfx_fp_arith((cc), (s), NVFX_FP_OP_OPCODE_##o, \ (d), (m), (s0), (s1), (s2)) #define tex(cc,s,o,u,d,m,s0,s1,s2) \ - nv40_fp_tex((cc), (s), NV40_FP_OP_OPCODE_##o, (u), \ + nvfx_fp_tex((cc), (s), NVFX_FP_OP_OPCODE_##o, (u), \ (d), (m), (s0), none, none) static void -grow_insns(struct nv40_fpc *fpc, int size) +grow_insns(struct nvfx_fpc *fpc, int size) { - struct nv40_fragment_program *fp = fpc->fp; + struct nvfx_fragment_program *fp = fpc->fp; fp->insn_len += size; fp->insn = realloc(fp->insn, sizeof(uint32_t) * fp->insn_len); } static void -emit_src(struct nv40_fpc *fpc, int pos, struct nv40_sreg src) +emit_src(struct nvfx_fpc *fpc, int pos, struct nvfx_sreg src) { - struct nv40_fragment_program *fp = fpc->fp; + struct nvfx_fragment_program *fp = fpc->fp; uint32_t *hw = &fp->insn[fpc->inst_offset]; uint32_t sr = 0; switch (src.type) { - case NV40SR_INPUT: - sr |= (NV40_FP_REG_TYPE_INPUT << NV40_FP_REG_TYPE_SHIFT); - hw[0] |= (src.index << NV40_FP_OP_INPUT_SRC_SHIFT); + case NVFXSR_INPUT: + sr |= (NVFX_FP_REG_TYPE_INPUT << NVFX_FP_REG_TYPE_SHIFT); + hw[0] |= (src.index << NVFX_FP_OP_INPUT_SRC_SHIFT); break; - case NV40SR_OUTPUT: - sr |= NV40_FP_REG_SRC_HALF; + case NVFXSR_OUTPUT: + sr |= NVFX_FP_REG_SRC_HALF; /* fall-through */ - case NV40SR_TEMP: - sr |= (NV40_FP_REG_TYPE_TEMP << NV40_FP_REG_TYPE_SHIFT); - sr |= (src.index << NV40_FP_REG_SRC_SHIFT); + case NVFXSR_TEMP: + sr |= (NVFX_FP_REG_TYPE_TEMP << NVFX_FP_REG_TYPE_SHIFT); + sr |= (src.index << NVFX_FP_REG_SRC_SHIFT); break; - case NV40SR_CONST: + case NVFXSR_CONST: if (!fpc->have_const) { grow_insns(fpc, 4); fpc->have_const = 1; @@ -135,7 +118,7 @@ emit_src(struct nv40_fpc *fpc, int pos, struct nv40_sreg src) hw = &fp->insn[fpc->inst_offset]; if (fpc->consts[src.index].pipe >= 0) { - struct nv40_fragment_program_data *fpd; + struct nvfx_fragment_program_data *fpd; fp->consts = realloc(fp->consts, ++fp->nr_consts * sizeof(*fpd)); @@ -149,63 +132,63 @@ emit_src(struct nv40_fpc *fpc, int pos, struct nv40_sreg src) sizeof(uint32_t) * 4); } - sr |= (NV40_FP_REG_TYPE_CONST << NV40_FP_REG_TYPE_SHIFT); + sr |= (NVFX_FP_REG_TYPE_CONST << NVFX_FP_REG_TYPE_SHIFT); break; - case NV40SR_NONE: - sr |= (NV40_FP_REG_TYPE_INPUT << NV40_FP_REG_TYPE_SHIFT); + case NVFXSR_NONE: + sr |= (NVFX_FP_REG_TYPE_INPUT << NVFX_FP_REG_TYPE_SHIFT); break; default: assert(0); } if (src.negate) - sr |= NV40_FP_REG_NEGATE; + sr |= NVFX_FP_REG_NEGATE; if (src.abs) hw[1] |= (1 << (29 + pos)); - sr |= ((src.swz[0] << NV40_FP_REG_SWZ_X_SHIFT) | - (src.swz[1] << NV40_FP_REG_SWZ_Y_SHIFT) | - (src.swz[2] << NV40_FP_REG_SWZ_Z_SHIFT) | - (src.swz[3] << NV40_FP_REG_SWZ_W_SHIFT)); + sr |= ((src.swz[0] << NVFX_FP_REG_SWZ_X_SHIFT) | + (src.swz[1] << NVFX_FP_REG_SWZ_Y_SHIFT) | + (src.swz[2] << NVFX_FP_REG_SWZ_Z_SHIFT) | + (src.swz[3] << NVFX_FP_REG_SWZ_W_SHIFT)); hw[pos + 1] |= sr; } static void -emit_dst(struct nv40_fpc *fpc, struct nv40_sreg dst) +emit_dst(struct nvfx_fpc *fpc, struct nvfx_sreg dst) { - struct nv40_fragment_program *fp = fpc->fp; + struct nvfx_fragment_program *fp = fpc->fp; uint32_t *hw = &fp->insn[fpc->inst_offset]; switch (dst.type) { - case NV40SR_TEMP: + case NVFXSR_TEMP: if (fpc->num_regs < (dst.index + 1)) fpc->num_regs = dst.index + 1; break; - case NV40SR_OUTPUT: + case NVFXSR_OUTPUT: if (dst.index == 1) { fp->fp_control |= 0xe; } else { - hw[0] |= NV40_FP_OP_OUT_REG_HALF; + hw[0] |= NVFX_FP_OP_OUT_REG_HALF; } break; - case NV40SR_NONE: + case NVFXSR_NONE: hw[0] |= (1 << 30); break; default: assert(0); } - hw[0] |= (dst.index << NV40_FP_OP_OUT_REG_SHIFT); + hw[0] |= (dst.index << NVFX_FP_OP_OUT_REG_SHIFT); } static void -nv40_fp_arith(struct nv40_fpc *fpc, int sat, int op, - struct nv40_sreg dst, int mask, - struct nv40_sreg s0, struct nv40_sreg s1, struct nv40_sreg s2) +nvfx_fp_arith(struct nvfx_fpc *fpc, int sat, int op, + struct nvfx_sreg dst, int mask, + struct nvfx_sreg s0, struct nvfx_sreg s1, struct nvfx_sreg s2) { - struct nv40_fragment_program *fp = fpc->fp; + struct nvfx_fragment_program *fp = fpc->fp; uint32_t *hw; fpc->inst_offset = fp->insn_len; @@ -214,22 +197,22 @@ nv40_fp_arith(struct nv40_fpc *fpc, int sat, int op, hw = &fp->insn[fpc->inst_offset]; memset(hw, 0, sizeof(uint32_t) * 4); - if (op == NV40_FP_OP_OPCODE_KIL) - fp->fp_control |= NV40TCL_FP_CONTROL_KIL; - hw[0] |= (op << NV40_FP_OP_OPCODE_SHIFT); - hw[0] |= (mask << NV40_FP_OP_OUTMASK_SHIFT); - hw[2] |= (dst.dst_scale << NV40_FP_OP_DST_SCALE_SHIFT); + if (op == NVFX_FP_OP_OPCODE_KIL) + fp->fp_control |= NV34TCL_FP_CONTROL_USES_KIL; + hw[0] |= (op << NVFX_FP_OP_OPCODE_SHIFT); + hw[0] |= (mask << NVFX_FP_OP_OUTMASK_SHIFT); + hw[2] |= (dst.dst_scale << NVFX_FP_OP_DST_SCALE_SHIFT); if (sat) - hw[0] |= NV40_FP_OP_OUT_SAT; + hw[0] |= NVFX_FP_OP_OUT_SAT; if (dst.cc_update) - hw[0] |= NV40_FP_OP_COND_WRITE_ENABLE; - hw[1] |= (dst.cc_test << NV40_FP_OP_COND_SHIFT); - hw[1] |= ((dst.cc_swz[0] << NV40_FP_OP_COND_SWZ_X_SHIFT) | - (dst.cc_swz[1] << NV40_FP_OP_COND_SWZ_Y_SHIFT) | - (dst.cc_swz[2] << NV40_FP_OP_COND_SWZ_Z_SHIFT) | - (dst.cc_swz[3] << NV40_FP_OP_COND_SWZ_W_SHIFT)); + hw[0] |= NVFX_FP_OP_COND_WRITE_ENABLE; + hw[1] |= (dst.cc_test << NVFX_FP_OP_COND_SHIFT); + hw[1] |= ((dst.cc_swz[0] << NVFX_FP_OP_COND_SWZ_X_SHIFT) | + (dst.cc_swz[1] << NVFX_FP_OP_COND_SWZ_Y_SHIFT) | + (dst.cc_swz[2] << NVFX_FP_OP_COND_SWZ_Z_SHIFT) | + (dst.cc_swz[3] << NVFX_FP_OP_COND_SWZ_W_SHIFT)); emit_dst(fpc, dst); emit_src(fpc, 0, s0); @@ -238,26 +221,26 @@ nv40_fp_arith(struct nv40_fpc *fpc, int sat, int op, } static void -nv40_fp_tex(struct nv40_fpc *fpc, int sat, int op, int unit, - struct nv40_sreg dst, int mask, - struct nv40_sreg s0, struct nv40_sreg s1, struct nv40_sreg s2) +nvfx_fp_tex(struct nvfx_fpc *fpc, int sat, int op, int unit, + struct nvfx_sreg dst, int mask, + struct nvfx_sreg s0, struct nvfx_sreg s1, struct nvfx_sreg s2) { - struct nv40_fragment_program *fp = fpc->fp; + struct nvfx_fragment_program *fp = fpc->fp; - nv40_fp_arith(fpc, sat, op, dst, mask, s0, s1, s2); + nvfx_fp_arith(fpc, sat, op, dst, mask, s0, s1, s2); - fp->insn[fpc->inst_offset] |= (unit << NV40_FP_OP_TEX_UNIT_SHIFT); + fp->insn[fpc->inst_offset] |= (unit << NVFX_FP_OP_TEX_UNIT_SHIFT); fp->samplers |= (1 << unit); } -static INLINE struct nv40_sreg -tgsi_src(struct nv40_fpc *fpc, const struct tgsi_full_src_register *fsrc) +static INLINE struct nvfx_sreg +tgsi_src(struct nvfx_fpc *fpc, const struct tgsi_full_src_register *fsrc) { - struct nv40_sreg src; + struct nvfx_sreg src = { 0 }; switch (fsrc->Register.File) { case TGSI_FILE_INPUT: - src = nv40_sr(NV40SR_INPUT, + src = nvfx_sr(NVFXSR_INPUT, fpc->attrib_map[fsrc->Register.Index]); break; case TGSI_FILE_CONSTANT: @@ -288,18 +271,18 @@ tgsi_src(struct nv40_fpc *fpc, const struct tgsi_full_src_register *fsrc) return src; } -static INLINE struct nv40_sreg -tgsi_dst(struct nv40_fpc *fpc, const struct tgsi_full_dst_register *fdst) { +static INLINE struct nvfx_sreg +tgsi_dst(struct nvfx_fpc *fpc, const struct tgsi_full_dst_register *fdst) { switch (fdst->Register.File) { case TGSI_FILE_OUTPUT: return fpc->r_result[fdst->Register.Index]; case TGSI_FILE_TEMPORARY: return fpc->r_temp[fdst->Register.Index]; case TGSI_FILE_NULL: - return nv40_sr(NV40SR_NONE, 0); + return nvfx_sr(NVFXSR_NONE, 0); default: NOUVEAU_ERR("bad dst file %d\n", fdst->Register.File); - return nv40_sr(NV40SR_NONE, 0); + return nvfx_sr(NVFXSR_NONE, 0); } } @@ -308,53 +291,20 @@ tgsi_mask(uint tgsi) { int mask = 0; - if (tgsi & TGSI_WRITEMASK_X) mask |= MASK_X; - if (tgsi & TGSI_WRITEMASK_Y) mask |= MASK_Y; - if (tgsi & TGSI_WRITEMASK_Z) mask |= MASK_Z; - if (tgsi & TGSI_WRITEMASK_W) mask |= MASK_W; + if (tgsi & TGSI_WRITEMASK_X) mask |= NVFX_FP_MASK_X; + if (tgsi & TGSI_WRITEMASK_Y) mask |= NVFX_FP_MASK_Y; + if (tgsi & TGSI_WRITEMASK_Z) mask |= NVFX_FP_MASK_Z; + if (tgsi & TGSI_WRITEMASK_W) mask |= NVFX_FP_MASK_W; return mask; } static boolean -src_native_swz(struct nv40_fpc *fpc, const struct tgsi_full_src_register *fsrc, - struct nv40_sreg *src) -{ - const struct nv40_sreg none = nv40_sr(NV40SR_NONE, 0); - struct nv40_sreg tgsi = tgsi_src(fpc, fsrc); - uint mask = 0; - uint c; - - for (c = 0; c < 4; c++) { - switch (tgsi_util_get_full_src_register_swizzle(fsrc, c)) { - case TGSI_SWIZZLE_X: - case TGSI_SWIZZLE_Y: - case TGSI_SWIZZLE_Z: - case TGSI_SWIZZLE_W: - mask |= (1 << c); - break; - default: - assert(0); - } - } - - if (mask == MASK_ALL) - return TRUE; - - *src = temp(fpc); - - if (mask) - arith(fpc, 0, MOV, *src, mask, tgsi, none, none); - - return FALSE; -} - -static boolean -nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, +nvfx_fragprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, const struct tgsi_full_instruction *finst) { - const struct nv40_sreg none = nv40_sr(NV40SR_NONE, 0); - struct nv40_sreg src[3], dst, tmp; - int mask, sat, unit; + const struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); + struct nvfx_sreg src[3], dst, tmp; + int mask, sat, unit = 0; int ai = -1, ci = -1, ii = -1; int i; @@ -377,23 +327,12 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, switch (fsrc->Register.File) { case TGSI_FILE_INPUT: - case TGSI_FILE_CONSTANT: - case TGSI_FILE_TEMPORARY: - if (!src_native_swz(fpc, fsrc, &src[i])) - continue; - break; - default: - break; - } - - switch (fsrc->Register.File) { - case TGSI_FILE_INPUT: if (ai == -1 || ai == fsrc->Register.Index) { ai = fsrc->Register.Index; src[i] = tgsi_src(fpc, fsrc); } else { src[i] = temp(fpc); - arith(fpc, 0, MOV, src[i], MASK_ALL, + arith(fpc, 0, MOV, src[i], NVFX_FP_MASK_ALL, tgsi_src(fpc, fsrc), none, none); } break; @@ -404,7 +343,7 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, src[i] = tgsi_src(fpc, fsrc); } else { src[i] = temp(fpc); - arith(fpc, 0, MOV, src[i], MASK_ALL, + arith(fpc, 0, MOV, src[i], NVFX_FP_MASK_ALL, tgsi_src(fpc, fsrc), none, none); } break; @@ -415,7 +354,7 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, src[i] = tgsi_src(fpc, fsrc); } else { src[i] = temp(fpc); - arith(fpc, 0, MOV, src[i], MASK_ALL, + arith(fpc, 0, MOV, src[i], NVFX_FP_MASK_ALL, tgsi_src(fpc, fsrc), none, none); } break; @@ -445,25 +384,25 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, arith(fpc, sat, ADD, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_CMP: - tmp = nv40_sr(NV40SR_NONE, 0); + tmp = nvfx_sr(NVFXSR_NONE, 0); tmp.cc_update = 1; arith(fpc, 0, MOV, tmp, 0xf, src[0], none, none); - dst.cc_test = NV40_VP_INST_COND_GE; + dst.cc_test = NVFX_COND_GE; arith(fpc, sat, MOV, dst, mask, src[2], none, none); - dst.cc_test = NV40_VP_INST_COND_LT; + dst.cc_test = NVFX_COND_LT; arith(fpc, sat, MOV, dst, mask, src[1], none, none); break; case TGSI_OPCODE_COS: arith(fpc, sat, COS, dst, mask, src[0], none, none); break; case TGSI_OPCODE_DDX: - if (mask & (MASK_Z | MASK_W)) { + if (mask & (NVFX_FP_MASK_Z | NVFX_FP_MASK_W)) { tmp = temp(fpc); - arith(fpc, sat, DDX, tmp, MASK_X | MASK_Y, + arith(fpc, sat, DDX, tmp, NVFX_FP_MASK_X | NVFX_FP_MASK_Y, swz(src[0], Z, W, Z, W), none, none); - arith(fpc, 0, MOV, tmp, MASK_Z | MASK_W, + arith(fpc, 0, MOV, tmp, NVFX_FP_MASK_Z | NVFX_FP_MASK_W, swz(tmp, X, Y, X, Y), none, none); - arith(fpc, sat, DDX, tmp, MASK_X | MASK_Y, src[0], + arith(fpc, sat, DDX, tmp, NVFX_FP_MASK_X | NVFX_FP_MASK_Y, src[0], none, none); arith(fpc, 0, MOV, dst, mask, tmp, none, none); } else { @@ -471,13 +410,13 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, } break; case TGSI_OPCODE_DDY: - if (mask & (MASK_Z | MASK_W)) { + if (mask & (NVFX_FP_MASK_Z | NVFX_FP_MASK_W)) { tmp = temp(fpc); - arith(fpc, sat, DDY, tmp, MASK_X | MASK_Y, + arith(fpc, sat, DDY, tmp, NVFX_FP_MASK_X | NVFX_FP_MASK_Y, swz(src[0], Z, W, Z, W), none, none); - arith(fpc, 0, MOV, tmp, MASK_Z | MASK_W, + arith(fpc, 0, MOV, tmp, NVFX_FP_MASK_Z | NVFX_FP_MASK_W, swz(tmp, X, Y, X, Y), none, none); - arith(fpc, sat, DDY, tmp, MASK_X | MASK_Y, src[0], + arith(fpc, sat, DDY, tmp, NVFX_FP_MASK_X | NVFX_FP_MASK_Y, src[0], none, none); arith(fpc, 0, MOV, dst, mask, tmp, none, none); } else { @@ -492,7 +431,7 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, break; case TGSI_OPCODE_DPH: tmp = temp(fpc); - arith(fpc, 0, DP3, tmp, MASK_X, src[0], src[1], none); + arith(fpc, 0, DP3, tmp, NVFX_FP_MASK_X, src[0], src[1], none); arith(fpc, sat, ADD, dst, mask, swz(tmp, X, X, X, X), swz(src[1], W, W, W, W), none); break; @@ -512,10 +451,10 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, arith(fpc, 0, KIL, none, 0, none, none, none); break; case TGSI_OPCODE_KIL: - dst = nv40_sr(NV40SR_NONE, 0); + dst = nvfx_sr(NVFXSR_NONE, 0); dst.cc_update = 1; - arith(fpc, 0, MOV, dst, MASK_ALL, src[0], none, none); - dst.cc_update = 0; dst.cc_test = NV40_FP_OP_COND_LT; + arith(fpc, 0, MOV, dst, NVFX_FP_MASK_ALL, src[0], none, none); + dst.cc_update = 0; dst.cc_test = NVFX_COND_LT; arith(fpc, 0, KIL, dst, 0, none, none, none); break; case TGSI_OPCODE_LG2: @@ -523,9 +462,13 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, break; // case TGSI_OPCODE_LIT: case TGSI_OPCODE_LRP: - tmp = temp(fpc); - arith(fpc, 0, MAD, tmp, mask, neg(src[0]), src[2], src[2]); - arith(fpc, sat, MAD, dst, mask, src[0], src[1], tmp); + if(!nvfx->is_nv4x) + arith(fpc, sat, LRP_NV30, dst, mask, src[0], src[1], src[2]); + else { + tmp = temp(fpc); + arith(fpc, 0, MAD, tmp, mask, neg(src[0]), src[2], src[2]); + arith(fpc, sat, MAD, dst, mask, src[0], src[1], tmp); + } break; case TGSI_OPCODE_MAD: arith(fpc, sat, MAD, dst, mask, src[0], src[1], src[2]); @@ -543,13 +486,17 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, arith(fpc, sat, MUL, dst, mask, src[0], src[1], none); break; case TGSI_OPCODE_POW: - tmp = temp(fpc); - arith(fpc, 0, LG2, tmp, MASK_X, - swz(src[0], X, X, X, X), none, none); - arith(fpc, 0, MUL, tmp, MASK_X, swz(tmp, X, X, X, X), - swz(src[1], X, X, X, X), none); - arith(fpc, sat, EX2, dst, mask, - swz(tmp, X, X, X, X), none, none); + if(!nvfx->is_nv4x) + arith(fpc, sat, POW_NV30, dst, mask, src[0], src[1], none); + else { + tmp = temp(fpc); + arith(fpc, 0, LG2, tmp, NVFX_FP_MASK_X, + swz(src[0], X, X, X, X), none, none); + arith(fpc, 0, MUL, tmp, NVFX_FP_MASK_X, swz(tmp, X, X, X, X), + swz(src[1], X, X, X, X), none); + arith(fpc, sat, EX2, dst, mask, + swz(tmp, X, X, X, X), none, none); + } break; case TGSI_OPCODE_RCP: arith(fpc, sat, RCP, dst, mask, src[0], none, none); @@ -558,42 +505,50 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, assert(0); break; case TGSI_OPCODE_RFL: - tmp = temp(fpc); - arith(fpc, 0, DP3, tmp, MASK_X, src[0], src[0], none); - arith(fpc, 0, DP3, tmp, MASK_Y, src[0], src[1], none); - arith(fpc, 0, DIV, scale(tmp, 2X), MASK_Z, - swz(tmp, Y, Y, Y, Y), swz(tmp, X, X, X, X), none); - arith(fpc, sat, MAD, dst, mask, - swz(tmp, Z, Z, Z, Z), src[0], neg(src[1])); + if(!nvfx->is_nv4x) + arith(fpc, 0, RFL_NV30, dst, mask, src[0], src[1], none); + else { + tmp = temp(fpc); + arith(fpc, 0, DP3, tmp, NVFX_FP_MASK_X, src[0], src[0], none); + arith(fpc, 0, DP3, tmp, NVFX_FP_MASK_Y, src[0], src[1], none); + arith(fpc, 0, DIV, scale(tmp, 2X), NVFX_FP_MASK_Z, + swz(tmp, Y, Y, Y, Y), swz(tmp, X, X, X, X), none); + arith(fpc, sat, MAD, dst, mask, + swz(tmp, Z, Z, Z, Z), src[0], neg(src[1])); + } break; case TGSI_OPCODE_RSQ: - tmp = temp(fpc); - arith(fpc, 0, LG2, scale(tmp, INV_2X), MASK_X, - abs(swz(src[0], X, X, X, X)), none, none); - arith(fpc, sat, EX2, dst, mask, - neg(swz(tmp, X, X, X, X)), none, none); + if(!nvfx->is_nv4x) + arith(fpc, sat, RSQ_NV30, dst, mask, abs(swz(src[0], X, X, X, X)), none, none); + else { + tmp = temp(fpc); + arith(fpc, 0, LG2, scale(tmp, INV_2X), NVFX_FP_MASK_X, + abs(swz(src[0], X, X, X, X)), none, none); + arith(fpc, sat, EX2, dst, mask, + neg(swz(tmp, X, X, X, X)), none, none); + } break; case TGSI_OPCODE_SCS: /* avoid overwriting the source */ - if(src[0].swz[SWZ_X] != SWZ_X) + if(src[0].swz[NVFX_SWZ_X] != NVFX_SWZ_X) { - if (mask & MASK_X) { - arith(fpc, sat, COS, dst, MASK_X, + if (mask & NVFX_FP_MASK_X) { + arith(fpc, sat, COS, dst, NVFX_FP_MASK_X, swz(src[0], X, X, X, X), none, none); } - if (mask & MASK_Y) { - arith(fpc, sat, SIN, dst, MASK_Y, + if (mask & NVFX_FP_MASK_Y) { + arith(fpc, sat, SIN, dst, NVFX_FP_MASK_Y, swz(src[0], X, X, X, X), none, none); } } else { - if (mask & MASK_Y) { - arith(fpc, sat, SIN, dst, MASK_Y, + if (mask & NVFX_FP_MASK_Y) { + arith(fpc, sat, SIN, dst, NVFX_FP_MASK_Y, swz(src[0], X, X, X, X), none, none); } - if (mask & MASK_X) { - arith(fpc, sat, COS, dst, MASK_X, + if (mask & NVFX_FP_MASK_X) { + arith(fpc, sat, COS, dst, NVFX_FP_MASK_X, swz(src[0], X, X, X, X), none, none); } } @@ -641,7 +596,7 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, tmp = temp(fpc); arith(fpc, 0, MUL, tmp, mask, swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none); - arith(fpc, sat, MAD, dst, (mask & ~MASK_W), + arith(fpc, sat, MAD, dst, (mask & ~NVFX_FP_MASK_W), swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), neg(tmp)); break; @@ -655,32 +610,32 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc, } static boolean -nv40_fragprog_parse_decl_attrib(struct nv40_fpc *fpc, +nvfx_fragprog_parse_decl_attrib(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, const struct tgsi_full_declaration *fdec) { int hw; switch (fdec->Semantic.Name) { case TGSI_SEMANTIC_POSITION: - hw = NV40_FP_OP_INPUT_SRC_POSITION; + hw = NVFX_FP_OP_INPUT_SRC_POSITION; break; case TGSI_SEMANTIC_COLOR: if (fdec->Semantic.Index == 0) { - hw = NV40_FP_OP_INPUT_SRC_COL0; + hw = NVFX_FP_OP_INPUT_SRC_COL0; } else if (fdec->Semantic.Index == 1) { - hw = NV40_FP_OP_INPUT_SRC_COL1; + hw = NVFX_FP_OP_INPUT_SRC_COL1; } else { NOUVEAU_ERR("bad colour semantic index\n"); return FALSE; } break; case TGSI_SEMANTIC_FOG: - hw = NV40_FP_OP_INPUT_SRC_FOGC; + hw = NVFX_FP_OP_INPUT_SRC_FOGC; break; case TGSI_SEMANTIC_GENERIC: if (fdec->Semantic.Index <= 7) { - hw = NV40_FP_OP_INPUT_SRC_TC(fdec->Semantic. + hw = NVFX_FP_OP_INPUT_SRC_TC(fdec->Semantic. Index); } else { NOUVEAU_ERR("bad generic semantic index\n"); @@ -697,7 +652,7 @@ nv40_fragprog_parse_decl_attrib(struct nv40_fpc *fpc, } static boolean -nv40_fragprog_parse_decl_output(struct nv40_fpc *fpc, +nvfx_fragprog_parse_decl_output(struct nvfx_context* nvfx, struct nvfx_fpc *fpc, const struct tgsi_full_declaration *fdec) { unsigned idx = fdec->Range.First; @@ -708,12 +663,14 @@ nv40_fragprog_parse_decl_output(struct nv40_fpc *fpc, hw = 1; break; case TGSI_SEMANTIC_COLOR: + hw = ~0; switch (fdec->Semantic.Index) { case 0: hw = 0; break; case 1: hw = 2; break; case 2: hw = 3; break; case 3: hw = 4; break; - default: + } + if(hw > ((nvfx->is_nv4x) ? 4 : 2)) { NOUVEAU_ERR("bad rcol index\n"); return FALSE; } @@ -723,13 +680,13 @@ nv40_fragprog_parse_decl_output(struct nv40_fpc *fpc, return FALSE; } - fpc->r_result[idx] = nv40_sr(NV40SR_OUTPUT, hw); + fpc->r_result[idx] = nvfx_sr(NVFXSR_OUTPUT, hw); fpc->r_temps |= (1 << hw); return TRUE; } static boolean -nv40_fragprog_prepare(struct nv40_fpc *fpc) +nvfx_fragprog_prepare(struct nvfx_context* nvfx, struct nvfx_fpc *fpc) { struct tgsi_parse_context p; int high_temp = -1, i; @@ -746,11 +703,11 @@ nv40_fragprog_prepare(struct nv40_fpc *fpc) fdec = &p.FullToken.FullDeclaration; switch (fdec->Declaration.File) { case TGSI_FILE_INPUT: - if (!nv40_fragprog_parse_decl_attrib(fpc, fdec)) + if (!nvfx_fragprog_parse_decl_attrib(nvfx, fpc, fdec)) goto out_err; break; case TGSI_FILE_OUTPUT: - if (!nv40_fragprog_parse_decl_output(fpc, fdec)) + if (!nvfx_fragprog_parse_decl_output(nvfx, fpc, fdec)) goto out_err; break; case TGSI_FILE_TEMPORARY: @@ -787,7 +744,7 @@ nv40_fragprog_prepare(struct nv40_fpc *fpc) tgsi_parse_free(&p); if (++high_temp) { - fpc->r_temp = CALLOC(high_temp, sizeof(struct nv40_sreg)); + fpc->r_temp = CALLOC(high_temp, sizeof(struct nvfx_sreg)); for (i = 0; i < high_temp; i++) fpc->r_temp[i] = temp(fpc); fpc->r_temps_discard = 0; @@ -803,19 +760,19 @@ out_err: } static void -nv40_fragprog_translate(struct nv40_context *nv40, - struct nv40_fragment_program *fp) +nvfx_fragprog_translate(struct nvfx_context *nvfx, + struct nvfx_fragment_program *fp) { struct tgsi_parse_context parse; - struct nv40_fpc *fpc = NULL; + struct nvfx_fpc *fpc = NULL; - fpc = CALLOC(1, sizeof(struct nv40_fpc)); + fpc = CALLOC(1, sizeof(struct nvfx_fpc)); if (!fpc) return; fpc->fp = fp; fpc->num_regs = 2; - if (!nv40_fragprog_prepare(fpc)) { + if (!nvfx_fragprog_prepare(nvfx, fpc)) { FREE(fpc); return; } @@ -831,7 +788,7 @@ nv40_fragprog_translate(struct nv40_context *nv40, const struct tgsi_full_instruction *finst; finst = &parse.FullToken.FullInstruction; - if (!nv40_fragprog_parse_instruction(fpc, finst)) + if (!nvfx_fragprog_parse_instruction(nvfx, fpc, finst)) goto out_err; } break; @@ -840,10 +797,14 @@ nv40_fragprog_translate(struct nv40_context *nv40, } } - fp->fp_control |= fpc->num_regs << NV40TCL_FP_CONTROL_TEMP_COUNT_SHIFT; + if(!nvfx->is_nv4x) + fp->fp_control |= (fpc->num_regs-1)/2; + else + fp->fp_control |= fpc->num_regs << NV40TCL_FP_CONTROL_TEMP_COUNT_SHIFT; /* Terminate final instruction */ - fp->insn[fpc->inst_offset] |= 0x00000001; + if(fp->insn) + fp->insn[fpc->inst_offset] |= 0x00000001; /* Append NOP + END instruction, may or may not be necessary. */ fpc->inst_offset = fp->insn_len; @@ -861,124 +822,183 @@ out_err: FREE(fpc); } -static void -nv40_fragprog_upload(struct nv40_context *nv40, - struct nv40_fragment_program *fp) +static inline void +nvfx_fp_memcpy(void* dst, const void* src, size_t len) { - struct pipe_screen *pscreen = nv40->pipe.screen; - const uint32_t le = 1; - uint32_t *map; - int i; - - map = pipe_buffer_map(pscreen, fp->buffer, PIPE_BUFFER_USAGE_CPU_WRITE); - -#if 0 - for (i = 0; i < fp->insn_len; i++) { - fflush(stdout); fflush(stderr); - NOUVEAU_ERR("%d 0x%08x\n", i, fp->insn[i]); - fflush(stdout); fflush(stderr); +#ifndef WORDS_BIGENDIAN + memcpy(dst, src, len); +#else + size_t i; + for(i = 0; i < len; i += 4) { + uint32_t v = (uint32_t*)((char*)src + i); + *(uint32_t*)((char*)dst + i) = (v >> 16) | (v << 16); } #endif - - if ((*(const uint8_t *)&le)) { - for (i = 0; i < fp->insn_len; i++) { - map[i] = fp->insn[i]; - } - } else { - /* Weird swapping for big-endian chips */ - for (i = 0; i < fp->insn_len; i++) { - map[i] = ((fp->insn[i] & 0xffff) << 16) | - ((fp->insn[i] >> 16) & 0xffff); - } - } - - pipe_buffer_unmap(pscreen, fp->buffer); } -static boolean -nv40_fragprog_validate(struct nv40_context *nv40) +void +nvfx_fragprog_validate(struct nvfx_context *nvfx) { - struct nv40_fragment_program *fp = nv40->fragprog; - struct pipe_buffer *constbuf = - nv40->constbuf[PIPE_SHADER_FRAGMENT]; - struct pipe_screen *pscreen = nv40->pipe.screen; - struct nouveau_stateobj *so; - boolean new_consts = FALSE; + struct nouveau_channel* chan = nvfx->screen->base.channel; + struct nvfx_fragment_program *fp = nvfx->fragprog; + int update = 0; int i; - if (fp->translated) - goto update_constants; + if (!fp->translated) + { + const int min_size = 4096; + + nvfx_fragprog_translate(nvfx, fp); + if (!fp->translated) { + static unsigned dummy[8] = {1, 0, 0, 0, 1, 0, 0, 0}; + static int warned = 0; + if(!warned) + { + fprintf(stderr, "nvfx: failed to translate fragment program!\n"); + warned = 1; + } - nv40->fallback_swrast &= ~NV40_NEW_FRAGPROG; - nv40_fragprog_translate(nv40, fp); - if (!fp->translated) { - nv40->fallback_swrast |= NV40_NEW_FRAGPROG; - return FALSE; + /* use dummy program: we cannot fail here */ + fp->translated = TRUE; + fp->insn = malloc(sizeof(dummy)); + memcpy(fp->insn, dummy, sizeof(dummy)); + fp->insn_len = sizeof(dummy) / sizeof(dummy[0]); + } + update = TRUE; + + fp->prog_size = (fp->insn_len * 4 + 63) & ~63; + + if(fp->prog_size >= min_size) + fp->progs_per_bo = 1; + else + fp->progs_per_bo = min_size / fp->prog_size; + fp->bo_prog_idx = fp->progs_per_bo - 1; } - fp->buffer = pscreen->buffer_create(pscreen, 0x100, 0, fp->insn_len * 4); - nv40_fragprog_upload(nv40, fp); - - so = so_new(2, 2, 1); - so_method(so, nv40->screen->curie, NV40TCL_FP_ADDRESS, 1); - so_reloc (so, nouveau_bo(fp->buffer), 0, NOUVEAU_BO_VRAM | - NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW | - NOUVEAU_BO_OR, NV40TCL_FP_ADDRESS_DMA0, - NV40TCL_FP_ADDRESS_DMA1); - so_method(so, nv40->screen->curie, NV40TCL_FP_CONTROL, 1); - so_data (so, fp->fp_control); - so_ref(so, &fp->so); - so_ref(NULL, &so); - -update_constants: - if (fp->nr_consts) { - float *map; - - map = pipe_buffer_map(pscreen, constbuf, - PIPE_BUFFER_USAGE_CPU_READ); - for (i = 0; i < fp->nr_consts; i++) { - struct nv40_fragment_program_data *fpd = &fp->consts[i]; - uint32_t *p = &fp->insn[fpd->offset]; - uint32_t *cb = (uint32_t *)&map[fpd->index * 4]; - - if (!memcmp(p, cb, 4 * sizeof(float))) - continue; - memcpy(p, cb, 4 * sizeof(float)); - new_consts = TRUE; + /* we must update constants even on "just" fragprog changes, because + we don't check whether the current constant buffer matches the latest + one bound to this fragment program */ + if (nvfx->dirty & (NVFX_NEW_FRAGCONST | NVFX_NEW_FRAGPROG)) + update = TRUE; + + if(update) { + int offset; + + ++fp->bo_prog_idx; + if(fp->bo_prog_idx >= fp->progs_per_bo) + { + if(fp->fpbo && !nouveau_bo_busy(fp->fpbo->next->bo, NOUVEAU_BO_WR)) + { + fp->fpbo = fp->fpbo->next; + } + else + { + struct nvfx_fragment_program_bo* fpbo = os_malloc_aligned(sizeof(struct nvfx_fragment_program) + fp->prog_size * fp->progs_per_bo, 16); + char *map, *buf; + + if(fp->fpbo) + { + fpbo->next = fp->fpbo->next; + fp->fpbo->next = fpbo; + } + else + fpbo->next = fpbo; + fp->fpbo = fpbo; + fpbo->bo = 0; + nouveau_bo_new(nvfx->screen->base.device, NOUVEAU_BO_VRAM | NOUVEAU_BO_MAP, 64, fp->prog_size * fp->progs_per_bo, &fpbo->bo); + nouveau_bo_map(fpbo->bo, NOUVEAU_BO_NOSYNC); + + map = fpbo->bo->map; + buf = fpbo->insn; + for(int i = 0; i < fp->progs_per_bo; ++i) + { + memcpy(buf, fp->insn, fp->insn_len * 4); + nvfx_fp_memcpy(map, fp->insn, fp->insn_len * 4); + map += fp->prog_size; + buf += fp->prog_size; + } + } + fp->bo_prog_idx = 0; } - pipe_buffer_unmap(pscreen, constbuf); - if (new_consts) - nv40_fragprog_upload(nv40, fp); + offset = fp->bo_prog_idx * fp->prog_size; + + if(nvfx->constbuf[PIPE_SHADER_FRAGMENT]) { + struct pipe_resource* constbuf = nvfx->constbuf[PIPE_SHADER_FRAGMENT]; + // TODO: avoid using transfers, just directly the buffer + struct pipe_transfer* transfer; + // TODO: does this check make any sense, or should we do this unconditionally? + uint32_t* map = pipe_buffer_map(&nvfx->pipe, constbuf, PIPE_TRANSFER_READ, &transfer); + uint32_t* fpmap = (uint32_t*)((char*)fp->fpbo->bo->map + offset); + uint32_t* buf = (uint32_t*)((char*)fp->fpbo->insn + offset); + for (i = 0; i < fp->nr_consts; ++i) { + unsigned off = fp->consts[i].offset; + unsigned idx = fp->consts[i].index * 4; + + /* TODO: is checking a good idea? */ + if(memcmp(&buf[off], &map[idx], 4 * sizeof(uint32_t))) { + memcpy(&buf[off], &map[idx], 4 * sizeof(uint32_t)); + nvfx_fp_memcpy(&fpmap[off], &map[idx], 4 * sizeof(uint32_t)); + } + } + pipe_buffer_unmap(&nvfx->pipe, constbuf, transfer); + } } - if (new_consts || fp->so != nv40->state.hw[NV40_STATE_FRAGPROG]) { - so_ref(fp->so, &nv40->state.hw[NV40_STATE_FRAGPROG]); - return TRUE; + if(update || (nvfx->dirty & NVFX_NEW_FRAGPROG)) { + int offset = fp->bo_prog_idx * fp->prog_size; + MARK_RING(chan, 8, 1); + OUT_RING(chan, RING_3D(NV34TCL_FP_ACTIVE_PROGRAM, 1)); + OUT_RELOC(chan, fp->fpbo->bo, offset, NOUVEAU_BO_VRAM | + NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW | + NOUVEAU_BO_OR, NV34TCL_FP_ACTIVE_PROGRAM_DMA0, + NV34TCL_FP_ACTIVE_PROGRAM_DMA1); + OUT_RING(chan, RING_3D(NV34TCL_FP_CONTROL, 1)); + OUT_RING(chan, fp->fp_control); + if(!nvfx->is_nv4x) { + OUT_RING(chan, RING_3D(NV34TCL_FP_REG_CONTROL, 1)); + OUT_RING(chan, (1<<16)|0x4); + OUT_RING(chan, RING_3D(NV34TCL_TX_UNITS_ENABLE, 1)); + OUT_RING(chan, fp->samplers); + } } - - return FALSE; } void -nv40_fragprog_destroy(struct nv40_context *nv40, - struct nv40_fragment_program *fp) +nvfx_fragprog_relocate(struct nvfx_context *nvfx) { - if (fp->buffer) - pipe_buffer_reference(&fp->buffer, NULL); + struct nouveau_channel* chan = nvfx->screen->base.channel; + struct nvfx_fragment_program *fp = nvfx->fragprog; + struct nouveau_bo* bo = fp->fpbo->bo; + int offset = fp->bo_prog_idx * fp->prog_size; + unsigned fp_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD; // TODO: GART? + fp_flags |= NOUVEAU_BO_DUMMY; + MARK_RING(chan, 2, 2); + OUT_RELOC(chan, bo, RING_3D(NV34TCL_FP_ACTIVE_PROGRAM, 1), fp_flags, 0, 0); + OUT_RELOC(chan, bo, offset, fp_flags | NOUVEAU_BO_LOW | + NOUVEAU_BO_OR, NV34TCL_FP_ACTIVE_PROGRAM_DMA0, + NV34TCL_FP_ACTIVE_PROGRAM_DMA1); +} - if (fp->so) - so_ref(NULL, &fp->so); +void +nvfx_fragprog_destroy(struct nvfx_context *nvfx, + struct nvfx_fragment_program *fp) +{ + struct nvfx_fragment_program_bo* fpbo = fp->fpbo; + if(fpbo) + { + do + { + struct nvfx_fragment_program_bo* next = fpbo->next; + nouveau_bo_unmap(fpbo->bo); + nouveau_bo_ref(0, &fpbo->bo); + free(fpbo); + fpbo = next; + } + while(fpbo != fp->fpbo); + } if (fp->insn_len) FREE(fp->insn); } -struct nv40_state_entry nv40_state_fragprog = { - .validate = nv40_fragprog_validate, - .dirty = { - .pipe = NV40_NEW_FRAGPROG, - .hw = NV40_STATE_FRAGPROG - } -}; - diff --git a/src/gallium/drivers/nvfx/nvfx_fragtex.c b/src/gallium/drivers/nvfx/nvfx_fragtex.c new file mode 100644 index 00000000000..0b4a434fecc --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_fragtex.c @@ -0,0 +1,58 @@ +#include "nvfx_context.h" +#include "nvfx_resource.h" + +void +nvfx_fragtex_validate(struct nvfx_context *nvfx) +{ + struct nouveau_channel* chan = nvfx->screen->base.channel; + unsigned samplers, unit; + + samplers = nvfx->dirty_samplers; + if(!samplers) + return; + + while (samplers) { + unit = ffs(samplers) - 1; + samplers &= ~(1 << unit); + + if(nvfx->fragment_sampler_views[unit] && nvfx->tex_sampler[unit]) { + if(!nvfx->is_nv4x) + nv30_fragtex_set(nvfx, unit); + else + nv40_fragtex_set(nvfx, unit); + } else { + WAIT_RING(chan, 2); + /* this is OK for nv40 too */ + OUT_RING(chan, RING_3D(NV34TCL_TX_ENABLE(unit), 1)); + OUT_RING(chan, 0); + nvfx->hw_samplers &= ~(1 << unit); + } + } + nvfx->dirty_samplers = 0; +} + +void +nvfx_fragtex_relocate(struct nvfx_context *nvfx) +{ + struct nouveau_channel* chan = nvfx->screen->base.channel; + unsigned samplers, unit; + unsigned tex_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD; + + samplers = nvfx->hw_samplers; + while (samplers) { + struct nvfx_miptree* mt; + struct nouveau_bo *bo; + + unit = ffs(samplers) - 1; + samplers &= ~(1 << unit); + + mt = (struct nvfx_miptree*)nvfx->fragment_sampler_views[unit]->texture; + bo = mt->base.bo; + + MARK_RING(chan, 3, 3); + OUT_RELOC(chan, bo, RING_3D(NV34TCL_TX_OFFSET(unit), 2), tex_flags | NOUVEAU_BO_DUMMY, 0, 0); + OUT_RELOC(chan, bo, 0, tex_flags | NOUVEAU_BO_LOW | NOUVEAU_BO_DUMMY, 0, 0); + OUT_RELOC(chan, bo, nvfx->hw_txf[unit], tex_flags | NOUVEAU_BO_OR | NOUVEAU_BO_DUMMY, + NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1); + } +} diff --git a/src/gallium/drivers/nvfx/nvfx_miptree.c b/src/gallium/drivers/nvfx/nvfx_miptree.c new file mode 100644 index 00000000000..aeb88e9ac96 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_miptree.c @@ -0,0 +1,310 @@ +#include "pipe/p_state.h" +#include "pipe/p_defines.h" +#include "util/u_inlines.h" +#include "util/u_format.h" +#include "util/u_math.h" + +#include "nvfx_context.h" +#include "nvfx_resource.h" +#include "nvfx_transfer.h" +#include "nv04_surface_2d.h" + +/* Currently using separate implementations for buffers and textures, + * even though gallium has a unified abstraction of these objects. + * Eventually these should be combined, and mechanisms like transfers + * be adapted to work for both buffer and texture uploads. + */ + +static void +nvfx_miptree_layout(struct nvfx_miptree *mt) +{ + struct pipe_resource *pt = &mt->base.base; + uint width = pt->width0; + uint offset = 0; + int nr_faces, l, f; + uint wide_pitch = pt->bind & (PIPE_BIND_SAMPLER_VIEW | + PIPE_BIND_DEPTH_STENCIL | + PIPE_BIND_RENDER_TARGET | + PIPE_BIND_DISPLAY_TARGET | + PIPE_BIND_SCANOUT); + + if (pt->target == PIPE_TEXTURE_CUBE) { + nr_faces = 6; + } else + if (pt->target == PIPE_TEXTURE_3D) { + nr_faces = pt->depth0; + } else { + nr_faces = 1; + } + + for (l = 0; l <= pt->last_level; l++) { + if (wide_pitch && (pt->flags & NVFX_RESOURCE_FLAG_LINEAR)) + mt->level[l].pitch = align(util_format_get_stride(pt->format, pt->width0), 64); + else + mt->level[l].pitch = util_format_get_stride(pt->format, width); + + mt->level[l].image_offset = + CALLOC(nr_faces, sizeof(unsigned)); + + width = u_minify(width, 1); + } + + for (f = 0; f < nr_faces; f++) { + for (l = 0; l < pt->last_level; l++) { + mt->level[l].image_offset[f] = offset; + + if (!(pt->flags & NVFX_RESOURCE_FLAG_LINEAR) && + u_minify(pt->width0, l + 1) > 1 && u_minify(pt->height0, l + 1) > 1) + offset += align(mt->level[l].pitch * u_minify(pt->height0, l), 64); + else + offset += mt->level[l].pitch * u_minify(pt->height0, l); + } + + mt->level[l].image_offset[f] = offset; + offset += mt->level[l].pitch * u_minify(pt->height0, l); + } + + mt->total_size = offset; +} + +static boolean +nvfx_miptree_get_handle(struct pipe_screen *pscreen, + struct pipe_resource *ptexture, + struct winsys_handle *whandle) +{ + struct nvfx_miptree* mt = (struct nvfx_miptree*)ptexture; + + if (!mt || !mt->base.bo) + return FALSE; + + return nouveau_screen_bo_get_handle(pscreen, + mt->base.bo, + mt->level[0].pitch, + whandle); +} + + +static void +nvfx_miptree_destroy(struct pipe_screen *screen, struct pipe_resource *pt) +{ + struct nvfx_miptree *mt = (struct nvfx_miptree *)pt; + int l; + + nouveau_screen_bo_release(screen, mt->base.bo); + + for (l = 0; l <= pt->last_level; l++) { + if (mt->level[l].image_offset) + FREE(mt->level[l].image_offset); + } + + FREE(mt); +} + + + + +struct u_resource_vtbl nvfx_miptree_vtbl = +{ + nvfx_miptree_get_handle, /* get_handle */ + nvfx_miptree_destroy, /* resource_destroy */ + NULL, /* is_resource_referenced */ + nvfx_miptree_transfer_new, /* get_transfer */ + nvfx_miptree_transfer_del, /* transfer_destroy */ + nvfx_miptree_transfer_map, /* transfer_map */ + u_default_transfer_flush_region, /* transfer_flush_region */ + nvfx_miptree_transfer_unmap, /* transfer_unmap */ + u_default_transfer_inline_write /* transfer_inline_write */ +}; + + + +struct pipe_resource * +nvfx_miptree_create(struct pipe_screen *pscreen, const struct pipe_resource *pt) +{ + struct nvfx_miptree *mt; + static int no_swizzle = -1; + if(no_swizzle < 0) + no_swizzle = debug_get_bool_option("NOUVEAU_NO_SWIZZLE", FALSE); + + mt = CALLOC_STRUCT(nvfx_miptree); + if (!mt) + return NULL; + + mt->base.base = *pt; + mt->base.vtbl = &nvfx_miptree_vtbl; + pipe_reference_init(&mt->base.base.reference, 1); + mt->base.base.screen = pscreen; + + /* Swizzled textures must be POT */ + if (pt->width0 & (pt->width0 - 1) || + pt->height0 & (pt->height0 - 1)) + mt->base.base.flags |= NVFX_RESOURCE_FLAG_LINEAR; + else + if (pt->bind & (PIPE_BIND_SCANOUT | + PIPE_BIND_DISPLAY_TARGET | + PIPE_BIND_DEPTH_STENCIL)) + mt->base.base.flags |= NVFX_RESOURCE_FLAG_LINEAR; + else + if (pt->usage == PIPE_USAGE_DYNAMIC) + mt->base.base.flags |= NVFX_RESOURCE_FLAG_LINEAR; + else { + switch (pt->format) { + case PIPE_FORMAT_B5G6R5_UNORM: + case PIPE_FORMAT_L8A8_UNORM: + case PIPE_FORMAT_A8_UNORM: + case PIPE_FORMAT_L8_UNORM: + case PIPE_FORMAT_I8_UNORM: + /* TODO: we can actually swizzle these formats on nv40, we + are just preserving the pre-unification behavior. + The whole 2D code is going to be rewritten anyway. */ + if(nvfx_screen(pscreen)->is_nv4x) { + mt->base.base.flags |= NVFX_RESOURCE_FLAG_LINEAR; + break; + } + /* TODO: Figure out which formats can be swizzled */ + case PIPE_FORMAT_B8G8R8A8_UNORM: + case PIPE_FORMAT_B8G8R8X8_UNORM: + case PIPE_FORMAT_R16_SNORM: + { + if (no_swizzle) + mt->base.base.flags |= NVFX_RESOURCE_FLAG_LINEAR; + break; + } + default: + mt->base.base.flags |= NVFX_RESOURCE_FLAG_LINEAR; + } + } + + /* apparently we can't render to swizzled surfaces smaller than 64 bytes, so make them linear. + * If the user did not ask for a render target, they can still render to it, but it will cost them an extra copy. + * This also happens for small mipmaps of large textures. */ + if (pt->bind & PIPE_BIND_RENDER_TARGET && + util_format_get_stride(pt->format, pt->width0) < 64) + mt->base.base.flags |= NVFX_RESOURCE_FLAG_LINEAR; + + nvfx_miptree_layout(mt); + + mt->base.bo = nouveau_screen_bo_new(pscreen, 256, + pt->usage, pt->bind, mt->total_size); + if (!mt->base.bo) { + FREE(mt); + return NULL; + } + return &mt->base.base; +} + + + + +struct pipe_resource * +nvfx_miptree_from_handle(struct pipe_screen *pscreen, + const struct pipe_resource *template, + struct winsys_handle *whandle) +{ + struct nvfx_miptree *mt; + unsigned stride; + + /* Only supports 2D, non-mipmapped textures for the moment */ + if (template->target != PIPE_TEXTURE_2D || + template->last_level != 0 || + template->depth0 != 1) + return NULL; + + mt = CALLOC_STRUCT(nvfx_miptree); + if (!mt) + return NULL; + + mt->base.bo = nouveau_screen_bo_from_handle(pscreen, whandle, &stride); + if (mt->base.bo == NULL) { + FREE(mt); + return NULL; + } + + mt->base.base = *template; + mt->base.vtbl = &nvfx_miptree_vtbl; + pipe_reference_init(&mt->base.base.reference, 1); + mt->base.base.screen = pscreen; + mt->level[0].pitch = stride; + mt->level[0].image_offset = CALLOC(1, sizeof(unsigned)); + + /* Assume whoever created this buffer expects it to be linear for now */ + mt->base.base.flags |= NVFX_RESOURCE_FLAG_LINEAR; + + /* XXX: Need to adjust bo refcount?? + */ + /* nouveau_bo_ref(bo, &mt->base.bo); */ + return &mt->base.base; +} + + + + + +/* Surface helpers, not strictly required to implement the resource vtbl: + */ +struct pipe_surface * +nvfx_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_resource *pt, + unsigned face, unsigned level, unsigned zslice, + unsigned flags) +{ + struct nvfx_miptree *mt = (struct nvfx_miptree *)pt; + struct nv04_surface *ns; + + ns = CALLOC_STRUCT(nv04_surface); + if (!ns) + return NULL; + pipe_resource_reference(&ns->base.texture, pt); + ns->base.format = pt->format; + ns->base.width = u_minify(pt->width0, level); + ns->base.height = u_minify(pt->height0, level); + ns->base.usage = flags; + pipe_reference_init(&ns->base.reference, 1); + ns->base.face = face; + ns->base.level = level; + ns->base.zslice = zslice; + ns->pitch = mt->level[level].pitch; + + if (pt->target == PIPE_TEXTURE_CUBE) { + ns->base.offset = mt->level[level].image_offset[face]; + } else + if (pt->target == PIPE_TEXTURE_3D) { + ns->base.offset = mt->level[level].image_offset[zslice]; + } else { + ns->base.offset = mt->level[level].image_offset[0]; + } + + /* create a linear temporary that we can render into if + * necessary. + * + * Note that ns->pitch is always a multiple of 64 for linear + * surfaces and swizzled surfaces are POT, so ns->pitch & 63 + * is equivalent to (ns->pitch < 64 && swizzled) + */ + + if ((ns->pitch & 63) && + (ns->base.usage & PIPE_BIND_RENDER_TARGET)) + { + struct nv04_surface_2d* eng2d = + ((struct nvfx_screen*)pscreen)->eng2d; + + ns = nv04_surface_wrap_for_render(pscreen, eng2d, ns); + } + + return &ns->base; +} + +void +nvfx_miptree_surface_del(struct pipe_surface *ps) +{ + struct nv04_surface* ns = (struct nv04_surface*)ps; + if(ns->backing) + { + struct nvfx_screen* screen = (struct nvfx_screen*)ps->texture->screen; + if(ns->backing->base.usage & PIPE_BIND_BLIT_DESTINATION) + screen->eng2d->copy(screen->eng2d, &ns->backing->base, 0, 0, ps, 0, 0, ns->base.width, ns->base.height); + nvfx_miptree_surface_del(&ns->backing->base); + } + + pipe_resource_reference(&ps->texture, NULL); + FREE(ps); +} diff --git a/src/gallium/drivers/nvfx/nvfx_query.c b/src/gallium/drivers/nvfx/nvfx_query.c new file mode 100644 index 00000000000..1b20b5245d7 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_query.c @@ -0,0 +1,137 @@ +#include "pipe/p_context.h" + +#include "nvfx_context.h" + +struct nvfx_query { + struct list_head list; + struct nouveau_resource *object; + unsigned type; + boolean ready; + uint64_t result; +}; + +static INLINE struct nvfx_query * +nvfx_query(struct pipe_query *pipe) +{ + return (struct nvfx_query *)pipe; +} + +static struct pipe_query * +nvfx_query_create(struct pipe_context *pipe, unsigned query_type) +{ + struct nvfx_query *q; + + q = CALLOC(1, sizeof(struct nvfx_query)); + q->type = query_type; + + assert(q->type == PIPE_QUERY_OCCLUSION_COUNTER); + + return (struct pipe_query *)q; +} + +static void +nvfx_query_destroy(struct pipe_context *pipe, struct pipe_query *pq) +{ + struct nvfx_query *q = nvfx_query(pq); + + if (q->object) + { + nouveau_resource_free(&q->object); + LIST_DEL(&q->list); + } + FREE(q); +} + +static void +nvfx_query_begin(struct pipe_context *pipe, struct pipe_query *pq) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_query *q = nvfx_query(pq); + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + uint64_t tmp; + + /* Happens when end_query() is called, then another begin_query() + * without querying the result in-between. For now we'll wait for + * the existing query to notify completion, but it could be better. + */ + if (q->object) + pipe->get_query_result(pipe, pq, 1, &tmp); + + while (nouveau_resource_alloc(nvfx->screen->query_heap, 1, NULL, &q->object)) + { + struct nvfx_query* oldestq; + assert(!LIST_IS_EMPTY(&nvfx->screen->query_list)); + oldestq = LIST_ENTRY(struct nvfx_query, nvfx->screen->query_list.next, list); + pipe->get_query_result(pipe, (struct pipe_query*)oldestq, 1, &tmp); + } + + LIST_ADDTAIL(&q->list, &nvfx->screen->query_list); + + nouveau_notifier_reset(nvfx->screen->query, q->object->start); + + BEGIN_RING(chan, eng3d, NV34TCL_QUERY_RESET, 1); + OUT_RING (chan, 1); + BEGIN_RING(chan, eng3d, NV34TCL_QUERY_UNK17CC, 1); + OUT_RING (chan, 1); + + q->ready = FALSE; +} + +static void +nvfx_query_end(struct pipe_context *pipe, struct pipe_query *pq) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + struct nvfx_query *q = nvfx_query(pq); + + BEGIN_RING(chan, eng3d, NV34TCL_QUERY_GET, 1); + OUT_RING (chan, (0x01 << NV34TCL_QUERY_GET_UNK24_SHIFT) | + ((q->object->start * 32) << NV34TCL_QUERY_GET_OFFSET_SHIFT)); + FIRE_RING(chan); +} + +static boolean +nvfx_query_result(struct pipe_context *pipe, struct pipe_query *pq, + boolean wait, uint64_t *result) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_query *q = nvfx_query(pq); + + if (!q->ready) { + unsigned status; + + status = nouveau_notifier_status(nvfx->screen->query, + q->object->start); + if (status != NV_NOTIFY_STATE_STATUS_COMPLETED) { + if (wait == FALSE) + return FALSE; + + nouveau_notifier_wait_status(nvfx->screen->query, + q->object->start, + NV_NOTIFY_STATE_STATUS_COMPLETED, 0); + } + + q->result = nouveau_notifier_return_val(nvfx->screen->query, + q->object->start); + q->ready = TRUE; + nouveau_resource_free(&q->object); + LIST_DEL(&q->list); + } + + *result = q->result; + return TRUE; +} + +void +nvfx_init_query_functions(struct nvfx_context *nvfx) +{ + nvfx->pipe.create_query = nvfx_query_create; + nvfx->pipe.destroy_query = nvfx_query_destroy; + nvfx->pipe.begin_query = nvfx_query_begin; + nvfx->pipe.end_query = nvfx_query_end; + nvfx->pipe.get_query_result = nvfx_query_result; +} diff --git a/src/gallium/drivers/nvfx/nvfx_resource.c b/src/gallium/drivers/nvfx/nvfx_resource.c new file mode 100644 index 00000000000..10cdeed2a37 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_resource.c @@ -0,0 +1,67 @@ + +#include "pipe/p_context.h" +#include "nvfx_resource.h" +#include "nouveau/nouveau_screen.h" + + +/* This doesn't look quite right - this query is supposed to ask + * whether the particular context has references to the resource in + * any unflushed rendering command buffer, and hence requires a + * pipe->flush() for serializing some modification to that resource. + * + * This seems to be answering the question of whether the resource is + * currently on hardware. + */ +static unsigned int +nvfx_resource_is_referenced(struct pipe_context *pipe, + struct pipe_resource *resource, + unsigned face, unsigned level) +{ + return nouveau_reference_flags(nvfx_resource(resource)->bo); +} + +static struct pipe_resource * +nvfx_resource_create(struct pipe_screen *screen, + const struct pipe_resource *template) +{ + if (template->target == PIPE_BUFFER) + return nvfx_buffer_create(screen, template); + else + return nvfx_miptree_create(screen, template); +} + +static struct pipe_resource * +nvfx_resource_from_handle(struct pipe_screen * screen, + const struct pipe_resource *template, + struct winsys_handle *whandle) +{ + if (template->target == PIPE_BUFFER) + return NULL; + else + return nvfx_miptree_from_handle(screen, template, whandle); +} + +void +nvfx_init_resource_functions(struct pipe_context *pipe) +{ + pipe->get_transfer = u_get_transfer_vtbl; + pipe->transfer_map = u_transfer_map_vtbl; + pipe->transfer_flush_region = u_transfer_flush_region_vtbl; + pipe->transfer_unmap = u_transfer_unmap_vtbl; + pipe->transfer_destroy = u_transfer_destroy_vtbl; + pipe->transfer_inline_write = u_transfer_inline_write_vtbl; + pipe->is_resource_referenced = nvfx_resource_is_referenced; +} + +void +nvfx_screen_init_resource_functions(struct pipe_screen *pscreen) +{ + pscreen->resource_create = nvfx_resource_create; + pscreen->resource_from_handle = nvfx_resource_from_handle; + pscreen->resource_get_handle = u_resource_get_handle_vtbl; + pscreen->resource_destroy = u_resource_destroy_vtbl; + pscreen->user_buffer_create = nvfx_user_buffer_create; + + pscreen->get_tex_surface = nvfx_miptree_surface_new; + pscreen->tex_surface_destroy = nvfx_miptree_surface_del; +} diff --git a/src/gallium/drivers/nvfx/nvfx_resource.h b/src/gallium/drivers/nvfx/nvfx_resource.h new file mode 100644 index 00000000000..a68c14cf3fb --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_resource.h @@ -0,0 +1,91 @@ + +#ifndef NVFX_RESOURCE_H +#define NVFX_RESOURCE_H + +#include "util/u_transfer.h" + +struct pipe_resource; +struct nouveau_bo; + + +/* This gets further specialized into either buffer or texture + * structures. In the future we'll want to remove much of that + * distinction, but for now try to keep as close to the existing code + * as possible and use the vtbl struct to choose between the two + * underlying implementations. + */ +struct nvfx_resource { + struct pipe_resource base; + struct u_resource_vtbl *vtbl; + struct nouveau_bo *bo; +}; + +#define NVFX_MAX_TEXTURE_LEVELS 16 + +struct nvfx_miptree { + struct nvfx_resource base; + uint total_size; + + struct { + uint pitch; + uint *image_offset; + } level[NVFX_MAX_TEXTURE_LEVELS]; + + unsigned image_nr; +}; + +static INLINE +struct nvfx_resource *nvfx_resource(struct pipe_resource *resource) +{ + return (struct nvfx_resource *)resource; +} + +static INLINE struct nouveau_bo * +nvfx_surface_buffer(struct pipe_surface *surf) +{ + struct nvfx_resource *mt = nvfx_resource(surf->texture); + + return mt->bo; +} + + +void +nvfx_init_resource_functions(struct pipe_context *pipe); + +void +nvfx_screen_init_resource_functions(struct pipe_screen *pscreen); + + +/* Internal: + */ + +struct pipe_resource * +nvfx_miptree_create(struct pipe_screen *pscreen, const struct pipe_resource *pt); + +struct pipe_resource * +nvfx_miptree_from_handle(struct pipe_screen *pscreen, + const struct pipe_resource *template, + struct winsys_handle *whandle); + +struct pipe_resource * +nvfx_buffer_create(struct pipe_screen *pscreen, + const struct pipe_resource *template); + +struct pipe_resource * +nvfx_user_buffer_create(struct pipe_screen *screen, + void *ptr, + unsigned bytes, + unsigned usage); + + + +void +nvfx_miptree_surface_del(struct pipe_surface *ps); + +struct pipe_surface * +nvfx_miptree_surface_new(struct pipe_screen *pscreen, struct pipe_resource *pt, + unsigned face, unsigned level, unsigned zslice, + unsigned flags); + + +#endif diff --git a/src/gallium/drivers/nvfx/nvfx_screen.c b/src/gallium/drivers/nvfx/nvfx_screen.c new file mode 100644 index 00000000000..9f03ab1833b --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_screen.c @@ -0,0 +1,466 @@ +#include "pipe/p_screen.h" +#include "pipe/p_state.h" +#include "util/u_simple_screen.h" + +#include "nouveau/nouveau_screen.h" + +#include "nvfx_context.h" +#include "nvfx_screen.h" +#include "nvfx_resource.h" + +#define NV30TCL_CHIPSET_3X_MASK 0x00000003 +#define NV34TCL_CHIPSET_3X_MASK 0x00000010 +#define NV35TCL_CHIPSET_3X_MASK 0x000001e0 + +/* FIXME: It seems I should not include directly ../../winsys/drm/nouveau/drm/nouveau_drm_api.h +* to get the pointer to the context front buffer, so I copied nouveau_winsys here. +* nv30_screen_surface_format_supported() can then use it to enforce creating fbo +* with same number of bits everywhere. +*/ +struct nouveau_winsys { + struct pipe_winsys base; + + struct pipe_screen *pscreen; + + struct pipe_surface *front; +}; +#define NV4X_GRCLASS4097_CHIPSETS 0x00000baf +#define NV4X_GRCLASS4497_CHIPSETS 0x00005450 +#define NV6X_GRCLASS4497_CHIPSETS 0x00000088 + +static int +nvfx_screen_get_param(struct pipe_screen *pscreen, int param) +{ + struct nvfx_screen *screen = nvfx_screen(pscreen); + + switch (param) { + case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: + /* TODO: check this */ + return screen->is_nv4x ? 16 : 8; + case PIPE_CAP_NPOT_TEXTURES: + return !!screen->is_nv4x; + case PIPE_CAP_TWO_SIDED_STENCIL: + return 1; + case PIPE_CAP_GLSL: + return 0; + case PIPE_CAP_ANISOTROPIC_FILTER: + return 1; + case PIPE_CAP_POINT_SPRITE: + return 1; + case PIPE_CAP_MAX_RENDER_TARGETS: + return screen->is_nv4x ? 4 : 2; + case PIPE_CAP_OCCLUSION_QUERY: + return 1; + case PIPE_CAP_TEXTURE_SHADOW_MAP: + return 1; + case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: + return 13; + case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: + return 10; + case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: + return 13; + case PIPE_CAP_TEXTURE_MIRROR_CLAMP: + return !!screen->is_nv4x; + case PIPE_CAP_TEXTURE_MIRROR_REPEAT: + return 1; + case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS: + return 0; /* We have 4 on nv40 - but unsupported currently */ + case PIPE_CAP_TGSI_CONT_SUPPORTED: + return 0; + case PIPE_CAP_BLEND_EQUATION_SEPARATE: + return !!screen->is_nv4x; + case PIPE_CAP_MAX_COMBINED_SAMPLERS: + return 16; + case PIPE_CAP_INDEP_BLEND_ENABLE: + /* TODO: on nv40 we have separate color masks */ + /* TODO: nv40 mrt blending is probably broken */ + return 0; + case PIPE_CAP_INDEP_BLEND_FUNC: + return 0; + case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: + case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: + return 1; + case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: + case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: + return 0; + default: + NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param); + return 0; + } +} + +static float +nvfx_screen_get_paramf(struct pipe_screen *pscreen, int param) +{ + struct nvfx_screen *screen = nvfx_screen(pscreen); + + switch (param) { + case PIPE_CAP_MAX_LINE_WIDTH: + case PIPE_CAP_MAX_LINE_WIDTH_AA: + return 10.0; + case PIPE_CAP_MAX_POINT_WIDTH: + case PIPE_CAP_MAX_POINT_WIDTH_AA: + return 64.0; + case PIPE_CAP_MAX_TEXTURE_ANISOTROPY: + return screen->is_nv4x ? 16.0 : 8.0; + case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: + return screen->is_nv4x ? 16.0 : 4.0; + default: + NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param); + return 0.0; + } +} + +static boolean +nvfx_screen_surface_format_supported(struct pipe_screen *pscreen, + enum pipe_format format, + enum pipe_texture_target target, + unsigned tex_usage, unsigned geom_flags) +{ + struct nvfx_screen *screen = nvfx_screen(pscreen); + struct pipe_surface *front = ((struct nouveau_winsys *) pscreen->winsys)->front; + + if (tex_usage & PIPE_BIND_RENDER_TARGET) { + switch (format) { + case PIPE_FORMAT_B8G8R8A8_UNORM: + case PIPE_FORMAT_B8G8R8X8_UNORM: + case PIPE_FORMAT_B5G6R5_UNORM: + return TRUE; + default: + break; + } + } else + if (tex_usage & PIPE_BIND_DEPTH_STENCIL) { + switch (format) { + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: + case PIPE_FORMAT_X8Z24_UNORM: + return TRUE; + case PIPE_FORMAT_Z16_UNORM: + /* TODO: this nv30 limitation probably does not exist */ + if (!screen->is_nv4x && front) + return (front->format == PIPE_FORMAT_B5G6R5_UNORM); + return TRUE; + default: + break; + } + } else { + switch (format) { + case PIPE_FORMAT_B8G8R8A8_UNORM: + case PIPE_FORMAT_B8G8R8X8_UNORM: + case PIPE_FORMAT_B5G5R5A1_UNORM: + case PIPE_FORMAT_B4G4R4A4_UNORM: + case PIPE_FORMAT_B5G6R5_UNORM: + case PIPE_FORMAT_L8_UNORM: + case PIPE_FORMAT_A8_UNORM: + case PIPE_FORMAT_I8_UNORM: + case PIPE_FORMAT_L8A8_UNORM: + case PIPE_FORMAT_Z16_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: + case PIPE_FORMAT_DXT1_RGB: + case PIPE_FORMAT_DXT1_RGBA: + case PIPE_FORMAT_DXT3_RGBA: + case PIPE_FORMAT_DXT5_RGBA: + return TRUE; + /* TODO: does nv30 support this? */ + case PIPE_FORMAT_R16_SNORM: + return !!screen->is_nv4x; + default: + break; + } + } + + return FALSE; +} + + +static void +nvfx_screen_destroy(struct pipe_screen *pscreen) +{ + struct nvfx_screen *screen = nvfx_screen(pscreen); + + nouveau_resource_destroy(&screen->vp_exec_heap); + nouveau_resource_destroy(&screen->vp_data_heap); + nouveau_resource_destroy(&screen->query_heap); + nouveau_notifier_free(&screen->query); + nouveau_notifier_free(&screen->sync); + nouveau_grobj_free(&screen->eng3d); + nv04_surface_2d_takedown(&screen->eng2d); + + nouveau_screen_fini(&screen->base); + + FREE(pscreen); +} + +static void nv30_screen_init(struct nvfx_screen *screen) +{ + struct nouveau_channel *chan = screen->base.channel; + int i; + + /* TODO: perhaps we should do some of this on nv40 too? */ + for (i=1; i<8; i++) { + OUT_RING(chan, RING_3D(NV34TCL_VIEWPORT_CLIP_HORIZ(i), 1)); + OUT_RING(chan, 0); + OUT_RING(chan, RING_3D(NV34TCL_VIEWPORT_CLIP_VERT(i), 1)); + OUT_RING(chan, 0); + } + + OUT_RING(chan, RING_3D(0x220, 1)); + OUT_RING(chan, 1); + + OUT_RING(chan, RING_3D(0x03b0, 1)); + OUT_RING(chan, 0x00100000); + OUT_RING(chan, RING_3D(0x1454, 1)); + OUT_RING(chan, 0); + OUT_RING(chan, RING_3D(0x1d80, 1)); + OUT_RING(chan, 3); + OUT_RING(chan, RING_3D(0x1450, 1)); + OUT_RING(chan, 0x00030004); + + /* NEW */ + OUT_RING(chan, RING_3D(0x1e98, 1)); + OUT_RING(chan, 0); + OUT_RING(chan, RING_3D(0x17e0, 3)); + OUT_RING(chan, fui(0.0)); + OUT_RING(chan, fui(0.0)); + OUT_RING(chan, fui(1.0)); + OUT_RING(chan, RING_3D(0x1f80, 16)); + for (i=0; i<16; i++) { + OUT_RING(chan, (i==8) ? 0x0000ffff : 0); + } + + OUT_RING(chan, RING_3D(0x120, 3)); + OUT_RING(chan, 0); + OUT_RING(chan, 1); + OUT_RING(chan, 2); + + OUT_RING(chan, RING_3D(0x1d88, 1)); + OUT_RING(chan, 0x00001200); + + OUT_RING(chan, RING_3D(NV34TCL_RC_ENABLE, 1)); + OUT_RING(chan, 0); + + OUT_RING(chan, RING_3D(NV34TCL_DEPTH_RANGE_NEAR, 2)); + OUT_RING(chan, fui(0.0)); + OUT_RING(chan, fui(1.0)); + + OUT_RING(chan, RING_3D(NV34TCL_MULTISAMPLE_CONTROL, 1)); + OUT_RING(chan, 0xffff0000); + + /* enables use of vp rather than fixed-function somehow */ + OUT_RING(chan, RING_3D(0x1e94, 1)); + OUT_RING(chan, 0x13); +} + +static void nv40_screen_init(struct nvfx_screen *screen) +{ + struct nouveau_channel *chan = screen->base.channel; + + OUT_RING(chan, RING_3D(NV40TCL_DMA_COLOR2, 2)); + OUT_RING(chan, screen->base.channel->vram->handle); + OUT_RING(chan, screen->base.channel->vram->handle); + + OUT_RING(chan, RING_3D(0x1ea4, 3)); + OUT_RING(chan, 0x00000010); + OUT_RING(chan, 0x01000100); + OUT_RING(chan, 0xff800006); + + /* vtxprog output routing */ + OUT_RING(chan, RING_3D(0x1fc4, 1)); + OUT_RING(chan, 0x06144321); + OUT_RING(chan, RING_3D(0x1fc8, 2)); + OUT_RING(chan, 0xedcba987); + OUT_RING(chan, 0x00000021); + OUT_RING(chan, RING_3D(0x1fd0, 1)); + OUT_RING(chan, 0x00171615); + OUT_RING(chan, RING_3D(0x1fd4, 1)); + OUT_RING(chan, 0x001b1a19); + + OUT_RING(chan, RING_3D(0x1ef8, 1)); + OUT_RING(chan, 0x0020ffff); + OUT_RING(chan, RING_3D(0x1d64, 1)); + OUT_RING(chan, 0x00d30000); + OUT_RING(chan, RING_3D(0x1e94, 1)); + OUT_RING(chan, 0x00000001); +} + +static unsigned +nvfx_screen_get_vertex_buffer_flags(struct nvfx_screen* screen) +{ + int vram_hack_default = 0; + int vram_hack; + // TODO: this is a bit of a guess; also add other cards that may need this hack. + // It may also depend on the specific card or the AGP/PCIe chipset. + if(screen->base.device->chipset == 0x47 /* G70 */ + || screen->base.device->chipset == 0x49 /* G71 */ + || screen->base.device->chipset == 0x46 /* G72 */ + ) + vram_hack_default = 1; + vram_hack = debug_get_bool_option("NOUVEAU_VTXIDX_IN_VRAM", vram_hack_default); + +#ifdef DEBUG + if(!vram_hack) + { + fprintf(stderr, "Some systems may experience graphics corruption due to randomly misplaced vertices.\n" + "If this is happening, export NOUVEAU_VTXIDX_IN_VRAM=1 may reduce or eliminate the problem\n"); + } + else + { + fprintf(stderr, "A performance reducing hack is being used to help avoid graphics corruption.\n" + "You can try export NOUVEAU_VTXIDX_IN_VRAM=0 to disable it.\n"); + } +#endif + + return vram_hack ? NOUVEAU_BO_VRAM : NOUVEAU_BO_GART; +} + +struct pipe_screen * +nvfx_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev) +{ + static const unsigned query_sizes[] = {(4096 - 4 * 32) / 32, 3 * 1024 / 32, 2 * 1024 / 32, 1024 / 32}; + struct nvfx_screen *screen = CALLOC_STRUCT(nvfx_screen); + struct nouveau_channel *chan; + struct pipe_screen *pscreen; + unsigned eng3d_class = 0; + int ret, i; + + if (!screen) + return NULL; + + pscreen = &screen->base.base; + + ret = nouveau_screen_init(&screen->base, dev); + if (ret) { + nvfx_screen_destroy(pscreen); + return NULL; + } + chan = screen->base.channel; + + pscreen->winsys = ws; + pscreen->destroy = nvfx_screen_destroy; + pscreen->get_param = nvfx_screen_get_param; + pscreen->get_paramf = nvfx_screen_get_paramf; + pscreen->is_format_supported = nvfx_screen_surface_format_supported; + pscreen->context_create = nvfx_create; + + switch (dev->chipset & 0xf0) { + case 0x30: + if (NV30TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f))) + eng3d_class = 0x0397; + else if (NV34TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f))) + eng3d_class = 0x0697; + else if (NV35TCL_CHIPSET_3X_MASK & (1 << (dev->chipset & 0x0f))) + eng3d_class = 0x0497; + break; + case 0x40: + if (NV4X_GRCLASS4097_CHIPSETS & (1 << (dev->chipset & 0x0f))) + eng3d_class = NV40TCL; + else if (NV4X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f))) + eng3d_class = NV44TCL; + screen->is_nv4x = ~0; + break; + case 0x60: + if (NV6X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f))) + eng3d_class = NV44TCL; + screen->is_nv4x = ~0; + break; + } + + if (!eng3d_class) { + NOUVEAU_ERR("Unknown nv3x/nv4x chipset: nv%02x\n", dev->chipset); + return NULL; + } + + screen->force_swtnl = debug_get_bool_option("NOUVEAU_SWTNL", FALSE); + + screen->vertex_buffer_reloc_flags = nvfx_screen_get_vertex_buffer_flags(screen); + + /* surely both nv3x and nv44 support index buffers too: find out how and test that */ + if(eng3d_class == NV40TCL) + screen->index_buffer_reloc_flags = screen->vertex_buffer_reloc_flags; + + if(!screen->force_swtnl && screen->vertex_buffer_reloc_flags == screen->index_buffer_reloc_flags) + screen->base.vertex_buffer_flags = screen->base.index_buffer_flags = screen->vertex_buffer_reloc_flags; + + nvfx_screen_init_resource_functions(pscreen); + + ret = nouveau_grobj_alloc(chan, 0xbeef3097, eng3d_class, &screen->eng3d); + if (ret) { + NOUVEAU_ERR("Error creating 3D object: %d\n", ret); + return FALSE; + } + + /* 2D engine setup */ + screen->eng2d = nv04_surface_2d_init(&screen->base); + screen->eng2d->buf = nvfx_surface_buffer; + + /* Notifier for sync purposes */ + ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync); + if (ret) { + NOUVEAU_ERR("Error creating notifier object: %d\n", ret); + nvfx_screen_destroy(pscreen); + return NULL; + } + + /* Query objects */ + for(i = 0; i < sizeof(query_sizes) / sizeof(query_sizes[0]); ++i) + { + ret = nouveau_notifier_alloc(chan, 0xbeef0302, query_sizes[i], &screen->query); + if(!ret) + break; + } + + if (ret) { + NOUVEAU_ERR("Error initialising query objects: %d\n", ret); + nvfx_screen_destroy(pscreen); + return NULL; + } + + ret = nouveau_resource_init(&screen->query_heap, 0, query_sizes[i]); + if (ret) { + NOUVEAU_ERR("Error initialising query object heap: %d\n", ret); + nvfx_screen_destroy(pscreen); + return NULL; + } + + LIST_INITHEAD(&screen->query_list); + + /* Vtxprog resources */ + if (nouveau_resource_init(&screen->vp_exec_heap, 0, screen->is_nv4x ? 512 : 256) || + nouveau_resource_init(&screen->vp_data_heap, 0, 256)) { + nvfx_screen_destroy(pscreen); + return NULL; + } + + BIND_RING(chan, screen->eng3d, 7); + + /* Static eng3d initialisation */ + /* note that we just started using the channel, so we must have space in the pushbuffer */ + OUT_RING(chan, RING_3D(NV34TCL_DMA_NOTIFY, 1)); + OUT_RING(chan, screen->sync->handle); + OUT_RING(chan, RING_3D(NV34TCL_DMA_TEXTURE0, 2)); + OUT_RING(chan, chan->vram->handle); + OUT_RING(chan, chan->gart->handle); + OUT_RING(chan, RING_3D(NV34TCL_DMA_COLOR1, 1)); + OUT_RING(chan, chan->vram->handle); + OUT_RING(chan, RING_3D(NV34TCL_DMA_COLOR0, 2)); + OUT_RING(chan, chan->vram->handle); + OUT_RING(chan, chan->vram->handle); + OUT_RING(chan, RING_3D(NV34TCL_DMA_VTXBUF0, 2)); + OUT_RING(chan, chan->vram->handle); + OUT_RING(chan, chan->gart->handle); + + OUT_RING(chan, RING_3D(NV34TCL_DMA_FENCE, 2)); + OUT_RING(chan, 0); + OUT_RING(chan, screen->query->handle); + + OUT_RING(chan, RING_3D(NV34TCL_DMA_IN_MEMORY7, 2)); + OUT_RING(chan, chan->vram->handle); + OUT_RING(chan, chan->vram->handle); + + if(!screen->is_nv4x) + nv30_screen_init(screen); + else + nv40_screen_init(screen); + + return pscreen; +} diff --git a/src/gallium/drivers/nvfx/nvfx_screen.h b/src/gallium/drivers/nvfx/nvfx_screen.h new file mode 100644 index 00000000000..5e1c3945aef --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_screen.h @@ -0,0 +1,43 @@ +#ifndef __NVFX_SCREEN_H__ +#define __NVFX_SCREEN_H__ + +#include "util/u_double_list.h" +#include "nouveau/nouveau_screen.h" +#include "nv04_surface_2d.h" + +struct nvfx_context; + +struct nvfx_screen { + struct nouveau_screen base; + + struct nouveau_winsys *nvws; + + struct nvfx_context *cur_ctx; + + unsigned is_nv4x; /* either 0 or ~0 */ + boolean force_swtnl; + unsigned vertex_buffer_reloc_flags; + unsigned index_buffer_reloc_flags; + + /* HW graphics objects */ + struct nv04_surface_2d *eng2d; + struct nouveau_grobj *eng3d; + struct nouveau_notifier *sync; + + /* Query object resources */ + struct nouveau_notifier *query; + struct nouveau_resource *query_heap; + struct list_head query_list; + + /* Vtxprog resources */ + struct nouveau_resource *vp_exec_heap; + struct nouveau_resource *vp_data_heap; +}; + +static INLINE struct nvfx_screen * +nvfx_screen(struct pipe_screen *screen) +{ + return (struct nvfx_screen *)screen; +} + +#endif diff --git a/src/gallium/drivers/nvfx/nvfx_shader.h b/src/gallium/drivers/nvfx/nvfx_shader.h new file mode 100644 index 00000000000..50830b39164 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_shader.h @@ -0,0 +1,429 @@ +#ifndef __NVFX_SHADER_H__ +#define __NVFX_SHADER_H__ + +/* this will resolve to either the NV30 or the NV40 version + * depending on the current hardware */ +/* unusual, but very fast and compact method */ +#define NVFX_VP(c) ((NV30_VP_##c) + (nvfx->is_nv4x & ((NV40_VP_##c) - (NV30_VP_##c)))) + +#define NVFX_VP_INST_SLOT_VEC 0 +#define NVFX_VP_INST_SLOT_SCA 1 + +#define NVFX_VP_INST_IN_POS 0 /* These seem to match the bindings specified in */ +#define NVFX_VP_INST_IN_WEIGHT 1 /* the ARB_v_p spec (2.14.3.1) */ +#define NVFX_VP_INST_IN_NORMAL 2 +#define NVFX_VP_INST_IN_COL0 3 /* Should probably confirm them all though */ +#define NVFX_VP_INST_IN_COL1 4 +#define NVFX_VP_INST_IN_FOGC 5 +#define NVFX_VP_INST_IN_TC0 8 +#define NVFX_VP_INST_IN_TC(n) (8+n) + +#define NVFX_VP_INST_SCA_OP_NOP 0x00 +#define NVFX_VP_INST_SCA_OP_MOV 0x01 +#define NVFX_VP_INST_SCA_OP_RCP 0x02 +#define NVFX_VP_INST_SCA_OP_RCC 0x03 +#define NVFX_VP_INST_SCA_OP_RSQ 0x04 +#define NVFX_VP_INST_SCA_OP_EXP 0x05 +#define NVFX_VP_INST_SCA_OP_LOG 0x06 +#define NVFX_VP_INST_SCA_OP_LIT 0x07 +#define NVFX_VP_INST_SCA_OP_BRA 0x09 +#define NVFX_VP_INST_SCA_OP_CAL 0x0B +#define NVFX_VP_INST_SCA_OP_RET 0x0C +#define NVFX_VP_INST_SCA_OP_LG2 0x0D +#define NVFX_VP_INST_SCA_OP_EX2 0x0E +#define NVFX_VP_INST_SCA_OP_SIN 0x0F +#define NVFX_VP_INST_SCA_OP_COS 0x10 + +#define NV40_VP_INST_SCA_OP_PUSHA 0x13 +#define NV40_VP_INST_SCA_OP_POPA 0x14 + +#define NVFX_VP_INST_VEC_OP_NOP 0x00 +#define NVFX_VP_INST_VEC_OP_MOV 0x01 +#define NVFX_VP_INST_VEC_OP_MUL 0x02 +#define NVFX_VP_INST_VEC_OP_ADD 0x03 +#define NVFX_VP_INST_VEC_OP_MAD 0x04 +#define NVFX_VP_INST_VEC_OP_DP3 0x05 +#define NVFX_VP_INST_VEC_OP_DPH 0x06 +#define NVFX_VP_INST_VEC_OP_DP4 0x07 +#define NVFX_VP_INST_VEC_OP_DST 0x08 +#define NVFX_VP_INST_VEC_OP_MIN 0x09 +#define NVFX_VP_INST_VEC_OP_MAX 0x0A +#define NVFX_VP_INST_VEC_OP_SLT 0x0B +#define NVFX_VP_INST_VEC_OP_SGE 0x0C +#define NVFX_VP_INST_VEC_OP_ARL 0x0D +#define NVFX_VP_INST_VEC_OP_FRC 0x0E +#define NVFX_VP_INST_VEC_OP_FLR 0x0F +#define NVFX_VP_INST_VEC_OP_SEQ 0x10 +#define NVFX_VP_INST_VEC_OP_SFL 0x11 +#define NVFX_VP_INST_VEC_OP_SGT 0x12 +#define NVFX_VP_INST_VEC_OP_SLE 0x13 +#define NVFX_VP_INST_VEC_OP_SNE 0x14 +#define NVFX_VP_INST_VEC_OP_STR 0x15 +#define NVFX_VP_INST_VEC_OP_SSG 0x16 +#define NVFX_VP_INST_VEC_OP_ARR 0x17 +#define NVFX_VP_INST_VEC_OP_ARA 0x18 + +#define NV40_VP_INST_VEC_OP_TXL 0x19 + +/* DWORD 3 */ +#define NVFX_VP_INST_LAST (1 << 0) + +/* + * Each fragment program opcode appears to be comprised of 4 32-bit values. + * + * 0 - Opcode, output reg/mask, ATTRIB source + * 1 - Source 0 + * 2 - Source 1 + * 3 - Source 2 + * + * There appears to be no special difference between result regs and temp regs. + * result.color == R0.xyzw + * result.depth == R1.z + * When the fragprog contains instructions to write depth, NV30_TCL_PRIMITIVE_3D_UNK1D78=0 + * otherwise it is set to 1. + * + * Constants are inserted directly after the instruction that uses them. + * + * It appears that it's not possible to use two input registers in one + * instruction as the input sourcing is done in the instruction dword + * and not the source selection dwords. As such instructions such as: + * + * ADD result.color, fragment.color, fragment.texcoord[0]; + * + * must be split into two MOV's and then an ADD (nvidia does this) but + * I'm not sure why it's not just one MOV and then source the second input + * in the ADD instruction.. + * + * Negation of the full source is done with NV30_FP_REG_NEGATE, arbitrary + * negation requires multiplication with a const. + * + * Arbitrary swizzling is supported with the exception of SWIZZLE_ZERO/SWIZZLE_ONE + * The temp/result regs appear to be initialised to (0.0, 0.0, 0.0, 0.0) as SWIZZLE_ZERO + * is implemented simply by not writing to the relevant components of the destination. + * + * Conditional execution + * TODO + * + * Non-native instructions: + * LIT + * LRP - MAD+MAD + * SUB - ADD, negate second source + * RSQ - LG2 + EX2 + * POW - LG2 + MUL + EX2 + * SCS - COS + SIN + * XPD + * + * NV40 Looping + * Loops appear to be fairly expensive on NV40 at least, the proprietary + * driver goes to a lot of effort to avoid using the native looping + * instructions. If the total number of *executed* instructions between + * REP/ENDREP or LOOP/ENDLOOP is <=500, the driver will unroll the loop. + * The maximum loop count is 255. + * + */ + +//== Opcode / Destination selection == +#define NVFX_FP_OP_PROGRAM_END (1 << 0) +#define NVFX_FP_OP_OUT_REG_SHIFT 1 +#define NV30_FP_OP_OUT_REG_MASK (31 << 1) /* uncertain */ +#define NV40_FP_OP_OUT_REG_MASK (63 << 1) +/* Needs to be set when writing outputs to get expected result.. */ +#define NVFX_FP_OP_OUT_REG_HALF (1 << 7) +#define NVFX_FP_OP_COND_WRITE_ENABLE (1 << 8) +#define NVFX_FP_OP_OUTMASK_SHIFT 9 +#define NVFX_FP_OP_OUTMASK_MASK (0xF << 9) +# define NVFX_FP_OP_OUT_X (1<<9) +# define NVFX_FP_OP_OUT_Y (1<<10) +# define NVFX_FP_OP_OUT_Z (1<<11) +# define NVFX_FP_OP_OUT_W (1<<12) +/* Uncertain about these, especially the input_src values.. it's possible that + * they can be dynamically changed. + */ +#define NVFX_FP_OP_INPUT_SRC_SHIFT 13 +#define NVFX_FP_OP_INPUT_SRC_MASK (15 << 13) +# define NVFX_FP_OP_INPUT_SRC_POSITION 0x0 +# define NVFX_FP_OP_INPUT_SRC_COL0 0x1 +# define NVFX_FP_OP_INPUT_SRC_COL1 0x2 +# define NVFX_FP_OP_INPUT_SRC_FOGC 0x3 +# define NVFX_FP_OP_INPUT_SRC_TC0 0x4 +# define NVFX_FP_OP_INPUT_SRC_TC(n) (0x4 + n) +# define NV40_FP_OP_INPUT_SRC_FACING 0xE +#define NVFX_FP_OP_TEX_UNIT_SHIFT 17 +#define NVFX_FP_OP_TEX_UNIT_MASK (0xF << 17) /* guess */ +#define NVFX_FP_OP_PRECISION_SHIFT 22 +#define NVFX_FP_OP_PRECISION_MASK (3 << 22) +# define NVFX_FP_PRECISION_FP32 0 +# define NVFX_FP_PRECISION_FP16 1 +# define NVFX_FP_PRECISION_FX12 2 +#define NVFX_FP_OP_OPCODE_SHIFT 24 +#define NVFX_FP_OP_OPCODE_MASK (0x3F << 24) +/* NV30/NV40 fragment program opcodes */ +#define NVFX_FP_OP_OPCODE_NOP 0x00 +#define NVFX_FP_OP_OPCODE_MOV 0x01 +#define NVFX_FP_OP_OPCODE_MUL 0x02 +#define NVFX_FP_OP_OPCODE_ADD 0x03 +#define NVFX_FP_OP_OPCODE_MAD 0x04 +#define NVFX_FP_OP_OPCODE_DP3 0x05 +#define NVFX_FP_OP_OPCODE_DP4 0x06 +#define NVFX_FP_OP_OPCODE_DST 0x07 +#define NVFX_FP_OP_OPCODE_MIN 0x08 +#define NVFX_FP_OP_OPCODE_MAX 0x09 +#define NVFX_FP_OP_OPCODE_SLT 0x0A +#define NVFX_FP_OP_OPCODE_SGE 0x0B +#define NVFX_FP_OP_OPCODE_SLE 0x0C +#define NVFX_FP_OP_OPCODE_SGT 0x0D +#define NVFX_FP_OP_OPCODE_SNE 0x0E +#define NVFX_FP_OP_OPCODE_SEQ 0x0F +#define NVFX_FP_OP_OPCODE_FRC 0x10 +#define NVFX_FP_OP_OPCODE_FLR 0x11 +#define NVFX_FP_OP_OPCODE_KIL 0x12 +#define NVFX_FP_OP_OPCODE_PK4B 0x13 +#define NVFX_FP_OP_OPCODE_UP4B 0x14 +#define NVFX_FP_OP_OPCODE_DDX 0x15 /* can only write XY */ +#define NVFX_FP_OP_OPCODE_DDY 0x16 /* can only write XY */ +#define NVFX_FP_OP_OPCODE_TEX 0x17 +#define NVFX_FP_OP_OPCODE_TXP 0x18 +#define NVFX_FP_OP_OPCODE_TXD 0x19 +#define NVFX_FP_OP_OPCODE_RCP 0x1A +#define NVFX_FP_OP_OPCODE_EX2 0x1C +#define NVFX_FP_OP_OPCODE_LG2 0x1D +#define NVFX_FP_OP_OPCODE_STR 0x20 +#define NVFX_FP_OP_OPCODE_SFL 0x21 +#define NVFX_FP_OP_OPCODE_COS 0x22 +#define NVFX_FP_OP_OPCODE_SIN 0x23 +#define NVFX_FP_OP_OPCODE_PK2H 0x24 +#define NVFX_FP_OP_OPCODE_UP2H 0x25 +#define NVFX_FP_OP_OPCODE_PK4UB 0x27 +#define NVFX_FP_OP_OPCODE_UP4UB 0x28 +#define NVFX_FP_OP_OPCODE_PK2US 0x29 +#define NVFX_FP_OP_OPCODE_UP2US 0x2A +#define NVFX_FP_OP_OPCODE_DP2A 0x2E +#define NVFX_FP_OP_OPCODE_TXB 0x31 +#define NVFX_FP_OP_OPCODE_DIV 0x3A + +/* NV30 only fragment program opcodes */ +#define NVFX_FP_OP_OPCODE_RSQ_NV30 0x1B +#define NVFX_FP_OP_OPCODE_LIT_NV30 0x1E +#define NVFX_FP_OP_OPCODE_LRP_NV30 0x1F +#define NVFX_FP_OP_OPCODE_POW_NV30 0x26 +#define NVFX_FP_OP_OPCODE_RFL_NV30 0x36 + +/* NV40 only fragment program opcodes */ +#define NVFX_FP_OP_OPCODE_TXL_NV40 0x2F +/* The use of these instructions appears to be indicated by bit 31 of DWORD 2.*/ +#define NV40_FP_OP_BRA_OPCODE_BRK 0x0 +#define NV40_FP_OP_BRA_OPCODE_CAL 0x1 +#define NV40_FP_OP_BRA_OPCODE_IF 0x2 +#define NV40_FP_OP_BRA_OPCODE_LOOP 0x3 +#define NV40_FP_OP_BRA_OPCODE_REP 0x4 +#define NV40_FP_OP_BRA_OPCODE_RET 0x5 + +#define NVFX_FP_OP_OUT_SAT (1 << 31) + +/* high order bits of SRC0 */ +#define NVFX_FP_OP_OUT_ABS (1 << 29) +#define NVFX_FP_OP_COND_SWZ_W_SHIFT 27 +#define NVFX_FP_OP_COND_SWZ_W_MASK (3 << 27) +#define NVFX_FP_OP_COND_SWZ_Z_SHIFT 25 +#define NVFX_FP_OP_COND_SWZ_Z_MASK (3 << 25) +#define NVFX_FP_OP_COND_SWZ_Y_SHIFT 23 +#define NVFX_FP_OP_COND_SWZ_Y_MASK (3 << 23) +#define NVFX_FP_OP_COND_SWZ_X_SHIFT 21 +#define NVFX_FP_OP_COND_SWZ_X_MASK (3 << 21) +#define NVFX_FP_OP_COND_SWZ_ALL_SHIFT 21 +#define NVFX_FP_OP_COND_SWZ_ALL_MASK (0xFF << 21) +#define NVFX_FP_OP_COND_SHIFT 18 +#define NVFX_FP_OP_COND_MASK (0x07 << 18) +# define NVFX_FP_OP_COND_FL 0 +# define NVFX_FP_OP_COND_LT 1 +# define NVFX_FP_OP_COND_EQ 2 +# define NVFX_FP_OP_COND_LE 3 +# define NVFX_FP_OP_COND_GT 4 +# define NVFX_FP_OP_COND_NE 5 +# define NVFX_FP_OP_COND_GE 6 +# define NVFX_FP_OP_COND_TR 7 + +/* high order bits of SRC1 */ +#define NV40_FP_OP_OPCODE_IS_BRANCH (1<<31) +#define NVFX_FP_OP_DST_SCALE_SHIFT 28 +#define NVFX_FP_OP_DST_SCALE_MASK (3 << 28) +#define NVFX_FP_OP_DST_SCALE_1X 0 +#define NVFX_FP_OP_DST_SCALE_2X 1 +#define NVFX_FP_OP_DST_SCALE_4X 2 +#define NVFX_FP_OP_DST_SCALE_8X 3 +#define NVFX_FP_OP_DST_SCALE_INV_2X 5 +#define NVFX_FP_OP_DST_SCALE_INV_4X 6 +#define NVFX_FP_OP_DST_SCALE_INV_8X 7 + +/* SRC1 LOOP */ +#define NV40_FP_OP_LOOP_INCR_SHIFT 19 +#define NV40_FP_OP_LOOP_INCR_MASK (0xFF << 19) +#define NV40_FP_OP_LOOP_INDEX_SHIFT 10 +#define NV40_FP_OP_LOOP_INDEX_MASK (0xFF << 10) +#define NV40_FP_OP_LOOP_COUNT_SHIFT 2 +#define NV40_FP_OP_LOOP_COUNT_MASK (0xFF << 2) + +/* SRC1 IF */ +#define NV40_FP_OP_ELSE_ID_SHIFT 2 +#define NV40_FP_OP_ELSE_ID_MASK (0xFF << 2) + +/* SRC1 CAL */ +#define NV40_FP_OP_IADDR_SHIFT 2 +#define NV40_FP_OP_IADDR_MASK (0xFF << 2) + +/* SRC1 REP + * I have no idea why there are 3 count values here.. but they + * have always been filled with the same value in my tests so + * far.. + */ +#define NV40_FP_OP_REP_COUNT1_SHIFT 2 +#define NV40_FP_OP_REP_COUNT1_MASK (0xFF << 2) +#define NV40_FP_OP_REP_COUNT2_SHIFT 10 +#define NV40_FP_OP_REP_COUNT2_MASK (0xFF << 10) +#define NV40_FP_OP_REP_COUNT3_SHIFT 19 +#define NV40_FP_OP_REP_COUNT3_MASK (0xFF << 19) + +/* SRC2 REP/IF */ +#define NV40_FP_OP_END_ID_SHIFT 2 +#define NV40_FP_OP_END_ID_MASK (0xFF << 2) + +/* high order bits of SRC2 */ +#define NVFX_FP_OP_INDEX_INPUT (1 << 30) +#define NV40_FP_OP_ADDR_INDEX_SHIFT 19 +#define NV40_FP_OP_ADDR_INDEX_MASK (0xF << 19) + +//== Register selection == +#define NVFX_FP_REG_TYPE_SHIFT 0 +#define NVFX_FP_REG_TYPE_MASK (3 << 0) +# define NVFX_FP_REG_TYPE_TEMP 0 +# define NVFX_FP_REG_TYPE_INPUT 1 +# define NVFX_FP_REG_TYPE_CONST 2 +#define NVFX_FP_REG_SRC_SHIFT 2 +#define NV30_FP_REG_SRC_MASK (31 << 2) +#define NV40_FP_REG_SRC_MASK (63 << 2) +#define NVFX_FP_REG_SRC_HALF (1 << 8) +#define NVFX_FP_REG_SWZ_ALL_SHIFT 9 +#define NVFX_FP_REG_SWZ_ALL_MASK (255 << 9) +#define NVFX_FP_REG_SWZ_X_SHIFT 9 +#define NVFX_FP_REG_SWZ_X_MASK (3 << 9) +#define NVFX_FP_REG_SWZ_Y_SHIFT 11 +#define NVFX_FP_REG_SWZ_Y_MASK (3 << 11) +#define NVFX_FP_REG_SWZ_Z_SHIFT 13 +#define NVFX_FP_REG_SWZ_Z_MASK (3 << 13) +#define NVFX_FP_REG_SWZ_W_SHIFT 15 +#define NVFX_FP_REG_SWZ_W_MASK (3 << 15) +# define NVFX_FP_SWIZZLE_X 0 +# define NVFX_FP_SWIZZLE_Y 1 +# define NVFX_FP_SWIZZLE_Z 2 +# define NVFX_FP_SWIZZLE_W 3 +#define NVFX_FP_REG_NEGATE (1 << 17) + +#define NVFXSR_NONE 0 +#define NVFXSR_OUTPUT 1 +#define NVFXSR_INPUT 2 +#define NVFXSR_TEMP 3 +#define NVFXSR_CONST 4 + +#define NVFX_COND_FL 0 +#define NVFX_COND_LT 1 +#define NVFX_COND_EQ 2 +#define NVFX_COND_LE 3 +#define NVFX_COND_GT 4 +#define NVFX_COND_NE 5 +#define NVFX_COND_GE 6 +#define NVFX_COND_TR 7 + +/* Yes, this are ordered differently... */ + +#define NVFX_VP_MASK_X 8 +#define NVFX_VP_MASK_Y 4 +#define NVFX_VP_MASK_Z 2 +#define NVFX_VP_MASK_W 1 +#define NVFX_VP_MASK_ALL 0xf + +#define NVFX_FP_MASK_X 1 +#define NVFX_FP_MASK_Y 2 +#define NVFX_FP_MASK_Z 4 +#define NVFX_FP_MASK_W 8 +#define NVFX_FP_MASK_ALL 0xf + +#define NVFX_SWZ_X 0 +#define NVFX_SWZ_Y 1 +#define NVFX_SWZ_Z 2 +#define NVFX_SWZ_W 3 + +#define swz(s,x,y,z,w) nvfx_sr_swz((s), NVFX_SWZ_##x, NVFX_SWZ_##y, NVFX_SWZ_##z, NVFX_SWZ_##w) +#define neg(s) nvfx_sr_neg((s)) +#define abs(s) nvfx_sr_abs((s)) +#define scale(s,v) nvfx_sr_scale((s), NVFX_FP_OP_DST_SCALE_##v) + +struct nvfx_sreg { + int type; + int index; + + int dst_scale; + + int negate; + int abs; + int swz[4]; + + int cc_update; + int cc_update_reg; + int cc_test; + int cc_test_reg; + int cc_swz[4]; +}; + +static INLINE struct nvfx_sreg +nvfx_sr(int type, int index) +{ + struct nvfx_sreg temp = { + .type = type, + .index = index, + .dst_scale = 0, + .abs = 0, + .negate = 0, + .swz = { 0, 1, 2, 3 }, + .cc_update = 0, + .cc_update_reg = 0, + .cc_test = NVFX_COND_TR, + .cc_test_reg = 0, + .cc_swz = { 0, 1, 2, 3 }, + }; + return temp; +} + +static INLINE struct nvfx_sreg +nvfx_sr_swz(struct nvfx_sreg src, int x, int y, int z, int w) +{ + struct nvfx_sreg dst = src; + + dst.swz[NVFX_SWZ_X] = src.swz[x]; + dst.swz[NVFX_SWZ_Y] = src.swz[y]; + dst.swz[NVFX_SWZ_Z] = src.swz[z]; + dst.swz[NVFX_SWZ_W] = src.swz[w]; + return dst; +} + +static INLINE struct nvfx_sreg +nvfx_sr_neg(struct nvfx_sreg src) +{ + src.negate = !src.negate; + return src; +} + +static INLINE struct nvfx_sreg +nvfx_sr_abs(struct nvfx_sreg src) +{ + src.abs = 1; + return src; +} + +static INLINE struct nvfx_sreg +nvfx_sr_scale(struct nvfx_sreg src, int scale) +{ + src.dst_scale = scale; + return src; +} + +#endif diff --git a/src/gallium/drivers/nvfx/nvfx_state.c b/src/gallium/drivers/nvfx/nvfx_state.c new file mode 100644 index 00000000000..315de492dab --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state.c @@ -0,0 +1,658 @@ +#include "pipe/p_state.h" +#include "pipe/p_defines.h" +#include "util/u_inlines.h" + +#include "draw/draw_context.h" + +#include "tgsi/tgsi_parse.h" + +#include "nvfx_context.h" +#include "nvfx_state.h" +#include "nvfx_tex.h" + +static void * +nvfx_blend_state_create(struct pipe_context *pipe, + const struct pipe_blend_state *cso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_blend_state *bso = CALLOC(1, sizeof(*bso)); + struct nouveau_statebuf_builder sb = sb_init(bso->sb); + + if (cso->rt[0].blend_enable) { + sb_method(sb, NV34TCL_BLEND_FUNC_ENABLE, 3); + sb_data(sb, 1); + sb_data(sb, (nvgl_blend_func(cso->rt[0].alpha_src_factor) << 16) | + nvgl_blend_func(cso->rt[0].rgb_src_factor)); + sb_data(sb, nvgl_blend_func(cso->rt[0].alpha_dst_factor) << 16 | + nvgl_blend_func(cso->rt[0].rgb_dst_factor)); + if(nvfx->screen->base.device->chipset < 0x40) { + sb_method(sb, NV34TCL_BLEND_EQUATION, 1); + sb_data(sb, nvgl_blend_eqn(cso->rt[0].rgb_func)); + } else { + sb_method(sb, NV40TCL_BLEND_EQUATION, 1); + sb_data(sb, nvgl_blend_eqn(cso->rt[0].alpha_func) << 16 | + nvgl_blend_eqn(cso->rt[0].rgb_func)); + } + } else { + sb_method(sb, NV34TCL_BLEND_FUNC_ENABLE, 1); + sb_data(sb, 0); + } + + sb_method(sb, NV34TCL_COLOR_MASK, 1); + sb_data(sb, (((cso->rt[0].colormask & PIPE_MASK_A) ? (0x01 << 24) : 0) | + ((cso->rt[0].colormask & PIPE_MASK_R) ? (0x01 << 16) : 0) | + ((cso->rt[0].colormask & PIPE_MASK_G) ? (0x01 << 8) : 0) | + ((cso->rt[0].colormask & PIPE_MASK_B) ? (0x01 << 0) : 0))); + + /* TODO: add NV40 MRT color mask */ + + if (cso->logicop_enable) { + sb_method(sb, NV34TCL_COLOR_LOGIC_OP_ENABLE, 2); + sb_data(sb, 1); + sb_data(sb, nvgl_logicop_func(cso->logicop_func)); + } else { + sb_method(sb, NV34TCL_COLOR_LOGIC_OP_ENABLE, 1); + sb_data(sb, 0); + } + + sb_method(sb, NV34TCL_DITHER_ENABLE, 1); + sb_data(sb, cso->dither ? 1 : 0); + + bso->sb_len = sb_len(sb, bso->sb); + bso->pipe = *cso; + return (void *)bso; +} + +static void +nvfx_blend_state_bind(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->blend = hwcso; + nvfx->dirty |= NVFX_NEW_BLEND; +} + +static void +nvfx_blend_state_delete(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_blend_state *bso = hwcso; + + FREE(bso); +} + +static void * +nvfx_sampler_state_create(struct pipe_context *pipe, + const struct pipe_sampler_state *cso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_sampler_state *ps; + + ps = MALLOC(sizeof(struct nvfx_sampler_state)); + + /* on nv30, we use this as an internal flag */ + ps->fmt = cso->normalized_coords ? 0 : NV40TCL_TEX_FORMAT_RECT; + ps->en = 0; + ps->filt = nvfx_tex_filter(cso); + ps->wrap = (nvfx_tex_wrap_mode(cso->wrap_s) << NV34TCL_TX_WRAP_S_SHIFT) | + (nvfx_tex_wrap_mode(cso->wrap_t) << NV34TCL_TX_WRAP_T_SHIFT) | + (nvfx_tex_wrap_mode(cso->wrap_r) << NV34TCL_TX_WRAP_R_SHIFT) | + nvfx_tex_wrap_compare_mode(cso); + ps->bcol = nvfx_tex_border_color(cso->border_color); + + if(nvfx->is_nv4x) + nv40_sampler_state_init(pipe, ps, cso); + else + nv30_sampler_state_init(pipe, ps, cso); + + return (void *)ps; +} + +static void +nvfx_sampler_state_bind(struct pipe_context *pipe, unsigned nr, void **sampler) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + unsigned unit; + + for (unit = 0; unit < nr; unit++) { + nvfx->tex_sampler[unit] = sampler[unit]; + nvfx->dirty_samplers |= (1 << unit); + } + + for (unit = nr; unit < nvfx->nr_samplers; unit++) { + nvfx->tex_sampler[unit] = NULL; + nvfx->dirty_samplers |= (1 << unit); + } + + nvfx->nr_samplers = nr; + nvfx->dirty |= NVFX_NEW_SAMPLER; +} + +static void +nvfx_sampler_state_delete(struct pipe_context *pipe, void *hwcso) +{ + FREE(hwcso); +} + +static void +nvfx_set_fragment_sampler_views(struct pipe_context *pipe, + unsigned nr, + struct pipe_sampler_view **views) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + unsigned unit; + + for (unit = 0; unit < nr; unit++) { + pipe_sampler_view_reference(&nvfx->fragment_sampler_views[unit], + views[unit]); + nvfx->dirty_samplers |= (1 << unit); + } + + for (unit = nr; unit < nvfx->nr_textures; unit++) { + pipe_sampler_view_reference(&nvfx->fragment_sampler_views[unit], + NULL); + nvfx->dirty_samplers |= (1 << unit); + } + + nvfx->nr_textures = nr; + nvfx->dirty |= NVFX_NEW_SAMPLER; +} + + +static struct pipe_sampler_view * +nvfx_create_sampler_view(struct pipe_context *pipe, + struct pipe_resource *texture, + const struct pipe_sampler_view *templ) +{ + struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view); + + if (view) { + *view = *templ; + view->reference.count = 1; + view->texture = NULL; + pipe_resource_reference(&view->texture, texture); + view->context = pipe; + } + + return view; +} + + +static void +nvfx_sampler_view_destroy(struct pipe_context *pipe, + struct pipe_sampler_view *view) +{ + pipe_resource_reference(&view->texture, NULL); + FREE(view); +} + +static void * +nvfx_rasterizer_state_create(struct pipe_context *pipe, + const struct pipe_rasterizer_state *cso) +{ + struct nvfx_rasterizer_state *rsso = CALLOC(1, sizeof(*rsso)); + struct nouveau_statebuf_builder sb = sb_init(rsso->sb); + + /*XXX: ignored: + * point_smooth -nohw + * multisample + */ + + sb_method(sb, NV34TCL_SHADE_MODEL, 1); + sb_data(sb, cso->flatshade ? NV34TCL_SHADE_MODEL_FLAT : + NV34TCL_SHADE_MODEL_SMOOTH); + + sb_method(sb, NV34TCL_VERTEX_TWO_SIDE_ENABLE, 1); + sb_data(sb, cso->light_twoside); + + sb_method(sb, NV34TCL_LINE_WIDTH, 2); + sb_data(sb, (unsigned char)(cso->line_width * 8.0) & 0xff); + sb_data(sb, cso->line_smooth ? 1 : 0); + sb_method(sb, NV34TCL_LINE_STIPPLE_ENABLE, 2); + sb_data(sb, cso->line_stipple_enable ? 1 : 0); + sb_data(sb, (cso->line_stipple_pattern << 16) | + cso->line_stipple_factor); + + sb_method(sb, NV34TCL_POINT_SIZE, 1); + sb_data(sb, fui(cso->point_size)); + + sb_method(sb, NV34TCL_POLYGON_MODE_FRONT, 6); + if (cso->front_winding == PIPE_WINDING_CCW) { + sb_data(sb, nvgl_polygon_mode(cso->fill_ccw)); + sb_data(sb, nvgl_polygon_mode(cso->fill_cw)); + switch (cso->cull_mode) { + case PIPE_WINDING_CCW: + sb_data(sb, NV34TCL_CULL_FACE_FRONT); + break; + case PIPE_WINDING_CW: + sb_data(sb, NV34TCL_CULL_FACE_BACK); + break; + case PIPE_WINDING_BOTH: + sb_data(sb, NV34TCL_CULL_FACE_FRONT_AND_BACK); + break; + default: + sb_data(sb, NV34TCL_CULL_FACE_BACK); + break; + } + sb_data(sb, NV34TCL_FRONT_FACE_CCW); + } else { + sb_data(sb, nvgl_polygon_mode(cso->fill_cw)); + sb_data(sb, nvgl_polygon_mode(cso->fill_ccw)); + switch (cso->cull_mode) { + case PIPE_WINDING_CCW: + sb_data(sb, NV34TCL_CULL_FACE_BACK); + break; + case PIPE_WINDING_CW: + sb_data(sb, NV34TCL_CULL_FACE_FRONT); + break; + case PIPE_WINDING_BOTH: + sb_data(sb, NV34TCL_CULL_FACE_FRONT_AND_BACK); + break; + default: + sb_data(sb, NV34TCL_CULL_FACE_BACK); + break; + } + sb_data(sb, NV34TCL_FRONT_FACE_CW); + } + sb_data(sb, cso->poly_smooth ? 1 : 0); + sb_data(sb, (cso->cull_mode != PIPE_WINDING_NONE) ? 1 : 0); + + sb_method(sb, NV34TCL_POLYGON_STIPPLE_ENABLE, 1); + sb_data(sb, cso->poly_stipple_enable ? 1 : 0); + + sb_method(sb, NV34TCL_POLYGON_OFFSET_POINT_ENABLE, 3); + if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_POINT) || + (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_POINT)) + sb_data(sb, 1); + else + sb_data(sb, 0); + if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_LINE) || + (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_LINE)) + sb_data(sb, 1); + else + sb_data(sb, 0); + if ((cso->offset_cw && cso->fill_cw == PIPE_POLYGON_MODE_FILL) || + (cso->offset_ccw && cso->fill_ccw == PIPE_POLYGON_MODE_FILL)) + sb_data(sb, 1); + else + sb_data(sb, 0); + if (cso->offset_cw || cso->offset_ccw) { + sb_method(sb, NV34TCL_POLYGON_OFFSET_FACTOR, 2); + sb_data(sb, fui(cso->offset_scale)); + sb_data(sb, fui(cso->offset_units * 2)); + } + + sb_method(sb, NV34TCL_POINT_SPRITE, 1); + if (cso->point_quad_rasterization) { + unsigned psctl = (1 << 0), i; + + for (i = 0; i < 8; i++) { + if ((cso->sprite_coord_enable >> i) & 1) + psctl |= (1 << (8 + i)); + } + + sb_data(sb, psctl); + } else { + sb_data(sb, 0); + } + + rsso->pipe = *cso; + rsso->sb_len = sb_len(sb, rsso->sb); + return (void *)rsso; +} + +static void +nvfx_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + if(nvfx->rasterizer && hwcso) + { + if(!nvfx->rasterizer || ((struct nvfx_rasterizer_state*)hwcso)->pipe.scissor + != nvfx->rasterizer->pipe.scissor) + { + nvfx->dirty |= NVFX_NEW_SCISSOR; + nvfx->draw_dirty |= NVFX_NEW_SCISSOR; + } + + if(((struct nvfx_rasterizer_state*)hwcso)->pipe.poly_stipple_enable + != nvfx->rasterizer->pipe.poly_stipple_enable) + { + nvfx->dirty |= NVFX_NEW_STIPPLE; + nvfx->draw_dirty |= NVFX_NEW_STIPPLE; + } + } + + nvfx->rasterizer = hwcso; + nvfx->dirty |= NVFX_NEW_RAST; + nvfx->draw_dirty |= NVFX_NEW_RAST; +} + +static void +nvfx_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_rasterizer_state *rsso = hwcso; + + FREE(rsso); +} + +static void * +nvfx_depth_stencil_alpha_state_create(struct pipe_context *pipe, + const struct pipe_depth_stencil_alpha_state *cso) +{ + struct nvfx_zsa_state *zsaso = CALLOC(1, sizeof(*zsaso)); + struct nouveau_statebuf_builder sb = sb_init(zsaso->sb); + + sb_method(sb, NV34TCL_DEPTH_FUNC, 3); + sb_data (sb, nvgl_comparison_op(cso->depth.func)); + sb_data (sb, cso->depth.writemask ? 1 : 0); + sb_data (sb, cso->depth.enabled ? 1 : 0); + + sb_method(sb, NV34TCL_ALPHA_FUNC_ENABLE, 3); + sb_data (sb, cso->alpha.enabled ? 1 : 0); + sb_data (sb, nvgl_comparison_op(cso->alpha.func)); + sb_data (sb, float_to_ubyte(cso->alpha.ref_value)); + + if (cso->stencil[0].enabled) { + sb_method(sb, NV34TCL_STENCIL_FRONT_ENABLE, 3); + sb_data (sb, cso->stencil[0].enabled ? 1 : 0); + sb_data (sb, cso->stencil[0].writemask); + sb_data (sb, nvgl_comparison_op(cso->stencil[0].func)); + sb_method(sb, NV34TCL_STENCIL_FRONT_FUNC_MASK, 4); + sb_data (sb, cso->stencil[0].valuemask); + sb_data (sb, nvgl_stencil_op(cso->stencil[0].fail_op)); + sb_data (sb, nvgl_stencil_op(cso->stencil[0].zfail_op)); + sb_data (sb, nvgl_stencil_op(cso->stencil[0].zpass_op)); + } else { + sb_method(sb, NV34TCL_STENCIL_FRONT_ENABLE, 1); + sb_data (sb, 0); + } + + if (cso->stencil[1].enabled) { + sb_method(sb, NV34TCL_STENCIL_BACK_ENABLE, 3); + sb_data (sb, cso->stencil[1].enabled ? 1 : 0); + sb_data (sb, cso->stencil[1].writemask); + sb_data (sb, nvgl_comparison_op(cso->stencil[1].func)); + sb_method(sb, NV34TCL_STENCIL_BACK_FUNC_MASK, 4); + sb_data (sb, cso->stencil[1].valuemask); + sb_data (sb, nvgl_stencil_op(cso->stencil[1].fail_op)); + sb_data (sb, nvgl_stencil_op(cso->stencil[1].zfail_op)); + sb_data (sb, nvgl_stencil_op(cso->stencil[1].zpass_op)); + } else { + sb_method(sb, NV34TCL_STENCIL_BACK_ENABLE, 1); + sb_data (sb, 0); + } + + zsaso->pipe = *cso; + zsaso->sb_len = sb_len(sb, zsaso->sb); + return (void *)zsaso; +} + +static void +nvfx_depth_stencil_alpha_state_bind(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->zsa = hwcso; + nvfx->dirty |= NVFX_NEW_ZSA; +} + +static void +nvfx_depth_stencil_alpha_state_delete(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_zsa_state *zsaso = hwcso; + + FREE(zsaso); +} + +static void * +nvfx_vp_state_create(struct pipe_context *pipe, + const struct pipe_shader_state *cso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_vertex_program *vp; + + vp = CALLOC(1, sizeof(struct nvfx_vertex_program)); + vp->pipe.tokens = tgsi_dup_tokens(cso->tokens); + vp->draw = draw_create_vertex_shader(nvfx->draw, &vp->pipe); + + return (void *)vp; +} + +static void +nvfx_vp_state_bind(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->vertprog = hwcso; + nvfx->dirty |= NVFX_NEW_VERTPROG; + nvfx->draw_dirty |= NVFX_NEW_VERTPROG; +} + +static void +nvfx_vp_state_delete(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_vertex_program *vp = hwcso; + + draw_delete_vertex_shader(nvfx->draw, vp->draw); + nvfx_vertprog_destroy(nvfx, vp); + FREE((void*)vp->pipe.tokens); + FREE(vp); +} + +static void * +nvfx_fp_state_create(struct pipe_context *pipe, + const struct pipe_shader_state *cso) +{ + struct nvfx_fragment_program *fp; + + fp = CALLOC(1, sizeof(struct nvfx_fragment_program)); + fp->pipe.tokens = tgsi_dup_tokens(cso->tokens); + + tgsi_scan_shader(fp->pipe.tokens, &fp->info); + + return (void *)fp; +} + +static void +nvfx_fp_state_bind(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->fragprog = hwcso; + nvfx->dirty |= NVFX_NEW_FRAGPROG; +} + +static void +nvfx_fp_state_delete(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_fragment_program *fp = hwcso; + + nvfx_fragprog_destroy(nvfx, fp); + FREE((void*)fp->pipe.tokens); + FREE(fp); +} + +static void +nvfx_set_blend_color(struct pipe_context *pipe, + const struct pipe_blend_color *bcol) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->blend_colour = *bcol; + nvfx->dirty |= NVFX_NEW_BCOL; +} + +static void +nvfx_set_stencil_ref(struct pipe_context *pipe, + const struct pipe_stencil_ref *sr) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->stencil_ref = *sr; + nvfx->dirty |= NVFX_NEW_SR; +} + +static void +nvfx_set_clip_state(struct pipe_context *pipe, + const struct pipe_clip_state *clip) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->clip = *clip; + nvfx->dirty |= NVFX_NEW_UCP; + nvfx->draw_dirty |= NVFX_NEW_UCP; +} + +static void +nvfx_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, + struct pipe_resource *buf ) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->constbuf[shader] = buf; + nvfx->constbuf_nr[shader] = buf->width0 / (4 * sizeof(float)); + + if (shader == PIPE_SHADER_VERTEX) { + nvfx->dirty |= NVFX_NEW_VERTCONST; + } else + if (shader == PIPE_SHADER_FRAGMENT) { + nvfx->dirty |= NVFX_NEW_FRAGCONST; + } +} + +static void +nvfx_set_framebuffer_state(struct pipe_context *pipe, + const struct pipe_framebuffer_state *fb) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->framebuffer = *fb; + nvfx->dirty |= NVFX_NEW_FB; +} + +static void +nvfx_set_polygon_stipple(struct pipe_context *pipe, + const struct pipe_poly_stipple *stipple) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + memcpy(nvfx->stipple, stipple->stipple, 4 * 32); + nvfx->dirty |= NVFX_NEW_STIPPLE; +} + +static void +nvfx_set_scissor_state(struct pipe_context *pipe, + const struct pipe_scissor_state *s) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->scissor = *s; + nvfx->dirty |= NVFX_NEW_SCISSOR; +} + +static void +nvfx_set_viewport_state(struct pipe_context *pipe, + const struct pipe_viewport_state *vpt) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->viewport = *vpt; + nvfx->dirty |= NVFX_NEW_VIEWPORT; + nvfx->draw_dirty |= NVFX_NEW_VIEWPORT; +} + +static void +nvfx_set_vertex_buffers(struct pipe_context *pipe, unsigned count, + const struct pipe_vertex_buffer *vb) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + memcpy(nvfx->vtxbuf, vb, sizeof(*vb) * count); + nvfx->vtxbuf_nr = count; + + nvfx->dirty |= NVFX_NEW_ARRAYS; + nvfx->draw_dirty |= NVFX_NEW_ARRAYS; +} + +static void * +nvfx_vtxelts_state_create(struct pipe_context *pipe, + unsigned num_elements, + const struct pipe_vertex_element *elements) +{ + struct nvfx_vtxelt_state *cso = CALLOC_STRUCT(nvfx_vtxelt_state); + + assert(num_elements < 16); /* not doing fallbacks yet */ + cso->num_elements = num_elements; + memcpy(cso->pipe, elements, num_elements * sizeof(*elements)); + +/* nvfx_vtxelt_construct(cso);*/ + + return (void *)cso; +} + +static void +nvfx_vtxelts_state_delete(struct pipe_context *pipe, void *hwcso) +{ + FREE(hwcso); +} + +static void +nvfx_vtxelts_state_bind(struct pipe_context *pipe, void *hwcso) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + + nvfx->vtxelt = hwcso; + nvfx->dirty |= NVFX_NEW_ARRAYS; + /*nvfx->draw_dirty |= NVFX_NEW_ARRAYS;*/ +} + +void +nvfx_init_state_functions(struct nvfx_context *nvfx) +{ + nvfx->pipe.create_blend_state = nvfx_blend_state_create; + nvfx->pipe.bind_blend_state = nvfx_blend_state_bind; + nvfx->pipe.delete_blend_state = nvfx_blend_state_delete; + + nvfx->pipe.create_sampler_state = nvfx_sampler_state_create; + nvfx->pipe.bind_fragment_sampler_states = nvfx_sampler_state_bind; + nvfx->pipe.delete_sampler_state = nvfx_sampler_state_delete; + nvfx->pipe.set_fragment_sampler_views = nvfx_set_fragment_sampler_views; + nvfx->pipe.create_sampler_view = nvfx_create_sampler_view; + nvfx->pipe.sampler_view_destroy = nvfx_sampler_view_destroy; + + nvfx->pipe.create_rasterizer_state = nvfx_rasterizer_state_create; + nvfx->pipe.bind_rasterizer_state = nvfx_rasterizer_state_bind; + nvfx->pipe.delete_rasterizer_state = nvfx_rasterizer_state_delete; + + nvfx->pipe.create_depth_stencil_alpha_state = + nvfx_depth_stencil_alpha_state_create; + nvfx->pipe.bind_depth_stencil_alpha_state = + nvfx_depth_stencil_alpha_state_bind; + nvfx->pipe.delete_depth_stencil_alpha_state = + nvfx_depth_stencil_alpha_state_delete; + + nvfx->pipe.create_vs_state = nvfx_vp_state_create; + nvfx->pipe.bind_vs_state = nvfx_vp_state_bind; + nvfx->pipe.delete_vs_state = nvfx_vp_state_delete; + + nvfx->pipe.create_fs_state = nvfx_fp_state_create; + nvfx->pipe.bind_fs_state = nvfx_fp_state_bind; + nvfx->pipe.delete_fs_state = nvfx_fp_state_delete; + + nvfx->pipe.set_blend_color = nvfx_set_blend_color; + nvfx->pipe.set_stencil_ref = nvfx_set_stencil_ref; + nvfx->pipe.set_clip_state = nvfx_set_clip_state; + nvfx->pipe.set_constant_buffer = nvfx_set_constant_buffer; + nvfx->pipe.set_framebuffer_state = nvfx_set_framebuffer_state; + nvfx->pipe.set_polygon_stipple = nvfx_set_polygon_stipple; + nvfx->pipe.set_scissor_state = nvfx_set_scissor_state; + nvfx->pipe.set_viewport_state = nvfx_set_viewport_state; + + nvfx->pipe.create_vertex_elements_state = nvfx_vtxelts_state_create; + nvfx->pipe.delete_vertex_elements_state = nvfx_vtxelts_state_delete; + nvfx->pipe.bind_vertex_elements_state = nvfx_vtxelts_state_bind; + + nvfx->pipe.set_vertex_buffers = nvfx_set_vertex_buffers; +} diff --git a/src/gallium/drivers/nv40/nv40_state.h b/src/gallium/drivers/nvfx/nvfx_state.h index 6436a232487..676d4fd34bb 100644 --- a/src/gallium/drivers/nv40/nv40_state.h +++ b/src/gallium/drivers/nvfx/nvfx_state.h @@ -1,30 +1,23 @@ -#ifndef __NV40_STATE_H__ -#define __NV40_STATE_H__ +#ifndef __NVFX_STATE_H__ +#define __NVFX_STATE_H__ #include "pipe/p_state.h" #include "pipe/p_video_state.h" #include "tgsi/tgsi_scan.h" +#include "nouveau/nouveau_statebuf.h" -struct nv40_sampler_state { - uint32_t fmt; - uint32_t wrap; - uint32_t en; - uint32_t filt; - uint32_t bcol; -}; - -struct nv40_vertex_program_exec { +struct nvfx_vertex_program_exec { uint32_t data[4]; boolean has_branch_offset; int const_index; }; -struct nv40_vertex_program_data { +struct nvfx_vertex_program_data { int index; /* immediates == -1 */ float value[4]; }; -struct nv40_vertex_program { +struct nvfx_vertex_program { struct pipe_shader_state pipe; struct draw_vertex_shader *draw; @@ -33,9 +26,9 @@ struct nv40_vertex_program { struct pipe_clip_state ucp; - struct nv40_vertex_program_exec *insns; + struct nvfx_vertex_program_exec *insns; unsigned nr_insns; - struct nv40_vertex_program_data *consts; + struct nvfx_vertex_program_data *consts; unsigned nr_consts; struct nouveau_resource *exec; @@ -47,15 +40,20 @@ struct nv40_vertex_program { uint32_t ir; uint32_t or; uint32_t clip_ctrl; - struct nouveau_stateobj *so; }; -struct nv40_fragment_program_data { +struct nvfx_fragment_program_data { unsigned offset; unsigned index; }; -struct nv40_fragment_program { +struct nvfx_fragment_program_bo { + struct nvfx_fragment_program_bo* next; + struct nouveau_bo* bo; + char insn[] __attribute__((aligned(16))); +}; + +struct nvfx_fragment_program { struct pipe_shader_state pipe; struct tgsi_shader_info info; @@ -65,26 +63,16 @@ struct nv40_fragment_program { uint32_t *insn; int insn_len; - struct nv40_fragment_program_data *consts; + struct nvfx_fragment_program_data *consts; unsigned nr_consts; - struct pipe_buffer *buffer; - uint32_t fp_control; - struct nouveau_stateobj *so; -}; - -struct nv40_miptree { - struct pipe_texture base; - struct nouveau_bo *bo; - struct pipe_buffer *buffer; - uint total_size; - - struct { - uint pitch; - uint *image_offset; - } level[PIPE_MAX_TEXTURE_LEVELS]; + unsigned bo_prog_idx; + unsigned prog_size; + unsigned progs_per_bo; + struct nvfx_fragment_program_bo* fpbo; }; + #endif diff --git a/src/gallium/drivers/nvfx/nvfx_state_blend.c b/src/gallium/drivers/nvfx/nvfx_state_blend.c new file mode 100644 index 00000000000..fe34e98364c --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state_blend.c @@ -0,0 +1,22 @@ +#include "nvfx_context.h" + +void +nvfx_state_blend_validate(struct nvfx_context *nvfx) +{ + struct nouveau_channel* chan = nvfx->screen->base.channel; + sb_emit(chan, nvfx->blend->sb, nvfx->blend->sb_len); +} + +void +nvfx_state_blend_colour_validate(struct nvfx_context *nvfx) +{ + struct nouveau_channel* chan = nvfx->screen->base.channel; + struct pipe_blend_color *bcol = &nvfx->blend_colour; + + WAIT_RING(chan, 2); + OUT_RING(chan, RING_3D(NV34TCL_BLEND_COLOR, 1)); + OUT_RING(chan, ((float_to_ubyte(bcol->color[3]) << 24) | + (float_to_ubyte(bcol->color[0]) << 16) | + (float_to_ubyte(bcol->color[1]) << 8) | + (float_to_ubyte(bcol->color[2]) << 0))); +} diff --git a/src/gallium/drivers/nvfx/nvfx_state_emit.c b/src/gallium/drivers/nvfx/nvfx_state_emit.c new file mode 100644 index 00000000000..f91ae19ecd3 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state_emit.c @@ -0,0 +1,180 @@ +#include "nvfx_context.h" +#include "nvfx_state.h" +#include "draw/draw_context.h" + +static boolean +nvfx_state_validate_common(struct nvfx_context *nvfx) +{ + struct nouveau_channel* chan = nvfx->screen->base.channel; + unsigned dirty = nvfx->dirty; + + if(nvfx != nvfx->screen->cur_ctx) + dirty = ~0; + + if(nvfx->render_mode == HW) + { + if(dirty & (NVFX_NEW_VERTPROG | NVFX_NEW_VERTCONST | NVFX_NEW_UCP)) + { + if(!nvfx_vertprog_validate(nvfx)) + return FALSE; + } + + if(dirty & (NVFX_NEW_ARRAYS)) + { + if(!nvfx_vbo_validate(nvfx)) + return FALSE; + } + } + else + { + /* TODO: this looks a bit misdesigned */ + if(dirty & (NVFX_NEW_VERTPROG | NVFX_NEW_UCP)) + nvfx_vertprog_validate(nvfx); + + if(dirty & (NVFX_NEW_ARRAYS | NVFX_NEW_FRAGPROG)) + nvfx_vtxfmt_validate(nvfx); + } + + if(dirty & NVFX_NEW_FB) + nvfx_state_framebuffer_validate(nvfx); + + if(dirty & NVFX_NEW_RAST) + sb_emit(chan, nvfx->rasterizer->sb, nvfx->rasterizer->sb_len); + + if(dirty & NVFX_NEW_SCISSOR) + nvfx_state_scissor_validate(nvfx); + + if(dirty & NVFX_NEW_STIPPLE) + nvfx_state_stipple_validate(nvfx); + + if(dirty & (NVFX_NEW_FRAGPROG | NVFX_NEW_FRAGCONST)) + nvfx_fragprog_validate(nvfx); + + if(dirty & NVFX_NEW_SAMPLER) + nvfx_fragtex_validate(nvfx); + + if(dirty & NVFX_NEW_BLEND) + sb_emit(chan, nvfx->blend->sb, nvfx->blend->sb_len); + + if(dirty & NVFX_NEW_BCOL) + nvfx_state_blend_colour_validate(nvfx); + + if(dirty & NVFX_NEW_ZSA) + sb_emit(chan, nvfx->zsa->sb, nvfx->zsa->sb_len); + + if(dirty & NVFX_NEW_SR) + nvfx_state_sr_validate(nvfx); + +/* Having this depend on FB looks wrong, but it seems + necessary to make this work on nv3x + TODO: find the right fix +*/ + if(dirty & (NVFX_NEW_VIEWPORT | NVFX_NEW_FB)) + nvfx_state_viewport_validate(nvfx); + + /* TODO: could nv30 need this or something similar too? */ + if((dirty & (NVFX_NEW_FRAGPROG | NVFX_NEW_SAMPLER)) && nvfx->is_nv4x) { + WAIT_RING(chan, 4); + OUT_RING(chan, RING_3D(NV40TCL_TEX_CACHE_CTL, 1)); + OUT_RING(chan, 2); + OUT_RING(chan, RING_3D(NV40TCL_TEX_CACHE_CTL, 1)); + OUT_RING(chan, 1); + } + nvfx->dirty = 0; + return TRUE; +} + +void +nvfx_state_emit(struct nvfx_context *nvfx) +{ + struct nouveau_channel* chan = nvfx->screen->base.channel; + /* we need to ensure there is enough space to output relocations in one go */ + unsigned max_relocs = 0 + + 16 /* vertex buffers, incl. dma flag */ + + 2 /* index buffer plus format+dma flag */ + + 2 * 5 /* 4 cbufs + zsbuf, plus dma objects */ + + 2 * 16 /* fragment textures plus format+dma flag */ + + 2 * 4 /* vertex textures plus format+dma flag */ + + 1 /* fragprog incl dma flag */ + ; + MARK_RING(chan, max_relocs * 2, max_relocs * 2); + nvfx_state_relocate(nvfx); +} + +void +nvfx_state_relocate(struct nvfx_context *nvfx) +{ + nvfx_framebuffer_relocate(nvfx); + nvfx_fragtex_relocate(nvfx); + nvfx_fragprog_relocate(nvfx); + if (nvfx->render_mode == HW) + nvfx_vbo_relocate(nvfx); +} + +boolean +nvfx_state_validate(struct nvfx_context *nvfx) +{ + boolean was_sw = nvfx->fallback_swtnl ? TRUE : FALSE; + + if (nvfx->render_mode != HW) { + /* Don't even bother trying to go back to hw if none + * of the states that caused swtnl previously have changed. + */ + if ((nvfx->fallback_swtnl & nvfx->dirty) + != nvfx->fallback_swtnl) + return FALSE; + + /* Attempt to go to hwtnl again */ + nvfx->dirty |= (NVFX_NEW_VIEWPORT | + NVFX_NEW_VERTPROG | + NVFX_NEW_ARRAYS); + nvfx->render_mode = HW; + } + + if(!nvfx_state_validate_common(nvfx)) + return FALSE; + + if (was_sw) + NOUVEAU_ERR("swtnl->hw\n"); + + return TRUE; +} + +boolean +nvfx_state_validate_swtnl(struct nvfx_context *nvfx) +{ + struct draw_context *draw = nvfx->draw; + + /* Setup for swtnl */ + if (nvfx->render_mode == HW) { + NOUVEAU_ERR("hw->swtnl 0x%08x\n", nvfx->fallback_swtnl); + nvfx->pipe.flush(&nvfx->pipe, 0, NULL); + nvfx->dirty |= (NVFX_NEW_VIEWPORT | + NVFX_NEW_VERTPROG | + NVFX_NEW_ARRAYS); + nvfx->render_mode = SWTNL; + } + + if (nvfx->draw_dirty & NVFX_NEW_VERTPROG) + draw_bind_vertex_shader(draw, nvfx->vertprog->draw); + + if (nvfx->draw_dirty & NVFX_NEW_RAST) + draw_set_rasterizer_state(draw, &nvfx->rasterizer->pipe, + nvfx->rasterizer); + + if (nvfx->draw_dirty & NVFX_NEW_UCP) + draw_set_clip_state(draw, &nvfx->clip); + + if (nvfx->draw_dirty & NVFX_NEW_VIEWPORT) + draw_set_viewport_state(draw, &nvfx->viewport); + + if (nvfx->draw_dirty & NVFX_NEW_ARRAYS) { + draw_set_vertex_buffers(draw, nvfx->vtxbuf_nr, nvfx->vtxbuf); + draw_set_vertex_elements(draw, nvfx->vtxelt->num_elements, nvfx->vtxelt->pipe); + } + + nvfx_state_validate_common(nvfx); + + nvfx->draw_dirty = 0; + return TRUE; +} diff --git a/src/gallium/drivers/nvfx/nvfx_state_fb.c b/src/gallium/drivers/nvfx/nvfx_state_fb.c new file mode 100644 index 00000000000..360e569f77c --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state_fb.c @@ -0,0 +1,250 @@ +#include "nvfx_context.h" +#include "nvfx_resource.h" +#include "nouveau/nouveau_util.h" + + + +void +nvfx_state_framebuffer_validate(struct nvfx_context *nvfx) +{ + struct pipe_framebuffer_state *fb = &nvfx->framebuffer; + struct nouveau_channel *chan = nvfx->screen->base.channel; + uint32_t rt_enable = 0, rt_format = 0; + int i, colour_format = 0, zeta_format = 0; + int depth_only = 0; + unsigned rt_flags = NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM; + unsigned w = fb->width; + unsigned h = fb->height; + int colour_bits = 32, zeta_bits = 32; + + if(!nvfx->is_nv4x) + assert(fb->nr_cbufs <= 2); + else + assert(fb->nr_cbufs <= 4); + + for (i = 0; i < fb->nr_cbufs; i++) { + if (colour_format) + assert(colour_format == fb->cbufs[i]->format); + else + colour_format = fb->cbufs[i]->format; + + rt_enable |= (NV34TCL_RT_ENABLE_COLOR0 << i); + nvfx->hw_rt[i].bo = nvfx_surface_buffer(fb->cbufs[i]); + nvfx->hw_rt[i].offset = fb->cbufs[i]->offset; + nvfx->hw_rt[i].pitch = ((struct nv04_surface *)fb->cbufs[i])->pitch; + } + for(; i < 4; ++i) + nvfx->hw_rt[i].bo = 0; + + if (rt_enable & (NV34TCL_RT_ENABLE_COLOR1 | + NV40TCL_RT_ENABLE_COLOR2 | NV40TCL_RT_ENABLE_COLOR3)) + rt_enable |= NV34TCL_RT_ENABLE_MRT; + + if (fb->zsbuf) { + zeta_format = fb->zsbuf->format; + nvfx->hw_zeta.bo = nvfx_surface_buffer(fb->zsbuf); + nvfx->hw_zeta.offset = fb->zsbuf->offset; + nvfx->hw_zeta.pitch = ((struct nv04_surface *)fb->zsbuf)->pitch; + } + else + nvfx->hw_zeta.bo = 0; + + if (rt_enable & (NV34TCL_RT_ENABLE_COLOR0 | NV34TCL_RT_ENABLE_COLOR1 | + NV40TCL_RT_ENABLE_COLOR2 | NV40TCL_RT_ENABLE_COLOR3)) { + /* Render to at least a colour buffer */ + if (!(fb->cbufs[0]->texture->flags & NVFX_RESOURCE_FLAG_LINEAR)) { + assert(!(fb->width & (fb->width - 1)) && !(fb->height & (fb->height - 1))); + for (i = 1; i < fb->nr_cbufs; i++) + assert(!(fb->cbufs[i]->texture->flags & NVFX_RESOURCE_FLAG_LINEAR)); + + rt_format = NV34TCL_RT_FORMAT_TYPE_SWIZZLED | + (log2i(fb->cbufs[0]->width) << NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT) | + (log2i(fb->cbufs[0]->height) << NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT); + } + else + rt_format = NV34TCL_RT_FORMAT_TYPE_LINEAR; + } else if (fb->zsbuf) { + depth_only = 1; + + /* Render to depth buffer only */ + if (!(fb->zsbuf->texture->usage & NVFX_RESOURCE_FLAG_LINEAR)) { + assert(!(fb->width & (fb->width - 1)) && !(fb->height & (fb->height - 1))); + + rt_format = NV34TCL_RT_FORMAT_TYPE_SWIZZLED | + (log2i(fb->zsbuf->width) << NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT) | + (log2i(fb->zsbuf->height) << NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT); + } + else + rt_format = NV34TCL_RT_FORMAT_TYPE_LINEAR; + } else { + return; + } + + switch (colour_format) { + case PIPE_FORMAT_B8G8R8X8_UNORM: + rt_format |= NV34TCL_RT_FORMAT_COLOR_X8R8G8B8; + break; + case PIPE_FORMAT_B8G8R8A8_UNORM: + case 0: + rt_format |= NV34TCL_RT_FORMAT_COLOR_A8R8G8B8; + break; + case PIPE_FORMAT_B5G6R5_UNORM: + rt_format |= NV34TCL_RT_FORMAT_COLOR_R5G6B5; + colour_bits = 16; + break; + default: + assert(0); + } + + switch (zeta_format) { + case PIPE_FORMAT_Z16_UNORM: + rt_format |= NV34TCL_RT_FORMAT_ZETA_Z16; + zeta_bits = 16; + break; + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: + case PIPE_FORMAT_X8Z24_UNORM: + case 0: + rt_format |= NV34TCL_RT_FORMAT_ZETA_Z24S8; + break; + default: + assert(0); + } + + if ((!nvfx->is_nv4x) && colour_bits > zeta_bits) { + /* TODO: does this limitation really exist? + TODO: can it be worked around somehow? */ + assert(0); + } + + if ((rt_enable & NV34TCL_RT_ENABLE_COLOR0) + || ((!nvfx->is_nv4x) && depth_only)) { + struct nvfx_render_target *rt0 = (depth_only ? &nvfx->hw_zeta : &nvfx->hw_rt[0]); + uint32_t pitch = rt0->pitch; + + if(!nvfx->is_nv4x) + { + if (nvfx->hw_zeta.bo) { + pitch |= (nvfx->hw_zeta.pitch << 16); + } else { + pitch |= (pitch << 16); + } + } + + OUT_RING(chan, RING_3D(NV34TCL_DMA_COLOR0, 1)); + OUT_RELOC(chan, rt0->bo, 0, + rt_flags | NOUVEAU_BO_OR, + chan->vram->handle, chan->gart->handle); + OUT_RING(chan, RING_3D(NV34TCL_COLOR0_PITCH, 2)); + OUT_RING(chan, pitch); + OUT_RELOC(chan, rt0->bo, + rt0->offset, rt_flags | NOUVEAU_BO_LOW, + 0, 0); + } + + if (rt_enable & NV34TCL_RT_ENABLE_COLOR1) { + OUT_RING(chan, RING_3D(NV34TCL_DMA_COLOR1, 1)); + OUT_RELOC(chan, nvfx->hw_rt[1].bo, 0, + rt_flags | NOUVEAU_BO_OR, + chan->vram->handle, chan->gart->handle); + OUT_RING(chan, RING_3D(NV34TCL_COLOR1_OFFSET, 2)); + OUT_RELOC(chan, nvfx->hw_rt[1].bo, + nvfx->hw_rt[1].offset, rt_flags | NOUVEAU_BO_LOW, + 0, 0); + OUT_RING(chan, nvfx->hw_rt[1].pitch); + } + + if(nvfx->is_nv4x) + { + if (rt_enable & NV40TCL_RT_ENABLE_COLOR2) { + OUT_RING(chan, RING_3D(NV40TCL_DMA_COLOR2, 1)); + OUT_RELOC(chan, nvfx->hw_rt[2].bo, 0, + rt_flags | NOUVEAU_BO_OR, + chan->vram->handle, chan->gart->handle); + OUT_RING(chan, RING_3D(NV40TCL_COLOR2_OFFSET, 1)); + OUT_RELOC(chan, nvfx->hw_rt[2].bo, + nvfx->hw_rt[2].offset, rt_flags | NOUVEAU_BO_LOW, + 0, 0); + OUT_RING(chan, RING_3D(NV40TCL_COLOR2_PITCH, 1)); + OUT_RING(chan, nvfx->hw_rt[2].pitch); + } + + if (rt_enable & NV40TCL_RT_ENABLE_COLOR3) { + OUT_RING(chan, RING_3D(NV40TCL_DMA_COLOR3, 1)); + OUT_RELOC(chan, nvfx->hw_rt[3].bo, 0, + rt_flags | NOUVEAU_BO_OR, + chan->vram->handle, chan->gart->handle); + OUT_RING(chan, RING_3D(NV40TCL_COLOR3_OFFSET, 1)); + OUT_RELOC(chan, nvfx->hw_rt[3].bo, + nvfx->hw_rt[3].offset, rt_flags | NOUVEAU_BO_LOW, + 0, 0); + OUT_RING(chan, RING_3D(NV40TCL_COLOR3_PITCH, 1)); + OUT_RING(chan, nvfx->hw_rt[3].pitch); + } + } + + if (zeta_format) { + OUT_RING(chan, RING_3D(NV34TCL_DMA_ZETA, 1)); + OUT_RELOC(chan, nvfx->hw_zeta.bo, 0, + rt_flags | NOUVEAU_BO_OR, + chan->vram->handle, chan->gart->handle); + OUT_RING(chan, RING_3D(NV34TCL_ZETA_OFFSET, 1)); + /* TODO: reverse engineer LMA */ + OUT_RELOC(chan, nvfx->hw_zeta.bo, + nvfx->hw_zeta.offset, rt_flags | NOUVEAU_BO_LOW, 0, 0); + if(nvfx->is_nv4x) { + OUT_RING(chan, RING_3D(NV40TCL_ZETA_PITCH, 1)); + OUT_RING(chan, nvfx->hw_zeta.pitch); + } + } + + OUT_RING(chan, RING_3D(NV34TCL_RT_ENABLE, 1)); + OUT_RING(chan, rt_enable); + OUT_RING(chan, RING_3D(NV34TCL_RT_HORIZ, 3)); + OUT_RING(chan, (w << 16) | 0); + OUT_RING(chan, (h << 16) | 0); + OUT_RING(chan, rt_format); + OUT_RING(chan, RING_3D(NV34TCL_VIEWPORT_HORIZ, 2)); + OUT_RING(chan, (w << 16) | 0); + OUT_RING(chan, (h << 16) | 0); + OUT_RING(chan, RING_3D(NV34TCL_VIEWPORT_CLIP_HORIZ(0), 2)); + OUT_RING(chan, ((w - 1) << 16) | 0); + OUT_RING(chan, ((h - 1) << 16) | 0); + OUT_RING(chan, RING_3D(0x1d88, 1)); + OUT_RING(chan, (1 << 12) | h); + + if(!nvfx->is_nv4x) { + /* Wonder why this is needed, context should all be set to zero on init */ + /* TODO: we can most likely remove this, after putting it in context init */ + OUT_RING(chan, RING_3D(NV34TCL_VIEWPORT_TX_ORIGIN, 1)); + OUT_RING(chan, 0); + } +} + +void +nvfx_framebuffer_relocate(struct nvfx_context *nvfx) +{ + struct nouveau_channel *chan = nvfx->screen->base.channel; + unsigned rt_flags = NOUVEAU_BO_RDWR | NOUVEAU_BO_VRAM; + rt_flags |= NOUVEAU_BO_DUMMY; + MARK_RING(chan, 20, 20); + +#define DO_(var, pfx, name) \ + if(var.bo) { \ + OUT_RELOC(chan, var.bo, RING_3D(pfx##TCL_DMA_##name, 1), rt_flags, 0, 0); \ + OUT_RELOC(chan, var.bo, 0, \ + rt_flags | NOUVEAU_BO_OR, \ + chan->vram->handle, chan->gart->handle); \ + OUT_RELOC(chan, var.bo, RING_3D(pfx##TCL_##name##_OFFSET, 1), rt_flags, 0, 0); \ + OUT_RELOC(chan, var.bo, \ + var.offset, rt_flags | NOUVEAU_BO_LOW, \ + 0, 0); \ + } + +#define DO(pfx, num) DO_(nvfx->hw_rt[num], pfx, COLOR##num) + DO(NV34, 0); + DO(NV34, 1); + DO(NV40, 2); + DO(NV40, 3); + + DO_(nvfx->hw_zeta, NV34, ZETA); +} diff --git a/src/gallium/drivers/nvfx/nvfx_state_rasterizer.c b/src/gallium/drivers/nvfx/nvfx_state_rasterizer.c new file mode 100644 index 00000000000..7f14ae85d5a --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state_rasterizer.c @@ -0,0 +1,9 @@ +#include "nvfx_context.h" + +void +nvfx_state_rasterizer_validate(struct nvfx_context *nvfx) +{ + struct nouveau_channel* chan = nvfx->screen->base.channel; + sb_emit(chan, nvfx->rasterizer->sb, nvfx->rasterizer->sb_len); +} + diff --git a/src/gallium/drivers/nvfx/nvfx_state_scissor.c b/src/gallium/drivers/nvfx/nvfx_state_scissor.c new file mode 100644 index 00000000000..9077266120a --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state_scissor.c @@ -0,0 +1,23 @@ +#include "nvfx_context.h" + +void +nvfx_state_scissor_validate(struct nvfx_context *nvfx) +{ + struct nouveau_channel *chan = nvfx->screen->base.channel; + struct pipe_rasterizer_state *rast = &nvfx->rasterizer->pipe; + struct pipe_scissor_state *s = &nvfx->scissor; + + if ((rast->scissor == 0 && nvfx->state.scissor_enabled == 0)) + return; + nvfx->state.scissor_enabled = rast->scissor; + + WAIT_RING(chan, 3); + OUT_RING(chan, RING_3D(NV34TCL_SCISSOR_HORIZ, 2)); + if (nvfx->state.scissor_enabled) { + OUT_RING(chan, ((s->maxx - s->minx) << 16) | s->minx); + OUT_RING(chan, ((s->maxy - s->miny) << 16) | s->miny); + } else { + OUT_RING(chan, 4096 << 16); + OUT_RING(chan, 4096 << 16); + } +} diff --git a/src/gallium/drivers/nvfx/nvfx_state_stipple.c b/src/gallium/drivers/nvfx/nvfx_state_stipple.c new file mode 100644 index 00000000000..4da968f093f --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state_stipple.c @@ -0,0 +1,26 @@ +#include "nvfx_context.h" + +void +nvfx_state_stipple_validate(struct nvfx_context *nvfx) +{ + struct nouveau_channel *chan = nvfx->screen->base.channel; + struct pipe_rasterizer_state *rast = &nvfx->rasterizer->pipe; + + if ((rast->poly_stipple_enable == 0 && nvfx->state.stipple_enabled == 0)) + return; + + if (rast->poly_stipple_enable) { + unsigned i; + + WAIT_RING(chan, 35); + OUT_RING(chan, RING_3D(NV34TCL_POLYGON_STIPPLE_ENABLE, 1)); + OUT_RING(chan, 1); + OUT_RING(chan, RING_3D(NV34TCL_POLYGON_STIPPLE_PATTERN(0), 32)); + for (i = 0; i < 32; i++) + OUT_RING(chan, nvfx->stipple[i]); + } else { + WAIT_RING(chan, 2); + OUT_RING(chan, RING_3D(NV34TCL_POLYGON_STIPPLE_ENABLE, 1)); + OUT_RING(chan, 0); + } +} diff --git a/src/gallium/drivers/nvfx/nvfx_state_viewport.c b/src/gallium/drivers/nvfx/nvfx_state_viewport.c new file mode 100644 index 00000000000..e983b16f321 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state_viewport.c @@ -0,0 +1,35 @@ +#include "nvfx_context.h" + +void +nvfx_state_viewport_validate(struct nvfx_context *nvfx) +{ + struct nouveau_channel *chan = nvfx->screen->base.channel; + struct pipe_viewport_state *vpt = &nvfx->viewport; + + WAIT_RING(chan, 11); + if(nvfx->render_mode == HW) { + OUT_RING(chan, RING_3D(NV34TCL_VIEWPORT_TRANSLATE_X, 8)); + OUT_RINGf(chan, vpt->translate[0]); + OUT_RINGf(chan, vpt->translate[1]); + OUT_RINGf(chan, vpt->translate[2]); + OUT_RINGf(chan, vpt->translate[3]); + OUT_RINGf(chan, vpt->scale[0]); + OUT_RINGf(chan, vpt->scale[1]); + OUT_RINGf(chan, vpt->scale[2]); + OUT_RINGf(chan, vpt->scale[3]); + OUT_RING(chan, RING_3D(0x1d78, 1)); + OUT_RING(chan, 1); + } else { + OUT_RING(chan, RING_3D(NV34TCL_VIEWPORT_TRANSLATE_X, 8)); + OUT_RINGf(chan, 0.0f); + OUT_RINGf(chan, 0.0f); + OUT_RINGf(chan, 0.0f); + OUT_RINGf(chan, 0.0f); + OUT_RINGf(chan, 1.0f); + OUT_RINGf(chan, 1.0f); + OUT_RINGf(chan, 1.0f); + OUT_RINGf(chan, 1.0f); + OUT_RING(chan, RING_3D(0x1d78, 1)); + OUT_RING(chan, nvfx->is_nv4x ? 0x110 : 1); + } +} diff --git a/src/gallium/drivers/nvfx/nvfx_state_zsa.c b/src/gallium/drivers/nvfx/nvfx_state_zsa.c new file mode 100644 index 00000000000..608605d32bd --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_state_zsa.c @@ -0,0 +1,21 @@ +#include "nvfx_context.h" + +void +nvfx_state_zsa_validate(struct nvfx_context *nvfx) +{ + struct nouveau_channel* chan = nvfx->screen->base.channel; + sb_emit(chan, nvfx->zsa->sb, nvfx->zsa->sb_len); +} + +void +nvfx_state_sr_validate(struct nvfx_context *nvfx) +{ + struct nouveau_channel* chan = nvfx->screen->base.channel; + struct pipe_stencil_ref *sr = &nvfx->stencil_ref; + + WAIT_RING(chan, 4); + OUT_RING(chan, RING_3D(NV34TCL_STENCIL_FRONT_FUNC_REF, 1)); + OUT_RING(chan, sr->ref_value[0]); + OUT_RING(chan, RING_3D(NV34TCL_STENCIL_BACK_FUNC_REF, 1)); + OUT_RING(chan, sr->ref_value[1]); +} diff --git a/src/gallium/drivers/nv30/nv30_surface.c b/src/gallium/drivers/nvfx/nvfx_surface.c index bc18e577eee..2e115650aeb 100644 --- a/src/gallium/drivers/nv30/nv30_surface.c +++ b/src/gallium/drivers/nvfx/nvfx_surface.c @@ -1,9 +1,9 @@ /************************************************************************** - * + * * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. - * + * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including @@ -11,11 +11,11 @@ * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: - * + * * The above copyright notice and this permission notice (including the * next paragraph) shall be included in all copies or substantial portions * of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. @@ -23,40 +23,39 @@ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * + * **************************************************************************/ -#include "nv30_context.h" +#include "nvfx_context.h" #include "pipe/p_defines.h" #include "util/u_inlines.h" -#include "util/u_tile.h" static void -nv30_surface_copy(struct pipe_context *pipe, +nvfx_surface_copy(struct pipe_context *pipe, struct pipe_surface *dest, unsigned destx, unsigned desty, struct pipe_surface *src, unsigned srcx, unsigned srcy, unsigned width, unsigned height) { - struct nv30_context *nv30 = nv30_context(pipe); - struct nv04_surface_2d *eng2d = nv30->screen->eng2d; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nv04_surface_2d *eng2d = nvfx->screen->eng2d; eng2d->copy(eng2d, dest, destx, desty, src, srcx, srcy, width, height); } static void -nv30_surface_fill(struct pipe_context *pipe, struct pipe_surface *dest, +nvfx_surface_fill(struct pipe_context *pipe, struct pipe_surface *dest, unsigned destx, unsigned desty, unsigned width, unsigned height, unsigned value) { - struct nv30_context *nv30 = nv30_context(pipe); - struct nv04_surface_2d *eng2d = nv30->screen->eng2d; + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nv04_surface_2d *eng2d = nvfx->screen->eng2d; eng2d->fill(eng2d, dest, destx, desty, width, height, value); } void -nv30_init_surface_functions(struct nv30_context *nv30) +nvfx_init_surface_functions(struct nvfx_context *nvfx) { - nv30->pipe.surface_copy = nv30_surface_copy; - nv30->pipe.surface_fill = nv30_surface_fill; + nvfx->pipe.surface_copy = nvfx_surface_copy; + nvfx->pipe.surface_fill = nvfx_surface_fill; } diff --git a/src/gallium/drivers/nvfx/nvfx_tex.h b/src/gallium/drivers/nvfx/nvfx_tex.h new file mode 100644 index 00000000000..69187a79e79 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_tex.h @@ -0,0 +1,133 @@ +#ifndef NVFX_TEX_H_ +#define NVFX_TEX_H_ + +static inline unsigned +nvfx_tex_wrap_mode(unsigned wrap) { + unsigned ret; + + switch (wrap) { + case PIPE_TEX_WRAP_REPEAT: + ret = NV34TCL_TX_WRAP_S_REPEAT; + break; + case PIPE_TEX_WRAP_MIRROR_REPEAT: + ret = NV34TCL_TX_WRAP_S_MIRRORED_REPEAT; + break; + case PIPE_TEX_WRAP_CLAMP_TO_EDGE: + ret = NV34TCL_TX_WRAP_S_CLAMP_TO_EDGE; + break; + case PIPE_TEX_WRAP_CLAMP_TO_BORDER: + ret = NV34TCL_TX_WRAP_S_CLAMP_TO_BORDER; + break; + case PIPE_TEX_WRAP_CLAMP: + ret = NV34TCL_TX_WRAP_S_CLAMP; + break; + case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: + ret = NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_EDGE; + break; + case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: + ret = NV40TCL_TEX_WRAP_S_MIRROR_CLAMP_TO_BORDER; + break; + case PIPE_TEX_WRAP_MIRROR_CLAMP: + ret = NV40TCL_TEX_WRAP_S_MIRROR_CLAMP; + break; + default: + NOUVEAU_ERR("unknown wrap mode: %d\n", wrap); + ret = NV34TCL_TX_WRAP_S_REPEAT; + break; + } + + return ret >> NV34TCL_TX_WRAP_S_SHIFT; +} + +static inline unsigned +nvfx_tex_wrap_compare_mode(const struct pipe_sampler_state* cso) +{ + if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) { + switch (cso->compare_func) { + case PIPE_FUNC_NEVER: + return NV34TCL_TX_WRAP_RCOMP_NEVER; + case PIPE_FUNC_GREATER: + return NV34TCL_TX_WRAP_RCOMP_GREATER; + case PIPE_FUNC_EQUAL: + return NV34TCL_TX_WRAP_RCOMP_EQUAL; + case PIPE_FUNC_GEQUAL: + return NV34TCL_TX_WRAP_RCOMP_GEQUAL; + case PIPE_FUNC_LESS: + return NV34TCL_TX_WRAP_RCOMP_LESS; + case PIPE_FUNC_NOTEQUAL: + return NV34TCL_TX_WRAP_RCOMP_NOTEQUAL; + case PIPE_FUNC_LEQUAL: + return NV34TCL_TX_WRAP_RCOMP_LEQUAL; + case PIPE_FUNC_ALWAYS: + return NV34TCL_TX_WRAP_RCOMP_ALWAYS; + default: + break; + } + } + return 0; +} + +static inline unsigned nvfx_tex_filter(const struct pipe_sampler_state* cso) +{ + unsigned filter = 0; + switch (cso->mag_img_filter) { + case PIPE_TEX_FILTER_LINEAR: + filter |= NV34TCL_TX_FILTER_MAGNIFY_LINEAR; + break; + case PIPE_TEX_FILTER_NEAREST: + default: + filter |= NV34TCL_TX_FILTER_MAGNIFY_NEAREST; + break; + } + + switch (cso->min_img_filter) { + case PIPE_TEX_FILTER_LINEAR: + switch (cso->min_mip_filter) { + case PIPE_TEX_MIPFILTER_NEAREST: + filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST; + break; + case PIPE_TEX_MIPFILTER_LINEAR: + filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR; + break; + case PIPE_TEX_MIPFILTER_NONE: + default: + filter |= NV34TCL_TX_FILTER_MINIFY_LINEAR; + break; + } + break; + case PIPE_TEX_FILTER_NEAREST: + default: + switch (cso->min_mip_filter) { + case PIPE_TEX_MIPFILTER_NEAREST: + filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST; + break; + case PIPE_TEX_MIPFILTER_LINEAR: + filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR; + break; + case PIPE_TEX_MIPFILTER_NONE: + default: + filter |= NV34TCL_TX_FILTER_MINIFY_NEAREST; + break; + } + break; + } + return filter; +} + +static inline unsigned nvfx_tex_border_color(const float* border_color) +{ + return ((float_to_ubyte(border_color[3]) << 24) | + (float_to_ubyte(border_color[0]) << 16) | + (float_to_ubyte(border_color[1]) << 8) | + (float_to_ubyte(border_color[2]) << 0)); +} + +struct nvfx_sampler_state { + uint32_t fmt; + uint32_t wrap; + uint32_t en; + uint32_t filt; + uint32_t bcol; +}; + +#endif /* NVFX_TEX_H_ */ diff --git a/src/gallium/drivers/nvfx/nvfx_transfer.c b/src/gallium/drivers/nvfx/nvfx_transfer.c new file mode 100644 index 00000000000..b2ef27cf579 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_transfer.c @@ -0,0 +1,205 @@ +#include "pipe/p_state.h" +#include "pipe/p_defines.h" +#include "util/u_inlines.h" +#include "util/u_format.h" +#include "util/u_memory.h" +#include "util/u_math.h" +#include "nouveau/nouveau_winsys.h" +#include "nvfx_context.h" +#include "nvfx_screen.h" +#include "nvfx_state.h" +#include "nvfx_resource.h" +#include "nvfx_transfer.h" + +struct nvfx_transfer { + struct pipe_transfer base; + struct pipe_surface *surface; + boolean direct; +}; + +static void +nvfx_compatible_transfer_tex(struct pipe_resource *pt, unsigned width, unsigned height, + unsigned bind, + struct pipe_resource *template) +{ + memset(template, 0, sizeof(struct pipe_resource)); + template->target = pt->target; + template->format = pt->format; + template->width0 = width; + template->height0 = height; + template->depth0 = 1; + template->last_level = 0; + template->nr_samples = pt->nr_samples; + template->bind = bind; + template->usage = PIPE_USAGE_DYNAMIC; + template->flags = NVFX_RESOURCE_FLAG_LINEAR; +} + + +static unsigned nvfx_transfer_bind_flags( unsigned transfer_usage ) +{ + unsigned bind = 0; + + if (transfer_usage & PIPE_TRANSFER_WRITE) + bind |= PIPE_BIND_BLIT_SOURCE; + + if (transfer_usage & PIPE_TRANSFER_READ) + bind |= PIPE_BIND_BLIT_DESTINATION; + + return bind; +} + +struct pipe_transfer * +nvfx_miptree_transfer_new(struct pipe_context *pipe, + struct pipe_resource *pt, + struct pipe_subresource sr, + unsigned usage, + const struct pipe_box *box) +{ + struct pipe_screen *pscreen = pipe->screen; + struct nvfx_miptree *mt = (struct nvfx_miptree *)pt; + struct nvfx_transfer *tx; + struct pipe_resource tx_tex_template, *tx_tex; + static int no_transfer = -1; + unsigned bind = nvfx_transfer_bind_flags(usage); + if(no_transfer < 0) + no_transfer = debug_get_bool_option("NOUVEAU_NO_TRANSFER", FALSE); + + + tx = CALLOC_STRUCT(nvfx_transfer); + if (!tx) + return NULL; + + /* Don't handle 3D transfers yet. + */ + assert(box->depth == 1); + + pipe_resource_reference(&tx->base.resource, pt); + tx->base.sr = sr; + tx->base.usage = usage; + tx->base.box = *box; + tx->base.stride = mt->level[sr.level].pitch; + + /* Direct access to texture */ + if ((pt->usage == PIPE_USAGE_DYNAMIC || + no_transfer) && + pt->flags & NVFX_RESOURCE_FLAG_LINEAR) + { + tx->direct = true; + + /* XXX: just call the internal nvfx function. + */ + tx->surface = pscreen->get_tex_surface(pscreen, pt, + sr.face, sr.level, + box->z, + bind); + return &tx->base; + } + + tx->direct = false; + + nvfx_compatible_transfer_tex(pt, box->width, box->height, bind, &tx_tex_template); + + tx_tex = pscreen->resource_create(pscreen, &tx_tex_template); + if (!tx_tex) + { + FREE(tx); + return NULL; + } + + tx->base.stride = ((struct nvfx_miptree*)tx_tex)->level[0].pitch; + + tx->surface = pscreen->get_tex_surface(pscreen, tx_tex, + 0, 0, 0, + bind); + + pipe_resource_reference(&tx_tex, NULL); + + if (!tx->surface) + { + pipe_surface_reference(&tx->surface, NULL); + FREE(tx); + return NULL; + } + + if (usage & PIPE_TRANSFER_READ) { + struct nvfx_screen *nvscreen = nvfx_screen(pscreen); + struct pipe_surface *src; + + src = pscreen->get_tex_surface(pscreen, pt, + sr.face, sr.level, box->z, + PIPE_BIND_BLIT_SOURCE); + + /* TODO: Check if SIFM can deal with x,y,w,h when swizzling */ + /* TODO: Check if SIFM can un-swizzle */ + nvscreen->eng2d->copy(nvscreen->eng2d, + tx->surface, 0, 0, + src, + box->x, box->y, + box->width, box->height); + + pipe_surface_reference(&src, NULL); + } + + return &tx->base; +} + +void +nvfx_miptree_transfer_del(struct pipe_context *pipe, + struct pipe_transfer *ptx) +{ + struct nvfx_transfer *tx = (struct nvfx_transfer *)ptx; + + if (!tx->direct && (ptx->usage & PIPE_TRANSFER_WRITE)) { + struct pipe_screen *pscreen = pipe->screen; + struct nvfx_screen *nvscreen = nvfx_screen(pscreen); + struct pipe_surface *dst; + + dst = pscreen->get_tex_surface(pscreen, + ptx->resource, + ptx->sr.face, + ptx->sr.level, + ptx->box.z, + PIPE_BIND_BLIT_DESTINATION); + + /* TODO: Check if SIFM can deal with x,y,w,h when swizzling */ + nvscreen->eng2d->copy(nvscreen->eng2d, + dst, ptx->box.x, ptx->box.y, + tx->surface, 0, 0, + ptx->box.width, ptx->box.height); + + pipe_surface_reference(&dst, NULL); + } + + pipe_surface_reference(&tx->surface, NULL); + pipe_resource_reference(&ptx->resource, NULL); + FREE(ptx); +} + +void * +nvfx_miptree_transfer_map(struct pipe_context *pipe, struct pipe_transfer *ptx) +{ + struct pipe_screen *pscreen = pipe->screen; + struct nvfx_transfer *tx = (struct nvfx_transfer *)ptx; + struct nv04_surface *ns = (struct nv04_surface *)tx->surface; + struct nvfx_miptree *mt = (struct nvfx_miptree *)tx->surface->texture; + uint8_t *map = nouveau_screen_bo_map(pscreen, mt->base.bo, + nouveau_screen_transfer_flags(ptx->usage)); + + if(!tx->direct) + return map + ns->base.offset; + else + return (map + ns->base.offset + + ptx->box.y * ns->pitch + + ptx->box.x * util_format_get_blocksize(ptx->resource->format)); +} + +void +nvfx_miptree_transfer_unmap(struct pipe_context *pipe, struct pipe_transfer *ptx) +{ + struct pipe_screen *pscreen = pipe->screen; + struct nvfx_transfer *tx = (struct nvfx_transfer *)ptx; + struct nvfx_miptree *mt = (struct nvfx_miptree *)tx->surface->texture; + + nouveau_screen_bo_unmap(pscreen, mt->base.bo); +} diff --git a/src/gallium/drivers/nvfx/nvfx_transfer.h b/src/gallium/drivers/nvfx/nvfx_transfer.h new file mode 100644 index 00000000000..3e3317b2c7b --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_transfer.h @@ -0,0 +1,26 @@ + +#ifndef NVFX_TRANSFER_H +#define NVFX_TRANSFER_H + +#include "util/u_transfer.h" +#include "pipe/p_state.h" + + +struct pipe_transfer * +nvfx_miptree_transfer_new(struct pipe_context *pcontext, + struct pipe_resource *pt, + struct pipe_subresource sr, + unsigned usage, + const struct pipe_box *box); +void +nvfx_miptree_transfer_del(struct pipe_context *pcontext, + struct pipe_transfer *ptx); +void * +nvfx_miptree_transfer_map(struct pipe_context *pcontext, + struct pipe_transfer *ptx); +void +nvfx_miptree_transfer_unmap(struct pipe_context *pcontext, + struct pipe_transfer *ptx); + + +#endif diff --git a/src/gallium/drivers/nvfx/nvfx_vbo.c b/src/gallium/drivers/nvfx/nvfx_vbo.c new file mode 100644 index 00000000000..520bae5aed2 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_vbo.c @@ -0,0 +1,628 @@ +#include "pipe/p_context.h" +#include "pipe/p_state.h" +#include "util/u_inlines.h" +#include "util/u_format.h" + +#include "nvfx_context.h" +#include "nvfx_state.h" +#include "nvfx_resource.h" + +#include "nouveau/nouveau_channel.h" +#include "nouveau/nouveau_class.h" +#include "nouveau/nouveau_pushbuf.h" +#include "nouveau/nouveau_util.h" + +static INLINE int +nvfx_vbo_format_to_hw(enum pipe_format pipe, unsigned *fmt, unsigned *ncomp) +{ + switch (pipe) { + case PIPE_FORMAT_R32_FLOAT: + case PIPE_FORMAT_R32G32_FLOAT: + case PIPE_FORMAT_R32G32B32_FLOAT: + case PIPE_FORMAT_R32G32B32A32_FLOAT: + *fmt = NV34TCL_VTXFMT_TYPE_FLOAT; + break; + case PIPE_FORMAT_R16_FLOAT: + case PIPE_FORMAT_R16G16_FLOAT: + case PIPE_FORMAT_R16G16B16_FLOAT: + case PIPE_FORMAT_R16G16B16A16_FLOAT: + *fmt = NV34TCL_VTXFMT_TYPE_HALF; + break; + case PIPE_FORMAT_R8_UNORM: + case PIPE_FORMAT_R8G8_UNORM: + case PIPE_FORMAT_R8G8B8_UNORM: + case PIPE_FORMAT_R8G8B8A8_UNORM: + *fmt = NV34TCL_VTXFMT_TYPE_UBYTE; + break; + case PIPE_FORMAT_R16_SSCALED: + case PIPE_FORMAT_R16G16_SSCALED: + case PIPE_FORMAT_R16G16B16_SSCALED: + case PIPE_FORMAT_R16G16B16A16_SSCALED: + *fmt = NV34TCL_VTXFMT_TYPE_USHORT; + break; + default: + NOUVEAU_ERR("Unknown format %s\n", util_format_name(pipe)); + return 1; + } + + switch (pipe) { + case PIPE_FORMAT_R8_UNORM: + case PIPE_FORMAT_R32_FLOAT: + case PIPE_FORMAT_R16_FLOAT: + case PIPE_FORMAT_R16_SSCALED: + *ncomp = 1; + break; + case PIPE_FORMAT_R8G8_UNORM: + case PIPE_FORMAT_R32G32_FLOAT: + case PIPE_FORMAT_R16G16_FLOAT: + case PIPE_FORMAT_R16G16_SSCALED: + *ncomp = 2; + break; + case PIPE_FORMAT_R8G8B8_UNORM: + case PIPE_FORMAT_R32G32B32_FLOAT: + case PIPE_FORMAT_R16G16B16_FLOAT: + case PIPE_FORMAT_R16G16B16_SSCALED: + *ncomp = 3; + break; + case PIPE_FORMAT_R8G8B8A8_UNORM: + case PIPE_FORMAT_R32G32B32A32_FLOAT: + case PIPE_FORMAT_R16G16B16A16_FLOAT: + case PIPE_FORMAT_R16G16B16A16_SSCALED: + *ncomp = 4; + break; + default: + NOUVEAU_ERR("Unknown format %s\n", util_format_name(pipe)); + return 1; + } + + return 0; +} + +static boolean +nvfx_vbo_set_idxbuf(struct nvfx_context *nvfx, struct pipe_resource *ib, + unsigned ib_size) +{ + unsigned type; + + if (!ib) { + nvfx->idxbuf = NULL; + nvfx->idxbuf_format = 0xdeadbeef; + return FALSE; + } + + if (!nvfx->screen->index_buffer_reloc_flags || ib_size == 1) + return FALSE; + + switch (ib_size) { + case 2: + type = NV34TCL_IDXBUF_FORMAT_TYPE_U16; + break; + case 4: + type = NV34TCL_IDXBUF_FORMAT_TYPE_U32; + break; + default: + return FALSE; + } + + if (ib != nvfx->idxbuf || + type != nvfx->idxbuf_format) { + nvfx->dirty |= NVFX_NEW_ARRAYS; + nvfx->idxbuf = ib; + nvfx->idxbuf_format = type; + } + + return TRUE; +} + +// type must be floating point +static inline void +nvfx_vbo_static_attrib(struct nvfx_context *nvfx, + int attrib, struct pipe_vertex_element *ve, + struct pipe_vertex_buffer *vb, unsigned ncomp) +{ + struct pipe_transfer *transfer; + struct nouveau_channel* chan = nvfx->screen->base.channel; + void *map; + float *v; + + map = pipe_buffer_map(&nvfx->pipe, vb->buffer, PIPE_TRANSFER_READ, &transfer); + map = (uint8_t *) map + vb->buffer_offset + ve->src_offset; + + v = map; + + switch (ncomp) { + case 4: + OUT_RING(chan, RING_3D(NV34TCL_VTX_ATTR_4F_X(attrib), 4)); + OUT_RING(chan, fui(v[0])); + OUT_RING(chan, fui(v[1])); + OUT_RING(chan, fui(v[2])); + OUT_RING(chan, fui(v[3])); + break; + case 3: + OUT_RING(chan, RING_3D(NV34TCL_VTX_ATTR_3F_X(attrib), 3)); + OUT_RING(chan, fui(v[0])); + OUT_RING(chan, fui(v[1])); + OUT_RING(chan, fui(v[2])); + break; + case 2: + OUT_RING(chan, RING_3D(NV34TCL_VTX_ATTR_2F_X(attrib), 2)); + OUT_RING(chan, fui(v[0])); + OUT_RING(chan, fui(v[1])); + break; + case 1: + OUT_RING(chan, RING_3D(NV34TCL_VTX_ATTR_1F(attrib), 1)); + OUT_RING(chan, fui(v[0])); + break; + } + + pipe_buffer_unmap(&nvfx->pipe, vb->buffer, transfer); +} + +void +nvfx_draw_arrays(struct pipe_context *pipe, + unsigned mode, unsigned start, unsigned count) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + unsigned restart = 0; + + nvfx_vbo_set_idxbuf(nvfx, NULL, 0); + if (nvfx->screen->force_swtnl || !nvfx_state_validate(nvfx)) { + nvfx_draw_elements_swtnl(pipe, NULL, 0, 0, + mode, start, count); + return; + } + + while (count) { + unsigned vc, nr, avail; + + nvfx_state_emit(nvfx); + + avail = AVAIL_RING(chan); + avail -= 16 + (avail >> 10); /* for the BEGIN_RING_NIs, conservatively assuming one every 1024, plus 16 for safety */ + + vc = nouveau_vbuf_split(avail, 6, 256, + mode, start, count, &restart); + if (!vc) { + FIRE_RING(chan); + continue; + } + + OUT_RING(chan, RING_3D(NV34TCL_VERTEX_BEGIN_END, 1)); + OUT_RING (chan, nvgl_primitive(mode)); + + nr = (vc & 0xff); + if (nr) { + OUT_RING(chan, RING_3D(NV34TCL_VB_VERTEX_BATCH, 1)); + OUT_RING (chan, ((nr - 1) << 24) | start); + start += nr; + } + + nr = vc >> 8; + while (nr) { + unsigned push = nr > 2047 ? 2047 : nr; + + nr -= push; + + OUT_RING(chan, RING_3D_NI(NV34TCL_VB_VERTEX_BATCH, push)); + while (push--) { + OUT_RING(chan, ((0x100 - 1) << 24) | start); + start += 0x100; + } + } + + OUT_RING(chan, RING_3D(NV34TCL_VERTEX_BEGIN_END, 1)); + OUT_RING (chan, 0); + + count -= vc; + start = restart; + } + + pipe->flush(pipe, 0, NULL); +} + +static INLINE void +nvfx_draw_elements_u08(struct nvfx_context *nvfx, void *ib, + unsigned mode, unsigned start, unsigned count) +{ + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + + while (count) { + uint8_t *elts = (uint8_t *)ib + start; + unsigned vc, push, restart = 0, avail; + + nvfx_state_emit(nvfx); + + avail = AVAIL_RING(chan); + avail -= 16 + (avail >> 10); /* for the BEGIN_RING_NIs, conservatively assuming one every 1024, plus 16 for safety */ + + vc = nouveau_vbuf_split(avail, 6, 2, + mode, start, count, &restart); + if (vc == 0) { + FIRE_RING(chan); + continue; + } + count -= vc; + + OUT_RING(chan, RING_3D(NV34TCL_VERTEX_BEGIN_END, 1)); + OUT_RING (chan, nvgl_primitive(mode)); + + if (vc & 1) { + OUT_RING(chan, RING_3D(NV34TCL_VB_ELEMENT_U32, 1)); + OUT_RING (chan, elts[0]); + elts++; vc--; + } + + while (vc) { + unsigned i; + + push = MIN2(vc, 2047 * 2); + + OUT_RING(chan, RING_3D_NI(NV34TCL_VB_ELEMENT_U16, push >> 1)); + for (i = 0; i < push; i+=2) + OUT_RING(chan, (elts[i+1] << 16) | elts[i]); + + vc -= push; + elts += push; + } + + OUT_RING(chan, RING_3D(NV34TCL_VERTEX_BEGIN_END, 1)); + OUT_RING (chan, 0); + + start = restart; + } +} + +static INLINE void +nvfx_draw_elements_u16(struct nvfx_context *nvfx, void *ib, + unsigned mode, unsigned start, unsigned count) +{ + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + + while (count) { + uint16_t *elts = (uint16_t *)ib + start; + unsigned vc, push, restart = 0, avail; + + nvfx_state_emit(nvfx); + + avail = AVAIL_RING(chan); + avail -= 16 + (avail >> 10); /* for the BEGIN_RING_NIs, conservatively assuming one every 1024, plus 16 for safety */ + + vc = nouveau_vbuf_split(avail, 6, 2, + mode, start, count, &restart); + if (vc == 0) { + FIRE_RING(chan); + continue; + } + count -= vc; + + OUT_RING(chan, RING_3D(NV34TCL_VERTEX_BEGIN_END, 1)); + OUT_RING (chan, nvgl_primitive(mode)); + + if (vc & 1) { + OUT_RING(chan, RING_3D(NV34TCL_VB_ELEMENT_U32, 1)); + OUT_RING (chan, elts[0]); + elts++; vc--; + } + + while (vc) { + unsigned i; + + push = MIN2(vc, 2047 * 2); + + OUT_RING(chan, RING_3D_NI(NV34TCL_VB_ELEMENT_U16, push >> 1)); + for (i = 0; i < push; i+=2) + OUT_RING(chan, (elts[i+1] << 16) | elts[i]); + + vc -= push; + elts += push; + } + + OUT_RING(chan, RING_3D(NV34TCL_VERTEX_BEGIN_END, 1)); + OUT_RING (chan, 0); + + start = restart; + } +} + +static INLINE void +nvfx_draw_elements_u32(struct nvfx_context *nvfx, void *ib, + unsigned mode, unsigned start, unsigned count) +{ + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + + while (count) { + uint32_t *elts = (uint32_t *)ib + start; + unsigned vc, push, restart = 0, avail; + + nvfx_state_emit(nvfx); + + avail = AVAIL_RING(chan); + avail -= 16 + (avail >> 10); /* for the BEGIN_RING_NIs, conservatively assuming one every 1024, plus 16 for safety */ + + vc = nouveau_vbuf_split(avail, 5, 1, + mode, start, count, &restart); + if (vc == 0) { + FIRE_RING(chan); + continue; + } + count -= vc; + + OUT_RING(chan, RING_3D(NV34TCL_VERTEX_BEGIN_END, 1)); + OUT_RING (chan, nvgl_primitive(mode)); + + while (vc) { + push = MIN2(vc, 2047); + + OUT_RING(chan, RING_3D_NI(NV34TCL_VB_ELEMENT_U32, push)); + OUT_RINGp (chan, elts, push); + + vc -= push; + elts += push; + } + + OUT_RING(chan, RING_3D(NV34TCL_VERTEX_BEGIN_END, 1)); + OUT_RING (chan, 0); + + start = restart; + } +} + +static void +nvfx_draw_elements_inline(struct pipe_context *pipe, + struct pipe_resource *ib, + unsigned ib_size, int ib_bias, + unsigned mode, unsigned start, unsigned count) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct pipe_transfer *transfer; + void *map; + + map = pipe_buffer_map(pipe, ib, PIPE_TRANSFER_READ, &transfer); + if (!ib) { + NOUVEAU_ERR("failed mapping ib\n"); + return; + } + + assert(ib_bias == 0); + + switch (ib_size) { + case 1: + nvfx_draw_elements_u08(nvfx, map, mode, start, count); + break; + case 2: + nvfx_draw_elements_u16(nvfx, map, mode, start, count); + break; + case 4: + nvfx_draw_elements_u32(nvfx, map, mode, start, count); + break; + default: + NOUVEAU_ERR("invalid idxbuf fmt %d\n", ib_size); + break; + } + + pipe_buffer_unmap(pipe, ib, transfer); +} + +static void +nvfx_draw_elements_vbo(struct pipe_context *pipe, + unsigned mode, unsigned start, unsigned count) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + unsigned restart = 0; + + while (count) { + unsigned nr, vc, avail; + + nvfx_state_emit(nvfx); + + avail = AVAIL_RING(chan); + avail -= 16 + (avail >> 10); /* for the BEGIN_RING_NIs, conservatively assuming one every 1024, plus 16 for safety */ + + vc = nouveau_vbuf_split(avail, 6, 256, + mode, start, count, &restart); + if (!vc) { + FIRE_RING(chan); + continue; + } + + OUT_RING(chan, RING_3D(NV34TCL_VERTEX_BEGIN_END, 1)); + OUT_RING (chan, nvgl_primitive(mode)); + + nr = (vc & 0xff); + if (nr) { + OUT_RING(chan, RING_3D(NV34TCL_VB_INDEX_BATCH, 1)); + OUT_RING (chan, ((nr - 1) << 24) | start); + start += nr; + } + + nr = vc >> 8; + while (nr) { + unsigned push = nr > 2047 ? 2047 : nr; + + nr -= push; + + OUT_RING(chan, RING_3D_NI(NV34TCL_VB_INDEX_BATCH, push)); + while (push--) { + OUT_RING(chan, ((0x100 - 1) << 24) | start); + start += 0x100; + } + } + + OUT_RING(chan, RING_3D(NV34TCL_VERTEX_BEGIN_END, 1)); + OUT_RING (chan, 0); + + count -= vc; + start = restart; + } +} + +void +nvfx_draw_elements(struct pipe_context *pipe, + struct pipe_resource *indexBuffer, + unsigned indexSize, int indexBias, + unsigned mode, unsigned start, unsigned count) +{ + struct nvfx_context *nvfx = nvfx_context(pipe); + boolean idxbuf; + + idxbuf = nvfx_vbo_set_idxbuf(nvfx, indexBuffer, indexSize); + if (nvfx->screen->force_swtnl || !nvfx_state_validate(nvfx)) { + nvfx_draw_elements_swtnl(pipe, + indexBuffer, indexSize, indexBias, + mode, start, count); + return; + } + + if (idxbuf) { + nvfx_draw_elements_vbo(pipe, mode, start, count); + } else { + nvfx_draw_elements_inline(pipe, + indexBuffer, indexSize, indexBias, + mode, start, count); + } + + pipe->flush(pipe, 0, NULL); +} + +boolean +nvfx_vbo_validate(struct nvfx_context *nvfx) +{ + struct nouveau_channel* chan = nvfx->screen->base.channel; + struct pipe_resource *ib = nvfx->idxbuf; + unsigned ib_format = nvfx->idxbuf_format; + int i; + int elements = MAX2(nvfx->vtxelt->num_elements, nvfx->hw_vtxelt_nr); + uint32_t vtxfmt[16]; + unsigned vb_flags = nvfx->screen->vertex_buffer_reloc_flags | NOUVEAU_BO_RD; + + if (!elements) + return TRUE; + + nvfx->vbo_bo = 0; + + MARK_RING(chan, (5 + 2) * 16 + 2 + 11, 16 + 2); + for (i = 0; i < nvfx->vtxelt->num_elements; i++) { + struct pipe_vertex_element *ve; + struct pipe_vertex_buffer *vb; + unsigned type, ncomp; + + ve = &nvfx->vtxelt->pipe[i]; + vb = &nvfx->vtxbuf[ve->vertex_buffer_index]; + + if (nvfx_vbo_format_to_hw(ve->src_format, &type, &ncomp)) { + MARK_UNDO(chan); + nvfx->fallback_swtnl |= NVFX_NEW_ARRAYS; + return FALSE; + } + + if (!vb->stride && type == NV34TCL_VTXFMT_TYPE_FLOAT) { + nvfx_vbo_static_attrib(nvfx, i, ve, vb, ncomp); + vtxfmt[i] = type; + } else { + vtxfmt[i] = ((vb->stride << NV34TCL_VTXFMT_STRIDE_SHIFT) | + (ncomp << NV34TCL_VTXFMT_SIZE_SHIFT) | type); + nvfx->vbo_bo |= (1 << i); + } + } + + for(; i < elements; ++i) + vtxfmt[i] = NV34TCL_VTXFMT_TYPE_FLOAT; + + OUT_RING(chan, RING_3D(NV34TCL_VTXFMT(0), elements)); + OUT_RINGp(chan, vtxfmt, elements); + + if(nvfx->is_nv4x) { + unsigned i; + /* seems to be some kind of cache flushing */ + for(i = 0; i < 3; ++i) { + OUT_RING(chan, RING_3D(0x1718, 1)); + OUT_RING(chan, 0); + } + } + + OUT_RING(chan, RING_3D(NV34TCL_VTXBUF_ADDRESS(0), elements)); + for (i = 0; i < nvfx->vtxelt->num_elements; i++) { + struct pipe_vertex_element *ve; + struct pipe_vertex_buffer *vb; + + ve = &nvfx->vtxelt->pipe[i]; + vb = &nvfx->vtxbuf[ve->vertex_buffer_index]; + + if (!(nvfx->vbo_bo & (1 << i))) + OUT_RING(chan, 0); + else + { + struct nouveau_bo* bo = nvfx_resource(vb->buffer)->bo; + OUT_RELOC(chan, bo, + vb->buffer_offset + ve->src_offset, + vb_flags | NOUVEAU_BO_LOW | NOUVEAU_BO_OR, + 0, NV34TCL_VTXBUF_ADDRESS_DMA1); + } + } + + for (; i < elements; i++) + OUT_RING(chan, 0); + + OUT_RING(chan, RING_3D(0x1710, 1)); + OUT_RING(chan, 0); + + if (ib) { + unsigned ib_flags = nvfx->screen->index_buffer_reloc_flags | NOUVEAU_BO_RD; + struct nouveau_bo* bo = nvfx_resource(ib)->bo; + + assert(nvfx->screen->index_buffer_reloc_flags); + + OUT_RING(chan, RING_3D(NV34TCL_IDXBUF_ADDRESS, 2)); + OUT_RELOC(chan, bo, 0, ib_flags | NOUVEAU_BO_LOW, 0, 0); + OUT_RELOC(chan, bo, ib_format, ib_flags | NOUVEAU_BO_OR, + 0, NV34TCL_IDXBUF_FORMAT_DMA1); + } + + nvfx->hw_vtxelt_nr = nvfx->vtxelt->num_elements; + return TRUE; +} + +void +nvfx_vbo_relocate(struct nvfx_context *nvfx) +{ + struct nouveau_channel* chan = nvfx->screen->base.channel; + unsigned vb_flags = nvfx->screen->vertex_buffer_reloc_flags | NOUVEAU_BO_RD | NOUVEAU_BO_DUMMY; + int i; + + MARK_RING(chan, 2 * 16 + 3, 2 * 16 + 3); + for(i = 0; i < nvfx->vtxelt->num_elements; ++i) { + if(nvfx->vbo_bo & (1 << i)) { + struct pipe_vertex_element *ve = &nvfx->vtxelt->pipe[i]; + struct pipe_vertex_buffer *vb = &nvfx->vtxbuf[ve->vertex_buffer_index]; + struct nouveau_bo* bo = nvfx_resource(vb->buffer)->bo; + OUT_RELOC(chan, bo, RING_3D(NV34TCL_VTXBUF_ADDRESS(i), 1), + vb_flags, 0, 0); + OUT_RELOC(chan, bo, vb->buffer_offset + ve->src_offset, + vb_flags | NOUVEAU_BO_LOW | NOUVEAU_BO_OR, + 0, NV34TCL_VTXBUF_ADDRESS_DMA1); + } + } + + if(nvfx->idxbuf) + { + unsigned ib_flags = nvfx->screen->index_buffer_reloc_flags | NOUVEAU_BO_RD | NOUVEAU_BO_DUMMY; + struct nouveau_bo* bo = nvfx_resource(nvfx->idxbuf)->bo; + + assert(nvfx->screen->index_buffer_reloc_flags); + + OUT_RELOC(chan, bo, RING_3D(NV34TCL_IDXBUF_ADDRESS, 2), + ib_flags, 0, 0); + OUT_RELOC(chan, bo, 0, + ib_flags | NOUVEAU_BO_LOW, 0, 0); + OUT_RELOC(chan, bo, nvfx->idxbuf_format, + ib_flags | NOUVEAU_BO_OR, + 0, NV34TCL_IDXBUF_FORMAT_DMA1); + } +} diff --git a/src/gallium/drivers/nvfx/nvfx_vertprog.c b/src/gallium/drivers/nvfx/nvfx_vertprog.c new file mode 100644 index 00000000000..80b98b62d34 --- /dev/null +++ b/src/gallium/drivers/nvfx/nvfx_vertprog.c @@ -0,0 +1,1066 @@ +#include "pipe/p_context.h" +#include "pipe/p_defines.h" +#include "pipe/p_state.h" +#include "util/u_inlines.h" + +#include "pipe/p_shader_tokens.h" +#include "tgsi/tgsi_parse.h" +#include "tgsi/tgsi_dump.h" +#include "tgsi/tgsi_util.h" + +#include "nvfx_context.h" +#include "nvfx_state.h" + +/* TODO (at least...): + * 1. Indexed consts + ARL + * 3. NV_vp11, NV_vp2, NV_vp3 features + * - extra arith opcodes + * - branching + * - texture sampling + * - indexed attribs + * - indexed results + * 4. bugs + */ + +#include "nv30_vertprog.h" +#include "nv40_vertprog.h" + +#define NVFX_VP_INST_DEST_CLIP(n) ((~0 - 6) + (n)) + +struct nvfx_vpc { + struct nvfx_vertex_program *vp; + + struct nvfx_vertex_program_exec *vpi; + + unsigned r_temps; + unsigned r_temps_discard; + struct nvfx_sreg r_result[PIPE_MAX_SHADER_OUTPUTS]; + struct nvfx_sreg *r_address; + struct nvfx_sreg *r_temp; + + struct nvfx_sreg *imm; + unsigned nr_imm; + + unsigned hpos_idx; +}; + +static struct nvfx_sreg +temp(struct nvfx_vpc *vpc) +{ + int idx = ffs(~vpc->r_temps) - 1; + + if (idx < 0) { + NOUVEAU_ERR("out of temps!!\n"); + assert(0); + return nvfx_sr(NVFXSR_TEMP, 0); + } + + vpc->r_temps |= (1 << idx); + vpc->r_temps_discard |= (1 << idx); + return nvfx_sr(NVFXSR_TEMP, idx); +} + +static INLINE void +release_temps(struct nvfx_vpc *vpc) +{ + vpc->r_temps &= ~vpc->r_temps_discard; + vpc->r_temps_discard = 0; +} + +static struct nvfx_sreg +constant(struct nvfx_vpc *vpc, int pipe, float x, float y, float z, float w) +{ + struct nvfx_vertex_program *vp = vpc->vp; + struct nvfx_vertex_program_data *vpd; + int idx; + + if (pipe >= 0) { + for (idx = 0; idx < vp->nr_consts; idx++) { + if (vp->consts[idx].index == pipe) + return nvfx_sr(NVFXSR_CONST, idx); + } + } + + idx = vp->nr_consts++; + vp->consts = realloc(vp->consts, sizeof(*vpd) * vp->nr_consts); + vpd = &vp->consts[idx]; + + vpd->index = pipe; + vpd->value[0] = x; + vpd->value[1] = y; + vpd->value[2] = z; + vpd->value[3] = w; + return nvfx_sr(NVFXSR_CONST, idx); +} + +#define arith(cc,s,o,d,m,s0,s1,s2) \ + nvfx_vp_arith(nvfx, (cc), NVFX_VP_INST_SLOT_##s, NVFX_VP_INST_##s##_OP_##o, (d), (m), (s0), (s1), (s2)) + +static void +emit_src(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, uint32_t *hw, int pos, struct nvfx_sreg src) +{ + struct nvfx_vertex_program *vp = vpc->vp; + uint32_t sr = 0; + + switch (src.type) { + case NVFXSR_TEMP: + sr |= (NVFX_VP(SRC_REG_TYPE_TEMP) << NVFX_VP(SRC_REG_TYPE_SHIFT)); + sr |= (src.index << NVFX_VP(SRC_TEMP_SRC_SHIFT)); + break; + case NVFXSR_INPUT: + sr |= (NVFX_VP(SRC_REG_TYPE_INPUT) << + NVFX_VP(SRC_REG_TYPE_SHIFT)); + vp->ir |= (1 << src.index); + hw[1] |= (src.index << NVFX_VP(INST_INPUT_SRC_SHIFT)); + break; + case NVFXSR_CONST: + sr |= (NVFX_VP(SRC_REG_TYPE_CONST) << + NVFX_VP(SRC_REG_TYPE_SHIFT)); + assert(vpc->vpi->const_index == -1 || + vpc->vpi->const_index == src.index); + vpc->vpi->const_index = src.index; + break; + case NVFXSR_NONE: + sr |= (NVFX_VP(SRC_REG_TYPE_INPUT) << + NVFX_VP(SRC_REG_TYPE_SHIFT)); + break; + default: + assert(0); + } + + if (src.negate) + sr |= NVFX_VP(SRC_NEGATE); + + if (src.abs) + hw[0] |= (1 << (21 + pos)); + + sr |= ((src.swz[0] << NVFX_VP(SRC_SWZ_X_SHIFT)) | + (src.swz[1] << NVFX_VP(SRC_SWZ_Y_SHIFT)) | + (src.swz[2] << NVFX_VP(SRC_SWZ_Z_SHIFT)) | + (src.swz[3] << NVFX_VP(SRC_SWZ_W_SHIFT))); + + switch (pos) { + case 0: + hw[1] |= ((sr & NVFX_VP(SRC0_HIGH_MASK)) >> + NVFX_VP(SRC0_HIGH_SHIFT)) << NVFX_VP(INST_SRC0H_SHIFT); + hw[2] |= (sr & NVFX_VP(SRC0_LOW_MASK)) << + NVFX_VP(INST_SRC0L_SHIFT); + break; + case 1: + hw[2] |= sr << NVFX_VP(INST_SRC1_SHIFT); + break; + case 2: + hw[2] |= ((sr & NVFX_VP(SRC2_HIGH_MASK)) >> + NVFX_VP(SRC2_HIGH_SHIFT)) << NVFX_VP(INST_SRC2H_SHIFT); + hw[3] |= (sr & NVFX_VP(SRC2_LOW_MASK)) << + NVFX_VP(INST_SRC2L_SHIFT); + break; + default: + assert(0); + } +} + +static void +emit_dst(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, uint32_t *hw, int slot, struct nvfx_sreg dst) +{ + struct nvfx_vertex_program *vp = vpc->vp; + + switch (dst.type) { + case NVFXSR_TEMP: + if(!nvfx->is_nv4x) + hw[0] |= (dst.index << NV30_VP_INST_DEST_TEMP_ID_SHIFT); + else { + hw[3] |= NV40_VP_INST_DEST_MASK; + if (slot == 0) { + hw[0] |= (dst.index << + NV40_VP_INST_VEC_DEST_TEMP_SHIFT); + } else { + hw[3] |= (dst.index << + NV40_VP_INST_SCA_DEST_TEMP_SHIFT); + } + } + break; + case NVFXSR_OUTPUT: + /* TODO: this may be wrong because on nv30 COL0 and BFC0 are swapped */ + switch (dst.index) { + case NVFX_VP_INST_DEST_CLIP(0): + vp->or |= (1 << 6); + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE0; + dst.index = NVFX_VP(INST_DEST_FOGC); + break; + case NVFX_VP_INST_DEST_CLIP(1): + vp->or |= (1 << 7); + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE1; + dst.index = NVFX_VP(INST_DEST_FOGC); + break; + case NVFX_VP_INST_DEST_CLIP(2): + vp->or |= (1 << 8); + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE2; + dst.index = NVFX_VP(INST_DEST_FOGC); + break; + case NVFX_VP_INST_DEST_CLIP(3): + vp->or |= (1 << 9); + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE3; + dst.index = NVFX_VP(INST_DEST_PSZ); + break; + case NVFX_VP_INST_DEST_CLIP(4): + vp->or |= (1 << 10); + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE4; + dst.index = NVFX_VP(INST_DEST_PSZ); + break; + case NVFX_VP_INST_DEST_CLIP(5): + vp->or |= (1 << 11); + vp->clip_ctrl |= NV34TCL_VP_CLIP_PLANES_ENABLE_PLANE5; + dst.index = NVFX_VP(INST_DEST_PSZ); + break; + default: + if(!nvfx->is_nv4x) { + switch (dst.index) { + case NV30_VP_INST_DEST_COL0 : vp->or |= (1 << 0); break; + case NV30_VP_INST_DEST_COL1 : vp->or |= (1 << 1); break; + case NV30_VP_INST_DEST_BFC0 : vp->or |= (1 << 2); break; + case NV30_VP_INST_DEST_BFC1 : vp->or |= (1 << 3); break; + case NV30_VP_INST_DEST_FOGC: vp->or |= (1 << 4); break; + case NV30_VP_INST_DEST_PSZ : vp->or |= (1 << 5); break; + case NV30_VP_INST_DEST_TC(0): vp->or |= (1 << 14); break; + case NV30_VP_INST_DEST_TC(1): vp->or |= (1 << 15); break; + case NV30_VP_INST_DEST_TC(2): vp->or |= (1 << 16); break; + case NV30_VP_INST_DEST_TC(3): vp->or |= (1 << 17); break; + case NV30_VP_INST_DEST_TC(4): vp->or |= (1 << 18); break; + case NV30_VP_INST_DEST_TC(5): vp->or |= (1 << 19); break; + case NV30_VP_INST_DEST_TC(6): vp->or |= (1 << 20); break; + case NV30_VP_INST_DEST_TC(7): vp->or |= (1 << 21); break; + } + } else { + switch (dst.index) { + case NV40_VP_INST_DEST_COL0 : vp->or |= (1 << 0); break; + case NV40_VP_INST_DEST_COL1 : vp->or |= (1 << 1); break; + case NV40_VP_INST_DEST_BFC0 : vp->or |= (1 << 2); break; + case NV40_VP_INST_DEST_BFC1 : vp->or |= (1 << 3); break; + case NV40_VP_INST_DEST_FOGC: vp->or |= (1 << 4); break; + case NV40_VP_INST_DEST_PSZ : vp->or |= (1 << 5); break; + case NV40_VP_INST_DEST_TC(0): vp->or |= (1 << 14); break; + case NV40_VP_INST_DEST_TC(1): vp->or |= (1 << 15); break; + case NV40_VP_INST_DEST_TC(2): vp->or |= (1 << 16); break; + case NV40_VP_INST_DEST_TC(3): vp->or |= (1 << 17); break; + case NV40_VP_INST_DEST_TC(4): vp->or |= (1 << 18); break; + case NV40_VP_INST_DEST_TC(5): vp->or |= (1 << 19); break; + case NV40_VP_INST_DEST_TC(6): vp->or |= (1 << 20); break; + case NV40_VP_INST_DEST_TC(7): vp->or |= (1 << 21); break; + } + } + break; + } + + if(!nvfx->is_nv4x) { + hw[3] |= (dst.index << NV30_VP_INST_DEST_SHIFT); + hw[0] |= NV30_VP_INST_VEC_DEST_TEMP_MASK | (1<<20); + + /*XXX: no way this is entirely correct, someone needs to + * figure out what exactly it is. + */ + hw[3] |= 0x800; + } else { + hw[3] |= (dst.index << NV40_VP_INST_DEST_SHIFT); + if (slot == 0) { + hw[0] |= NV40_VP_INST_VEC_RESULT; + hw[0] |= NV40_VP_INST_VEC_DEST_TEMP_MASK | (1<<20); + } else { + hw[3] |= NV40_VP_INST_SCA_RESULT; + hw[3] |= NV40_VP_INST_SCA_DEST_TEMP_MASK; + } + } + break; + default: + assert(0); + } +} + +static void +nvfx_vp_arith(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, int slot, int op, + struct nvfx_sreg dst, int mask, + struct nvfx_sreg s0, struct nvfx_sreg s1, + struct nvfx_sreg s2) +{ + struct nvfx_vertex_program *vp = vpc->vp; + uint32_t *hw; + + vp->insns = realloc(vp->insns, ++vp->nr_insns * sizeof(*vpc->vpi)); + vpc->vpi = &vp->insns[vp->nr_insns - 1]; + memset(vpc->vpi, 0, sizeof(*vpc->vpi)); + vpc->vpi->const_index = -1; + + hw = vpc->vpi->data; + + hw[0] |= (NVFX_COND_TR << NVFX_VP(INST_COND_SHIFT)); + hw[0] |= ((0 << NVFX_VP(INST_COND_SWZ_X_SHIFT)) | + (1 << NVFX_VP(INST_COND_SWZ_Y_SHIFT)) | + (2 << NVFX_VP(INST_COND_SWZ_Z_SHIFT)) | + (3 << NVFX_VP(INST_COND_SWZ_W_SHIFT))); + + if(!nvfx->is_nv4x) { + hw[1] |= (op << NV30_VP_INST_VEC_OPCODE_SHIFT); +// hw[3] |= NVFX_VP(INST_SCA_DEST_TEMP_MASK); +// hw[3] |= (mask << NVFX_VP(INST_VEC_WRITEMASK_SHIFT)); + + if (dst.type == NVFXSR_OUTPUT) { + if (slot) + hw[3] |= (mask << NV30_VP_INST_SDEST_WRITEMASK_SHIFT); + else + hw[3] |= (mask << NV30_VP_INST_VDEST_WRITEMASK_SHIFT); + } else { + if (slot) + hw[3] |= (mask << NV30_VP_INST_STEMP_WRITEMASK_SHIFT); + else + hw[3] |= (mask << NV30_VP_INST_VTEMP_WRITEMASK_SHIFT); + } + } else { + if (slot == 0) { + hw[1] |= (op << NV40_VP_INST_VEC_OPCODE_SHIFT); + hw[3] |= NV40_VP_INST_SCA_DEST_TEMP_MASK; + hw[3] |= (mask << NV40_VP_INST_VEC_WRITEMASK_SHIFT); + } else { + hw[1] |= (op << NV40_VP_INST_SCA_OPCODE_SHIFT); + hw[0] |= (NV40_VP_INST_VEC_DEST_TEMP_MASK | (1 << 20)); + hw[3] |= (mask << NV40_VP_INST_SCA_WRITEMASK_SHIFT); + } + } + + emit_dst(nvfx, vpc, hw, slot, dst); + emit_src(nvfx, vpc, hw, 0, s0); + emit_src(nvfx, vpc, hw, 1, s1); + emit_src(nvfx, vpc, hw, 2, s2); +} + +static INLINE struct nvfx_sreg +tgsi_src(struct nvfx_vpc *vpc, const struct tgsi_full_src_register *fsrc) { + struct nvfx_sreg src = { 0 }; + + switch (fsrc->Register.File) { + case TGSI_FILE_INPUT: + src = nvfx_sr(NVFXSR_INPUT, fsrc->Register.Index); + break; + case TGSI_FILE_CONSTANT: + src = constant(vpc, fsrc->Register.Index, 0, 0, 0, 0); + break; + case TGSI_FILE_IMMEDIATE: + src = vpc->imm[fsrc->Register.Index]; + break; + case TGSI_FILE_TEMPORARY: + src = vpc->r_temp[fsrc->Register.Index]; + break; + default: + NOUVEAU_ERR("bad src file\n"); + break; + } + + src.abs = fsrc->Register.Absolute; + src.negate = fsrc->Register.Negate; + src.swz[0] = fsrc->Register.SwizzleX; + src.swz[1] = fsrc->Register.SwizzleY; + src.swz[2] = fsrc->Register.SwizzleZ; + src.swz[3] = fsrc->Register.SwizzleW; + return src; +} + +static INLINE struct nvfx_sreg +tgsi_dst(struct nvfx_vpc *vpc, const struct tgsi_full_dst_register *fdst) { + struct nvfx_sreg dst = { 0 }; + + switch (fdst->Register.File) { + case TGSI_FILE_OUTPUT: + dst = vpc->r_result[fdst->Register.Index]; + break; + case TGSI_FILE_TEMPORARY: + dst = vpc->r_temp[fdst->Register.Index]; + break; + case TGSI_FILE_ADDRESS: + dst = vpc->r_address[fdst->Register.Index]; + break; + default: + NOUVEAU_ERR("bad dst file\n"); + break; + } + + return dst; +} + +static INLINE int +tgsi_mask(uint tgsi) +{ + int mask = 0; + + if (tgsi & TGSI_WRITEMASK_X) mask |= NVFX_VP_MASK_X; + if (tgsi & TGSI_WRITEMASK_Y) mask |= NVFX_VP_MASK_Y; + if (tgsi & TGSI_WRITEMASK_Z) mask |= NVFX_VP_MASK_Z; + if (tgsi & TGSI_WRITEMASK_W) mask |= NVFX_VP_MASK_W; + return mask; +} + +static boolean +nvfx_vertprog_parse_instruction(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, + const struct tgsi_full_instruction *finst) +{ + struct nvfx_sreg src[3], dst, tmp; + struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); + int mask; + int ai = -1, ci = -1, ii = -1; + int i; + + if (finst->Instruction.Opcode == TGSI_OPCODE_END) + return TRUE; + + for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { + const struct tgsi_full_src_register *fsrc; + + fsrc = &finst->Src[i]; + if (fsrc->Register.File == TGSI_FILE_TEMPORARY) { + src[i] = tgsi_src(vpc, fsrc); + } + } + + for (i = 0; i < finst->Instruction.NumSrcRegs; i++) { + const struct tgsi_full_src_register *fsrc; + + fsrc = &finst->Src[i]; + + switch (fsrc->Register.File) { + case TGSI_FILE_INPUT: + if (ai == -1 || ai == fsrc->Register.Index) { + ai = fsrc->Register.Index; + src[i] = tgsi_src(vpc, fsrc); + } else { + src[i] = temp(vpc); + arith(vpc, VEC, MOV, src[i], NVFX_VP_MASK_ALL, + tgsi_src(vpc, fsrc), none, none); + } + break; + case TGSI_FILE_CONSTANT: + if ((ci == -1 && ii == -1) || + ci == fsrc->Register.Index) { + ci = fsrc->Register.Index; + src[i] = tgsi_src(vpc, fsrc); + } else { + src[i] = temp(vpc); + arith(vpc, VEC, MOV, src[i], NVFX_VP_MASK_ALL, + tgsi_src(vpc, fsrc), none, none); + } + break; + case TGSI_FILE_IMMEDIATE: + if ((ci == -1 && ii == -1) || + ii == fsrc->Register.Index) { + ii = fsrc->Register.Index; + src[i] = tgsi_src(vpc, fsrc); + } else { + src[i] = temp(vpc); + arith(vpc, VEC, MOV, src[i], NVFX_VP_MASK_ALL, + tgsi_src(vpc, fsrc), none, none); + } + break; + case TGSI_FILE_TEMPORARY: + /* handled above */ + break; + default: + NOUVEAU_ERR("bad src file\n"); + return FALSE; + } + } + + dst = tgsi_dst(vpc, &finst->Dst[0]); + mask = tgsi_mask(finst->Dst[0].Register.WriteMask); + + switch (finst->Instruction.Opcode) { + case TGSI_OPCODE_ABS: + arith(vpc, VEC, MOV, dst, mask, abs(src[0]), none, none); + break; + case TGSI_OPCODE_ADD: + arith(vpc, VEC, ADD, dst, mask, src[0], none, src[1]); + break; + case TGSI_OPCODE_ARL: + arith(vpc, VEC, ARL, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_COS: + arith(vpc, SCA, COS, dst, mask, none, none, src[0]); + break; + case TGSI_OPCODE_DP3: + arith(vpc, VEC, DP3, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_DP4: + arith(vpc, VEC, DP4, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_DPH: + arith(vpc, VEC, DPH, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_DST: + arith(vpc, VEC, DST, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_EX2: + arith(vpc, SCA, EX2, dst, mask, none, none, src[0]); + break; + case TGSI_OPCODE_EXP: + arith(vpc, SCA, EXP, dst, mask, none, none, src[0]); + break; + case TGSI_OPCODE_FLR: + arith(vpc, VEC, FLR, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_FRC: + arith(vpc, VEC, FRC, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_LG2: + arith(vpc, SCA, LG2, dst, mask, none, none, src[0]); + break; + case TGSI_OPCODE_LIT: + arith(vpc, SCA, LIT, dst, mask, none, none, src[0]); + break; + case TGSI_OPCODE_LOG: + arith(vpc, SCA, LOG, dst, mask, none, none, src[0]); + break; + case TGSI_OPCODE_LRP: + tmp = temp(vpc); + arith(vpc, VEC, MAD, tmp, mask, neg(src[0]), src[2], src[2]); + arith(vpc, VEC, MAD, dst, mask, src[0], src[1], tmp); + break; + case TGSI_OPCODE_MAD: + arith(vpc, VEC, MAD, dst, mask, src[0], src[1], src[2]); + break; + case TGSI_OPCODE_MAX: + arith(vpc, VEC, MAX, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_MIN: + arith(vpc, VEC, MIN, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_MOV: + arith(vpc, VEC, MOV, dst, mask, src[0], none, none); + break; + case TGSI_OPCODE_MUL: + arith(vpc, VEC, MUL, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_POW: + tmp = temp(vpc); + arith(vpc, SCA, LG2, tmp, NVFX_VP_MASK_X, none, none, + swz(src[0], X, X, X, X)); + arith(vpc, VEC, MUL, tmp, NVFX_VP_MASK_X, swz(tmp, X, X, X, X), + swz(src[1], X, X, X, X), none); + arith(vpc, SCA, EX2, dst, mask, none, none, + swz(tmp, X, X, X, X)); + break; + case TGSI_OPCODE_RCP: + arith(vpc, SCA, RCP, dst, mask, none, none, src[0]); + break; + case TGSI_OPCODE_RET: + break; + case TGSI_OPCODE_RSQ: + arith(vpc, SCA, RSQ, dst, mask, none, none, abs(src[0])); + break; + case TGSI_OPCODE_SEQ: + arith(vpc, VEC, SEQ, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SFL: + arith(vpc, VEC, SFL, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SGE: + arith(vpc, VEC, SGE, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SGT: + arith(vpc, VEC, SGT, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SIN: + arith(vpc, SCA, SIN, dst, mask, none, none, src[0]); + break; + case TGSI_OPCODE_SLE: + arith(vpc, VEC, SLE, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SLT: + arith(vpc, VEC, SLT, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SNE: + arith(vpc, VEC, SNE, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SSG: + arith(vpc, VEC, SSG, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_STR: + arith(vpc, VEC, STR, dst, mask, src[0], src[1], none); + break; + case TGSI_OPCODE_SUB: + arith(vpc, VEC, ADD, dst, mask, src[0], none, neg(src[1])); + break; + case TGSI_OPCODE_XPD: + tmp = temp(vpc); + arith(vpc, VEC, MUL, tmp, mask, + swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none); + arith(vpc, VEC, MAD, dst, (mask & ~NVFX_VP_MASK_W), + swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), + neg(tmp)); + break; + default: + NOUVEAU_ERR("invalid opcode %d\n", finst->Instruction.Opcode); + return FALSE; + } + + release_temps(vpc); + return TRUE; +} + +static boolean +nvfx_vertprog_parse_decl_output(struct nvfx_context* nvfx, struct nvfx_vpc *vpc, + const struct tgsi_full_declaration *fdec) +{ + unsigned idx = fdec->Range.First; + int hw; + + switch (fdec->Semantic.Name) { + case TGSI_SEMANTIC_POSITION: + hw = NVFX_VP(INST_DEST_POS); + vpc->hpos_idx = idx; + break; + case TGSI_SEMANTIC_COLOR: + if (fdec->Semantic.Index == 0) { + hw = NVFX_VP(INST_DEST_COL0); + } else + if (fdec->Semantic.Index == 1) { + hw = NVFX_VP(INST_DEST_COL1); + } else { + NOUVEAU_ERR("bad colour semantic index\n"); + return FALSE; + } + break; + case TGSI_SEMANTIC_BCOLOR: + if (fdec->Semantic.Index == 0) { + hw = NVFX_VP(INST_DEST_BFC0); + } else + if (fdec->Semantic.Index == 1) { + hw = NVFX_VP(INST_DEST_BFC1); + } else { + NOUVEAU_ERR("bad bcolour semantic index\n"); + return FALSE; + } + break; + case TGSI_SEMANTIC_FOG: + hw = NVFX_VP(INST_DEST_FOGC); + break; + case TGSI_SEMANTIC_PSIZE: + hw = NVFX_VP(INST_DEST_PSZ); + break; + case TGSI_SEMANTIC_GENERIC: + if (fdec->Semantic.Index <= 7) { + hw = NVFX_VP(INST_DEST_TC(fdec->Semantic.Index)); + } else { + NOUVEAU_ERR("bad generic semantic index\n"); + return FALSE; + } + break; + case TGSI_SEMANTIC_EDGEFLAG: + /* not really an error just a fallback */ + NOUVEAU_ERR("cannot handle edgeflag output\n"); + return FALSE; + default: + NOUVEAU_ERR("bad output semantic\n"); + return FALSE; + } + + vpc->r_result[idx] = nvfx_sr(NVFXSR_OUTPUT, hw); + return TRUE; +} + +static boolean +nvfx_vertprog_prepare(struct nvfx_context* nvfx, struct nvfx_vpc *vpc) +{ + struct tgsi_parse_context p; + int high_temp = -1, high_addr = -1, nr_imm = 0, i; + + tgsi_parse_init(&p, vpc->vp->pipe.tokens); + while (!tgsi_parse_end_of_tokens(&p)) { + const union tgsi_full_token *tok = &p.FullToken; + + tgsi_parse_token(&p); + switch(tok->Token.Type) { + case TGSI_TOKEN_TYPE_IMMEDIATE: + nr_imm++; + break; + case TGSI_TOKEN_TYPE_DECLARATION: + { + const struct tgsi_full_declaration *fdec; + + fdec = &p.FullToken.FullDeclaration; + switch (fdec->Declaration.File) { + case TGSI_FILE_TEMPORARY: + if (fdec->Range.Last > high_temp) { + high_temp = + fdec->Range.Last; + } + break; +#if 0 /* this would be nice.. except gallium doesn't track it */ + case TGSI_FILE_ADDRESS: + if (fdec->Range.Last > high_addr) { + high_addr = + fdec->Range.Last; + } + break; +#endif + case TGSI_FILE_OUTPUT: + if (!nvfx_vertprog_parse_decl_output(nvfx, vpc, fdec)) + return FALSE; + break; + default: + break; + } + } + break; +#if 1 /* yay, parse instructions looking for address regs instead */ + case TGSI_TOKEN_TYPE_INSTRUCTION: + { + const struct tgsi_full_instruction *finst; + const struct tgsi_full_dst_register *fdst; + + finst = &p.FullToken.FullInstruction; + fdst = &finst->Dst[0]; + + if (fdst->Register.File == TGSI_FILE_ADDRESS) { + if (fdst->Register.Index > high_addr) + high_addr = fdst->Register.Index; + } + + } + break; +#endif + default: + break; + } + } + tgsi_parse_free(&p); + + if (nr_imm) { + vpc->imm = CALLOC(nr_imm, sizeof(struct nvfx_sreg)); + assert(vpc->imm); + } + + if (++high_temp) { + vpc->r_temp = CALLOC(high_temp, sizeof(struct nvfx_sreg)); + for (i = 0; i < high_temp; i++) + vpc->r_temp[i] = temp(vpc); + } + + if (++high_addr) { + vpc->r_address = CALLOC(high_addr, sizeof(struct nvfx_sreg)); + for (i = 0; i < high_addr; i++) + vpc->r_address[i] = temp(vpc); + } + + vpc->r_temps_discard = 0; + return TRUE; +} + +static void +nvfx_vertprog_translate(struct nvfx_context *nvfx, + struct nvfx_vertex_program *vp) +{ + struct tgsi_parse_context parse; + struct nvfx_vpc *vpc = NULL; + struct nvfx_sreg none = nvfx_sr(NVFXSR_NONE, 0); + int i; + + vpc = CALLOC(1, sizeof(struct nvfx_vpc)); + if (!vpc) + return; + vpc->vp = vp; + + if (!nvfx_vertprog_prepare(nvfx, vpc)) { + FREE(vpc); + return; + } + + /* Redirect post-transform vertex position to a temp if user clip + * planes are enabled. We need to append code to the vtxprog + * to handle clip planes later. + */ + if (vp->ucp.nr) { + vpc->r_result[vpc->hpos_idx] = temp(vpc); + vpc->r_temps_discard = 0; + } + + tgsi_parse_init(&parse, vp->pipe.tokens); + + while (!tgsi_parse_end_of_tokens(&parse)) { + tgsi_parse_token(&parse); + + switch (parse.FullToken.Token.Type) { + case TGSI_TOKEN_TYPE_IMMEDIATE: + { + const struct tgsi_full_immediate *imm; + + imm = &parse.FullToken.FullImmediate; + assert(imm->Immediate.DataType == TGSI_IMM_FLOAT32); + assert(imm->Immediate.NrTokens == 4 + 1); + vpc->imm[vpc->nr_imm++] = + constant(vpc, -1, + imm->u[0].Float, + imm->u[1].Float, + imm->u[2].Float, + imm->u[3].Float); + } + break; + case TGSI_TOKEN_TYPE_INSTRUCTION: + { + const struct tgsi_full_instruction *finst; + finst = &parse.FullToken.FullInstruction; + if (!nvfx_vertprog_parse_instruction(nvfx, vpc, finst)) + goto out_err; + } + break; + default: + break; + } + } + + /* Write out HPOS if it was redirected to a temp earlier */ + if (vpc->r_result[vpc->hpos_idx].type != NVFXSR_OUTPUT) { + struct nvfx_sreg hpos = nvfx_sr(NVFXSR_OUTPUT, + NVFX_VP(INST_DEST_POS)); + struct nvfx_sreg htmp = vpc->r_result[vpc->hpos_idx]; + + arith(vpc, VEC, MOV, hpos, NVFX_VP_MASK_ALL, htmp, none, none); + } + + /* Insert code to handle user clip planes */ + for (i = 0; i < vp->ucp.nr; i++) { + struct nvfx_sreg cdst = nvfx_sr(NVFXSR_OUTPUT, + NVFX_VP_INST_DEST_CLIP(i)); + struct nvfx_sreg ceqn = constant(vpc, -1, + nvfx->clip.ucp[i][0], + nvfx->clip.ucp[i][1], + nvfx->clip.ucp[i][2], + nvfx->clip.ucp[i][3]); + struct nvfx_sreg htmp = vpc->r_result[vpc->hpos_idx]; + unsigned mask; + + switch (i) { + case 0: case 3: mask = NVFX_VP_MASK_Y; break; + case 1: case 4: mask = NVFX_VP_MASK_Z; break; + case 2: case 5: mask = NVFX_VP_MASK_W; break; + default: + NOUVEAU_ERR("invalid clip dist #%d\n", i); + goto out_err; + } + + arith(vpc, VEC, DP4, cdst, mask, htmp, ceqn, none); + } + + vp->insns[vp->nr_insns - 1].data[3] |= NVFX_VP_INST_LAST; + vp->translated = TRUE; +out_err: + tgsi_parse_free(&parse); + if (vpc->r_temp) + FREE(vpc->r_temp); + if (vpc->r_address) + FREE(vpc->r_address); + if (vpc->imm) + FREE(vpc->imm); + FREE(vpc); +} + +boolean +nvfx_vertprog_validate(struct nvfx_context *nvfx) +{ + struct pipe_context *pipe = &nvfx->pipe; + struct nvfx_screen *screen = nvfx->screen; + struct nouveau_channel *chan = screen->base.channel; + struct nouveau_grobj *eng3d = screen->eng3d; + struct nvfx_vertex_program *vp; + struct pipe_resource *constbuf; + struct pipe_transfer *transfer = NULL; + boolean upload_code = FALSE, upload_data = FALSE; + int i; + + if (nvfx->render_mode == HW) { + vp = nvfx->vertprog; + constbuf = nvfx->constbuf[PIPE_SHADER_VERTEX]; + + // TODO: ouch! can't we just use constant slots for these?! + if ((nvfx->dirty & NVFX_NEW_UCP) || + memcmp(&nvfx->clip, &vp->ucp, sizeof(vp->ucp))) { + nvfx_vertprog_destroy(nvfx, vp); + memcpy(&vp->ucp, &nvfx->clip, sizeof(vp->ucp)); + } + } else { + vp = nvfx->swtnl.vertprog; + constbuf = NULL; + } + + /* Translate TGSI shader into hw bytecode */ + if (!vp->translated) + { + nvfx->fallback_swtnl &= ~NVFX_NEW_VERTPROG; + nvfx_vertprog_translate(nvfx, vp); + if (!vp->translated) { + nvfx->fallback_swtnl |= NVFX_NEW_VERTPROG; + return FALSE; + } + } + + /* Allocate hw vtxprog exec slots */ + if (!vp->exec) { + struct nouveau_resource *heap = nvfx->screen->vp_exec_heap; + uint vplen = vp->nr_insns; + + if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec)) { + while (heap->next && heap->size < vplen) { + struct nvfx_vertex_program *evict; + + evict = heap->next->priv; + nouveau_resource_free(&evict->exec); + } + + if (nouveau_resource_alloc(heap, vplen, vp, &vp->exec)) + assert(0); + } + + upload_code = TRUE; + } + + /* Allocate hw vtxprog const slots */ + if (vp->nr_consts && !vp->data) { + struct nouveau_resource *heap = nvfx->screen->vp_data_heap; + + if (nouveau_resource_alloc(heap, vp->nr_consts, vp, &vp->data)) { + while (heap->next && heap->size < vp->nr_consts) { + struct nvfx_vertex_program *evict; + + evict = heap->next->priv; + nouveau_resource_free(&evict->data); + } + + if (nouveau_resource_alloc(heap, vp->nr_consts, vp, &vp->data)) + assert(0); + } + + /*XXX: handle this some day */ + assert(vp->data->start >= vp->data_start_min); + + upload_data = TRUE; + if (vp->data_start != vp->data->start) + upload_code = TRUE; + } + + /* If exec or data segments moved we need to patch the program to + * fixup offsets and register IDs. + */ + if (vp->exec_start != vp->exec->start) { + for (i = 0; i < vp->nr_insns; i++) { + struct nvfx_vertex_program_exec *vpi = &vp->insns[i]; + + if (vpi->has_branch_offset) { + assert(0); + } + } + + vp->exec_start = vp->exec->start; + } + + if (vp->nr_consts && vp->data_start != vp->data->start) { + for (i = 0; i < vp->nr_insns; i++) { + struct nvfx_vertex_program_exec *vpi = &vp->insns[i]; + + if (vpi->const_index >= 0) { + vpi->data[1] &= ~NVFX_VP(INST_CONST_SRC_MASK); + vpi->data[1] |= + (vpi->const_index + vp->data->start) << + NVFX_VP(INST_CONST_SRC_SHIFT); + + } + } + + vp->data_start = vp->data->start; + } + + /* Update + Upload constant values */ + if (vp->nr_consts) { + float *map = NULL; + + if (constbuf) { + map = pipe_buffer_map(pipe, constbuf, + PIPE_TRANSFER_READ, + &transfer); + } + + for (i = 0; i < vp->nr_consts; i++) { + struct nvfx_vertex_program_data *vpd = &vp->consts[i]; + + if (vpd->index >= 0) { + if (!upload_data && + !memcmp(vpd->value, &map[vpd->index * 4], + 4 * sizeof(float))) + continue; + memcpy(vpd->value, &map[vpd->index * 4], + 4 * sizeof(float)); + } + + BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_CONST_ID, 5); + OUT_RING (chan, i + vp->data->start); + OUT_RINGp (chan, (uint32_t *)vpd->value, 4); + } + + if (constbuf) + pipe_buffer_unmap(pipe, constbuf, transfer); + } + + /* Upload vtxprog */ + if (upload_code) { +#if 0 + for (i = 0; i < vp->nr_insns; i++) { + NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[0]); + NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[1]); + NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[2]); + NOUVEAU_MSG("VP %d: 0x%08x\n", i, vp->insns[i].data[3]); + } +#endif + BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_FROM_ID, 1); + OUT_RING (chan, vp->exec->start); + for (i = 0; i < vp->nr_insns; i++) { + BEGIN_RING(chan, eng3d, NV34TCL_VP_UPLOAD_INST(0), 4); + OUT_RINGp (chan, vp->insns[i].data, 4); + } + } + + if(nvfx->dirty & (NVFX_NEW_VERTPROG | NVFX_NEW_UCP)) + { + WAIT_RING(chan, 7); + OUT_RING(chan, RING_3D(NV34TCL_VP_START_FROM_ID, 1)); + OUT_RING(chan, vp->exec->start); + if(nvfx->is_nv4x) { + OUT_RING(chan, RING_3D(NV40TCL_VP_ATTRIB_EN, 2)); + OUT_RING(chan, vp->ir); + OUT_RING(chan, vp->or); + } + OUT_RING(chan, RING_3D(NV34TCL_VP_CLIP_PLANES_ENABLE, 1)); + OUT_RING(chan, vp->clip_ctrl); + } + + return TRUE; +} + +void +nvfx_vertprog_destroy(struct nvfx_context *nvfx, struct nvfx_vertex_program *vp) +{ + vp->translated = FALSE; + + if (vp->nr_insns) { + FREE(vp->insns); + vp->insns = NULL; + vp->nr_insns = 0; + } + + if (vp->nr_consts) { + FREE(vp->consts); + vp->consts = NULL; + vp->nr_consts = 0; + } + + nouveau_resource_free(&vp->exec); + vp->exec_start = 0; + nouveau_resource_free(&vp->data); + vp->data_start = 0; + vp->data_start_min = 0; + + vp->ir = vp->or = vp->clip_ctrl = 0; +} diff --git a/src/gallium/drivers/r300/Makefile b/src/gallium/drivers/r300/Makefile index 1f69daec819..d3cd6bef96e 100644 --- a/src/gallium/drivers/r300/Makefile +++ b/src/gallium/drivers/r300/Makefile @@ -11,15 +11,19 @@ C_SOURCES = \ r300_emit.c \ r300_flush.c \ r300_fs.c \ + r300_hyperz.c \ r300_query.c \ r300_render.c \ + r300_resource.c \ r300_screen.c \ + r300_screen_buffer.c \ r300_state.c \ r300_state_derived.c \ r300_state_invariant.c \ r300_vs.c \ r300_texture.c \ - r300_tgsi_to_rc.c + r300_tgsi_to_rc.c \ + r300_transfer.c LIBRARY_INCLUDES = \ -I$(TOP)/src/mesa/drivers/dri/r300/compiler \ diff --git a/src/gallium/drivers/r300/SConscript b/src/gallium/drivers/r300/SConscript index 183aa17f9b3..3921085d76a 100644 --- a/src/gallium/drivers/r300/SConscript +++ b/src/gallium/drivers/r300/SConscript @@ -21,15 +21,19 @@ r300 = env.ConvenienceLibrary( 'r300_emit.c', 'r300_flush.c', 'r300_fs.c', + 'r300_hyperz.c', 'r300_query.c', 'r300_render.c', + 'r300_resource.c', 'r300_screen.c', + 'r300_screen_buffer.c', 'r300_state.c', 'r300_state_derived.c', 'r300_state_invariant.c', 'r300_vs.c', 'r300_texture.c', 'r300_tgsi_to_rc.c', + 'r300_transfer.c', ] + r300compiler) + r300compiler Export('r300') diff --git a/src/gallium/drivers/r300/r300_blit.c b/src/gallium/drivers/r300/r300_blit.c index 513cc0f5d44..928ad300eee 100644 --- a/src/gallium/drivers/r300/r300_blit.c +++ b/src/gallium/drivers/r300/r300_blit.c @@ -32,10 +32,14 @@ static void r300_blitter_save_states(struct r300_context* r300) util_blitter_save_depth_stencil_alpha(r300->blitter, r300->dsa_state.state); util_blitter_save_stencil_ref(r300->blitter, &(r300->stencil_ref)); util_blitter_save_rasterizer(r300->blitter, r300->rs_state.state); - util_blitter_save_fragment_shader(r300->blitter, r300->fs); + util_blitter_save_fragment_shader(r300->blitter, r300->fs.state); util_blitter_save_vertex_shader(r300->blitter, r300->vs_state.state); util_blitter_save_viewport(r300->blitter, &r300->viewport); util_blitter_save_clip(r300->blitter, &r300->clip); + util_blitter_save_vertex_elements(r300->blitter, r300->velems); + /* XXX this crashes the driver + util_blitter_save_vertex_buffers(r300->blitter, r300->vertex_buffer_count, + r300->vertex_buffer); */ } /* Clear currently bound buffers. */ @@ -55,21 +59,10 @@ void r300_clear(struct pipe_context* pipe, * 2) ZB_DEPTHCLEARVALUE is used to clear a zbuffer and Z Mask must be * equal to 0. * - * 3) RB3D_COLOR_CLEAR_VALUE is used to clear a colorbuffer and - * RB3D_COLOR_CHANNEL_MASK must be equal to 0. - * - * 4) ZB_CB_CLEAR can be used to make the ZB units help in clearing - * the colorbuffer. The color clear value is supplied through both - * RB3D_COLOR_CLEAR_VALUE and ZB_DEPTHCLEARVALUE, and the colorbuffer - * must be set in ZB_DEPTHOFFSET and ZB_DEPTHPITCH in addition to - * RB3D_COLOROFFSET and RB3D_COLORPITCH. It's obvious that the zbuffer - * will not be cleared and multiple render targets cannot be cleared - * this way either. - * - * 5) For 16-bit integer buffering, compression causes a hung with one or + * 3) For 16-bit integer buffering, compression causes a hung with one or * two samples and should not be used. * - * 6) Fastfill must not be used if reading of compressed Z data is disabled + * 4) Fastfill must not be used if reading of compressed Z data is disabled * and writing of compressed Z data is enabled (RD/WR_COMP_ENABLE), * i.e. it cannot be used to compress the zbuffer. * (what the hell does that mean and how does it fit in clearing @@ -110,11 +103,12 @@ static void r300_hw_copy(struct pipe_context* pipe, util_blitter_save_framebuffer(r300->blitter, r300->fb_state.state); util_blitter_save_fragment_sampler_states( - r300->blitter, state->sampler_count, (void**)state->sampler_states); + r300->blitter, state->sampler_state_count, + (void**)state->sampler_states); - util_blitter_save_fragment_sampler_textures( - r300->blitter, state->texture_count, - (struct pipe_texture**)state->textures); + util_blitter_save_fragment_sampler_views( + r300->blitter, state->sampler_view_count, + (struct pipe_sampler_view**)state->sampler_views); /* Do a copy */ util_blitter_copy(r300->blitter, @@ -132,12 +126,18 @@ void r300_surface_copy(struct pipe_context* pipe, enum pipe_format old_format = dst->texture->format; enum pipe_format new_format = old_format; - assert(dst->texture->format == src->texture->format); + if (dst->texture->format != src->texture->format) { + debug_printf("r300: Implementation error: Format mismatch in %s\n" + " : src: %s dst: %s\n", __FUNCTION__, + util_format_name(src->texture->format), + util_format_name(dst->texture->format)); + debug_assert(0); + } if (!pipe->screen->is_format_supported(pipe->screen, old_format, src->texture->target, - PIPE_TEXTURE_USAGE_RENDER_TARGET | - PIPE_TEXTURE_USAGE_SAMPLER, 0)) { + PIPE_BIND_RENDER_TARGET | + PIPE_BIND_SAMPLER_VIEW, 0)) { switch (util_format_get_blocksize(old_format)) { case 1: new_format = PIPE_FORMAT_I8_UNORM; @@ -148,6 +148,9 @@ void r300_surface_copy(struct pipe_context* pipe, case 4: new_format = PIPE_FORMAT_B8G8R8A8_UNORM; break; + case 8: + new_format = PIPE_FORMAT_R16G16B16A16_UNORM; + break; default: debug_printf("r300: surface_copy: Unhandled format: %s. Falling back to software.\n" "r300: surface_copy: Software fallback doesn't work for tiled textures.\n", diff --git a/src/gallium/drivers/r300/r300_chipset.c b/src/gallium/drivers/r300/r300_chipset.c index 92de297ef1d..e6dca66d4a0 100644 --- a/src/gallium/drivers/r300/r300_chipset.c +++ b/src/gallium/drivers/r300/r300_chipset.c @@ -24,6 +24,8 @@ #include "util/u_debug.h" +#include <stdio.h> + /* r300_chipset: A file all to itself for deducing the various properties of * Radeons. */ @@ -31,13 +33,13 @@ void r300_parse_chipset(struct r300_capabilities* caps) { /* Reasonable defaults */ - caps->num_vert_fpus = 4; + caps->num_vert_fpus = 2; + caps->num_tex_units = 16; caps->has_tcl = debug_get_bool_option("RADEON_NO_TCL", FALSE) ? FALSE : TRUE; caps->is_r400 = FALSE; caps->is_r500 = FALSE; caps->high_second_pipe = FALSE; - /* Note: These are not ordered by PCI ID. I leave that task to GCC, * which will perform the ordering while collating jump tables. Instead, * I've tried to group them according to capabilities and age. */ @@ -45,6 +47,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x4144: caps->family = CHIP_FAMILY_R300; caps->high_second_pipe = TRUE; + caps->num_vert_fpus = 4; break; case 0x4145: @@ -56,6 +59,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x4E47: caps->family = CHIP_FAMILY_R300; caps->high_second_pipe = TRUE; + caps->num_vert_fpus = 4; break; case 0x4150: @@ -84,11 +88,13 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x4E4B: caps->family = CHIP_FAMILY_R350; caps->high_second_pipe = TRUE; + caps->num_vert_fpus = 4; break; case 0x4E4A: caps->family = CHIP_FAMILY_R360; caps->high_second_pipe = TRUE; + caps->num_vert_fpus = 4; break; case 0x5460: @@ -106,6 +112,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x3150: case 0x3152: case 0x3154: + case 0x3155: case 0x3E50: case 0x3E54: caps->family = CHIP_FAMILY_RV380; @@ -344,7 +351,7 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x7280: caps->family = CHIP_FAMILY_RV570; - caps->num_vert_fpus = 5; + caps->num_vert_fpus = 8; caps->is_r500 = TRUE; break; @@ -360,13 +367,14 @@ void r300_parse_chipset(struct r300_capabilities* caps) case 0x7293: case 0x7297: caps->family = CHIP_FAMILY_RV560; - caps->num_vert_fpus = 5; + caps->num_vert_fpus = 8; caps->is_r500 = TRUE; break; default: - debug_printf("r300: Warning: Unknown chipset 0x%x\n", - caps->pci_id); - break; + fprintf(stderr, "r300: Warning: Unknown chipset 0x%x\n", + caps->pci_id); } + + caps->is_rv350 = caps->family >= CHIP_FAMILY_RV350; } diff --git a/src/gallium/drivers/r300/r300_chipset.h b/src/gallium/drivers/r300/r300_chipset.h index 28084864929..ab649c38573 100644 --- a/src/gallium/drivers/r300/r300_chipset.h +++ b/src/gallium/drivers/r300/r300_chipset.h @@ -38,20 +38,32 @@ struct r300_capabilities { unsigned num_frag_pipes; /* The number of z pipes */ unsigned num_z_pipes; + /* The number of texture units. */ + unsigned num_tex_units; /* Whether or not TCL is physically present */ boolean has_tcl; - /* Whether or not this is R400. The differences compared to their R3xx + /* Whether or not this is RV350 or newer, including all r400 and r500 + * chipsets. The differences compared to the oldest r300 chips are: + * - Blend LTE/GTE thresholds + * - Better MACRO_SWITCH in texture tiling + * - Half float vertex + * - More HyperZ optimizations */ + boolean is_rv350; + /* Whether or not this is R400. The differences compared their rv350 * cousins are: * - Extended fragment shader registers - * - Blend LTE/GTE thresholds */ + * - 3DC texture compression (RGTC2) */ boolean is_r400; /* Whether or not this is an RV515 or newer; R500s have many differences - * that require extra consideration, compared to their R3xx cousins: + * that require extra consideration, compared to their rv350 cousins: * - Extra bit of width and height on texture sizes * - Blend color is split across two registers - * - Blend LTE/GTE thresholds * - Universal Shader (US) block used for fragment shaders - * - FP16 blending and multisampling */ + * - FP16 blending and multisampling + * - Full RGTC texture compression + * - 24-bit depth textures + * - Stencil back-face reference value + * - Ability to render up to 2^24 - 1 vertices with signed index offset */ boolean is_r500; /* Whether or not the second pixel pipe is accessed with the high bit */ boolean high_second_pipe; diff --git a/src/gallium/drivers/r300/r300_context.c b/src/gallium/drivers/r300/r300_context.c index 86b98a4ba52..4f721ebb599 100644 --- a/src/gallium/drivers/r300/r300_context.c +++ b/src/gallium/drivers/r300/r300_context.c @@ -24,6 +24,7 @@ #include "util/u_memory.h" #include "util/u_simple_list.h" +#include "util/u_upload_mgr.h" #include "r300_blit.h" #include "r300_context.h" @@ -32,21 +33,33 @@ #include "r300_query.h" #include "r300_render.h" #include "r300_screen.h" +#include "r300_screen_buffer.h" #include "r300_state_invariant.h" -#include "r300_texture.h" +#include "r300_winsys.h" -#include "radeon_winsys.h" +#include <inttypes.h> static void r300_destroy_context(struct pipe_context* context) { struct r300_context* r300 = r300_context(context); struct r300_query* query, * temp; + struct r300_atom *atom; util_blitter_destroy(r300->blitter); draw_destroy(r300->draw); + /* Print stats, if enabled. */ + if (SCREEN_DBG_ON(r300->screen, DBG_STATS)) { + fprintf(stderr, "r300: Stats for context %p:\n", r300); + fprintf(stderr, " : Flushes: %" PRIu64 "\n", r300->flush_counter); + foreach(atom, &r300->atom_list) { + fprintf(stderr, " : %s: %" PRIu64 " emits\n", + atom->name, atom->counter); + } + } + /* Free the OQ BO. */ - context->screen->buffer_destroy(r300->oqbo); + context->screen->resource_destroy(context->screen, r300->oqbo); /* If there are any queries pending or not destroyed, remove them now. */ foreach_s(query, temp, &r300->query_list) { @@ -54,42 +67,23 @@ static void r300_destroy_context(struct pipe_context* context) FREE(query); } + u_upload_destroy(r300->upload_vb); + u_upload_destroy(r300->upload_ib); + FREE(r300->blend_color_state.state); FREE(r300->clip_state.state); FREE(r300->fb_state.state); FREE(r300->rs_block_state.state); FREE(r300->scissor_state.state); FREE(r300->textures_state.state); - FREE(r300->vertex_stream_state.state); FREE(r300->vap_output_state.state); FREE(r300->viewport_state.state); FREE(r300->ztop_state.state); + FREE(r300->fs_constants.state); + FREE(r300->vs_constants.state); FREE(r300); } -static unsigned int -r300_is_texture_referenced(struct pipe_context *pipe, - struct pipe_texture *texture, - unsigned face, unsigned level) -{ - struct pipe_buffer* buf = 0; - - r300_get_texture_buffer(pipe->screen, texture, &buf, NULL); - - return pipe->is_buffer_referenced(pipe, buf); -} - -static unsigned int -r300_is_buffer_referenced(struct pipe_context *pipe, - struct pipe_buffer *buf) -{ - /* This only checks to see whether actual hardware buffers are - * referenced. Since we use managed BOs and transfers, it's actually not - * possible for pipe_buffers to ever reference the actual hardware, so - * buffers are never referenced. */ - return 0; -} - static void r300_flush_cb(void *data) { struct r300_context* const cs_context_copy = data; @@ -107,8 +101,8 @@ static void r300_flush_cb(void *data) static void r300_setup_atoms(struct r300_context* r300) { - boolean is_r500 = r300_screen(r300->context.screen)->caps->is_r500; - boolean has_tcl = r300_screen(r300->context.screen)->caps->has_tcl; + boolean is_r500 = r300->screen->caps.is_r500; + boolean has_tcl = r300->screen->caps.has_tcl; /* Create the actual atom list. * @@ -119,6 +113,7 @@ static void r300_setup_atoms(struct r300_context* r300) * the size of 0 here. */ make_empty_list(&r300->atom_list); R300_INIT_ATOM(invariant_state, 71); + R300_INIT_ATOM(query_start, 4); R300_INIT_ATOM(ztop_state, 2); R300_INIT_ATOM(blend_state, 8); R300_INIT_ATOM(blend_color_state, is_r500 ? 3 : 2); @@ -133,8 +128,19 @@ static void r300_setup_atoms(struct r300_context* r300) R300_INIT_ATOM(vap_output_state, 6); R300_INIT_ATOM(pvs_flush, 2); R300_INIT_ATOM(vs_state, 0); + R300_INIT_ATOM(vs_constants, 0); R300_INIT_ATOM(texture_cache_inval, 2); R300_INIT_ATOM(textures_state, 0); + R300_INIT_ATOM(fs, 0); + R300_INIT_ATOM(fs_rc_constant_state, 0); + R300_INIT_ATOM(fs_constants, 0); + + /* Replace emission functions for r500. */ + if (r300->screen->caps.is_r500) { + r300->fs.emit = r500_emit_fs; + r300->fs_rc_constant_state.emit = r500_emit_fs_rc_constant_state; + r300->fs_constants.emit = r500_emit_fs_constants; + } /* Some non-CSO atoms need explicit space to store the state locally. */ r300->blend_color_state.state = CALLOC_STRUCT(r300_blend_color_state); @@ -143,10 +149,11 @@ static void r300_setup_atoms(struct r300_context* r300) r300->rs_block_state.state = CALLOC_STRUCT(r300_rs_block); r300->scissor_state.state = CALLOC_STRUCT(pipe_scissor_state); r300->textures_state.state = CALLOC_STRUCT(r300_textures_state); - r300->vertex_stream_state.state = CALLOC_STRUCT(r300_vertex_stream_state); r300->vap_output_state.state = CALLOC_STRUCT(r300_vap_output_state); r300->viewport_state.state = CALLOC_STRUCT(r300_viewport_state); r300->ztop_state.state = CALLOC_STRUCT(r300_ztop_state); + r300->fs_constants.state = CALLOC_STRUCT(r300_constant_buffer); + r300->vs_constants.state = CALLOC_STRUCT(r300_constant_buffer); } struct pipe_context* r300_create_context(struct pipe_screen* screen, @@ -154,14 +161,15 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, { struct r300_context* r300 = CALLOC_STRUCT(r300_context); struct r300_screen* r300screen = r300_screen(screen); - struct radeon_winsys* radeon_winsys = r300screen->radeon_winsys; + struct r300_winsys_screen *rws = r300screen->rws; if (!r300) return NULL; - r300->winsys = radeon_winsys; + r300->rws = rws; + r300->screen = r300screen; - r300->context.winsys = (struct pipe_winsys*)radeon_winsys; + r300->context.winsys = (struct pipe_winsys*)rws; r300->context.screen = screen; r300->context.priv = priv; @@ -171,17 +179,27 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, r300->context.surface_copy = r300_surface_copy; r300->context.surface_fill = r300_surface_fill; - if (r300screen->caps->has_tcl) { + if (r300screen->caps.has_tcl) { r300->context.draw_arrays = r300_draw_arrays; r300->context.draw_elements = r300_draw_elements; r300->context.draw_range_elements = r300_draw_range_elements; + + if (r300screen->caps.is_r500) { + r300->emit_draw_arrays_immediate = r500_emit_draw_arrays_immediate; + r300->emit_draw_arrays = r500_emit_draw_arrays; + r300->emit_draw_elements = r500_emit_draw_elements; + } else { + r300->emit_draw_arrays_immediate = r300_emit_draw_arrays_immediate; + r300->emit_draw_arrays = r300_emit_draw_arrays; + r300->emit_draw_elements = r300_emit_draw_elements; + } } else { r300->context.draw_arrays = r300_swtcl_draw_arrays; r300->context.draw_elements = r300_draw_elements; r300->context.draw_range_elements = r300_swtcl_draw_range_elements; /* Create a Draw. This is used for SW TCL. */ - r300->draw = draw_create(); + r300->draw = draw_create(&r300->context); /* Enable our renderer. */ draw_set_rasterize_stage(r300->draw, r300_draw_stage(r300)); /* Enable Draw's clipping. */ @@ -191,31 +209,43 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, draw_set_viewport_state(r300->draw, &r300_viewport_identity); } - r300->context.is_texture_referenced = r300_is_texture_referenced; - r300->context.is_buffer_referenced = r300_is_buffer_referenced; - r300_setup_atoms(r300); /* Open up the OQ BO. */ - r300->oqbo = screen->buffer_create(screen, 4096, - PIPE_BUFFER_USAGE_VERTEX, 4096); + r300->oqbo = pipe_buffer_create(screen, + R300_BIND_OQBO, 4096); make_empty_list(&r300->query_list); r300_init_flush_functions(r300); - r300_init_query_functions(r300); - - /* r300_init_surface_functions(r300); */ - r300_init_state_functions(r300); + r300_init_resource_functions(r300); r300->invariant_state.dirty = TRUE; - r300->winsys->set_flush_cb(r300->winsys, r300_flush_cb, r300); - r300->dirty_state = R300_NEW_KITCHEN_SINK; + rws->set_flush_cb(r300->rws, r300_flush_cb, r300); r300->dirty_hw++; r300->blitter = util_blitter_create(&r300->context); + r300->upload_ib = u_upload_create(&r300->context, + 32 * 1024, 16, + PIPE_BIND_INDEX_BUFFER); + + if (r300->upload_ib == NULL) + goto no_upload_ib; + + r300->upload_vb = u_upload_create(&r300->context, + 128 * 1024, 16, + PIPE_BIND_VERTEX_BUFFER); + if (r300->upload_vb == NULL) + goto no_upload_vb; + return &r300->context; + + no_upload_ib: + u_upload_destroy(r300->upload_ib); + no_upload_vb: + FREE(r300); + return NULL; } diff --git a/src/gallium/drivers/r300/r300_context.h b/src/gallium/drivers/r300/r300_context.h index 0d1518a05bc..b6e20591eda 100644 --- a/src/gallium/drivers/r300/r300_context.h +++ b/src/gallium/drivers/r300/r300_context.h @@ -29,9 +29,12 @@ #include "pipe/p_context.h" #include "util/u_inlines.h" +#include "util/u_transfer.h" +#include "r300_defines.h" #include "r300_screen.h" +struct u_upload_mgr; struct r300_context; struct r300_fragment_shader; @@ -42,6 +45,8 @@ struct r300_atom { struct r300_atom *prev, *next; /* Name, for debugging. */ const char* name; + /* Stat counter. */ + uint64_t counter; /* Opaque state. */ void* state; /* Emit the state to the context. */ @@ -50,8 +55,6 @@ struct r300_atom { unsigned size; /* Whether this atom should be emitted. */ boolean dirty; - /* Another dirty flag that is never automatically cleared. */ - boolean always_dirty; }; struct r300_blend_state { @@ -77,6 +80,11 @@ struct r300_dsa_state { uint32_t z_stencil_control; /* R300_ZB_ZSTENCILCNTL: 0x4f04 */ uint32_t stencil_ref_mask; /* R300_ZB_STENCILREFMASK: 0x4f08 */ uint32_t stencil_ref_bf; /* R500_ZB_STENCILREFMASK_BF: 0x4fd4 */ + + /* Whether a two-sided stencil is enabled. */ + boolean two_sided; + /* Whether a fallback should be used for a two-sided stencil ref value. */ + boolean stencil_ref_bf_fallback; }; struct r300_rs_state { @@ -97,6 +105,17 @@ struct r300_rs_state { uint32_t line_stipple_value; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */ uint32_t color_control; /* R300_GA_COLOR_CONTROL: 0x4278 */ uint32_t polygon_mode; /* R300_GA_POLY_MODE: 0x4288 */ + uint32_t clip_rule; /* R300_SC_CLIP_RULE: 0x43D0 */ + + /* Specifies top of Raster pipe specific enable controls, + * i.e. texture coordinates stuffing for points, lines, triangles */ + uint32_t stuffing_enable; /* R300_GB_ENABLE: 0x4008 */ + + /* Point sprites texture coordinates, 0: lower left, 1: upper right */ + float point_texcoord_left; /* R300_GA_POINT_S0: 0x4200 */ + float point_texcoord_bottom; /* R300_GA_POINT_T0: 0x4204 */ + float point_texcoord_right; /* R300_GA_POINT_S1: 0x4208 */ + float point_texcoord_top; /* R300_GA_POINT_T1: 0x420c */ }; struct r300_rs_block { @@ -122,35 +141,44 @@ struct r300_texture_format_state { uint32_t format0; /* R300_TX_FORMAT0: 0x4480 */ uint32_t format1; /* R300_TX_FORMAT1: 0x44c0 */ uint32_t format2; /* R300_TX_FORMAT2: 0x4500 */ + uint32_t tile_config; /* R300_TX_OFFSET (subset thereof) */ +}; + +struct r300_sampler_view { + struct pipe_sampler_view base; + + /* Copy of r300_texture::texture_format_state with format-specific bits + * added. */ + struct r300_texture_format_state format; }; struct r300_texture_fb_state { /* Colorbuffer. */ - uint32_t colorpitch[PIPE_MAX_TEXTURE_LEVELS]; /* R300_RB3D_COLORPITCH[0-3]*/ + uint32_t colorpitch[R300_MAX_TEXTURE_LEVELS]; /* R300_RB3D_COLORPITCH[0-3]*/ uint32_t us_out_fmt; /* R300_US_OUT_FMT[0-3] */ /* Zbuffer. */ - uint32_t depthpitch[PIPE_MAX_TEXTURE_LEVELS]; /* R300_RB3D_DEPTHPITCH */ + uint32_t depthpitch[R300_MAX_TEXTURE_LEVELS]; /* R300_RB3D_DEPTHPITCH */ uint32_t zb_format; /* R300_ZB_FORMAT */ }; struct r300_textures_state { /* Textures. */ - struct r300_texture *textures[8]; - int texture_count; + struct r300_sampler_view *sampler_views[16]; + int sampler_view_count; /* Sampler states. */ - struct r300_sampler_state *sampler_states[8]; - int sampler_count; + struct r300_sampler_state *sampler_states[16]; + int sampler_state_count; - /* These is the merge of the texture and sampler states. */ + /* This is the merge of the texture and sampler states. */ unsigned count; uint32_t tx_enable; /* R300_TX_ENABLE: 0x4101 */ struct r300_texture_sampler_state { - uint32_t format[3]; /* R300_TX_FORMAT[0-2] */ - uint32_t filter[2]; /* R300_TX_FILTER[0-1] */ + struct r300_texture_format_state format; + uint32_t filter0; /* R300_TX_FILTER0: 0x4400 */ + uint32_t filter1; /* R300_TX_FILTER1: 0x4440 */ uint32_t border_color; /* R300_TX_BORDER_COLOR: 0x45c0 */ - uint32_t tile_config; /* R300_TX_OFFSET (subset thereof) */ - } regs[8]; + } regs[16]; }; struct r300_vertex_stream_state { @@ -182,12 +210,6 @@ struct r300_ztop_state { uint32_t z_buffer_top; /* R300_ZB_ZTOP: 0x4f14 */ }; -#define R300_NEW_FRAGMENT_SHADER 0x00000020 -#define R300_NEW_FRAGMENT_SHADER_CONSTANTS 0x00000040 -#define R300_NEW_VERTEX_SHADER_CONSTANTS 0x10000000 -#define R300_NEW_QUERY 0x40000000 -#define R300_NEW_KITCHEN_SINK 0x7fffffff - /* The next several objects are not pure Radeon state; they inherit from * various Gallium classes. */ @@ -225,27 +247,21 @@ struct r300_query { struct r300_query* next; }; -enum r300_buffer_tiling { - R300_BUFFER_LINEAR = 0, - R300_BUFFER_TILED, - R300_BUFFER_SQUARETILED -}; - struct r300_texture { /* Parent class */ - struct pipe_texture tex; + struct u_resource b; /* Offsets into the buffer. */ - unsigned offset[PIPE_MAX_TEXTURE_LEVELS]; + unsigned offset[R300_MAX_TEXTURE_LEVELS]; /* A pitch for each mip-level */ - unsigned pitch[PIPE_MAX_TEXTURE_LEVELS]; + unsigned pitch[R300_MAX_TEXTURE_LEVELS]; /* Size of one zslice or face based on the texture target */ - unsigned layer_size[PIPE_MAX_TEXTURE_LEVELS]; + unsigned layer_size[R300_MAX_TEXTURE_LEVELS]; /* Whether the mipmap level is macrotiled. */ - enum r300_buffer_tiling mip_macrotile[PIPE_MAX_TEXTURE_LEVELS]; + enum r300_buffer_tiling mip_macrotile[R300_MAX_TEXTURE_LEVELS]; /** * If non-zero, override the natural texture layout with @@ -260,42 +276,80 @@ struct r300_texture { /* Total size of this texture, in bytes. */ unsigned size; - /* Whether this texture has non-power-of-two dimensions. + /* Whether this texture has non-power-of-two dimensions + * or a user-specified pitch. * It can be either a regular texture or a rectangle one. */ - boolean is_npot; + boolean uses_pitch; /* Pipe buffer backing this texture. */ - struct pipe_buffer* buffer; + struct r300_winsys_buffer *buffer; /* Registers carrying texture format data. */ - struct r300_texture_format_state state; + /* Only format-independent bits should be filled in. */ + struct r300_texture_format_state tx_format; + /* All bits should be filled in. */ struct r300_texture_fb_state fb_state; /* Buffer tiling */ enum r300_buffer_tiling microtile, macrotile; }; +struct r300_vertex_info { + /* Parent class */ + struct vertex_info vinfo; + + /* R300_VAP_PROG_STREAK_CNTL_[0-7] */ + uint32_t vap_prog_stream_cntl[8]; + /* R300_VAP_PROG_STREAK_CNTL_EXT_[0-7] */ + uint32_t vap_prog_stream_cntl_ext[8]; +}; + +struct r300_vertex_element_state { + unsigned count; + struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS]; + + struct r300_vertex_stream_state vertex_stream; +}; + extern struct pipe_viewport_state r300_viewport_identity; struct r300_context { /* Parent class */ struct pipe_context context; + /* Emission of drawing packets. */ + void (*emit_draw_arrays_immediate)( + struct r300_context *r300, + unsigned mode, unsigned start, unsigned count); + + void (*emit_draw_arrays)( + struct r300_context *r300, + unsigned mode, unsigned count); + + void (*emit_draw_elements)( + struct r300_context *r300, struct pipe_resource* indexBuffer, + unsigned indexSize, int indexBias, + unsigned minIndex, unsigned maxIndex, + unsigned mode, unsigned start, unsigned count); + + /* The interface to the windowing system, etc. */ - struct radeon_winsys* winsys; + struct r300_winsys_screen *rws; + /* Screen. */ + struct r300_screen *screen; /* Draw module. Used mostly for SW TCL. */ struct draw_context* draw; /* Accelerated blit support. */ struct blitter_context* blitter; /* Vertex buffer for rendering. */ - struct pipe_buffer* vbo; + struct pipe_resource* vbo; /* Offset into the VBO. */ size_t vbo_offset; /* Occlusion query buffer. */ - struct pipe_buffer* oqbo; + struct pipe_resource* oqbo; /* Query list. */ struct r300_query *query_current; struct r300_query query_list; @@ -309,14 +363,18 @@ struct r300_context { struct r300_atom blend_color_state; /* User clip planes. */ struct r300_atom clip_state; - /* Shader constants. */ - struct r300_constant_buffer shader_constants[PIPE_SHADER_TYPES]; /* Depth, stencil, and alpha state. */ struct r300_atom dsa_state; /* Fragment shader. */ - struct r300_fragment_shader* fs; + struct r300_atom fs; + /* Fragment shader RC_CONSTANT_STATE variables. */ + struct r300_atom fs_rc_constant_state; + /* Fragment shader constant buffer. */ + struct r300_atom fs_constants; /* Framebuffer state. */ struct r300_atom fb_state; + /* Occlusion query. */ + struct r300_atom query_start; /* Rasterizer state. */ struct r300_atom rs_state; /* RS block state. */ @@ -331,6 +389,8 @@ struct r300_context { struct r300_atom vap_output_state; /* Vertex shader. */ struct r300_atom vs_state; + /* Vertex shader constant buffer. */ + struct r300_atom vs_constants; /* Viewport state. */ struct r300_atom viewport_state; /* ZTOP state. */ @@ -348,8 +408,8 @@ struct r300_context { int vertex_buffer_count; int vertex_buffer_max_index; /* Vertex elements for Gallium. */ - struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS]; - int vertex_element_count; + struct r300_vertex_element_state *velems; + bool any_user_vbs; /* Vertex info for Draw. */ struct vertex_info vertex_info; @@ -360,22 +420,43 @@ struct r300_context { struct pipe_viewport_state viewport; - /* Bitmask of dirty state objects. */ - uint32_t dirty_state; /* Flag indicating whether or not the HW is dirty. */ uint32_t dirty_hw; /* Whether polygon offset is enabled. */ boolean polygon_offset_enabled; /* Z buffer bit depth. */ uint32_t zbuffer_bpp; + /* Whether rendering is conditional and should be skipped. */ + boolean skip_rendering; + /* Whether the two-sided stencil ref value is different for front and + * back faces, and fallback should be used for r3xx-r4xx. */ + boolean stencil_ref_bf_fallback; + /* Point sprites texcoord index, 1 bit per texcoord */ + int sprite_coord_enable; + + /* upload managers */ + struct u_upload_mgr *upload_vb; + struct u_upload_mgr *upload_ib; + + /* Stat counter. */ + uint64_t flush_counter; }; /* Convenience cast wrapper. */ +static INLINE struct r300_texture* r300_texture(struct pipe_resource* tex) +{ + return (struct r300_texture*)tex; +} + static INLINE struct r300_context* r300_context(struct pipe_context* context) { return (struct r300_context*)context; } +static INLINE struct r300_fragment_shader *r300_fs(struct r300_context *r300) +{ + return (struct r300_fragment_shader*)r300->fs.state; +} struct pipe_context* r300_create_context(struct pipe_screen* screen, void *priv); @@ -383,11 +464,11 @@ struct pipe_context* r300_create_context(struct pipe_screen* screen, /* Context initialization. */ struct draw_stage* r300_draw_stage(struct r300_context* r300); void r300_init_state_functions(struct r300_context* r300); -void r300_init_surface_functions(struct r300_context* r300); +void r300_init_resource_functions(struct r300_context* r300); static INLINE boolean CTX_DBG_ON(struct r300_context * ctx, unsigned flags) { - return SCREEN_DBG_ON(r300_screen(ctx->context.screen), flags); + return SCREEN_DBG_ON(ctx->screen, flags); } static INLINE void CTX_DBG(struct r300_context * ctx, unsigned flags, @@ -396,7 +477,7 @@ static INLINE void CTX_DBG(struct r300_context * ctx, unsigned flags, if (CTX_DBG_ON(ctx, flags)) { va_list va; va_start(va, fmt); - debug_vprintf(fmt, va); + vfprintf(stderr, fmt, va); va_end(va); } } @@ -405,4 +486,3 @@ static INLINE void CTX_DBG(struct r300_context * ctx, unsigned flags, #define DBG CTX_DBG #endif /* R300_CONTEXT_H */ - diff --git a/src/gallium/drivers/r300/r300_cs.h b/src/gallium/drivers/r300/r300_cs.h index 151f72b0fe4..996a4f491e7 100644 --- a/src/gallium/drivers/r300/r300_cs.h +++ b/src/gallium/drivers/r300/r300_cs.h @@ -26,8 +26,7 @@ #include "util/u_math.h" #include "r300_reg.h" - -#include "radeon_winsys.h" +#include "r300_winsys.h" /* Yes, I know macros are ugly. However, they are much prettier than the code * that they neatly hide away, and don't have the cost of function setup,so @@ -51,7 +50,7 @@ #define CS_LOCALS(context) \ struct r300_context* const cs_context_copy = (context); \ - struct radeon_winsys* cs_winsys = cs_context_copy->winsys; \ + struct r300_winsys_screen *cs_winsys = cs_context_copy->rws; \ int cs_count = 0; (void) cs_count; #define CHECK_CS(size) \ @@ -105,22 +104,41 @@ cs_count--; \ } while (0) -#define OUT_CS_RELOC(bo, offset, rd, wd, flags) do { \ +#define OUT_CS_TABLE(values, count) do { \ + if (VERY_VERBOSE_REGISTERS) \ + DBG(cs_context_copy, DBG_CS, "r300: writing table of %d dwords\n", count); \ + cs_winsys->write_cs_table(cs_winsys, values, count); \ + cs_count -= count; \ +} while (0) + +#define OUT_CS_BUF_RELOC(bo, offset, rd, wd, flags) do { \ DBG(cs_context_copy, DBG_CS, "r300: writing relocation for buffer %p, offset %d, " \ "domains (%d, %d, %d)\n", \ bo, offset, rd, wd, flags); \ assert(bo); \ cs_winsys->write_cs_dword(cs_winsys, offset); \ - cs_winsys->write_cs_reloc(cs_winsys, bo, rd, wd, flags); \ + r300_buffer_write_reloc(cs_winsys, r300_buffer(bo), rd, wd, flags); \ + cs_count -= 3; \ +} while (0) + + +#define OUT_CS_TEX_RELOC(tex, offset, rd, wd, flags) do { \ + DBG(cs_context_copy, DBG_CS, "r300: writing relocation for texture %p, offset %d, " \ + "domains (%d, %d, %d)\n", \ + tex, offset, rd, wd, flags); \ + assert(tex); \ + cs_winsys->write_cs_dword(cs_winsys, offset); \ + r300_texture_write_reloc(cs_winsys, tex, rd, wd, flags); \ cs_count -= 3; \ } while (0) -#define OUT_CS_RELOC_NO_OFFSET(bo, rd, wd, flags) do { \ + +#define OUT_CS_BUF_RELOC_NO_OFFSET(bo, rd, wd, flags) do { \ DBG(cs_context_copy, DBG_CS, "r300: writing relocation for buffer %p, " \ "domains (%d, %d, %d)\n", \ bo, rd, wd, flags); \ assert(bo); \ - cs_winsys->write_cs_reloc(cs_winsys, bo, rd, wd, flags); \ + r300_buffer_write_reloc(cs_winsys, r300_buffer(bo), rd, wd, flags); \ cs_count -= 2; \ } while (0) @@ -139,6 +157,9 @@ DBG(cs_context_copy, DBG_CS, "r300: FLUSH_CS in %s (%s:%d)\n\n", __FUNCTION__, \ __FILE__, __LINE__); \ } \ + if (SCREEN_DBG_ON(r300->screen, DBG_STATS)) { \ + r300->flush_counter++; \ + } \ cs_winsys->flush_cs(cs_winsys); \ } while (0) diff --git a/src/gallium/drivers/r300/r300_debug.c b/src/gallium/drivers/r300/r300_debug.c index b881730848a..aed0ffeeccb 100644 --- a/src/gallium/drivers/r300/r300_debug.c +++ b/src/gallium/drivers/r300/r300_debug.c @@ -22,6 +22,7 @@ #include "r300_context.h" +#include <stdio.h> struct debug_option { const char * name; @@ -31,12 +32,16 @@ struct debug_option { static struct debug_option debug_options[] = { { "help", DBG_HELP, "Helpful meta-information about the driver" }, - { "fp", DBG_FP, "Fragment program handling" }, - { "vp", DBG_VP, "Vertex program handling" }, - { "cs", DBG_CS, "Command submissions" }, - { "draw", DBG_DRAW, "Draw and emit" }, - { "tex", DBG_TEX, "Textures" }, - { "fall", DBG_FALL, "Fallbacks" }, + { "fp", DBG_FP, "Fragment program handling (for debugging)" }, + { "vp", DBG_VP, "Vertex program handling (for debugging)" }, + { "cs", DBG_CS, "Command submissions (for debugging)" }, + { "draw", DBG_DRAW, "Draw and emit (for debugging)" }, + { "tex", DBG_TEX, "Textures (for debugging)" }, + { "fall", DBG_FALL, "Fallbacks (for debugging)" }, + { "anisohq", DBG_ANISOHQ, "High quality anisotropic filtering (for benchmarking)" }, + { "notiling", DBG_NO_TILING, "Disable tiling (for benchmarking)" }, + { "noimmd", DBG_NO_IMMD, "Disable immediate mode (for benchmarking)" }, + { "stats", DBG_STATS, "Gather statistics (for lulz)" }, { "all", ~0, "Convenience option that enables all debug flags" }, @@ -68,7 +73,7 @@ void r300_init_debug(struct r300_screen * screen) } if (!opt->name) { - debug_printf("Unknown debug option: %s\n", options); + fprintf(stderr, "Unknown debug option: %s\n", options); printhint = TRUE; } @@ -80,10 +85,13 @@ void r300_init_debug(struct r300_screen * screen) } if (printhint || screen->debug & DBG_HELP) { - debug_printf("You can enable debug output by setting the RADEON_DEBUG environment variable\n" - "to a comma-separated list of debug options. Available options are:\n"); + fprintf(stderr, "You can enable debug output by setting " + "the RADEON_DEBUG environment variable\n" + "to a comma-separated list of debug options. " + "Available options are:\n"); + for(opt = debug_options; opt->name; ++opt) { - debug_printf(" %s: %s\n", opt->name, opt->description); + fprintf(stderr, " %s: %s\n", opt->name, opt->description); } } } diff --git a/src/gallium/drivers/r300/r300_defines.h b/src/gallium/drivers/r300/r300_defines.h new file mode 100644 index 00000000000..98ee3c1edec --- /dev/null +++ b/src/gallium/drivers/r300/r300_defines.h @@ -0,0 +1,46 @@ +/* + * Copyright 2010 Marek Olšák <[email protected]> + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_DEFINES_H +#define R300_DEFINES_H + +#include "pipe/p_defines.h" + +#define R300_MAX_TEXTURE_LEVELS 13 +#define R300_MAX_DRAW_VBO_SIZE (1024 * 1024) + +#define R300_RESOURCE_FLAG_TRANSFER PIPE_RESOURCE_FLAG_DRV_PRIV + +/* XXX: this is just a bandaid on larger problems in + * r300_screen_buffer.h which doesn't seem to be fully ported to + * gallium-resources. + */ +#define R300_BIND_OQBO (1<<21) + +/* Tiling flags. */ +enum r300_buffer_tiling { + R300_BUFFER_LINEAR = 0, + R300_BUFFER_TILED, + R300_BUFFER_SQUARETILED +}; + +#endif diff --git a/src/gallium/drivers/r300/r300_emit.c b/src/gallium/drivers/r300/r300_emit.c index addb28bded3..92b7517b8d6 100644 --- a/src/gallium/drivers/r300/r300_emit.c +++ b/src/gallium/drivers/r300/r300_emit.c @@ -32,6 +32,7 @@ #include "r300_emit.h" #include "r300_fs.h" #include "r300_screen.h" +#include "r300_screen_buffer.h" #include "r300_vs.h" void r300_emit_blend_state(struct r300_context* r300, @@ -63,10 +64,9 @@ void r300_emit_blend_color_state(struct r300_context* r300, unsigned size, void* state) { struct r300_blend_color_state* bc = (struct r300_blend_color_state*)state; - struct r300_screen* r300screen = r300_screen(r300->context.screen); CS_LOCALS(r300); - if (r300screen->caps->is_r500) { + if (r300->screen->caps.is_r500) { BEGIN_CS(size); OUT_CS_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2); OUT_CS(bc->blend_color_red_alpha); @@ -83,22 +83,15 @@ void r300_emit_clip_state(struct r300_context* r300, unsigned size, void* state) { struct pipe_clip_state* clip = (struct pipe_clip_state*)state; - int i; - struct r300_screen* r300screen = r300_screen(r300->context.screen); CS_LOCALS(r300); - if (r300screen->caps->has_tcl) { + if (r300->screen->caps.has_tcl) { BEGIN_CS(size); OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, - (r300screen->caps->is_r500 ? + (r300->screen->caps.is_r500 ? R500_PVS_UCP_START : R300_PVS_UCP_START)); OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4); - for (i = 0; i < 6; i++) { - OUT_CS_32F(clip->ucp[i][0]); - OUT_CS_32F(clip->ucp[i][1]); - OUT_CS_32F(clip->ucp[i][2]); - OUT_CS_32F(clip->ucp[i][3]); - } + OUT_CS_TABLE(clip->ucp, 6 * 4); OUT_CS_REG(R300_VAP_CLIP_CNTL, ((1 << clip->nr) - 1) | R300_PS_UCP_MODE_CLIP_AS_TRIFAN); END_CS; @@ -107,13 +100,11 @@ void r300_emit_clip_state(struct r300_context* r300, OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE); END_CS; } - } void r300_emit_dsa_state(struct r300_context* r300, unsigned size, void* state) { struct r300_dsa_state* dsa = (struct r300_dsa_state*)state; - struct r300_screen* r300screen = r300_screen(r300->context.screen); struct pipe_framebuffer_state* fb = (struct pipe_framebuffer_state*)r300->fb_state.state; struct pipe_stencil_ref stencil_ref = r300->stencil_ref; @@ -133,68 +124,47 @@ void r300_emit_dsa_state(struct r300_context* r300, unsigned size, void* state) OUT_CS(dsa->stencil_ref_mask | stencil_ref.ref_value[0]); - if (r300screen->caps->is_r500) { + if (r300->screen->caps.is_r500) { OUT_CS_REG(R500_ZB_STENCILREFMASK_BF, dsa->stencil_ref_bf | stencil_ref.ref_value[1]); } END_CS; } -static const float * get_shader_constant( +static const float * get_rc_constant_state( struct r300_context * r300, - struct rc_constant * constant, - struct r300_constant_buffer * externals) + struct rc_constant * constant) { - struct r300_viewport_state* viewport = - (struct r300_viewport_state*)r300->viewport_state.state; - struct r300_textures_state* texstate = - (struct r300_textures_state*)r300->textures_state.state; + struct r300_viewport_state* viewport = r300->viewport_state.state; + struct r300_textures_state* texstate = r300->textures_state.state; static float vec[4] = { 0.0, 0.0, 0.0, 1.0 }; - struct pipe_texture *tex; - - switch(constant->Type) { - case RC_CONSTANT_EXTERNAL: - return externals->constants[constant->u.External]; - - case RC_CONSTANT_IMMEDIATE: - return constant->u.Immediate; - - case RC_CONSTANT_STATE: - switch (constant->u.State[0]) { - /* Factor for converting rectangle coords to - * normalized coords. Should only show up on non-r500. */ - case RC_STATE_R300_TEXRECT_FACTOR: - tex = &texstate->textures[constant->u.State[1]]->tex; - vec[0] = 1.0 / tex->width0; - vec[1] = 1.0 / tex->height0; - break; - - /* Texture compare-fail value. Shouldn't ever show up, but if - * it does, we'll be ready. */ - case RC_STATE_SHADOW_AMBIENT: - vec[3] = 0; - break; - - case RC_STATE_R300_VIEWPORT_SCALE: - vec[0] = viewport->xscale; - vec[1] = viewport->yscale; - vec[2] = viewport->zscale; - break; - - case RC_STATE_R300_VIEWPORT_OFFSET: - vec[0] = viewport->xoffset; - vec[1] = viewport->yoffset; - vec[2] = viewport->zoffset; - break; - - default: - debug_printf("r300: Implementation error: " - "Unknown RC_CONSTANT type %d\n", constant->u.State[0]); - } + struct pipe_resource *tex; + + assert(constant->Type == RC_CONSTANT_STATE); + + switch (constant->u.State[0]) { + /* Factor for converting rectangle coords to + * normalized coords. Should only show up on non-r500. */ + case RC_STATE_R300_TEXRECT_FACTOR: + tex = texstate->sampler_views[constant->u.State[1]]->base.texture; + vec[0] = 1.0 / tex->width0; + vec[1] = 1.0 / tex->height0; + break; + + case RC_STATE_R300_VIEWPORT_SCALE: + vec[0] = viewport->xscale; + vec[1] = viewport->yscale; + vec[2] = viewport->zscale; + break; + + case RC_STATE_R300_VIEWPORT_OFFSET: + vec[0] = viewport->xoffset; + vec[1] = viewport->yoffset; + vec[2] = viewport->zoffset; break; default: - debug_printf("r300: Implementation error: " - "Unhandled constant type %d\n", constant->Type); + fprintf(stderr, "r300: Implementation error: " + "Unknown RC_CONSTANT type %d\n", constant->u.State[0]); } /* This should either be (0, 0, 0, 1), which should be a relatively safe @@ -237,24 +207,37 @@ static uint32_t pack_float24(float f) return float24; } -void r300_emit_fragment_program_code(struct r300_context* r300, - struct rX00_fragment_program_code* generic_code) +unsigned r300_get_fs_atom_size(struct r300_context *r300) { + struct r300_fragment_shader *fs = r300_fs(r300); + unsigned imm_count = fs->shader->immediates_count; + struct r300_fragment_program_code *code = &fs->shader->code.code.r300; + + return 19 + + code->alu.length * 4 + + (code->tex.length ? (1 + code->tex.length) : 0) + + (imm_count ? imm_count * 5 : 0); +} + +void r300_emit_fs(struct r300_context* r300, unsigned size, void *state) +{ + struct r300_fragment_shader *fs = r300_fs(r300); + struct rX00_fragment_program_code* generic_code = &fs->shader->code; struct r300_fragment_program_code * code = &generic_code->code.r300; - int i; + unsigned i; + unsigned imm_count = fs->shader->immediates_count; + unsigned imm_first = fs->shader->externals_count; + unsigned imm_end = generic_code->constants.Count; + struct rc_constant *constants = generic_code->constants.Constants; CS_LOCALS(r300); - BEGIN_CS(15 + - code->alu.length * 4 + - (code->tex.length ? (1 + code->tex.length) : 0)); - + BEGIN_CS(size); OUT_CS_REG(R300_US_CONFIG, code->config); OUT_CS_REG(R300_US_PIXSIZE, code->pixsize); OUT_CS_REG(R300_US_CODE_OFFSET, code->code_offset); OUT_CS_REG_SEQ(R300_US_CODE_ADDR_0, 4); - for(i = 0; i < 4; ++i) - OUT_CS(code->code_addr[i]); + OUT_CS_TABLE(code->code_addr, 4); OUT_CS_REG_SEQ(R300_US_ALU_RGB_INST_0, code->alu.length); for (i = 0; i < code->alu.length; i++) @@ -274,28 +257,46 @@ void r300_emit_fragment_program_code(struct r300_context* r300, if (code->tex.length) { OUT_CS_REG_SEQ(R300_US_TEX_INST_0, code->tex.length); - for(i = 0; i < code->tex.length; ++i) - OUT_CS(code->tex.inst[i]); + OUT_CS_TABLE(code->tex.inst, code->tex.length); + } + + /* Emit immediates. */ + if (imm_count) { + for(i = imm_first; i < imm_end; ++i) { + if (constants[i].Type == RC_CONSTANT_IMMEDIATE) { + const float *data = constants[i].u.Immediate; + + OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X + i * 16, 4); + OUT_CS(pack_float24(data[0])); + OUT_CS(pack_float24(data[1])); + OUT_CS(pack_float24(data[2])); + OUT_CS(pack_float24(data[3])); + } + } } + OUT_CS_REG(R300_FG_DEPTH_SRC, fs->shader->fg_depth_src); + OUT_CS_REG(R300_US_W_FMT, fs->shader->us_out_w); END_CS; } -void r300_emit_fs_constant_buffer(struct r300_context* r300, - struct rc_constant_list* constants) +void r300_emit_fs_constants(struct r300_context* r300, unsigned size, void *state) { - int i; + struct r300_fragment_shader *fs = r300_fs(r300); + struct rc_constant_list *constants = &fs->shader->code.constants; + struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state; + unsigned i, count = fs->shader->externals_count; CS_LOCALS(r300); - if (constants->Count == 0) + if (count == 0) return; - BEGIN_CS(constants->Count * 4 + 1); - OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X, constants->Count * 4); - for(i = 0; i < constants->Count; ++i) { - const float * data = get_shader_constant(r300, - &constants->Constants[i], - &r300->shader_constants[PIPE_SHADER_FRAGMENT]); + BEGIN_CS(size); + OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X, count * 4); + for(i = 0; i < count; ++i) { + const float *data; + assert(constants->Constants[i].Type == RC_CONSTANT_EXTERNAL); + data = buf->constants[i]; OUT_CS(pack_float24(data[0])); OUT_CS(pack_float24(data[1])); OUT_CS(pack_float24(data[2])); @@ -304,31 +305,59 @@ void r300_emit_fs_constant_buffer(struct r300_context* r300, END_CS; } -static void r300_emit_fragment_depth_config(struct r300_context* r300, - struct r300_fragment_shader* fs) +void r300_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state) { + struct r300_fragment_shader *fs = r300_fs(r300); + struct rc_constant_list *constants = &fs->shader->code.constants; + unsigned i; + unsigned count = fs->shader->rc_state_count; + unsigned first = fs->shader->externals_count; + unsigned end = constants->Count; CS_LOCALS(r300); - BEGIN_CS(4); - if (r300_fragment_shader_writes_depth(fs)) { - OUT_CS_REG(R300_FG_DEPTH_SRC, R300_FG_DEPTH_SRC_SHADER); - OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W24 | R300_W_SRC_US); - } else { - OUT_CS_REG(R300_FG_DEPTH_SRC, R300_FG_DEPTH_SRC_SCAN); - OUT_CS_REG(R300_US_W_FMT, R300_W_FMT_W0 | R300_W_SRC_US); + if (count == 0) + return; + + BEGIN_CS(size); + for(i = first; i < end; ++i) { + if (constants->Constants[i].Type == RC_CONSTANT_STATE) { + const float *data = + get_rc_constant_state(r300, &constants->Constants[i]); + + OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X + i * 16, 4); + OUT_CS(pack_float24(data[0])); + OUT_CS(pack_float24(data[1])); + OUT_CS(pack_float24(data[2])); + OUT_CS(pack_float24(data[3])); + } } END_CS; } -void r500_emit_fragment_program_code(struct r300_context* r300, - struct rX00_fragment_program_code* generic_code) +unsigned r500_get_fs_atom_size(struct r300_context *r300) { + struct r300_fragment_shader *fs = r300_fs(r300); + unsigned imm_count = fs->shader->immediates_count; + struct r500_fragment_program_code *code = &fs->shader->code.code.r500; + + return 17 + + ((code->inst_end + 1) * 6) + + (imm_count ? imm_count * 7 : 0); +} + +void r500_emit_fs(struct r300_context* r300, unsigned size, void *state) +{ + struct r300_fragment_shader *fs = r300_fs(r300); + struct rX00_fragment_program_code* generic_code = &fs->shader->code; struct r500_fragment_program_code * code = &generic_code->code.r500; - int i; + unsigned i; + unsigned imm_count = fs->shader->immediates_count; + unsigned imm_first = fs->shader->externals_count; + unsigned imm_end = generic_code->constants.Count; + struct rc_constant *constants = generic_code->constants.Constants; CS_LOCALS(r300); - BEGIN_CS(13 + - ((code->inst_end + 1) * 6)); + BEGIN_CS(size); OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO); OUT_CS_REG(R500_US_PIXSIZE, code->max_temp_idx); OUT_CS_REG(R500_US_CODE_RANGE, @@ -348,29 +377,72 @@ void r500_emit_fragment_program_code(struct r300_context* r300, OUT_CS(code->inst[i].inst5); } + /* Emit immediates. */ + if (imm_count) { + for(i = imm_first; i < imm_end; ++i) { + if (constants[i].Type == RC_CONSTANT_IMMEDIATE) { + const float *data = constants[i].u.Immediate; + + OUT_CS_REG(R500_GA_US_VECTOR_INDEX, + R500_GA_US_VECTOR_INDEX_TYPE_CONST | + (i & R500_GA_US_VECTOR_INDEX_MASK)); + OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, 4); + OUT_CS_TABLE(data, 4); + } + } + } + + OUT_CS_REG(R300_FG_DEPTH_SRC, fs->shader->fg_depth_src); + OUT_CS_REG(R300_US_W_FMT, fs->shader->us_out_w); END_CS; } -void r500_emit_fs_constant_buffer(struct r300_context* r300, - struct rc_constant_list* constants) +void r500_emit_fs_constants(struct r300_context* r300, unsigned size, void *state) { - int i; + struct r300_fragment_shader *fs = r300_fs(r300); + struct rc_constant_list *constants = &fs->shader->code.constants; + struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state; + unsigned i, count = fs->shader->externals_count; CS_LOCALS(r300); - if (constants->Count == 0) + if (count == 0) return; - BEGIN_CS(constants->Count * 4 + 3); + BEGIN_CS(size); OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_CONST); - OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, constants->Count * 4); - for (i = 0; i < constants->Count; i++) { - const float * data = get_shader_constant(r300, - &constants->Constants[i], - &r300->shader_constants[PIPE_SHADER_FRAGMENT]); - OUT_CS_32F(data[0]); - OUT_CS_32F(data[1]); - OUT_CS_32F(data[2]); - OUT_CS_32F(data[3]); + OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, count * 4); + for(i = 0; i < count; ++i) { + assert(constants->Constants[i].Type == RC_CONSTANT_EXTERNAL); + } + OUT_CS_TABLE(buf->constants, count * 4); + END_CS; +} + +void r500_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state) +{ + struct r300_fragment_shader *fs = r300_fs(r300); + struct rc_constant_list *constants = &fs->shader->code.constants; + unsigned i; + unsigned count = fs->shader->rc_state_count; + unsigned first = fs->shader->externals_count; + unsigned end = constants->Count; + CS_LOCALS(r300); + + if (count == 0) + return; + + BEGIN_CS(size); + for(i = first; i < end; ++i) { + if (constants->Constants[i].Type == RC_CONSTANT_STATE) { + const float *data = + get_rc_constant_state(r300, &constants->Constants[i]); + + OUT_CS_REG(R500_GA_US_VECTOR_INDEX, + R500_GA_US_VECTOR_INDEX_TYPE_CONST | + (i & R500_GA_US_VECTOR_INDEX_MASK)); + OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, 4); + OUT_CS_TABLE(data, 4); + } } END_CS; } @@ -378,7 +450,6 @@ void r500_emit_fs_constant_buffer(struct r300_context* r300, void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state) { struct pipe_framebuffer_state* fb = (struct pipe_framebuffer_state*)state; - struct r300_screen* r300screen = r300_screen(r300->context.screen); struct r300_texture* tex; struct pipe_surface* surf; int i; @@ -396,7 +467,7 @@ void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state) /* Set the number of colorbuffers. */ if (fb->nr_cbufs > 1) { - if (r300screen->caps->is_r500) { + if (r300->screen->caps.is_r500) { OUT_CS_REG(R300_RB3D_CCTL, R300_RB3D_CCTL_NUM_MULTIWRITES(fb->nr_cbufs) | R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_ENABLE); @@ -411,14 +482,14 @@ void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state) /* Set up colorbuffers. */ for (i = 0; i < fb->nr_cbufs; i++) { surf = fb->cbufs[i]; - tex = (struct r300_texture*)surf->texture; + tex = r300_texture(surf->texture); assert(tex && tex->buffer && "cbuf is marked, but NULL!"); OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1); - OUT_CS_RELOC(tex->buffer, surf->offset, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_CS_TEX_RELOC(tex, surf->offset, 0, RADEON_GEM_DOMAIN_VRAM, 0); OUT_CS_REG_SEQ(R300_RB3D_COLORPITCH0 + (4 * i), 1); - OUT_CS_RELOC(tex->buffer, tex->fb_state.colorpitch[surf->level], + OUT_CS_TEX_RELOC(tex, tex->fb_state.colorpitch[surf->level], 0, RADEON_GEM_DOMAIN_VRAM, 0); OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i), tex->fb_state.us_out_fmt); @@ -430,35 +501,45 @@ void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state) /* Set up a zbuffer. */ if (fb->zsbuf) { surf = fb->zsbuf; - tex = (struct r300_texture*)surf->texture; + tex = r300_texture(surf->texture); assert(tex && tex->buffer && "zsbuf is marked, but NULL!"); OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1); - OUT_CS_RELOC(tex->buffer, surf->offset, 0, RADEON_GEM_DOMAIN_VRAM, 0); + OUT_CS_TEX_RELOC(tex, surf->offset, 0, RADEON_GEM_DOMAIN_VRAM, 0); OUT_CS_REG(R300_ZB_FORMAT, tex->fb_state.zb_format); OUT_CS_REG_SEQ(R300_ZB_DEPTHPITCH, 1); - OUT_CS_RELOC(tex->buffer, tex->fb_state.depthpitch[surf->level], + OUT_CS_TEX_RELOC(tex, tex->fb_state.depthpitch[surf->level], 0, RADEON_GEM_DOMAIN_VRAM, 0); } + OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2); + if (r300->screen->caps.is_r500) { + OUT_CS(0); + OUT_CS(((fb->width - 1) << R300_SCISSORS_X_SHIFT) | + ((fb->height - 1) << R300_SCISSORS_Y_SHIFT)); + } else { + OUT_CS((1440 << R300_SCISSORS_X_SHIFT) | + (1440 << R300_SCISSORS_Y_SHIFT)); + OUT_CS(((fb->width + 1440-1) << R300_SCISSORS_X_SHIFT) | + ((fb->height + 1440-1) << R300_SCISSORS_Y_SHIFT)); + } OUT_CS_REG(R300_GA_POINT_MINMAX, (MAX2(fb->width, fb->height) * 6) << R300_GA_POINT_MINMAX_MAX_SHIFT); END_CS; } -static void r300_emit_query_start(struct r300_context *r300) +void r300_emit_query_start(struct r300_context *r300, unsigned size, void*state) { - struct r300_capabilities *caps = r300_screen(r300->context.screen)->caps; struct r300_query *query = r300->query_current; CS_LOCALS(r300); if (!query) return; - BEGIN_CS(4); - if (caps->family == CHIP_FAMILY_RV530) { + BEGIN_CS(size); + if (r300->screen->caps.family == CHIP_FAMILY_RV530) { OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL); } else { OUT_CS_REG(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_ALL); @@ -472,7 +553,7 @@ static void r300_emit_query_start(struct r300_context *r300) static void r300_emit_query_finish(struct r300_context *r300, struct r300_query *query) { - struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; + struct r300_capabilities* caps = &r300->screen->caps; CS_LOCALS(r300); assert(caps->num_frag_pipes); @@ -491,13 +572,13 @@ static void r300_emit_query_finish(struct r300_context *r300, /* pipe 3 only */ OUT_CS_REG(R300_SU_REG_DEST, 1 << 3); OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); - OUT_CS_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 3), + OUT_CS_BUF_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 3), 0, RADEON_GEM_DOMAIN_GTT, 0); case 3: /* pipe 2 only */ OUT_CS_REG(R300_SU_REG_DEST, 1 << 2); OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); - OUT_CS_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 2), + OUT_CS_BUF_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 2), 0, RADEON_GEM_DOMAIN_GTT, 0); case 2: /* pipe 1 only */ @@ -505,19 +586,19 @@ static void r300_emit_query_finish(struct r300_context *r300, OUT_CS_REG(R300_SU_REG_DEST, 1 << (caps->high_second_pipe ? 3 : 1)); OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); - OUT_CS_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 1), + OUT_CS_BUF_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 1), 0, RADEON_GEM_DOMAIN_GTT, 0); case 1: /* pipe 0 only */ OUT_CS_REG(R300_SU_REG_DEST, 1 << 0); OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); - OUT_CS_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 0), + OUT_CS_BUF_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 0), 0, RADEON_GEM_DOMAIN_GTT, 0); break; default: - debug_printf("r300: Implementation error: Chipset reports %d" + fprintf(stderr, "r300: Implementation error: Chipset reports %d" " pixel pipes!\n", caps->num_frag_pipes); - assert(0); + abort(); } /* And, finally, reset it to normal... */ @@ -533,7 +614,7 @@ static void rv530_emit_query_single(struct r300_context *r300, BEGIN_CS(8); OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0); OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); - OUT_CS_RELOC(r300->oqbo, query->offset, 0, RADEON_GEM_DOMAIN_GTT, 0); + OUT_CS_BUF_RELOC(r300->oqbo, query->offset, 0, RADEON_GEM_DOMAIN_GTT, 0); OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL); END_CS; } @@ -546,17 +627,17 @@ static void rv530_emit_query_double(struct r300_context *r300, BEGIN_CS(14); OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0); OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); - OUT_CS_RELOC(r300->oqbo, query->offset, 0, RADEON_GEM_DOMAIN_GTT, 0); + OUT_CS_BUF_RELOC(r300->oqbo, query->offset, 0, RADEON_GEM_DOMAIN_GTT, 0); OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_1); OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1); - OUT_CS_RELOC(r300->oqbo, query->offset + sizeof(uint32_t), 0, RADEON_GEM_DOMAIN_GTT, 0); + OUT_CS_BUF_RELOC(r300->oqbo, query->offset + sizeof(uint32_t), 0, RADEON_GEM_DOMAIN_GTT, 0); OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL); END_CS; } void r300_emit_query_end(struct r300_context* r300) { - struct r300_capabilities *caps = r300_screen(r300->context.screen)->caps; + struct r300_capabilities *caps = &r300->screen->caps; struct r300_query *query = r300->query_current; if (!query) @@ -614,6 +695,13 @@ void r300_emit_rs_state(struct r300_context* r300, unsigned size, void* state) OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, rs->line_stipple_config); OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, rs->line_stipple_value); OUT_CS_REG(R300_GA_POLY_MODE, rs->polygon_mode); + OUT_CS_REG(R300_SC_CLIP_RULE, rs->clip_rule); + OUT_CS_REG(R300_GB_ENABLE, rs->stuffing_enable); + OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4); + OUT_CS_32F(rs->point_texcoord_left); + OUT_CS_32F(rs->point_texcoord_bottom); + OUT_CS_32F(rs->point_texcoord_right); + OUT_CS_32F(rs->point_texcoord_top); END_CS; } @@ -622,7 +710,6 @@ void r300_emit_rs_block_state(struct r300_context* r300, { struct r300_rs_block* rs = (struct r300_rs_block*)state; unsigned i; - struct r300_screen* r300screen = r300_screen(r300->context.screen); /* It's the same for both INST and IP tables */ unsigned count = (rs->inst_count & R300_RS_INST_COUNT_MASK) + 1; CS_LOCALS(r300); @@ -630,13 +717,13 @@ void r300_emit_rs_block_state(struct r300_context* r300, DBG(r300, DBG_DRAW, "r300: RS emit:\n"); BEGIN_CS(size); - if (r300screen->caps->is_r500) { + if (r300->screen->caps.is_r500) { OUT_CS_REG_SEQ(R500_RS_IP_0, count); } else { OUT_CS_REG_SEQ(R300_RS_IP_0, count); } + OUT_CS_TABLE(rs->ip, count); for (i = 0; i < count; i++) { - OUT_CS(rs->ip[i]); DBG(r300, DBG_DRAW, " : ip %d: 0x%08x\n", i, rs->ip[i]); } @@ -644,13 +731,13 @@ void r300_emit_rs_block_state(struct r300_context* r300, OUT_CS(rs->count); OUT_CS(rs->inst_count); - if (r300screen->caps->is_r500) { + if (r300->screen->caps.is_r500) { OUT_CS_REG_SEQ(R500_RS_INST_0, count); } else { OUT_CS_REG_SEQ(R300_RS_INST_0, count); } + OUT_CS_TABLE(rs->inst, count); for (i = 0; i < count; i++) { - OUT_CS(rs->inst[i]); DBG(r300, DBG_DRAW, " : inst %d: 0x%08x\n", i, rs->inst[i]); } @@ -663,62 +750,22 @@ void r300_emit_rs_block_state(struct r300_context* r300, void r300_emit_scissor_state(struct r300_context* r300, unsigned size, void* state) { - unsigned minx, miny, maxx, maxy; - uint32_t top_left, bottom_right; - struct r300_screen* r300screen = r300_screen(r300->context.screen); struct pipe_scissor_state* scissor = (struct pipe_scissor_state*)state; - struct pipe_framebuffer_state* fb = - (struct pipe_framebuffer_state*)r300->fb_state.state; CS_LOCALS(r300); - minx = miny = 0; - maxx = fb->width; - maxy = fb->height; - - if (((struct r300_rs_state*)r300->rs_state.state)->rs.scissor) { - minx = MAX2(minx, scissor->minx); - miny = MAX2(miny, scissor->miny); - maxx = MIN2(maxx, scissor->maxx); - maxy = MIN2(maxy, scissor->maxy); - } - - /* Special case for zero-area scissor. - * - * We can't allow the variables maxx and maxy to be zero because they are - * subtracted from later in the code, which would cause emitting ~0 and - * making the kernel checker angry. - * - * Let's consider we change maxx and maxy to 1, which is effectively - * a one-pixel area. We must then change minx and miny to a number which is - * greater than 1 to get the zero area back. */ - if (!maxx || !maxy) { - minx = 2; - miny = 2; - maxx = 1; - maxy = 1; - } - - if (r300screen->caps->is_r500) { - top_left = - (minx << R300_SCISSORS_X_SHIFT) | - (miny << R300_SCISSORS_Y_SHIFT); - bottom_right = - ((maxx - 1) << R300_SCISSORS_X_SHIFT) | - ((maxy - 1) << R300_SCISSORS_Y_SHIFT); + BEGIN_CS(size); + OUT_CS_REG_SEQ(R300_SC_CLIPRECT_TL_0, 2); + if (r300->screen->caps.is_r500) { + OUT_CS((scissor->minx << R300_CLIPRECT_X_SHIFT) | + (scissor->miny << R300_CLIPRECT_Y_SHIFT)); + OUT_CS(((scissor->maxx - 1) << R300_CLIPRECT_X_SHIFT) | + ((scissor->maxy - 1) << R300_CLIPRECT_Y_SHIFT)); } else { - /* Offset of 1440 in non-R500 chipsets. */ - top_left = - ((minx + 1440) << R300_SCISSORS_X_SHIFT) | - ((miny + 1440) << R300_SCISSORS_Y_SHIFT); - bottom_right = - (((maxx - 1) + 1440) << R300_SCISSORS_X_SHIFT) | - (((maxy - 1) + 1440) << R300_SCISSORS_Y_SHIFT); + OUT_CS(((scissor->minx + 1440) << R300_CLIPRECT_X_SHIFT) | + ((scissor->miny + 1440) << R300_CLIPRECT_Y_SHIFT)); + OUT_CS(((scissor->maxx + 1440-1) << R300_CLIPRECT_X_SHIFT) | + ((scissor->maxy + 1440-1) << R300_CLIPRECT_Y_SHIFT)); } - - BEGIN_CS(size); - OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2); - OUT_CS(top_left); - OUT_CS(bottom_right); END_CS; } @@ -737,35 +784,45 @@ void r300_emit_textures_state(struct r300_context *r300, if ((1 << i) & allstate->tx_enable) { texstate = &allstate->regs[i]; - OUT_CS_REG(R300_TX_FILTER0_0 + (i * 4), texstate->filter[0]); - OUT_CS_REG(R300_TX_FILTER1_0 + (i * 4), texstate->filter[1]); + OUT_CS_REG(R300_TX_FILTER0_0 + (i * 4), texstate->filter0); + OUT_CS_REG(R300_TX_FILTER1_0 + (i * 4), texstate->filter1); OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (i * 4), texstate->border_color); - OUT_CS_REG(R300_TX_FORMAT0_0 + (i * 4), texstate->format[0]); - OUT_CS_REG(R300_TX_FORMAT1_0 + (i * 4), texstate->format[1]); - OUT_CS_REG(R300_TX_FORMAT2_0 + (i * 4), texstate->format[2]); + OUT_CS_REG(R300_TX_FORMAT0_0 + (i * 4), texstate->format.format0); + OUT_CS_REG(R300_TX_FORMAT1_0 + (i * 4), texstate->format.format1); + OUT_CS_REG(R300_TX_FORMAT2_0 + (i * 4), texstate->format.format2); OUT_CS_REG_SEQ(R300_TX_OFFSET_0 + (i * 4), 1); - OUT_CS_RELOC(allstate->textures[i]->buffer, texstate->tile_config, - RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0, 0); + OUT_CS_TEX_RELOC(r300_texture(allstate->sampler_views[i]->base.texture), + texstate->format.tile_config, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0, 0); } } END_CS; } -void r300_emit_aos(struct r300_context* r300, unsigned offset) +void r300_emit_aos(struct r300_context* r300, unsigned offset, boolean indexed) { struct pipe_vertex_buffer *vb1, *vb2, *vbuf = r300->vertex_buffer; - struct pipe_vertex_element *velem = r300->vertex_element; + struct pipe_vertex_element *velem = r300->velems->velem; int i; - unsigned size1, size2, aos_count = r300->vertex_element_count; + unsigned size1, size2, aos_count = r300->velems->count; unsigned packet_size = (aos_count * 3 + 1) / 2; CS_LOCALS(r300); + for (i = 0; i < aos_count; i++) { + if ((vbuf[velem[i].vertex_buffer_index].buffer_offset + velem[i].src_offset) % 4 != 0) { + /* XXX We must align the buffer. */ + assert(0); + fprintf(stderr, "r300: Unaligned vertex buffer offsets aren't supported, aborting..\n"); + abort(); + } + } + BEGIN_CS(2 + packet_size + aos_count * 2); OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, packet_size); - OUT_CS(aos_count); + OUT_CS(aos_count | (!indexed ? R300_VC_FORCE_PREFETCH : 0)); for (i = 0; i < aos_count - 1; i += 2) { vb1 = &vbuf[velem[i].vertex_buffer_index]; @@ -788,12 +845,36 @@ void r300_emit_aos(struct r300_context* r300, unsigned offset) } for (i = 0; i < aos_count; i++) { - OUT_CS_RELOC_NO_OFFSET(vbuf[velem[i].vertex_buffer_index].buffer, - RADEON_GEM_DOMAIN_GTT, 0, 0); + OUT_CS_BUF_RELOC_NO_OFFSET(vbuf[velem[i].vertex_buffer_index].buffer, + RADEON_GEM_DOMAIN_GTT, 0, 0); } END_CS; } +void r300_emit_vertex_buffer(struct r300_context* r300) +{ + CS_LOCALS(r300); + + DBG(r300, DBG_DRAW, "r300: Preparing vertex buffer %p for render, " + "vertex size %d\n", r300->vbo, + r300->vertex_info.size); + /* Set the pointer to our vertex buffer. The emitted values are this: + * PACKET3 [3D_LOAD_VBPNTR] + * COUNT [1] + * FORMAT [size | stride << 8] + * OFFSET [offset into BO] + * VBPNTR [relocated BO] + */ + BEGIN_CS(7); + OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3); + OUT_CS(1); + OUT_CS(r300->vertex_info.size | + (r300->vertex_info.size << 8)); + OUT_CS(r300->vbo_offset); + OUT_CS_BUF_RELOC(r300->vbo, 0, RADEON_GEM_DOMAIN_GTT, 0, 0); + END_CS; +} + void r300_emit_vertex_stream_state(struct r300_context* r300, unsigned size, void* state) { @@ -806,14 +887,14 @@ void r300_emit_vertex_stream_state(struct r300_context* r300, BEGIN_CS(size); OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, streams->count); + OUT_CS_TABLE(streams->vap_prog_stream_cntl, streams->count); for (i = 0; i < streams->count; i++) { - OUT_CS(streams->vap_prog_stream_cntl[i]); DBG(r300, DBG_DRAW, " : prog_stream_cntl%d: 0x%08x\n", i, streams->vap_prog_stream_cntl[i]); } OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, streams->count); + OUT_CS_TABLE(streams->vap_prog_stream_cntl_ext, streams->count); for (i = 0; i < streams->count; i++) { - OUT_CS(streams->vap_prog_stream_cntl_ext[i]); DBG(r300, DBG_DRAW, " : prog_stream_cntl_ext%d: 0x%08x\n", i, streams->vap_prog_stream_cntl_ext[i]); } @@ -852,11 +933,11 @@ void r300_emit_vs_state(struct r300_context* r300, unsigned size, void* state) { struct r300_vertex_shader* vs = (struct r300_vertex_shader*)state; struct r300_vertex_program_code* code = &vs->code; - struct r300_screen* r300screen = r300_screen(r300->context.screen); + struct r300_screen* r300screen = r300->screen; unsigned instruction_count = code->length / 4; unsigned i; - unsigned vtx_mem_size = r300screen->caps->is_r500 ? 128 : 72; + unsigned vtx_mem_size = r300screen->caps.is_r500 ? 128 : 72; unsigned input_count = MAX2(util_bitcount(code->InputsRead), 1); unsigned output_count = MAX2(util_bitcount(code->OutputsWritten), 1); unsigned temp_count = MAX2(code->num_temporaries, 1); @@ -865,13 +946,11 @@ void r300_emit_vs_state(struct r300_context* r300, unsigned size, void* state) vtx_mem_size / output_count, 10); unsigned pvs_num_controllers = MIN2(vtx_mem_size / temp_count, 6); - CS_LOCALS(r300); + unsigned imm_first = vs->externals_count; + unsigned imm_end = vs->code.constants.Count; + unsigned imm_count = vs->immediates_count; - if (!r300screen->caps->has_tcl) { - debug_printf("r300: Implementation error: emit_vertex_shader called," - " but has_tcl is FALSE!\n"); - return; - } + CS_LOCALS(r300); BEGIN_CS(size); /* R300_VAP_PVS_CODE_CNTL_0 @@ -887,48 +966,46 @@ void r300_emit_vs_state(struct r300_context* r300, unsigned size, void* state) OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0); OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, code->length); - for (i = 0; i < code->length; i++) { - OUT_CS(code->body.d[i]); - } + OUT_CS_TABLE(code->body.d, code->length); OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(pvs_num_slots) | R300_PVS_NUM_CNTLRS(pvs_num_controllers) | - R300_PVS_NUM_FPUS(r300screen->caps->num_vert_fpus) | + R300_PVS_NUM_FPUS(r300screen->caps.num_vert_fpus) | R300_PVS_VF_MAX_VTX_NUM(12) | - (r300screen->caps->is_r500 ? R500_TCL_STATE_OPTIMIZATION : 0)); + (r300screen->caps.is_r500 ? R500_TCL_STATE_OPTIMIZATION : 0)); + + /* Emit immediates. */ + if (imm_count) { + OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, + (r300->screen->caps.is_r500 ? + R500_PVS_CONST_START : R300_PVS_CONST_START) + + imm_first); + OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, imm_count * 4); + for (i = imm_first; i < imm_end; i++) { + const float *data = vs->code.constants.Constants[i].u.Immediate; + OUT_CS_TABLE(data, 4); + } + } END_CS; } -void r300_emit_vs_constant_buffer(struct r300_context* r300, - struct rc_constant_list* constants) +void r300_emit_vs_constants(struct r300_context* r300, + unsigned size, void *state) { - int i; - struct r300_screen* r300screen = r300_screen(r300->context.screen); + unsigned count = + ((struct r300_vertex_shader*)r300->vs_state.state)->externals_count; + struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state; CS_LOCALS(r300); - if (!r300screen->caps->has_tcl) { - debug_printf("r300: Implementation error: emit_vertex_shader called," - " but has_tcl is FALSE!\n"); + if (!count) return; - } - if (constants->Count == 0) - return; - - BEGIN_CS(constants->Count * 4 + 3); + BEGIN_CS(size); OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, - (r300screen->caps->is_r500 ? + (r300->screen->caps.is_r500 ? R500_PVS_CONST_START : R300_PVS_CONST_START)); - OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, constants->Count * 4); - for (i = 0; i < constants->Count; i++) { - const float * data = get_shader_constant(r300, - &constants->Constants[i], - &r300->shader_constants[PIPE_SHADER_VERTEX]); - OUT_CS_32F(data[0]); - OUT_CS_32F(data[1]); - OUT_CS_32F(data[2]); - OUT_CS_32F(data[3]); - } + OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, count * 4); + OUT_CS_TABLE(buf->constants, count * 4); END_CS; } @@ -972,7 +1049,7 @@ void r300_emit_texture_cache_inval(struct r300_context* r300, unsigned size, voi void r300_emit_buffer_validate(struct r300_context *r300, boolean do_validate_vertex_buffers, - struct pipe_buffer *index_buffer) + struct pipe_resource *index_buffer) { struct pipe_framebuffer_state* fb = (struct pipe_framebuffer_state*)r300->fb_state.state; @@ -980,89 +1057,96 @@ void r300_emit_buffer_validate(struct r300_context *r300, (struct r300_textures_state*)r300->textures_state.state; struct r300_texture* tex; struct pipe_vertex_buffer *vbuf = r300->vertex_buffer; - struct pipe_vertex_element *velem = r300->vertex_element; - struct pipe_buffer *pbuf; + struct pipe_vertex_element *velem = r300->velems->velem; + struct pipe_resource *pbuf; unsigned i; boolean invalid = FALSE; + /* upload buffers first */ + if (r300->any_user_vbs) { + r300_upload_user_buffers(r300); + r300->any_user_vbs = false; + } + /* Clean out BOs. */ - r300->winsys->reset_bos(r300->winsys); + r300->rws->reset_bos(r300->rws); validate: /* Color buffers... */ for (i = 0; i < fb->nr_cbufs; i++) { - tex = (struct r300_texture*)fb->cbufs[i]->texture; + tex = r300_texture(fb->cbufs[i]->texture); assert(tex && tex->buffer && "cbuf is marked, but NULL!"); - if (!r300->winsys->add_buffer(r300->winsys, tex->buffer, - 0, RADEON_GEM_DOMAIN_VRAM)) { + if (!r300_add_texture(r300->rws, tex, + 0, RADEON_GEM_DOMAIN_VRAM)) { r300->context.flush(&r300->context, 0, NULL); goto validate; } } /* ...depth buffer... */ if (fb->zsbuf) { - tex = (struct r300_texture*)fb->zsbuf->texture; + tex = r300_texture(fb->zsbuf->texture); assert(tex && tex->buffer && "zsbuf is marked, but NULL!"); - if (!r300->winsys->add_buffer(r300->winsys, tex->buffer, - 0, RADEON_GEM_DOMAIN_VRAM)) { + if (!r300_add_texture(r300->rws, tex, + 0, RADEON_GEM_DOMAIN_VRAM)) { r300->context.flush(&r300->context, 0, NULL); goto validate; } } /* ...textures... */ for (i = 0; i < texstate->count; i++) { - tex = texstate->textures[i]; - if (!tex || !texstate->sampler_states[i]) + if (!(texstate->tx_enable & (1 << i))) { continue; - if (!r300->winsys->add_buffer(r300->winsys, tex->buffer, - RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0)) { + } + + tex = r300_texture(texstate->sampler_views[i]->base.texture); + if (!r300_add_texture(r300->rws, tex, + RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0)) { r300->context.flush(&r300->context, 0, NULL); goto validate; } } /* ...occlusion query buffer... */ - if (r300->dirty_state & R300_NEW_QUERY) { - if (!r300->winsys->add_buffer(r300->winsys, r300->oqbo, - 0, RADEON_GEM_DOMAIN_GTT)) { + if (r300->query_start.dirty) { + if (!r300_add_buffer(r300->rws, r300->oqbo, + 0, RADEON_GEM_DOMAIN_GTT)) { r300->context.flush(&r300->context, 0, NULL); goto validate; } } /* ...vertex buffer for SWTCL path... */ if (r300->vbo) { - if (!r300->winsys->add_buffer(r300->winsys, r300->vbo, - RADEON_GEM_DOMAIN_GTT, 0)) { + if (!r300_add_buffer(r300->rws, r300->vbo, + RADEON_GEM_DOMAIN_GTT, 0)) { r300->context.flush(&r300->context, 0, NULL); goto validate; } } /* ...vertex buffers for HWTCL path... */ if (do_validate_vertex_buffers) { - for (i = 0; i < r300->vertex_element_count; i++) { + for (i = 0; i < r300->velems->count; i++) { pbuf = vbuf[velem[i].vertex_buffer_index].buffer; - if (!r300->winsys->add_buffer(r300->winsys, pbuf, - RADEON_GEM_DOMAIN_GTT, 0)) { - r300->context.flush(&r300->context, 0, NULL); + if (!r300_add_buffer(r300->rws, pbuf, + RADEON_GEM_DOMAIN_GTT, 0)) { + r300->context.flush(&r300->context, 0, NULL); goto validate; } } } /* ...and index buffer for HWTCL path. */ if (index_buffer) { - if (!r300->winsys->add_buffer(r300->winsys, index_buffer, - RADEON_GEM_DOMAIN_GTT, 0)) { + if (!r300_add_buffer(r300->rws, index_buffer, + RADEON_GEM_DOMAIN_GTT, 0)) { r300->context.flush(&r300->context, 0, NULL); goto validate; } } - - if (!r300->winsys->validate(r300->winsys)) { + if (!r300->rws->validate(r300->rws)) { r300->context.flush(&r300->context, 0, NULL); if (invalid) { /* Well, hell. */ - debug_printf("r300: Stuck in validation loop, gonna quit now."); - exit(1); + fprintf(stderr, "r300: Stuck in validation loop, gonna quit now.\n"); + abort(); } invalid = TRUE; goto validate; @@ -1075,13 +1159,15 @@ unsigned r300_get_num_dirty_dwords(struct r300_context *r300) unsigned dwords = 0; foreach(atom, &r300->atom_list) { - if (atom->dirty || atom->always_dirty) { + if (atom->dirty) { dwords += atom->size; } } - /* XXX This is the compensation for the non-atomized states. */ - dwords += 1024; + /* emit_query_end is not atomized. */ + dwords += 26; + /* let's reserve some more, just in case */ + dwords += 32; return dwords; } @@ -1089,54 +1175,23 @@ unsigned r300_get_num_dirty_dwords(struct r300_context *r300) /* Emit all dirty state. */ void r300_emit_dirty_state(struct r300_context* r300) { - struct r300_screen* r300screen = r300_screen(r300->context.screen); + struct r300_screen* r300screen = r300->screen; struct r300_atom* atom; - if (r300->dirty_state & R300_NEW_QUERY) { - r300_emit_query_start(r300); - r300->dirty_state &= ~R300_NEW_QUERY; - } - foreach(atom, &r300->atom_list) { - if (atom->dirty || atom->always_dirty) { + if (atom->dirty) { atom->emit(r300, atom->size, atom->state); + if (SCREEN_DBG_ON(r300->screen, DBG_STATS)) { + atom->counter++; + } atom->dirty = FALSE; } } - if (r300->dirty_state & R300_NEW_FRAGMENT_SHADER) { - r300_emit_fragment_depth_config(r300, r300->fs); - if (r300screen->caps->is_r500) { - r500_emit_fragment_program_code(r300, &r300->fs->shader->code); - } else { - r300_emit_fragment_program_code(r300, &r300->fs->shader->code); - } - r300->dirty_state &= ~R300_NEW_FRAGMENT_SHADER; - } - - if (r300->dirty_state & R300_NEW_FRAGMENT_SHADER_CONSTANTS) { - if (r300screen->caps->is_r500) { - r500_emit_fs_constant_buffer(r300, - &r300->fs->shader->code.constants); - } else { - r300_emit_fs_constant_buffer(r300, - &r300->fs->shader->code.constants); - } - r300->dirty_state &= ~R300_NEW_FRAGMENT_SHADER_CONSTANTS; + /* Emit the VBO for SWTCL. */ + if (!r300screen->caps.has_tcl) { + r300_emit_vertex_buffer(r300); } - if (r300->dirty_state & R300_NEW_VERTEX_SHADER_CONSTANTS) { - struct r300_vertex_shader* vs = r300->vs_state.state; - r300_emit_vs_constant_buffer(r300, &vs->code.constants); - r300->dirty_state &= ~R300_NEW_VERTEX_SHADER_CONSTANTS; - } - - /* XXX - assert(r300->dirty_state == 0); - */ - - /* Finally, emit the VBO. */ - /* r300_emit_vertex_buffer(r300); */ - r300->dirty_hw++; } diff --git a/src/gallium/drivers/r300/r300_emit.h b/src/gallium/drivers/r300/r300_emit.h index 449e640a884..c3eb195d4e7 100644 --- a/src/gallium/drivers/r300/r300_emit.h +++ b/src/gallium/drivers/r300/r300_emit.h @@ -29,7 +29,7 @@ struct rX00_fragment_program_code; struct r300_vertex_program_code; -void r300_emit_aos(struct r300_context* r300, unsigned offset); +void r300_emit_aos(struct r300_context* r300, unsigned offset, boolean indexed); void r300_emit_blend_state(struct r300_context* r300, unsigned size, void* state); @@ -43,22 +43,25 @@ void r300_emit_clip_state(struct r300_context* r300, void r300_emit_dsa_state(struct r300_context* r300, unsigned size, void* state); -void r300_emit_fragment_program_code(struct r300_context* r300, - struct rX00_fragment_program_code* generic_code); +unsigned r300_get_fs_atom_size(struct r300_context *r300); -void r300_emit_fs_constant_buffer(struct r300_context* r300, - struct rc_constant_list* constants); +void r300_emit_fs(struct r300_context* r300, unsigned size, void *state); -void r500_emit_fragment_program_code(struct r300_context* r300, - struct rX00_fragment_program_code* generic_code); +void r300_emit_fs_constants(struct r300_context* r300, unsigned size, void *state); -void r500_emit_fs_constant_buffer(struct r300_context* r300, - struct rc_constant_list* constants); +void r300_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state); + +unsigned r500_get_fs_atom_size(struct r300_context *r300); + +void r500_emit_fs(struct r300_context* r300, unsigned size, void *state); + +void r500_emit_fs_constants(struct r300_context* r300, unsigned size, void *state); + +void r500_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state); void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state); -void r300_emit_query_begin(struct r300_context* r300, - struct r300_query* query); +void r300_emit_query_start(struct r300_context *r300, unsigned size, void *state); void r300_emit_query_end(struct r300_context* r300); @@ -81,8 +84,8 @@ void r300_emit_vertex_stream_state(struct r300_context* r300, void r300_emit_vap_output_state(struct r300_context* r300, unsigned size, void* state); -void r300_emit_vs_constant_buffer(struct r300_context* r300, - struct rc_constant_list* constants); +void r300_emit_vs_constants(struct r300_context* r300, + unsigned size, void *state); void r300_emit_vs_state(struct r300_context* r300, unsigned size, void* state); @@ -103,6 +106,6 @@ void r300_emit_dirty_state(struct r300_context* r300); void r300_emit_buffer_validate(struct r300_context *r300, boolean do_validate_vertex_buffers, - struct pipe_buffer *index_buffer); + struct pipe_resource *index_buffer); #endif /* R300_EMIT_H */ diff --git a/src/gallium/drivers/r300/r300_flush.c b/src/gallium/drivers/r300/r300_flush.c index e37d3092703..e78c6a3624f 100644 --- a/src/gallium/drivers/r300/r300_flush.c +++ b/src/gallium/drivers/r300/r300_flush.c @@ -52,7 +52,6 @@ static void r300_flush(struct pipe_context* pipe, if (r300->dirty_hw) { FLUSH_CS; - r300->dirty_state = R300_NEW_KITCHEN_SINK; r300->dirty_hw = 0; /* New kitchen sink, baby. */ @@ -61,6 +60,12 @@ static void r300_flush(struct pipe_context* pipe, atom->dirty = TRUE; } } + + /* Unmark HWTCL state for SWTCL. */ + if (!r300->screen->caps.has_tcl) { + r300->vs_state.dirty = FALSE; + r300->vs_constants.dirty = FALSE; + } } /* reset flushed query */ @@ -69,7 +74,6 @@ static void r300_flush(struct pipe_context* pipe, } } - void r300_init_flush_functions(struct r300_context* r300) { r300->context.flush = r300_flush; diff --git a/src/gallium/drivers/r300/r300_fs.c b/src/gallium/drivers/r300/r300_fs.c index 3c2625269b8..88303f074cd 100644 --- a/src/gallium/drivers/r300/r300_fs.c +++ b/src/gallium/drivers/r300/r300_fs.c @@ -26,10 +26,12 @@ #include "util/u_memory.h" #include "tgsi/tgsi_dump.h" +#include "tgsi/tgsi_ureg.h" #include "r300_context.h" #include "r300_screen.h" #include "r300_fs.h" +#include "r300_reg.h" #include "r300_tgsi_to_rc.h" #include "radeon_code.h" @@ -69,26 +71,27 @@ void r300_shader_read_fs_inputs(struct tgsi_shader_info* info, break; default: - assert(0); + fprintf(stderr, "r300: FP: Unknown input semantic: %i\n", + info->input_semantic_name[i]); } } } static void find_output_registers(struct r300_fragment_program_compiler * compiler, - struct r300_fragment_shader * fs) + struct r300_fragment_shader_code *shader) { unsigned i, colorbuf_count = 0; /* Mark the outputs as not present initially */ - compiler->OutputColor[0] = fs->info.num_outputs; - compiler->OutputColor[1] = fs->info.num_outputs; - compiler->OutputColor[2] = fs->info.num_outputs; - compiler->OutputColor[3] = fs->info.num_outputs; - compiler->OutputDepth = fs->info.num_outputs; + compiler->OutputColor[0] = shader->info.num_outputs; + compiler->OutputColor[1] = shader->info.num_outputs; + compiler->OutputColor[2] = shader->info.num_outputs; + compiler->OutputColor[3] = shader->info.num_outputs; + compiler->OutputDepth = shader->info.num_outputs; /* Now see where they really are. */ - for(i = 0; i < fs->info.num_outputs; ++i) { - switch(fs->info.output_semantic_name[i]) { + for(i = 0; i < shader->info.num_outputs; ++i) { + switch(shader->info.output_semantic_name[i]) { case TGSI_SEMANTIC_COLOR: compiler->OutputColor[colorbuf_count] = i; colorbuf_count++; @@ -128,20 +131,21 @@ static void allocate_hardware_inputs( } } -static void get_compare_state( +static void get_external_state( struct r300_context* r300, - struct r300_fragment_program_external_state* state, - unsigned shadow_samplers) + struct r300_fragment_program_external_state* state) { - struct r300_textures_state *texstate = - (struct r300_textures_state*)r300->textures_state.state; - - memset(state, 0, sizeof(*state)); + struct r300_textures_state *texstate = r300->textures_state.state; + unsigned i; - for (int i = 0; i < texstate->sampler_count; i++) { + for (i = 0; i < texstate->sampler_state_count; i++) { struct r300_sampler_state* s = texstate->sampler_states[i]; - if (s && s->state.compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) { + if (!s) { + continue; + } + + if (s->state.compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) { /* XXX Gallium doesn't provide us with any information regarding * this mode, so we are screwed. I'm setting 0 = LUMINANCE. */ state->unit[i].depth_texture_mode = 0; @@ -149,17 +153,86 @@ static void get_compare_state( /* Fortunately, no need to translate this. */ state->unit[i].texture_compare_func = s->state.compare_func; } + + state->unit[i].non_normalized_coords = !s->state.normalized_coords; + + if (texstate->sampler_views[i]) { + struct r300_texture *t; + t = (struct r300_texture*)texstate->sampler_views[i]->base.texture; + + /* XXX this should probably take into account STR, not just S. */ + if (t->uses_pitch) { + switch (s->state.wrap_s) { + case PIPE_TEX_WRAP_REPEAT: + state->unit[i].wrap_mode = RC_WRAP_REPEAT; + state->unit[i].fake_npot = TRUE; + break; + + case PIPE_TEX_WRAP_MIRROR_REPEAT: + state->unit[i].wrap_mode = RC_WRAP_MIRRORED_REPEAT; + state->unit[i].fake_npot = TRUE; + break; + + case PIPE_TEX_WRAP_MIRROR_CLAMP: + case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: + case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: + state->unit[i].wrap_mode = RC_WRAP_MIRRORED_CLAMP; + state->unit[i].fake_npot = TRUE; + break; + + default: + state->unit[i].wrap_mode = RC_WRAP_NONE; + break; + } + } + } } } static void r300_translate_fragment_shader( struct r300_context* r300, + struct r300_fragment_shader_code* shader, + const struct tgsi_token *tokens); + +static void r300_dummy_fragment_shader( + struct r300_context* r300, struct r300_fragment_shader_code* shader) { - struct r300_fragment_shader* fs = r300->fs; + struct pipe_shader_state state; + struct ureg_program *ureg; + struct ureg_dst out; + struct ureg_src imm; + + /* Make a simple fragment shader which outputs (0, 0, 0, 1) */ + ureg = ureg_create(TGSI_PROCESSOR_FRAGMENT); + out = ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, 0); + imm = ureg_imm4f(ureg, 0, 0, 0, 1); + + ureg_MOV(ureg, out, imm); + ureg_END(ureg); + + state.tokens = ureg_finalize(ureg); + + shader->dummy = TRUE; + r300_translate_fragment_shader(r300, shader, state.tokens); + + ureg_destroy(ureg); +} + +static void r300_translate_fragment_shader( + struct r300_context* r300, + struct r300_fragment_shader_code* shader, + const struct tgsi_token *tokens) +{ struct r300_fragment_program_compiler compiler; struct tgsi_to_rc ttr; - int wpos = fs->inputs.wpos; + int wpos; + unsigned i; + + tgsi_scan_shader(tokens, &shader->info); + r300_shader_read_fs_inputs(&shader->info, &shader->inputs); + + wpos = shader->inputs.wpos; /* Setup the compiler. */ memset(&compiler, 0, sizeof(compiler)); @@ -168,25 +241,24 @@ static void r300_translate_fragment_shader( compiler.code = &shader->code; compiler.state = shader->compare_state; - compiler.is_r500 = r300_screen(r300->context.screen)->caps->is_r500; + compiler.is_r500 = r300->screen->caps.is_r500; + compiler.max_temp_regs = compiler.is_r500 ? 128 : 32; compiler.AllocateHwInputs = &allocate_hardware_inputs; - compiler.UserData = &fs->inputs; + compiler.UserData = &shader->inputs; - find_output_registers(&compiler, fs); + find_output_registers(&compiler, shader); if (compiler.Base.Debug) { debug_printf("r300: Initial fragment program\n"); - tgsi_dump(fs->state.tokens, 0); + tgsi_dump(tokens, 0); } /* Translate TGSI to our internal representation */ ttr.compiler = &compiler.Base; - ttr.info = &fs->info; + ttr.info = &shader->info; ttr.use_half_swizzles = TRUE; - r300_tgsi_to_rc(&ttr, fs->state.tokens); - - fs->shadow_samplers = compiler.Base.Program.ShadowSamplers; + r300_tgsi_to_rc(&ttr, tokens); /** * Transform the program to support WPOS. @@ -202,11 +274,55 @@ static void r300_translate_fragment_shader( /* Invoke the compiler */ r3xx_compile_fragment_program(&compiler); + + /* Shaders with zero instructions are invalid, + * use the dummy shader instead. */ + if (shader->code.code.r500.inst_end == -1) { + rc_destroy(&compiler.Base); + r300_dummy_fragment_shader(r300, shader); + return; + } + if (compiler.Base.Error) { - /* XXX failover maybe? */ - DBG(r300, DBG_FP, "r300: Error compiling fragment program: %s\n", - compiler.Base.ErrorMsg); - assert(0); + fprintf(stderr, "r300 FP: Compiler Error:\n%sUsing a dummy shader" + " instead.\n", compiler.Base.ErrorMsg); + + if (shader->dummy) { + fprintf(stderr, "r300 FP: Cannot compile the dummy shader! " + "Giving up...\n"); + abort(); + } + + rc_destroy(&compiler.Base); + r300_dummy_fragment_shader(r300, shader); + return; + } + + /* Initialize numbers of constants for each type. */ + shader->externals_count = ttr.immediate_offset; + shader->immediates_count = 0; + shader->rc_state_count = 0; + + for (i = shader->externals_count; i < shader->code.constants.Count; i++) { + switch (shader->code.constants.Constants[i].Type) { + case RC_CONSTANT_IMMEDIATE: + ++shader->immediates_count; + break; + case RC_CONSTANT_STATE: + ++shader->rc_state_count; + break; + default: + assert(0); + } + } + + /* Setup shader depth output. */ + if (shader->code.writes_depth) { + shader->fg_depth_src = R300_FG_DEPTH_SRC_SHADER; + shader->us_out_w = R300_W_FMT_W24 | R300_W_SRC_US; + } else { + shader->fg_depth_src = R300_FG_DEPTH_SRC_SCAN; + shader->us_out_w = R300_W_FMT_W0 | R300_W_SRC_US; } /* And, finally... */ @@ -215,24 +331,22 @@ static void r300_translate_fragment_shader( boolean r300_pick_fragment_shader(struct r300_context* r300) { - struct r300_fragment_shader* fs = r300->fs; - struct r300_fragment_program_external_state state; + struct r300_fragment_shader* fs = r300_fs(r300); + struct r300_fragment_program_external_state state = {{{ 0 }}}; struct r300_fragment_shader_code* ptr; + get_external_state(r300, &state); + if (!fs->first) { /* Build the fragment shader for the first time. */ fs->first = fs->shader = CALLOC_STRUCT(r300_fragment_shader_code); - /* BTW shadow samplers will be known after the first translation, - * therefore we set ~0, which means it should look at all sampler - * states. This choice doesn't have any impact on the correctness. */ - get_compare_state(r300, &fs->shader->compare_state, ~0); - r300_translate_fragment_shader(r300, fs->shader); + memcpy(&fs->shader->compare_state, &state, + sizeof(struct r300_fragment_program_external_state)); + r300_translate_fragment_shader(r300, fs->shader, fs->state.tokens); return TRUE; - } else if (fs->shadow_samplers) { - get_compare_state(r300, &state, fs->shadow_samplers); - + } else { /* Check if the currently-bound shader has been compiled * with the texture-compare state we need. */ if (memcmp(&fs->shader->compare_state, &state, sizeof(state)) != 0) { @@ -240,8 +354,12 @@ boolean r300_pick_fragment_shader(struct r300_context* r300) ptr = fs->first; while (ptr) { if (memcmp(&ptr->compare_state, &state, sizeof(state)) == 0) { - fs->shader = ptr; - return TRUE; + if (fs->shader != ptr) { + fs->shader = ptr; + return TRUE; + } + /* The currently-bound one is OK. */ + return FALSE; } ptr = ptr->next; } @@ -252,7 +370,7 @@ boolean r300_pick_fragment_shader(struct r300_context* r300) fs->first = fs->shader = ptr; ptr->compare_state = state; - r300_translate_fragment_shader(r300, ptr); + r300_translate_fragment_shader(r300, ptr, fs->state.tokens); return TRUE; } } diff --git a/src/gallium/drivers/r300/r300_fs.h b/src/gallium/drivers/r300/r300_fs.h index 40ce874353c..1cc43553595 100644 --- a/src/gallium/drivers/r300/r300_fs.h +++ b/src/gallium/drivers/r300/r300_fs.h @@ -31,6 +31,22 @@ #include "r300_shader_semantics.h" struct r300_fragment_shader_code { + struct tgsi_shader_info info; + struct r300_shader_semantics inputs; + + /* Whether the shader was replaced by a dummy one due to a shader + * compilation failure. */ + boolean dummy; + + /* Numbers of constants for each type. */ + unsigned externals_count; + unsigned immediates_count; + unsigned rc_state_count; + + /* Registers for fragment depth output setup. */ + uint32_t fg_depth_src; /* R300_FG_DEPTH_SRC: 0x4bd8 */ + uint32_t us_out_w; /* R300_US_W_FMT: 0x46b4 */ + struct r300_fragment_program_external_state compare_state; struct rX00_fragment_program_code code; @@ -41,12 +57,6 @@ struct r300_fragment_shader { /* Parent class */ struct pipe_shader_state state; - struct tgsi_shader_info info; - struct r300_shader_semantics inputs; - - /* Bits 0-15: TRUE if it's a shadow sampler, FALSE otherwise. */ - unsigned shadow_samplers; - /* Currently-bound fragment shader. */ struct r300_fragment_shader_code* shader; diff --git a/src/gallium/drivers/r300/r300_hyperz.c b/src/gallium/drivers/r300/r300_hyperz.c new file mode 100644 index 00000000000..b41b6b1508d --- /dev/null +++ b/src/gallium/drivers/r300/r300_hyperz.c @@ -0,0 +1,108 @@ +/* + * Copyright 2008 Corbin Simpson <[email protected]> + * Copyright 2009 Marek Olšák <[email protected]> + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + + +#include "r300_hyperz.h" +#include "r300_context.h" +#include "r300_reg.h" +#include "r300_fs.h" + +/*****************************************************************************/ +/* The ZTOP state */ +/*****************************************************************************/ + +static boolean r300_dsa_writes_depth_stencil(struct r300_dsa_state* dsa) +{ + /* We are interested only in the cases when a new depth or stencil value + * can be written and changed. */ + + /* We might optionally check for [Z func: never] and inspect the stencil + * state in a similar fashion, but it's not terribly important. */ + return (dsa->z_buffer_control & R300_Z_WRITE_ENABLE) || + (dsa->stencil_ref_mask & R300_STENCILWRITEMASK_MASK) || + ((dsa->z_buffer_control & R500_STENCIL_REFMASK_FRONT_BACK) && + (dsa->stencil_ref_bf & R300_STENCILWRITEMASK_MASK)); +} + +static boolean r300_dsa_alpha_test_enabled(struct r300_dsa_state* dsa) +{ + /* We are interested only in the cases when alpha testing can kill + * a fragment. */ + uint32_t af = dsa->alpha_function; + + return (af & R300_FG_ALPHA_FUNC_ENABLE) && + (af & R300_FG_ALPHA_FUNC_ALWAYS) != R300_FG_ALPHA_FUNC_ALWAYS; +} + +static void r300_update_ztop(struct r300_context* r300) +{ + struct r300_ztop_state* ztop_state = + (struct r300_ztop_state*)r300->ztop_state.state; + + /* This is important enough that I felt it warranted a comment. + * + * According to the docs, these are the conditions where ZTOP must be + * disabled: + * 1) Alpha testing enabled + * 2) Texture kill instructions in fragment shader + * 3) Chroma key culling enabled + * 4) W-buffering enabled + * + * The docs claim that for the first three cases, if no ZS writes happen, + * then ZTOP can be used. + * + * (3) will never apply since we do not support chroma-keyed operations. + * (4) will need to be re-examined (and this comment updated) if/when + * Hyper-Z becomes supported. + * + * Additionally, the following conditions require disabled ZTOP: + * 5) Depth writes in fragment shader + * 6) Outstanding occlusion queries + * + * This register causes stalls all the way from SC to CB when changed, + * but it is buffered on-chip so it does not hurt to write it if it has + * not changed. + * + * ~C. + */ + + /* ZS writes */ + if (r300_dsa_writes_depth_stencil(r300->dsa_state.state) && + (r300_dsa_alpha_test_enabled(r300->dsa_state.state) || /* (1) */ + r300_fs(r300)->shader->info.uses_kill)) { /* (2) */ + ztop_state->z_buffer_top = R300_ZTOP_DISABLE; + } else if (r300_fragment_shader_writes_depth(r300_fs(r300))) { /* (5) */ + ztop_state->z_buffer_top = R300_ZTOP_DISABLE; + } else if (r300->query_current) { /* (6) */ + ztop_state->z_buffer_top = R300_ZTOP_DISABLE; + } else { + ztop_state->z_buffer_top = R300_ZTOP_ENABLE; + } + + r300->ztop_state.dirty = TRUE; +} + +void r300_update_hyperz_state(struct r300_context* r300) +{ + r300_update_ztop(r300); +} diff --git a/src/gallium/drivers/r300/r300_hyperz.h b/src/gallium/drivers/r300/r300_hyperz.h new file mode 100644 index 00000000000..3df5053b896 --- /dev/null +++ b/src/gallium/drivers/r300/r300_hyperz.h @@ -0,0 +1,30 @@ +/* + * Copyright 2010 Marek Olšák <[email protected]> + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_HYPERZ_H +#define R300_HYPERZ_H + +struct r300_context; + +void r300_update_hyperz_state(struct r300_context* r300); + +#endif diff --git a/src/gallium/drivers/r300/r300_query.c b/src/gallium/drivers/r300/r300_query.c index ca00b043c51..5c27796e894 100644 --- a/src/gallium/drivers/r300/r300_query.c +++ b/src/gallium/drivers/r300/r300_query.c @@ -25,16 +25,16 @@ #include "r300_context.h" #include "r300_screen.h" -#include "r300_cs.h" #include "r300_emit.h" #include "r300_query.h" -#include "r300_reg.h" + +#include <stdio.h> static struct pipe_query *r300_create_query(struct pipe_context *pipe, unsigned query_type) { struct r300_context *r300 = r300_context(pipe); - struct r300_screen *r300screen = r300_screen(r300->context.screen); + struct r300_screen *r300screen = r300->screen; unsigned query_size; struct r300_query *q, *qptr; @@ -45,10 +45,10 @@ static struct pipe_query *r300_create_query(struct pipe_context *pipe, q->active = FALSE; - if (r300screen->caps->family == CHIP_FAMILY_RV530) - query_size = r300screen->caps->num_z_pipes * sizeof(uint32_t); + if (r300screen->caps.family == CHIP_FAMILY_RV530) + query_size = r300screen->caps.num_z_pipes * sizeof(uint32_t); else - query_size = r300screen->caps->num_frag_pipes * sizeof(uint32_t); + query_size = r300screen->caps.num_frag_pipes * sizeof(uint32_t); if (!is_empty_list(&r300->query_list)) { qptr = last_elem(&r300->query_list); @@ -76,29 +76,31 @@ static void r300_destroy_query(struct pipe_context* pipe, static void r300_begin_query(struct pipe_context* pipe, struct pipe_query* query) { - uint32_t* map; + uint32_t value = ~0U; struct r300_context* r300 = r300_context(pipe); struct r300_query* q = (struct r300_query*)query; assert(r300->query_current == NULL); - map = pipe->screen->buffer_map(pipe->screen, r300->oqbo, - PIPE_BUFFER_USAGE_CPU_WRITE); - map += q->offset / 4; - *map = ~0U; - pipe->screen->buffer_unmap(pipe->screen, r300->oqbo); + pipe_buffer_write(pipe, + r300->oqbo, + q->offset, + sizeof value, + &value); q->flushed = FALSE; r300->query_current = q; - r300->dirty_state |= R300_NEW_QUERY; + r300->query_start.dirty = TRUE; } static void r300_end_query(struct pipe_context* pipe, struct pipe_query* query) { struct r300_context* r300 = r300_context(pipe); + struct r300_query* q = (struct r300_query*)query; r300_emit_query_end(r300); + q->begin_emitted = false; r300->query_current = NULL; } @@ -108,9 +110,10 @@ static boolean r300_get_query_result(struct pipe_context* pipe, uint64_t* result) { struct r300_context* r300 = r300_context(pipe); - struct r300_screen* r300screen = r300_screen(r300->context.screen); + struct r300_screen* r300screen = r300->screen; struct r300_query *q = (struct r300_query*)query; - unsigned flags = PIPE_BUFFER_USAGE_CPU_READ; + struct pipe_transfer *transfer; + unsigned flags = PIPE_TRANSFER_READ; uint32_t* map; uint32_t temp = 0; unsigned i, num_results; @@ -118,25 +121,25 @@ static boolean r300_get_query_result(struct pipe_context* pipe, if (q->flushed == FALSE) pipe->flush(pipe, 0, NULL); if (!wait) { - flags |= PIPE_BUFFER_USAGE_DONTBLOCK; + flags |= PIPE_TRANSFER_DONTBLOCK; } - map = pipe->screen->buffer_map(pipe->screen, r300->oqbo, flags); + map = pipe_buffer_map(pipe, r300->oqbo, flags, &transfer); if (!map) return FALSE; map += q->offset / 4; - if (r300screen->caps->family == CHIP_FAMILY_RV530) - num_results = r300screen->caps->num_z_pipes; + if (r300screen->caps.family == CHIP_FAMILY_RV530) + num_results = r300screen->caps.num_z_pipes; else - num_results = r300screen->caps->num_frag_pipes; + num_results = r300screen->caps.num_frag_pipes; for (i = 0; i < num_results; i++) { if (*map == ~0U) { /* Looks like our results aren't ready yet. */ if (wait) { - debug_printf("r300: Despite waiting, OQ results haven't" - " come in yet.\n"); + fprintf(stderr, "r300: Despite waiting, OQ results haven't " + "come in yet.\n"); } temp = ~0U; break; @@ -144,7 +147,7 @@ static boolean r300_get_query_result(struct pipe_context* pipe, temp += *map; map++; } - pipe->screen->buffer_unmap(pipe->screen, r300->oqbo); + pipe_buffer_unmap(pipe, r300->oqbo, transfer); if (temp == ~0U) { /* Our results haven't been written yet... */ @@ -155,10 +158,33 @@ static boolean r300_get_query_result(struct pipe_context* pipe, return TRUE; } +static void r300_render_condition(struct pipe_context *pipe, + struct pipe_query *query, + uint mode) +{ + struct r300_context *r300 = r300_context(pipe); + uint64_t result; + boolean wait; + + if (query) { + wait = mode == PIPE_RENDER_COND_WAIT || + mode == PIPE_RENDER_COND_BY_REGION_WAIT; + + if (!r300_get_query_result(pipe, query, wait, &result)) { + r300->skip_rendering = FALSE; + } + + r300->skip_rendering = result == 0; + } else { + r300->skip_rendering = FALSE; + } +} + void r300_init_query_functions(struct r300_context* r300) { r300->context.create_query = r300_create_query; r300->context.destroy_query = r300_destroy_query; r300->context.begin_query = r300_begin_query; r300->context.end_query = r300_end_query; r300->context.get_query_result = r300_get_query_result; + r300->context.render_condition = r300_render_condition; } diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index a249e8b36be..675a9317f9c 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -540,7 +540,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_PVS_FIRST_INST(x) ((x) << 0) # define R300_PVS_XYZW_VALID_INST(x) ((x) << 10) # define R300_PVS_LAST_INST(x) ((x) << 20) -/* Addresses are relative the the vertex program parameters area. */ +/* Addresses are relative to the vertex program parameters area. */ #define R300_VAP_PVS_CONST_CNTL 0x22D4 # define R300_PVS_CONST_BASE_OFFSET_SHIFT 0 # define R300_PVS_MAX_CONST_ADDR_SHIFT 16 @@ -1500,6 +1500,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_ANISO_THRESHOLD_MASK (7<<17) # define R500_MACRO_SWITCH (1<<22) +# define R500_TX_MAX_ANISO(x) ((x) << 23) +# define R500_TX_MAX_ANISO_MASK (63 << 23) +# define R500_TX_ANISO_HIGH_QUALITY (1 << 30) + # define R500_BORDER_FIX (1<<31) #define R300_TX_FORMAT0_0 0x4480 @@ -1539,7 +1543,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_TX_FORMAT_DXT1 0xF # define R300_TX_FORMAT_DXT3 0x10 # define R300_TX_FORMAT_DXT5 0x11 -# define R300_TX_FORMAT_Y8 0x12 +# define R300_TX_FORMAT_CxV8U8 0x12 # define R300_TX_FORMAT_AVYU444 0x13 # define R300_TX_FORMAT_VYUY422 0x14 # define R300_TX_FORMAT_YVYU422 0x15 @@ -1552,6 +1556,26 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_TX_FORMAT_32F_32F 0x1C # define R300_TX_FORMAT_32F_32F_32F_32F 0x1D # define R300_TX_FORMAT_W24_FP 0x1E +# define R400_TX_FORMAT_ATI2N 0x1F + +/* These need TX_FORMAT2_[0-15].TXFORMAT_MSB set. + + My guess is the 10-bit formats are the 8-bit ones but with filtering being + performed with the precision of 10 bits per channel. This makes sense + with sRGB textures since the conversion to linear space reduces the precision + significantly so the shader gets approximately the 8-bit precision + in the end. It might also improve the quality of HDR rendering where + high-precision filtering is desirable. + + Again, this is guessed, the formats might mean something entirely else. + The others should be fine. */ +# define R500_TX_FORMAT_X1 0x0 +# define R500_TX_FORMAT_X1_REV 0x1 +# define R500_TX_FORMAT_X10 0x2 +# define R500_TX_FORMAT_Y10X10 0x3 +# define R500_TX_FORMAT_W10Z10Y10X10 0x4 +# define R500_TX_FORMAT_ATI1N 0x5 + # define R300_TX_FORMAT_SIGNED_W (1 << 5) # define R300_TX_FORMAT_SIGNED_Z (1 << 6) @@ -1716,6 +1740,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_PFS_CNTL_TEX_OFFSET_MASK (31 << 13) # define R300_PFS_CNTL_TEX_END_SHIFT 18 # define R300_PFS_CNTL_TEX_END_MASK (31 << 18) +# define R400_PFS_CNTL_TEX_OFFSET_MSB_SHIFT 24 +# define R400_PFS_CNTL_TEX_OFFSET_MSB_MASK (0xf << 24) +# define R400_PFS_CNTL_TEX_END_MSB_SHIFT 28 +# define R400_PFS_CNTL_TEX_END_MSB_MASK (0xf << 28) /* gap */ @@ -1740,6 +1768,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_TEX_SIZE_MASK (31 << 17) # define R300_RGBA_OUT (1 << 22) # define R300_W_OUT (1 << 23) +# define R400_TEX_START_MSB_SHIFT 24 +# define R400_TEX_START_MSG_MASK (0xf << 24) +# define R400_TEX_SIZE_MSB_SHIFT 28 +# define R400_TEX_SIZE_MSG_MASK (0xf << 28) /* TEX * As far as I can tell, texture instructions cannot write into output @@ -1760,6 +1792,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_TEX_OP_TXP 3 # define R300_TEX_OP_TXB 4 # define R300_TEX_INST_MASK (7 << 15) +# define R400_SRC_ADDR_EXT_BIT (1 << 19) +# define R400_DST_ADDR_EXT_BIT (1 << 20) /* Output format from the unfied shader */ #define R300_US_OUT_FMT_0 0x46A4 @@ -1857,7 +1891,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. * The destination register index is in FPI1 (color) and FPI3 (alpha) * together with enable bits. * There are separate enable bits for writing into temporary registers - * (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_* + * (DSTC_REG_* /DSTA_REG) and program output registers (DSTC_OUTPUT_* * /DSTA_OUTPUT). You can write to both at once, or not write at all (the * same index must be used for both). * @@ -2068,6 +2102,43 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_ALU_OUTA_CLAMP (1 << 30) /* END: Fragment program instruction set */ +/* R4xx extended fragment shader registers. */ +#define R400_US_ALU_EXT_ADDR_0 0x4ac0 /* up to 63 (0x4bbc) */ +# define R400_ADDR0_EXT_RGB_MSB_BIT 0x01 +# define R400_ADDR1_EXT_RGB_MSB_BIT 0x02 +# define R400_ADDR2_EXT_RGB_MSB_BIT 0x04 +# define R400_ADDRD_EXT_RGB_MSB_BIT 0x08 +# define R400_ADDR0_EXT_A_MSB_BIT 0x10 +# define R400_ADDR1_EXT_A_MSB_BIT 0x20 +# define R400_ADDR2_EXT_A_MSB_BIT 0x40 +# define R400_ADDRD_EXT_A_MSB_BIT 0x80 +#define R400_US_CODE_BANK 0x46b8 +# define R400_BANK_SHIFT 0 +# define R400_BANK_MASK 0xf +# define R400_R390_MODE_ENABLE (1 << 4) +#define R400_US_CODE_EXT 0x46bc +# define R400_ALU_OFFSET_MSB_SHIFT 0 +# define R400_ALU_OFFSET_MSB_MASK (0x7 << 0) +# define R400_ALU_SIZE_MSB_SHIFT 3 +# define R400_ALU_SIZE_MSB_MASK (0x7 << 3) +# define R400_ALU_START0_MSB_SHIFT 6 +# define R400_ALU_START0_MSB_MASK (0x7 << 6) +# define R400_ALU_SIZE0_MSB_SHIFT 9 +# define R400_ALU_SIZE0_MSB_MASK (0x7 << 9) +# define R400_ALU_START1_MSB_SHIFT 12 +# define R400_ALU_START1_MSB_MASK (0x7 << 12) +# define R400_ALU_SIZE1_MSB_SHIFT 15 +# define R400_ALU_SIZE1_MSB_MASK (0x7 << 15) +# define R400_ALU_START2_MSB_SHIFT 18 +# define R400_ALU_START2_MSB_MASK (0x7 << 18) +# define R400_ALU_SIZE2_MSB_SHIFT 21 +# define R400_ALU_SIZE2_MSB_MASK (0x7 << 21) +# define R400_ALU_START3_MSB_SHIFT 24 +# define R400_ALU_START3_MSB_MASK (0x7 << 24) +# define R400_ALU_SIZE3_MSB_SHIFT 27 +# define R400_ALU_SIZE3_MSB_MASK (0x7 << 27) +/* END: R4xx extended fragment shader registers. */ + /* Fog: Fog Blending Enable */ #define R300_FG_FOG_BLEND 0x4bc0 # define R300_FG_FOG_BLEND_DISABLE (0 << 0) @@ -3266,7 +3337,6 @@ enum { # define R300_W_SRC_US (0 << 2) # define R300_W_SRC_RAS (1 << 2) - /* Draw a primitive from vertex data in arrays loaded via 3D_LOAD_VBPNTR. * Two parameter dwords: * 0. VAP_VTX_FMT: The first parameter is not written to hardware @@ -3307,7 +3377,7 @@ enum { * the last block is omitted. */ #define R300_PACKET3_3D_LOAD_VBPNTR 0x00002F00 - +# define R300_VC_FORCE_PREFETCH (1 << 5) # define R300_VBPNTR_SIZE0(x) ((x) >> 2) # define R300_VBPNTR_STRIDE0(x) (((x) >> 2) << 8) # define R300_VBPNTR_SIZE1(x) (((x) >> 2) << 16) diff --git a/src/gallium/drivers/r300/r300_render.c b/src/gallium/drivers/r300/r300_render.c index 6c891029a56..7c3a7902a49 100644 --- a/src/gallium/drivers/r300/r300_render.c +++ b/src/gallium/drivers/r300/r300_render.c @@ -30,22 +30,18 @@ #include "util/u_format.h" #include "util/u_memory.h" +#include "util/u_upload_mgr.h" #include "util/u_prim.h" #include "r300_cs.h" #include "r300_context.h" +#include "r300_screen_buffer.h" #include "r300_emit.h" #include "r300_reg.h" #include "r300_render.h" #include "r300_state_derived.h" -/* r300_render: Vertex and index buffer primitive emission. */ -#define R300_MAX_VBO_SIZE (1024 * 1024) - -/* XXX The DRM rejects VAP_ALT_NUM_VERTICES.. */ -//#define ENABLE_ALT_NUM_VERTS - -uint32_t r300_translate_primitive(unsigned prim) +static uint32_t r300_translate_primitive(unsigned prim) { switch (prim) { case PIPE_PRIM_POINTS: @@ -123,7 +119,7 @@ static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300, static boolean r300_reserve_cs_space(struct r300_context *r300, unsigned dwords) { - if (!r300->winsys->check_cs(r300->winsys, dwords)) { + if (!r300->rws->check_cs(r300->rws, dwords)) { r300->context.flush(&r300->context, 0, NULL); return TRUE; } @@ -131,19 +127,71 @@ static boolean r300_reserve_cs_space(struct r300_context *r300, } static boolean immd_is_good_idea(struct r300_context *r300, - unsigned count) + unsigned count) +{ + struct pipe_vertex_element* velem; + struct pipe_vertex_buffer* vbuf; + boolean checked[PIPE_MAX_ATTRIBS] = {0}; + unsigned vertex_element_count = r300->velems->count; + unsigned i, vbi; + + if (count > 10 || DBG_ON(r300, DBG_NO_IMMD)) { + return FALSE; + } + + /* We shouldn't map buffers referenced by CS, busy buffers, + * and ones placed in VRAM. */ + /* XXX Check for VRAM buffers. */ + for (i = 0; i < vertex_element_count; i++) { + velem = &r300->velems->velem[i]; + vbi = velem->vertex_buffer_index; + + if (!checked[vbi]) { + vbuf = &r300->vertex_buffer[vbi]; + + if (r300_buffer_is_referenced(&r300->context, + vbuf->buffer, + R300_REF_CS | R300_REF_HW)) { + /* It's a very bad idea to map it... */ + return FALSE; + } + checked[vbi] = TRUE; + } + } + return TRUE; +} + +/***************************************************************************** + * The emission of draw packets for r500. Older GPUs may use these functions * + * after resolving fallback issues (e.g. stencil ref two-sided). * + ****************************************************************************/ + +static boolean r500_emit_index_offset(struct r300_context *r300, int indexBias) { - return count <= 4; + CS_LOCALS(r300); + + if (r300->screen->caps.is_r500 && + r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0)) { + BEGIN_CS(2); + OUT_CS_REG(R500_VAP_INDEX_OFFSET, + (indexBias & 0xFFFFFF) | (indexBias < 0 ? 1<<24 : 0)); + END_CS; + } else { + if (indexBias) + return FALSE; /* Can't do anything :( */ + } + + return TRUE; } -static void r300_emit_draw_arrays_immediate(struct r300_context *r300, - unsigned mode, - unsigned start, - unsigned count) +void r500_emit_draw_arrays_immediate(struct r300_context *r300, + unsigned mode, + unsigned start, + unsigned count) { struct pipe_vertex_element* velem; struct pipe_vertex_buffer* vbuf; - unsigned vertex_element_count = r300->vertex_element_count; + unsigned vertex_element_count = r300->velems->count; unsigned i, v, vbi, dw, elem_offset, dwords; /* Size of the vertex, in dwords. */ @@ -161,12 +209,13 @@ static void r300_emit_draw_arrays_immediate(struct r300_context *r300, /* Mapped vertex buffers. */ uint32_t* map[PIPE_MAX_ATTRIBS] = {0}; + struct pipe_transfer* transfer[PIPE_MAX_ATTRIBS] = {NULL}; CS_LOCALS(r300); /* Calculate the vertex size, offsets, strides etc. and map the buffers. */ for (i = 0; i < vertex_element_count; i++) { - velem = &r300->vertex_element[i]; + velem = &r300->velems->velem[i]; offset[i] = velem->src_offset / 4; size[i] = util_format_get_blocksize(velem->src_format) / 4; vertex_size += size[i]; @@ -175,26 +224,30 @@ static void r300_emit_draw_arrays_immediate(struct r300_context *r300, /* Map the buffer. */ if (!map[vbi]) { vbuf = &r300->vertex_buffer[vbi]; - map[vbi] = (uint32_t*)pipe_buffer_map(r300->context.screen, + map[vbi] = (uint32_t*)pipe_buffer_map(&r300->context, vbuf->buffer, - PIPE_BUFFER_USAGE_CPU_READ); + PIPE_TRANSFER_READ, + &transfer[vbi]); map[vbi] += vbuf->buffer_offset / 4; stride[vbi] = vbuf->stride / 4; } } - dwords = 10 + count * vertex_size; + dwords = 9 + count * vertex_size; - r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords); - r300_emit_buffer_validate(r300, FALSE, 0); + r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 2 + dwords); + r300_emit_buffer_validate(r300, FALSE, NULL); r300_emit_dirty_state(r300); + r500_emit_index_offset(r300, 0); + BEGIN_CS(dwords); OUT_CS_REG(R300_GA_COLOR_CONTROL, r300_provoking_vertex_fixes(r300, mode)); OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size); - OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0); - OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1); + OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); + OUT_CS(count - 1); + OUT_CS(0); OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) | r300_translate_primitive(mode)); @@ -202,7 +255,7 @@ static void r300_emit_draw_arrays_immediate(struct r300_context *r300, /* Emit vertices. */ for (v = 0; v < count; v++) { for (i = 0; i < vertex_element_count; i++) { - velem = &r300->vertex_element[i]; + velem = &r300->velems->velem[i]; vbi = velem->vertex_buffer_index; elem_offset = offset[i] + stride[vbi] * (v + start); @@ -215,38 +268,40 @@ static void r300_emit_draw_arrays_immediate(struct r300_context *r300, /* Unmap buffers. */ for (i = 0; i < vertex_element_count; i++) { - vbi = r300->vertex_element[i].vertex_buffer_index; + vbi = r300->velems->velem[i].vertex_buffer_index; if (map[vbi]) { vbuf = &r300->vertex_buffer[vbi]; - pipe_buffer_unmap(r300->context.screen, vbuf->buffer); + pipe_buffer_unmap(&r300->context, vbuf->buffer, transfer[vbi]); map[vbi] = NULL; } } } -static void r300_emit_draw_arrays(struct r300_context *r300, - unsigned mode, - unsigned count) +void r500_emit_draw_arrays(struct r300_context *r300, + unsigned mode, + unsigned count) { -#if defined(ENABLE_ALT_NUM_VERTS) boolean alt_num_verts = count > 65535; -#else - boolean alt_num_verts = FALSE; -#endif CS_LOCALS(r300); + if (count >= (1 << 24)) { + fprintf(stderr, "r300: Got a huge number of vertices: %i, " + "refusing to render.\n", count); + return; + } + + r500_emit_index_offset(r300, 0); + + BEGIN_CS(7 + (alt_num_verts ? 2 : 0)); if (alt_num_verts) { - assert(count < (1 << 24)); - BEGIN_CS(10); OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count); - } else { - BEGIN_CS(8); } OUT_CS_REG(R300_GA_COLOR_CONTROL, r300_provoking_vertex_fixes(r300, mode)); - OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, 0); - OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1); + OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); + OUT_CS(count - 1); + OUT_CS(0); OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | r300_translate_primitive(mode) | @@ -254,42 +309,47 @@ static void r300_emit_draw_arrays(struct r300_context *r300, END_CS; } -static void r300_emit_draw_elements(struct r300_context *r300, - struct pipe_buffer* indexBuffer, - unsigned indexSize, - unsigned minIndex, - unsigned maxIndex, - unsigned mode, - unsigned start, - unsigned count) +void r500_emit_draw_elements(struct r300_context *r300, + struct pipe_resource* indexBuffer, + unsigned indexSize, + int indexBias, + unsigned minIndex, + unsigned maxIndex, + unsigned mode, + unsigned start, + unsigned count) { uint32_t count_dwords; uint32_t offset_dwords = indexSize * start / sizeof(uint32_t); -#if defined(ENABLE_ALT_NUM_VERTS) boolean alt_num_verts = count > 65535; -#else - boolean alt_num_verts = FALSE; -#endif CS_LOCALS(r300); - assert((start * indexSize) % 4 == 0); - assert(count < (1 << 24)); + if (count >= (1 << 24)) { + fprintf(stderr, "r300: Got a huge number of vertices: %i, " + "refusing to render.\n", count); + return; + } + + maxIndex = MIN2(maxIndex, r300->vertex_buffer_max_index); DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n", count, minIndex, maxIndex); - maxIndex = MIN2(maxIndex, ((1 << 24) - 1)); + if (!r500_emit_index_offset(r300, indexBias)) { + fprintf(stderr, "r300: Got a non-zero index bias, " + "refusing to render.\n"); + return; + } + BEGIN_CS(13 + (alt_num_verts ? 2 : 0)); if (alt_num_verts) { - BEGIN_CS(16); OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count); - } else { - BEGIN_CS(14); } OUT_CS_REG(R300_GA_COLOR_CONTROL, r300_provoking_vertex_fixes(r300, mode)); - OUT_CS_REG(R300_VAP_VF_MIN_VTX_INDX, minIndex); - OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, maxIndex); + OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); + OUT_CS(maxIndex); + OUT_CS(minIndex); OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0); if (indexSize == 4) { count_dwords = count; @@ -313,30 +373,132 @@ static void r300_emit_draw_elements(struct r300_context *r300, OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) | (0 << R300_INDX_BUFFER_SKIP_SHIFT)); OUT_CS(offset_dwords << 2); - OUT_CS_RELOC(indexBuffer, count_dwords, - RADEON_GEM_DOMAIN_GTT, 0, 0); + OUT_CS_BUF_RELOC(indexBuffer, count_dwords, + RADEON_GEM_DOMAIN_GTT, 0, 0); + + END_CS; +} + +/***************************************************************************** + * The emission of draw packets for r300 which take care of the two-sided * + * stencil ref fallback and call r500's functions. * + ****************************************************************************/ + +/* Set drawing for front faces. */ +static void r300_begin_stencil_ref_fallback(struct r300_context *r300) +{ + struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state; + CS_LOCALS(r300); + BEGIN_CS(2); + OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_BACK); + END_CS; +} + +/* Set drawing for back faces. */ +static void r300_switch_stencil_ref_side(struct r300_context *r300) +{ + struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state; + struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; + CS_LOCALS(r300); + + BEGIN_CS(4); + OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_FRONT); + OUT_CS_REG(R300_ZB_STENCILREFMASK, + dsa->stencil_ref_bf | r300->stencil_ref.ref_value[1]); + END_CS; +} + +/* Restore the original state. */ +static void r300_end_stencil_ref_fallback(struct r300_context *r300) +{ + struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state; + struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; + CS_LOCALS(r300); + + BEGIN_CS(4); + OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode); + OUT_CS_REG(R300_ZB_STENCILREFMASK, + dsa->stencil_ref_mask | r300->stencil_ref.ref_value[0]); END_CS; } +void r300_emit_draw_arrays_immediate(struct r300_context *r300, + unsigned mode, + unsigned start, + unsigned count) +{ + if (!r300->stencil_ref_bf_fallback) { + r500_emit_draw_arrays_immediate(r300, mode, start, count); + } else { + r300_begin_stencil_ref_fallback(r300); + r500_emit_draw_arrays_immediate(r300, mode, start, count); + r300_switch_stencil_ref_side(r300); + r500_emit_draw_arrays_immediate(r300, mode, start, count); + r300_end_stencil_ref_fallback(r300); + } +} + +void r300_emit_draw_arrays(struct r300_context *r300, + unsigned mode, + unsigned count) +{ + if (!r300->stencil_ref_bf_fallback) { + r500_emit_draw_arrays(r300, mode, count); + } else { + r300_begin_stencil_ref_fallback(r300); + r500_emit_draw_arrays(r300, mode, count); + r300_switch_stencil_ref_side(r300); + r500_emit_draw_arrays(r300, mode, count); + r300_end_stencil_ref_fallback(r300); + } +} + +void r300_emit_draw_elements(struct r300_context *r300, + struct pipe_resource* indexBuffer, + unsigned indexSize, + int indexBias, + unsigned minIndex, + unsigned maxIndex, + unsigned mode, + unsigned start, + unsigned count) +{ + if (!r300->stencil_ref_bf_fallback) { + r500_emit_draw_elements(r300, indexBuffer, indexSize, indexBias, + minIndex, maxIndex, mode, start, count); + } else { + r300_begin_stencil_ref_fallback(r300); + r500_emit_draw_elements(r300, indexBuffer, indexSize, indexBias, + minIndex, maxIndex, mode, start, count); + r300_switch_stencil_ref_side(r300); + r500_emit_draw_elements(r300, indexBuffer, indexSize, indexBias, + minIndex, maxIndex, mode, start, count); + r300_end_stencil_ref_fallback(r300); + } +} + static void r300_shorten_ubyte_elts(struct r300_context* r300, - struct pipe_buffer** elts, + struct pipe_resource** elts, + unsigned start, unsigned count) { + struct pipe_context* context = &r300->context; struct pipe_screen* screen = r300->context.screen; - struct pipe_buffer* new_elts; + struct pipe_resource* new_elts; unsigned char *in_map; unsigned short *out_map; + struct pipe_transfer *src_transfer, *dst_transfer; unsigned i; - new_elts = screen->buffer_create(screen, 32, - PIPE_BUFFER_USAGE_INDEX | - PIPE_BUFFER_USAGE_CPU_WRITE | - PIPE_BUFFER_USAGE_GPU_READ, - 2 * count); + new_elts = pipe_buffer_create(screen, + PIPE_BIND_INDEX_BUFFER, + 2 * count); + + in_map = pipe_buffer_map(context, *elts, PIPE_TRANSFER_READ, &src_transfer); + out_map = pipe_buffer_map(context, new_elts, PIPE_TRANSFER_WRITE, &dst_transfer); - in_map = pipe_buffer_map(screen, *elts, PIPE_BUFFER_USAGE_CPU_READ); - out_map = pipe_buffer_map(screen, new_elts, PIPE_BUFFER_USAGE_CPU_WRITE); + in_map += start; for (i = 0; i < count; i++) { *out_map = (unsigned short)*in_map; @@ -344,16 +506,45 @@ static void r300_shorten_ubyte_elts(struct r300_context* r300, out_map++; } - pipe_buffer_unmap(screen, *elts); - pipe_buffer_unmap(screen, new_elts); + pipe_buffer_unmap(context, *elts, src_transfer); + pipe_buffer_unmap(context, new_elts, dst_transfer); + + *elts = new_elts; +} + +static void r300_align_ushort_elts(struct r300_context *r300, + struct pipe_resource **elts, + unsigned start, unsigned count) +{ + struct pipe_context* context = &r300->context; + struct pipe_transfer *in_transfer = NULL; + struct pipe_transfer *out_transfer = NULL; + struct pipe_resource* new_elts; + unsigned short *in_map; + unsigned short *out_map; + + new_elts = pipe_buffer_create(context->screen, + PIPE_BIND_INDEX_BUFFER, + 2 * count); + + in_map = pipe_buffer_map(context, *elts, + PIPE_TRANSFER_READ, &in_transfer); + out_map = pipe_buffer_map(context, new_elts, + PIPE_TRANSFER_WRITE, &out_transfer); + + memcpy(out_map, in_map+start, 2 * count); + + pipe_buffer_unmap(context, *elts, in_transfer); + pipe_buffer_unmap(context, new_elts, out_transfer); *elts = new_elts; } /* This is the fast-path drawing & emission for HW TCL. */ void r300_draw_range_elements(struct pipe_context* pipe, - struct pipe_buffer* indexBuffer, + struct pipe_resource* indexBuffer, unsigned indexSize, + int indexBias, unsigned minIndex, unsigned maxIndex, unsigned mode, @@ -361,68 +552,79 @@ void r300_draw_range_elements(struct pipe_context* pipe, unsigned count) { struct r300_context* r300 = r300_context(pipe); - struct pipe_buffer* orgIndexBuffer = indexBuffer; -#if defined(ENABLE_ALT_NUM_VERTS) - boolean alt_num_verts = r300_screen(pipe->screen)->caps->is_r500 && - count > 65536; -#else - boolean alt_num_verts = FALSE; -#endif + struct pipe_resource* orgIndexBuffer = indexBuffer; + boolean alt_num_verts = r300->screen->caps.is_r500 && + count > 65536 && + r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0); unsigned short_count; + if (r300->skip_rendering) { + return; + } + if (!u_trim_pipe_prim(mode, &count)) { return; } if (indexSize == 1) { - r300_shorten_ubyte_elts(r300, &indexBuffer, count); + r300_shorten_ubyte_elts(r300, &indexBuffer, start, count); indexSize = 2; + start = 0; + } else if (indexSize == 2 && start % 2 != 0) { + r300_align_ushort_elts(r300, &indexBuffer, start, count); + start = 0; } r300_update_derived_state(r300); + r300_upload_index_buffer(r300, &indexBuffer, indexSize, start, count); + /* 128 dwords for emit_aos and emit_draw_elements */ r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128); r300_emit_buffer_validate(r300, TRUE, indexBuffer); r300_emit_dirty_state(r300); - r300_emit_aos(r300, 0); + r300_emit_aos(r300, 0, TRUE); + u_upload_flush(r300->upload_vb); + u_upload_flush(r300->upload_ib); if (alt_num_verts || count <= 65535) { - r300_emit_draw_elements(r300, indexBuffer, indexSize, minIndex, - maxIndex, mode, start, count); + r300->emit_draw_elements(r300, indexBuffer, indexSize, indexBias, + minIndex, maxIndex, mode, start, count); } else { do { short_count = MIN2(count, 65534); - r300_emit_draw_elements(r300, indexBuffer, indexSize, minIndex, - maxIndex, mode, start, short_count); + r300->emit_draw_elements(r300, indexBuffer, indexSize, indexBias, + minIndex, maxIndex, + mode, start, short_count); start += short_count; count -= short_count; - /* 16 spare dwords are enough for emit_draw_elements. */ - if (count && r300_reserve_cs_space(r300, 16)) { + /* 16 spare dwords are enough for emit_draw_elements. + * Also reserve some space for emit_query_end. */ + if (count && r300_reserve_cs_space(r300, 74)) { r300_emit_buffer_validate(r300, TRUE, indexBuffer); r300_emit_dirty_state(r300); - r300_emit_aos(r300, 0); + r300_emit_aos(r300, 0, TRUE); } } while (count); } if (indexBuffer != orgIndexBuffer) { - pipe->screen->buffer_destroy(indexBuffer); + pipe_resource_reference( &indexBuffer, NULL ); } } /* Simple helpers for context setup. Should probably be moved to util. */ void r300_draw_elements(struct pipe_context* pipe, - struct pipe_buffer* indexBuffer, - unsigned indexSize, unsigned mode, + struct pipe_resource* indexBuffer, + unsigned indexSize, int indexBias, unsigned mode, unsigned start, unsigned count) { struct r300_context *r300 = r300_context(pipe); - pipe->draw_range_elements(pipe, indexBuffer, indexSize, 0, - r300->vertex_buffer_max_index, + pipe->draw_range_elements(pipe, indexBuffer, indexSize, indexBias, + 0, r300->vertex_buffer_max_index, mode, start, count); } @@ -430,14 +632,15 @@ void r300_draw_arrays(struct pipe_context* pipe, unsigned mode, unsigned start, unsigned count) { struct r300_context* r300 = r300_context(pipe); -#if defined(ENABLE_ALT_NUM_VERTS) - boolean alt_num_verts = r300_screen(pipe->screen)->caps->is_r500 && - count > 65536; -#else - boolean alt_num_verts = FALSE; -#endif + boolean alt_num_verts = r300->screen->caps.is_r500 && + count > 65536 && + r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0); unsigned short_count; + if (r300->skip_rendering) { + return; + } + if (!u_trim_pipe_prim(mode, &count)) { return; } @@ -445,34 +648,36 @@ void r300_draw_arrays(struct pipe_context* pipe, unsigned mode, r300_update_derived_state(r300); if (immd_is_good_idea(r300, count)) { - r300_emit_draw_arrays_immediate(r300, mode, start, count); + r300->emit_draw_arrays_immediate(r300, mode, start, count); } else { /* Make sure there are at least 128 spare dwords in the command buffer. * (most of it being consumed by emit_aos) */ r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128); - r300_emit_buffer_validate(r300, TRUE, 0); + r300_emit_buffer_validate(r300, TRUE, NULL); r300_emit_dirty_state(r300); if (alt_num_verts || count <= 65535) { - r300_emit_aos(r300, start); - r300_emit_draw_arrays(r300, mode, count); + r300_emit_aos(r300, start, FALSE); + r300->emit_draw_arrays(r300, mode, count); } else { do { short_count = MIN2(count, 65535); - r300_emit_aos(r300, start); - r300_emit_draw_arrays(r300, mode, short_count); + r300_emit_aos(r300, start, FALSE); + r300->emit_draw_arrays(r300, mode, short_count); start += short_count; count -= short_count; /* Again, we emit both AOS and draw_arrays so there should be - * at least 128 spare dwords. */ - if (count && r300_reserve_cs_space(r300, 128)) { - r300_emit_buffer_validate(r300, TRUE, 0); + * at least 128 spare dwords. + * Also reserve some space for emit_query_end. */ + if (count && r300_reserve_cs_space(r300, 186)) { + r300_emit_buffer_validate(r300, TRUE, NULL); r300_emit_dirty_state(r300); } } while (count); } + u_upload_flush(r300->upload_vb); } } @@ -488,40 +693,41 @@ void r300_swtcl_draw_arrays(struct pipe_context* pipe, unsigned count) { struct r300_context* r300 = r300_context(pipe); + struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS]; int i; + if (r300->skip_rendering) { + return; + } + if (!u_trim_pipe_prim(mode, &count)) { return; } for (i = 0; i < r300->vertex_buffer_count; i++) { - void* buf = pipe_buffer_map(pipe->screen, + void* buf = pipe_buffer_map(pipe, r300->vertex_buffer[i].buffer, - PIPE_BUFFER_USAGE_CPU_READ); + PIPE_TRANSFER_READ, + &vb_transfer[i]); draw_set_mapped_vertex_buffer(r300->draw, i, buf); } - draw_set_mapped_element_buffer(r300->draw, 0, NULL); - - draw_set_mapped_constant_buffer(r300->draw, - PIPE_SHADER_VERTEX, - 0, - r300->shader_constants[PIPE_SHADER_VERTEX].constants, - r300->shader_constants[PIPE_SHADER_VERTEX].count * - (sizeof(float) * 4)); + draw_set_mapped_element_buffer(r300->draw, 0, 0, NULL); draw_arrays(r300->draw, mode, start, count); for (i = 0; i < r300->vertex_buffer_count; i++) { - pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer); + pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer, + vb_transfer[i]); draw_set_mapped_vertex_buffer(r300->draw, i, NULL); } } /* SW TCL elements, using Draw. */ void r300_swtcl_draw_range_elements(struct pipe_context* pipe, - struct pipe_buffer* indexBuffer, + struct pipe_resource* indexBuffer, unsigned indexSize, + int indexBias, unsigned minIndex, unsigned maxIndex, unsigned mode, @@ -529,42 +735,45 @@ void r300_swtcl_draw_range_elements(struct pipe_context* pipe, unsigned count) { struct r300_context* r300 = r300_context(pipe); + struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS]; + struct pipe_transfer *ib_transfer; int i; void* indices; + if (r300->skip_rendering) { + return; + } + if (!u_trim_pipe_prim(mode, &count)) { return; } for (i = 0; i < r300->vertex_buffer_count; i++) { - void* buf = pipe_buffer_map(pipe->screen, + void* buf = pipe_buffer_map(pipe, r300->vertex_buffer[i].buffer, - PIPE_BUFFER_USAGE_CPU_READ); + PIPE_TRANSFER_READ, + &vb_transfer[i]); draw_set_mapped_vertex_buffer(r300->draw, i, buf); } - indices = pipe_buffer_map(pipe->screen, indexBuffer, - PIPE_BUFFER_USAGE_CPU_READ); - draw_set_mapped_element_buffer_range(r300->draw, indexSize, + indices = pipe_buffer_map(pipe, indexBuffer, + PIPE_TRANSFER_READ, &ib_transfer); + draw_set_mapped_element_buffer_range(r300->draw, indexSize, indexBias, minIndex, maxIndex, indices); - draw_set_mapped_constant_buffer(r300->draw, - PIPE_SHADER_VERTEX, - 0, - r300->shader_constants[PIPE_SHADER_VERTEX].constants, - r300->shader_constants[PIPE_SHADER_VERTEX].count * - (sizeof(float) * 4)); - draw_arrays(r300->draw, mode, start, count); for (i = 0; i < r300->vertex_buffer_count; i++) { - pipe_buffer_unmap(pipe->screen, r300->vertex_buffer[i].buffer); + pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer, + vb_transfer[i]); draw_set_mapped_vertex_buffer(r300->draw, i, NULL); } - pipe_buffer_unmap(pipe->screen, indexBuffer); - draw_set_mapped_element_buffer_range(r300->draw, 0, start, - start + count - 1, NULL); + pipe_buffer_unmap(pipe, indexBuffer, + ib_transfer); + draw_set_mapped_element_buffer_range(r300->draw, 0, 0, + start, start + count - 1, + NULL); } /* Object for rendering using Draw. */ @@ -581,11 +790,13 @@ struct r300_render { unsigned hwprim; /* VBO */ - struct pipe_buffer* vbo; + struct pipe_resource* vbo; size_t vbo_size; size_t vbo_offset; size_t vbo_max_used; void * vbo_ptr; + + struct pipe_transfer *vbo_transfer; }; static INLINE struct r300_render* @@ -616,13 +827,12 @@ static boolean r300_render_allocate_vertices(struct vbuf_render* render, if (size + r300render->vbo_offset > r300render->vbo_size) { - pipe_buffer_reference(&r300->vbo, NULL); + pipe_resource_reference(&r300->vbo, NULL); r300render->vbo = pipe_buffer_create(screen, - 64, - PIPE_BUFFER_USAGE_VERTEX, - R300_MAX_VBO_SIZE); + PIPE_BIND_VERTEX_BUFFER, + R300_MAX_DRAW_VBO_SIZE); r300render->vbo_offset = 0; - r300render->vbo_size = R300_MAX_VBO_SIZE; + r300render->vbo_size = R300_MAX_DRAW_VBO_SIZE; } r300render->vertex_size = vertex_size; @@ -635,10 +845,11 @@ static boolean r300_render_allocate_vertices(struct vbuf_render* render, static void* r300_render_map_vertices(struct vbuf_render* render) { struct r300_render* r300render = r300_render(render); - struct pipe_screen* screen = r300render->r300->context.screen; - r300render->vbo_ptr = pipe_buffer_map(screen, r300render->vbo, - PIPE_BUFFER_USAGE_CPU_WRITE); + r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context, + r300render->vbo, + PIPE_TRANSFER_WRITE, + &r300render->vbo_transfer); return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset); } @@ -648,7 +859,7 @@ static void r300_render_unmap_vertices(struct vbuf_render* render, ushort max) { struct r300_render* r300render = r300_render(render); - struct pipe_screen* screen = r300render->r300->context.screen; + struct pipe_context* context = &r300render->r300->context; CS_LOCALS(r300render->r300); BEGIN_CS(2); OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max); @@ -656,7 +867,7 @@ static void r300_render_unmap_vertices(struct vbuf_render* render, r300render->vbo_max_used = MAX2(r300render->vbo_max_used, r300render->vertex_size * (max + 1)); - pipe_buffer_unmap(screen, r300render->vbo); + pipe_buffer_unmap(context, r300render->vbo, r300render->vbo_transfer); } static void r300_render_release_vertices(struct vbuf_render* render) @@ -678,9 +889,9 @@ static boolean r300_render_set_primitive(struct vbuf_render* render, return TRUE; } -static void r300_render_draw_arrays(struct vbuf_render* render, - unsigned start, - unsigned count) +static void r500_render_draw_arrays(struct vbuf_render* render, + unsigned start, + unsigned count) { struct r300_render* r300render = r300_render(render); struct r300_context* r300 = r300render->r300; @@ -688,10 +899,13 @@ static void r300_render_draw_arrays(struct vbuf_render* render, CS_LOCALS(r300); r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 2); + r300_emit_buffer_validate(r300, FALSE, NULL); r300_emit_dirty_state(r300); DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count); + r500_emit_index_offset(r300, 0); + BEGIN_CS(2); OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | @@ -699,9 +913,9 @@ static void r300_render_draw_arrays(struct vbuf_render* render, END_CS; } -static void r300_render_draw(struct vbuf_render* render, - const ushort* indices, - uint count) +static void r500_render_draw(struct vbuf_render* render, + const ushort* indices, + uint count) { struct r300_render* r300render = r300_render(render); struct r300_context* r300 = r300render->r300; @@ -711,8 +925,11 @@ static void r300_render_draw(struct vbuf_render* render, CS_LOCALS(r300); r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords); + r300_emit_buffer_validate(r300, FALSE, NULL); r300_emit_dirty_state(r300); + r500_emit_index_offset(r300, 0); + BEGIN_CS(dwords); OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2); OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | @@ -726,6 +943,40 @@ static void r300_render_draw(struct vbuf_render* render, END_CS; } +static void r300_render_draw_arrays(struct vbuf_render* render, + unsigned start, + unsigned count) +{ + struct r300_context* r300 = r300_render(render)->r300; + + if (!r300->stencil_ref_bf_fallback) { + r500_render_draw_arrays(render, start, count); + } else { + r300_begin_stencil_ref_fallback(r300); + r500_render_draw_arrays(render, start, count); + r300_switch_stencil_ref_side(r300); + r500_render_draw_arrays(render, start, count); + r300_end_stencil_ref_fallback(r300); + } +} + +static void r300_render_draw(struct vbuf_render* render, + const ushort* indices, + uint count) +{ + struct r300_context* r300 = r300_render(render)->r300; + + if (!r300->stencil_ref_bf_fallback) { + r500_render_draw(render, indices, count); + } else { + r300_begin_stencil_ref_fallback(r300); + r500_render_draw(render, indices, count); + r300_switch_stencil_ref_side(r300); + r500_render_draw(render, indices, count); + r300_end_stencil_ref_fallback(r300); + } +} + static void r300_render_destroy(struct vbuf_render* render) { FREE(render); @@ -746,8 +997,13 @@ static struct vbuf_render* r300_render_create(struct r300_context* r300) r300render->base.map_vertices = r300_render_map_vertices; r300render->base.unmap_vertices = r300_render_unmap_vertices; r300render->base.set_primitive = r300_render_set_primitive; - r300render->base.draw = r300_render_draw; - r300render->base.draw_arrays = r300_render_draw_arrays; + if (r300->screen->caps.is_r500) { + r300render->base.draw = r500_render_draw; + r300render->base.draw_arrays = r500_render_draw_arrays; + } else { + r300render->base.draw = r300_render_draw; + r300render->base.draw_arrays = r300_render_draw_arrays; + } r300render->base.release_vertices = r300_render_release_vertices; r300render->base.destroy = r300_render_destroy; diff --git a/src/gallium/drivers/r300/r300_render.h b/src/gallium/drivers/r300/r300_render.h index 27b5e6a9630..4e78914c1ba 100644 --- a/src/gallium/drivers/r300/r300_render.h +++ b/src/gallium/drivers/r300/r300_render.h @@ -23,11 +23,48 @@ #ifndef R300_RENDER_H #define R300_RENDER_H -uint32_t r300_translate_primitive(unsigned prim); +void r500_emit_draw_arrays_immediate(struct r300_context *r300, + unsigned mode, + unsigned start, + unsigned count); + +void r500_emit_draw_arrays(struct r300_context *r300, + unsigned mode, + unsigned count); + +void r500_emit_draw_elements(struct r300_context *r300, + struct pipe_resource* indexBuffer, + unsigned indexSize, + int indexBias, + unsigned minIndex, + unsigned maxIndex, + unsigned mode, + unsigned start, + unsigned count); + +void r300_emit_draw_arrays_immediate(struct r300_context *r300, + unsigned mode, + unsigned start, + unsigned count); + +void r300_emit_draw_arrays(struct r300_context *r300, + unsigned mode, + unsigned count); + +void r300_emit_draw_elements(struct r300_context *r300, + struct pipe_resource* indexBuffer, + unsigned indexSize, + int indexBias, + unsigned minIndex, + unsigned maxIndex, + unsigned mode, + unsigned start, + unsigned count); void r300_draw_range_elements(struct pipe_context* pipe, - struct pipe_buffer* indexBuffer, + struct pipe_resource* indexBuffer, unsigned indexSize, + int indexBias, unsigned minIndex, unsigned maxIndex, unsigned mode, @@ -35,8 +72,8 @@ void r300_draw_range_elements(struct pipe_context* pipe, unsigned count); void r300_draw_elements(struct pipe_context* pipe, - struct pipe_buffer* indexBuffer, - unsigned indexSize, unsigned mode, + struct pipe_resource* indexBuffer, + unsigned indexSize, int indexBias, unsigned mode, unsigned start, unsigned count); void r300_draw_arrays(struct pipe_context* pipe, unsigned mode, @@ -48,8 +85,9 @@ void r300_swtcl_draw_arrays(struct pipe_context* pipe, unsigned count); void r300_swtcl_draw_range_elements(struct pipe_context* pipe, - struct pipe_buffer* indexBuffer, + struct pipe_resource* indexBuffer, unsigned indexSize, + int indexBias, unsigned minIndex, unsigned maxIndex, unsigned mode, diff --git a/src/gallium/drivers/r300/r300_resource.c b/src/gallium/drivers/r300/r300_resource.c new file mode 100644 index 00000000000..7ed47eaa605 --- /dev/null +++ b/src/gallium/drivers/r300/r300_resource.c @@ -0,0 +1,83 @@ +/* + * Copyright 2010 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Dave Airlie + */ + +#include <stdio.h> + +#include "util/u_inlines.h" +#include "util/u_format.h" +#include "util/u_memory.h" +#include "util/u_upload_mgr.h" +#include "util/u_math.h" + +#include "r300_context.h" +#include "r300_texture.h" +#include "r300_screen.h" +#include "r300_screen_buffer.h" +#include "r300_winsys.h" + +static struct pipe_resource * +r300_resource_create(struct pipe_screen *screen, + const struct pipe_resource *templ) +{ + if (templ->target == PIPE_BUFFER) + return r300_buffer_create(screen, templ); + else + return r300_texture_create(screen, templ); + +} + +static struct pipe_resource * +r300_resource_from_handle(struct pipe_screen * screen, + const struct pipe_resource *templ, + struct winsys_handle *whandle) +{ + if (templ->target == PIPE_BUFFER) + return NULL; + else + return r300_texture_from_handle(screen, templ, whandle); +} + +void r300_init_resource_functions(struct r300_context *r300) +{ + r300->context.get_transfer = u_get_transfer_vtbl; + r300->context.transfer_map = u_transfer_map_vtbl; + r300->context.transfer_flush_region = u_transfer_flush_region_vtbl; + r300->context.transfer_unmap = u_transfer_unmap_vtbl; + r300->context.transfer_destroy = u_transfer_destroy_vtbl; + r300->context.transfer_inline_write = u_transfer_inline_write_vtbl; + r300->context.is_resource_referenced = u_is_resource_referenced_vtbl; +} + +void r300_init_screen_resource_functions(struct r300_screen *r300screen) +{ + r300screen->screen.resource_create = r300_resource_create; + r300screen->screen.resource_from_handle = r300_resource_from_handle; + r300screen->screen.resource_get_handle = u_resource_get_handle_vtbl; + r300screen->screen.resource_destroy = u_resource_destroy_vtbl; + r300screen->screen.user_buffer_create = r300_user_buffer_create; + + r300screen->screen.get_tex_surface = r300_get_tex_surface; + r300screen->screen.tex_surface_destroy = r300_tex_surface_destroy; +} diff --git a/src/gallium/drivers/r300/r300_screen.c b/src/gallium/drivers/r300/r300_screen.c index d397a8eb2b4..8fc1d5aa00e 100644 --- a/src/gallium/drivers/r300/r300_screen.c +++ b/src/gallium/drivers/r300/r300_screen.c @@ -1,5 +1,6 @@ /* * Copyright 2008 Corbin Simpson <[email protected]> + * Copyright 2010 Marek Olšák <[email protected]> * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -20,16 +21,12 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ -#include "util/u_inlines.h" #include "util/u_format.h" #include "util/u_memory.h" -#include "util/u_simple_screen.h" #include "r300_context.h" -#include "r300_screen.h" #include "r300_texture.h" - -#include "radeon_winsys.h" +#include "r300_screen_buffer.h" #include "r300_winsys.h" /* Return the identifier behind whom the brave coders responsible for this @@ -75,7 +72,7 @@ static const char* r300_get_name(struct pipe_screen* pscreen) { struct r300_screen* r300screen = r300_screen(pscreen); - return chip_families[r300screen->caps->family]; + return chip_families[r300screen->caps.family]; } static int r300_get_param(struct pipe_screen* pscreen, int param) @@ -85,18 +82,13 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) switch (param) { case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS: case PIPE_CAP_MAX_COMBINED_SAMPLERS: - /* XXX I'm told this goes up to 16 */ - return 8; + return r300screen->caps.num_tex_units; case PIPE_CAP_NPOT_TEXTURES: /* XXX enable now to get GL2.1 API, * figure out later how to emulate this */ return 1; case PIPE_CAP_TWO_SIDED_STENCIL: - if (r300screen->caps->is_r500) { - return 1; - } else { - return 0; - } + return 1; case PIPE_CAP_GLSL: /* I'll be frank. This is a lie. * @@ -129,7 +121,7 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: - if (r300screen->caps->is_r500) { + if (r300screen->caps.is_r500) { /* 13 == 4096 */ return 13; } else { @@ -147,7 +139,7 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) case PIPE_CAP_BLEND_EQUATION_SEPARATE: return 1; case PIPE_CAP_SM3: - if (r300screen->caps->is_r500) { + if (r300screen->caps.is_r500) { return 1; } else { return 0; @@ -167,7 +159,7 @@ static int r300_get_param(struct pipe_screen* pscreen, int param) case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: return 0; default: - debug_printf("r300: Implementation error: Bad param %d\n", + fprintf(stderr, "r300: Implementation error: Bad param %d\n", param); return 0; } @@ -184,9 +176,9 @@ static float r300_get_paramf(struct pipe_screen* pscreen, int param) case PIPE_CAP_MAX_POINT_WIDTH_AA: /* The maximum dimensions of the colorbuffer are our practical * rendering limits. 2048 pixels should be enough for anybody. */ - if (r300screen->caps->is_r500) { + if (r300screen->caps.is_r500) { return 4096.0f; - } else if (r300screen->caps->is_r400) { + } else if (r300screen->caps.is_r400) { return 4021.0f; } else { return 2560.0f; @@ -196,7 +188,7 @@ static float r300_get_paramf(struct pipe_screen* pscreen, int param) case PIPE_CAP_MAX_TEXTURE_LOD_BIAS: return 16.0f; default: - debug_printf("r300: Implementation error: Bad paramf %d\n", + fprintf(stderr, "r300: Implementation error: Bad paramf %d\n", param); return 0.0f; } @@ -209,140 +201,110 @@ static boolean r300_is_format_supported(struct pipe_screen* screen, unsigned geom_flags) { uint32_t retval = 0; - boolean is_r500 = r300_screen(screen)->caps->is_r500; + boolean is_r500 = r300_screen(screen)->caps.is_r500; + boolean is_r400 = r300_screen(screen)->caps.is_r400; boolean is_z24 = format == PIPE_FORMAT_X8Z24_UNORM || - format == PIPE_FORMAT_S8Z24_UNORM; - boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM; + format == PIPE_FORMAT_S8_USCALED_Z24_UNORM; + boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM || + format == PIPE_FORMAT_R10G10B10X2_SNORM || + format == PIPE_FORMAT_B10G10R10A2_UNORM || + format == PIPE_FORMAT_R10SG10SB10SA2U_NORM; + boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM || + format == PIPE_FORMAT_RGTC1_SNORM; + boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM || + format == PIPE_FORMAT_RGTC2_SNORM; if (target >= PIPE_MAX_TEXTURE_TYPES) { - debug_printf("r300: Implementation error: Received bogus texture " + fprintf(stderr, "r300: Implementation error: Received bogus texture " "target %d in %s\n", target, __FUNCTION__); return FALSE; } /* Check sampler format support. */ - if ((usage & PIPE_TEXTURE_USAGE_SAMPLER) && + if ((usage & PIPE_BIND_SAMPLER_VIEW) && /* Z24 cannot be sampled from on non-r5xx. */ (is_r500 || !is_z24) && + /* ATI1N is r5xx-only. */ + (is_r500 || !is_ati1n) && + /* ATI2N is supported on r4xx-r5xx. */ + (is_r400 || is_r500 || !is_ati2n) && r300_is_sampler_format_supported(format)) { - retval |= PIPE_TEXTURE_USAGE_SAMPLER; + retval |= PIPE_BIND_SAMPLER_VIEW; } /* Check colorbuffer format support. */ - if ((usage & (PIPE_TEXTURE_USAGE_RENDER_TARGET | - PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_PRIMARY)) && + if ((usage & (PIPE_BIND_RENDER_TARGET | + PIPE_BIND_DISPLAY_TARGET | + PIPE_BIND_SCANOUT | + PIPE_BIND_SHARED)) && /* 2101010 cannot be rendered to on non-r5xx. */ (is_r500 || !is_color2101010) && r300_is_colorbuffer_format_supported(format)) { retval |= usage & - (PIPE_TEXTURE_USAGE_RENDER_TARGET | - PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_PRIMARY); + (PIPE_BIND_RENDER_TARGET | + PIPE_BIND_DISPLAY_TARGET | + PIPE_BIND_SCANOUT | + PIPE_BIND_SHARED); } /* Check depth-stencil format support. */ - if (usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL && + if (usage & PIPE_BIND_DEPTH_STENCIL && r300_is_zs_format_supported(format)) { - retval |= PIPE_TEXTURE_USAGE_DEPTH_STENCIL; + retval |= PIPE_BIND_DEPTH_STENCIL; } return retval == usage; } -static struct pipe_transfer* -r300_get_tex_transfer(struct pipe_screen *screen, - struct pipe_texture *texture, - unsigned face, unsigned level, unsigned zslice, - enum pipe_transfer_usage usage, unsigned x, unsigned y, - unsigned w, unsigned h) +static void r300_destroy_screen(struct pipe_screen* pscreen) { - struct r300_texture *tex = (struct r300_texture *)texture; - struct r300_transfer *trans; - struct r300_screen *rscreen = r300_screen(screen); - unsigned offset; - - offset = r300_texture_get_offset(tex, level, zslice, face); /* in bytes */ + struct r300_screen* r300screen = r300_screen(pscreen); + struct r300_winsys_screen *rws = r300_winsys_screen(pscreen); - trans = CALLOC_STRUCT(r300_transfer); - if (trans) { - pipe_texture_reference(&trans->transfer.texture, texture); - trans->transfer.x = x; - trans->transfer.y = y; - trans->transfer.width = w; - trans->transfer.height = h; - trans->transfer.stride = r300_texture_get_stride(rscreen, tex, level); - trans->transfer.usage = usage; - trans->transfer.zslice = zslice; - trans->transfer.face = face; + if (rws) + rws->destroy(rws); - trans->offset = offset; - } - return &trans->transfer; + FREE(r300screen); } -static void -r300_tex_transfer_destroy(struct pipe_transfer *trans) +static void r300_fence_reference(struct pipe_screen *screen, + struct pipe_fence_handle **ptr, + struct pipe_fence_handle *fence) { - pipe_texture_reference(&trans->texture, NULL); - FREE(trans); } -static void* r300_transfer_map(struct pipe_screen* screen, - struct pipe_transfer* transfer) +static int r300_fence_signalled(struct pipe_screen *screen, + struct pipe_fence_handle *fence, + unsigned flags) { - struct r300_texture* tex = (struct r300_texture*)transfer->texture; - char* map; - enum pipe_format format = tex->tex.format; - - map = pipe_buffer_map(screen, tex->buffer, - pipe_transfer_buffer_flags(transfer)); - - if (!map) { - return NULL; - } - - return map + r300_transfer(transfer)->offset + - transfer->y / util_format_get_blockheight(format) * transfer->stride + - transfer->x / util_format_get_blockwidth(format) * util_format_get_blocksize(format); + return 0; } -static void r300_transfer_unmap(struct pipe_screen* screen, - struct pipe_transfer* transfer) +static int r300_fence_finish(struct pipe_screen *screen, + struct pipe_fence_handle *fence, + unsigned flags) { - struct r300_texture* tex = (struct r300_texture*)transfer->texture; - pipe_buffer_unmap(screen, tex->buffer); + return 0; } -static void r300_destroy_screen(struct pipe_screen* pscreen) +struct pipe_screen* r300_create_screen(struct r300_winsys_screen *rws) { - struct r300_screen* r300screen = r300_screen(pscreen); - - FREE(r300screen->caps); - FREE(r300screen); -} + struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen); -struct pipe_screen* r300_create_screen(struct radeon_winsys* radeon_winsys) -{ - struct r300_screen* r300screen = CALLOC_STRUCT(r300_screen); - struct r300_capabilities* caps = CALLOC_STRUCT(r300_capabilities); - - if (!r300screen || !caps) { + if (!r300screen) { FREE(r300screen); - FREE(caps); return NULL; } - caps->pci_id = radeon_winsys->pci_id; - caps->num_frag_pipes = radeon_winsys->gb_pipes; - caps->num_z_pipes = radeon_winsys->z_pipes; + r300screen->caps.pci_id = rws->get_value(rws, R300_VID_PCI_ID); + r300screen->caps.num_frag_pipes = rws->get_value(rws, R300_VID_GB_PIPES); + r300screen->caps.num_z_pipes = rws->get_value(rws, R300_VID_Z_PIPES); r300_init_debug(r300screen); - r300_parse_chipset(caps); + r300_parse_chipset(&r300screen->caps); - r300screen->caps = caps; - r300screen->radeon_winsys = radeon_winsys; - r300screen->screen.winsys = (struct pipe_winsys*)radeon_winsys; + r300screen->rws = rws; + r300screen->screen.winsys = (struct pipe_winsys*)rws; r300screen->screen.destroy = r300_destroy_screen; r300screen->screen.get_name = r300_get_name; r300screen->screen.get_vendor = r300_get_vendor; @@ -350,13 +312,18 @@ struct pipe_screen* r300_create_screen(struct radeon_winsys* radeon_winsys) r300screen->screen.get_paramf = r300_get_paramf; r300screen->screen.is_format_supported = r300_is_format_supported; r300screen->screen.context_create = r300_create_context; - r300screen->screen.get_tex_transfer = r300_get_tex_transfer; - r300screen->screen.tex_transfer_destroy = r300_tex_transfer_destroy; - r300screen->screen.transfer_map = r300_transfer_map; - r300screen->screen.transfer_unmap = r300_transfer_unmap; - r300_init_screen_texture_functions(&r300screen->screen); - u_simple_screen_init(&r300screen->screen); + r300screen->screen.fence_reference = r300_fence_reference; + r300screen->screen.fence_signalled = r300_fence_signalled; + r300screen->screen.fence_finish = r300_fence_finish; + + r300_init_screen_resource_functions(r300screen); return &r300screen->screen; } + +struct r300_winsys_screen * +r300_winsys_screen(struct pipe_screen *screen) +{ + return r300_screen(screen)->rws; +} diff --git a/src/gallium/drivers/r300/r300_screen.h b/src/gallium/drivers/r300/r300_screen.h index 502fbfa5a24..70ea2fe8d92 100644 --- a/src/gallium/drivers/r300/r300_screen.h +++ b/src/gallium/drivers/r300/r300_screen.h @@ -1,5 +1,6 @@ /* * Copyright 2008 Corbin Simpson <[email protected]> + * Copyright 2010 Marek Olšák <[email protected]> * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -27,41 +28,27 @@ #include "r300_chipset.h" -struct radeon_winsys; +#include <stdio.h> struct r300_screen { /* Parent class */ struct pipe_screen screen; - struct radeon_winsys* radeon_winsys; + struct r300_winsys_screen *rws; /* Chipset capabilities */ - struct r300_capabilities* caps; + struct r300_capabilities caps; /** Combination of DBG_xxx flags */ unsigned debug; }; -struct r300_transfer { - /* Parent class */ - struct pipe_transfer transfer; - - /* Offset from start of buffer. */ - unsigned offset; -}; /* Convenience cast wrapper. */ static INLINE struct r300_screen* r300_screen(struct pipe_screen* screen) { return (struct r300_screen*)screen; } -/* Convenience cast wrapper. */ -static INLINE struct r300_transfer* -r300_transfer(struct pipe_transfer* transfer) -{ - return (struct r300_transfer*)transfer; -} - /* Debug functionality. */ /** @@ -81,6 +68,10 @@ r300_transfer(struct pipe_transfer* transfer) #define DBG_DRAW 0x0000010 #define DBG_TEX 0x0000020 #define DBG_FALL 0x0000040 +#define DBG_ANISOHQ 0x0000080 +#define DBG_NO_TILING 0x0000100 +#define DBG_NO_IMMD 0x0000200 +#define DBG_STATS 0x0000400 /*@}*/ static INLINE boolean SCREEN_DBG_ON(struct r300_screen * screen, unsigned flags) @@ -94,12 +85,13 @@ static INLINE void SCREEN_DBG(struct r300_screen * screen, unsigned flags, if (SCREEN_DBG_ON(screen, flags)) { va_list va; va_start(va, fmt); - debug_vprintf(fmt, va); + vfprintf(stderr, fmt, va); va_end(va); } } void r300_init_debug(struct r300_screen* ctx); -#endif /* R300_SCREEN_H */ +void r300_init_screen_resource_functions(struct r300_screen *r300screen); +#endif /* R300_SCREEN_H */ diff --git a/src/gallium/drivers/r300/r300_screen_buffer.c b/src/gallium/drivers/r300/r300_screen_buffer.c new file mode 100644 index 00000000000..3e2b5afe6f4 --- /dev/null +++ b/src/gallium/drivers/r300/r300_screen_buffer.c @@ -0,0 +1,324 @@ +/* + * Copyright 2010 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Dave Airlie + */ + +#include <stdio.h> + +#include "util/u_inlines.h" +#include "util/u_memory.h" +#include "util/u_upload_mgr.h" +#include "util/u_math.h" + +#include "r300_screen_buffer.h" +#include "r300_winsys.h" + +unsigned r300_buffer_is_referenced(struct pipe_context *context, + struct pipe_resource *buf, + enum r300_reference_domain domain) +{ + struct r300_context *r300 = r300_context(context); + struct r300_buffer *rbuf = r300_buffer(buf); + + if (r300_buffer_is_user_buffer(buf)) + return PIPE_UNREFERENCED; + + if (r300->rws->is_buffer_referenced(r300->rws, rbuf->buf, domain)) + return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE; + + return PIPE_UNREFERENCED; +} + +static unsigned r300_buffer_is_referenced_by_cs(struct pipe_context *context, + struct pipe_resource *buf, + unsigned face, unsigned level) +{ + return r300_buffer_is_referenced(context, buf, R300_REF_CS); +} + +/* External helper, not required to implent u_resource_vtbl: + */ +int r300_upload_index_buffer(struct r300_context *r300, + struct pipe_resource **index_buffer, + unsigned index_size, + unsigned start, + unsigned count) +{ + struct pipe_resource *upload_buffer = NULL; + unsigned index_offset = start * index_size; + int ret = 0; + + if (r300_buffer_is_user_buffer(*index_buffer)) { + ret = u_upload_buffer(r300->upload_ib, + index_offset, + count * index_size, + *index_buffer, + &index_offset, + &upload_buffer); + if (ret) { + goto done; + } + *index_buffer = upload_buffer; + } + done: + // if (upload_buffer) + // pipe_resource_reference(&upload_buffer, NULL); + return ret; +} + +/* External helper, not required to implement u_resource_vtbl: + */ +int r300_upload_user_buffers(struct r300_context *r300) +{ + enum pipe_error ret = PIPE_OK; + int i, nr; + + nr = r300->vertex_buffer_count; + + for (i = 0; i < nr; i++) { + if (r300_buffer_is_user_buffer(r300->vertex_buffer[i].buffer)) { + struct pipe_resource *upload_buffer = NULL; + unsigned offset = 0; /*r300->vertex_buffer[i].buffer_offset * 4;*/ + unsigned size = r300->vertex_buffer[i].buffer->width0; + unsigned upload_offset; + ret = u_upload_buffer(r300->upload_vb, + offset, size, + r300->vertex_buffer[i].buffer, + &upload_offset, &upload_buffer); + if (ret) + return ret; + + pipe_resource_reference(&r300->vertex_buffer[i].buffer, NULL); + r300->vertex_buffer[i].buffer = upload_buffer; + r300->vertex_buffer[i].buffer_offset = upload_offset; + } + } + return ret; +} + +static struct r300_winsys_buffer * +r300_winsys_buffer_create(struct r300_screen *r300screen, + unsigned alignment, + unsigned usage, + unsigned size) +{ + struct r300_winsys_screen *rws = r300screen->rws; + struct r300_winsys_buffer *buf; + + buf = rws->buffer_create(rws, alignment, usage, size); + return buf; +} + +static void r300_winsys_buffer_destroy(struct r300_screen *r300screen, + struct r300_buffer *rbuf) +{ + struct r300_winsys_screen *rws = r300screen->rws; + + if (rbuf->buf) { + rws->buffer_reference(rws, &rbuf->buf, NULL); + rbuf->buf = NULL; + } +} + +static void r300_buffer_destroy(struct pipe_screen *screen, + struct pipe_resource *buf) +{ + struct r300_screen *r300screen = r300_screen(screen); + struct r300_buffer *rbuf = r300_buffer(buf); + + r300_winsys_buffer_destroy(r300screen, rbuf); + FREE(rbuf); +} + +static void * +r300_buffer_transfer_map( struct pipe_context *pipe, + struct pipe_transfer *transfer ) +{ + struct r300_screen *r300screen = r300_screen(pipe->screen); + struct r300_winsys_screen *rws = r300screen->rws; + struct r300_buffer *rbuf = r300_buffer(transfer->resource); + uint8_t *map; + boolean flush = FALSE; + unsigned i; + + if (rbuf->user_buffer) + return (uint8_t *) rbuf->user_buffer + transfer->box.x; + + if (rbuf->b.b.bind & PIPE_BIND_CONSTANT_BUFFER) { + goto just_map; + } + + /* check if the mapping is to a range we already flushed */ + if (transfer->usage & PIPE_TRANSFER_DISCARD) { + for (i = 0; i < rbuf->num_ranges; i++) { + if ((transfer->box.x >= rbuf->ranges[i].start) && + (transfer->box.x < rbuf->ranges[i].end)) + flush = TRUE; + + if (flush) { + /* unreference this hw buffer and allocate a new one */ + rws->buffer_reference(rws, &rbuf->buf, NULL); + + rbuf->num_ranges = 0; + rbuf->buf = r300_winsys_buffer_create(r300screen, + 16, + rbuf->b.b.bind, /* XXX */ + rbuf->b.b.width0); + break; + } + } + } +just_map: + map = rws->buffer_map(rws, rbuf->buf, transfer->usage); + + if (map == NULL) + return NULL; + + /* map_buffer() returned a pointer to the beginning of the buffer, + * but transfers are expected to return a pointer to just the + * region specified in the box. + */ + return map + transfer->box.x; +} + +static void r300_buffer_transfer_flush_region( struct pipe_context *pipe, + struct pipe_transfer *transfer, + const struct pipe_box *box) +{ + struct r300_buffer *rbuf = r300_buffer(transfer->resource); + unsigned i; + unsigned offset = transfer->box.x + box->x; + unsigned length = box->width; + + assert(box->x + box->width <= transfer->box.width); + + if (rbuf->user_buffer) + return; + + if (rbuf->b.b.bind & PIPE_BIND_CONSTANT_BUFFER) + return; + + /* mark the range as used */ + for(i = 0; i < rbuf->num_ranges; ++i) { + if(offset <= rbuf->ranges[i].end && rbuf->ranges[i].start <= (offset+box->width)) { + rbuf->ranges[i].start = MIN2(rbuf->ranges[i].start, offset); + rbuf->ranges[i].end = MAX2(rbuf->ranges[i].end, (offset+length)); + return; + } + } + + rbuf->ranges[rbuf->num_ranges].start = offset; + rbuf->ranges[rbuf->num_ranges].end = offset+length; + rbuf->num_ranges++; +} + +static void r300_buffer_transfer_unmap( struct pipe_context *pipe, + struct pipe_transfer *transfer ) +{ + struct r300_screen *r300screen = r300_screen(pipe->screen); + struct r300_winsys_screen *rws = r300screen->rws; + struct r300_buffer *rbuf = r300_buffer(transfer->resource); + + if (rbuf->buf) { + rws->buffer_unmap(rws, rbuf->buf); + } +} + +struct u_resource_vtbl r300_buffer_vtbl = +{ + u_default_resource_get_handle, /* get_handle */ + r300_buffer_destroy, /* resource_destroy */ + r300_buffer_is_referenced_by_cs, /* is_buffer_referenced */ + u_default_get_transfer, /* get_transfer */ + u_default_transfer_destroy, /* transfer_destroy */ + r300_buffer_transfer_map, /* transfer_map */ + r300_buffer_transfer_flush_region, /* transfer_flush_region */ + r300_buffer_transfer_unmap, /* transfer_unmap */ + u_default_transfer_inline_write /* transfer_inline_write */ +}; + +struct pipe_resource *r300_buffer_create(struct pipe_screen *screen, + const struct pipe_resource *templ) +{ + struct r300_screen *r300screen = r300_screen(screen); + struct r300_buffer *rbuf; + unsigned alignment = 16; + + rbuf = CALLOC_STRUCT(r300_buffer); + if (!rbuf) + goto error1; + + rbuf->magic = R300_BUFFER_MAGIC; + + rbuf->b.b = *templ; + rbuf->b.vtbl = &r300_buffer_vtbl; + pipe_reference_init(&rbuf->b.b.reference, 1); + rbuf->b.b.screen = screen; + + if (rbuf->b.b.bind & R300_BIND_OQBO) + alignment = 4096; + + rbuf->buf = r300_winsys_buffer_create(r300screen, + alignment, + rbuf->b.b.bind, + rbuf->b.b.width0); + + if (!rbuf->buf) + goto error2; + + return &rbuf->b.b; +error2: + FREE(rbuf); +error1: + return NULL; +} + +struct pipe_resource *r300_user_buffer_create(struct pipe_screen *screen, + void *ptr, + unsigned bytes, + unsigned bind) +{ + struct r300_buffer *rbuf; + + rbuf = CALLOC_STRUCT(r300_buffer); + if (!rbuf) + goto no_rbuf; + + rbuf->magic = R300_BUFFER_MAGIC; + + pipe_reference_init(&rbuf->b.b.reference, 1); + rbuf->b.vtbl = &r300_buffer_vtbl; + rbuf->b.b.screen = screen; + rbuf->b.b.format = PIPE_FORMAT_R8_UNORM; + rbuf->b.b.usage = PIPE_USAGE_IMMUTABLE; + rbuf->b.b.bind = bind; + rbuf->b.b.width0 = bytes; + rbuf->b.b.height0 = 1; + rbuf->b.b.depth0 = 1; + + rbuf->user_buffer = ptr; + return &rbuf->b.b; + +no_rbuf: + return NULL; +} diff --git a/src/gallium/drivers/r300/r300_screen_buffer.h b/src/gallium/drivers/r300/r300_screen_buffer.h new file mode 100644 index 00000000000..57f48229b2e --- /dev/null +++ b/src/gallium/drivers/r300/r300_screen_buffer.h @@ -0,0 +1,134 @@ +/* + * Copyright 2010 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: Dave Airlie + */ + +#ifndef R300_SCREEN_BUFFER_H +#define R300_SCREEN_BUFFER_H + +#include <stdio.h> +#include "pipe/p_compiler.h" +#include "pipe/p_state.h" +#include "util/u_transfer.h" + +#include "r300_screen.h" +#include "r300_winsys.h" +#include "r300_context.h" + +#define R300_BUFFER_MAGIC 0xabcd1234 +#define R300_BUFFER_MAX_RANGES 32 + +struct r300_buffer_range { + uint32_t start; + uint32_t end; +}; + +/* Vertex buffer. */ +struct r300_buffer +{ + struct u_resource b; + + uint32_t magic; + + struct r300_winsys_buffer *buf; + + void *user_buffer; + struct r300_buffer_range ranges[R300_BUFFER_MAX_RANGES]; + unsigned num_ranges; +}; + +/* Functions. */ + +int r300_upload_user_buffers(struct r300_context *r300); + +int r300_upload_index_buffer(struct r300_context *r300, + struct pipe_resource **index_buffer, + unsigned index_size, + unsigned start, + unsigned count); + +struct pipe_resource *r300_buffer_create(struct pipe_screen *screen, + const struct pipe_resource *templ); + +struct pipe_resource *r300_user_buffer_create(struct pipe_screen *screen, + void *ptr, + unsigned bytes, + unsigned usage); + +unsigned r300_buffer_is_referenced(struct pipe_context *context, + struct pipe_resource *buf, + enum r300_reference_domain domain); + +/* Inline functions. */ + +static INLINE struct r300_buffer *r300_buffer(struct pipe_resource *buffer) +{ + if (buffer) { + assert(((struct r300_buffer *)buffer)->magic == R300_BUFFER_MAGIC); + return (struct r300_buffer *)buffer; + } + return NULL; +} + +static INLINE boolean r300_buffer_is_user_buffer(struct pipe_resource *buffer) +{ + return r300_buffer(buffer)->user_buffer ? true : false; +} + +static INLINE boolean r300_add_buffer(struct r300_winsys_screen *rws, + struct pipe_resource *buffer, + int rd, int wr) +{ + struct r300_buffer *buf = r300_buffer(buffer); + + if (!buf->buf) + return true; + + return rws->add_buffer(rws, buf->buf, rd, wr); +} + +static INLINE boolean r300_add_texture(struct r300_winsys_screen *rws, + struct r300_texture *tex, + int rd, int wr) +{ + return rws->add_buffer(rws, tex->buffer, rd, wr); +} + +static INLINE void r300_buffer_write_reloc(struct r300_winsys_screen *rws, + struct r300_buffer *buf, + uint32_t rd, uint32_t wd, uint32_t flags) +{ + if (!buf->buf) + return; + + rws->write_cs_reloc(rws, buf->buf, rd, wd, flags); +} + +static INLINE void r300_texture_write_reloc(struct r300_winsys_screen *rws, + struct r300_texture *texture, + uint32_t rd, uint32_t wd, uint32_t flags) +{ + rws->write_cs_reloc(rws, texture->buffer, rd, wd, flags); +} + +#endif diff --git a/src/gallium/drivers/r300/r300_shader_semantics.h b/src/gallium/drivers/r300/r300_shader_semantics.h index 6796841b29b..cb7a37033f3 100644 --- a/src/gallium/drivers/r300/r300_shader_semantics.h +++ b/src/gallium/drivers/r300/r300_shader_semantics.h @@ -25,7 +25,7 @@ #define ATTR_UNUSED (-1) #define ATTR_COLOR_COUNT 2 -#define ATTR_GENERIC_COUNT 16 +#define ATTR_GENERIC_COUNT 32 /* This structure contains information about what attributes are written by VS * or read by FS. (but not both) It's much easier to work with than diff --git a/src/gallium/drivers/r300/r300_state.c b/src/gallium/drivers/r300/r300_state.c index 1f6f99d3e52..edd522288bd 100644 --- a/src/gallium/drivers/r300/r300_state.c +++ b/src/gallium/drivers/r300/r300_state.c @@ -32,13 +32,16 @@ #include "pipe/p_config.h" #include "r300_context.h" +#include "r300_emit.h" #include "r300_reg.h" #include "r300_screen.h" +#include "r300_screen_buffer.h" +#include "r300_state.h" #include "r300_state_inlines.h" #include "r300_fs.h" +#include "r300_texture.h" #include "r300_vs.h" - -#include "radeon_winsys.h" +#include "r300_winsys.h" /* r300_state: Functions used to intialize state context by translating * Gallium state objects into semi-native r300 state objects. */ @@ -219,7 +222,7 @@ static void* r300_create_blend_state(struct pipe_context* pipe, /* Enable reading from the colorbuffer. */ blend->blend_control |= R300_READ_ENABLE; - if (r300_screen(r300_context(pipe)->context.screen)->caps->is_r500) { + if (r300screen->caps.is_r500) { /* Optimization: Depending on incoming pixels, we can * conditionally disable the reading in hardware... */ if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN && @@ -308,7 +311,7 @@ static void* r300_create_blend_state(struct pipe_context* pipe, /* Color channel masks for all MRTs. */ blend->color_channel_mask = bgra_cmask(state->rt[0].colormask); - if (r300screen->caps->is_r500 && state->independent_blend_enable) { + if (r300screen->caps.is_r500 && state->independent_blend_enable) { if (state->rt[1].blend_enable) { blend->color_channel_mask |= bgra_cmask(state->rt[1].colormask) << 4; } @@ -320,10 +323,17 @@ static void* r300_create_blend_state(struct pipe_context* pipe, } } + /* Neither fglrx nor classic r300 ever set this, regardless of dithering + * state. Since it's an optional implementation detail, we can leave it + * out and never dither. + * + * This could be revisited if we ever get quality or conformance hints. + * if (state->dither) { blend->dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | - R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; + R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; } + */ return (void*)blend; } @@ -356,7 +366,6 @@ static void r300_set_blend_color(struct pipe_context* pipe, const struct pipe_blend_color* color) { struct r300_context* r300 = r300_context(pipe); - struct r300_screen* r300screen = r300_screen(pipe->screen); struct r300_blend_color_state* state = (struct r300_blend_color_state*)r300->blend_color_state.state; union util_color uc; @@ -372,7 +381,7 @@ static void r300_set_blend_color(struct pipe_context* pipe, float_to_fixed10(color->color[2]) | (float_to_fixed10(color->color[1]) << 16); - r300->blend_color_state.size = r300screen->caps->is_r500 ? 3 : 2; + r300->blend_color_state.size = r300->screen->caps.is_r500 ? 3 : 2; r300->blend_color_state.dirty = TRUE; } @@ -383,7 +392,7 @@ static void r300_set_clip_state(struct pipe_context* pipe, r300->clip = *state; - if (r300_screen(pipe->screen)->caps->has_tcl) { + if (r300->screen->caps.has_tcl) { memcpy(r300->clip_state.state, state, sizeof(struct pipe_clip_state)); r300->clip_state.size = 29; } else { @@ -404,8 +413,7 @@ static void* r300_create_dsa_state(struct pipe_context* pipe, const struct pipe_depth_stencil_alpha_state* state) { - struct r300_capabilities *caps = - r300_screen(r300_context(pipe)->context.screen)->caps; + struct r300_capabilities *caps = &r300_screen(pipe->screen)->caps; struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); /* Depth test setup. */ @@ -439,6 +447,8 @@ static void* (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); if (state->stencil[1].enabled) { + dsa->two_sided = TRUE; + dsa->z_buffer_control |= R300_STENCIL_FRONT_BACK; dsa->z_stencil_control |= (r300_translate_depth_stencil_function(state->stencil[1].func) << @@ -450,14 +460,16 @@ static void* (r300_translate_stencil_op(state->stencil[1].zfail_op) << R300_S_BACK_ZFAIL_OP_SHIFT); - if (caps->is_r500) - { + dsa->stencil_ref_bf = + (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) | + (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT); + + if (caps->is_r500) { dsa->z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK; - dsa->stencil_ref_bf = - (state->stencil[1].valuemask << - R300_STENCILMASK_SHIFT) | - (state->stencil[1].writemask << - R300_STENCILWRITEMASK_SHIFT); + } else { + dsa->stencil_ref_bf_fallback = + (state->stencil[0].valuemask != state->stencil[1].valuemask || + state->stencil[0].writemask != state->stencil[1].writemask); } } } @@ -478,13 +490,33 @@ static void* return (void*)dsa; } +static void r300_update_stencil_ref_fallback_status(struct r300_context *r300) +{ + struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; + + if (r300->screen->caps.is_r500) { + return; + } + + r300->stencil_ref_bf_fallback = + dsa->stencil_ref_bf_fallback || + (dsa->two_sided && + r300->stencil_ref.ref_value[0] != r300->stencil_ref.ref_value[1]); +} + /* Bind DSA state. */ static void r300_bind_dsa_state(struct pipe_context* pipe, void* state) { struct r300_context* r300 = r300_context(pipe); + if (!state) { + return; + } + UPDATE_STATE(state, r300->dsa_state); + + r300_update_stencil_ref_fallback_status(r300); } /* Free DSA state. */ @@ -498,8 +530,11 @@ static void r300_set_stencil_ref(struct pipe_context* pipe, const struct pipe_stencil_ref* sr) { struct r300_context* r300 = r300_context(pipe); + r300->stencil_ref = *sr; r300->dsa_state.dirty = TRUE; + + r300_update_stencil_ref_fallback_status(r300); } /* This switcheroo is needed just because of goddamned MACRO_SWITCH. */ @@ -522,46 +557,46 @@ static void r300_fb_update_tiling_flags(struct r300_context *r300, continue; } - tex = (struct r300_texture*)old_state->cbufs[i]->texture; + tex = r300_texture(old_state->cbufs[i]->texture); if (tex) { - r300->winsys->buffer_set_tiling(r300->winsys, tex->buffer, + r300->rws->buffer_set_tiling(r300->rws, tex->buffer, tex->pitch[0], - tex->microtile != 0, - tex->macrotile != 0); + tex->microtile, + tex->macrotile); } } if (old_state->zsbuf && (!new_state->zsbuf || old_state->zsbuf->texture != new_state->zsbuf->texture)) { - tex = (struct r300_texture*)old_state->zsbuf->texture; + tex = r300_texture(old_state->zsbuf->texture); if (tex) { - r300->winsys->buffer_set_tiling(r300->winsys, tex->buffer, + r300->rws->buffer_set_tiling(r300->rws, tex->buffer, tex->pitch[0], - tex->microtile != 0, - tex->macrotile != 0); + tex->microtile, + tex->macrotile); } } /* Set tiling flags for new surfaces. */ for (i = 0; i < new_state->nr_cbufs; i++) { - tex = (struct r300_texture*)new_state->cbufs[i]->texture; + tex = r300_texture(new_state->cbufs[i]->texture); level = new_state->cbufs[i]->level; - r300->winsys->buffer_set_tiling(r300->winsys, tex->buffer, + r300->rws->buffer_set_tiling(r300->rws, tex->buffer, tex->pitch[level], - tex->microtile != 0, - tex->mip_macrotile[level] != 0); + tex->microtile, + tex->mip_macrotile[level]); } if (new_state->zsbuf) { - tex = (struct r300_texture*)new_state->zsbuf->texture; + tex = r300_texture(new_state->zsbuf->texture); level = new_state->zsbuf->level; - r300->winsys->buffer_set_tiling(r300->winsys, tex->buffer, + r300->rws->buffer_set_tiling(r300->rws, tex->buffer, tex->pitch[level], - tex->microtile != 0, - tex->mip_macrotile[level] != 0); + tex->microtile, + tex->mip_macrotile[level]); } } @@ -570,48 +605,51 @@ static void const struct pipe_framebuffer_state* state) { struct r300_context* r300 = r300_context(pipe); - struct r300_screen* r300screen = r300_screen(pipe->screen); + struct pipe_framebuffer_state *old_state = r300->fb_state.state; unsigned max_width, max_height; uint32_t zbuffer_bpp = 0; - if (state->nr_cbufs > 4) { - debug_printf("r300: Implementation error: Too many MRTs in %s, " + fprintf(stderr, "r300: Implementation error: Too many MRTs in %s, " "refusing to bind framebuffer state!\n", __FUNCTION__); return; } - if (r300screen->caps->is_r500) { + if (r300->screen->caps.is_r500) { max_width = max_height = 4096; - } else if (r300screen->caps->is_r400) { + } else if (r300->screen->caps.is_r400) { max_width = max_height = 4021; } else { max_width = max_height = 2560; } if (state->width > max_width || state->height > max_height) { - debug_printf("r300: Implementation error: Render targets are too " + fprintf(stderr, "r300: Implementation error: Render targets are too " "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__); return; } - if (r300->draw) { draw_flush(r300->draw); } - memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state)); + r300->fb_state.dirty = TRUE; - r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) + - (state->zsbuf ? 10 : 0) + 8; + /* If nr_cbufs is changed from zero to non-zero or vice versa... */ + if (!!old_state->nr_cbufs != !!state->nr_cbufs) { + r300->blend_state.dirty = TRUE; + } + /* If zsbuf is set from NULL to non-NULL or vice versa.. */ + if (!!old_state->zsbuf != !!state->zsbuf) { + r300->dsa_state.dirty = TRUE; + } r300_fb_update_tiling_flags(r300, r300->fb_state.state, state); - /* XXX wait what */ - r300->blend_state.dirty = TRUE; - r300->dsa_state.dirty = TRUE; - r300->fb_state.dirty = TRUE; - r300->scissor_state.dirty = TRUE; + memcpy(r300->fb_state.state, state, sizeof(struct pipe_framebuffer_state)); + + r300->fb_state.size = (10 * state->nr_cbufs) + (2 * (4 - state->nr_cbufs)) + + (state->zsbuf ? 10 : 0) + 11; /* Polygon offset depends on the zbuffer bit depth. */ if (state->zsbuf && r300->polygon_offset_enabled) { @@ -643,12 +681,28 @@ static void* r300_create_fs_state(struct pipe_context* pipe, fs->state = *shader; fs->state.tokens = tgsi_dup_tokens(shader->tokens); - tgsi_scan_shader(shader->tokens, &fs->info); - r300_shader_read_fs_inputs(&fs->info, &fs->inputs); - return (void*)fs; } +void r300_mark_fs_code_dirty(struct r300_context *r300) +{ + struct r300_fragment_shader* fs = r300_fs(r300); + + r300->fs.dirty = TRUE; + r300->fs_rc_constant_state.dirty = TRUE; + r300->fs_constants.dirty = TRUE; + + if (r300->screen->caps.is_r500) { + r300->fs.size = r500_get_fs_atom_size(r300); + r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7; + r300->fs_constants.size = fs->shader->externals_count * 4 + 3; + } else { + r300->fs.size = r300_get_fs_atom_size(r300); + r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5; + r300->fs_constants.size = fs->shader->externals_count * 4 + 1; + } +} + /* Bind fragment shader state. */ static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) { @@ -656,20 +710,19 @@ static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; if (fs == NULL) { - r300->fs = NULL; + r300->fs.state = NULL; return; } - r300->fs = fs; + r300->fs.state = fs; r300_pick_fragment_shader(r300); + r300_mark_fs_code_dirty(r300); r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ if (r300->vs_state.state && r300_vertex_shader_setup_wpos(r300)) { r300->vap_output_state.dirty = TRUE; } - - r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | R300_NEW_FRAGMENT_SHADER_CONSTANTS; } /* Delete fragment shader state. */ @@ -704,8 +757,8 @@ static void r300_set_polygon_stipple(struct pipe_context* pipe, static void* r300_create_rs_state(struct pipe_context* pipe, const struct pipe_rasterizer_state* state) { - struct r300_screen* r300screen = r300_screen(pipe->screen); struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); + int i; /* Copy rasterizer state for Draw. */ rs->rs = *state; @@ -716,9 +769,8 @@ static void* r300_create_rs_state(struct pipe_context* pipe, rs->vap_control_status = R300_VC_32BIT_SWAP; #endif - /* If bypassing TCL, or if no TCL engine is present, turn off the HW TCL. - * Else, enable HW TCL and force Draw's TCL off. */ - if (!r300screen->caps->has_tcl) { + /* If no TCL engine is present, turn off the HW TCL. */ + if (!r300_screen(pipe->screen)->caps.has_tcl) { rs->vap_control_status |= R300_VAP_TCL_BYPASS; } @@ -799,6 +851,35 @@ static void* r300_create_rs_state(struct pipe_context* pipe, rs->color_control = R300_SHADE_MODEL_SMOOTH; } + rs->clip_rule = state->scissor ? 0xAAAA : 0xFFFF; + + /* XXX Disable point sprites until we know what's wrong with them. */ + rs->rs.sprite_coord_enable = 0; + + /* Point sprites */ + if (rs->rs.sprite_coord_enable) { + rs->stuffing_enable = R300_GB_POINT_STUFF_ENABLE; + for (i = 0; i < 8; i++) { + if (state->sprite_coord_enable & (1 << i)) + rs->stuffing_enable |= + R300_GB_TEX_STR << (R300_GB_TEX0_SOURCE_SHIFT + (i*2)); + } + + rs->point_texcoord_left = 0.0f; + rs->point_texcoord_right = 1.0f; + + switch (state->sprite_coord_mode) { + case PIPE_SPRITE_COORD_UPPER_LEFT: + rs->point_texcoord_top = 0.0f; + rs->point_texcoord_bottom = 1.0f; + break; + case PIPE_SPRITE_COORD_LOWER_LEFT: + rs->point_texcoord_top = 1.0f; + rs->point_texcoord_bottom = 0.0f; + break; + } + } + return (void*)rs; } @@ -807,28 +888,26 @@ static void r300_bind_rs_state(struct pipe_context* pipe, void* state) { struct r300_context* r300 = r300_context(pipe); struct r300_rs_state* rs = (struct r300_rs_state*)state; + int last_sprite_coord_enable = r300->sprite_coord_enable; if (r300->draw) { draw_flush(r300->draw); - draw_set_rasterizer_state(r300->draw, &rs->rs); + draw_set_rasterizer_state(r300->draw, &rs->rs, state); } if (rs) { r300->polygon_offset_enabled = rs->rs.offset_cw || rs->rs.offset_ccw; + r300->sprite_coord_enable = rs->rs.sprite_coord_enable; } else { r300->polygon_offset_enabled = FALSE; + r300->sprite_coord_enable = 0; } UPDATE_STATE(state, r300->rs_state); - r300->rs_state.size = 17 + (r300->polygon_offset_enabled ? 5 : 0); - - /* XXX Why is this still needed, dammit!? */ - r300->scissor_state.dirty = TRUE; - r300->viewport_state.dirty = TRUE; + r300->rs_state.size = 26 + (r300->polygon_offset_enabled ? 5 : 0); - /* XXX Clean these up when we move to atom emits */ - if (r300->fs && r300->fs->inputs.wpos != ATTR_UNUSED) { - r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; + if (last_sprite_coord_enable != r300->sprite_coord_enable) { + r300->rs_block_state.dirty = TRUE; } } @@ -844,6 +923,7 @@ static void* { struct r300_context* r300 = r300_context(pipe); struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); + boolean is_r500 = r300->screen->caps.is_r500; int lod_bias; union util_color uc; @@ -859,6 +939,8 @@ static void* state->min_mip_filter, state->max_anisotropy > 0); + sampler->filter0 |= r300_anisotropy(state->max_anisotropy); + /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */ /* We must pass these to the merge function to clamp them properly. */ sampler->min_lod = MAX2((unsigned)state->min_lod, 0); @@ -868,13 +950,19 @@ static void* sampler->filter1 |= lod_bias << R300_LOD_BIAS_SHIFT; - sampler->filter1 |= r300_anisotropy(state->max_anisotropy); + /* This is very high quality anisotropic filtering for R5xx. + * It's good for benchmarking the performance of texturing but + * in practice we don't want to slow down the driver because it's + * a pretty good performance killer. Feel free to play with it. */ + if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) { + sampler->filter1 |= r500_anisotropy(state->max_anisotropy); + } util_pack_color(state->border_color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); sampler->border_color = uc.ui; /* R500-specific fixups and optimizations */ - if (r300_screen(r300->context.screen)->caps->is_r500) { + if (r300->screen->caps.is_r500) { sampler->filter1 |= R500_BORDER_FIX; } @@ -888,23 +976,16 @@ static void r300_bind_sampler_states(struct pipe_context* pipe, struct r300_context* r300 = r300_context(pipe); struct r300_textures_state* state = (struct r300_textures_state*)r300->textures_state.state; + unsigned tex_units = r300->screen->caps.num_tex_units; - if (count > 8) { + if (count > tex_units) { return; } memcpy(state->sampler_states, states, sizeof(void*) * count); - state->sampler_count = count; + state->sampler_state_count = count; r300->textures_state.dirty = TRUE; - - /* Pick a fragment shader based on the texture compare state. */ - if (r300->fs && count) { - if (r300_pick_fragment_shader(r300)) { - r300->dirty_state |= R300_NEW_FRAGMENT_SHADER | - R300_NEW_FRAGMENT_SHADER_CONSTANTS; - } - } } static void r300_lacks_vertex_textures(struct pipe_context* pipe, @@ -918,45 +999,53 @@ static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) FREE(state); } -static void r300_set_sampler_textures(struct pipe_context* pipe, - unsigned count, - struct pipe_texture** texture) +static void r300_set_fragment_sampler_views(struct pipe_context* pipe, + unsigned count, + struct pipe_sampler_view** views) { struct r300_context* r300 = r300_context(pipe); struct r300_textures_state* state = (struct r300_textures_state*)r300->textures_state.state; + struct r300_texture *texture; unsigned i; - boolean is_r500 = r300_screen(r300->context.screen)->caps->is_r500; + unsigned tex_units = r300->screen->caps.num_tex_units; boolean dirty_tex = FALSE; - /* XXX magic num */ - if (count > 8) { + if (count > tex_units) { return; } for (i = 0; i < count; i++) { - if (state->textures[i] != (struct r300_texture*)texture[i]) { - pipe_texture_reference((struct pipe_texture**)&state->textures[i], - texture[i]); + if (&state->sampler_views[i]->base != views[i]) { + pipe_sampler_view_reference( + (struct pipe_sampler_view**)&state->sampler_views[i], + views[i]); + + if (!views[i]) { + continue; + } + + /* A new sampler view (= texture)... */ dirty_tex = TRUE; - /* R300-specific - set the texrect factor in the fragment shader */ - if (!is_r500 && state->textures[i]->is_npot) { - /* XXX It would be nice to re-emit just 1 constant, - * XXX not all of them */ - r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; + /* Set the texrect factor in the fragment shader. + * Needed for RECT and NPOT fallback. */ + texture = r300_texture(views[i]->texture); + if (texture->uses_pitch) { + r300->fs_rc_constant_state.dirty = TRUE; } } } - for (i = count; i < 8; i++) { - if (state->textures[i]) { - pipe_texture_reference((struct pipe_texture**)&state->textures[i], - NULL); + for (i = count; i < tex_units; i++) { + if (state->sampler_views[i]) { + pipe_sampler_view_reference( + (struct pipe_sampler_view**)&state->sampler_views[i], + NULL); } } - state->texture_count = count; + state->sampler_view_count = count; r300->textures_state.dirty = TRUE; @@ -965,6 +1054,48 @@ static void r300_set_sampler_textures(struct pipe_context* pipe, } } +static struct pipe_sampler_view * +r300_create_sampler_view(struct pipe_context *pipe, + struct pipe_resource *texture, + const struct pipe_sampler_view *templ) +{ + struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view); + struct r300_texture *tex = r300_texture(texture); + unsigned char swizzle[4]; + + if (view) { + view->base = *templ; + view->base.reference.count = 1; + view->base.context = pipe; + view->base.texture = NULL; + pipe_resource_reference(&view->base.texture, texture); + + swizzle[0] = templ->swizzle_r; + swizzle[1] = templ->swizzle_g; + swizzle[2] = templ->swizzle_b; + swizzle[3] = templ->swizzle_a; + + /* XXX Enable swizzles when they become supported. Now we get RGBA + * everywhere. And do testing! */ + view->format = tex->tx_format; + view->format.format1 |= r300_translate_texformat(templ->format, + 0); /*swizzle);*/ + if (r300_screen(pipe->screen)->caps.is_r500) { + view->format.format2 |= r500_tx_format_msb_bit(templ->format); + } + } + + return (struct pipe_sampler_view*)view; +} + +static void +r300_sampler_view_destroy(struct pipe_context *pipe, + struct pipe_sampler_view *view) +{ + pipe_resource_reference(&view->texture, NULL); + FREE(view); +} + static void r300_set_scissor_state(struct pipe_context* pipe, const struct pipe_scissor_state* state) { @@ -1014,8 +1145,8 @@ static void r300_set_viewport_state(struct pipe_context* pipe, } r300->viewport_state.dirty = TRUE; - if (r300->fs && r300->fs->inputs.wpos != ATTR_UNUSED) { - r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; + if (r300->fs.state && r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) { + r300->fs_rc_constant_state.dirty = TRUE; } } @@ -1024,63 +1155,245 @@ static void r300_set_vertex_buffers(struct pipe_context* pipe, const struct pipe_vertex_buffer* buffers) { struct r300_context* r300 = r300_context(pipe); - unsigned i, max_index = ~0; + struct pipe_vertex_buffer *vbo; + unsigned i, max_index = (1 << 24) - 1; + boolean any_user_buffer = FALSE; - memcpy(r300->vertex_buffer, buffers, - sizeof(struct pipe_vertex_buffer) * count); + if (count == r300->vertex_buffer_count && + memcmp(r300->vertex_buffer, buffers, + sizeof(struct pipe_vertex_buffer) * count) == 0) { + return; + } + /* Check if the stride is aligned to the size of DWORD. */ for (i = 0; i < count; i++) { - max_index = MIN2(buffers[i].max_index, max_index); + if (buffers[i].buffer) { + if (buffers[i].stride % 4 != 0) { + // XXX Shouldn't we align the buffer? + fprintf(stderr, "r300: set_vertex_buffers: " + "Unaligned buffer stride %i isn't supported.\n", + buffers[i].stride); + abort(); + } + } } + for (i = 0; i < count; i++) { + /* Why, yes, I AM casting away constness. How did you know? */ + vbo = (struct pipe_vertex_buffer*)&buffers[i]; + + /* Reference our buffer. */ + pipe_resource_reference(&r300->vertex_buffer[i].buffer, vbo->buffer); + + /* Skip NULL buffers */ + if (!buffers[i].buffer) { + continue; + } + + if (r300_buffer_is_user_buffer(vbo->buffer)) { + any_user_buffer = TRUE; + } + + if (vbo->max_index == ~0) { + /* if no VBO stride then only one vertex value so max index is 1 */ + /* should think about converting to VS constants like svga does */ + if (!vbo->stride) + vbo->max_index = 1; + else + vbo->max_index = + (vbo->buffer->width0 - vbo->buffer_offset) / vbo->stride; + } + + max_index = MIN2(vbo->max_index, max_index); + } + + for (; i < r300->vertex_buffer_count; i++) { + /* Dereference any old buffers. */ + pipe_resource_reference(&r300->vertex_buffer[i].buffer, NULL); + } + + memcpy(r300->vertex_buffer, buffers, + sizeof(struct pipe_vertex_buffer) * count); + r300->vertex_buffer_count = count; r300->vertex_buffer_max_index = max_index; + r300->any_user_vbs = any_user_buffer; if (r300->draw) { draw_flush(r300->draw); draw_set_vertex_buffers(r300->draw, count, buffers); - } else { - r300->vertex_stream_state.dirty = TRUE; } } -static boolean r300_validate_aos(struct r300_context *r300) +/* Update the PSC tables. */ +static void r300_vertex_psc(struct r300_vertex_element_state *velems) { - struct pipe_vertex_buffer *vbuf = r300->vertex_buffer; - struct pipe_vertex_element *velem = r300->vertex_element; - int i; + struct r300_vertex_stream_state *vstream = &velems->vertex_stream; + uint16_t type, swizzle; + enum pipe_format format; + unsigned i; + + if (velems->count > 16) { + fprintf(stderr, "r300: More than 16 vertex elements are not supported," + " requested %i, using 16.\n", velems->count); + velems->count = 16; + } - /* Check if formats and strides are aligned to the size of DWORD. */ - for (i = 0; i < r300->vertex_element_count; i++) { - if (vbuf[velem[i].vertex_buffer_index].stride % 4 != 0 || - util_format_get_blocksize(velem[i].src_format) % 4 != 0) { - return FALSE; + /* Vertex shaders have no semantics on their inputs, + * so PSC should just route stuff based on the vertex elements, + * and not on attrib information. */ + for (i = 0; i < velems->count; i++) { + format = velems->velem[i].src_format; + + type = r300_translate_vertex_data_type(format) | + (i << R300_DST_VEC_LOC_SHIFT); + swizzle = r300_translate_vertex_data_swizzle(format); + + if (i & 1) { + vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; + vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; + } else { + vstream->vap_prog_stream_cntl[i >> 1] |= type; + vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; } } - return TRUE; + + /* Set the last vector in the PSC. */ + if (i) { + i -= 1; + } + vstream->vap_prog_stream_cntl[i >> 1] |= + (R300_LAST_VEC << (i & 1 ? 16 : 0)); + + vstream->count = (i >> 1) + 1; } -static void r300_set_vertex_elements(struct pipe_context* pipe, - unsigned count, - const struct pipe_vertex_element* elements) +static void* r300_create_vertex_elements_state(struct pipe_context* pipe, + unsigned count, + const struct pipe_vertex_element* attribs) { - struct r300_context* r300 = r300_context(pipe); + struct r300_vertex_element_state *velems; + unsigned i, size; + enum pipe_format *format; + + assert(count <= PIPE_MAX_ATTRIBS); + velems = CALLOC_STRUCT(r300_vertex_element_state); + if (velems != NULL) { + velems->count = count; + memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count); + + if (r300_screen(pipe->screen)->caps.has_tcl) { + r300_vertex_psc(velems); + + /* Check if the format is aligned to the size of DWORD. + * We only care about the blocksizes of the formats since + * swizzles are already set up. */ + for (i = 0; i < count; i++) { + format = &velems->velem[i].src_format; + + /* Replace some formats with their aligned counterparts, + * this is OK because we check for aligned strides too. */ + switch (*format) { + /* Align to RGBA8. */ + case PIPE_FORMAT_R8_UNORM: + case PIPE_FORMAT_R8G8_UNORM: + case PIPE_FORMAT_R8G8B8_UNORM: + *format = PIPE_FORMAT_R8G8B8A8_UNORM; + continue; + case PIPE_FORMAT_R8_SNORM: + case PIPE_FORMAT_R8G8_SNORM: + case PIPE_FORMAT_R8G8B8_SNORM: + *format = PIPE_FORMAT_R8G8B8A8_SNORM; + continue; + case PIPE_FORMAT_R8_USCALED: + case PIPE_FORMAT_R8G8_USCALED: + case PIPE_FORMAT_R8G8B8_USCALED: + *format = PIPE_FORMAT_R8G8B8A8_USCALED; + continue; + case PIPE_FORMAT_R8_SSCALED: + case PIPE_FORMAT_R8G8_SSCALED: + case PIPE_FORMAT_R8G8B8_SSCALED: + *format = PIPE_FORMAT_R8G8B8A8_SSCALED; + continue; + + /* Align to RG16. */ + case PIPE_FORMAT_R16_UNORM: + *format = PIPE_FORMAT_R16G16_UNORM; + continue; + case PIPE_FORMAT_R16_SNORM: + *format = PIPE_FORMAT_R16G16_SNORM; + continue; + case PIPE_FORMAT_R16_USCALED: + *format = PIPE_FORMAT_R16G16_USCALED; + continue; + case PIPE_FORMAT_R16_SSCALED: + *format = PIPE_FORMAT_R16G16_SSCALED; + continue; + case PIPE_FORMAT_R16_FLOAT: + *format = PIPE_FORMAT_R16G16_FLOAT; + continue; + + /* Align to RGBA16. */ + case PIPE_FORMAT_R16G16B16_UNORM: + *format = PIPE_FORMAT_R16G16B16A16_UNORM; + continue; + case PIPE_FORMAT_R16G16B16_SNORM: + *format = PIPE_FORMAT_R16G16B16A16_SNORM; + continue; + case PIPE_FORMAT_R16G16B16_USCALED: + *format = PIPE_FORMAT_R16G16B16A16_USCALED; + continue; + case PIPE_FORMAT_R16G16B16_SSCALED: + *format = PIPE_FORMAT_R16G16B16A16_SSCALED; + continue; + case PIPE_FORMAT_R16G16B16_FLOAT: + *format = PIPE_FORMAT_R16G16B16A16_FLOAT; + continue; + + default:; + } + + size = util_format_get_blocksize(*format); + + if (size % 4 != 0) { + /* XXX Shouldn't we align the format? */ + fprintf(stderr, "r300_create_vertex_elements_state: " + "Unaligned format %s:%i isn't supported\n", + util_format_name(*format), size); + assert(0); + abort(); + } + } + + } + } + return velems; +} + +static void r300_bind_vertex_elements_state(struct pipe_context *pipe, + void *state) +{ + struct r300_context *r300 = r300_context(pipe); + struct r300_vertex_element_state *velems = state; + + if (velems == NULL) { + return; + } - memcpy(r300->vertex_element, - elements, - sizeof(struct pipe_vertex_element) * count); - r300->vertex_element_count = count; + r300->velems = velems; if (r300->draw) { draw_flush(r300->draw); - draw_set_vertex_elements(r300->draw, count, elements); + draw_set_vertex_elements(r300->draw, velems->count, velems->velem); } - if (!r300_validate_aos(r300)) { - /* XXX We should fallback using draw. */ - assert(0); - abort(); - } + UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state); + r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2; +} + +static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state) +{ + FREE(state); } static void* r300_create_vs_state(struct pipe_context* pipe, @@ -1088,124 +1401,146 @@ static void* r300_create_vs_state(struct pipe_context* pipe, { struct r300_context* r300 = r300_context(pipe); - if (r300_screen(pipe->screen)->caps->has_tcl) { - struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); - /* Copy state directly into shader. */ - vs->state = *shader; - vs->state.tokens = tgsi_dup_tokens(shader->tokens); + struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); - tgsi_scan_shader(shader->tokens, &vs->info); + /* Copy state directly into shader. */ + vs->state = *shader; + vs->state.tokens = tgsi_dup_tokens(shader->tokens); - return (void*)vs; + if (r300->screen->caps.has_tcl) { + r300_translate_vertex_shader(r300, vs, vs->state.tokens); } else { - return draw_create_vertex_shader(r300->draw, shader); + vs->draw_vs = draw_create_vertex_shader(r300->draw, shader); } + + return vs; } static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) { struct r300_context* r300 = r300_context(pipe); + struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; - if (r300_screen(pipe->screen)->caps->has_tcl) { - struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; - - if (vs == NULL) { - r300->vs_state.state = NULL; - return; - } else if (!vs->translated) { - r300_translate_vertex_shader(r300, vs); - } + if (vs == NULL) { + r300->vs_state.state = NULL; + return; + } + if (vs == r300->vs_state.state) { + return; + } + r300->vs_state.state = vs; - UPDATE_STATE(shader, r300->vs_state); - r300->vs_state.size = vs->code.length + 9; + // VS output mapping for HWTCL or stream mapping for SWTCL to the RS block + if (r300->fs.state) { + r300_vertex_shader_setup_wpos(r300); + } + memcpy(r300->vap_output_state.state, &vs->vap_out, + sizeof(struct r300_vap_output_state)); + r300->vap_output_state.dirty = TRUE; - r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ - r300->vap_output_state.dirty = TRUE; - r300->vertex_stream_state.dirty = TRUE; /* XXX needed for TCL bypass */ - r300->pvs_flush.dirty = TRUE; + /* The majority of the RS block bits is dependent on the vertex shader. */ + r300->rs_block_state.dirty = TRUE; /* Will be updated before the emission. */ - if (r300->fs) { - r300_vertex_shader_setup_wpos(r300); + if (r300->screen->caps.has_tcl) { + r300->vs_state.dirty = TRUE; + r300->vs_state.size = + vs->code.length + 9 + + (vs->immediates_count ? vs->immediates_count * 4 + 3 : 0); + + if (vs->externals_count) { + r300->vs_constants.dirty = TRUE; + r300->vs_constants.size = vs->externals_count * 4 + 3; + } else { + r300->vs_constants.size = 0; } - r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS; + r300->pvs_flush.dirty = TRUE; } else { draw_flush(r300->draw); draw_bind_vertex_shader(r300->draw, - (struct draw_vertex_shader*)shader); + (struct draw_vertex_shader*)vs->draw_vs); } } static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) { struct r300_context* r300 = r300_context(pipe); + struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; - if (r300_screen(pipe->screen)->caps->has_tcl) { - struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; - + if (r300->screen->caps.has_tcl) { rc_constants_destroy(&vs->code.constants); - FREE((void*)vs->state.tokens); - FREE(shader); } else { draw_delete_vertex_shader(r300->draw, - (struct draw_vertex_shader*)shader); + (struct draw_vertex_shader*)vs->draw_vs); } + + FREE((void*)vs->state.tokens); + FREE(shader); } static void r300_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_buffer *buf) + struct pipe_resource *buf) { struct r300_context* r300 = r300_context(pipe); - struct r300_screen *r300screen = r300_screen(pipe->screen); + struct r300_constant_buffer *cbuf; + struct pipe_transfer *tr; void *mapped; int max_size = 0; - if (buf == NULL || buf->size == 0 || - (mapped = pipe_buffer_map(pipe->screen, buf, PIPE_BUFFER_USAGE_CPU_READ)) == NULL) - { - r300->shader_constants[shader].count = 0; - return; - } - - assert((buf->size % 4 * sizeof(float)) == 0); - - /* Check the size of the constant buffer. */ switch (shader) { case PIPE_SHADER_VERTEX: + cbuf = (struct r300_constant_buffer*)r300->vs_constants.state; max_size = 256; break; case PIPE_SHADER_FRAGMENT: - if (r300screen->caps->is_r500) { + cbuf = (struct r300_constant_buffer*)r300->fs_constants.state; + if (r300->screen->caps.is_r500) { max_size = 256; - /* XXX Implement emission of r400's extended constant buffer. */ - /*} else if (r300screen->caps->is_r400) { - max_size = 64;*/ } else { max_size = 32; } break; default: assert(0); + return; } + if (buf == NULL || buf->width0 == 0 || + (mapped = pipe_buffer_map(pipe, buf, PIPE_TRANSFER_READ, &tr)) == NULL) + { + cbuf->count = 0; + return; + } + + assert((buf->width0 % 4 * sizeof(float)) == 0); + + /* Check the size of the constant buffer. */ /* XXX Subtract immediates and RC_STATE_* variables. */ - if (buf->size > (sizeof(float) * 4 * max_size)) { - debug_printf("r300: Max size of the constant buffer is " + if (buf->width0 > (sizeof(float) * 4 * max_size)) { + fprintf(stderr, "r300: Max size of the constant buffer is " "%i*4 floats.\n", max_size); abort(); } - memcpy(r300->shader_constants[shader].constants, mapped, buf->size); - r300->shader_constants[shader].count = buf->size / (4 * sizeof(float)); - pipe_buffer_unmap(pipe->screen, buf); + memcpy(cbuf->constants, mapped, buf->width0); + cbuf->count = buf->width0 / (4 * sizeof(float)); + pipe_buffer_unmap(pipe, buf, tr); if (shader == PIPE_SHADER_VERTEX) { - r300->dirty_state |= R300_NEW_VERTEX_SHADER_CONSTANTS; - r300->pvs_flush.dirty = TRUE; + if (r300->screen->caps.has_tcl) { + if (r300->vs_constants.size) { + r300->vs_constants.dirty = TRUE; + } + r300->pvs_flush.dirty = TRUE; + } else if (r300->draw) { + draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX, + 0, cbuf->constants, + buf->width0); + } + } else if (shader == PIPE_SHADER_FRAGMENT) { + r300->fs_constants.dirty = TRUE; } - else if (shader == PIPE_SHADER_FRAGMENT) - r300->dirty_state |= R300_NEW_FRAGMENT_SHADER_CONSTANTS; } void r300_init_state_functions(struct r300_context* r300) @@ -1243,14 +1578,19 @@ void r300_init_state_functions(struct r300_context* r300) r300->context.bind_vertex_sampler_states = r300_lacks_vertex_textures; r300->context.delete_sampler_state = r300_delete_sampler_state; - r300->context.set_fragment_sampler_textures = r300_set_sampler_textures; + r300->context.set_fragment_sampler_views = r300_set_fragment_sampler_views; + r300->context.create_sampler_view = r300_create_sampler_view; + r300->context.sampler_view_destroy = r300_sampler_view_destroy; r300->context.set_scissor_state = r300_set_scissor_state; r300->context.set_viewport_state = r300_set_viewport_state; r300->context.set_vertex_buffers = r300_set_vertex_buffers; - r300->context.set_vertex_elements = r300_set_vertex_elements; + + r300->context.create_vertex_elements_state = r300_create_vertex_elements_state; + r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state; + r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state; r300->context.create_vs_state = r300_create_vs_state; r300->context.bind_vs_state = r300_bind_vs_state; diff --git a/src/gallium/drivers/r300/r300_state.h b/src/gallium/drivers/r300/r300_state.h new file mode 100644 index 00000000000..1d557506cf3 --- /dev/null +++ b/src/gallium/drivers/r300/r300_state.h @@ -0,0 +1,30 @@ +/* + * Copyright 2008 Marek Olšák <[email protected]> + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_STATE_H +#define R300_STATE_H + +struct r300_context; + +void r300_mark_fs_code_dirty(struct r300_context *r300); + +#endif /* R300_STATE_H */ diff --git a/src/gallium/drivers/r300/r300_state_derived.c b/src/gallium/drivers/r300/r300_state_derived.c index 9c8e907fdf7..10ea579be3b 100644 --- a/src/gallium/drivers/r300/r300_state_derived.c +++ b/src/gallium/drivers/r300/r300_state_derived.c @@ -28,8 +28,10 @@ #include "r300_context.h" #include "r300_fs.h" +#include "r300_hyperz.h" #include "r300_screen.h" #include "r300_shader_semantics.h" +#include "r300_state.h" #include "r300_state_derived.h" #include "r300_state_inlines.h" #include "r300_vs.h" @@ -37,6 +39,12 @@ /* r300_state_derived: Various bits of state which are dependent upon * currently bound CSO data. */ +enum r300_rs_swizzle { + SWIZ_XYZW = 0, + SWIZ_X001, + SWIZ_XY01, +}; + static void r300_draw_emit_attrib(struct r300_context* r300, enum attrib_emit emit, enum interp_mode interp, @@ -83,8 +91,10 @@ static void r300_draw_emit_all_attribs(struct r300_context* r300) /* XXX Back-face colors. */ /* Texture coordinates. */ + /* Only 8 generic vertex attributes can be used. If there are more, + * they won't be rasterized. */ gen_count = 0; - for (i = 0; i < ATTR_GENERIC_COUNT; i++) { + for (i = 0; i < ATTR_GENERIC_COUNT && gen_count < 8; i++) { if (vs_outputs->generic[i] != ATTR_UNUSED) { r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE, vs_outputs->generic[i]); @@ -93,84 +103,26 @@ static void r300_draw_emit_all_attribs(struct r300_context* r300) } /* Fog coordinates. */ - if (vs_outputs->fog != ATTR_UNUSED) { + if (gen_count < 8 && vs_outputs->fog != ATTR_UNUSED) { r300_draw_emit_attrib(r300, EMIT_4F, INTERP_PERSPECTIVE, vs_outputs->fog); gen_count++; } - - /* XXX magic */ - assert(gen_count <= 8); -} - -/* Update the PSC tables. */ -/* XXX move this function into r300_state.c after TCL-bypass gets removed - * XXX because this one is dependent only on vertex elements. */ -static void r300_vertex_psc(struct r300_context* r300) -{ - struct r300_vertex_shader* vs = r300->vs_state.state; - struct r300_vertex_stream_state *vformat = - (struct r300_vertex_stream_state*)r300->vertex_stream_state.state; - uint16_t type, swizzle; - enum pipe_format format; - unsigned i; - int identity[16] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}; - int* stream_tab; - - memset(vformat, 0, sizeof(struct r300_vertex_stream_state)); - - stream_tab = identity; - - /* Vertex shaders have no semantics on their inputs, - * so PSC should just route stuff based on the vertex elements, - * and not on attrib information. */ - DBG(r300, DBG_DRAW, "r300: vs expects %d attribs, routing %d elements" - " in psc\n", - vs->info.num_inputs, - r300->vertex_element_count); - - for (i = 0; i < r300->vertex_element_count; i++) { - format = r300->vertex_element[i].src_format; - - type = r300_translate_vertex_data_type(format) | - (stream_tab[i] << R300_DST_VEC_LOC_SHIFT); - swizzle = r300_translate_vertex_data_swizzle(format); - - if (i & 1) { - vformat->vap_prog_stream_cntl[i >> 1] |= type << 16; - vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; - } else { - vformat->vap_prog_stream_cntl[i >> 1] |= type; - vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; - } - } - - assert(i <= 15); - - /* Set the last vector in the PSC. */ - if (i) { - i -= 1; - } - vformat->vap_prog_stream_cntl[i >> 1] |= - (R300_LAST_VEC << (i & 1 ? 16 : 0)); - - vformat->count = (i >> 1) + 1; - r300->vertex_stream_state.size = (1 + vformat->count) * 2; } /* Update the PSC tables for SW TCL, using Draw. */ -static void r300_swtcl_vertex_psc(struct r300_context* r300) +static void r300_swtcl_vertex_psc(struct r300_context *r300) { + struct r300_vertex_stream_state *vstream = r300->vertex_stream_state.state; struct r300_vertex_shader* vs = r300->vs_state.state; - struct r300_vertex_stream_state *vformat = - (struct r300_vertex_stream_state*)r300->vertex_stream_state.state; struct vertex_info* vinfo = &r300->vertex_info; uint16_t type, swizzle; enum pipe_format format; unsigned i, attrib_count; int* vs_output_tab = vs->stream_loc_notcl; - memset(vformat, 0, sizeof(struct r300_vertex_stream_state)); + /* XXX hax */ + memset(vstream, 0, sizeof(struct r300_vertex_stream_state)); /* For each Draw attribute, route it to the fragment shader according * to the vs_output_tab. */ @@ -181,9 +133,7 @@ static void r300_swtcl_vertex_psc(struct r300_context* r300) " vs_output_tab %d\n", vinfo->attrib[i].src_index, vinfo->attrib[i].interp_mode, vinfo->attrib[i].emit, vs_output_tab[i]); - } - for (i = 0; i < attrib_count; i++) { /* Make sure we have a proper destination for our attribute. */ assert(vs_output_tab[i] != -1); @@ -199,11 +149,11 @@ static void r300_swtcl_vertex_psc(struct r300_context* r300) /* Add the attribute to the PSC table. */ if (i & 1) { - vformat->vap_prog_stream_cntl[i >> 1] |= type << 16; - vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; + vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; + vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle << 16; } else { - vformat->vap_prog_stream_cntl[i >> 1] |= type; - vformat->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; + vstream->vap_prog_stream_cntl[i >> 1] |= type; + vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; } } @@ -211,11 +161,12 @@ static void r300_swtcl_vertex_psc(struct r300_context* r300) if (i) { i -= 1; } - vformat->vap_prog_stream_cntl[i >> 1] |= + vstream->vap_prog_stream_cntl[i >> 1] |= (R300_LAST_VEC << (i & 1 ? 16 : 0)); - vformat->count = (i >> 1) + 1; - r300->vertex_stream_state.size = (1 + vformat->count) * 2; + vstream->count = (i >> 1) + 1; + r300->vertex_stream_state.dirty = TRUE; + r300->vertex_stream_state.size = (1 + vstream->count) * 2; } static void r300_rs_col(struct r300_rs_block* rs, int id, int ptr, @@ -237,14 +188,20 @@ static void r300_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset) } static void r300_rs_tex(struct r300_rs_block* rs, int id, int ptr, - boolean swizzle_X001) + enum r300_rs_swizzle swiz) { - if (swizzle_X001) { + if (swiz == SWIZ_X001) { rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) | R300_RS_SEL_S(R300_RS_SEL_C0) | R300_RS_SEL_T(R300_RS_SEL_K0) | R300_RS_SEL_R(R300_RS_SEL_K0) | R300_RS_SEL_Q(R300_RS_SEL_K1); + } else if (swiz == SWIZ_XY01) { + rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) | + R300_RS_SEL_S(R300_RS_SEL_C0) | + R300_RS_SEL_T(R300_RS_SEL_C1) | + R300_RS_SEL_R(R300_RS_SEL_K0) | + R300_RS_SEL_Q(R300_RS_SEL_K1); } else { rs->ip[id] |= R300_RS_TEX_PTR(ptr*4) | R300_RS_SEL_S(R300_RS_SEL_C0) | @@ -280,15 +237,20 @@ static void r500_rs_col_write(struct r300_rs_block* rs, int id, int fp_offset) } static void r500_rs_tex(struct r300_rs_block* rs, int id, int ptr, - boolean swizzle_X001) + enum r300_rs_swizzle swiz) { int rs_tex_comp = ptr*4; - if (swizzle_X001) { + if (swiz == SWIZ_X001) { rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) | R500_RS_SEL_T(R500_RS_IP_PTR_K0) | R500_RS_SEL_R(R500_RS_IP_PTR_K0) | R500_RS_SEL_Q(R500_RS_IP_PTR_K1); + } else if (swiz == SWIZ_XY01) { + rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) | + R500_RS_SEL_T(rs_tex_comp + 1) | + R500_RS_SEL_R(R500_RS_IP_PTR_K0) | + R500_RS_SEL_Q(R500_RS_IP_PTR_K1); } else { rs->ip[id] |= R500_RS_SEL_S(rs_tex_comp) | R500_RS_SEL_T(rs_tex_comp + 1) | @@ -317,12 +279,12 @@ static void r300_update_rs_block(struct r300_context* r300, int i, col_count = 0, tex_count = 0, fp_offset = 0, count; void (*rX00_rs_col)(struct r300_rs_block*, int, int, boolean); void (*rX00_rs_col_write)(struct r300_rs_block*, int, int); - void (*rX00_rs_tex)(struct r300_rs_block*, int, int, boolean); + void (*rX00_rs_tex)(struct r300_rs_block*, int, int, enum r300_rs_swizzle); void (*rX00_rs_tex_write)(struct r300_rs_block*, int, int); boolean any_bcolor_used = vs_outputs->bcolor[0] != ATTR_UNUSED || vs_outputs->bcolor[1] != ATTR_UNUSED; - if (r300_screen(r300->context.screen)->caps->is_r500) { + if (r300->screen->caps.is_r500) { rX00_rs_col = r500_rs_col; rX00_rs_col_write = r500_rs_col_write; rX00_rs_tex = r500_rs_tex; @@ -359,14 +321,19 @@ static void r300_update_rs_block(struct r300_context* r300, /* Rasterize texture coordinates. */ for (i = 0; i < ATTR_GENERIC_COUNT; i++) { - if (vs_outputs->generic[i] != ATTR_UNUSED) { + bool sprite_coord = !!(r300->sprite_coord_enable & (1 << i)); + + if (vs_outputs->generic[i] != ATTR_UNUSED || sprite_coord) { /* Always rasterize if it's written by the VS, * otherwise it locks up. */ - rX00_rs_tex(&rs, tex_count, tex_count, FALSE); + rX00_rs_tex(&rs, tex_count, tex_count, + sprite_coord ? SWIZ_XY01 : SWIZ_XYZW); /* Write it to the FS input register if it's used by the FS. */ if (fs_inputs->generic[i] != ATTR_UNUSED) { rX00_rs_tex_write(&rs, tex_count, fp_offset); + if (sprite_coord) + debug_printf("r300: SpriteCoord (generic index %i) is being written to reg %i\n", i, fp_offset); fp_offset++; } tex_count++; @@ -383,7 +350,7 @@ static void r300_update_rs_block(struct r300_context* r300, if (vs_outputs->fog != ATTR_UNUSED) { /* Always rasterize if it's written by the VS, * otherwise it locks up. */ - rX00_rs_tex(&rs, tex_count, tex_count, TRUE); + rX00_rs_tex(&rs, tex_count, tex_count, SWIZ_X001); /* Write it to the FS input register if it's used by the FS. */ if (fs_inputs->fog != ATTR_UNUSED) { @@ -401,8 +368,8 @@ static void r300_update_rs_block(struct r300_context* r300, /* Rasterize WPOS. */ /* If the FS doesn't need it, it's not written by the VS. */ - if (fs_inputs->wpos != ATTR_UNUSED) { - rX00_rs_tex(&rs, tex_count, tex_count, FALSE); + if (vs_outputs->wpos != ATTR_UNUSED && fs_inputs->wpos != ATTR_UNUSED) { + rX00_rs_tex(&rs, tex_count, tex_count, SWIZ_XYZW); rX00_rs_tex_write(&rs, tex_count, fp_offset); fp_offset++; @@ -432,94 +399,8 @@ static void r300_update_rs_block(struct r300_context* r300, static void r300_update_derived_shader_state(struct r300_context* r300) { struct r300_vertex_shader* vs = r300->vs_state.state; - struct r300_screen* r300screen = r300_screen(r300->context.screen); - struct r300_vap_output_state *vap_out = - (struct r300_vap_output_state*)r300->vap_output_state.state; - - /* XXX Mmm, delicious hax */ - memset(&r300->vertex_info, 0, sizeof(struct vertex_info)); - memcpy(vap_out, vs->hwfmt, sizeof(uint)*4); - - r300_update_rs_block(r300, &vs->outputs, &r300->fs->inputs); - - if (r300screen->caps->has_tcl) { - r300_vertex_psc(r300); - } else { - r300_draw_emit_all_attribs(r300); - draw_compute_vertex_size(&r300->vertex_info); - r300_swtcl_vertex_psc(r300); - } -} - -static boolean r300_dsa_writes_depth_stencil(struct r300_dsa_state* dsa) -{ - /* We are interested only in the cases when a new depth or stencil value - * can be written and changed. */ - - /* We might optionally check for [Z func: never] and inspect the stencil - * state in a similar fashion, but it's not terribly important. */ - return (dsa->z_buffer_control & R300_Z_WRITE_ENABLE) || - (dsa->stencil_ref_mask & R300_STENCILWRITEMASK_MASK) || - ((dsa->z_buffer_control & R500_STENCIL_REFMASK_FRONT_BACK) && - (dsa->stencil_ref_bf & R300_STENCILWRITEMASK_MASK)); -} - -static boolean r300_dsa_alpha_test_enabled(struct r300_dsa_state* dsa) -{ - /* We are interested only in the cases when alpha testing can kill - * a fragment. */ - uint32_t af = dsa->alpha_function; - return (af & R300_FG_ALPHA_FUNC_ENABLE) && - (af & R300_FG_ALPHA_FUNC_ALWAYS) != R300_FG_ALPHA_FUNC_ALWAYS; -} - -static void r300_update_ztop(struct r300_context* r300) -{ - struct r300_ztop_state* ztop_state = - (struct r300_ztop_state*)r300->ztop_state.state; - - /* This is important enough that I felt it warranted a comment. - * - * According to the docs, these are the conditions where ZTOP must be - * disabled: - * 1) Alpha testing enabled - * 2) Texture kill instructions in fragment shader - * 3) Chroma key culling enabled - * 4) W-buffering enabled - * - * The docs claim that for the first three cases, if no ZS writes happen, - * then ZTOP can be used. - * - * (3) will never apply since we do not support chroma-keyed operations. - * (4) will need to be re-examined (and this comment updated) if/when - * Hyper-Z becomes supported. - * - * Additionally, the following conditions require disabled ZTOP: - * 5) Depth writes in fragment shader - * 6) Outstanding occlusion queries - * - * This register causes stalls all the way from SC to CB when changed, - * but it is buffered on-chip so it does not hurt to write it if it has - * not changed. - * - * ~C. - */ - - /* ZS writes */ - if (r300_dsa_writes_depth_stencil(r300->dsa_state.state) && - (r300_dsa_alpha_test_enabled(r300->dsa_state.state) ||/* (1) */ - r300->fs->info.uses_kill)) { /* (2) */ - ztop_state->z_buffer_top = R300_ZTOP_DISABLE; - } else if (r300_fragment_shader_writes_depth(r300->fs)) { /* (5) */ - ztop_state->z_buffer_top = R300_ZTOP_DISABLE; - } else if (r300->query_current) { /* (6) */ - ztop_state->z_buffer_top = R300_ZTOP_DISABLE; - } else { - ztop_state->z_buffer_top = R300_ZTOP_ENABLE; - } - - r300->ztop_state.dirty = TRUE; + r300_update_rs_block(r300, &vs->outputs, &r300_fs(r300)->shader->inputs); } static void r300_merge_textures_and_samplers(struct r300_context* r300) @@ -528,48 +409,71 @@ static void r300_merge_textures_and_samplers(struct r300_context* r300) (struct r300_textures_state*)r300->textures_state.state; struct r300_texture_sampler_state *texstate; struct r300_sampler_state *sampler; + struct r300_sampler_view *view; struct r300_texture *tex; unsigned min_level, max_level, i, size; - unsigned count = MIN2(state->texture_count, state->sampler_count); + unsigned count = MIN2(state->sampler_view_count, + state->sampler_state_count); state->tx_enable = 0; + state->count = 0; size = 2; for (i = 0; i < count; i++) { - if (state->textures[i] && state->sampler_states[i]) { + if (state->sampler_views[i] && state->sampler_states[i]) { state->tx_enable |= 1 << i; - tex = state->textures[i]; + view = state->sampler_views[i]; + tex = r300_texture(view->base.texture); sampler = state->sampler_states[i]; texstate = &state->regs[i]; - memcpy(texstate->format, &tex->state, sizeof(uint32_t)*3); - texstate->filter[0] = sampler->filter0; - texstate->filter[1] = sampler->filter1; + texstate->format = view->format; + texstate->filter0 = sampler->filter0; + texstate->filter1 = sampler->filter1; texstate->border_color = sampler->border_color; - texstate->tile_config = R300_TXO_MACRO_TILE(tex->macrotile) | - R300_TXO_MICRO_TILE(tex->microtile); /* to emulate 1D textures through 2D ones correctly */ - if (tex->tex.target == PIPE_TEXTURE_1D) { - texstate->filter[0] &= ~R300_TX_WRAP_T_MASK; - texstate->filter[0] |= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE); + if (tex->b.b.target == PIPE_TEXTURE_1D) { + texstate->filter0 &= ~R300_TX_WRAP_T_MASK; + texstate->filter0 |= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE); } - if (tex->is_npot) { + if (tex->uses_pitch) { /* NPOT textures don't support mip filter, unfortunately. * This prevents incorrect rendering. */ - texstate->filter[0] &= ~R300_TX_MIN_FILTER_MIP_MASK; + texstate->filter0 &= ~R300_TX_MIN_FILTER_MIP_MASK; + + /* Mask out the mirrored flag. */ + if (texstate->filter0 & R300_TX_WRAP_S(R300_TX_MIRRORED)) { + texstate->filter0 &= ~R300_TX_WRAP_S(R300_TX_MIRRORED); + } + if (texstate->filter0 & R300_TX_WRAP_T(R300_TX_MIRRORED)) { + texstate->filter0 &= ~R300_TX_WRAP_T(R300_TX_MIRRORED); + } + + /* Change repeat to clamp-to-edge. + * (the repeat bit has a value of 0, no masking needed). */ + if ((texstate->filter0 & R300_TX_WRAP_S_MASK) == + R300_TX_WRAP_S(R300_TX_REPEAT)) { + texstate->filter0 |= R300_TX_WRAP_S(R300_TX_CLAMP_TO_EDGE); + } + if ((texstate->filter0 & R300_TX_WRAP_T_MASK) == + R300_TX_WRAP_T(R300_TX_REPEAT)) { + texstate->filter0 |= R300_TX_WRAP_T(R300_TX_CLAMP_TO_EDGE); + } } else { /* determine min/max levels */ /* the MAX_MIP level is the largest (finest) one */ - max_level = MIN2(sampler->max_lod, tex->tex.last_level); - min_level = MIN2(sampler->min_lod, max_level); - texstate->format[0] |= R300_TX_NUM_LEVELS(max_level); - texstate->filter[0] |= R300_TX_MAX_MIP_LEVEL(min_level); + max_level = MIN3(sampler->max_lod + view->base.first_level, + tex->b.b.last_level, view->base.last_level); + min_level = MIN2(sampler->min_lod + view->base.first_level, + max_level); + texstate->format.format0 |= R300_TX_NUM_LEVELS(max_level); + texstate->filter0 |= R300_TX_MAX_MIP_LEVEL(min_level); } - texstate->filter[0] |= i << 28; + texstate->filter0 |= i << 28; size += 16; state->count = i+1; @@ -577,19 +481,32 @@ static void r300_merge_textures_and_samplers(struct r300_context* r300) } r300->textures_state.size = size; + + /* Pick a fragment shader based on either the texture compare state + * or the uses_pitch flag. */ + if (r300->fs.state && count) { + if (r300_pick_fragment_shader(r300)) { + r300_mark_fs_code_dirty(r300); + } + } } void r300_update_derived_state(struct r300_context* r300) { - if (r300->rs_block_state.dirty || - r300->vertex_stream_state.dirty || /* XXX put updating this state out of this file */ - r300->rs_state.dirty) { /* XXX and remove this one (tcl_bypass dependency) */ + if (r300->textures_state.dirty) { + r300_merge_textures_and_samplers(r300); + } + + if (r300->rs_block_state.dirty) { r300_update_derived_shader_state(r300); } - if (r300->textures_state.dirty) { - r300_merge_textures_and_samplers(r300); + if (r300->draw) { + memset(&r300->vertex_info, 0, sizeof(struct vertex_info)); + r300_draw_emit_all_attribs(r300); + draw_compute_vertex_size(&r300->vertex_info); + r300_swtcl_vertex_psc(r300); } - r300_update_ztop(r300); + r300_update_hyperz_state(r300); } diff --git a/src/gallium/drivers/r300/r300_state_derived.h b/src/gallium/drivers/r300/r300_state_derived.h index 05ad535e2de..71a4a47b003 100644 --- a/src/gallium/drivers/r300/r300_state_derived.h +++ b/src/gallium/drivers/r300/r300_state_derived.h @@ -25,10 +25,6 @@ struct r300_context; -unsigned r300_shader_key_hash(void* key); - -int r300_shader_key_compare(void* key1, void* key2); - void r300_update_derived_state(struct r300_context* r300); #endif /* R300_STATE_DERIVED_H */ diff --git a/src/gallium/drivers/r300/r300_state_inlines.h b/src/gallium/drivers/r300/r300_state_inlines.h index 2f3a56e1fbc..fcbdb91b67e 100644 --- a/src/gallium/drivers/r300/r300_state_inlines.h +++ b/src/gallium/drivers/r300/r300_state_inlines.h @@ -32,6 +32,8 @@ #include "r300_reg.h" +#include <stdio.h> + /* Some maths. These should probably find their way to u_math, if needed. */ static INLINE int pack_float_16_6x(float f) { @@ -54,7 +56,7 @@ static INLINE uint32_t r300_translate_blend_function(int blend_func) case PIPE_BLEND_MAX: return R300_COMB_FCN_MAX; default: - debug_printf("r300: Unknown blend function %d\n", blend_func); + fprintf(stderr, "r300: Unknown blend function %d\n", blend_func); assert(0); break; } @@ -100,13 +102,13 @@ static INLINE uint32_t r300_translate_blend_factor(int blend_fact) case PIPE_BLENDFACTOR_SRC1_ALPHA: case PIPE_BLENDFACTOR_INV_SRC1_COLOR: case PIPE_BLENDFACTOR_INV_SRC1_ALPHA: - debug_printf("r300: Implementation error: " + fprintf(stderr, "r300: Implementation error: " "Bad blend factor %d not supported!\n", blend_fact); assert(0); break; default: - debug_printf("r300: Unknown blend factor %d\n", blend_fact); + fprintf(stderr, "r300: Unknown blend factor %d\n", blend_fact); assert(0); break; } @@ -135,7 +137,7 @@ static INLINE uint32_t r300_translate_depth_stencil_function(int zs_func) case PIPE_FUNC_ALWAYS: return R300_ZS_ALWAYS; default: - debug_printf("r300: Unknown depth/stencil function %d\n", + fprintf(stderr, "r300: Unknown depth/stencil function %d\n", zs_func); assert(0); break; @@ -163,7 +165,7 @@ static INLINE uint32_t r300_translate_stencil_op(int s_op) case PIPE_STENCIL_OP_INVERT: return R300_ZS_INVERT; default: - debug_printf("r300: Unknown stencil op %d", s_op); + fprintf(stderr, "r300: Unknown stencil op %d", s_op); assert(0); break; } @@ -190,7 +192,7 @@ static INLINE uint32_t r300_translate_alpha_function(int alpha_func) case PIPE_FUNC_ALWAYS: return R300_FG_ALPHA_FUNC_ALWAYS; default: - debug_printf("r300: Unknown alpha function %d", alpha_func); + fprintf(stderr, "r300: Unknown alpha function %d", alpha_func); assert(0); break; } @@ -209,7 +211,7 @@ r300_translate_polygon_mode_front(unsigned mode) { return R300_GA_POLY_MODE_FRONT_PTYPE_POINT; default: - debug_printf("r300: Bad polygon mode %i in %s\n", mode, + fprintf(stderr, "r300: Bad polygon mode %i in %s\n", mode, __FUNCTION__); return R300_GA_POLY_MODE_FRONT_PTYPE_TRI; } @@ -227,7 +229,7 @@ r300_translate_polygon_mode_back(unsigned mode) { return R300_GA_POLY_MODE_BACK_PTYPE_POINT; default: - debug_printf("r300: Bad polygon mode %i in %s\n", mode, + fprintf(stderr, "r300: Bad polygon mode %i in %s\n", mode, __FUNCTION__); return R300_GA_POLY_MODE_BACK_PTYPE_TRI; } @@ -253,9 +255,9 @@ static INLINE uint32_t r300_translate_wrap(int wrap) case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: return R300_TX_CLAMP_TO_EDGE | R300_TX_MIRRORED; case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: - return R300_TX_CLAMP_TO_EDGE | R300_TX_MIRRORED; + return R300_TX_CLAMP_TO_BORDER | R300_TX_MIRRORED; default: - debug_printf("r300: Unknown texture wrap %d", wrap); + fprintf(stderr, "r300: Unknown texture wrap %d", wrap); assert(0); return 0; } @@ -276,7 +278,7 @@ static INLINE uint32_t r300_translate_tex_filters(int min, int mag, int mip, retval |= R300_TX_MIN_FILTER_LINEAR; break; default: - debug_printf("r300: Unknown texture filter %d\n", min); + fprintf(stderr, "r300: Unknown texture filter %d\n", min); assert(0); break; } @@ -288,7 +290,7 @@ static INLINE uint32_t r300_translate_tex_filters(int min, int mag, int mip, retval |= R300_TX_MAG_FILTER_LINEAR; break; default: - debug_printf("r300: Unknown texture filter %d\n", mag); + fprintf(stderr, "r300: Unknown texture filter %d\n", mag); assert(0); break; } @@ -304,7 +306,7 @@ static INLINE uint32_t r300_translate_tex_filters(int min, int mag, int mip, retval |= R300_TX_MIN_FILTER_MIP_LINEAR; break; default: - debug_printf("r300: Unknown texture filter %d\n", mip); + fprintf(stderr, "r300: Unknown texture filter %d\n", mip); assert(0); break; } @@ -327,6 +329,18 @@ static INLINE uint32_t r300_anisotropy(unsigned max_aniso) } } +static INLINE uint32_t r500_anisotropy(unsigned max_aniso) +{ + if (!max_aniso) { + return 0; + } + max_aniso -= 1; + + // Map the range [0, 15] to [0, 63]. + return R500_TX_MAX_ANISO(MIN2((unsigned)(max_aniso*4.2001), 63)) | + R500_TX_ANISO_HIGH_QUALITY; +} + /* Non-CSO state. (For now.) */ static INLINE uint32_t r300_translate_gb_pipes(int pipe_count) @@ -348,96 +362,72 @@ static INLINE uint32_t r300_translate_gb_pipes(int pipe_count) return 0; } -/* Utility function to count the number of components in RGBAZS formats. - * XXX should go to util or p_format.h */ -static INLINE unsigned pf_component_count(enum pipe_format format) { - unsigned count = 0; - - if (util_format_get_component_bits(format, UTIL_FORMAT_COLORSPACE_RGB, 0)) { - count++; - } - if (util_format_get_component_bits(format, UTIL_FORMAT_COLORSPACE_RGB, 1)) { - count++; - } - if (util_format_get_component_bits(format, UTIL_FORMAT_COLORSPACE_RGB, 2)) { - count++; - } - if (util_format_get_component_bits(format, UTIL_FORMAT_COLORSPACE_RGB, 3)) { - count++; - } - if (util_format_get_component_bits(format, UTIL_FORMAT_COLORSPACE_ZS, 0)) { - count++; - } - if (util_format_get_component_bits(format, UTIL_FORMAT_COLORSPACE_ZS, 1)) { - count++; - } - - return count; -} - /* Translate pipe_formats into PSC vertex types. */ static INLINE uint16_t r300_translate_vertex_data_type(enum pipe_format format) { uint32_t result = 0; const struct util_format_description *desc; - unsigned components = pf_component_count(format); desc = util_format_description(format); if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN) { - debug_printf("r300: Bad format %s in %s:%d\n", util_format_name(format), + fprintf(stderr, "r300: Bad format %s in %s:%d\n", util_format_name(format), __FUNCTION__, __LINE__); assert(0); + abort(); } switch (desc->channel[0].type) { /* Half-floats, floats, doubles */ case UTIL_FORMAT_TYPE_FLOAT: - switch (util_format_get_component_bits(format, UTIL_FORMAT_COLORSPACE_RGB, 0)) { + switch (desc->channel[0].size) { case 16: /* XXX Supported only on RV350 and later. */ - if (components > 2) { + if (desc->nr_channels > 2) { result = R300_DATA_TYPE_FLT16_4; } else { result = R300_DATA_TYPE_FLT16_2; } break; case 32: - result = R300_DATA_TYPE_FLOAT_1 + (components - 1); + result = R300_DATA_TYPE_FLOAT_1 + (desc->nr_channels - 1); break; default: - debug_printf("r300: Bad format %s in %s:%d\n", + fprintf(stderr, "r300: Bad format %s in %s:%d\n", util_format_name(format), __FUNCTION__, __LINE__); assert(0); + abort(); } break; /* Unsigned ints */ case UTIL_FORMAT_TYPE_UNSIGNED: /* Signed ints */ case UTIL_FORMAT_TYPE_SIGNED: - switch (util_format_get_component_bits(format, UTIL_FORMAT_COLORSPACE_RGB, 0)) { + switch (desc->channel[0].size) { case 8: result = R300_DATA_TYPE_BYTE; break; case 16: - if (components > 2) { + if (desc->nr_channels > 2) { result = R300_DATA_TYPE_SHORT_4; } else { result = R300_DATA_TYPE_SHORT_2; } break; default: - debug_printf("r300: Bad format %s in %s:%d\n", + fprintf(stderr, "r300: Bad format %s in %s:%d\n", util_format_name(format), __FUNCTION__, __LINE__); - debug_printf("r300: util_format_get_component_bits(format, UTIL_FORMAT_COLORSPACE_RGB, 0) == %d\n", - util_format_get_component_bits(format, UTIL_FORMAT_COLORSPACE_RGB, 0)); + fprintf(stderr, "r300: desc->channel[0].size == %d\n", + desc->channel[0].size); assert(0); + abort(); } break; default: - debug_printf("r300: Bad format %s in %s:%d\n", + fprintf(stderr, "r300: Bad format %s in %s:%d\n", util_format_name(format), __FUNCTION__, __LINE__); assert(0); + abort(); } if (desc->channel[0].type == UTIL_FORMAT_TYPE_SIGNED) { @@ -453,36 +443,29 @@ r300_translate_vertex_data_type(enum pipe_format format) { static INLINE uint16_t r300_translate_vertex_data_swizzle(enum pipe_format format) { const struct util_format_description *desc = util_format_description(format); - unsigned swizzle[4], i; + unsigned i, swizzle = 0; assert(format); if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN) { - debug_printf("r300: Bad format %s in %s:%d\n", + fprintf(stderr, "r300: Bad format %s in %s:%d\n", util_format_name(format), __FUNCTION__, __LINE__); return 0; } - /* Swizzles for 8bits formats are in the reversed order, not sure why. */ - if (desc->channel[0].size == 8) { - for (i = 0; i < 4; i++) { - if (desc->swizzle[i] <= 3) { - swizzle[i] = 3 - desc->swizzle[i]; - } else { - swizzle[i] = desc->swizzle[i]; - } - } - } else { - for (i = 0; i < 4; i++) { - swizzle[i] = desc->swizzle[i]; - } + for (i = 0; i < desc->nr_channels; i++) { + swizzle |= + MIN2(desc->swizzle[i], R300_SWIZZLE_SELECT_FP_ONE) << (3*i); + } + /* Set (0,0,0,1) in unused components. */ + for (; i < 3; i++) { + swizzle |= R300_SWIZZLE_SELECT_FP_ZERO << (3*i); + } + for (; i < 4; i++) { + swizzle |= R300_SWIZZLE_SELECT_FP_ONE << (3*i); } - return ((swizzle[0] << R300_SWIZZLE_SELECT_X_SHIFT) | - (swizzle[1] << R300_SWIZZLE_SELECT_Y_SHIFT) | - (swizzle[2] << R300_SWIZZLE_SELECT_Z_SHIFT) | - (swizzle[3] << R300_SWIZZLE_SELECT_W_SHIFT) | - (0xf << R300_WRITE_ENA_SHIFT)); + return swizzle | (0xf << R300_WRITE_ENA_SHIFT); } #endif /* R300_STATE_INLINES_H */ diff --git a/src/gallium/drivers/r300/r300_state_invariant.c b/src/gallium/drivers/r300/r300_state_invariant.c index 4a2c68269b1..cd9443fa260 100644 --- a/src/gallium/drivers/r300/r300_state_invariant.c +++ b/src/gallium/drivers/r300/r300_state_invariant.c @@ -41,22 +41,19 @@ struct pipe_viewport_state r300_viewport_identity = { void r300_emit_invariant_state(struct r300_context* r300, unsigned size, void* state) { - struct r300_capabilities* caps = r300_screen(r300->context.screen)->caps; CS_LOCALS(r300); - BEGIN_CS(14 + (caps->has_tcl ? 2: 0)); + if (r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0)) { + /* Subpixel multisampling for AA. */ + BEGIN_CS(4); + OUT_CS_REG(R300_GB_MSPOS0, 0x66666666); + OUT_CS_REG(R300_GB_MSPOS1, 0x6666666); + END_CS; + } + + BEGIN_CS(12 + (r300->screen->caps.has_tcl ? 2 : 0)); /*** Graphics Backend (GB) ***/ - /* Various GB enables */ - OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE | - R300_GB_LINE_STUFF_ENABLE | - R300_GB_TRIANGLE_STUFF_ENABLE); - /* Subpixel multisampling for AA - * These are commented out because glisse's CS checker doesn't like them. - * I presume these will be re-enabled later. - * OUT_CS_REG(R300_GB_MSPOS0, 0x66666666); - * OUT_CS_REG(R300_GB_MSPOS1, 0x6666666); - */ /* Source of fog depth */ OUT_CS_REG(R300_GB_SELECT, R300_GB_FOG_SELECT_1_1_W); @@ -70,7 +67,7 @@ void r300_emit_invariant_state(struct r300_context* r300, /* Sign/normalize control */ OUT_CS_REG(R300_VAP_PSC_SGN_NORM_CNTL, R300_SGN_NORM_NO_ZERO); /* TCL-only stuff */ - if (caps->has_tcl) { + if (r300->screen->caps.has_tcl) { /* Amount of time to wait for vertex fetches in PVS */ OUT_CS_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff); } @@ -78,10 +75,10 @@ void r300_emit_invariant_state(struct r300_context* r300, END_CS; /* XXX unsorted stuff from surface_fill */ - BEGIN_CS(44 + (caps->has_tcl ? 7 : 0) + - (caps->family >= CHIP_FAMILY_RV350 ? 4 : 0)); + BEGIN_CS(38 + (r300->screen->caps.has_tcl ? 7 : 0) + + (r300->screen->caps.is_rv350 ? 4 : 0)); - if (caps->has_tcl) { + if (r300->screen->caps.has_tcl) { /*Flushing PVS is required before the VAP_GB registers can be changed*/ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0); OUT_CS_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4); @@ -90,11 +87,6 @@ void r300_emit_invariant_state(struct r300_context* r300, OUT_CS_32F(1.0); OUT_CS_32F(1.0); } - /* XXX point tex stuffing */ - OUT_CS_REG_SEQ(R300_GA_POINT_S0, 1); - OUT_CS_32F(0.0); - OUT_CS_REG_SEQ(R300_GA_POINT_S1, 1); - OUT_CS_32F(1.0); /* XXX line tex stuffing */ OUT_CS_REG_SEQ(R300_GA_LINE_S0, 1); OUT_CS_32F(0.0); @@ -116,7 +108,7 @@ void r300_emit_invariant_state(struct r300_context* r300, OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525); OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, 0x00000000); - if (caps->family >= CHIP_FAMILY_RV350) { + if (r300->screen->caps.is_rv350) { OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x01010101); OUT_CS_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFEFEFEFE); } @@ -125,9 +117,5 @@ void r300_emit_invariant_state(struct r300_context* r300, OUT_CS_REG(R300_ZB_DEPTHCLEARVALUE, 0x00000000); OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000); OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000); - - /* XXX */ - OUT_CS_REG(R300_SC_CLIP_RULE, 0xaaaa); - END_CS; } diff --git a/src/gallium/drivers/r300/r300_texture.c b/src/gallium/drivers/r300/r300_texture.c index c0144f64b4a..bffda846d70 100644 --- a/src/gallium/drivers/r300/r300_texture.c +++ b/src/gallium/drivers/r300/r300_texture.c @@ -28,11 +28,14 @@ #include "util/u_memory.h" #include "r300_context.h" +#include "r300_reg.h" #include "r300_texture.h" +#include "r300_transfer.h" #include "r300_screen.h" -#include "r300_state_inlines.h" +#include "r300_winsys.h" -#include "radeon_winsys.h" +/* XXX Enable float textures here. */ +/*#define ENABLE_FLOAT_TEXTURES*/ #define TILE_WIDTH 0 #define TILE_HEIGHT 1 @@ -46,6 +49,18 @@ static const unsigned microblock_table[5][3][2] = { {{ 2, 1}, {0, 0}, {0, 0}} /* 128 bits per pixel */ }; +/* Return true for non-compressed and non-YUV formats. */ +static boolean r300_format_is_plain(enum pipe_format format) +{ + const struct util_format_description *desc = util_format_description(format); + + if (!format) { + return FALSE; + } + + return desc->layout == UTIL_FORMAT_LAYOUT_PLAIN; +} + /* Translate a pipe_format into a useful texture format for sampling. * * Some special formats are translated directly using R300_EASY_TX_FORMAT, @@ -58,11 +73,12 @@ static const unsigned microblock_table[5][3][2] = { * * The FORMAT specifies how the texture sampler will treat the texture, and * makes available X, Y, Z, W, ZERO, and ONE for swizzling. */ -static uint32_t r300_translate_texformat(enum pipe_format format) +uint32_t r300_translate_texformat(enum pipe_format format, + const unsigned char *swizzle) { uint32_t result = 0; const struct util_format_description *desc; - unsigned components = 0, i; + unsigned i; boolean uniform = TRUE; const uint32_t swizzle_shift[4] = { R300_TX_FORMAT_R_SHIFT, @@ -70,7 +86,7 @@ static uint32_t r300_translate_texformat(enum pipe_format format) R300_TX_FORMAT_B_SHIFT, R300_TX_FORMAT_A_SHIFT }; - const uint32_t swizzle[4] = { + const uint32_t swizzle_bit[4] = { R300_TX_FORMAT_X, R300_TX_FORMAT_Y, R300_TX_FORMAT_Z, @@ -93,7 +109,7 @@ static uint32_t r300_translate_texformat(enum pipe_format format) case PIPE_FORMAT_Z16_UNORM: return R300_EASY_TX_FORMAT(X, X, X, X, X16); case PIPE_FORMAT_X8Z24_UNORM: - case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: return R300_EASY_TX_FORMAT(X, X, X, X, W24_FP); default: return ~0; /* Unsupported. */ @@ -117,24 +133,50 @@ static uint32_t r300_translate_texformat(enum pipe_format format) result |= R300_TX_FORMAT_GAMMA; break; - default:; + default: + switch (format) { + /* Same as YUV but without the YUR->RGB conversion. */ + case PIPE_FORMAT_R8G8_B8G8_UNORM: + return R300_EASY_TX_FORMAT(X, Y, Z, ONE, YVYU422) | result; + case PIPE_FORMAT_G8R8_G8B8_UNORM: + return R300_EASY_TX_FORMAT(X, Y, Z, ONE, VYUY422) | result; + default:; + } } /* Add swizzle. */ + if (!swizzle) { + swizzle = desc->swizzle; + } /*else { + if (swizzle[0] != desc->swizzle[0] || + swizzle[1] != desc->swizzle[1] || + swizzle[2] != desc->swizzle[2] || + swizzle[3] != desc->swizzle[3]) + { + const char n[6] = "RGBA01"; + fprintf(stderr, "Got different swizzling! Format: %c%c%c%c, " + "View: %c%c%c%c\n", + n[desc->swizzle[0]], n[desc->swizzle[1]], + n[desc->swizzle[2]], n[desc->swizzle[3]], + n[swizzle[0]], n[swizzle[1]], n[swizzle[2]], + n[swizzle[3]]); + } + }*/ + for (i = 0; i < 4; i++) { - switch (desc->swizzle[i]) { + switch (swizzle[i]) { case UTIL_FORMAT_SWIZZLE_X: case UTIL_FORMAT_SWIZZLE_NONE: - result |= swizzle[0] << swizzle_shift[i]; + result |= swizzle_bit[0] << swizzle_shift[i]; break; case UTIL_FORMAT_SWIZZLE_Y: - result |= swizzle[1] << swizzle_shift[i]; + result |= swizzle_bit[1] << swizzle_shift[i]; break; case UTIL_FORMAT_SWIZZLE_Z: - result |= swizzle[2] << swizzle_shift[i]; + result |= swizzle_bit[2] << swizzle_shift[i]; break; case UTIL_FORMAT_SWIZZLE_W: - result |= swizzle[3] << swizzle_shift[i]; + result |= swizzle_bit[3] << swizzle_shift[i]; break; case UTIL_FORMAT_SWIZZLE_0: result |= R300_TX_FORMAT_ZERO << swizzle_shift[i]; @@ -147,8 +189,8 @@ static uint32_t r300_translate_texformat(enum pipe_format format) } } - /* Compressed formats. */ - if (desc->layout == UTIL_FORMAT_LAYOUT_COMPRESSED) { + /* S3TC formats. */ + if (desc->layout == UTIL_FORMAT_LAYOUT_S3TC) { switch (format) { case PIPE_FORMAT_DXT1_RGB: case PIPE_FORMAT_DXT1_RGBA: @@ -166,28 +208,42 @@ static uint32_t r300_translate_texformat(enum pipe_format format) } } - /* Get the number of components. */ - for (i = 0; i < 4; i++) { - if (desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) { - ++components; - } - } - /* Add sign. */ - for (i = 0; i < components; i++) { + for (i = 0; i < desc->nr_channels; i++) { if (desc->channel[i].type == UTIL_FORMAT_TYPE_SIGNED) { result |= sign_bit[i]; } } + /* This is truly a special format. + * It stores R8G8 and B is computed using sqrt(1 - R^2 - G^2) + * in the sampler unit. Also known as D3DFMT_CxV8U8. */ + if (format == PIPE_FORMAT_R8G8Bx_SNORM) { + return R300_TX_FORMAT_CxV8U8 | result; + } + + /* RGTC formats. */ + if (desc->layout == UTIL_FORMAT_LAYOUT_RGTC) { + switch (format) { + case PIPE_FORMAT_RGTC1_UNORM: + case PIPE_FORMAT_RGTC1_SNORM: + return R500_TX_FORMAT_ATI1N | result; + case PIPE_FORMAT_RGTC2_UNORM: + case PIPE_FORMAT_RGTC2_SNORM: + return R400_TX_FORMAT_ATI2N | result; + default: + return ~0; /* Unsupported/unknown. */ + } + } + /* See whether the components are of the same size. */ - for (i = 1; i < components; i++) { + for (i = 1; i < desc->nr_channels; i++) { uniform = uniform && desc->channel[0].size == desc->channel[i].size; } /* Non-uniform formats. */ if (!uniform) { - switch (components) { + switch (desc->nr_channels) { case 3: if (desc->channel[0].size == 5 && desc->channel[1].size == 6 && @@ -229,7 +285,7 @@ static uint32_t r300_translate_texformat(enum pipe_format format) switch (desc->channel[0].size) { case 4: - switch (components) { + switch (desc->nr_channels) { case 2: return R300_TX_FORMAT_Y4X4 | result; case 4: @@ -238,7 +294,7 @@ static uint32_t r300_translate_texformat(enum pipe_format format) return ~0; case 8: - switch (components) { + switch (desc->nr_channels) { case 1: return R300_TX_FORMAT_X8 | result; case 2: @@ -249,7 +305,7 @@ static uint32_t r300_translate_texformat(enum pipe_format format) return ~0; case 16: - switch (components) { + switch (desc->nr_channels) { case 1: return R300_TX_FORMAT_X16 | result; case 2: @@ -260,12 +316,11 @@ static uint32_t r300_translate_texformat(enum pipe_format format) } return ~0; -/* XXX Enable float textures here. */ -#if 0 +#if defined(ENABLE_FLOAT_TEXTURES) case UTIL_FORMAT_TYPE_FLOAT: switch (desc->channel[0].size) { case 16: - switch (components) { + switch (desc->nr_channels) { case 1: return R300_TX_FORMAT_16F | result; case 2: @@ -276,7 +331,7 @@ static uint32_t r300_translate_texformat(enum pipe_format format) return ~0; case 32: - switch (components) { + switch (desc->nr_channels) { case 1: return R300_TX_FORMAT_32F | result; case 2: @@ -291,6 +346,17 @@ static uint32_t r300_translate_texformat(enum pipe_format format) return ~0; /* Unsupported/unknown. */ } +uint32_t r500_tx_format_msb_bit(enum pipe_format format) +{ + switch (format) { + case PIPE_FORMAT_RGTC1_UNORM: + case PIPE_FORMAT_RGTC1_SNORM: + return R500_TXFORMAT_MSB; + default: + return 0; + } +} + /* Buffer formats. */ /* Colorbuffer formats. This is the unswizzled format of the RB3D block's @@ -302,7 +368,6 @@ static uint32_t r300_translate_colorformat(enum pipe_format format) case PIPE_FORMAT_A8_UNORM: case PIPE_FORMAT_I8_UNORM: case PIPE_FORMAT_L8_UNORM: - case PIPE_FORMAT_L8_SRGB: case PIPE_FORMAT_R8_UNORM: case PIPE_FORMAT_R8_SNORM: return R300_COLOR_FORMAT_I8; @@ -310,39 +375,43 @@ static uint32_t r300_translate_colorformat(enum pipe_format format) /* 16-bit buffers. */ case PIPE_FORMAT_B5G6R5_UNORM: return R300_COLOR_FORMAT_RGB565; + case PIPE_FORMAT_B5G5R5A1_UNORM: + case PIPE_FORMAT_B5G5R5X1_UNORM: return R300_COLOR_FORMAT_ARGB1555; + case PIPE_FORMAT_B4G4R4A4_UNORM: + case PIPE_FORMAT_B4G4R4X4_UNORM: return R300_COLOR_FORMAT_ARGB4444; /* 32-bit buffers. */ case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_B8G8R8A8_SRGB: case PIPE_FORMAT_B8G8R8X8_UNORM: - case PIPE_FORMAT_B8G8R8X8_SRGB: case PIPE_FORMAT_A8R8G8B8_UNORM: - case PIPE_FORMAT_A8R8G8B8_SRGB: case PIPE_FORMAT_X8R8G8B8_UNORM: - case PIPE_FORMAT_X8R8G8B8_SRGB: case PIPE_FORMAT_A8B8G8R8_UNORM: case PIPE_FORMAT_R8G8B8A8_SNORM: - case PIPE_FORMAT_A8B8G8R8_SRGB: case PIPE_FORMAT_X8B8G8R8_UNORM: - case PIPE_FORMAT_X8B8G8R8_SRGB: + case PIPE_FORMAT_R8G8B8X8_UNORM: case PIPE_FORMAT_R8SG8SB8UX8U_NORM: return R300_COLOR_FORMAT_ARGB8888; + case PIPE_FORMAT_R10G10B10A2_UNORM: + case PIPE_FORMAT_R10G10B10X2_SNORM: + case PIPE_FORMAT_B10G10R10A2_UNORM: + case PIPE_FORMAT_R10SG10SB10SA2U_NORM: return R500_COLOR_FORMAT_ARGB2101010; /* R5xx-only? */ /* 64-bit buffers. */ case PIPE_FORMAT_R16G16B16A16_UNORM: case PIPE_FORMAT_R16G16B16A16_SNORM: - //case PIPE_FORMAT_R16G16B16A16_FLOAT: /* not in pipe_format */ +#if defined(ENABLE_FLOAT_TEXTURES) + case PIPE_FORMAT_R16G16B16A16_FLOAT: +#endif return R300_COLOR_FORMAT_ARGB16161616; -/* XXX Enable float textures here. */ -#if 0 /* 128-bit buffers. */ +#if defined(ENABLE_FLOAT_TEXTURES) case PIPE_FORMAT_R32G32B32A32_FLOAT: return R300_COLOR_FORMAT_ARGB32323232; #endif @@ -367,7 +436,7 @@ static uint32_t r300_translate_zsformat(enum pipe_format format) /* 24-bit depth, ignored stencil */ case PIPE_FORMAT_X8Z24_UNORM: /* 24-bit depth, 8-bit stencil */ - case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: return R300_DEPTHFORMAT_24BIT_INT_Z_8BIT_STENCIL; default: return ~0; /* Unsupported. */ @@ -393,12 +462,7 @@ static uint32_t r300_translate_out_fmt(enum pipe_format format) desc = util_format_description(format); /* Specifies how the shader output is written to the fog unit. */ - if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB) { - /* The gamma correction causes precision loss so we need - * higher precision to maintain reasonable quality. - * It has nothing to do with the colorbuffer format. */ - modifier |= R300_US_OUT_FMT_C4_10_GAMMA; - } else if (desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT) { + if (desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT) { if (desc->channel[0].size == 32) { modifier |= R300_US_OUT_FMT_C4_32_FP; } else { @@ -428,46 +492,44 @@ static uint32_t r300_translate_out_fmt(enum pipe_format format) return modifier | R300_C2_SEL_A; case PIPE_FORMAT_I8_UNORM: case PIPE_FORMAT_L8_UNORM: - case PIPE_FORMAT_L8_SRGB: case PIPE_FORMAT_R8_UNORM: case PIPE_FORMAT_R8_SNORM: return modifier | R300_C2_SEL_R; - /* ARGB 32-bit outputs. */ + /* BGRA outputs. */ case PIPE_FORMAT_B5G6R5_UNORM: case PIPE_FORMAT_B5G5R5A1_UNORM: + case PIPE_FORMAT_B5G5R5X1_UNORM: case PIPE_FORMAT_B4G4R4A4_UNORM: + case PIPE_FORMAT_B4G4R4X4_UNORM: case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_B8G8R8A8_SRGB: case PIPE_FORMAT_B8G8R8X8_UNORM: - case PIPE_FORMAT_B8G8R8X8_SRGB: + case PIPE_FORMAT_B10G10R10A2_UNORM: return modifier | R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A; - /* BGRA 32-bit outputs. */ + /* ARGB outputs. */ case PIPE_FORMAT_A8R8G8B8_UNORM: - case PIPE_FORMAT_A8R8G8B8_SRGB: case PIPE_FORMAT_X8R8G8B8_UNORM: - case PIPE_FORMAT_X8R8G8B8_SRGB: return modifier | R300_C0_SEL_A | R300_C1_SEL_R | R300_C2_SEL_G | R300_C3_SEL_B; - /* RGBA 32-bit outputs. */ + /* ABGR outputs. */ case PIPE_FORMAT_A8B8G8R8_UNORM: - case PIPE_FORMAT_R8G8B8A8_SNORM: - case PIPE_FORMAT_A8B8G8R8_SRGB: case PIPE_FORMAT_X8B8G8R8_UNORM: - case PIPE_FORMAT_X8B8G8R8_SRGB: return modifier | R300_C0_SEL_A | R300_C1_SEL_B | R300_C2_SEL_G | R300_C3_SEL_R; - /* ABGR 32-bit outputs. */ + /* RGBA outputs. */ + case PIPE_FORMAT_R8G8B8X8_UNORM: + case PIPE_FORMAT_R8G8B8A8_SNORM: case PIPE_FORMAT_R8SG8SB8UX8U_NORM: case PIPE_FORMAT_R10G10B10A2_UNORM: - /* RGBA high precision outputs (same swizzles as ABGR low precision) */ + case PIPE_FORMAT_R10G10B10X2_SNORM: + case PIPE_FORMAT_R10SG10SB10SA2U_NORM: case PIPE_FORMAT_R16G16B16A16_UNORM: case PIPE_FORMAT_R16G16B16A16_SNORM: //case PIPE_FORMAT_R16G16B16A16_FLOAT: /* not in pipe_format */ @@ -494,74 +556,83 @@ boolean r300_is_zs_format_supported(enum pipe_format format) boolean r300_is_sampler_format_supported(enum pipe_format format) { - return r300_translate_texformat(format) != ~0; + return r300_translate_texformat(format, 0) != ~0; } -static void r300_setup_texture_state(struct r300_screen* screen, struct r300_texture* tex) +static void r300_texture_setup_immutable_state(struct r300_screen* screen, + struct r300_texture* tex) { - struct r300_texture_format_state* state = &tex->state; - struct pipe_texture *pt = &tex->tex; - unsigned i; - boolean is_r500 = screen->caps->is_r500; + struct r300_texture_format_state* f = &tex->tx_format; + struct pipe_resource *pt = &tex->b.b; + boolean is_r500 = screen->caps.is_r500; /* Set sampler state. */ - state->format0 = R300_TX_WIDTH((pt->width0 - 1) & 0x7ff) | - R300_TX_HEIGHT((pt->height0 - 1) & 0x7ff); + f->format0 = R300_TX_WIDTH((pt->width0 - 1) & 0x7ff) | + R300_TX_HEIGHT((pt->height0 - 1) & 0x7ff); - if (tex->is_npot) { + if (tex->uses_pitch) { /* rectangles love this */ - state->format0 |= R300_TX_PITCH_EN; - state->format2 = (tex->pitch[0] - 1) & 0x1fff; + f->format0 |= R300_TX_PITCH_EN; + f->format2 = (tex->pitch[0] - 1) & 0x1fff; } else { /* power of two textures (3D, mipmaps, and no pitch) */ - state->format0 |= R300_TX_DEPTH(util_logbase2(pt->depth0) & 0xf); + f->format0 |= R300_TX_DEPTH(util_logbase2(pt->depth0) & 0xf); } - state->format1 = r300_translate_texformat(pt->format); + f->format1 = 0; if (pt->target == PIPE_TEXTURE_CUBE) { - state->format1 |= R300_TX_FORMAT_CUBIC_MAP; + f->format1 |= R300_TX_FORMAT_CUBIC_MAP; } if (pt->target == PIPE_TEXTURE_3D) { - state->format1 |= R300_TX_FORMAT_3D; + f->format1 |= R300_TX_FORMAT_3D; } /* large textures on r500 */ if (is_r500) { if (pt->width0 > 2048) { - state->format2 |= R500_TXWIDTH_BIT11; + f->format2 |= R500_TXWIDTH_BIT11; } if (pt->height0 > 2048) { - state->format2 |= R500_TXHEIGHT_BIT11; + f->format2 |= R500_TXHEIGHT_BIT11; } } + f->tile_config = R300_TXO_MACRO_TILE(tex->macrotile) | + R300_TXO_MICRO_TILE(tex->microtile); + SCREEN_DBG(screen, DBG_TEX, "r300: Set texture state (%dx%d, %d levels)\n", pt->width0, pt->height0, pt->last_level); +} + +static void r300_texture_setup_fb_state(struct r300_screen* screen, + struct r300_texture* tex) +{ + unsigned i; /* Set framebuffer state. */ - if (util_format_is_depth_or_stencil(tex->tex.format)) { - for (i = 0; i <= tex->tex.last_level; i++) { + if (util_format_is_depth_or_stencil(tex->b.b.format)) { + for (i = 0; i <= tex->b.b.last_level; i++) { tex->fb_state.depthpitch[i] = tex->pitch[i] | R300_DEPTHMACROTILE(tex->mip_macrotile[i]) | R300_DEPTHMICROTILE(tex->microtile); } - tex->fb_state.zb_format = r300_translate_zsformat(tex->tex.format); + tex->fb_state.zb_format = r300_translate_zsformat(tex->b.b.format); } else { - for (i = 0; i <= tex->tex.last_level; i++) { + for (i = 0; i <= tex->b.b.last_level; i++) { tex->fb_state.colorpitch[i] = tex->pitch[i] | - r300_translate_colorformat(tex->tex.format) | + r300_translate_colorformat(tex->b.b.format) | R300_COLOR_TILE(tex->mip_macrotile[i]) | R300_COLOR_MICROTILE(tex->microtile); } - tex->fb_state.us_out_fmt = r300_translate_out_fmt(tex->tex.format); + tex->fb_state.us_out_fmt = r300_translate_out_fmt(tex->b.b.format); } } void r300_texture_reinterpret_format(struct pipe_screen *screen, - struct pipe_texture *tex, + struct pipe_resource *tex, enum pipe_format new_format) { struct r300_screen *r300screen = r300_screen(screen); @@ -571,7 +642,7 @@ void r300_texture_reinterpret_format(struct pipe_screen *screen, tex->format = new_format; - r300_setup_texture_state(r300_screen(screen), (struct r300_texture*)tex); + r300_texture_setup_fb_state(r300_screen(screen), r300_texture(tex)); } unsigned r300_texture_get_offset(struct r300_texture* tex, unsigned level, @@ -579,7 +650,7 @@ unsigned r300_texture_get_offset(struct r300_texture* tex, unsigned level, { unsigned offset = tex->offset[level]; - switch (tex->tex.target) { + switch (tex->b.b.target) { case PIPE_TEXTURE_3D: assert(face == 0); return offset + zslice * tex->layer_size[level]; @@ -603,7 +674,7 @@ static unsigned r300_texture_get_tile_size(struct r300_texture* tex, { unsigned pixsize, tile_size; - pixsize = util_format_get_blocksize(tex->tex.format); + pixsize = util_format_get_blocksize(tex->b.b.format); tile_size = microblock_table[util_logbase2(pixsize)][tex->microtile][dim]; if (macrotile) { @@ -617,18 +688,23 @@ static unsigned r300_texture_get_tile_size(struct r300_texture* tex, /* Return true if macrotiling should be enabled on the miplevel. */ static boolean r300_texture_macro_switch(struct r300_texture *tex, unsigned level, - boolean rv350_mode) + boolean rv350_mode, + int dim) { - unsigned tile_width, width; + unsigned tile, texdim; - tile_width = r300_texture_get_tile_size(tex, TILE_WIDTH, TRUE); - width = u_minify(tex->tex.width0, level); + tile = r300_texture_get_tile_size(tex, dim, TRUE); + if (dim == TILE_WIDTH) { + texdim = u_minify(tex->b.b.width0, level); + } else { + texdim = u_minify(tex->b.b.height0, level); + } /* See TX_FILTER1_n.MACRO_SWITCH. */ if (rv350_mode) { - return width >= tile_width; + return texdim >= tile; } else { - return width > tile_width; + return texdim > tile; } } @@ -645,22 +721,22 @@ unsigned r300_texture_get_stride(struct r300_screen* screen, return tex->stride_override; /* Check the level. */ - if (level > tex->tex.last_level) { + if (level > tex->b.b.last_level) { SCREEN_DBG(screen, DBG_TEX, "%s: level (%u) > last_level (%u)\n", - __FUNCTION__, level, tex->tex.last_level); + __FUNCTION__, level, tex->b.b.last_level); return 0; } - width = u_minify(tex->tex.width0, level); + width = u_minify(tex->b.b.width0, level); - if (!util_format_is_compressed(tex->tex.format)) { + if (r300_format_is_plain(tex->b.b.format)) { tile_width = r300_texture_get_tile_size(tex, TILE_WIDTH, tex->mip_macrotile[level]); width = align(width, tile_width); - return util_format_get_stride(tex->tex.format, width); + return util_format_get_stride(tex->b.b.format, width); } else { - return align(util_format_get_stride(tex->tex.format, width), 32); + return align(util_format_get_stride(tex->b.b.format, width), 32); } } @@ -669,32 +745,60 @@ static unsigned r300_texture_get_nblocksy(struct r300_texture* tex, { unsigned height, tile_height; - height = u_minify(tex->tex.height0, level); + height = u_minify(tex->b.b.height0, level); - if (!util_format_is_compressed(tex->tex.format)) { + if (r300_format_is_plain(tex->b.b.format)) { tile_height = r300_texture_get_tile_size(tex, TILE_HEIGHT, tex->mip_macrotile[level]); height = align(height, tile_height); + + /* This is needed for the kernel checker, unfortunately. */ + height = util_next_power_of_two(height); } - return util_format_get_nblocksy(tex->tex.format, height); + return util_format_get_nblocksy(tex->b.b.format, height); +} + +static void r300_texture_3d_fix_mipmapping(struct r300_screen *screen, + struct r300_texture *tex) +{ + /* The kernels <= 2.6.34-rc4 compute the size of mipmapped 3D textures + * incorrectly. This is a workaround to prevent CS from being rejected. */ + + unsigned i, size; + + if (!screen->rws->get_value(screen->rws, R300_VID_DRM_2_3_0) && + tex->b.b.target == PIPE_TEXTURE_3D && + tex->b.b.last_level > 0) { + size = 0; + + for (i = 0; i <= tex->b.b.last_level; i++) { + size += r300_texture_get_stride(screen, tex, i) * + r300_texture_get_nblocksy(tex, i); + } + + size *= tex->b.b.depth0; + tex->size = size; + } } static void r300_setup_miptree(struct r300_screen* screen, struct r300_texture* tex) { - struct pipe_texture* base = &tex->tex; + struct pipe_resource* base = &tex->b.b; unsigned stride, size, layer_size, nblocksy, i; - boolean rv350_mode = screen->caps->family >= CHIP_FAMILY_RV350; + boolean rv350_mode = screen->caps.is_rv350; SCREEN_DBG(screen, DBG_TEX, "r300: Making miptree for texture, format %s\n", util_format_name(base->format)); for (i = 0; i <= base->last_level; i++) { /* Let's see if this miplevel can be macrotiled. */ - tex->mip_macrotile[i] = (tex->macrotile == R300_BUFFER_TILED && - r300_texture_macro_switch(tex, i, rv350_mode)) ? - R300_BUFFER_TILED : R300_BUFFER_LINEAR; + tex->mip_macrotile[i] = + (tex->macrotile == R300_BUFFER_TILED && + r300_texture_macro_switch(tex, i, rv350_mode, TILE_WIDTH) && + r300_texture_macro_switch(tex, i, rv350_mode, TILE_HEIGHT)) ? + R300_BUFFER_TILED : R300_BUFFER_LINEAR; stride = r300_texture_get_stride(screen, tex, i); nblocksy = r300_texture_get_nblocksy(tex, i); @@ -720,64 +824,163 @@ static void r300_setup_miptree(struct r300_screen* screen, static void r300_setup_flags(struct r300_texture* tex) { - tex->is_npot = !util_is_power_of_two(tex->tex.width0) || - !util_is_power_of_two(tex->tex.height0); + tex->uses_pitch = !util_is_power_of_two(tex->b.b.width0) || + !util_is_power_of_two(tex->b.b.height0) || + tex->stride_override; +} + +static void r300_setup_tiling(struct pipe_screen *screen, + struct r300_texture *tex) +{ + struct r300_winsys_screen *rws = (struct r300_winsys_screen *)screen->winsys; + enum pipe_format format = tex->b.b.format; + boolean rv350_mode = r300_screen(screen)->caps.is_rv350; + boolean is_zb = util_format_is_depth_or_stencil(format); + boolean dbg_no_tiling = SCREEN_DBG_ON(r300_screen(screen), DBG_NO_TILING); + + if (!r300_format_is_plain(format)) { + return; + } + + /* If height == 1, disable microtiling except for zbuffer. */ + if (!is_zb && (tex->b.b.height0 == 1 || dbg_no_tiling)) { + return; + } + + /* Set microtiling. */ + switch (util_format_get_blocksize(format)) { + case 1: + case 4: + tex->microtile = R300_BUFFER_TILED; + break; + + case 2: + case 8: + if (rws->get_value(rws, R300_VID_SQUARE_TILING_SUPPORT)) { + tex->microtile = R300_BUFFER_SQUARETILED; + } + break; + } + + if (dbg_no_tiling) { + return; + } + + /* Set macrotiling. */ + if (r300_texture_macro_switch(tex, 0, rv350_mode, TILE_WIDTH) && + r300_texture_macro_switch(tex, 0, rv350_mode, TILE_HEIGHT)) { + tex->macrotile = R300_BUFFER_TILED; + } +} + +static unsigned r300_texture_is_referenced(struct pipe_context *context, + struct pipe_resource *texture, + unsigned face, unsigned level) +{ + struct r300_context *r300 = r300_context(context); + struct r300_texture *rtex = (struct r300_texture *)texture; + + if (r300->rws->is_buffer_referenced(r300->rws, rtex->buffer, R300_REF_CS)) + return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE; + + return PIPE_UNREFERENCED; } +static void r300_texture_destroy(struct pipe_screen *screen, + struct pipe_resource* texture) +{ + struct r300_texture* tex = (struct r300_texture*)texture; + struct r300_winsys_screen *rws = (struct r300_winsys_screen *)texture->screen->winsys; + + rws->buffer_reference(rws, &tex->buffer, NULL); + FREE(tex); +} + +static boolean r300_texture_get_handle(struct pipe_screen* screen, + struct pipe_resource *texture, + struct winsys_handle *whandle) +{ + struct r300_winsys_screen *rws = (struct r300_winsys_screen *)screen->winsys; + struct r300_texture* tex = (struct r300_texture*)texture; + unsigned stride; + + if (!tex) { + return FALSE; + } + + stride = r300_texture_get_stride(r300_screen(screen), tex, 0); + + rws->buffer_get_handle(rws, tex->buffer, stride, whandle); + + return TRUE; +} + +struct u_resource_vtbl r300_texture_vtbl = +{ + r300_texture_get_handle, /* get_handle */ + r300_texture_destroy, /* resource_destroy */ + r300_texture_is_referenced, /* is_resource_referenced */ + r300_texture_get_transfer, /* get_transfer */ + r300_texture_transfer_destroy, /* transfer_destroy */ + r300_texture_transfer_map, /* transfer_map */ + u_default_transfer_flush_region, /* transfer_flush_region */ + r300_texture_transfer_unmap, /* transfer_unmap */ + u_default_transfer_inline_write /* transfer_inline_write */ +}; + /* Create a new texture. */ -static struct pipe_texture* - r300_texture_create(struct pipe_screen* screen, - const struct pipe_texture* template) +struct pipe_resource* r300_texture_create(struct pipe_screen* screen, + const struct pipe_resource* base) { struct r300_texture* tex = CALLOC_STRUCT(r300_texture); struct r300_screen* rscreen = r300_screen(screen); - struct radeon_winsys* winsys = (struct radeon_winsys*)screen->winsys; + struct r300_winsys_screen *rws = (struct r300_winsys_screen *)screen->winsys; if (!tex) { return NULL; } - tex->tex = *template; - pipe_reference_init(&tex->tex.reference, 1); - tex->tex.screen = screen; + tex->b.b = *base; + tex->b.vtbl = &r300_texture_vtbl; + pipe_reference_init(&tex->b.b.reference, 1); + tex->b.b.screen = screen; r300_setup_flags(tex); + if (!(base->flags & R300_RESOURCE_FLAG_TRANSFER) && + !(base->bind & PIPE_BIND_SCANOUT)) { + r300_setup_tiling(screen, tex); + } r300_setup_miptree(rscreen, tex); - r300_setup_texture_state(rscreen, tex); - - tex->buffer = screen->buffer_create(screen, 2048, - PIPE_BUFFER_USAGE_PIXEL, - tex->size); - winsys->buffer_set_tiling(winsys, tex->buffer, - tex->pitch[0], - tex->microtile != R300_BUFFER_LINEAR, - tex->macrotile != R300_BUFFER_LINEAR); + r300_texture_3d_fix_mipmapping(rscreen, tex); + r300_texture_setup_immutable_state(rscreen, tex); + r300_texture_setup_fb_state(rscreen, tex); + + tex->buffer = rws->buffer_create(rws, 2048, + PIPE_BIND_SAMPLER_VIEW, /* XXX */ + tex->size); + rws->buffer_set_tiling(rws, tex->buffer, + tex->pitch[0], + tex->microtile, + tex->macrotile); if (!tex->buffer) { FREE(tex); return NULL; } - return (struct pipe_texture*)tex; -} - -static void r300_texture_destroy(struct pipe_texture* texture) -{ - struct r300_texture* tex = (struct r300_texture*)texture; - - pipe_buffer_reference(&tex->buffer, NULL); - - FREE(tex); + return (struct pipe_resource*)tex; } -static struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen, - struct pipe_texture* texture, - unsigned face, - unsigned level, - unsigned zslice, - unsigned flags) +/* Not required to implement u_resource_vtbl, consider moving to another file: + */ +struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen, + struct pipe_resource* texture, + unsigned face, + unsigned level, + unsigned zslice, + unsigned flags) { - struct r300_texture* tex = (struct r300_texture*)texture; + struct r300_texture* tex = r300_texture(texture); struct pipe_surface* surface = CALLOC_STRUCT(pipe_surface); unsigned offset; @@ -785,7 +988,7 @@ static struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen, if (surface) { pipe_reference_init(&surface->reference, 1); - pipe_texture_reference(&surface->texture, texture); + pipe_resource_reference(&surface->texture, texture); surface->format = texture->format; surface->width = u_minify(texture->width0, level); surface->height = u_minify(texture->height0, level); @@ -800,20 +1003,25 @@ static struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen, return surface; } -static void r300_tex_surface_destroy(struct pipe_surface* s) +/* Not required to implement u_resource_vtbl, consider moving to another file: + */ +void r300_tex_surface_destroy(struct pipe_surface* s) { - pipe_texture_reference(&s->texture, NULL); + pipe_resource_reference(&s->texture, NULL); FREE(s); } -static struct pipe_texture* - r300_texture_blanket(struct pipe_screen* screen, - const struct pipe_texture* base, - const unsigned* stride, - struct pipe_buffer* buffer) +struct pipe_resource* +r300_texture_from_handle(struct pipe_screen* screen, + const struct pipe_resource* base, + struct winsys_handle *whandle) { - struct r300_texture* tex; + struct r300_winsys_screen *rws = (struct r300_winsys_screen*)screen->winsys; struct r300_screen* rscreen = r300_screen(screen); + struct r300_winsys_buffer *buffer; + struct r300_texture* tex; + unsigned stride; + boolean override_zb_flags; /* Support only 2D textures without mipmaps */ if (base->target != PIPE_TEXTURE_2D || @@ -822,101 +1030,60 @@ static struct pipe_texture* return NULL; } + buffer = rws->buffer_from_handle(rws, screen, whandle, &stride); + if (!buffer) { + return NULL; + } + tex = CALLOC_STRUCT(r300_texture); if (!tex) { return NULL; } - tex->tex = *base; - pipe_reference_init(&tex->tex.reference, 1); - tex->tex.screen = screen; + tex->b.b = *base; + tex->b.vtbl = &r300_texture_vtbl; + pipe_reference_init(&tex->b.b.reference, 1); + tex->b.b.screen = screen; - tex->stride_override = *stride; - tex->pitch[0] = *stride / util_format_get_blocksize(base->format); + tex->stride_override = stride; - r300_setup_flags(tex); - r300_setup_texture_state(rscreen, tex); + /* one ref already taken */ + tex->buffer = buffer; - pipe_buffer_reference(&tex->buffer, buffer); + rws->buffer_get_tiling(rws, buffer, &tex->microtile, &tex->macrotile); + r300_setup_flags(tex); - return (struct pipe_texture*)tex; -} + /* Enforce microtiled zbuffer. */ + override_zb_flags = util_format_is_depth_or_stencil(base->format) && + tex->microtile == R300_BUFFER_LINEAR; -static struct pipe_video_surface * -r300_video_surface_create(struct pipe_screen *screen, - enum pipe_video_chroma_format chroma_format, - unsigned width, unsigned height) -{ - struct r300_video_surface *r300_vsfc; - struct pipe_texture template; - - assert(screen); - assert(width && height); - - r300_vsfc = CALLOC_STRUCT(r300_video_surface); - if (!r300_vsfc) - return NULL; - - pipe_reference_init(&r300_vsfc->base.reference, 1); - r300_vsfc->base.screen = screen; - r300_vsfc->base.chroma_format = chroma_format; - r300_vsfc->base.width = width; - r300_vsfc->base.height = height; - - memset(&template, 0, sizeof(struct pipe_texture)); - template.target = PIPE_TEXTURE_2D; - template.format = PIPE_FORMAT_B8G8R8X8_UNORM; - template.last_level = 0; - template.width0 = util_next_power_of_two(width); - template.height0 = util_next_power_of_two(height); - template.depth0 = 1; - template.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER | - PIPE_TEXTURE_USAGE_RENDER_TARGET; - - r300_vsfc->tex = screen->texture_create(screen, &template); - if (!r300_vsfc->tex) - { - FREE(r300_vsfc); - return NULL; - } - - return &r300_vsfc->base; -} - -static void r300_video_surface_destroy(struct pipe_video_surface *vsfc) -{ - struct r300_video_surface *r300_vsfc = r300_video_surface(vsfc); - pipe_texture_reference(&r300_vsfc->tex, NULL); - FREE(r300_vsfc); -} + if (override_zb_flags) { + switch (util_format_get_blocksize(base->format)) { + case 4: + tex->microtile = R300_BUFFER_TILED; + break; -void r300_init_screen_texture_functions(struct pipe_screen* screen) -{ - screen->texture_create = r300_texture_create; - screen->texture_destroy = r300_texture_destroy; - screen->get_tex_surface = r300_get_tex_surface; - screen->tex_surface_destroy = r300_tex_surface_destroy; - screen->texture_blanket = r300_texture_blanket; - - screen->video_surface_create = r300_video_surface_create; - screen->video_surface_destroy= r300_video_surface_destroy; -} + case 2: + if (rws->get_value(rws, R300_VID_SQUARE_TILING_SUPPORT)) { + tex->microtile = R300_BUFFER_SQUARETILED; + break; + } + /* Pass through. */ -boolean r300_get_texture_buffer(struct pipe_screen* screen, - struct pipe_texture* texture, - struct pipe_buffer** buffer, - unsigned* stride) -{ - struct r300_texture* tex = (struct r300_texture*)texture; - if (!tex) { - return FALSE; + default: + override_zb_flags = FALSE; + } } - pipe_buffer_reference(buffer, tex->buffer); - - if (stride) { - *stride = r300_texture_get_stride(r300_screen(screen), tex, 0); + r300_setup_miptree(rscreen, tex); + r300_texture_setup_immutable_state(rscreen, tex); + r300_texture_setup_fb_state(rscreen, tex); + + if (override_zb_flags) { + rws->buffer_set_tiling(rws, tex->buffer, + tex->pitch[0], + tex->microtile, + tex->macrotile); } - - return TRUE; + return (struct pipe_resource*)tex; } diff --git a/src/gallium/drivers/r300/r300_texture.h b/src/gallium/drivers/r300/r300_texture.h index 46a5fb6188b..453d42b188f 100644 --- a/src/gallium/drivers/r300/r300_texture.h +++ b/src/gallium/drivers/r300/r300_texture.h @@ -23,14 +23,14 @@ #ifndef R300_TEXTURE_H #define R300_TEXTURE_H -#include "pipe/p_video_state.h" #include "util/u_format.h" -#include "r300_reg.h" - struct r300_texture; -void r300_init_screen_texture_functions(struct pipe_screen* screen); +uint32_t r300_translate_texformat(enum pipe_format format, + const unsigned char *swizzle); + +uint32_t r500_tx_format_msb_bit(enum pipe_format format); unsigned r300_texture_get_stride(struct r300_screen* screen, struct r300_texture* tex, unsigned level); @@ -39,7 +39,7 @@ unsigned r300_texture_get_offset(struct r300_texture* tex, unsigned level, unsigned zslice, unsigned face); void r300_texture_reinterpret_format(struct pipe_screen *screen, - struct pipe_texture *tex, + struct pipe_resource *tex, enum pipe_format new_format); boolean r300_is_colorbuffer_format_supported(enum pipe_format format); @@ -48,25 +48,24 @@ boolean r300_is_zs_format_supported(enum pipe_format format); boolean r300_is_sampler_format_supported(enum pipe_format format); -struct r300_video_surface -{ - struct pipe_video_surface base; - struct pipe_texture *tex; -}; -static INLINE struct r300_video_surface * -r300_video_surface(struct pipe_video_surface *pvs) -{ - return (struct r300_video_surface *)pvs; -} +struct pipe_resource* +r300_texture_from_handle(struct pipe_screen* screen, + const struct pipe_resource* base, + struct winsys_handle *whandle); + +struct pipe_resource* +r300_texture_create(struct pipe_screen* screen, + const struct pipe_resource* templ); -#ifndef R300_WINSYS_H -boolean r300_get_texture_buffer(struct pipe_screen* screen, - struct pipe_texture* texture, - struct pipe_buffer** buffer, - unsigned* stride); +struct pipe_surface* r300_get_tex_surface(struct pipe_screen* screen, + struct pipe_resource* texture, + unsigned face, + unsigned level, + unsigned zslice, + unsigned flags); -#endif /* R300_WINSYS_H */ +void r300_tex_surface_destroy(struct pipe_surface* s); #endif /* R300_TEXTURE_H */ diff --git a/src/gallium/drivers/r300/r300_tgsi_to_rc.c b/src/gallium/drivers/r300/r300_tgsi_to_rc.c index aff4ddd4e23..89f39af9761 100644 --- a/src/gallium/drivers/r300/r300_tgsi_to_rc.c +++ b/src/gallium/drivers/r300/r300_tgsi_to_rc.c @@ -25,12 +25,11 @@ #include "radeon_compiler.h" #include "radeon_program.h" +#include "tgsi/tgsi_info.h" #include "tgsi/tgsi_parse.h" #include "tgsi/tgsi_scan.h" #include "tgsi/tgsi_util.h" -#include "util/u_debug.h" - static unsigned translate_opcode(unsigned opcode) { switch(opcode) { @@ -109,17 +108,15 @@ static unsigned translate_opcode(unsigned opcode) /* case TGSI_OPCODE_BRK: return RC_OPCODE_BRK; */ case TGSI_OPCODE_IF: return RC_OPCODE_IF; /* case TGSI_OPCODE_LOOP: return RC_OPCODE_LOOP; */ - /* case TGSI_OPCODE_REP: return RC_OPCODE_REP; */ case TGSI_OPCODE_ELSE: return RC_OPCODE_ELSE; case TGSI_OPCODE_ENDIF: return RC_OPCODE_ENDIF; /* case TGSI_OPCODE_ENDLOOP: return RC_OPCODE_ENDLOOP; */ - /* case TGSI_OPCODE_ENDREP: return RC_OPCODE_ENDREP; */ /* case TGSI_OPCODE_PUSHA: return RC_OPCODE_PUSHA; */ /* case TGSI_OPCODE_POPA: return RC_OPCODE_POPA; */ - /* case TGSI_OPCODE_CEIL: return RC_OPCODE_CEIL; */ + case TGSI_OPCODE_CEIL: return RC_OPCODE_CEIL; /* case TGSI_OPCODE_I2F: return RC_OPCODE_I2F; */ /* case TGSI_OPCODE_NOT: return RC_OPCODE_NOT; */ - /* case TGSI_OPCODE_TRUNC: return RC_OPCODE_TRUNC; */ + case TGSI_OPCODE_TRUNC: return RC_OPCODE_FLR; /* case TGSI_OPCODE_SHL: return RC_OPCODE_SHL; */ /* case TGSI_OPCODE_ISHR: return RC_OPCODE_SHR; */ /* case TGSI_OPCODE_AND: return RC_OPCODE_AND; */ @@ -145,7 +142,7 @@ static unsigned translate_opcode(unsigned opcode) case TGSI_OPCODE_KIL: return RC_OPCODE_KIL; } - debug_printf("r300: Unknown TGSI/RC opcode: %i\n", opcode); + fprintf(stderr, "r300: Unknown TGSI/RC opcode: %s\n", tgsi_get_opcode_name(opcode)); return RC_OPCODE_ILLEGAL_OPCODE; } @@ -272,9 +269,6 @@ static void transform_instruction(struct tgsi_to_rc * ttr, struct tgsi_full_inst struct rc_instruction * dst; int i; - if (src->Instruction.Opcode == TGSI_OPCODE_END) - return; - dst = rc_insert_new_instruction(ttr->compiler, ttr->compiler->Program.Instructions.Prev); dst->U.I.Opcode = translate_opcode(src->Instruction.Opcode); dst->U.I.SaturateMode = translate_saturate(src->Instruction.Saturate); @@ -333,6 +327,7 @@ static void handle_immediate(struct tgsi_to_rc * ttr, void r300_tgsi_to_rc(struct tgsi_to_rc * ttr, const struct tgsi_token * tokens) { + struct tgsi_full_instruction *inst; struct tgsi_parse_context parser; unsigned imm_index = 0; int i; @@ -367,7 +362,15 @@ void r300_tgsi_to_rc(struct tgsi_to_rc * ttr, imm_index++; break; case TGSI_TOKEN_TYPE_INSTRUCTION: - transform_instruction(ttr, &parser.FullToken.FullInstruction); + inst = &parser.FullToken.FullInstruction; + /* This hack with the RET opcode woudn't work with + * conditionals. */ + if (inst->Instruction.Opcode == TGSI_OPCODE_END || + inst->Instruction.Opcode == TGSI_OPCODE_RET) { + break; + } + + transform_instruction(ttr, inst); break; } } @@ -378,4 +381,3 @@ void r300_tgsi_to_rc(struct tgsi_to_rc * ttr, rc_calculate_inputs_outputs(ttr->compiler); } - diff --git a/src/gallium/drivers/r300/r300_transfer.c b/src/gallium/drivers/r300/r300_transfer.c new file mode 100644 index 00000000000..0dae9ef98b7 --- /dev/null +++ b/src/gallium/drivers/r300/r300_transfer.c @@ -0,0 +1,260 @@ +/* + * Copyright 2008 Corbin Simpson <[email protected]> + * Copyright 2010 Marek Olšák <[email protected]> + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#include "r300_context.h" +#include "r300_transfer.h" +#include "r300_texture.h" +#include "r300_screen.h" + +#include "r300_winsys.h" + +#include "util/u_memory.h" +#include "util/u_format.h" + +struct r300_transfer { + /* Parent class */ + struct pipe_transfer transfer; + + /* Offset from start of buffer. */ + unsigned offset; + + /* Detiled texture. */ + struct r300_texture *detiled_texture; + + /* Transfer and format flags. */ + unsigned render_target_usage; +}; + +/* Convenience cast wrapper. */ +static INLINE struct r300_transfer* +r300_transfer(struct pipe_transfer* transfer) +{ + return (struct r300_transfer*)transfer; +} + +/* Copy from a tiled texture to a detiled one. */ +static void r300_copy_from_tiled_texture(struct pipe_context *ctx, + struct r300_transfer *r300transfer) +{ + struct pipe_screen *screen = ctx->screen; + struct pipe_transfer *transfer = (struct pipe_transfer*)r300transfer; + struct pipe_resource *tex = transfer->resource; + struct pipe_surface *src, *dst; + + src = screen->get_tex_surface(screen, tex, + transfer->sr.face, + transfer->sr.level, + transfer->box.z, + PIPE_BIND_BLIT_SOURCE); + + dst = screen->get_tex_surface(screen, &r300transfer->detiled_texture->b.b, + 0, 0, 0, + PIPE_BIND_BLIT_DESTINATION); + + ctx->surface_copy(ctx, dst, 0, 0, src, + transfer->box.x, transfer->box.y, + transfer->box.width, transfer->box.height); + + pipe_surface_reference(&src, NULL); + pipe_surface_reference(&dst, NULL); +} + +/* Copy a detiled texture to a tiled one. */ +static void r300_copy_into_tiled_texture(struct pipe_context *ctx, + struct r300_transfer *r300transfer) +{ + struct pipe_screen *screen = ctx->screen; + struct pipe_transfer *transfer = (struct pipe_transfer*)r300transfer; + struct pipe_resource *tex = transfer->resource; + struct pipe_surface *src, *dst; + + src = screen->get_tex_surface(screen, &r300transfer->detiled_texture->b.b, + 0, 0, 0, + PIPE_BIND_BLIT_SOURCE); + + dst = screen->get_tex_surface(screen, tex, + transfer->sr.face, + transfer->sr.level, + transfer->box.z, + PIPE_BIND_BLIT_DESTINATION); + + /* XXX this flush prevents the following DRM error from occuring: + * [drm:radeon_cs_ioctl] *ERROR* Failed to parse relocation ! + * Reproducible with perf/copytex. */ + ctx->flush(ctx, 0, NULL); + + ctx->surface_copy(ctx, dst, + transfer->box.x, transfer->box.y, + src, 0, 0, + transfer->box.width, transfer->box.height); + + /* XXX this flush fixes a few piglit tests (e.g. glean/pixelFormats). */ + ctx->flush(ctx, 0, NULL); + + pipe_surface_reference(&src, NULL); + pipe_surface_reference(&dst, NULL); +} + +struct pipe_transfer* +r300_texture_get_transfer(struct pipe_context *ctx, + struct pipe_resource *texture, + struct pipe_subresource sr, + unsigned usage, + const struct pipe_box *box) +{ + struct r300_texture *tex = r300_texture(texture); + struct r300_screen *r300screen = r300_screen(ctx->screen); + struct r300_transfer *trans; + struct pipe_resource base; + + trans = CALLOC_STRUCT(r300_transfer); + if (trans) { + /* Initialize the transfer object. */ + pipe_resource_reference(&trans->transfer.resource, texture); + trans->transfer.sr = sr; + trans->transfer.usage = usage; + trans->transfer.box = *box; + + /* If the texture is tiled, we must create a temporary detiled texture + * for this transfer. */ + if (tex->microtile || tex->macrotile) { + trans->render_target_usage = + util_format_is_depth_or_stencil(texture->format) ? + PIPE_BIND_DEPTH_STENCIL : + PIPE_BIND_RENDER_TARGET; + + base.target = PIPE_TEXTURE_2D; + base.format = texture->format; + base.width0 = box->width; + base.height0 = box->height; + base.depth0 = 0; + base.last_level = 0; + base.nr_samples = 0; + base.usage = PIPE_USAGE_DYNAMIC; + base.bind = 0; + base.flags = R300_RESOURCE_FLAG_TRANSFER; + + /* For texture reading, the temporary (detiled) texture is used as + * a render target when blitting from a tiled texture. */ + if (usage & PIPE_TRANSFER_READ) { + base.bind |= trans->render_target_usage; + } + /* For texture writing, the temporary texture is used as a sampler + * when blitting into a tiled texture. */ + if (usage & PIPE_TRANSFER_WRITE) { + base.bind |= PIPE_BIND_SAMPLER_VIEW; + } + + /* Create the temporary texture. */ + trans->detiled_texture = r300_texture( + ctx->screen->resource_create(ctx->screen, + &base)); + + assert(!trans->detiled_texture->microtile && + !trans->detiled_texture->macrotile); + + /* Set the stride. + * + * Even though we are using an internal texture for this, + * the transfer sr, box and usage parameters still reflect + * the arguments received to get_transfer. We just do the + * right thing internally. + */ + trans->transfer.stride = + r300_texture_get_stride(r300screen, trans->detiled_texture, 0); + + if (usage & PIPE_TRANSFER_READ) { + /* We cannot map a tiled texture directly because the data is + * in a different order, therefore we do detiling using a blit. */ + r300_copy_from_tiled_texture(ctx, trans); + } + } else { + trans->transfer.stride = + r300_texture_get_stride(r300screen, tex, sr.level); + trans->offset = r300_texture_get_offset(tex, sr.level, box->z, sr.face); + } + } + return &trans->transfer; +} + +void r300_texture_transfer_destroy(struct pipe_context *ctx, + struct pipe_transfer *trans) +{ + struct r300_transfer *r300transfer = r300_transfer(trans); + + if (r300transfer->detiled_texture) { + if (trans->usage & PIPE_TRANSFER_WRITE) { + r300_copy_into_tiled_texture(ctx, r300transfer); + } + + pipe_resource_reference( + (struct pipe_resource**)&r300transfer->detiled_texture, NULL); + } + pipe_resource_reference(&trans->resource, NULL); + FREE(trans); +} + +void* r300_texture_transfer_map(struct pipe_context *ctx, + struct pipe_transfer *transfer) +{ + struct r300_winsys_screen *rws = (struct r300_winsys_screen *)ctx->winsys; + struct r300_transfer *r300transfer = r300_transfer(transfer); + struct r300_texture *tex = r300_texture(transfer->resource); + char *map; + enum pipe_format format = tex->b.b.format; + + if (r300transfer->detiled_texture) { + /* The detiled texture is of the same size as the region being mapped + * (no offset needed). */ + return rws->buffer_map(rws, + r300transfer->detiled_texture->buffer, + transfer->usage); + } else { + /* Tiling is disabled. */ + map = rws->buffer_map(rws, tex->buffer, + transfer->usage); + + if (!map) { + return NULL; + } + + return map + r300_transfer(transfer)->offset + + transfer->box.y / util_format_get_blockheight(format) * transfer->stride + + transfer->box.x / util_format_get_blockwidth(format) * util_format_get_blocksize(format); + } +} + +void r300_texture_transfer_unmap(struct pipe_context *ctx, + struct pipe_transfer *transfer) +{ + struct r300_winsys_screen *rws = (struct r300_winsys_screen *)ctx->winsys; + struct r300_transfer *r300transfer = r300_transfer(transfer); + struct r300_texture *tex = r300_texture(transfer->resource); + + if (r300transfer->detiled_texture) { + rws->buffer_unmap(rws, r300transfer->detiled_texture->buffer); + } else { + rws->buffer_unmap(rws, tex->buffer); + } +} + diff --git a/src/gallium/drivers/r300/r300_transfer.h b/src/gallium/drivers/r300/r300_transfer.h new file mode 100644 index 00000000000..d72e54e5ed9 --- /dev/null +++ b/src/gallium/drivers/r300/r300_transfer.h @@ -0,0 +1,51 @@ +/* + * Copyright 2008 Corbin Simpson <[email protected]> + * Copyright 2010 Marek Olšák <[email protected]> + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. */ + +#ifndef R300_TRANSFER +#define R300_TRANSFER + +#include "pipe/p_screen.h" + +struct r300_context; + +struct pipe_transfer* +r300_texture_get_transfer(struct pipe_context *ctx, + struct pipe_resource *texture, + struct pipe_subresource sr, + unsigned usage, + const struct pipe_box *box); + +void +r300_texture_transfer_destroy(struct pipe_context *ctx, + struct pipe_transfer *trans); + +void* +r300_texture_transfer_map(struct pipe_context *ctx, + struct pipe_transfer *transfer); + +void +r300_texture_transfer_unmap(struct pipe_context *ctx, + struct pipe_transfer *transfer); + + +#endif diff --git a/src/gallium/drivers/r300/r300_vs.c b/src/gallium/drivers/r300/r300_vs.c index 60a04bbfeda..bfab9c3b014 100644 --- a/src/gallium/drivers/r300/r300_vs.c +++ b/src/gallium/drivers/r300/r300_vs.c @@ -31,11 +31,10 @@ #include "tgsi/tgsi_dump.h" #include "tgsi/tgsi_parse.h" +#include "tgsi/tgsi_ureg.h" #include "radeon_compiler.h" -#include "util/u_math.h" - /* Convert info about VS output semantics into r300_shader_semantics. */ static void r300_shader_read_vs_outputs( struct tgsi_shader_info* info, @@ -82,102 +81,49 @@ static void r300_shader_read_vs_outputs( case TGSI_SEMANTIC_EDGEFLAG: assert(index == 0); - fprintf(stderr, "r300 VP: cannot handle edgeflag output\n"); - assert(0); + fprintf(stderr, "r300 VP: cannot handle edgeflag output.\n"); break; + default: - assert(0); + fprintf(stderr, "r300 VP: unknown vertex output semantic: %i.\n", + info->output_semantic_name[i]); } } + + /* WPOS is a straight copy of POSITION and it's always emitted. */ + vs_outputs->wpos = i; } -static void r300_shader_vap_output_fmt(struct r300_vertex_shader* vs) +/* This function sets up: + * - VAP mapping, which maps VS registers to output semantics and + * at the same time it indicates which attributes are enabled and should + * be rasterized. + * - Stream mapping to VS outputs if TCL is not present. */ +static void r300_init_vs_output_mapping(struct r300_vertex_shader* vs) { struct r300_shader_semantics* vs_outputs = &vs->outputs; - uint32_t* hwfmt = vs->hwfmt; - int i, gen_count; + struct r300_vap_output_state *vap_out = &vs->vap_out; + int *stream_loc = vs->stream_loc_notcl; + int i, gen_count, tabi = 0; boolean any_bcolor_used = vs_outputs->bcolor[0] != ATTR_UNUSED || vs_outputs->bcolor[1] != ATTR_UNUSED; - /* Do the actual vertex_info setup. - * - * vertex_info has four uints of hardware-specific data in it. - * vinfo.hwfmt[0] is R300_VAP_VTX_STATE_CNTL - * vinfo.hwfmt[1] is R300_VAP_VSM_VTX_ASSM - * vinfo.hwfmt[2] is R300_VAP_OUTPUT_VTX_FMT_0 - * vinfo.hwfmt[3] is R300_VAP_OUTPUT_VTX_FMT_1 */ - - hwfmt[0] = 0x5555; /* XXX this is classic Mesa bonghits */ + vap_out->vap_vtx_state_cntl = 0x5555; /* XXX this is classic Mesa bonghits */ /* Position. */ if (vs_outputs->pos != ATTR_UNUSED) { - hwfmt[1] |= R300_INPUT_CNTL_POS; - hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT; + vap_out->vap_vsm_vtx_assm |= R300_INPUT_CNTL_POS; + vap_out->vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__POS_PRESENT; + + stream_loc[tabi++] = 0; } else { assert(0); } /* Point size. */ if (vs_outputs->psize != ATTR_UNUSED) { - hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT; - } - - /* Colors. */ - for (i = 0; i < ATTR_COLOR_COUNT; i++) { - if (vs_outputs->color[i] != ATTR_UNUSED || any_bcolor_used || - vs_outputs->color[1] != ATTR_UNUSED) { - hwfmt[1] |= R300_INPUT_CNTL_COLOR; - hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i; - } - } - - /* Back-face colors. */ - if (any_bcolor_used) { - for (i = 0; i < ATTR_COLOR_COUNT; i++) { - hwfmt[1] |= R300_INPUT_CNTL_COLOR; - hwfmt[2] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << (2+i); - } - } + vap_out->vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__PT_SIZE_PRESENT; - /* Texture coordinates. */ - gen_count = 0; - for (i = 0; i < ATTR_GENERIC_COUNT; i++) { - if (vs_outputs->generic[i] != ATTR_UNUSED) { - hwfmt[1] |= (R300_INPUT_CNTL_TC0 << gen_count); - hwfmt[3] |= (4 << (3 * gen_count)); - gen_count++; - } - } - - /* Fog coordinates. */ - if (vs_outputs->fog != ATTR_UNUSED) { - hwfmt[1] |= (R300_INPUT_CNTL_TC0 << gen_count); - hwfmt[3] |= (4 << (3 * gen_count)); - gen_count++; - } - - /* XXX magic */ - assert(gen_count <= 8); - - /* WPOS. */ - vs->wpos_tex_output = gen_count; -} - -/* Sets up stream mapping to equivalent VS outputs if TCL is bypassed - * or isn't present. */ -static void r300_stream_locations_notcl( - struct r300_shader_semantics* vs_outputs, - int* stream_loc) -{ - int i, tabi = 0, gen_count; - boolean any_bcolor_used = vs_outputs->bcolor[0] != ATTR_UNUSED || - vs_outputs->bcolor[1] != ATTR_UNUSED; - - /* Position. */ - stream_loc[tabi++] = 0; - - /* Point size. */ - if (vs_outputs->psize != ATTR_UNUSED) { stream_loc[tabi++] = 1; } @@ -185,6 +131,9 @@ static void r300_stream_locations_notcl( for (i = 0; i < ATTR_COLOR_COUNT; i++) { if (vs_outputs->color[i] != ATTR_UNUSED || any_bcolor_used || vs_outputs->color[1] != ATTR_UNUSED) { + vap_out->vap_vsm_vtx_assm |= R300_INPUT_CNTL_COLOR; + vap_out->vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << i; + stream_loc[tabi++] = 2 + i; } } @@ -192,32 +141,40 @@ static void r300_stream_locations_notcl( /* Back-face colors. */ if (any_bcolor_used) { for (i = 0; i < ATTR_COLOR_COUNT; i++) { + vap_out->vap_vsm_vtx_assm |= R300_INPUT_CNTL_COLOR; + vap_out->vap_out_vtx_fmt[0] |= R300_VAP_OUTPUT_VTX_FMT_0__COLOR_0_PRESENT << (2+i); + stream_loc[tabi++] = 4 + i; } } /* Texture coordinates. */ gen_count = 0; - for (i = 0; i < ATTR_GENERIC_COUNT; i++) { + for (i = 0; i < ATTR_GENERIC_COUNT && gen_count < 8; i++) { if (vs_outputs->generic[i] != ATTR_UNUSED) { - assert(tabi < 16); + vap_out->vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << gen_count); + vap_out->vap_out_vtx_fmt[1] |= (4 << (3 * gen_count)); + stream_loc[tabi++] = 6 + gen_count; gen_count++; } } /* Fog coordinates. */ - if (vs_outputs->fog != ATTR_UNUSED) { - assert(tabi < 16); + if (gen_count < 8 && vs_outputs->fog != ATTR_UNUSED) { + vap_out->vap_vsm_vtx_assm |= (R300_INPUT_CNTL_TC0 << gen_count); + vap_out->vap_out_vtx_fmt[1] |= (4 << (3 * gen_count)); + stream_loc[tabi++] = 6 + gen_count; gen_count++; } /* WPOS. */ - if (vs_outputs->wpos != ATTR_UNUSED) { - assert(tabi < 16); + if (gen_count < 8) { + vs->wpos_tex_output = gen_count; stream_loc[tabi++] = 6 + gen_count; - gen_count++; + } else { + vs_outputs->wpos = ATTR_UNUSED; } for (; tabi < 16;) { @@ -294,36 +251,42 @@ static void set_vertex_inputs_outputs(struct r300_vertex_program_compiler * c) } } -static void r300_insert_wpos(struct r300_vertex_program_compiler* c, - struct r300_shader_semantics* outputs) +static void r300_dummy_vertex_shader( + struct r300_context* r300, + struct r300_vertex_shader* shader) { - int i, lastOutput = 0; + struct pipe_shader_state state; + struct ureg_program *ureg; + struct ureg_dst dst; + struct ureg_src imm; - /* Find the max output index. */ - lastOutput = MAX2(lastOutput, outputs->psize); - for (i = 0; i < ATTR_COLOR_COUNT; i++) { - lastOutput = MAX2(lastOutput, outputs->color[i]); - lastOutput = MAX2(lastOutput, outputs->bcolor[i]); - } - for (i = 0; i < ATTR_GENERIC_COUNT; i++) { - lastOutput = MAX2(lastOutput, outputs->generic[i]); - } - lastOutput = MAX2(lastOutput, outputs->fog); + /* Make a simple vertex shader which outputs (0, 0, 0, 1), + * effectively rendering nothing. */ + ureg = ureg_create(TGSI_PROCESSOR_VERTEX); + dst = ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0); + imm = ureg_imm4f(ureg, 0, 0, 0, 1); + + ureg_MOV(ureg, dst, imm); + ureg_END(ureg); - /* Set WPOS after the last output. */ - lastOutput++; - rc_copy_output(&c->Base, 0, lastOutput); /* out[lastOutput] = out[0]; */ - outputs->wpos = lastOutput; + state.tokens = ureg_finalize(ureg); + + shader->dummy = TRUE; + r300_translate_vertex_shader(r300, shader, state.tokens); + + ureg_destroy(ureg); } void r300_translate_vertex_shader(struct r300_context* r300, - struct r300_vertex_shader* vs) + struct r300_vertex_shader* vs, + const struct tgsi_token *tokens) { struct r300_vertex_program_compiler compiler; struct tgsi_to_rc ttr; - /* Initialize. */ + tgsi_scan_shader(tokens, &vs->info); r300_shader_read_vs_outputs(&vs->info, &vs->outputs); + r300_init_vs_output_mapping(vs); /* Setup the compiler */ rc_init(&compiler.Base); @@ -334,7 +297,7 @@ void r300_translate_vertex_shader(struct r300_context* r300, if (compiler.Base.Debug) { debug_printf("r300: Initial vertex program\n"); - tgsi_dump(vs->state.tokens, 0); + tgsi_dump(tokens, 0); } /* Translate TGSI to our internal representation */ @@ -342,51 +305,68 @@ void r300_translate_vertex_shader(struct r300_context* r300, ttr.info = &vs->info; ttr.use_half_swizzles = FALSE; - r300_tgsi_to_rc(&ttr, vs->state.tokens); + r300_tgsi_to_rc(&ttr, tokens); + + compiler.RequiredOutputs = + ~(~0 << (vs->info.num_outputs + + (vs->outputs.wpos != ATTR_UNUSED ? 1 : 0))); - compiler.RequiredOutputs = ~(~0 << (vs->info.num_outputs+1)); compiler.SetHwInputOutput = &set_vertex_inputs_outputs; /* Insert the WPOS output. */ - r300_insert_wpos(&compiler, &vs->outputs); - - r300_shader_vap_output_fmt(vs); - r300_stream_locations_notcl(&vs->outputs, vs->stream_loc_notcl); + if (vs->outputs.wpos != ATTR_UNUSED) { + rc_copy_output(&compiler.Base, 0, vs->outputs.wpos); + } /* Invoke the compiler */ r3xx_compile_vertex_program(&compiler); if (compiler.Base.Error) { /* XXX We should fallback using Draw. */ - fprintf(stderr, "r300 VP: Compiler error\n"); - abort(); + fprintf(stderr, "r300 VP: Compiler error:\n%sUsing a dummy shader" + " instead.\n", compiler.Base.ErrorMsg); + + if (vs->dummy) { + fprintf(stderr, "r300 VP: Cannot compile the dummy shader! " + "Giving up...\n"); + abort(); + } + + rc_destroy(&compiler.Base); + r300_dummy_vertex_shader(r300, vs); + return; } + /* Initialize numbers of constants for each type. */ + vs->externals_count = ttr.immediate_offset; + vs->immediates_count = vs->code.constants.Count - vs->externals_count; + /* And, finally... */ rc_destroy(&compiler.Base); - vs->translated = TRUE; } boolean r300_vertex_shader_setup_wpos(struct r300_context* r300) { struct r300_vertex_shader* vs = r300->vs_state.state; + struct r300_vap_output_state *vap_out = &vs->vap_out; int tex_output = vs->wpos_tex_output; uint32_t tex_fmt = R300_INPUT_CNTL_TC0 << tex_output; - uint32_t* hwfmt = vs->hwfmt; - if (r300->fs->inputs.wpos != ATTR_UNUSED) { - /* Enable WPOS in VAP. */ - if (!(hwfmt[1] & tex_fmt)) { - hwfmt[1] |= tex_fmt; - hwfmt[3] |= (4 << (3 * tex_output)); + if (vs->outputs.wpos == ATTR_UNUSED) { + return FALSE; + } - assert(tex_output < 8); + if (r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) { + /* Enable WPOS in VAP. */ + if (!(vap_out->vap_vsm_vtx_assm & tex_fmt)) { + vap_out->vap_vsm_vtx_assm |= tex_fmt; + vap_out->vap_out_vtx_fmt[1] |= (4 << (3 * tex_output)); return TRUE; } } else { /* Disable WPOS in VAP. */ - if (hwfmt[1] & tex_fmt) { - hwfmt[1] &= ~tex_fmt; - hwfmt[3] &= ~(4 << (3 * tex_output)); + if (vap_out->vap_vsm_vtx_assm & tex_fmt) { + vap_out->vap_vsm_vtx_assm &= ~tex_fmt; + vap_out->vap_out_vtx_fmt[1] &= ~(4 << (3 * tex_output)); return TRUE; } } diff --git a/src/gallium/drivers/r300/r300_vs.h b/src/gallium/drivers/r300/r300_vs.h index 18cfeee3cd4..56bcc3b70b8 100644 --- a/src/gallium/drivers/r300/r300_vs.h +++ b/src/gallium/drivers/r300/r300_vs.h @@ -28,6 +28,7 @@ #include "tgsi/tgsi_scan.h" #include "radeon_code.h" +#include "r300_context.h" #include "r300_shader_semantics.h" struct r300_context; @@ -38,7 +39,15 @@ struct r300_vertex_shader { struct tgsi_shader_info info; struct r300_shader_semantics outputs; - uint hwfmt[4]; + struct r300_vap_output_state vap_out; + + /* Whether the shader was replaced by a dummy one due to a shader + * compilation failure. */ + boolean dummy; + + /* Numbers of constants for each type. */ + unsigned externals_count; + unsigned immediates_count; /* Stream locations for SWTCL or if TCL is bypassed. */ int stream_loc_notcl[16]; @@ -46,15 +55,17 @@ struct r300_vertex_shader { /* Output stream location for WPOS. */ int wpos_tex_output; - /* Has this shader been translated yet? */ - boolean translated; - + /* HWTCL-specific. */ /* Machine code (if translated) */ struct r300_vertex_program_code code; + + /* SWTCL-specific. */ + void *draw_vs; }; void r300_translate_vertex_shader(struct r300_context* r300, - struct r300_vertex_shader* vs); + struct r300_vertex_shader* vs, + const struct tgsi_token *tokens); /* Return TRUE if VAP (hwfmt) needs to be re-emitted. */ boolean r300_vertex_shader_setup_wpos(struct r300_context* r300); diff --git a/src/gallium/drivers/r300/r300_winsys.h b/src/gallium/drivers/r300/r300_winsys.h index 40fb8a95ca5..1642981eaa8 100644 --- a/src/gallium/drivers/r300/r300_winsys.h +++ b/src/gallium/drivers/r300/r300_winsys.h @@ -23,10 +23,6 @@ #ifndef R300_WINSYS_H #define R300_WINSYS_H -#ifdef __cplusplus -extern "C" { -#endif - /* The public interface header for the r300 pipe driver. * Any winsys hosting this pipe needs to implement r300_winsys and then * call r300_create_screen to start things. */ @@ -34,19 +30,153 @@ extern "C" { #include "pipe/p_defines.h" #include "pipe/p_state.h" -struct radeon_winsys; +#include "r300_defines.h" -/* Creates a new r300 screen. */ -struct pipe_screen* r300_create_screen(struct radeon_winsys* radeon_winsys); +struct r300_winsys_buffer; + +enum r300_value_id { + R300_VID_PCI_ID, + R300_VID_GB_PIPES, + R300_VID_Z_PIPES, + R300_VID_SQUARE_TILING_SUPPORT, + R300_VID_DRM_2_3_0, +}; + +enum r300_reference_domain { /* bitfield */ + R300_REF_CS = 1, + R300_REF_HW = 2 +}; + +struct r300_winsys_screen { + void (*destroy)(struct r300_winsys_screen *ws); + + /** + * Buffer management. Buffer attributes are mostly fixed over its lifetime. + * + * Remember that gallium gets to choose the interface it needs, and the + * window systems must then implement that interface (rather than the + * other way around...). + * + * usage is a bitmask of R300_WINSYS_BUFFER_USAGE_PIXEL/VERTEX/INDEX/CONSTANT. This + * usage argument is only an optimization hint, not a guarantee, therefore + * proper behavior must be observed in all circumstances. + * + * alignment indicates the client's alignment requirements, eg for + * SSE instructions. + */ + struct r300_winsys_buffer *(*buffer_create)(struct r300_winsys_screen *ws, + unsigned alignment, + unsigned usage, + unsigned size); + + /** + * Map the entire data store of a buffer object into the client's address. + * flags is bitmask of R300_WINSYS_BUFFER_USAGE_CPU_READ/WRITE flags. + */ + void *(*buffer_map)( struct r300_winsys_screen *ws, + struct r300_winsys_buffer *buf, + unsigned usage); + + void (*buffer_unmap)( struct r300_winsys_screen *ws, + struct r300_winsys_buffer *buf ); + + void (*buffer_destroy)( struct r300_winsys_buffer *buf ); + + + void (*buffer_reference)(struct r300_winsys_screen *rws, + struct r300_winsys_buffer **pdst, + struct r300_winsys_buffer *src); + + boolean (*buffer_references)(struct r300_winsys_buffer *a, + struct r300_winsys_buffer *b); + + void (*buffer_flush_range)(struct r300_winsys_screen *rws, + struct r300_winsys_buffer *buf, + unsigned offset, + unsigned length); + + /* Add a pipe_resource to the list of buffer objects to validate. */ + boolean (*add_buffer)(struct r300_winsys_screen *winsys, + struct r300_winsys_buffer *buf, + uint32_t rd, + uint32_t wd); + + + /* Revalidate all currently setup pipe_buffers. + * Returns TRUE if a flush is required. */ + boolean (*validate)(struct r300_winsys_screen* winsys); + /* Check to see if there's room for commands. */ + boolean (*check_cs)(struct r300_winsys_screen* winsys, int size); -boolean r300_get_texture_buffer(struct pipe_screen* screen, - struct pipe_texture* texture, - struct pipe_buffer** buffer, - unsigned* stride); + /* Start a command emit. */ + void (*begin_cs)(struct r300_winsys_screen* winsys, + int size, + const char* file, + const char* function, + int line); -#ifdef __cplusplus -} -#endif + /* Write a dword to the command buffer. */ + void (*write_cs_dword)(struct r300_winsys_screen* winsys, uint32_t dword); + + /* Write a table of dwords to the command buffer. */ + void (*write_cs_table)(struct r300_winsys_screen* winsys, + const void *dwords, unsigned count); + + /* Write a relocated dword to the command buffer. */ + void (*write_cs_reloc)(struct r300_winsys_screen *winsys, + struct r300_winsys_buffer *buf, + uint32_t rd, + uint32_t wd, + uint32_t flags); + + /* Finish a command emit. */ + void (*end_cs)(struct r300_winsys_screen* winsys, + const char* file, + const char* function, + int line); + + /* Flush the CS. */ + void (*flush_cs)(struct r300_winsys_screen* winsys); + + /* winsys flush - callback from winsys when flush required */ + void (*set_flush_cb)(struct r300_winsys_screen *winsys, + void (*flush_cb)(void *), void *data); + + void (*reset_bos)(struct r300_winsys_screen *winsys); + + void (*buffer_get_tiling)(struct r300_winsys_screen *winsys, + struct r300_winsys_buffer *buffer, + enum r300_buffer_tiling *microtiled, + enum r300_buffer_tiling *macrotiled); + + void (*buffer_set_tiling)(struct r300_winsys_screen *winsys, + struct r300_winsys_buffer *buffer, + uint32_t pitch, + enum r300_buffer_tiling microtiled, + enum r300_buffer_tiling macrotiled); + + uint32_t (*get_value)(struct r300_winsys_screen *winsys, + enum r300_value_id vid); + + struct r300_winsys_buffer *(*buffer_from_handle)(struct r300_winsys_screen *winsys, + struct pipe_screen *screen, + struct winsys_handle *whandle, + unsigned *stride); + boolean (*buffer_get_handle)(struct r300_winsys_screen *winsys, + struct r300_winsys_buffer *buffer, + unsigned stride, + struct winsys_handle *whandle); + + boolean (*is_buffer_referenced)(struct r300_winsys_screen *winsys, + struct r300_winsys_buffer *buffer, + enum r300_reference_domain domain); +}; + +struct r300_winsys_screen * +r300_winsys_screen(struct pipe_screen *screen); + +/* Creates a new r300 screen. */ +struct pipe_screen* r300_create_screen(struct r300_winsys_screen *rws); #endif /* R300_WINSYS_H */ diff --git a/src/gallium/drivers/softpipe/Makefile b/src/gallium/drivers/softpipe/Makefile index e4ac49fa85f..83f3e4a19b6 100644 --- a/src/gallium/drivers/softpipe/Makefile +++ b/src/gallium/drivers/softpipe/Makefile @@ -7,6 +7,7 @@ C_SOURCES = \ sp_fs_exec.c \ sp_fs_sse.c \ sp_clear.c \ + sp_fence.c \ sp_flush.c \ sp_query.c \ sp_context.c \ @@ -31,8 +32,6 @@ C_SOURCES = \ sp_tex_sample.c \ sp_tex_tile_cache.c \ sp_tile_cache.c \ - sp_surface.c \ - sp_video_context.c \ - sp_winsys.c + sp_surface.c include ../../Makefile.template diff --git a/src/gallium/drivers/softpipe/SConscript b/src/gallium/drivers/softpipe/SConscript index 3042e556c64..b80c6dea93a 100644 --- a/src/gallium/drivers/softpipe/SConscript +++ b/src/gallium/drivers/softpipe/SConscript @@ -10,6 +10,7 @@ softpipe = env.ConvenienceLibrary( 'sp_clear.c', 'sp_context.c', 'sp_draw_arrays.c', + 'sp_fence.c', 'sp_flush.c', 'sp_prim_vbuf.c', 'sp_setup.c', @@ -33,8 +34,6 @@ softpipe = env.ConvenienceLibrary( 'sp_tex_tile_cache.c', 'sp_texture.c', 'sp_tile_cache.c', - 'sp_video_context.c', - 'sp_winsys.c' ]) Export('softpipe') diff --git a/src/gallium/drivers/softpipe/sp_clear.c b/src/gallium/drivers/softpipe/sp_clear.c index 5f130453c39..ae3f00f3387 100644 --- a/src/gallium/drivers/softpipe/sp_clear.c +++ b/src/gallium/drivers/softpipe/sp_clear.c @@ -69,11 +69,6 @@ softpipe_clear(struct pipe_context *pipe, unsigned buffers, const float *rgba, util_pack_color(rgba, ps->format, &uc); sp_tile_cache_clear(softpipe->cbuf_cache[i], rgba, uc.ui); - -#if !TILE_CLEAR_OPTIMIZATION - /* non-cached surface */ - pipe->surface_fill(pipe, ps, 0, 0, ps->width, ps->height, uc.ui); -#endif } } @@ -83,11 +78,6 @@ softpipe_clear(struct pipe_context *pipe, unsigned buffers, const float *rgba, cv = util_pack_z_stencil(ps->format, depth, stencil); sp_tile_cache_clear(softpipe->zsbuf_cache, zero, cv); - -#if !TILE_CLEAR_OPTIMIZATION - /* non-cached surface */ - pipe->surface_fill(pipe, ps, 0, 0, ps->width, ps->height, cv); -#endif } softpipe->dirty_render_cache = TRUE; diff --git a/src/gallium/drivers/softpipe/sp_context.c b/src/gallium/drivers/softpipe/sp_context.c index ddc35bcd629..f6e2b80d46e 100644 --- a/src/gallium/drivers/softpipe/sp_context.c +++ b/src/gallium/drivers/softpipe/sp_context.c @@ -44,6 +44,7 @@ #include "sp_surface.h" #include "sp_tile_cache.h" #include "sp_tex_tile_cache.h" +#include "sp_texture.h" #include "sp_query.h" @@ -92,6 +93,7 @@ softpipe_destroy( struct pipe_context *pipe ) softpipe->quad.shade->destroy( softpipe->quad.shade ); softpipe->quad.depth_test->destroy( softpipe->quad.depth_test ); softpipe->quad.blend->destroy( softpipe->quad.blend ); + softpipe->quad.pstipple->destroy( softpipe->quad.pstipple ); for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) { sp_destroy_tile_cache(softpipe->cbuf_cache[i]); @@ -103,12 +105,12 @@ softpipe_destroy( struct pipe_context *pipe ) for (i = 0; i < PIPE_MAX_SAMPLERS; i++) { sp_destroy_tex_tile_cache(softpipe->tex_cache[i]); - pipe_texture_reference(&softpipe->texture[i], NULL); + pipe_sampler_view_reference(&softpipe->sampler_views[i], NULL); } for (i = 0; i < PIPE_MAX_VERTEX_SAMPLERS; i++) { sp_destroy_tex_tile_cache(softpipe->vertex_tex_cache[i]); - pipe_texture_reference(&softpipe->vertex_textures[i], NULL); + pipe_sampler_view_reference(&softpipe->vertex_sampler_views[i], NULL); } for (i = 0; i < PIPE_SHADER_TYPES; i++) { @@ -116,7 +118,7 @@ softpipe_destroy( struct pipe_context *pipe ) for (j = 0; j < PIPE_MAX_CONSTANT_BUFFERS; j++) { if (softpipe->constants[i][j]) { - pipe_buffer_reference(&softpipe->constants[i][j], NULL); + pipe_resource_reference(&softpipe->constants[i][j], NULL); } } } @@ -134,13 +136,16 @@ softpipe_destroy( struct pipe_context *pipe ) * return PIPE_UNREFERENCED */ static unsigned int -softpipe_is_texture_referenced( struct pipe_context *pipe, - struct pipe_texture *texture, +softpipe_is_resource_referenced( struct pipe_context *pipe, + struct pipe_resource *texture, unsigned face, unsigned level) { struct softpipe_context *softpipe = softpipe_context( pipe ); unsigned i; + if (texture->target == PIPE_BUFFER) + return PIPE_UNREFERENCED; + /* check if any of the bound drawing surfaces are this texture */ if (softpipe->dirty_render_cache) { for (i = 0; i < softpipe->framebuffer.nr_cbufs; i++) { @@ -171,12 +176,6 @@ softpipe_is_texture_referenced( struct pipe_context *pipe, } -static unsigned int -softpipe_is_buffer_referenced( struct pipe_context *pipe, - struct pipe_buffer *buf) -{ - return PIPE_UNREFERENCED; -} static void @@ -210,7 +209,7 @@ softpipe_create_context( struct pipe_screen *screen, softpipe->dump_fs = debug_get_bool_option( "GALLIUM_DUMP_FS", FALSE ); softpipe->dump_gs = debug_get_bool_option( "SOFTPIPE_DUMP_GS", FALSE ); - softpipe->pipe.winsys = screen->winsys; + softpipe->pipe.winsys = NULL; softpipe->pipe.screen = screen; softpipe->pipe.destroy = softpipe_destroy; softpipe->pipe.priv = priv; @@ -245,6 +244,10 @@ softpipe_create_context( struct pipe_screen *screen, softpipe->pipe.bind_gs_state = softpipe_bind_gs_state; softpipe->pipe.delete_gs_state = softpipe_delete_gs_state; + softpipe->pipe.create_vertex_elements_state = softpipe_create_vertex_elements_state; + softpipe->pipe.bind_vertex_elements_state = softpipe_bind_vertex_elements_state; + softpipe->pipe.delete_vertex_elements_state = softpipe_delete_vertex_elements_state; + softpipe->pipe.set_blend_color = softpipe_set_blend_color; softpipe->pipe.set_stencil_ref = softpipe_set_stencil_ref; softpipe->pipe.set_clip_state = softpipe_set_clip_state; @@ -252,12 +255,13 @@ softpipe_create_context( struct pipe_screen *screen, softpipe->pipe.set_framebuffer_state = softpipe_set_framebuffer_state; softpipe->pipe.set_polygon_stipple = softpipe_set_polygon_stipple; softpipe->pipe.set_scissor_state = softpipe_set_scissor_state; - softpipe->pipe.set_fragment_sampler_textures = softpipe_set_sampler_textures; - softpipe->pipe.set_vertex_sampler_textures = softpipe_set_vertex_sampler_textures; + softpipe->pipe.set_fragment_sampler_views = softpipe_set_sampler_views; + softpipe->pipe.set_vertex_sampler_views = softpipe_set_vertex_sampler_views; + softpipe->pipe.create_sampler_view = softpipe_create_sampler_view; + softpipe->pipe.sampler_view_destroy = softpipe_sampler_view_destroy; softpipe->pipe.set_viewport_state = softpipe_set_viewport_state; softpipe->pipe.set_vertex_buffers = softpipe_set_vertex_buffers; - softpipe->pipe.set_vertex_elements = softpipe_set_vertex_elements; softpipe->pipe.draw_arrays = softpipe_draw_arrays; softpipe->pipe.draw_elements = softpipe_draw_elements; @@ -268,10 +272,10 @@ softpipe_create_context( struct pipe_screen *screen, softpipe->pipe.clear = softpipe_clear; softpipe->pipe.flush = softpipe_flush; - softpipe->pipe.is_texture_referenced = softpipe_is_texture_referenced; - softpipe->pipe.is_buffer_referenced = softpipe_is_buffer_referenced; + softpipe->pipe.is_resource_referenced = softpipe_is_resource_referenced; softpipe_init_query_funcs( softpipe ); + softpipe_init_texture_funcs( &softpipe->pipe ); softpipe->pipe.render_condition = softpipe_render_condition; @@ -280,25 +284,26 @@ softpipe_create_context( struct pipe_screen *screen, * Must be before quad stage setup! */ for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) - softpipe->cbuf_cache[i] = sp_create_tile_cache( screen ); - softpipe->zsbuf_cache = sp_create_tile_cache( screen ); + softpipe->cbuf_cache[i] = sp_create_tile_cache( &softpipe->pipe ); + softpipe->zsbuf_cache = sp_create_tile_cache( &softpipe->pipe ); for (i = 0; i < PIPE_MAX_SAMPLERS; i++) - softpipe->tex_cache[i] = sp_create_tex_tile_cache( screen ); + softpipe->tex_cache[i] = sp_create_tex_tile_cache( &softpipe->pipe ); for (i = 0; i < PIPE_MAX_VERTEX_SAMPLERS; i++) { - softpipe->vertex_tex_cache[i] = sp_create_tex_tile_cache(screen); + softpipe->vertex_tex_cache[i] = sp_create_tex_tile_cache( &softpipe->pipe ); } /* setup quad rendering stages */ softpipe->quad.shade = sp_quad_shade_stage(softpipe); softpipe->quad.depth_test = sp_quad_depth_test_stage(softpipe); softpipe->quad.blend = sp_quad_blend_stage(softpipe); + softpipe->quad.pstipple = sp_quad_polygon_stipple_stage(softpipe); /* * Create drawing context and plug our rendering stage into it. */ - softpipe->draw = draw_create(); + softpipe->draw = draw_create(&softpipe->pipe); if (!softpipe->draw) goto fail; @@ -327,7 +332,11 @@ softpipe_create_context( struct pipe_screen *screen, draw_install_aapoint_stage(softpipe->draw, &softpipe->pipe); /* Do polygon stipple w/ texture map + frag prog? */ +#if DO_PSTIPPLE_IN_DRAW_MODULE draw_install_pstipple_stage(softpipe->draw, &softpipe->pipe); +#endif + + draw_wide_point_sprites(softpipe->draw, TRUE); sp_init_surface_functions(softpipe); diff --git a/src/gallium/drivers/softpipe/sp_context.h b/src/gallium/drivers/softpipe/sp_context.h index 95def72c541..92607874b60 100644 --- a/src/gallium/drivers/softpipe/sp_context.h +++ b/src/gallium/drivers/softpipe/sp_context.h @@ -38,6 +38,10 @@ #include "sp_quad_pipe.h" +/** Do polygon stipple in the driver here, or in the draw module? */ +#define DO_PSTIPPLE_IN_DRAW_MODULE 1 + + struct softpipe_vbuf_render; struct draw_context; struct draw_stage; @@ -45,6 +49,7 @@ struct softpipe_tile_cache; struct softpipe_tex_tile_cache; struct sp_fragment_shader; struct sp_vertex_shader; +struct sp_velems_state; struct softpipe_context { @@ -59,26 +64,25 @@ struct softpipe_context { struct sp_fragment_shader *fs; struct sp_vertex_shader *vs; struct sp_geometry_shader *gs; + struct sp_velems_state *velems; /** Other rendering state */ struct pipe_blend_color blend_color; struct pipe_stencil_ref stencil_ref; struct pipe_clip_state clip; - struct pipe_buffer *constants[PIPE_SHADER_TYPES][PIPE_MAX_CONSTANT_BUFFERS]; + struct pipe_resource *constants[PIPE_SHADER_TYPES][PIPE_MAX_CONSTANT_BUFFERS]; struct pipe_framebuffer_state framebuffer; struct pipe_poly_stipple poly_stipple; struct pipe_scissor_state scissor; - struct pipe_texture *texture[PIPE_MAX_SAMPLERS]; - struct pipe_texture *vertex_textures[PIPE_MAX_VERTEX_SAMPLERS]; + struct pipe_sampler_view *sampler_views[PIPE_MAX_SAMPLERS]; + struct pipe_sampler_view *vertex_sampler_views[PIPE_MAX_VERTEX_SAMPLERS]; struct pipe_viewport_state viewport; struct pipe_vertex_buffer vertex_buffer[PIPE_MAX_ATTRIBS]; - struct pipe_vertex_element vertex_element[PIPE_MAX_ATTRIBS]; unsigned num_samplers; - unsigned num_textures; + unsigned num_sampler_views; unsigned num_vertex_samplers; - unsigned num_vertex_textures; - unsigned num_vertex_elements; + unsigned num_vertex_sampler_views; unsigned num_vertex_buffers; unsigned dirty; /**< Mask of SP_NEW_x flags */ @@ -93,7 +97,7 @@ struct softpipe_context { ubyte *mapped_vbuffer[PIPE_MAX_ATTRIBS]; /** Mapped constant buffers */ - void *mapped_constants[PIPE_SHADER_TYPES][PIPE_MAX_CONSTANT_BUFFERS]; + const void *mapped_constants[PIPE_SHADER_TYPES][PIPE_MAX_CONSTANT_BUFFERS]; /** Vertex format */ struct vertex_info vertex_info; @@ -126,6 +130,7 @@ struct softpipe_context { struct quad_stage *shade; struct quad_stage *depth_test; struct quad_stage *blend; + struct quad_stage *pstipple; struct quad_stage *first; /**< points to one of the above stages */ } quad; diff --git a/src/gallium/drivers/softpipe/sp_draw_arrays.c b/src/gallium/drivers/softpipe/sp_draw_arrays.c index b2acc36bf7a..b30036e2303 100644 --- a/src/gallium/drivers/softpipe/sp_draw_arrays.c +++ b/src/gallium/drivers/softpipe/sp_draw_arrays.c @@ -33,90 +33,19 @@ #include "pipe/p_defines.h" #include "pipe/p_context.h" -#include "util/u_simple_screen.h" #include "util/u_inlines.h" #include "util/u_prim.h" #include "sp_context.h" #include "sp_query.h" #include "sp_state.h" +#include "sp_texture.h" #include "draw/draw_context.h" -static void -softpipe_map_constant_buffers(struct softpipe_context *sp) -{ - struct pipe_winsys *ws = sp->pipe.winsys; - uint i; - - for (i = 0; i < PIPE_SHADER_TYPES; i++) { - uint j; - - for (j = 0; j < PIPE_MAX_CONSTANT_BUFFERS; j++) { - if (sp->constants[i][j] && sp->constants[i][j]->size) { - sp->mapped_constants[i][j] = ws->buffer_map(ws, - sp->constants[i][j], - PIPE_BUFFER_USAGE_CPU_READ); - } - } - } - - for (i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) { - if (sp->constants[PIPE_SHADER_VERTEX][i]) { - draw_set_mapped_constant_buffer(sp->draw, - PIPE_SHADER_VERTEX, - i, - sp->mapped_constants[PIPE_SHADER_VERTEX][i], - sp->constants[PIPE_SHADER_VERTEX][i]->size); - } - if (sp->constants[PIPE_SHADER_GEOMETRY][i]) { - draw_set_mapped_constant_buffer(sp->draw, - PIPE_SHADER_GEOMETRY, - i, - sp->mapped_constants[PIPE_SHADER_GEOMETRY][i], - sp->constants[PIPE_SHADER_GEOMETRY][i]->size); - } - } -} - - -static void -softpipe_unmap_constant_buffers(struct softpipe_context *sp) -{ - struct pipe_winsys *ws = sp->pipe.winsys; - uint i; - - /* really need to flush all prims since the vert/frag shaders const buffers - * are going away now. - */ - draw_flush(sp->draw); - for (i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) { - draw_set_mapped_constant_buffer(sp->draw, - PIPE_SHADER_VERTEX, - i, - NULL, - 0); - draw_set_mapped_constant_buffer(sp->draw, - PIPE_SHADER_GEOMETRY, - i, - NULL, - 0); - } - - for (i = 0; i < PIPE_SHADER_TYPES; i++) { - uint j; - - for (j = 0; j < PIPE_MAX_CONSTANT_BUFFERS; j++) { - if (sp->constants[i][j] && sp->constants[i][j]->size) { - ws->buffer_unmap(ws, sp->constants[i][j]); - } - sp->mapped_constants[i][j] = NULL; - } - } -} /** @@ -126,8 +55,9 @@ softpipe_unmap_constant_buffers(struct softpipe_context *sp) */ static void softpipe_draw_range_elements_instanced(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, + struct pipe_resource *indexBuffer, unsigned indexSize, + int indexBias, unsigned minIndex, unsigned maxIndex, unsigned mode, @@ -145,6 +75,7 @@ softpipe_draw_arrays(struct pipe_context *pipe, unsigned mode, NULL, 0, 0, + 0, 0xffffffff, mode, start, @@ -156,8 +87,9 @@ softpipe_draw_arrays(struct pipe_context *pipe, unsigned mode, void softpipe_draw_range_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, + struct pipe_resource *indexBuffer, unsigned indexSize, + int indexBias, unsigned min_index, unsigned max_index, unsigned mode, unsigned start, unsigned count) @@ -165,6 +97,7 @@ softpipe_draw_range_elements(struct pipe_context *pipe, softpipe_draw_range_elements_instanced(pipe, indexBuffer, indexSize, + indexBias, min_index, max_index, mode, @@ -177,13 +110,14 @@ softpipe_draw_range_elements(struct pipe_context *pipe, void softpipe_draw_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, - unsigned indexSize, + struct pipe_resource *indexBuffer, + unsigned indexSize, int indexBias, unsigned mode, unsigned start, unsigned count) { softpipe_draw_range_elements_instanced(pipe, indexBuffer, indexSize, + indexBias, 0, 0xffffffff, mode, @@ -205,6 +139,7 @@ softpipe_draw_arrays_instanced(struct pipe_context *pipe, NULL, 0, 0, + 0, 0xffffffff, mode, start, @@ -215,8 +150,9 @@ softpipe_draw_arrays_instanced(struct pipe_context *pipe, void softpipe_draw_elements_instanced(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, + struct pipe_resource *indexBuffer, unsigned indexSize, + int indexBias, unsigned mode, unsigned start, unsigned count, @@ -226,6 +162,7 @@ softpipe_draw_elements_instanced(struct pipe_context *pipe, softpipe_draw_range_elements_instanced(pipe, indexBuffer, indexSize, + indexBias, 0, 0xffffffff, mode, @@ -237,8 +174,9 @@ softpipe_draw_elements_instanced(struct pipe_context *pipe, static void softpipe_draw_range_elements_instanced(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, + struct pipe_resource *indexBuffer, unsigned indexSize, + int indexBias, unsigned minIndex, unsigned maxIndex, unsigned mode, @@ -261,34 +199,26 @@ softpipe_draw_range_elements_instanced(struct pipe_context *pipe, } softpipe_map_transfers(sp); - softpipe_map_constant_buffers(sp); /* Map vertex buffers */ for (i = 0; i < sp->num_vertex_buffers; i++) { - void *buf; - - buf = pipe_buffer_map(pipe->screen, - sp->vertex_buffer[i].buffer, - PIPE_BUFFER_USAGE_CPU_READ); + void *buf = softpipe_resource(sp->vertex_buffer[i].buffer)->data; draw_set_mapped_vertex_buffer(draw, i, buf); } /* Map index buffer, if present */ if (indexBuffer) { - void *mapped_indexes; - - mapped_indexes = pipe_buffer_map(pipe->screen, - indexBuffer, - PIPE_BUFFER_USAGE_CPU_READ); + void *mapped_indexes = softpipe_resource(indexBuffer)->data; draw_set_mapped_element_buffer_range(draw, indexSize, + indexBias, minIndex, maxIndex, mapped_indexes); } else { /* no index/element buffer */ draw_set_mapped_element_buffer_range(draw, - 0, + 0, 0, start, start + count - 1, NULL); @@ -300,15 +230,18 @@ softpipe_draw_range_elements_instanced(struct pipe_context *pipe, /* unmap vertex/index buffers - will cause draw module to flush */ for (i = 0; i < sp->num_vertex_buffers; i++) { draw_set_mapped_vertex_buffer(draw, i, NULL); - pipe_buffer_unmap(pipe->screen, sp->vertex_buffer[i].buffer); } if (indexBuffer) { - draw_set_mapped_element_buffer(draw, 0, NULL); - pipe_buffer_unmap(pipe->screen, indexBuffer); + draw_set_mapped_element_buffer(draw, 0, 0, NULL); } - /* Note: leave drawing surfaces mapped */ - softpipe_unmap_constant_buffers(sp); + /* + * TODO: Flush only when a user vertex/index buffer is present + * (or even better, modify draw module to do this + * internally when this condition is seen?) + */ + draw_flush(draw); + /* Note: leave drawing surfaces mapped */ sp->dirty_render_cache = TRUE; } diff --git a/src/gallium/drivers/softpipe/sp_fence.c b/src/gallium/drivers/softpipe/sp_fence.c new file mode 100644 index 00000000000..66c52141132 --- /dev/null +++ b/src/gallium/drivers/softpipe/sp_fence.c @@ -0,0 +1,70 @@ +/************************************************************************** + * + * Copyright 2010 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + **************************************************************************/ + + +#include "pipe/p_screen.h" +#include "util/u_debug.h" +#include "sp_fence.h" + + +static void +softpipe_fence_reference(struct pipe_screen *screen, + struct pipe_fence_handle **ptr, + struct pipe_fence_handle *fence) +{ + assert(!*ptr); + assert(!fence); +} + + +static int +softpipe_fence_signalled(struct pipe_screen *screen, + struct pipe_fence_handle *fence, + unsigned flags) +{ + assert(!fence); + return 0; +} + + +static int +softpipe_fence_finish(struct pipe_screen *screen, + struct pipe_fence_handle *fence, + unsigned flags) +{ + assert(!fence); + return 0; +} + + +void +softpipe_init_screen_fence_funcs(struct pipe_screen *screen) +{ + screen->fence_reference = softpipe_fence_reference; + screen->fence_finish = softpipe_fence_finish; + screen->fence_signalled = softpipe_fence_signalled; +} diff --git a/src/gallium/drivers/softpipe/sp_fence.h b/src/gallium/drivers/softpipe/sp_fence.h new file mode 100644 index 00000000000..39c33243bd5 --- /dev/null +++ b/src/gallium/drivers/softpipe/sp_fence.h @@ -0,0 +1,40 @@ +/************************************************************************** + * + * Copyright 2010 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + **************************************************************************/ + + +#ifndef SP_FENCE_H_ +#define SP_FENCE_H_ + + +struct pipe_screen; + + +void +softpipe_init_screen_fence_funcs(struct pipe_screen *screen); + + +#endif /* SP_FENCE_H_ */ diff --git a/src/gallium/drivers/softpipe/sp_flush.c b/src/gallium/drivers/softpipe/sp_flush.c index e8952bf4fb8..5024fc8a819 100644 --- a/src/gallium/drivers/softpipe/sp_flush.c +++ b/src/gallium/drivers/softpipe/sp_flush.c @@ -50,10 +50,10 @@ softpipe_flush( struct pipe_context *pipe, draw_flush(softpipe->draw); if (flags & PIPE_FLUSH_TEXTURE_CACHE) { - for (i = 0; i < softpipe->num_textures; i++) { + for (i = 0; i < softpipe->num_sampler_views; i++) { sp_flush_tex_tile_cache(softpipe->tex_cache[i]); } - for (i = 0; i < softpipe->num_vertex_textures; i++) { + for (i = 0; i < softpipe->num_vertex_sampler_views; i++) { sp_flush_tex_tile_cache(softpipe->vertex_tex_cache[i]); } } @@ -93,9 +93,9 @@ softpipe_flush( struct pipe_context *pipe, static unsigned frame_no = 1; static char filename[256]; util_snprintf(filename, sizeof(filename), "cbuf_%u.bmp", frame_no); - debug_dump_surface_bmp(filename, softpipe->framebuffer.cbufs[0]); + debug_dump_surface_bmp(softpipe, filename, softpipe->framebuffer.cbufs[0]); util_snprintf(filename, sizeof(filename), "zsbuf_%u.bmp", frame_no); - debug_dump_surface_bmp(filename, softpipe->framebuffer.zsbuf); + debug_dump_surface_bmp(softpipe, filename, softpipe->framebuffer.zsbuf); ++frame_no; } #endif @@ -104,3 +104,71 @@ softpipe_flush( struct pipe_context *pipe, *fence = NULL; } + +/** + * Flush context if necessary. + * + * Returns FALSE if it would have block, but do_not_block was set, TRUE + * otherwise. + * + * TODO: move this logic to an auxiliary library? + */ +boolean +softpipe_flush_resource(struct pipe_context *pipe, + struct pipe_resource *texture, + unsigned face, + unsigned level, + unsigned flush_flags, + boolean read_only, + boolean cpu_access, + boolean do_not_block) +{ + unsigned referenced; + + referenced = pipe->is_resource_referenced(pipe, texture, face, level); + + if ((referenced & PIPE_REFERENCED_FOR_WRITE) || + ((referenced & PIPE_REFERENCED_FOR_READ) && !read_only)) { + + /* + * TODO: The semantics of these flush flags are too obtuse. They should + * disappear and the pipe driver should just ensure that all visible + * side-effects happen when they need to happen. + */ + if (referenced & PIPE_REFERENCED_FOR_WRITE) + flush_flags |= PIPE_FLUSH_RENDER_CACHE; + + if (referenced & PIPE_REFERENCED_FOR_READ) + flush_flags |= PIPE_FLUSH_TEXTURE_CACHE; + + if (cpu_access) { + /* + * Flush and wait. + */ + + struct pipe_fence_handle *fence = NULL; + + if (do_not_block) + return FALSE; + + pipe->flush(pipe, flush_flags, &fence); + + if (fence) { + /* + * This is for illustrative purposes only, as softpipe does not + * have fences. + */ + pipe->screen->fence_finish(pipe->screen, fence, 0); + pipe->screen->fence_reference(pipe->screen, &fence, NULL); + } + } else { + /* + * Just flush. + */ + + pipe->flush(pipe, flush_flags, NULL); + } + } + + return TRUE; +} diff --git a/src/gallium/drivers/softpipe/sp_flush.h b/src/gallium/drivers/softpipe/sp_flush.h index 68d9b5fa835..cb97482a71b 100644 --- a/src/gallium/drivers/softpipe/sp_flush.h +++ b/src/gallium/drivers/softpipe/sp_flush.h @@ -28,10 +28,23 @@ #ifndef SP_FLUSH_H #define SP_FLUSH_H +#include "pipe/p_compiler.h" + struct pipe_context; struct pipe_fence_handle; -void softpipe_flush(struct pipe_context *pipe, unsigned flags, - struct pipe_fence_handle **fence); +void +softpipe_flush(struct pipe_context *pipe, unsigned flags, + struct pipe_fence_handle **fence); + +boolean +softpipe_flush_resource(struct pipe_context *pipe, + struct pipe_resource *texture, + unsigned face, + unsigned level, + unsigned flush_flags, + boolean read_only, + boolean cpu_access, + boolean do_not_block); #endif diff --git a/src/gallium/drivers/softpipe/sp_fs_exec.c b/src/gallium/drivers/softpipe/sp_fs_exec.c index 27fa126b7c3..67e2c8f8bc4 100644 --- a/src/gallium/drivers/softpipe/sp_fs_exec.c +++ b/src/gallium/drivers/softpipe/sp_fs_exec.c @@ -145,8 +145,13 @@ exec_run( const struct sp_fragment_shader *base, case TGSI_SEMANTIC_COLOR: { uint cbuf = sem_index[i]; + + assert(sizeof(quad->output.color[cbuf]) == + sizeof(machine->Outputs[i])); + + /* copy float[4][4] result */ memcpy(quad->output.color[cbuf], - &machine->Outputs[i].xyzw[0].f[0], + &machine->Outputs[i], sizeof(quad->output.color[0]) ); } break; diff --git a/src/gallium/drivers/softpipe/sp_fs_sse.c b/src/gallium/drivers/softpipe/sp_fs_sse.c index acee2136706..daa158df7c4 100644 --- a/src/gallium/drivers/softpipe/sp_fs_sse.c +++ b/src/gallium/drivers/softpipe/sp_fs_sse.c @@ -156,8 +156,13 @@ fs_sse_run( const struct sp_fragment_shader *base, case TGSI_SEMANTIC_COLOR: { uint cbuf = sem_index[i]; + + assert(sizeof(quad->output.color[cbuf]) == + sizeof(machine->Outputs[i])); + + /* copy float[4][4] result */ memcpy(quad->output.color[cbuf], - &machine->Outputs[i].xyzw[0].f[0], + &machine->Outputs[i], sizeof(quad->output.color[0]) ); } break; diff --git a/src/gallium/drivers/softpipe/sp_prim_vbuf.c b/src/gallium/drivers/softpipe/sp_prim_vbuf.c index 98c08eaffaf..a58bc107c0a 100644 --- a/src/gallium/drivers/softpipe/sp_prim_vbuf.c +++ b/src/gallium/drivers/softpipe/sp_prim_vbuf.c @@ -76,11 +76,7 @@ softpipe_vbuf_render(struct vbuf_render *vbr) } - - - - - +/** This tells the draw module about our desired vertex layout */ static const struct vertex_info * sp_vbuf_get_vertex_info(struct vbuf_render *vbr) { @@ -108,12 +104,14 @@ sp_vbuf_allocate_vertices(struct vbuf_render *vbr, return cvbr->vertex_buffer != NULL; } + static void sp_vbuf_release_vertices(struct vbuf_render *vbr) { /* keep the old allocation for next time */ } + static void * sp_vbuf_map_vertices(struct vbuf_render *vbr) { @@ -121,6 +119,7 @@ sp_vbuf_map_vertices(struct vbuf_render *vbr) return cvbr->vertex_buffer; } + static void sp_vbuf_unmap_vertices(struct vbuf_render *vbr, ushort min_index, @@ -144,7 +143,6 @@ sp_vbuf_set_primitive(struct vbuf_render *vbr, unsigned prim) cvbr->softpipe->reduced_prim = u_reduced_prim(prim); cvbr->prim = prim; return TRUE; - } @@ -173,36 +171,36 @@ sp_vbuf_draw(struct vbuf_render *vbr, const ushort *indices, uint nr) case PIPE_PRIM_POINTS: for (i = 0; i < nr; i++) { sp_setup_point( setup_ctx, - get_vert(vertex_buffer, indices[i-0], stride) ); + get_vert(vertex_buffer, indices[i-0], stride) ); } break; case PIPE_PRIM_LINES: for (i = 1; i < nr; i += 2) { sp_setup_line( setup_ctx, - get_vert(vertex_buffer, indices[i-1], stride), - get_vert(vertex_buffer, indices[i-0], stride) ); + get_vert(vertex_buffer, indices[i-1], stride), + get_vert(vertex_buffer, indices[i-0], stride) ); } break; case PIPE_PRIM_LINE_STRIP: for (i = 1; i < nr; i ++) { sp_setup_line( setup_ctx, - get_vert(vertex_buffer, indices[i-1], stride), - get_vert(vertex_buffer, indices[i-0], stride) ); + get_vert(vertex_buffer, indices[i-1], stride), + get_vert(vertex_buffer, indices[i-0], stride) ); } break; case PIPE_PRIM_LINE_LOOP: for (i = 1; i < nr; i ++) { sp_setup_line( setup_ctx, - get_vert(vertex_buffer, indices[i-1], stride), - get_vert(vertex_buffer, indices[i-0], stride) ); + get_vert(vertex_buffer, indices[i-1], stride), + get_vert(vertex_buffer, indices[i-0], stride) ); } if (nr) { sp_setup_line( setup_ctx, - get_vert(vertex_buffer, indices[nr-1], stride), - get_vert(vertex_buffer, indices[0], stride) ); + get_vert(vertex_buffer, indices[nr-1], stride), + get_vert(vertex_buffer, indices[0], stride) ); } break; @@ -210,17 +208,17 @@ sp_vbuf_draw(struct vbuf_render *vbr, const ushort *indices, uint nr) if (softpipe->rasterizer->flatshade_first) { for (i = 2; i < nr; i += 3) { sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, indices[i-1], stride), - get_vert(vertex_buffer, indices[i-0], stride), - get_vert(vertex_buffer, indices[i-2], stride) ); + get_vert(vertex_buffer, indices[i-1], stride), + get_vert(vertex_buffer, indices[i-0], stride), + get_vert(vertex_buffer, indices[i-2], stride) ); } } else { for (i = 2; i < nr; i += 3) { sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, indices[i-2], stride), - get_vert(vertex_buffer, indices[i-1], stride), - get_vert(vertex_buffer, indices[i-0], stride) ); + get_vert(vertex_buffer, indices[i-2], stride), + get_vert(vertex_buffer, indices[i-1], stride), + get_vert(vertex_buffer, indices[i-0], stride) ); } } break; @@ -229,17 +227,17 @@ sp_vbuf_draw(struct vbuf_render *vbr, const ushort *indices, uint nr) if (softpipe->rasterizer->flatshade_first) { for (i = 2; i < nr; i += 1) { sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, indices[i+(i&1)-1], stride), - get_vert(vertex_buffer, indices[i-(i&1)], stride), - get_vert(vertex_buffer, indices[i-2], stride) ); + get_vert(vertex_buffer, indices[i+(i&1)-1], stride), + get_vert(vertex_buffer, indices[i-(i&1)], stride), + get_vert(vertex_buffer, indices[i-2], stride) ); } } else { for (i = 2; i < nr; i += 1) { sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, indices[i+(i&1)-2], stride), - get_vert(vertex_buffer, indices[i-(i&1)-1], stride), - get_vert(vertex_buffer, indices[i-0], stride) ); + get_vert(vertex_buffer, indices[i+(i&1)-2], stride), + get_vert(vertex_buffer, indices[i-(i&1)-1], stride), + get_vert(vertex_buffer, indices[i-0], stride) ); } } break; @@ -248,73 +246,45 @@ sp_vbuf_draw(struct vbuf_render *vbr, const ushort *indices, uint nr) if (softpipe->rasterizer->flatshade_first) { for (i = 2; i < nr; i += 1) { sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, indices[i-0], stride), - get_vert(vertex_buffer, indices[0], stride), - get_vert(vertex_buffer, indices[i-1], stride) ); + get_vert(vertex_buffer, indices[i-0], stride), + get_vert(vertex_buffer, indices[0], stride), + get_vert(vertex_buffer, indices[i-1], stride) ); } } else { for (i = 2; i < nr; i += 1) { sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, indices[0], stride), - get_vert(vertex_buffer, indices[i-1], stride), - get_vert(vertex_buffer, indices[i-0], stride) ); + get_vert(vertex_buffer, indices[0], stride), + get_vert(vertex_buffer, indices[i-1], stride), + get_vert(vertex_buffer, indices[i-0], stride) ); } } break; case PIPE_PRIM_QUADS: - if (softpipe->rasterizer->flatshade_first) { - for (i = 3; i < nr; i += 4) { - sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, indices[i-2], stride), - get_vert(vertex_buffer, indices[i-1], stride), - get_vert(vertex_buffer, indices[i-3], stride) ); - sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, indices[i-1], stride), - get_vert(vertex_buffer, indices[i-0], stride), - get_vert(vertex_buffer, indices[i-3], stride) ); - } - } - else { - for (i = 3; i < nr; i += 4) { - sp_setup_tri( setup_ctx, + for (i = 3; i < nr; i += 4) { + sp_setup_tri( setup_ctx, get_vert(vertex_buffer, indices[i-3], stride), get_vert(vertex_buffer, indices[i-2], stride), get_vert(vertex_buffer, indices[i-0], stride) ); - sp_setup_tri( setup_ctx, + sp_setup_tri( setup_ctx, get_vert(vertex_buffer, indices[i-2], stride), get_vert(vertex_buffer, indices[i-1], stride), get_vert(vertex_buffer, indices[i-0], stride) ); - } } break; case PIPE_PRIM_QUAD_STRIP: - if (softpipe->rasterizer->flatshade_first) { - for (i = 3; i < nr; i += 2) { - sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, indices[i-0], stride), - get_vert(vertex_buffer, indices[i-1], stride), - get_vert(vertex_buffer, indices[i-3], stride)); - sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, indices[i-2], stride), - get_vert(vertex_buffer, indices[i-0], stride), - get_vert(vertex_buffer, indices[i-3], stride) ); - } - } - else { - for (i = 3; i < nr; i += 2) { - sp_setup_tri( setup_ctx, + for (i = 3; i < nr; i += 2) { + sp_setup_tri( setup_ctx, get_vert(vertex_buffer, indices[i-3], stride), get_vert(vertex_buffer, indices[i-2], stride), get_vert(vertex_buffer, indices[i-0], stride) ); - sp_setup_tri( setup_ctx, + sp_setup_tri( setup_ctx, get_vert(vertex_buffer, indices[i-1], stride), get_vert(vertex_buffer, indices[i-3], stride), get_vert(vertex_buffer, indices[i-0], stride) ); - } } break; @@ -326,9 +296,9 @@ sp_vbuf_draw(struct vbuf_render *vbr, const ushort *indices, uint nr) */ for (i = 2; i < nr; i += 1) { sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, indices[i-0], stride), - get_vert(vertex_buffer, indices[i-1], stride), - get_vert(vertex_buffer, indices[0], stride) ); + get_vert(vertex_buffer, indices[i-0], stride), + get_vert(vertex_buffer, indices[i-1], stride), + get_vert(vertex_buffer, indices[0], stride) ); } break; @@ -357,15 +327,15 @@ sp_vbuf_draw_arrays(struct vbuf_render *vbr, uint start, uint nr) case PIPE_PRIM_POINTS: for (i = 0; i < nr; i++) { sp_setup_point( setup_ctx, - get_vert(vertex_buffer, i-0, stride) ); + get_vert(vertex_buffer, i-0, stride) ); } break; case PIPE_PRIM_LINES: for (i = 1; i < nr; i += 2) { sp_setup_line( setup_ctx, - get_vert(vertex_buffer, i-1, stride), - get_vert(vertex_buffer, i-0, stride) ); + get_vert(vertex_buffer, i-1, stride), + get_vert(vertex_buffer, i-0, stride) ); } break; @@ -380,13 +350,13 @@ sp_vbuf_draw_arrays(struct vbuf_render *vbr, uint start, uint nr) case PIPE_PRIM_LINE_LOOP: for (i = 1; i < nr; i ++) { sp_setup_line( setup_ctx, - get_vert(vertex_buffer, i-1, stride), - get_vert(vertex_buffer, i-0, stride) ); + get_vert(vertex_buffer, i-1, stride), + get_vert(vertex_buffer, i-0, stride) ); } if (nr) { sp_setup_line( setup_ctx, - get_vert(vertex_buffer, nr-1, stride), - get_vert(vertex_buffer, 0, stride) ); + get_vert(vertex_buffer, nr-1, stride), + get_vert(vertex_buffer, 0, stride) ); } break; @@ -394,17 +364,17 @@ sp_vbuf_draw_arrays(struct vbuf_render *vbr, uint start, uint nr) if (softpipe->rasterizer->flatshade_first) { for (i = 2; i < nr; i += 3) { sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, i-1, stride), - get_vert(vertex_buffer, i-0, stride), - get_vert(vertex_buffer, i-2, stride) ); + get_vert(vertex_buffer, i-1, stride), + get_vert(vertex_buffer, i-0, stride), + get_vert(vertex_buffer, i-2, stride) ); } } else { for (i = 2; i < nr; i += 3) { sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, i-2, stride), - get_vert(vertex_buffer, i-1, stride), - get_vert(vertex_buffer, i-0, stride) ); + get_vert(vertex_buffer, i-2, stride), + get_vert(vertex_buffer, i-1, stride), + get_vert(vertex_buffer, i-0, stride) ); } } break; @@ -413,17 +383,17 @@ sp_vbuf_draw_arrays(struct vbuf_render *vbr, uint start, uint nr) if (softpipe->rasterizer->flatshade_first) { for (i = 2; i < nr; i++) { sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, i+(i&1)-1, stride), - get_vert(vertex_buffer, i-(i&1), stride), - get_vert(vertex_buffer, i-2, stride) ); + get_vert(vertex_buffer, i+(i&1)-1, stride), + get_vert(vertex_buffer, i-(i&1), stride), + get_vert(vertex_buffer, i-2, stride) ); } } else { for (i = 2; i < nr; i++) { sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, i+(i&1)-2, stride), - get_vert(vertex_buffer, i-(i&1)-1, stride), - get_vert(vertex_buffer, i-0, stride) ); + get_vert(vertex_buffer, i+(i&1)-2, stride), + get_vert(vertex_buffer, i-(i&1)-1, stride), + get_vert(vertex_buffer, i-0, stride) ); } } break; @@ -432,72 +402,44 @@ sp_vbuf_draw_arrays(struct vbuf_render *vbr, uint start, uint nr) if (softpipe->rasterizer->flatshade_first) { for (i = 2; i < nr; i += 1) { sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, i-0, stride), - get_vert(vertex_buffer, 0, stride), - get_vert(vertex_buffer, i-1, stride) ); + get_vert(vertex_buffer, i-0, stride), + get_vert(vertex_buffer, 0, stride), + get_vert(vertex_buffer, i-1, stride) ); } } else { for (i = 2; i < nr; i += 1) { sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, 0, stride), - get_vert(vertex_buffer, i-1, stride), - get_vert(vertex_buffer, i-0, stride) ); + get_vert(vertex_buffer, 0, stride), + get_vert(vertex_buffer, i-1, stride), + get_vert(vertex_buffer, i-0, stride) ); } } break; case PIPE_PRIM_QUADS: - if (softpipe->rasterizer->flatshade_first) { - for (i = 3; i < nr; i += 4) { - sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, i-2, stride), - get_vert(vertex_buffer, i-1, stride), - get_vert(vertex_buffer, i-3, stride) ); - sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, i-1, stride), - get_vert(vertex_buffer, i-0, stride), - get_vert(vertex_buffer, i-3, stride) ); - } - } - else { - for (i = 3; i < nr; i += 4) { - sp_setup_tri( setup_ctx, + for (i = 3; i < nr; i += 4) { + sp_setup_tri( setup_ctx, get_vert(vertex_buffer, i-3, stride), get_vert(vertex_buffer, i-2, stride), get_vert(vertex_buffer, i-0, stride) ); - sp_setup_tri( setup_ctx, + sp_setup_tri( setup_ctx, get_vert(vertex_buffer, i-2, stride), get_vert(vertex_buffer, i-1, stride), get_vert(vertex_buffer, i-0, stride) ); - } } break; case PIPE_PRIM_QUAD_STRIP: - if (softpipe->rasterizer->flatshade_first) { - for (i = 3; i < nr; i += 2) { - sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, i-0, stride), - get_vert(vertex_buffer, i-1, stride), - get_vert(vertex_buffer, i-3, stride) ); - sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, i-2, stride), - get_vert(vertex_buffer, i-0, stride), - get_vert(vertex_buffer, i-3, stride) ); - } - } - else { - for (i = 3; i < nr; i += 2) { - sp_setup_tri( setup_ctx, + for (i = 3; i < nr; i += 2) { + sp_setup_tri( setup_ctx, get_vert(vertex_buffer, i-3, stride), get_vert(vertex_buffer, i-2, stride), get_vert(vertex_buffer, i-0, stride) ); - sp_setup_tri( setup_ctx, + sp_setup_tri( setup_ctx, get_vert(vertex_buffer, i-1, stride), get_vert(vertex_buffer, i-3, stride), get_vert(vertex_buffer, i-0, stride) ); - } } break; @@ -509,9 +451,9 @@ sp_vbuf_draw_arrays(struct vbuf_render *vbr, uint start, uint nr) */ for (i = 2; i < nr; i += 1) { sp_setup_tri( setup_ctx, - get_vert(vertex_buffer, i-1, stride), - get_vert(vertex_buffer, i-0, stride), - get_vert(vertex_buffer, 0, stride) ); + get_vert(vertex_buffer, i-1, stride), + get_vert(vertex_buffer, i-0, stride), + get_vert(vertex_buffer, 0, stride) ); } break; @@ -521,12 +463,11 @@ sp_vbuf_draw_arrays(struct vbuf_render *vbr, uint start, uint nr) } - static void sp_vbuf_destroy(struct vbuf_render *vbr) { struct softpipe_vbuf_render *cvbr = softpipe_vbuf_render(vbr); - if(cvbr->vertex_buffer) + if (cvbr->vertex_buffer) align_free(cvbr->vertex_buffer); sp_setup_destroy_context(cvbr->setup); FREE(cvbr); diff --git a/src/gallium/drivers/softpipe/sp_public.h b/src/gallium/drivers/softpipe/sp_public.h new file mode 100644 index 00000000000..62d0903d87a --- /dev/null +++ b/src/gallium/drivers/softpipe/sp_public.h @@ -0,0 +1,10 @@ +#ifndef SP_PUBLIC_H +#define SP_PUBLIC_H + +struct pipe_screen; +struct sw_winsys; + +struct pipe_screen * +softpipe_create_screen(struct sw_winsys *winsys); + +#endif diff --git a/src/gallium/drivers/softpipe/sp_quad_blend.c b/src/gallium/drivers/softpipe/sp_quad_blend.c index d65307b7f60..ead489393ef 100644 --- a/src/gallium/drivers/softpipe/sp_quad_blend.c +++ b/src/gallium/drivers/softpipe/sp_quad_blend.c @@ -744,6 +744,8 @@ blend_fallback(struct quad_stage *qs, for (cbuf = 0; cbuf < softpipe->framebuffer.nr_cbufs; cbuf++) { + /* which blend/mask state index to use: */ + const uint blend_buf = blend->independent_blend_enable ? cbuf : 0; float dest[4][QUAD_SIZE]; struct softpipe_cached_tile *tile = sp_get_cached_tile(softpipe->cbuf_cache[cbuf], @@ -771,11 +773,11 @@ blend_fallback(struct quad_stage *qs, if (blend->logicop_enable) { logicop_quad( qs, quadColor, dest ); } - else if (blend->rt[cbuf].blend_enable) { + else if (blend->rt[blend_buf].blend_enable) { blend_quad( qs, quadColor, dest, cbuf ); } - if (blend->rt[cbuf].colormask != 0xf) + if (blend->rt[blend_buf].colormask != 0xf) colormask_quad( blend->rt[cbuf].colormask, quadColor, dest); /* Output color values diff --git a/src/gallium/drivers/softpipe/sp_quad_depth_test.c b/src/gallium/drivers/softpipe/sp_quad_depth_test.c index 4815a0d49f1..72117c233e5 100644 --- a/src/gallium/drivers/softpipe/sp_quad_depth_test.c +++ b/src/gallium/drivers/softpipe/sp_quad_depth_test.c @@ -1,6 +1,7 @@ /************************************************************************** * * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas. + * Copyright 2010 VMware, Inc. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a @@ -18,7 +19,7 @@ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR + * IN NO EVENT SHALL THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. @@ -26,7 +27,7 @@ **************************************************************************/ /** - * \brief Quad depth testing + * \brief Quad depth / stencil testing */ #include "pipe/p_defines.h" @@ -74,7 +75,7 @@ get_depth_stencil_values( struct depth_data *data, } break; case PIPE_FORMAT_Z24X8_UNORM: - case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: for (j = 0; j < QUAD_SIZE; j++) { int x = quad->input.x0 % TILE_SIZE + (j & 1); int y = quad->input.y0 % TILE_SIZE + (j >> 1); @@ -83,7 +84,7 @@ get_depth_stencil_values( struct depth_data *data, } break; case PIPE_FORMAT_X8Z24_UNORM: - case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: for (j = 0; j < QUAD_SIZE; j++) { int x = quad->input.x0 % TILE_SIZE + (j & 1); int y = quad->input.y0 % TILE_SIZE + (j >> 1); @@ -96,7 +97,9 @@ get_depth_stencil_values( struct depth_data *data, } } -/* If the shader has not been run, interpolate the depth values + +/** + * If the shader has not been run, interpolate the depth values * ourselves. */ static void @@ -115,6 +118,9 @@ interpolate_quad_depth( struct quad_header *quad ) } +/** + * Compute the depth_data::qzzzz[] values from the float fragment Z values. + */ static void convert_quad_depth( struct depth_data *data, const struct quad_header *quad ) @@ -147,7 +153,7 @@ convert_quad_depth( struct depth_data *data, } break; case PIPE_FORMAT_Z24X8_UNORM: - case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: { float scale = (float) ((1 << 24) - 1); @@ -157,7 +163,7 @@ convert_quad_depth( struct depth_data *data, } break; case PIPE_FORMAT_X8Z24_UNORM: - case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: { float scale = (float) ((1 << 24) - 1); @@ -173,6 +179,9 @@ convert_quad_depth( struct depth_data *data, +/** + * Write data->bzzzz[] values and data->stencilVals into the Z/stencil buffer. + */ static void write_depth_stencil_values( struct depth_data *data, struct quad_header *quad ) @@ -197,14 +206,14 @@ write_depth_stencil_values( struct depth_data *data, tile->data.depth32[y][x] = data->bzzzz[j]; } break; - case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: for (j = 0; j < QUAD_SIZE; j++) { int x = quad->input.x0 % TILE_SIZE + (j & 1); int y = quad->input.y0 % TILE_SIZE + (j >> 1); tile->data.depth32[y][x] = (data->stencilVals[j] << 24) | data->bzzzz[j]; } break; - case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: for (j = 0; j < QUAD_SIZE; j++) { int x = quad->input.x0 % TILE_SIZE + (j & 1); int y = quad->input.y0 % TILE_SIZE + (j >> 1); @@ -225,7 +234,6 @@ write_depth_stencil_values( struct depth_data *data, - /** Only 8-bit stencil supported */ #define STENCIL_MAX 0xff @@ -408,12 +416,11 @@ apply_stencil_op(struct depth_data *data, -/* +/** * To increase efficiency, we should probably have multiple versions * of this function that are specifically for Z16, Z32 and FP Z buffers. * Try to effectively do that with codegen... */ - static boolean depth_test_quad(struct quad_stage *qs, struct depth_data *data, @@ -513,6 +520,9 @@ depth_stencil_test_quad(struct quad_stage *qs, face = 0; } + /* 0 = front-face, 1 = back-face */ + assert(face == 0 || face == 1); + /* choose front or back face function, operator, etc */ /* XXX we could do these initializations once per primitive */ func = softpipe->depth_stencil->stencil[face].func; @@ -523,7 +533,6 @@ depth_stencil_test_quad(struct quad_stage *qs, wrtMask = softpipe->depth_stencil->stencil[face].writemask; valMask = softpipe->depth_stencil->stencil[face].valuemask; - /* do the stencil test first */ { unsigned passMask, failMask; @@ -563,7 +572,7 @@ depth_stencil_test_quad(struct quad_stage *qs, #define ALPHATEST( FUNC, COMP ) \ - static int \ + static int \ alpha_test_quads_##FUNC( struct quad_stage *qs, \ struct quad_header *quads[], \ unsigned nr ) \ @@ -629,6 +638,7 @@ alpha_test_quads(struct quad_stage *qs, } } + static unsigned mask_count[16] = { 0, /* 0x0 */ @@ -665,6 +675,9 @@ get_depth_bits(struct quad_stage *qs) +/** + * General depth/stencil test function. Used when there's no fast-path. + */ static void depth_test_quads_fallback(struct quad_stage *qs, struct quad_header *quads[], @@ -712,7 +725,6 @@ depth_test_quads_fallback(struct quad_stage *qs, write_depth_stencil_values(&data, quads[i]); } - quads[pass++] = quads[i]; } @@ -730,169 +742,36 @@ depth_test_quads_fallback(struct quad_stage *qs, /** - * Special-case Z testing for 16-bit Zbuffer, PIPE_FUNC_LESS and - * Z buffer writes enabled. - * - * NOTE: there's no guarantee that the quads are sequentially side by - * side. The fragment shader may have culled some quads, etc. Sliver - * triangles may generate non-sequential quads. + * Special-case Z testing for 16-bit Zbuffer and Z buffer writes enabled. */ -static void -depth_interp_z16_less_write(struct quad_stage *qs, - struct quad_header *quads[], - unsigned nr) -{ - unsigned i, pass = 0; - const unsigned ix = quads[0]->input.x0; - const unsigned iy = quads[0]->input.y0; - const float fx = (float) ix; - const float fy = (float) iy; - const float dzdx = quads[0]->posCoef->dadx[2]; - const float dzdy = quads[0]->posCoef->dady[2]; - const float z0 = quads[0]->posCoef->a0[2] + dzdx * fx + dzdy * fy; - struct softpipe_cached_tile *tile; - ushort (*depth16)[TILE_SIZE]; - ushort init_idepth[4], idepth[4], depth_step; - const float scale = 65535.0; - /* compute scaled depth of the four pixels in first quad */ - init_idepth[0] = (ushort)((z0) * scale); - init_idepth[1] = (ushort)((z0 + dzdx) * scale); - init_idepth[2] = (ushort)((z0 + dzdy) * scale); - init_idepth[3] = (ushort)((z0 + dzdx + dzdy) * scale); +#define NAME depth_interp_z16_less_write +#define OPERATOR < +#include "sp_quad_depth_test_tmp.h" - depth_step = (ushort)(dzdx * scale); +#define NAME depth_interp_z16_equal_write +#define OPERATOR == +#include "sp_quad_depth_test_tmp.h" - tile = sp_get_cached_tile(qs->softpipe->zsbuf_cache, ix, iy); +#define NAME depth_interp_z16_lequal_write +#define OPERATOR <= +#include "sp_quad_depth_test_tmp.h" - for (i = 0; i < nr; i++) { - const unsigned outmask = quads[i]->inout.mask; - const int dx = quads[i]->input.x0 - ix; - unsigned mask = 0; +#define NAME depth_interp_z16_greater_write +#define OPERATOR > +#include "sp_quad_depth_test_tmp.h" - /* compute depth for this quad */ - idepth[0] = init_idepth[0] + dx * depth_step; - idepth[1] = init_idepth[1] + dx * depth_step; - idepth[2] = init_idepth[2] + dx * depth_step; - idepth[3] = init_idepth[3] + dx * depth_step; - - depth16 = (ushort (*)[TILE_SIZE]) - &tile->data.depth16[iy % TILE_SIZE][(ix + dx)% TILE_SIZE]; - - if ((outmask & 1) && idepth[0] < depth16[0][0]) { - depth16[0][0] = idepth[0]; - mask |= (1 << 0); - } - - if ((outmask & 2) && idepth[1] < depth16[0][1]) { - depth16[0][1] = idepth[1]; - mask |= (1 << 1); - } - - if ((outmask & 4) && idepth[2] < depth16[1][0]) { - depth16[1][0] = idepth[2]; - mask |= (1 << 2); - } - - if ((outmask & 8) && idepth[3] < depth16[1][1]) { - depth16[1][1] = idepth[3]; - mask |= (1 << 3); - } - - quads[i]->inout.mask = mask; - if (quads[i]->inout.mask) - quads[pass++] = quads[i]; - } - - if (pass) - qs->next->run(qs->next, quads, pass); - -} - - -/** - * Special-case Z testing for 16-bit Zbuffer, PIPE_FUNC_LEQUAL and - * Z buffer writes enabled. - * - * NOTE: there's no guarantee that the quads are sequentially side by - * side. The fragment shader may have culled some quads, etc. Sliver - * triangles may generate non-sequential quads. - */ -static void -depth_interp_z16_lequal_write(struct quad_stage *qs, - struct quad_header *quads[], - unsigned nr) -{ - unsigned i, pass = 0; - const unsigned ix = quads[0]->input.x0; - const unsigned iy = quads[0]->input.y0; - const float fx = (float) ix; - const float fy = (float) iy; - const float dzdx = quads[0]->posCoef->dadx[2]; - const float dzdy = quads[0]->posCoef->dady[2]; - const float z0 = quads[0]->posCoef->a0[2] + dzdx * fx + dzdy * fy; - struct softpipe_cached_tile *tile; - ushort (*depth16)[TILE_SIZE]; - ushort init_idepth[4], idepth[4], depth_step; - const float scale = 65535.0; - - /* compute scaled depth of the four pixels in first quad */ - init_idepth[0] = (ushort)((z0) * scale); - init_idepth[1] = (ushort)((z0 + dzdx) * scale); - init_idepth[2] = (ushort)((z0 + dzdy) * scale); - init_idepth[3] = (ushort)((z0 + dzdx + dzdy) * scale); - - depth_step = (ushort)(dzdx * scale); - - tile = sp_get_cached_tile(qs->softpipe->zsbuf_cache, ix, iy); - - for (i = 0; i < nr; i++) { - const unsigned outmask = quads[i]->inout.mask; - const int dx = quads[i]->input.x0 - ix; - unsigned mask = 0; - - /* compute depth for this quad */ - idepth[0] = init_idepth[0] + dx * depth_step; - idepth[1] = init_idepth[1] + dx * depth_step; - idepth[2] = init_idepth[2] + dx * depth_step; - idepth[3] = init_idepth[3] + dx * depth_step; - - depth16 = (ushort (*)[TILE_SIZE]) - &tile->data.depth16[iy % TILE_SIZE][(ix + dx)% TILE_SIZE]; - - if ((outmask & 1) && idepth[0] <= depth16[0][0]) { - depth16[0][0] = idepth[0]; - mask |= (1 << 0); - } - - if ((outmask & 2) && idepth[1] <= depth16[0][1]) { - depth16[0][1] = idepth[1]; - mask |= (1 << 1); - } - - if ((outmask & 4) && idepth[2] <= depth16[1][0]) { - depth16[1][0] = idepth[2]; - mask |= (1 << 2); - } - - if ((outmask & 8) && idepth[3] <= depth16[1][1]) { - depth16[1][1] = idepth[3]; - mask |= (1 << 3); - } - - depth16 = (ushort (*)[TILE_SIZE]) &depth16[0][2]; - - quads[i]->inout.mask = mask; - if (quads[i]->inout.mask) - quads[pass++] = quads[i]; - } - - if (pass) - qs->next->run(qs->next, quads, pass); - -} +#define NAME depth_interp_z16_notequal_write +#define OPERATOR != +#include "sp_quad_depth_test_tmp.h" +#define NAME depth_interp_z16_gequal_write +#define OPERATOR >= +#include "sp_quad_depth_test_tmp.h" +#define NAME depth_interp_z16_always_write +#define ALWAYS 1 +#include "sp_quad_depth_test_tmp.h" @@ -926,6 +805,10 @@ choose_depth_test(struct quad_stage *qs, boolean occlusion = qs->softpipe->active_query_count; + /* default */ + qs->run = depth_test_quads_fallback; + + /* look for special cases */ if (!alpha && !depth && !stencil) { @@ -938,57 +821,62 @@ choose_depth_test(struct quad_stage *qs, !occlusion && !stencil) { - switch (depthfunc) { - case PIPE_FUNC_LESS: - switch (qs->softpipe->framebuffer.zsbuf->format) { - case PIPE_FORMAT_Z16_UNORM: + if (qs->softpipe->framebuffer.zsbuf->format == PIPE_FORMAT_Z16_UNORM) { + switch (depthfunc) { + case PIPE_FUNC_NEVER: + qs->run = depth_test_quads_fallback; + break; + case PIPE_FUNC_LESS: qs->run = depth_interp_z16_less_write; break; - default: - qs->run = depth_test_quads_fallback; + case PIPE_FUNC_EQUAL: + qs->run = depth_interp_z16_equal_write; break; - } - break; - case PIPE_FUNC_LEQUAL: - switch (qs->softpipe->framebuffer.zsbuf->format) { - case PIPE_FORMAT_Z16_UNORM: + case PIPE_FUNC_LEQUAL: qs->run = depth_interp_z16_lequal_write; break; + case PIPE_FUNC_GREATER: + qs->run = depth_interp_z16_greater_write; + break; + case PIPE_FUNC_NOTEQUAL: + qs->run = depth_interp_z16_notequal_write; + break; + case PIPE_FUNC_GEQUAL: + qs->run = depth_interp_z16_gequal_write; + break; + case PIPE_FUNC_ALWAYS: + qs->run = depth_interp_z16_always_write; + break; default: qs->run = depth_test_quads_fallback; break; } - break; - default: - qs->run = depth_test_quads_fallback; } } - else { - qs->run = depth_test_quads_fallback; - } - + /* next quad/fragment stage */ qs->run( qs, quads, nr ); } - - -static void depth_test_begin(struct quad_stage *qs) +static void +depth_test_begin(struct quad_stage *qs) { qs->run = choose_depth_test; qs->next->begin(qs->next); } -static void depth_test_destroy(struct quad_stage *qs) +static void +depth_test_destroy(struct quad_stage *qs) { FREE( qs ); } -struct quad_stage *sp_quad_depth_test_stage( struct softpipe_context *softpipe ) +struct quad_stage * +sp_quad_depth_test_stage(struct softpipe_context *softpipe) { struct quad_stage *stage = CALLOC_STRUCT(quad_stage); diff --git a/src/gallium/drivers/softpipe/sp_quad_depth_test_tmp.h b/src/gallium/drivers/softpipe/sp_quad_depth_test_tmp.h new file mode 100644 index 00000000000..25af415c256 --- /dev/null +++ b/src/gallium/drivers/softpipe/sp_quad_depth_test_tmp.h @@ -0,0 +1,147 @@ +/************************************************************************** + * + * Copyright 2010 VMware, Inc. All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. + * IN NO EVENT SHALL THE AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR + * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, + * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE + * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + **************************************************************************/ + + +/* + * Template for generating Z test functions + * Only PIPE_FORMAT_Z16_UNORM supported at this time. + */ + + +#ifndef NAME +#error "NAME is not defined!" +#endif + +#if !defined(OPERATOR) && !defined(ALWAYS) +#error "neither OPERATOR nor ALWAYS is defined!" +#endif + + +/* + * NOTE: there's no guarantee that the quads are sequentially side by + * side. The fragment shader may have culled some quads, etc. Sliver + * triangles may generate non-sequential quads. + */ +static void +NAME(struct quad_stage *qs, + struct quad_header *quads[], + unsigned nr) +{ + unsigned i, pass = 0; + const unsigned ix = quads[0]->input.x0; + const unsigned iy = quads[0]->input.y0; + const float fx = (float) ix; + const float fy = (float) iy; + const float dzdx = quads[0]->posCoef->dadx[2]; + const float dzdy = quads[0]->posCoef->dady[2]; + const float z0 = quads[0]->posCoef->a0[2] + dzdx * fx + dzdy * fy; + struct softpipe_cached_tile *tile; + ushort (*depth16)[TILE_SIZE]; + ushort init_idepth[4], idepth[4], depth_step; + const float scale = 65535.0; + + /* compute scaled depth of the four pixels in first quad */ + init_idepth[0] = (ushort)((z0) * scale); + init_idepth[1] = (ushort)((z0 + dzdx) * scale); + init_idepth[2] = (ushort)((z0 + dzdy) * scale); + init_idepth[3] = (ushort)((z0 + dzdx + dzdy) * scale); + + depth_step = (ushort)(dzdx * scale); + + tile = sp_get_cached_tile(qs->softpipe->zsbuf_cache, ix, iy); + + for (i = 0; i < nr; i++) { + const unsigned outmask = quads[i]->inout.mask; + const int dx = quads[i]->input.x0 - ix; + unsigned mask = 0; + + /* compute depth for this quad */ + idepth[0] = init_idepth[0] + dx * depth_step; + idepth[1] = init_idepth[1] + dx * depth_step; + idepth[2] = init_idepth[2] + dx * depth_step; + idepth[3] = init_idepth[3] + dx * depth_step; + + depth16 = (ushort (*)[TILE_SIZE]) + &tile->data.depth16[iy % TILE_SIZE][(ix + dx)% TILE_SIZE]; + +#ifdef ALWAYS + if (outmask & 1) { + depth16[0][0] = idepth[0]; + mask |= (1 << 0); + } + + if (outmask & 2) { + depth16[0][1] = idepth[1]; + mask |= (1 << 1); + } + + if (outmask & 4) { + depth16[1][0] = idepth[2]; + mask |= (1 << 2); + } + + if (outmask & 8) { + depth16[1][1] = idepth[3]; + mask |= (1 << 3); + } +#else + /* Note: OPERATOR appears here: */ + if ((outmask & 1) && (idepth[0] OPERATOR depth16[0][0])) { + depth16[0][0] = idepth[0]; + mask |= (1 << 0); + } + + if ((outmask & 2) && (idepth[1] OPERATOR depth16[0][1])) { + depth16[0][1] = idepth[1]; + mask |= (1 << 1); + } + + if ((outmask & 4) && (idepth[2] OPERATOR depth16[1][0])) { + depth16[1][0] = idepth[2]; + mask |= (1 << 2); + } + + if ((outmask & 8) && (idepth[3] OPERATOR depth16[1][1])) { + depth16[1][1] = idepth[3]; + mask |= (1 << 3); + } +#endif + + depth16 = (ushort (*)[TILE_SIZE]) &depth16[0][2]; + + quads[i]->inout.mask = mask; + if (quads[i]->inout.mask) + quads[pass++] = quads[i]; + } + + if (pass) + qs->next->run(qs->next, quads, pass); +} + + +#undef NAME +#undef OPERATOR +#undef ALWAYS diff --git a/src/gallium/drivers/softpipe/sp_quad_pipe.c b/src/gallium/drivers/softpipe/sp_quad_pipe.c index 1b5bab4eca6..43b8e88e334 100644 --- a/src/gallium/drivers/softpipe/sp_quad_pipe.c +++ b/src/gallium/drivers/softpipe/sp_quad_pipe.c @@ -59,5 +59,10 @@ sp_build_quad_pipeline(struct softpipe_context *sp) sp_push_quad_first( sp, sp->quad.depth_test ); sp_push_quad_first( sp, sp->quad.shade ); } + +#if !DO_PSTIPPLE_IN_DRAW_MODULE + if (sp->rasterizer->poly_stipple_enable) + sp_push_quad_first( sp, sp->quad.pstipple ); +#endif } diff --git a/src/gallium/drivers/softpipe/sp_screen.c b/src/gallium/drivers/softpipe/sp_screen.c index 6ec63fe698a..11aa0c4583b 100644 --- a/src/gallium/drivers/softpipe/sp_screen.c +++ b/src/gallium/drivers/softpipe/sp_screen.c @@ -27,15 +27,18 @@ #include "util/u_memory.h" -#include "util/u_simple_screen.h" -#include "util/u_simple_screen.h" +#include "util/u_format.h" +#include "util/u_format_s3tc.h" #include "pipe/p_defines.h" #include "pipe/p_screen.h" +#include "state_tracker/sw_winsys.h" + #include "sp_texture.h" -#include "sp_winsys.h" #include "sp_screen.h" #include "sp_context.h" +#include "sp_fence.h" +#include "sp_public.h" static const char * @@ -83,11 +86,11 @@ softpipe_get_param(struct pipe_screen *screen, int param) case PIPE_CAP_TEXTURE_SHADOW_MAP: return 1; case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: - return 13; /* max 4Kx4K */ + return SP_MAX_TEXTURE_2D_LEVELS; case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: - return 9; /* max 256x256x256 */ + return SP_MAX_TEXTURE_3D_LEVELS; case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: - return 13; /* max 4Kx4K */ + return SP_MAX_TEXTURE_2D_LEVELS; case PIPE_CAP_TGSI_CONT_SUPPORTED: return 1; case PIPE_CAP_BLEND_EQUATION_SEPARATE: @@ -142,39 +145,87 @@ static boolean softpipe_is_format_supported( struct pipe_screen *screen, enum pipe_format format, enum pipe_texture_target target, - unsigned tex_usage, + unsigned bind, unsigned geom_flags ) { + struct sw_winsys *winsys = softpipe_screen(screen)->winsys; + const struct util_format_description *format_desc; + assert(target == PIPE_TEXTURE_1D || target == PIPE_TEXTURE_2D || target == PIPE_TEXTURE_3D || target == PIPE_TEXTURE_CUBE); - switch(format) { - case PIPE_FORMAT_L16_UNORM: - case PIPE_FORMAT_YUYV: - case PIPE_FORMAT_UYVY: - case PIPE_FORMAT_DXT1_RGB: - case PIPE_FORMAT_DXT1_RGBA: - case PIPE_FORMAT_DXT3_RGBA: - case PIPE_FORMAT_DXT5_RGBA: - case PIPE_FORMAT_Z32_FLOAT: - case PIPE_FORMAT_R8G8_SNORM: - case PIPE_FORMAT_R5SG5SB6U_NORM: - case PIPE_FORMAT_R8SG8SB8UX8U_NORM: - case PIPE_FORMAT_R8G8B8A8_SNORM: - case PIPE_FORMAT_NONE: + format_desc = util_format_description(format); + if (!format_desc) return FALSE; - default: - return TRUE; + + if (bind & (PIPE_BIND_DISPLAY_TARGET | + PIPE_BIND_SCANOUT | + PIPE_BIND_SHARED)) { + if(!winsys->is_displaytarget_format_supported(winsys, bind, format)) + return FALSE; + } + + if (bind & PIPE_BIND_RENDER_TARGET) { + if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS) + return FALSE; + + /* + * Although possible, it is unnatural to render into compressed or YUV + * surfaces. So disable these here to avoid going into weird paths + * inside the state trackers. + */ + if (format_desc->block.width != 1 || + format_desc->block.height != 1) + return FALSE; + + /* + * TODO: Unfortunately we cannot render into anything more than 32 bits + * because we encode color clear values into a 32bit word. + */ + if (format_desc->block.bits > 32) + return FALSE; + } + + if (bind & PIPE_BIND_DEPTH_STENCIL) { + if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS) + return FALSE; + + /* + * TODO: Unfortunately we cannot render into anything more than 32 bits + * because we encode depth and stencil clear values into a 32bit word. + */ + if (format_desc->block.bits > 32) + return FALSE; + + /* + * TODO: eliminate this restriction + */ + if (format == PIPE_FORMAT_Z32_FLOAT) + return FALSE; + } + + /* + * All other operations (sampling, transfer, etc). + */ + + if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) { + return util_format_s3tc_enabled; } + + /* + * Everything else should be supported by u_format. + */ + return TRUE; } static void softpipe_destroy_screen( struct pipe_screen *screen ) { - struct pipe_winsys *winsys = screen->winsys; + struct softpipe_screen *sp_screen = softpipe_screen(screen); + struct sw_winsys *winsys = sp_screen->winsys; if(winsys->destroy) winsys->destroy(winsys); @@ -183,21 +234,37 @@ softpipe_destroy_screen( struct pipe_screen *screen ) } +/* This is often overriden by the co-state tracker. + */ +static void +softpipe_flush_frontbuffer(struct pipe_screen *_screen, + struct pipe_surface *surface, + void *context_private) +{ + struct softpipe_screen *screen = softpipe_screen(_screen); + struct sw_winsys *winsys = screen->winsys; + struct softpipe_resource *texture = softpipe_resource(surface->texture); + + assert(texture->dt); + if (texture->dt) + winsys->displaytarget_display(winsys, texture->dt, context_private); +} /** * Create a new pipe_screen object * Note: we're not presently subclassing pipe_screen (no softpipe_screen). */ struct pipe_screen * -softpipe_create_screen(struct pipe_winsys *winsys) +softpipe_create_screen(struct sw_winsys *winsys) { struct softpipe_screen *screen = CALLOC_STRUCT(softpipe_screen); if (!screen) return NULL; - screen->base.winsys = winsys; + screen->winsys = winsys; + screen->base.winsys = NULL; screen->base.destroy = softpipe_destroy_screen; screen->base.get_name = softpipe_get_name; @@ -206,9 +273,12 @@ softpipe_create_screen(struct pipe_winsys *winsys) screen->base.get_paramf = softpipe_get_paramf; screen->base.is_format_supported = softpipe_is_format_supported; screen->base.context_create = softpipe_create_context; + screen->base.flush_frontbuffer = softpipe_flush_frontbuffer; + + util_format_s3tc_init(); softpipe_init_screen_texture_funcs(&screen->base); - u_simple_screen_init(&screen->base); + softpipe_init_screen_fence_funcs(&screen->base); return &screen->base; } diff --git a/src/gallium/drivers/softpipe/sp_screen.h b/src/gallium/drivers/softpipe/sp_screen.h index 3d4bfd3e840..f741454c9e5 100644 --- a/src/gallium/drivers/softpipe/sp_screen.h +++ b/src/gallium/drivers/softpipe/sp_screen.h @@ -35,10 +35,13 @@ #include "pipe/p_defines.h" +struct sw_winsys; struct softpipe_screen { struct pipe_screen base; + struct sw_winsys *winsys; + /* Increments whenever textures are modified. Contexts can track * this. */ @@ -55,4 +58,5 @@ softpipe_screen( struct pipe_screen *pipe ) } + #endif /* SP_SCREEN_H */ diff --git a/src/gallium/drivers/softpipe/sp_setup.c b/src/gallium/drivers/softpipe/sp_setup.c index 85966bc5e49..86354664e4b 100644 --- a/src/gallium/drivers/softpipe/sp_setup.c +++ b/src/gallium/drivers/softpipe/sp_setup.c @@ -47,6 +47,7 @@ #define DEBUG_VERTS 0 #define DEBUG_FRAGS 0 + /** * Triangle edge info */ @@ -59,11 +60,16 @@ struct edge { }; +/** + * Max number of quads (2x2 pixel blocks) to process per batch. + * This can't be arbitrarily increased since we depend on some 32-bit + * bitmasks (two bits per quad). + */ #define MAX_QUADS 16 /** - * Triangle setup info (derived from draw_stage). + * Triangle setup info. * Also used for line drawing (taking some liberties). */ struct setup_context { @@ -140,7 +146,7 @@ cull_tri(const struct setup_context *setup, float det) * Clip setup->quad against the scissor/surface bounds. */ static INLINE void -quad_clip( struct setup_context *setup, struct quad_header *quad ) +quad_clip(struct setup_context *setup, struct quad_header *quad) { const struct pipe_scissor_state *cliprect = &setup->softpipe->cliprect; const int minx = (int) cliprect->minx; @@ -171,7 +177,7 @@ quad_clip( struct setup_context *setup, struct quad_header *quad ) * Emit a quad (pass to next stage) with clipping. */ static INLINE void -clip_emit_quad( struct setup_context *setup, struct quad_header *quad ) +clip_emit_quad(struct setup_context *setup, struct quad_header *quad) { quad_clip( setup, quad ); @@ -188,12 +194,15 @@ clip_emit_quad( struct setup_context *setup, struct quad_header *quad ) * Given an X or Y coordinate, return the block/quad coordinate that it * belongs to. */ -static INLINE int block( int x ) +static INLINE int +block(int x) { return x & ~(2-1); } -static INLINE int block_x( int x ) + +static INLINE int +block_x(int x) { return x & ~(16-1); } @@ -202,9 +211,10 @@ static INLINE int block_x( int x ) /** * Render a horizontal span of quads */ -static void flush_spans( struct setup_context *setup ) +static void +flush_spans(struct setup_context *setup) { - const int step = 16; + const int step = MAX_QUADS; const int xleft0 = setup->span.left[0]; const int xleft1 = setup->span.left[1]; const int xright0 = setup->span.right[0]; @@ -265,8 +275,9 @@ static void flush_spans( struct setup_context *setup ) #if DEBUG_VERTS -static void print_vertex(const struct setup_context *setup, - const float (*v)[4]) +static void +print_vertex(const struct setup_context *setup, + const float (*v)[4]) { int i; debug_printf(" Vertex: (%p)\n", (void *) v); @@ -280,16 +291,18 @@ static void print_vertex(const struct setup_context *setup, } #endif + /** * Sort the vertices from top to bottom order, setting up the triangle * edge fields (ebot, emaj, etop). * \return FALSE if coords are inf/nan (cull the tri), TRUE otherwise */ -static boolean setup_sort_vertices( struct setup_context *setup, - float det, - const float (*v0)[4], - const float (*v1)[4], - const float (*v2)[4] ) +static boolean +setup_sort_vertices(struct setup_context *setup, + float det, + const float (*v0)[4], + const float (*v1)[4], + const float (*v2)[4]) { setup->vprovoke = v2; @@ -374,6 +387,7 @@ static boolean setup_sort_vertices( struct setup_context *setup, /* We need to know if this is a front or back-facing triangle for: * - the GLSL gl_FrontFacing fragment attribute (bool) * - two-sided stencil test + * 0 = front-facing, 1 = back-facing */ setup->facing = ((det > 0.0) ^ @@ -446,9 +460,10 @@ tri_apply_cylindrical_wrap(float v0, * \param slot which attribute slot * \param i which component of the slot (0..3) */ -static void const_coeff( struct setup_context *setup, - struct tgsi_interp_coef *coef, - uint vertSlot, uint i) +static void +const_coeff(struct setup_context *setup, + struct tgsi_interp_coef *coef, + uint vertSlot, uint i) { assert(i <= 3); @@ -590,7 +605,8 @@ setup_fragcoord_coeff(struct setup_context *setup, uint slot) * Compute the setup->coef[] array dadx, dady, a0 values. * Must be called after setup->vmin,vmid,vmax,vprovoke are initialized. */ -static void setup_tri_coefficients( struct setup_context *setup ) +static void +setup_tri_coefficients(struct setup_context *setup) { struct softpipe_context *softpipe = setup->softpipe; const struct sp_fragment_shader *spfs = softpipe->fs; @@ -649,7 +665,8 @@ static void setup_tri_coefficients( struct setup_context *setup ) } if (spfs->info.input_semantic_name[fragSlot] == TGSI_SEMANTIC_FACE) { - setup->coef[fragSlot].a0[0] = 1.0f - setup->facing; + /* convert 0 to 1.0 and 1 to -1.0 */ + setup->coef[fragSlot].a0[0] = setup->facing * -2.0f + 1.0f; setup->coef[fragSlot].dadx[0] = 0.0; setup->coef[fragSlot].dady[0] = 0.0; } @@ -657,8 +674,8 @@ static void setup_tri_coefficients( struct setup_context *setup ) } - -static void setup_tri_edges( struct setup_context *setup ) +static void +setup_tri_edges(struct setup_context *setup) { float vmin_x = setup->vmin[0][0] + setup->pixel_offset; float vmid_x = setup->vmid[0][0] + setup->pixel_offset; @@ -669,17 +686,17 @@ static void setup_tri_edges( struct setup_context *setup ) setup->emaj.sy = ceilf(vmin_y); setup->emaj.lines = (int) ceilf(vmax_y - setup->emaj.sy); - setup->emaj.dxdy = setup->emaj.dx / setup->emaj.dy; + setup->emaj.dxdy = setup->emaj.dy ? setup->emaj.dx / setup->emaj.dy : .0f; setup->emaj.sx = vmin_x + (setup->emaj.sy - vmin_y) * setup->emaj.dxdy; setup->etop.sy = ceilf(vmid_y); setup->etop.lines = (int) ceilf(vmax_y - setup->etop.sy); - setup->etop.dxdy = setup->etop.dx / setup->etop.dy; + setup->etop.dxdy = setup->etop.dy ? setup->etop.dx / setup->etop.dy : .0f; setup->etop.sx = vmid_x + (setup->etop.sy - vmid_y) * setup->etop.dxdy; setup->ebot.sy = ceilf(vmin_y); setup->ebot.lines = (int) ceilf(vmid_y - setup->ebot.sy); - setup->ebot.dxdy = setup->ebot.dx / setup->ebot.dy; + setup->ebot.dxdy = setup->ebot.dy ? setup->ebot.dx / setup->ebot.dy : .0f; setup->ebot.sx = vmin_x + (setup->ebot.sy - vmin_y) * setup->ebot.dxdy; } @@ -688,10 +705,11 @@ static void setup_tri_edges( struct setup_context *setup ) * Render the upper or lower half of a triangle. * Scissoring/cliprect is applied here too. */ -static void subtriangle( struct setup_context *setup, - struct edge *eleft, - struct edge *eright, - unsigned lines ) +static void +subtriangle(struct setup_context *setup, + struct edge *eleft, + struct edge *eright, + int lines) { const struct pipe_scissor_state *cliprect = &setup->softpipe->cliprect; const int minx = (int) cliprect->minx; @@ -702,6 +720,7 @@ static void subtriangle( struct setup_context *setup, int sy = (int)eleft->sy; assert((int)eleft->sy == (int) eright->sy); + assert(lines >= 0); /* clip top/bottom */ start_y = sy; @@ -764,9 +783,9 @@ static void subtriangle( struct setup_context *setup, * calculate it here. */ static float -calc_det( const float (*v0)[4], - const float (*v1)[4], - const float (*v2)[4] ) +calc_det(const float (*v0)[4], + const float (*v1)[4], + const float (*v2)[4]) { /* edge vectors e = v0 - v2, f = v1 - v2 */ const float ex = v0[0][0] - v2[0][0]; @@ -782,10 +801,11 @@ calc_det( const float (*v0)[4], /** * Do setup for triangle rasterization, then render the triangle. */ -void sp_setup_tri( struct setup_context *setup, - const float (*v0)[4], - const float (*v1)[4], - const float (*v2)[4] ) +void +sp_setup_tri(struct setup_context *setup, + const float (*v0)[4], + const float (*v1)[4], + const float (*v2)[4]) { float det; @@ -925,7 +945,7 @@ line_persp_coeff(const struct setup_context *setup, * Compute the setup->coef[] array dadx, dady, a0 values. * Must be called after setup->vmin,vmax are initialized. */ -static INLINE boolean +static boolean setup_line_coefficients(struct setup_context *setup, const float (*v0)[4], const float (*v1)[4]) @@ -1001,7 +1021,8 @@ setup_line_coefficients(struct setup_context *setup, } if (spfs->info.input_semantic_name[fragSlot] == TGSI_SEMANTIC_FACE) { - setup->coef[fragSlot].a0[0] = 1.0f - setup->facing; + /* convert 0 to 1.0 and 1 to -1.0 */ + setup->coef[fragSlot].a0[0] = setup->facing * -2.0f + 1.0f; setup->coef[fragSlot].dadx[0] = 0.0; setup->coef[fragSlot].dady[0] = 0.0; } @@ -1046,8 +1067,8 @@ plot(struct setup_context *setup, int x, int y) */ void sp_setup_line(struct setup_context *setup, - const float (*v0)[4], - const float (*v1)[4]) + const float (*v0)[4], + const float (*v1)[4]) { int x0 = (int) v0[0][0]; int x1 = (int) v1[0][0]; @@ -1175,8 +1196,8 @@ point_persp_coeff(const struct setup_context *setup, * XXX could optimize a lot for 1-pixel points. */ void -sp_setup_point( struct setup_context *setup, - const float (*v0)[4] ) +sp_setup_point(struct setup_context *setup, + const float (*v0)[4]) { struct softpipe_context *softpipe = setup->softpipe; const struct sp_fragment_shader *spfs = softpipe->fs; @@ -1247,7 +1268,8 @@ sp_setup_point( struct setup_context *setup, } if (spfs->info.input_semantic_name[fragSlot] == TGSI_SEMANTIC_FACE) { - setup->coef[fragSlot].a0[0] = 1.0f - setup->facing; + /* convert 0 to 1.0 and 1 to -1.0 */ + setup->coef[fragSlot].a0[0] = setup->facing * -2.0f + 1.0f; setup->coef[fragSlot].dadx[0] = 0.0; setup->coef[fragSlot].dady[0] = 0.0; } @@ -1376,7 +1398,12 @@ sp_setup_point( struct setup_context *setup, } } -void sp_setup_prepare( struct setup_context *setup ) + +/** + * Called by vbuf code just before we start buffering primitives. + */ +void +sp_setup_prepare(struct setup_context *setup) { struct softpipe_context *sp = setup->softpipe; @@ -1402,8 +1429,8 @@ void sp_setup_prepare( struct setup_context *setup ) } - -void sp_setup_destroy_context( struct setup_context *setup ) +void +sp_setup_destroy_context(struct setup_context *setup) { FREE( setup ); } @@ -1412,7 +1439,8 @@ void sp_setup_destroy_context( struct setup_context *setup ) /** * Create a new primitive setup/render stage. */ -struct setup_context *sp_setup_create_context( struct softpipe_context *softpipe ) +struct setup_context * +sp_setup_create_context(struct softpipe_context *softpipe) { struct setup_context *setup = CALLOC_STRUCT(setup_context); unsigned i; @@ -1429,4 +1457,3 @@ struct setup_context *sp_setup_create_context( struct softpipe_context *softpipe return setup; } - diff --git a/src/gallium/drivers/softpipe/sp_state.h b/src/gallium/drivers/softpipe/sp_state.h index 4370bbeaee2..f97fc6eca8f 100644 --- a/src/gallium/drivers/softpipe/sp_state.h +++ b/src/gallium/drivers/softpipe/sp_state.h @@ -100,6 +100,11 @@ struct sp_geometry_shader { struct draw_geometry_shader *draw_data; }; +struct sp_velems_state { + unsigned count; + struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS]; +}; + void * softpipe_create_blend_state(struct pipe_context *, @@ -145,7 +150,7 @@ void softpipe_set_clip_state( struct pipe_context *, void softpipe_set_constant_buffer(struct pipe_context *, uint shader, uint index, - struct pipe_buffer *buf); + struct pipe_resource *buf); void *softpipe_create_fs_state(struct pipe_context *, const struct pipe_shader_state *); @@ -160,28 +165,39 @@ void *softpipe_create_gs_state(struct pipe_context *, void softpipe_bind_gs_state(struct pipe_context *, void *); void softpipe_delete_gs_state(struct pipe_context *, void *); +void *softpipe_create_vertex_elements_state(struct pipe_context *, + unsigned count, + const struct pipe_vertex_element *); +void softpipe_bind_vertex_elements_state(struct pipe_context *, void *); +void softpipe_delete_vertex_elements_state(struct pipe_context *, void *); + void softpipe_set_polygon_stipple( struct pipe_context *, - const struct pipe_poly_stipple * ); + const struct pipe_poly_stipple * ); void softpipe_set_scissor_state( struct pipe_context *, const struct pipe_scissor_state * ); -void softpipe_set_sampler_textures( struct pipe_context *, - unsigned num, - struct pipe_texture ** ); +void softpipe_set_sampler_views( struct pipe_context *, + unsigned num, + struct pipe_sampler_view ** ); void -softpipe_set_vertex_sampler_textures(struct pipe_context *, - unsigned num_textures, - struct pipe_texture **); +softpipe_set_vertex_sampler_views(struct pipe_context *, + unsigned num, + struct pipe_sampler_view **); + +struct pipe_sampler_view * +softpipe_create_sampler_view(struct pipe_context *pipe, + struct pipe_resource *texture, + const struct pipe_sampler_view *templ); + +void +softpipe_sampler_view_destroy(struct pipe_context *pipe, + struct pipe_sampler_view *view); void softpipe_set_viewport_state( struct pipe_context *, const struct pipe_viewport_state * ); -void softpipe_set_vertex_elements(struct pipe_context *, - unsigned count, - const struct pipe_vertex_element *); - void softpipe_set_vertex_buffers(struct pipe_context *, unsigned count, const struct pipe_vertex_buffer *); @@ -194,13 +210,14 @@ void softpipe_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start, unsigned count); void softpipe_draw_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, - unsigned indexSize, + struct pipe_resource *indexBuffer, + unsigned indexSize, int indexBias, unsigned mode, unsigned start, unsigned count); void softpipe_draw_range_elements(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, + struct pipe_resource *indexBuffer, unsigned indexSize, + int indexBias, unsigned min_index, unsigned max_index, unsigned mode, unsigned start, unsigned count); @@ -215,8 +232,9 @@ softpipe_draw_arrays_instanced(struct pipe_context *pipe, void softpipe_draw_elements_instanced(struct pipe_context *pipe, - struct pipe_buffer *indexBuffer, + struct pipe_resource *indexBuffer, unsigned indexSize, + int indexBias, unsigned mode, unsigned start, unsigned count, diff --git a/src/gallium/drivers/softpipe/sp_state_derived.c b/src/gallium/drivers/softpipe/sp_state_derived.c index d2eda7324ca..4c6d4909f5b 100644 --- a/src/gallium/drivers/softpipe/sp_state_derived.c +++ b/src/gallium/drivers/softpipe/sp_state_derived.c @@ -202,7 +202,7 @@ update_tgsi_samplers( struct softpipe_context *softpipe ) for (i = 0; i < PIPE_MAX_SAMPLERS; i++) { struct softpipe_tex_tile_cache *tc = softpipe->tex_cache[i]; if (tc->texture) { - struct softpipe_texture *spt = softpipe_texture(tc->texture); + struct softpipe_resource *spt = softpipe_resource(tc->texture); if (spt->timestamp != tc->timestamp) { sp_tex_tile_cache_validate_texture( tc ); /* @@ -217,7 +217,7 @@ update_tgsi_samplers( struct softpipe_context *softpipe ) struct softpipe_tex_tile_cache *tc = softpipe->vertex_tex_cache[i]; if (tc->texture) { - struct softpipe_texture *spt = softpipe_texture(tc->texture); + struct softpipe_resource *spt = softpipe_resource(tc->texture); if (spt->timestamp != tc->timestamp) { sp_tex_tile_cache_validate_texture(tc); diff --git a/src/gallium/drivers/softpipe/sp_state_fs.c b/src/gallium/drivers/softpipe/sp_state_fs.c index c88e2137510..7f072f5a269 100644 --- a/src/gallium/drivers/softpipe/sp_state_fs.c +++ b/src/gallium/drivers/softpipe/sp_state_fs.c @@ -28,6 +28,7 @@ #include "sp_context.h" #include "sp_state.h" #include "sp_fs.h" +#include "sp_texture.h" #include "pipe/p_defines.h" #include "util/u_memory.h" @@ -163,26 +164,32 @@ softpipe_delete_vs_state(struct pipe_context *pipe, void *vs) FREE( state ); } - - void softpipe_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_buffer *buf) + struct pipe_resource *constants) { struct softpipe_context *softpipe = softpipe_context(pipe); + unsigned size = constants ? constants->width0 : 0; + const void *data = constants ? softpipe_resource(constants)->data : NULL; assert(shader < PIPE_SHADER_TYPES); - assert(index < PIPE_MAX_CONSTANT_BUFFERS); + assert(index == 0); draw_flush(softpipe->draw); /* note: reference counting */ - pipe_buffer_reference(&softpipe->constants[shader][index], buf); + pipe_resource_reference(&softpipe->constants[shader][index], constants); + if (shader == PIPE_SHADER_VERTEX || shader == PIPE_SHADER_GEOMETRY) { + draw_set_mapped_constant_buffer(softpipe->draw, shader, index, data, size); + } + + softpipe->mapped_constants[shader][index] = data; softpipe->dirty |= SP_NEW_CONSTANTS; } + void * softpipe_create_gs_state(struct pipe_context *pipe, const struct pipe_shader_state *templ) diff --git a/src/gallium/drivers/softpipe/sp_state_rasterizer.c b/src/gallium/drivers/softpipe/sp_state_rasterizer.c index a5b00336d44..c9ede09f268 100644 --- a/src/gallium/drivers/softpipe/sp_state_rasterizer.c +++ b/src/gallium/drivers/softpipe/sp_state_rasterizer.c @@ -49,7 +49,7 @@ void softpipe_bind_rasterizer_state(struct pipe_context *pipe, return; /* pass-through to draw module */ - draw_set_rasterizer_state(softpipe->draw, rasterizer); + draw_set_rasterizer_state(softpipe->draw, rasterizer, rasterizer); softpipe->rasterizer = rasterizer; diff --git a/src/gallium/drivers/softpipe/sp_state_sampler.c b/src/gallium/drivers/softpipe/sp_state_sampler.c index 9298023bbe2..2692f06c927 100644 --- a/src/gallium/drivers/softpipe/sp_state_sampler.c +++ b/src/gallium/drivers/softpipe/sp_state_sampler.c @@ -122,9 +122,38 @@ softpipe_bind_vertex_sampler_states(struct pipe_context *pipe, } +struct pipe_sampler_view * +softpipe_create_sampler_view(struct pipe_context *pipe, + struct pipe_resource *resource, + const struct pipe_sampler_view *templ) +{ + struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view); + + if (view) { + *view = *templ; + view->reference.count = 1; + view->texture = NULL; + pipe_resource_reference(&view->texture, resource); + view->context = pipe; + } + + return view; +} + + void -softpipe_set_sampler_textures(struct pipe_context *pipe, - unsigned num, struct pipe_texture **texture) +softpipe_sampler_view_destroy(struct pipe_context *pipe, + struct pipe_sampler_view *view) +{ + pipe_resource_reference(&view->texture, NULL); + FREE(view); +} + + +void +softpipe_set_sampler_views(struct pipe_context *pipe, + unsigned num, + struct pipe_sampler_view **views) { struct softpipe_context *softpipe = softpipe_context(pipe); uint i; @@ -132,51 +161,51 @@ softpipe_set_sampler_textures(struct pipe_context *pipe, assert(num <= PIPE_MAX_SAMPLERS); /* Check for no-op */ - if (num == softpipe->num_textures && - !memcmp(softpipe->texture, texture, num * sizeof(struct pipe_texture *))) + if (num == softpipe->num_sampler_views && + !memcmp(softpipe->sampler_views, views, num * sizeof(struct pipe_sampler_view *))) return; draw_flush(softpipe->draw); for (i = 0; i < PIPE_MAX_SAMPLERS; i++) { - struct pipe_texture *tex = i < num ? texture[i] : NULL; + struct pipe_sampler_view *view = i < num ? views[i] : NULL; - pipe_texture_reference(&softpipe->texture[i], tex); - sp_tex_tile_cache_set_texture(softpipe->tex_cache[i], tex); + pipe_sampler_view_reference(&softpipe->sampler_views[i], view); + sp_tex_tile_cache_set_sampler_view(softpipe->tex_cache[i], view); } - softpipe->num_textures = num; + softpipe->num_sampler_views = num; softpipe->dirty |= SP_NEW_TEXTURE; } void -softpipe_set_vertex_sampler_textures(struct pipe_context *pipe, - unsigned num_textures, - struct pipe_texture **textures) +softpipe_set_vertex_sampler_views(struct pipe_context *pipe, + unsigned num, + struct pipe_sampler_view **views) { struct softpipe_context *softpipe = softpipe_context(pipe); uint i; - assert(num_textures <= PIPE_MAX_VERTEX_SAMPLERS); + assert(num <= PIPE_MAX_VERTEX_SAMPLERS); /* Check for no-op */ - if (num_textures == softpipe->num_vertex_textures && - !memcmp(softpipe->vertex_textures, textures, num_textures * sizeof(struct pipe_texture *))) { + if (num == softpipe->num_vertex_sampler_views && + !memcmp(softpipe->vertex_sampler_views, views, num * sizeof(struct pipe_sampler_view *))) { return; } draw_flush(softpipe->draw); for (i = 0; i < PIPE_MAX_VERTEX_SAMPLERS; i++) { - struct pipe_texture *tex = i < num_textures ? textures[i] : NULL; + struct pipe_sampler_view *view = i < num ? views[i] : NULL; - pipe_texture_reference(&softpipe->vertex_textures[i], tex); - sp_tex_tile_cache_set_texture(softpipe->vertex_tex_cache[i], tex); + pipe_sampler_view_reference(&softpipe->vertex_sampler_views[i], view); + sp_tex_tile_cache_set_sampler_view(softpipe->vertex_tex_cache[i], view); } - softpipe->num_vertex_textures = num_textures; + softpipe->num_vertex_sampler_views = num; softpipe->dirty |= SP_NEW_TEXTURE; } @@ -195,10 +224,10 @@ softpipe_set_vertex_sampler_textures(struct pipe_context *pipe, static struct sp_sampler_varient * get_sampler_varient( unsigned unit, struct sp_sampler *sampler, - struct pipe_texture *texture, + struct pipe_resource *resource, unsigned processor ) { - struct softpipe_texture *sp_texture = softpipe_texture(texture); + struct softpipe_resource *sp_texture = softpipe_resource(resource); struct sp_sampler_varient *v = NULL; union sp_sampler_key key; @@ -246,29 +275,41 @@ softpipe_reset_sampler_varients(struct softpipe_context *softpipe) */ for (i = 0; i <= softpipe->vs->max_sampler; i++) { if (softpipe->vertex_samplers[i]) { + struct pipe_resource *texture = NULL; + + if (softpipe->vertex_sampler_views[i]) { + texture = softpipe->vertex_sampler_views[i]->texture; + } + softpipe->tgsi.vert_samplers_list[i] = get_sampler_varient( i, - sp_sampler(softpipe->vertex_samplers[i]), - softpipe->vertex_textures[i], + sp_sampler(softpipe->vertex_samplers[i]), + texture, TGSI_PROCESSOR_VERTEX ); sp_sampler_varient_bind_texture( softpipe->tgsi.vert_samplers_list[i], - softpipe->vertex_tex_cache[i], - softpipe->vertex_textures[i] ); + softpipe->vertex_tex_cache[i], + texture ); } } for (i = 0; i <= softpipe->fs->info.file_max[TGSI_FILE_SAMPLER]; i++) { if (softpipe->sampler[i]) { + struct pipe_resource *texture = NULL; + + if (softpipe->sampler_views[i]) { + texture = softpipe->sampler_views[i]->texture; + } + softpipe->tgsi.frag_samplers_list[i] = get_sampler_varient( i, sp_sampler(softpipe->sampler[i]), - softpipe->texture[i], + texture, TGSI_PROCESSOR_FRAGMENT ); sp_sampler_varient_bind_texture( softpipe->tgsi.frag_samplers_list[i], softpipe->tex_cache[i], - softpipe->texture[i] ); + texture ); } } } diff --git a/src/gallium/drivers/softpipe/sp_state_vertex.c b/src/gallium/drivers/softpipe/sp_state_vertex.c index b491d92ed15..462f4d2655e 100644 --- a/src/gallium/drivers/softpipe/sp_state_vertex.c +++ b/src/gallium/drivers/softpipe/sp_state_vertex.c @@ -32,27 +32,45 @@ #include "sp_context.h" #include "sp_state.h" +#include "util/u_memory.h" #include "draw/draw_context.h" +void * +softpipe_create_vertex_elements_state(struct pipe_context *pipe, + unsigned count, + const struct pipe_vertex_element *attribs) +{ + struct sp_velems_state *velems; + assert(count <= PIPE_MAX_ATTRIBS); + velems = (struct sp_velems_state *) MALLOC(sizeof(struct sp_velems_state)); + if (velems) { + velems->count = count; + memcpy(velems->velem, attribs, sizeof(*attribs) * count); + } + return velems; +} + void -softpipe_set_vertex_elements(struct pipe_context *pipe, - unsigned count, - const struct pipe_vertex_element *attribs) +softpipe_bind_vertex_elements_state(struct pipe_context *pipe, + void *velems) { struct softpipe_context *softpipe = softpipe_context(pipe); + struct sp_velems_state *sp_velems = (struct sp_velems_state *) velems; - assert(count <= PIPE_MAX_ATTRIBS); - - memcpy(softpipe->vertex_element, attribs, - count * sizeof(struct pipe_vertex_element)); - softpipe->num_vertex_elements = count; + softpipe->velems = sp_velems; softpipe->dirty |= SP_NEW_VERTEX; - draw_set_vertex_elements(softpipe->draw, count, attribs); + if (sp_velems) + draw_set_vertex_elements(softpipe->draw, sp_velems->count, sp_velems->velem); } +void +softpipe_delete_vertex_elements_state(struct pipe_context *pipe, void *velems) +{ + FREE( velems ); +} void softpipe_set_vertex_buffers(struct pipe_context *pipe, diff --git a/src/gallium/drivers/softpipe/sp_tex_sample.c b/src/gallium/drivers/softpipe/sp_tex_sample.c index b3a79732b46..ff83c66d8b2 100644 --- a/src/gallium/drivers/softpipe/sp_tex_sample.c +++ b/src/gallium/drivers/softpipe/sp_tex_sample.c @@ -437,8 +437,7 @@ wrap_linear_mirror_clamp_to_border(const float s[4], unsigned size, /** - * For RECT textures / unnormalized texcoords - * Only a subset of wrap modes supported. + * PIPE_TEX_WRAP_CLAMP for nearest sampling, unnormalized coords. */ static void wrap_nearest_unorm_clamp(const float s[4], unsigned size, int icoord[4]) @@ -452,7 +451,7 @@ wrap_nearest_unorm_clamp(const float s[4], unsigned size, int icoord[4]) /** - * Handles clamp_to_edge and clamp_to_border: + * PIPE_TEX_WRAP_CLAMP_TO_BORDER for nearest sampling, unnormalized coords. */ static void wrap_nearest_unorm_clamp_to_border(const float s[4], unsigned size, @@ -460,14 +459,27 @@ wrap_nearest_unorm_clamp_to_border(const float s[4], unsigned size, { uint ch; for (ch = 0; ch < 4; ch++) { + icoord[ch]= util_ifloor( CLAMP(s[ch], -0.5F, (float) size + 0.5F) ); + } +} + + +/** + * PIPE_TEX_WRAP_CLAMP_TO_EDGE for nearest sampling, unnormalized coords. + */ +static void +wrap_nearest_unorm_clamp_to_edge(const float s[4], unsigned size, + int icoord[4]) +{ + uint ch; + for (ch = 0; ch < 4; ch++) { icoord[ch]= util_ifloor( CLAMP(s[ch], 0.5F, (float) size - 0.5F) ); } } /** - * For RECT textures / unnormalized texcoords. - * Only a subset of wrap modes supported. + * PIPE_TEX_WRAP_CLAMP for linear sampling, unnormalized coords. */ static void wrap_linear_unorm_clamp(const float s[4], unsigned size, @@ -484,13 +496,36 @@ wrap_linear_unorm_clamp(const float s[4], unsigned size, } +/** + * PIPE_TEX_WRAP_CLAMP_TO_BORDER for linear sampling, unnormalized coords. + */ static void wrap_linear_unorm_clamp_to_border(const float s[4], unsigned size, int icoord0[4], int icoord1[4], float w[4]) { uint ch; for (ch = 0; ch < 4; ch++) { - float u = CLAMP(s[ch], 0.5F, (float) size - 0.5F); + float u = CLAMP(s[ch], -0.5F, (float) size + 0.5F); + u -= 0.5F; + icoord0[ch] = util_ifloor(u); + icoord1[ch] = icoord0[ch] + 1; + if (icoord1[ch] > (int) size - 1) + icoord1[ch] = size - 1; + w[ch] = frac(u); + } +} + + +/** + * PIPE_TEX_WRAP_CLAMP_TO_EDGE for linear sampling, unnormalized coords. + */ +static void +wrap_linear_unorm_clamp_to_edge(const float s[4], unsigned size, + int icoord0[4], int icoord1[4], float w[4]) +{ + uint ch; + for (ch = 0; ch < 4; ch++) { + float u = CLAMP(s[ch], +0.5F, (float) size - 0.5F); u -= 0.5F; icoord0[ch] = util_ifloor(u); icoord1[ch] = icoord0[ch] + 1; @@ -512,7 +547,7 @@ compute_lambda_1d(const struct sp_sampler_varient *samp, const float t[QUAD_SIZE], const float p[QUAD_SIZE]) { - const struct pipe_texture *texture = samp->texture; + const struct pipe_resource *texture = samp->texture; float dsdx = fabsf(s[QUAD_BOTTOM_RIGHT] - s[QUAD_BOTTOM_LEFT]); float dsdy = fabsf(s[QUAD_TOP_LEFT] - s[QUAD_BOTTOM_LEFT]); float rho = MAX2(dsdx, dsdy) * texture->width0; @@ -527,7 +562,7 @@ compute_lambda_2d(const struct sp_sampler_varient *samp, const float t[QUAD_SIZE], const float p[QUAD_SIZE]) { - const struct pipe_texture *texture = samp->texture; + const struct pipe_resource *texture = samp->texture; float dsdx = fabsf(s[QUAD_BOTTOM_RIGHT] - s[QUAD_BOTTOM_LEFT]); float dsdy = fabsf(s[QUAD_TOP_LEFT] - s[QUAD_BOTTOM_LEFT]); float dtdx = fabsf(t[QUAD_BOTTOM_RIGHT] - t[QUAD_BOTTOM_LEFT]); @@ -546,7 +581,7 @@ compute_lambda_3d(const struct sp_sampler_varient *samp, const float t[QUAD_SIZE], const float p[QUAD_SIZE]) { - const struct pipe_texture *texture = samp->texture; + const struct pipe_resource *texture = samp->texture; float dsdx = fabsf(s[QUAD_BOTTOM_RIGHT] - s[QUAD_BOTTOM_LEFT]); float dsdy = fabsf(s[QUAD_TOP_LEFT] - s[QUAD_BOTTOM_LEFT]); float dtdx = fabsf(t[QUAD_BOTTOM_RIGHT] - t[QUAD_BOTTOM_LEFT]); @@ -616,7 +651,7 @@ static INLINE const float * get_texel_2d(const struct sp_sampler_varient *samp, union tex_tile_address addr, int x, int y) { - const struct pipe_texture *texture = samp->texture; + const struct pipe_resource *texture = samp->texture; unsigned level = addr.bits.level; if (x < 0 || x >= (int) u_minify(texture->width0, level) || @@ -709,7 +744,7 @@ static INLINE const float * get_texel_3d(const struct sp_sampler_varient *samp, union tex_tile_address addr, int x, int y, int z) { - const struct pipe_texture *texture = samp->texture; + const struct pipe_resource *texture = samp->texture; unsigned level = addr.bits.level; if (x < 0 || x >= (int) u_minify(texture->width0, level) || @@ -897,7 +932,7 @@ img_filter_1d_nearest(struct tgsi_sampler *tgsi_sampler, float rgba[NUM_CHANNELS][QUAD_SIZE]) { const struct sp_sampler_varient *samp = sp_sampler_varient(tgsi_sampler); - const struct pipe_texture *texture = samp->texture; + const struct pipe_resource *texture = samp->texture; unsigned level0, j; int width; int x[4]; @@ -933,7 +968,7 @@ img_filter_2d_nearest(struct tgsi_sampler *tgsi_sampler, float rgba[NUM_CHANNELS][QUAD_SIZE]) { const struct sp_sampler_varient *samp = sp_sampler_varient(tgsi_sampler); - const struct pipe_texture *texture = samp->texture; + const struct pipe_resource *texture = samp->texture; unsigned level0, j; int width, height; int x[4], y[4]; @@ -981,7 +1016,7 @@ img_filter_cube_nearest(struct tgsi_sampler *tgsi_sampler, float rgba[NUM_CHANNELS][QUAD_SIZE]) { const struct sp_sampler_varient *samp = sp_sampler_varient(tgsi_sampler); - const struct pipe_texture *texture = samp->texture; + const struct pipe_resource *texture = samp->texture; const unsigned *faces = samp->faces; /* zero when not cube-mapping */ unsigned level0, j; int width, height; @@ -1021,7 +1056,7 @@ img_filter_3d_nearest(struct tgsi_sampler *tgsi_sampler, float rgba[NUM_CHANNELS][QUAD_SIZE]) { const struct sp_sampler_varient *samp = sp_sampler_varient(tgsi_sampler); - const struct pipe_texture *texture = samp->texture; + const struct pipe_resource *texture = samp->texture; unsigned level0, j; int width, height, depth; int x[4], y[4], z[4]; @@ -1063,7 +1098,7 @@ img_filter_1d_linear(struct tgsi_sampler *tgsi_sampler, float rgba[NUM_CHANNELS][QUAD_SIZE]) { const struct sp_sampler_varient *samp = sp_sampler_varient(tgsi_sampler); - const struct pipe_texture *texture = samp->texture; + const struct pipe_resource *texture = samp->texture; unsigned level0, j; int width; int x0[4], x1[4]; @@ -1103,7 +1138,7 @@ img_filter_2d_linear(struct tgsi_sampler *tgsi_sampler, float rgba[NUM_CHANNELS][QUAD_SIZE]) { const struct sp_sampler_varient *samp = sp_sampler_varient(tgsi_sampler); - const struct pipe_texture *texture = samp->texture; + const struct pipe_resource *texture = samp->texture; unsigned level0, j; int width, height; int x0[4], y0[4], x1[4], y1[4]; @@ -1150,7 +1185,7 @@ img_filter_cube_linear(struct tgsi_sampler *tgsi_sampler, float rgba[NUM_CHANNELS][QUAD_SIZE]) { const struct sp_sampler_varient *samp = sp_sampler_varient(tgsi_sampler); - const struct pipe_texture *texture = samp->texture; + const struct pipe_resource *texture = samp->texture; const unsigned *faces = samp->faces; /* zero when not cube-mapping */ unsigned level0, j; int width, height; @@ -1199,7 +1234,7 @@ img_filter_3d_linear(struct tgsi_sampler *tgsi_sampler, float rgba[NUM_CHANNELS][QUAD_SIZE]) { const struct sp_sampler_varient *samp = sp_sampler_varient(tgsi_sampler); - const struct pipe_texture *texture = samp->texture; + const struct pipe_resource *texture = samp->texture; unsigned level0, j; int width, height, depth; int x0[4], x1[4], y0[4], y1[4], z0[4], z1[4]; @@ -1275,7 +1310,7 @@ mip_filter_linear(struct tgsi_sampler *tgsi_sampler, float rgba[NUM_CHANNELS][QUAD_SIZE]) { struct sp_sampler_varient *samp = sp_sampler_varient(tgsi_sampler); - const struct pipe_texture *texture = samp->texture; + const struct pipe_resource *texture = samp->texture; int level0; float lambda; float lod[QUAD_SIZE]; @@ -1338,7 +1373,7 @@ mip_filter_nearest(struct tgsi_sampler *tgsi_sampler, float rgba[NUM_CHANNELS][QUAD_SIZE]) { struct sp_sampler_varient *samp = sp_sampler_varient(tgsi_sampler); - const struct pipe_texture *texture = samp->texture; + const struct pipe_resource *texture = samp->texture; float lambda; float lod[QUAD_SIZE]; @@ -1426,7 +1461,7 @@ mip_filter_linear_2d_linear_repeat_POT( float rgba[NUM_CHANNELS][QUAD_SIZE]) { struct sp_sampler_varient *samp = sp_sampler_varient(tgsi_sampler); - const struct pipe_texture *texture = samp->texture; + const struct pipe_resource *texture = samp->texture; int level0; float lambda; float lod[QUAD_SIZE]; @@ -1579,7 +1614,6 @@ sample_cube(struct tgsi_sampler *tgsi_sampler, struct sp_sampler_varient *samp = sp_sampler_varient(tgsi_sampler); unsigned j; float ssss[4], tttt[4]; - unsigned face; /* major axis @@ -1593,7 +1627,8 @@ sample_cube(struct tgsi_sampler *tgsi_sampler, -rz TEXTURE_CUBE_MAP_NEGATIVE_Z_EXT -rx -ry rz */ - /* First choose the cube face. + /* Choose the cube face and compute new s/t coords for the 2D face. + * * Use the same cube face for all four pixels in the quad. * * This isn't ideal, but if we want to use a different cube face @@ -1612,82 +1647,34 @@ sample_cube(struct tgsi_sampler *tgsi_sampler, const float arx = fabsf(rx), ary = fabsf(ry), arz = fabsf(rz); if (arx >= ary && arx >= arz) { - if (rx >= 0.0F) { - face = PIPE_TEX_FACE_POS_X; - } - else { - face = PIPE_TEX_FACE_NEG_X; + float sign = (rx >= 0.0F) ? 1.0F : -1.0F; + uint face = (rx >= 0.0F) ? PIPE_TEX_FACE_POS_X : PIPE_TEX_FACE_NEG_X; + for (j = 0; j < QUAD_SIZE; j++) { + const float ima = -0.5F / fabsf(s[j]); + ssss[j] = sign * p[j] * ima + 0.5F; + tttt[j] = t[j] * ima + 0.5F; + samp->faces[j] = face; } } else if (ary >= arx && ary >= arz) { - if (ry >= 0.0F) { - face = PIPE_TEX_FACE_POS_Y; - } - else { - face = PIPE_TEX_FACE_NEG_Y; + float sign = (ry >= 0.0F) ? 1.0F : -1.0F; + uint face = (ry >= 0.0F) ? PIPE_TEX_FACE_POS_Y : PIPE_TEX_FACE_NEG_Y; + for (j = 0; j < QUAD_SIZE; j++) { + const float ima = -0.5F / fabsf(t[j]); + ssss[j] = -s[j] * ima + 0.5F; + tttt[j] = sign * -p[j] * ima + 0.5F; + samp->faces[j] = face; } } else { - if (rz > 0.0F) { - face = PIPE_TEX_FACE_POS_Z; + float sign = (rz >= 0.0F) ? 1.0F : -1.0F; + uint face = (rz >= 0.0F) ? PIPE_TEX_FACE_POS_Z : PIPE_TEX_FACE_NEG_Z; + for (j = 0; j < QUAD_SIZE; j++) { + const float ima = -0.5 / fabsf(p[j]); + ssss[j] = sign * -s[j] * ima + 0.5F; + tttt[j] = t[j] * ima + 0.5F; + samp->faces[j] = face; } - else { - face = PIPE_TEX_FACE_NEG_Z; - } - } - } - - /* Now compute the 2D _face_ texture coords from the - * 3D _cube_ texture coords. - */ - for (j = 0; j < QUAD_SIZE; j++) { - const float rx = s[j], ry = t[j], rz = p[j]; - const float arx = fabsf(rx), ary = fabsf(ry), arz = fabsf(rz); - float sc, tc, ma; - - switch (face) { - case PIPE_TEX_FACE_POS_X: - sc = -rz; - tc = -ry; - ma = arx; - break; - case PIPE_TEX_FACE_NEG_X: - sc = rz; - tc = -ry; - ma = arx; - break; - case PIPE_TEX_FACE_POS_Y: - sc = rx; - tc = rz; - ma = ary; - break; - case PIPE_TEX_FACE_NEG_Y: - sc = rx; - tc = -rz; - ma = ary; - break; - case PIPE_TEX_FACE_POS_Z: - sc = rx; - tc = -ry; - ma = arz; - break; - case PIPE_TEX_FACE_NEG_Z: - sc = -rx; - tc = -ry; - ma = arz; - break; - default: - assert(0 && "bad cube face"); - sc = 0.0F; - tc = 0.0F; - ma = 0.0F; - } - - { - const float ima = 1.0 / ma; - ssss[j] = ( sc * ima + 1.0F ) * 0.5F; - tttt[j] = ( tc * ima + 1.0F ) * 0.5F; - samp->faces[j] = face; } } @@ -1707,6 +1694,7 @@ get_nearest_unorm_wrap(unsigned mode) case PIPE_TEX_WRAP_CLAMP: return wrap_nearest_unorm_clamp; case PIPE_TEX_WRAP_CLAMP_TO_EDGE: + return wrap_nearest_unorm_clamp_to_edge; case PIPE_TEX_WRAP_CLAMP_TO_BORDER: return wrap_nearest_unorm_clamp_to_border; default: @@ -1750,6 +1738,7 @@ get_linear_unorm_wrap(unsigned mode) case PIPE_TEX_WRAP_CLAMP: return wrap_linear_unorm_clamp; case PIPE_TEX_WRAP_CLAMP_TO_EDGE: + return wrap_linear_unorm_clamp_to_edge; case PIPE_TEX_WRAP_CLAMP_TO_BORDER: return wrap_linear_unorm_clamp_to_border; default: @@ -1878,7 +1867,7 @@ get_img_filter(const union sp_sampler_key key, void sp_sampler_varient_bind_texture( struct sp_sampler_varient *samp, struct softpipe_tex_tile_cache *tex_cache, - const struct pipe_texture *texture ) + const struct pipe_resource *texture ) { const struct pipe_sampler_state *sampler = samp->sampler; diff --git a/src/gallium/drivers/softpipe/sp_tex_sample.h b/src/gallium/drivers/softpipe/sp_tex_sample.h index b6e66c998ae..6114acf7371 100644 --- a/src/gallium/drivers/softpipe/sp_tex_sample.h +++ b/src/gallium/drivers/softpipe/sp_tex_sample.h @@ -85,7 +85,7 @@ struct sp_sampler_varient /* Currently bound texture: */ - const struct pipe_texture *texture; + const struct pipe_resource *texture; struct softpipe_tex_tile_cache *cache; unsigned processor; @@ -129,7 +129,7 @@ sp_create_sampler_varient( const struct pipe_sampler_state *sampler, void sp_sampler_varient_bind_texture( struct sp_sampler_varient *varient, struct softpipe_tex_tile_cache *tex_cache, - const struct pipe_texture *tex ); + const struct pipe_resource *tex ); void sp_sampler_varient_destroy( struct sp_sampler_varient * ); diff --git a/src/gallium/drivers/softpipe/sp_tex_tile_cache.c b/src/gallium/drivers/softpipe/sp_tex_tile_cache.c index a0b95c88846..fbce9e042ba 100644 --- a/src/gallium/drivers/softpipe/sp_tex_tile_cache.c +++ b/src/gallium/drivers/softpipe/sp_tex_tile_cache.c @@ -43,14 +43,14 @@ struct softpipe_tex_tile_cache * -sp_create_tex_tile_cache( struct pipe_screen *screen ) +sp_create_tex_tile_cache( struct pipe_context *pipe ) { struct softpipe_tex_tile_cache *tc; uint pos; tc = CALLOC_STRUCT( softpipe_tex_tile_cache ); if (tc) { - tc->screen = screen; + tc->pipe = pipe; for (pos = 0; pos < NUM_ENTRIES; pos++) { tc->entries[pos].addr.bits.invalid = 1; } @@ -63,19 +63,16 @@ sp_create_tex_tile_cache( struct pipe_screen *screen ) void sp_destroy_tex_tile_cache(struct softpipe_tex_tile_cache *tc) { - struct pipe_screen *screen; uint pos; for (pos = 0; pos < NUM_ENTRIES; pos++) { /*assert(tc->entries[pos].x < 0);*/ } if (tc->transfer) { - screen = tc->transfer->texture->screen; - screen->tex_transfer_destroy(tc->transfer); + tc->pipe->transfer_destroy(tc->pipe, tc->transfer); } if (tc->tex_trans) { - screen = tc->tex_trans->texture->screen; - screen->tex_transfer_destroy(tc->tex_trans); + tc->pipe->transfer_destroy(tc->pipe, tc->tex_trans); } FREE( tc ); @@ -88,7 +85,7 @@ void sp_tex_tile_cache_map_transfers(struct softpipe_tex_tile_cache *tc) { if (tc->tex_trans && !tc->tex_trans_map) - tc->tex_trans_map = tc->screen->transfer_map(tc->screen, tc->tex_trans); + tc->tex_trans_map = tc->pipe->transfer_map(tc->pipe, tc->tex_trans); } @@ -96,7 +93,7 @@ void sp_tex_tile_cache_unmap_transfers(struct softpipe_tex_tile_cache *tc) { if (tc->tex_trans_map) { - tc->screen->transfer_unmap(tc->screen, tc->tex_trans); + tc->pipe->transfer_unmap(tc->pipe, tc->tex_trans); tc->tex_trans_map = NULL; } } @@ -119,31 +116,38 @@ sp_tex_tile_cache_validate_texture(struct softpipe_tex_tile_cache *tc) } /** - * Specify the texture to cache. + * Specify the sampler view to cache. */ void -sp_tex_tile_cache_set_texture(struct softpipe_tex_tile_cache *tc, - struct pipe_texture *texture) +sp_tex_tile_cache_set_sampler_view(struct softpipe_tex_tile_cache *tc, + struct pipe_sampler_view *view) { + struct pipe_resource *texture = view ? view->texture : NULL; uint i; assert(!tc->transfer); if (tc->texture != texture) { - pipe_texture_reference(&tc->texture, texture); + pipe_resource_reference(&tc->texture, texture); if (tc->tex_trans) { - struct pipe_screen *screen = tc->tex_trans->texture->screen; - if (tc->tex_trans_map) { - screen->transfer_unmap(screen, tc->tex_trans); + tc->pipe->transfer_unmap(tc->pipe, tc->tex_trans); tc->tex_trans_map = NULL; } - screen->tex_transfer_destroy(tc->tex_trans); + tc->pipe->transfer_destroy(tc->pipe, tc->tex_trans); tc->tex_trans = NULL; } + if (view) { + tc->swizzle_r = view->swizzle_r; + tc->swizzle_g = view->swizzle_g; + tc->swizzle_b = view->swizzle_b; + tc->swizzle_a = view->swizzle_a; + tc->format = view->format; + } + /* mark as entries as invalid/empty */ /* XXX we should try to avoid this when the teximage hasn't changed */ for (i = 0; i < NUM_ENTRIES; i++) { @@ -204,7 +208,6 @@ const struct softpipe_tex_cached_tile * sp_find_cached_tile_tex(struct softpipe_tex_tile_cache *tc, union tex_tile_address addr ) { - struct pipe_screen *screen = tc->screen; struct softpipe_tex_cached_tile *tile; tile = tc->entries + tex_cache_pos( addr ); @@ -232,24 +235,25 @@ sp_find_cached_tile_tex(struct softpipe_tex_tile_cache *tc, if (tc->tex_trans) { if (tc->tex_trans_map) { - tc->screen->transfer_unmap(tc->screen, tc->tex_trans); + tc->pipe->transfer_unmap(tc->pipe, tc->tex_trans); tc->tex_trans_map = NULL; } - screen->tex_transfer_destroy(tc->tex_trans); + tc->pipe->transfer_destroy(tc->pipe, tc->tex_trans); tc->tex_trans = NULL; } tc->tex_trans = - screen->get_tex_transfer(screen, tc->texture, - addr.bits.face, - addr.bits.level, - addr.bits.z, - PIPE_TRANSFER_READ, 0, 0, - u_minify(tc->texture->width0, addr.bits.level), - u_minify(tc->texture->height0, addr.bits.level)); + pipe_get_transfer(tc->pipe, tc->texture, + addr.bits.face, + addr.bits.level, + addr.bits.z, + PIPE_TRANSFER_READ | PIPE_TRANSFER_UNSYNCHRONIZED, + 0, 0, + u_minify(tc->texture->width0, addr.bits.level), + u_minify(tc->texture->height0, addr.bits.level)); - tc->tex_trans_map = screen->transfer_map(screen, tc->tex_trans); + tc->tex_trans_map = tc->pipe->transfer_map(tc->pipe, tc->tex_trans); tc->tex_face = addr.bits.face; tc->tex_level = addr.bits.level; @@ -257,11 +261,18 @@ sp_find_cached_tile_tex(struct softpipe_tex_tile_cache *tc, } /* get tile from the transfer (view into texture) */ - pipe_get_tile_rgba(tc->tex_trans, - addr.bits.x * TILE_SIZE, - addr.bits.y * TILE_SIZE, - TILE_SIZE, TILE_SIZE, - (float *) tile->data.color); + pipe_get_tile_swizzle(tc->pipe, + tc->tex_trans, + addr.bits.x * TILE_SIZE, + addr.bits.y * TILE_SIZE, + TILE_SIZE, + TILE_SIZE, + tc->swizzle_r, + tc->swizzle_g, + tc->swizzle_b, + tc->swizzle_a, + tc->format, + (float *) tile->data.color); tile->addr = addr; } diff --git a/src/gallium/drivers/softpipe/sp_tex_tile_cache.h b/src/gallium/drivers/softpipe/sp_tex_tile_cache.h index ac6886a3df1..0794ffa0c53 100644 --- a/src/gallium/drivers/softpipe/sp_tex_tile_cache.h +++ b/src/gallium/drivers/softpipe/sp_tex_tile_cache.h @@ -70,11 +70,11 @@ struct softpipe_tex_cached_tile struct softpipe_tex_tile_cache { - struct pipe_screen *screen; + struct pipe_context *pipe; struct pipe_transfer *transfer; void *transfer_map; - struct pipe_texture *texture; /**< if caching a texture */ + struct pipe_resource *texture; /**< if caching a texture */ unsigned timestamp; struct softpipe_tex_cached_tile entries[NUM_ENTRIES]; @@ -83,12 +83,18 @@ struct softpipe_tex_tile_cache void *tex_trans_map; int tex_face, tex_level, tex_z; + unsigned swizzle_r; + unsigned swizzle_g; + unsigned swizzle_b; + unsigned swizzle_a; + unsigned format; + struct softpipe_tex_cached_tile *last_tile; /**< most recently retrieved tile */ }; extern struct softpipe_tex_tile_cache * -sp_create_tex_tile_cache( struct pipe_screen *screen ); +sp_create_tex_tile_cache( struct pipe_context *pipe ); extern void sp_destroy_tex_tile_cache(struct softpipe_tex_tile_cache *tc); @@ -101,8 +107,8 @@ extern void sp_tex_tile_cache_unmap_transfers(struct softpipe_tex_tile_cache *tc); extern void -sp_tex_tile_cache_set_texture(struct softpipe_tex_tile_cache *tc, - struct pipe_texture *texture); +sp_tex_tile_cache_set_sampler_view(struct softpipe_tex_tile_cache *tc, + struct pipe_sampler_view *view); void sp_tex_tile_cache_validate_texture(struct softpipe_tex_tile_cache *tc); diff --git a/src/gallium/drivers/softpipe/sp_texture.c b/src/gallium/drivers/softpipe/sp_texture.c index d80a71aca50..7aa85559b23 100644 --- a/src/gallium/drivers/softpipe/sp_texture.c +++ b/src/gallium/drivers/softpipe/sp_texture.c @@ -36,11 +36,14 @@ #include "util/u_format.h" #include "util/u_math.h" #include "util/u_memory.h" +#include "util/u_transfer.h" #include "sp_context.h" +#include "sp_flush.h" #include "sp_texture.h" #include "sp_screen.h" -#include "sp_winsys.h" + +#include "state_tracker/sw_winsys.h" /** @@ -48,10 +51,10 @@ * Use a simple, maximally packed layout. */ static boolean -softpipe_texture_layout(struct pipe_screen *screen, - struct softpipe_texture * spt) +softpipe_resource_layout(struct pipe_screen *screen, + struct softpipe_resource *spr) { - struct pipe_texture *pt = &spt->base; + struct pipe_resource *pt = &spr->base; unsigned level; unsigned width = pt->width0; unsigned height = pt->height0; @@ -59,24 +62,22 @@ softpipe_texture_layout(struct pipe_screen *screen, unsigned buffer_size = 0; for (level = 0; level <= pt->last_level; level++) { - spt->stride[level] = util_format_get_stride(pt->format, width); + spr->stride[level] = util_format_get_stride(pt->format, width); - spt->level_offset[level] = buffer_size; + spr->level_offset[level] = buffer_size; buffer_size += (util_format_get_nblocksy(pt->format, height) * ((pt->target == PIPE_TEXTURE_CUBE) ? 6 : depth) * - spt->stride[level]); + spr->stride[level]); width = u_minify(width, 1); height = u_minify(height, 1); depth = u_minify(depth, 1); } - spt->buffer = screen->buffer_create(screen, 32, - PIPE_BUFFER_USAGE_PIXEL, - buffer_size); + spr->data = align_malloc(buffer_size, 16); - return spt->buffer != NULL; + return spr->data != NULL; } @@ -85,115 +86,173 @@ softpipe_texture_layout(struct pipe_screen *screen, */ static boolean softpipe_displaytarget_layout(struct pipe_screen *screen, - struct softpipe_texture * spt) + struct softpipe_resource *spr) { - unsigned usage = (PIPE_BUFFER_USAGE_CPU_READ_WRITE | - PIPE_BUFFER_USAGE_GPU_READ_WRITE); - unsigned tex_usage = spt->base.tex_usage; - - spt->buffer = screen->surface_buffer_create( screen, - spt->base.width0, - spt->base.height0, - spt->base.format, - usage, - tex_usage, - &spt->stride[0]); - - return spt->buffer != NULL; + struct sw_winsys *winsys = softpipe_screen(screen)->winsys; + + /* Round up the surface size to a multiple of the tile size? + */ + spr->dt = winsys->displaytarget_create(winsys, + spr->base.bind, + spr->base.format, + spr->base.width0, + spr->base.height0, + 16, + &spr->stride[0] ); + + return spr->dt != NULL; } /** - * Create new pipe_texture given the template information. + * Create new pipe_resource given the template information. */ -static struct pipe_texture * -softpipe_texture_create(struct pipe_screen *screen, - const struct pipe_texture *template) +static struct pipe_resource * +softpipe_resource_create(struct pipe_screen *screen, + const struct pipe_resource *templat) { - struct softpipe_texture *spt = CALLOC_STRUCT(softpipe_texture); - if (!spt) + struct softpipe_resource *spr = CALLOC_STRUCT(softpipe_resource); + if (!spr) return NULL; - spt->base = *template; - pipe_reference_init(&spt->base.reference, 1); - spt->base.screen = screen; + assert(templat->format != PIPE_FORMAT_NONE); - spt->pot = (util_is_power_of_two(template->width0) && - util_is_power_of_two(template->height0) && - util_is_power_of_two(template->depth0)); + spr->base = *templat; + pipe_reference_init(&spr->base.reference, 1); + spr->base.screen = screen; - if (spt->base.tex_usage & (PIPE_TEXTURE_USAGE_DISPLAY_TARGET | - PIPE_TEXTURE_USAGE_PRIMARY)) { - if (!softpipe_displaytarget_layout(screen, spt)) + spr->pot = (util_is_power_of_two(templat->width0) && + util_is_power_of_two(templat->height0) && + util_is_power_of_two(templat->depth0)); + + if (spr->base.bind & (PIPE_BIND_DISPLAY_TARGET | + PIPE_BIND_SCANOUT | + PIPE_BIND_SHARED)) { + if (!softpipe_displaytarget_layout(screen, spr)) goto fail; } else { - if (!softpipe_texture_layout(screen, spt)) + if (!softpipe_resource_layout(screen, spr)) goto fail; } - return &spt->base; + return &spr->base; fail: - FREE(spt); + FREE(spr); return NULL; } -/** - * Create a new pipe_texture which wraps an existing buffer. - */ -static struct pipe_texture * -softpipe_texture_blanket(struct pipe_screen * screen, - const struct pipe_texture *base, - const unsigned *stride, - struct pipe_buffer *buffer) +static void +softpipe_resource_destroy(struct pipe_screen *pscreen, + struct pipe_resource *pt) { - struct softpipe_texture *spt; - assert(screen); + struct softpipe_screen *screen = softpipe_screen(pscreen); + struct softpipe_resource *spr = softpipe_resource(pt); - /* Only supports one type */ - if (base->target != PIPE_TEXTURE_2D || - base->last_level != 0 || - base->depth0 != 1) { - return NULL; + if (spr->dt) { + /* display target */ + struct sw_winsys *winsys = screen->winsys; + winsys->displaytarget_destroy(winsys, spr->dt); + } + else if (!spr->userBuffer) { + /* regular texture */ + align_free(spr->data); } - spt = CALLOC_STRUCT(softpipe_texture); - if (!spt) + FREE(spr); +} + + +static struct pipe_resource * +softpipe_resource_from_handle(struct pipe_screen *screen, + const struct pipe_resource *templat, + struct winsys_handle *whandle) +{ + struct sw_winsys *winsys = softpipe_screen(screen)->winsys; + struct softpipe_resource *spr = CALLOC_STRUCT(softpipe_resource); + if (!spr) return NULL; - spt->base = *base; - pipe_reference_init(&spt->base.reference, 1); - spt->base.screen = screen; - spt->stride[0] = stride[0]; + spr->base = *templat; + pipe_reference_init(&spr->base.reference, 1); + spr->base.screen = screen; + + spr->pot = (util_is_power_of_two(templat->width0) && + util_is_power_of_two(templat->height0) && + util_is_power_of_two(templat->depth0)); - pipe_buffer_reference(&spt->buffer, buffer); + spr->dt = winsys->displaytarget_from_handle(winsys, + templat, + whandle, + &spr->stride[0]); + if (!spr->dt) + goto fail; - return &spt->base; + return &spr->base; + + fail: + FREE(spr); + return NULL; } -static void -softpipe_texture_destroy(struct pipe_texture *pt) +static boolean +softpipe_resource_get_handle(struct pipe_screen *screen, + struct pipe_resource *pt, + struct winsys_handle *whandle) { - struct softpipe_texture *spt = softpipe_texture(pt); + struct sw_winsys *winsys = softpipe_screen(screen)->winsys; + struct softpipe_resource *spr = softpipe_resource(pt); + + assert(spr->dt); + if (!spr->dt) + return FALSE; - pipe_buffer_reference(&spt->buffer, NULL); - FREE(spt); + return winsys->displaytarget_get_handle(winsys, spr->dt, whandle); } /** - * Get a pipe_surface "view" into a texture. + * Helper function to compute offset (in bytes) for a particular + * texture level/face/slice from the start of the buffer. + */ +static unsigned +sp_get_tex_image_offset(const struct softpipe_resource *spr, + unsigned level, unsigned face, unsigned zslice) +{ + const unsigned hgt = u_minify(spr->base.height0, level); + const unsigned nblocksy = util_format_get_nblocksy(spr->base.format, hgt); + unsigned offset = spr->level_offset[level]; + + if (spr->base.target == PIPE_TEXTURE_CUBE) { + assert(zslice == 0); + offset += face * nblocksy * spr->stride[level]; + } + else if (spr->base.target == PIPE_TEXTURE_3D) { + assert(face == 0); + offset += zslice * nblocksy * spr->stride[level]; + } + else { + assert(face == 0); + assert(zslice == 0); + } + + return offset; +} + + +/** + * Get a pipe_surface "view" into a texture resource. */ static struct pipe_surface * softpipe_get_tex_surface(struct pipe_screen *screen, - struct pipe_texture *pt, + struct pipe_resource *pt, unsigned face, unsigned level, unsigned zslice, unsigned usage) { - struct softpipe_texture *spt = softpipe_texture(pt); + struct softpipe_resource *spr = softpipe_resource(pt); struct pipe_surface *ps; assert(level <= pt->last_level); @@ -201,49 +260,16 @@ softpipe_get_tex_surface(struct pipe_screen *screen, ps = CALLOC_STRUCT(pipe_surface); if (ps) { pipe_reference_init(&ps->reference, 1); - pipe_texture_reference(&ps->texture, pt); + pipe_resource_reference(&ps->texture, pt); ps->format = pt->format; ps->width = u_minify(pt->width0, level); ps->height = u_minify(pt->height0, level); - ps->offset = spt->level_offset[level]; + ps->offset = sp_get_tex_image_offset(spr, level, face, zslice); ps->usage = usage; - /* Because we are softpipe, anything that the state tracker - * thought was going to be done with the GPU will actually get - * done with the CPU. Let's adjust the flags to take that into - * account. - */ - if (ps->usage & PIPE_BUFFER_USAGE_GPU_WRITE) { - /* GPU_WRITE means "render" and that can involve reads (blending) */ - ps->usage |= PIPE_BUFFER_USAGE_CPU_WRITE | PIPE_BUFFER_USAGE_CPU_READ; - } - - if (ps->usage & PIPE_BUFFER_USAGE_GPU_READ) - ps->usage |= PIPE_BUFFER_USAGE_CPU_READ; - - if (ps->usage & (PIPE_BUFFER_USAGE_CPU_WRITE | - PIPE_BUFFER_USAGE_GPU_WRITE)) { - /* Mark the surface as dirty. The tile cache will look for this. */ - spt->timestamp++; - softpipe_screen(screen)->timestamp++; - } - ps->face = face; ps->level = level; ps->zslice = zslice; - - if (pt->target == PIPE_TEXTURE_CUBE) { - ps->offset += face * util_format_get_nblocksy(pt->format, u_minify(pt->height0, level)) * - spt->stride[level]; - } - else if (pt->target == PIPE_TEXTURE_3D) { - ps->offset += zslice * util_format_get_nblocksy(pt->format, u_minify(pt->height0, level)) * - spt->stride[level]; - } - else { - assert(face == 0); - assert(zslice == 0); - } } return ps; } @@ -260,67 +286,75 @@ softpipe_tex_surface_destroy(struct pipe_surface *surf) * where it would happen. For softpipe, nothing to do. */ assert(surf->texture); - pipe_texture_reference(&surf->texture, NULL); + pipe_resource_reference(&surf->texture, NULL); FREE(surf); } /** * Geta pipe_transfer object which is used for moving data in/out of - * a texture object. - * \param face one of PIPE_TEX_FACE_x or 0 - * \param level texture mipmap level - * \param zslice 2D slice of a 3D texture - * \param usage one of PIPE_TRANSFER_READ/WRITE/READ_WRITE - * \param x X position of region to read/write - * \param y Y position of region to read/write - * \param width width of region to read/write - * \param height height of region to read/write + * a resource object. + * \param pipe rendering context + * \param resource the resource to transfer in/out of + * \param sr indicates cube face or 3D texture slice + * \param usage bitmask of PIPE_TRANSFER_x flags + * \param box the 1D/2D/3D region of interest */ static struct pipe_transfer * -softpipe_get_tex_transfer(struct pipe_screen *screen, - struct pipe_texture *texture, - unsigned face, unsigned level, unsigned zslice, - enum pipe_transfer_usage usage, - unsigned x, unsigned y, unsigned w, unsigned h) +softpipe_get_transfer(struct pipe_context *pipe, + struct pipe_resource *resource, + struct pipe_subresource sr, + unsigned usage, + const struct pipe_box *box) { - struct softpipe_texture *sptex = softpipe_texture(texture); + struct softpipe_resource *spr = softpipe_resource(resource); struct softpipe_transfer *spt; - assert(texture); - assert(level <= texture->last_level); + assert(resource); + assert(sr.level <= resource->last_level); /* make sure the requested region is in the image bounds */ - assert(x + w <= u_minify(texture->width0, level)); - assert(y + h <= u_minify(texture->height0, level)); + assert(box->x + box->width <= u_minify(resource->width0, sr.level)); + assert(box->y + box->height <= u_minify(resource->height0, sr.level)); + assert(box->z + box->depth <= u_minify(resource->depth0, sr.level)); + + /* + * Transfers, like other pipe operations, must happen in order, so flush the + * context if necessary. + */ + if (!(usage & PIPE_TRANSFER_UNSYNCHRONIZED)) { + boolean read_only = !(usage & PIPE_TRANSFER_WRITE); + boolean do_not_block = !!(usage & PIPE_TRANSFER_DONTBLOCK); + if (!softpipe_flush_resource(pipe, resource, + sr.face, sr.level, + 0, /* flush_flags */ + read_only, + TRUE, /* cpu_access */ + do_not_block)) { + /* + * It would have blocked, but state tracker requested no to. + */ + assert(do_not_block); + return NULL; + } + } spt = CALLOC_STRUCT(softpipe_transfer); if (spt) { struct pipe_transfer *pt = &spt->base; - int nblocksy = util_format_get_nblocksy(texture->format, u_minify(texture->height0, level)); - pipe_texture_reference(&pt->texture, texture); - pt->x = x; - pt->y = y; - pt->width = w; - pt->height = h; - pt->stride = sptex->stride[level]; + enum pipe_format format = resource->format; + pipe_resource_reference(&pt->resource, resource); + pt->sr = sr; pt->usage = usage; - pt->face = face; - pt->level = level; - pt->zslice = zslice; + pt->box = *box; + pt->stride = spr->stride[sr.level]; - spt->offset = sptex->level_offset[level]; + spt->offset = sp_get_tex_image_offset(spr, sr.level, sr.face, box->z); + + spt->offset += + box->y / util_format_get_blockheight(format) * spt->base.stride + + box->x / util_format_get_blockwidth(format) * util_format_get_blocksize(format); - if (texture->target == PIPE_TEXTURE_CUBE) { - spt->offset += face * nblocksy * pt->stride; - } - else if (texture->target == PIPE_TEXTURE_3D) { - spt->offset += zslice * nblocksy * pt->stride; - } - else { - assert(face == 0); - assert(zslice == 0); - } return pt; } return NULL; @@ -329,17 +363,13 @@ softpipe_get_tex_transfer(struct pipe_screen *screen, /** * Free a pipe_transfer object which was created with - * softpipe_get_tex_transfer(). + * softpipe_get_transfer(). */ static void -softpipe_tex_transfer_destroy(struct pipe_transfer *transfer) +softpipe_transfer_destroy(struct pipe_context *pipe, + struct pipe_transfer *transfer) { - /* Effectively do the texture_update work here - if texture images - * needed post-processing to put them into hardware layout, this is - * where it would happen. For softpipe, nothing to do. - */ - assert (transfer->texture); - pipe_texture_reference(&transfer->texture, NULL); + pipe_resource_reference(&transfer->resource, NULL); FREE(transfer); } @@ -348,36 +378,27 @@ softpipe_tex_transfer_destroy(struct pipe_transfer *transfer) * Create memory mapping for given pipe_transfer object. */ static void * -softpipe_transfer_map( struct pipe_screen *screen, - struct pipe_transfer *transfer ) +softpipe_transfer_map(struct pipe_context *pipe, + struct pipe_transfer *transfer) { - ubyte *map, *xfer_map; - struct softpipe_texture *spt; - enum pipe_format format; - - assert(transfer->texture); - spt = softpipe_texture(transfer->texture); - format = transfer->texture->format; - - map = pipe_buffer_map(screen, spt->buffer, pipe_transfer_buffer_flags(transfer)); - if (map == NULL) - return NULL; - - /* May want to different things here depending on read/write nature - * of the map: + struct softpipe_transfer *spt = softpipe_transfer(transfer); + struct softpipe_resource *spr = softpipe_resource(transfer->resource); + struct sw_winsys *winsys = softpipe_screen(pipe->screen)->winsys; + uint8_t *map; + + /* resources backed by display target treated specially: */ - if (transfer->texture && (transfer->usage & PIPE_TRANSFER_WRITE)) { - /* Do something to notify sharing contexts of a texture change. - * In softpipe, that would mean flushing the texture cache. - */ - softpipe_screen(screen)->timestamp++; + if (spr->dt) { + map = winsys->displaytarget_map(winsys, spr->dt, transfer->usage); + } + else { + map = spr->data; } - xfer_map = map + softpipe_transfer(transfer)->offset + - transfer->y / util_format_get_blockheight(format) * transfer->stride + - transfer->x / util_format_get_blockwidth(format) * util_format_get_blocksize(format); - /*printf("map = %p xfer map = %p\n", map, xfer_map);*/ - return xfer_map; + if (map == NULL) + return NULL; + else + return map + spt->offset; } @@ -385,58 +406,79 @@ softpipe_transfer_map( struct pipe_screen *screen, * Unmap memory mapping for given pipe_transfer object. */ static void -softpipe_transfer_unmap(struct pipe_screen *screen, +softpipe_transfer_unmap(struct pipe_context *pipe, struct pipe_transfer *transfer) { - struct softpipe_texture *spt; + struct softpipe_resource *spr; - assert(transfer->texture); - spt = softpipe_texture(transfer->texture); + assert(transfer->resource); + spr = softpipe_resource(transfer->resource); - pipe_buffer_unmap( screen, spt->buffer ); + if (spr->dt) { + /* display target */ + struct sw_winsys *winsys = softpipe_screen(pipe->screen)->winsys; + winsys->displaytarget_unmap(winsys, spr->dt); + } if (transfer->usage & PIPE_TRANSFER_WRITE) { /* Mark the texture as dirty to expire the tile caches. */ - spt->timestamp++; + spr->timestamp++; } } - -void -softpipe_init_screen_texture_funcs(struct pipe_screen *screen) +/** + * Create buffer which wraps user-space data. + */ +static struct pipe_resource * +softpipe_user_buffer_create(struct pipe_screen *screen, + void *ptr, + unsigned bytes, + unsigned bind_flags) { - screen->texture_create = softpipe_texture_create; - screen->texture_blanket = softpipe_texture_blanket; - screen->texture_destroy = softpipe_texture_destroy; + struct softpipe_resource *spr; - screen->get_tex_surface = softpipe_get_tex_surface; - screen->tex_surface_destroy = softpipe_tex_surface_destroy; + spr = CALLOC_STRUCT(softpipe_resource); + if (!spr) + return NULL; - screen->get_tex_transfer = softpipe_get_tex_transfer; - screen->tex_transfer_destroy = softpipe_tex_transfer_destroy; - screen->transfer_map = softpipe_transfer_map; - screen->transfer_unmap = softpipe_transfer_unmap; + pipe_reference_init(&spr->base.reference, 1); + spr->base.screen = screen; + spr->base.format = PIPE_FORMAT_R8_UNORM; /* ?? */ + spr->base.bind = bind_flags; + spr->base.usage = PIPE_USAGE_IMMUTABLE; + spr->base.flags = 0; + spr->base.width0 = bytes; + spr->base.height0 = 1; + spr->base.depth0 = 1; + spr->userBuffer = TRUE; + spr->data = ptr; + + return &spr->base; } -/** - * Return pipe_buffer handle and stride for given texture object. - * XXX used for??? - */ -boolean -softpipe_get_texture_buffer( struct pipe_texture *texture, - struct pipe_buffer **buf, - unsigned *stride ) +void +softpipe_init_texture_funcs(struct pipe_context *pipe) { - struct softpipe_texture *tex = (struct softpipe_texture *) texture; + pipe->get_transfer = softpipe_get_transfer; + pipe->transfer_destroy = softpipe_transfer_destroy; + pipe->transfer_map = softpipe_transfer_map; + pipe->transfer_unmap = softpipe_transfer_unmap; - if (!tex) - return FALSE; + pipe->transfer_flush_region = u_default_transfer_flush_region; + pipe->transfer_inline_write = u_default_transfer_inline_write; +} - pipe_buffer_reference(buf, tex->buffer); - if (stride) - *stride = tex->stride[0]; +void +softpipe_init_screen_texture_funcs(struct pipe_screen *screen) +{ + screen->resource_create = softpipe_resource_create; + screen->resource_destroy = softpipe_resource_destroy; + screen->resource_from_handle = softpipe_resource_from_handle; + screen->resource_get_handle = softpipe_resource_get_handle; + screen->user_buffer_create = softpipe_user_buffer_create; - return TRUE; + screen->get_tex_surface = softpipe_get_tex_surface; + screen->tex_surface_destroy = softpipe_tex_surface_destroy; } diff --git a/src/gallium/drivers/softpipe/sp_texture.h b/src/gallium/drivers/softpipe/sp_texture.h index 2537ab6a40d..7e3249b46f0 100644 --- a/src/gallium/drivers/softpipe/sp_texture.h +++ b/src/gallium/drivers/softpipe/sp_texture.h @@ -32,29 +32,48 @@ #include "pipe/p_state.h" +#define SP_MAX_TEXTURE_2D_LEVELS 13 /* 4K x 4K */ +#define SP_MAX_TEXTURE_3D_LEVELS 9 /* 512 x 512 x 512 */ + + struct pipe_context; struct pipe_screen; struct softpipe_context; -struct softpipe_texture +/** + * Subclass of pipe_resource. + */ +struct softpipe_resource { - struct pipe_texture base; + struct pipe_resource base; - unsigned long level_offset[PIPE_MAX_TEXTURE_LEVELS]; - unsigned stride[PIPE_MAX_TEXTURE_LEVELS]; + unsigned long level_offset[SP_MAX_TEXTURE_2D_LEVELS]; + unsigned stride[SP_MAX_TEXTURE_2D_LEVELS]; + + /** + * Display target, only valid for PIPE_TEXTURE_2D with the + * PIPE_BIND_DISPLAY_TARGET usage. + */ + struct sw_displaytarget *dt; - /* The data is held here: + /** + * Malloc'ed data for regular buffers and textures, or a mapping to dt above. */ - struct pipe_buffer *buffer; + void *data; /* True if texture images are power-of-two in all dimensions: */ boolean pot; + boolean userBuffer; unsigned timestamp; }; + +/** + * Subclass of pipe_transfer. + */ struct softpipe_transfer { struct pipe_transfer base; @@ -64,10 +83,10 @@ struct softpipe_transfer /** cast wrappers */ -static INLINE struct softpipe_texture * -softpipe_texture(struct pipe_texture *pt) +static INLINE struct softpipe_resource * +softpipe_resource(struct pipe_resource *pt) { - return (struct softpipe_texture *) pt; + return (struct softpipe_resource *) pt; } static INLINE struct softpipe_transfer * @@ -80,5 +99,8 @@ softpipe_transfer(struct pipe_transfer *pt) extern void softpipe_init_screen_texture_funcs(struct pipe_screen *screen); +extern void +softpipe_init_texture_funcs(struct pipe_context *pipe); + #endif /* SP_TEXTURE */ diff --git a/src/gallium/drivers/softpipe/sp_tile_cache.c b/src/gallium/drivers/softpipe/sp_tile_cache.c index 3b30954ac8d..f4db6f6ef00 100644 --- a/src/gallium/drivers/softpipe/sp_tile_cache.c +++ b/src/gallium/drivers/softpipe/sp_tile_cache.c @@ -79,20 +79,20 @@ clear_clear_flag(uint *bitvec, union tile_address addr) struct softpipe_tile_cache * -sp_create_tile_cache( struct pipe_screen *screen ) +sp_create_tile_cache( struct pipe_context *pipe ) { struct softpipe_tile_cache *tc; uint pos; int maxLevels, maxTexSize; /* sanity checking: max sure MAX_WIDTH/HEIGHT >= largest texture image */ - maxLevels = screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS); + maxLevels = pipe->screen->get_param(pipe->screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS); maxTexSize = 1 << (maxLevels - 1); assert(MAX_WIDTH >= maxTexSize); tc = CALLOC_STRUCT( softpipe_tile_cache ); if (tc) { - tc->screen = screen; + tc->pipe = pipe; for (pos = 0; pos < NUM_ENTRIES; pos++) { tc->entries[pos].addr.bits.invalid = 1; } @@ -103,7 +103,7 @@ sp_create_tile_cache( struct pipe_screen *screen ) * However, it breaks clearing in other situations (such as in * progs/tests/drawbuffers, see bug 24402). */ -#if 0 && TILE_CLEAR_OPTIMIZATION +#if 0 /* set flags to indicate all the tiles are cleared */ memset(tc->clear_flags, 255, sizeof(tc->clear_flags)); #endif @@ -115,15 +115,13 @@ sp_create_tile_cache( struct pipe_screen *screen ) void sp_destroy_tile_cache(struct softpipe_tile_cache *tc) { - struct pipe_screen *screen; uint pos; for (pos = 0; pos < NUM_ENTRIES; pos++) { /*assert(tc->entries[pos].x < 0);*/ } if (tc->transfer) { - screen = tc->transfer->texture->screen; - screen->tex_transfer_destroy(tc->transfer); + tc->pipe->transfer_destroy(tc->pipe, tc->transfer); } FREE( tc ); @@ -137,38 +135,37 @@ void sp_tile_cache_set_surface(struct softpipe_tile_cache *tc, struct pipe_surface *ps) { - if (tc->transfer) { - struct pipe_screen *screen = tc->transfer->texture->screen; + struct pipe_context *pipe = tc->pipe; + if (tc->transfer) { if (ps == tc->surface) return; if (tc->transfer_map) { - screen->transfer_unmap(screen, tc->transfer); + pipe->transfer_unmap(pipe, tc->transfer); tc->transfer_map = NULL; } - screen->tex_transfer_destroy(tc->transfer); + pipe->transfer_destroy(pipe, tc->transfer); tc->transfer = NULL; } tc->surface = ps; if (ps) { - struct pipe_screen *screen = ps->texture->screen; + tc->transfer = pipe_get_transfer(pipe, ps->texture, ps->face, + ps->level, ps->zslice, + PIPE_TRANSFER_READ_WRITE | + PIPE_TRANSFER_UNSYNCHRONIZED, + 0, 0, ps->width, ps->height); - tc->transfer = screen->get_tex_transfer(screen, ps->texture, ps->face, - ps->level, ps->zslice, - PIPE_TRANSFER_READ_WRITE, - 0, 0, ps->width, ps->height); - - tc->depth_stencil = (ps->format == PIPE_FORMAT_Z24S8_UNORM || + tc->depth_stencil = (ps->format == PIPE_FORMAT_Z24_UNORM_S8_USCALED || ps->format == PIPE_FORMAT_Z24X8_UNORM || - ps->format == PIPE_FORMAT_S8Z24_UNORM || + ps->format == PIPE_FORMAT_S8_USCALED_Z24_UNORM || ps->format == PIPE_FORMAT_X8Z24_UNORM || ps->format == PIPE_FORMAT_Z16_UNORM || ps->format == PIPE_FORMAT_Z32_UNORM || - ps->format == PIPE_FORMAT_S8_UNORM); + ps->format == PIPE_FORMAT_S8_USCALED); } } @@ -187,7 +184,7 @@ void sp_tile_cache_map_transfers(struct softpipe_tile_cache *tc) { if (tc->transfer && !tc->transfer_map) - tc->transfer_map = tc->screen->transfer_map(tc->screen, tc->transfer); + tc->transfer_map = tc->pipe->transfer_map(tc->pipe, tc->transfer); } @@ -195,7 +192,7 @@ void sp_tile_cache_unmap_transfers(struct softpipe_tile_cache *tc) { if (tc->transfer_map) { - tc->screen->transfer_unmap(tc->screen, tc->transfer); + tc->pipe->transfer_unmap(tc->pipe, tc->transfer); tc->transfer_map = NULL; } } @@ -280,14 +277,14 @@ static void sp_tile_cache_flush_clear(struct softpipe_tile_cache *tc) { struct pipe_transfer *pt = tc->transfer; - const uint w = tc->transfer->width; - const uint h = tc->transfer->height; + const uint w = tc->transfer->box.width; + const uint h = tc->transfer->box.height; uint x, y; uint numCleared = 0; - assert(pt->texture); + assert(pt->resource); /* clear the scratch tile to the clear value */ - clear_tile(&tc->tile, pt->texture->format, tc->clear_val); + clear_tile(&tc->tile, pt->resource->format, tc->clear_val); /* push the tile to all positions marked as clear */ for (y = 0; y < h; y += TILE_SIZE) { @@ -295,17 +292,19 @@ sp_tile_cache_flush_clear(struct softpipe_tile_cache *tc) union tile_address addr = tile_address(x, y); if (is_clear_flag_set(tc->clear_flags, addr)) { - pipe_put_tile_raw(pt, + pipe_put_tile_raw(tc->pipe, + pt, x, y, TILE_SIZE, TILE_SIZE, tc->tile.data.color32, 0/*STRIDE*/); - /* do this? */ - clear_clear_flag(tc->clear_flags, addr); - numCleared++; } } } + + /* reset all clear flags to zero */ + memset(tc->clear_flags, 0, sizeof(tc->clear_flags)); + #if 0 debug_printf("num cleared: %u\n", numCleared); #endif @@ -328,14 +327,14 @@ sp_flush_tile_cache(struct softpipe_tile_cache *tc) struct softpipe_cached_tile *tile = tc->entries + pos; if (!tile->addr.bits.invalid) { if (tc->depth_stencil) { - pipe_put_tile_raw(pt, + pipe_put_tile_raw(tc->pipe, pt, tile->addr.bits.x * TILE_SIZE, tile->addr.bits.y * TILE_SIZE, TILE_SIZE, TILE_SIZE, tile->data.depth32, 0/*STRIDE*/); } else { - pipe_put_tile_rgba(pt, + pipe_put_tile_rgba(tc->pipe, pt, tile->addr.bits.x * TILE_SIZE, tile->addr.bits.y * TILE_SIZE, TILE_SIZE, TILE_SIZE, @@ -346,9 +345,7 @@ sp_flush_tile_cache(struct softpipe_tile_cache *tc) } } -#if TILE_CLEAR_OPTIMIZATION sp_tile_cache_flush_clear(tc); -#endif } #if 0 @@ -374,18 +371,18 @@ sp_find_cached_tile(struct softpipe_tile_cache *tc, if (addr.value != tile->addr.value) { - assert(pt->texture); + assert(pt->resource); if (tile->addr.bits.invalid == 0) { /* put dirty tile back in framebuffer */ if (tc->depth_stencil) { - pipe_put_tile_raw(pt, + pipe_put_tile_raw(tc->pipe, pt, tile->addr.bits.x * TILE_SIZE, tile->addr.bits.y * TILE_SIZE, TILE_SIZE, TILE_SIZE, tile->data.depth32, 0/*STRIDE*/); } else { - pipe_put_tile_rgba(pt, + pipe_put_tile_rgba(tc->pipe, pt, tile->addr.bits.x * TILE_SIZE, tile->addr.bits.y * TILE_SIZE, TILE_SIZE, TILE_SIZE, @@ -398,24 +395,24 @@ sp_find_cached_tile(struct softpipe_tile_cache *tc, if (is_clear_flag_set(tc->clear_flags, addr)) { /* don't get tile from framebuffer, just clear it */ if (tc->depth_stencil) { - clear_tile(tile, pt->texture->format, tc->clear_val); + clear_tile(tile, pt->resource->format, tc->clear_val); } else { - clear_tile_rgba(tile, pt->texture->format, tc->clear_color); + clear_tile_rgba(tile, pt->resource->format, tc->clear_color); } clear_clear_flag(tc->clear_flags, addr); } else { /* get new tile data from transfer */ if (tc->depth_stencil) { - pipe_get_tile_raw(pt, + pipe_get_tile_raw(tc->pipe, pt, tile->addr.bits.x * TILE_SIZE, tile->addr.bits.y * TILE_SIZE, TILE_SIZE, TILE_SIZE, tile->data.depth32, 0/*STRIDE*/); } else { - pipe_get_tile_rgba(pt, + pipe_get_tile_rgba(tc->pipe, pt, tile->addr.bits.x * TILE_SIZE, tile->addr.bits.y * TILE_SIZE, TILE_SIZE, TILE_SIZE, @@ -450,13 +447,8 @@ sp_tile_cache_clear(struct softpipe_tile_cache *tc, const float *rgba, tc->clear_val = clearValue; -#if TILE_CLEAR_OPTIMIZATION /* set flags to indicate all the tiles are cleared */ memset(tc->clear_flags, 255, sizeof(tc->clear_flags)); -#else - /* disable the optimization */ - memset(tc->clear_flags, 0, sizeof(tc->clear_flags)); -#endif for (pos = 0; pos < NUM_ENTRIES; pos++) { struct softpipe_cached_tile *tile = tc->entries + pos; diff --git a/src/gallium/drivers/softpipe/sp_tile_cache.h b/src/gallium/drivers/softpipe/sp_tile_cache.h index a12092702a6..e03d53eb24e 100644 --- a/src/gallium/drivers/softpipe/sp_tile_cache.h +++ b/src/gallium/drivers/softpipe/sp_tile_cache.h @@ -28,8 +28,6 @@ #ifndef SP_TILE_CACHE_H #define SP_TILE_CACHE_H -#define TILE_CLEAR_OPTIMIZATION 1 - #include "pipe/p_compiler.h" @@ -80,7 +78,7 @@ struct softpipe_cached_tile struct softpipe_tile_cache { - struct pipe_screen *screen; + struct pipe_context *pipe; struct pipe_surface *surface; /**< the surface we're caching */ struct pipe_transfer *transfer; void *transfer_map; @@ -98,7 +96,7 @@ struct softpipe_tile_cache extern struct softpipe_tile_cache * -sp_create_tile_cache( struct pipe_screen *screen ); +sp_create_tile_cache( struct pipe_context *pipe ); extern void sp_destroy_tile_cache(struct softpipe_tile_cache *tc); diff --git a/src/gallium/drivers/softpipe/sp_winsys.c b/src/gallium/drivers/softpipe/sp_winsys.c deleted file mode 100644 index 0a6245ed2cd..00000000000 --- a/src/gallium/drivers/softpipe/sp_winsys.c +++ /dev/null @@ -1,245 +0,0 @@ -/************************************************************************** - * - * Copyright 2007 Tungsten Graphics, Inc., Bismarck, ND., USA - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * - **************************************************************************/ - -/** - * @file - * Malloc softpipe winsys. Uses malloc for all memory allocations. - * - * @author Keith Whitwell - * @author Brian Paul - * @author Jose Fonseca - */ - - -#include "util/u_simple_screen.h"/* port to just p_screen */ -#include "util/u_format.h" -#include "util/u_math.h" -#include "util/u_memory.h" -#include "util/u_inlines.h" -#include "pipe/p_format.h" -#include "pipe/p_context.h" -#include "sp_winsys.h" - - -struct st_softpipe_buffer -{ - struct pipe_buffer base; - boolean userBuffer; /** Is this a user-space buffer? */ - void *data; - void *mapped; -}; - - -/** Cast wrapper */ -static INLINE struct st_softpipe_buffer * -st_softpipe_buffer( struct pipe_buffer *buf ) -{ - return (struct st_softpipe_buffer *)buf; -} - - -static void * -st_softpipe_buffer_map(struct pipe_winsys *winsys, - struct pipe_buffer *buf, - unsigned flags) -{ - struct st_softpipe_buffer *st_softpipe_buf = st_softpipe_buffer(buf); - st_softpipe_buf->mapped = st_softpipe_buf->data; - return st_softpipe_buf->mapped; -} - - -static void -st_softpipe_buffer_unmap(struct pipe_winsys *winsys, - struct pipe_buffer *buf) -{ - struct st_softpipe_buffer *st_softpipe_buf = st_softpipe_buffer(buf); - st_softpipe_buf->mapped = NULL; -} - - -static void -st_softpipe_buffer_destroy(struct pipe_buffer *buf) -{ - struct st_softpipe_buffer *oldBuf = st_softpipe_buffer(buf); - - if (oldBuf->data) { - if (!oldBuf->userBuffer) - align_free(oldBuf->data); - - oldBuf->data = NULL; - } - - FREE(oldBuf); -} - - -static void -st_softpipe_flush_frontbuffer(struct pipe_winsys *winsys, - struct pipe_surface *surf, - void *context_private) -{ -} - - - -static const char * -st_softpipe_get_name(struct pipe_winsys *winsys) -{ - return "softpipe"; -} - - -static struct pipe_buffer * -st_softpipe_buffer_create(struct pipe_winsys *winsys, - unsigned alignment, - unsigned usage, - unsigned size) -{ - struct st_softpipe_buffer *buffer = CALLOC_STRUCT(st_softpipe_buffer); - - pipe_reference_init(&buffer->base.reference, 1); - buffer->base.alignment = alignment; - buffer->base.usage = usage; - buffer->base.size = size; - - buffer->data = align_malloc(size, alignment); - - return &buffer->base; -} - - -/** - * Create buffer which wraps user-space data. - */ -static struct pipe_buffer * -st_softpipe_user_buffer_create(struct pipe_winsys *winsys, - void *ptr, - unsigned bytes) -{ - struct st_softpipe_buffer *buffer; - - buffer = CALLOC_STRUCT(st_softpipe_buffer); - if(!buffer) - return NULL; - - pipe_reference_init(&buffer->base.reference, 1); - buffer->base.size = bytes; - buffer->userBuffer = TRUE; - buffer->data = ptr; - - return &buffer->base; -} - - -static struct pipe_buffer * -st_softpipe_surface_buffer_create(struct pipe_winsys *winsys, - unsigned width, unsigned height, - enum pipe_format format, - unsigned usage, - unsigned tex_usage, - unsigned *stride) -{ - const unsigned alignment = 64; - unsigned nblocksy; - - nblocksy = util_format_get_nblocksy(format, height); - *stride = align(util_format_get_stride(format, width), alignment); - - return winsys->buffer_create(winsys, alignment, - usage, - *stride * nblocksy); -} - - -static void -st_softpipe_fence_reference(struct pipe_winsys *winsys, - struct pipe_fence_handle **ptr, - struct pipe_fence_handle *fence) -{ -} - - -static int -st_softpipe_fence_signalled(struct pipe_winsys *winsys, - struct pipe_fence_handle *fence, - unsigned flag) -{ - return 0; -} - - -static int -st_softpipe_fence_finish(struct pipe_winsys *winsys, - struct pipe_fence_handle *fence, - unsigned flag) -{ - return 0; -} - - -static void -st_softpipe_destroy(struct pipe_winsys *winsys) -{ - FREE(winsys); -} - - -struct pipe_screen * -softpipe_create_screen_malloc(void) -{ - static struct pipe_winsys *winsys; - struct pipe_screen *screen; - - winsys = CALLOC_STRUCT(pipe_winsys); - if(!winsys) - return NULL; - - winsys->destroy = st_softpipe_destroy; - - winsys->buffer_create = st_softpipe_buffer_create; - winsys->user_buffer_create = st_softpipe_user_buffer_create; - winsys->buffer_map = st_softpipe_buffer_map; - winsys->buffer_unmap = st_softpipe_buffer_unmap; - winsys->buffer_destroy = st_softpipe_buffer_destroy; - - winsys->surface_buffer_create = st_softpipe_surface_buffer_create; - - winsys->fence_reference = st_softpipe_fence_reference; - winsys->fence_signalled = st_softpipe_fence_signalled; - winsys->fence_finish = st_softpipe_fence_finish; - - winsys->flush_frontbuffer = st_softpipe_flush_frontbuffer; - winsys->get_name = st_softpipe_get_name; - - screen = softpipe_create_screen(winsys); - if(!screen) - st_softpipe_destroy(winsys); - - return screen; -} diff --git a/src/gallium/drivers/softpipe/sp_winsys.h b/src/gallium/drivers/softpipe/sp_winsys.h deleted file mode 100644 index 6e3920c49b2..00000000000 --- a/src/gallium/drivers/softpipe/sp_winsys.h +++ /dev/null @@ -1,73 +0,0 @@ -/************************************************************************** - * - * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas. - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. - * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR - * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, - * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE - * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - **************************************************************************/ - -/* This is the interface that softpipe requires any window system - * hosting it to implement. This is the only include file in softpipe - * which is public. - */ - - -#ifndef SP_WINSYS_H -#define SP_WINSYS_H - -#ifdef __cplusplus -extern "C" { -#endif - -#include "pipe/p_defines.h" - -struct pipe_screen; -struct pipe_winsys; -struct pipe_context; -struct pipe_texture; -struct pipe_buffer; - - - -/** - * Create a softpipe screen that uses the - * given winsys for allocating buffers. - */ -struct pipe_screen *softpipe_create_screen( struct pipe_winsys * ); - -/** - * Create a softpipe screen that uses - * regular malloc to create all its buffers. - */ -struct pipe_screen *softpipe_create_screen_malloc(void); - -boolean -softpipe_get_texture_buffer( struct pipe_texture *texture, - struct pipe_buffer **buf, - unsigned *stride ); - - -#ifdef __cplusplus -} -#endif - -#endif /* SP_WINSYS_H */ diff --git a/src/gallium/drivers/svga/Makefile b/src/gallium/drivers/svga/Makefile index f3619081875..27287793bda 100644 --- a/src/gallium/drivers/svga/Makefile +++ b/src/gallium/drivers/svga/Makefile @@ -27,8 +27,6 @@ C_SOURCES = \ svga_pipe_vertex.c \ svga_pipe_vs.c \ svga_screen.c \ - svga_screen_buffer.c \ - svga_screen_texture.c \ svga_screen_cache.c \ svga_state.c \ svga_state_need_swtnl.c \ @@ -45,7 +43,14 @@ C_SOURCES = \ svga_tgsi.c \ svga_tgsi_decl_sm20.c \ svga_tgsi_decl_sm30.c \ - svga_tgsi_insn.c + svga_tgsi_insn.c \ + svga_sampler_view.c \ + svga_surface.c \ + svga_resource.c \ + svga_resource_texture.c \ + svga_resource_buffer.c \ + svga_resource_buffer_upload.c + LIBRARY_INCLUDES = \ -I$(TOP)/src/gallium/drivers/svga/include diff --git a/src/gallium/drivers/svga/SConscript b/src/gallium/drivers/svga/SConscript index 737b791ceb0..12ce4732d15 100644 --- a/src/gallium/drivers/svga/SConscript +++ b/src/gallium/drivers/svga/SConscript @@ -38,10 +38,13 @@ sources = [ 'svga_pipe_sampler.c', 'svga_pipe_vertex.c', 'svga_pipe_vs.c', + 'svga_resource.c', + 'svga_resource_buffer.c', + 'svga_resource_buffer_upload.c', + 'svga_resource_texture.c', + 'svga_sampler_view.c', 'svga_screen.c', - 'svga_screen_buffer.c', 'svga_screen_cache.c', - 'svga_screen_texture.c', 'svga_state.c', 'svga_state_constants.c', 'svga_state_framebuffer.c', @@ -51,6 +54,7 @@ sources = [ 'svga_state_vdecl.c', 'svga_state_fs.c', 'svga_state_vs.c', + 'svga_surface.c', 'svga_swtnl_backend.c', 'svga_swtnl_draw.c', 'svga_swtnl_state.c', diff --git a/src/gallium/drivers/svga/svga_cmd.c b/src/gallium/drivers/svga/svga_cmd.c index 04307d17fe0..7b2dfe25496 100644 --- a/src/gallium/drivers/svga/svga_cmd.c +++ b/src/gallium/drivers/svga/svga_cmd.c @@ -31,8 +31,9 @@ */ #include "svga_winsys.h" -#include "svga_screen_buffer.h" -#include "svga_screen_texture.h" +#include "svga_resource_buffer.h" +#include "svga_resource_texture.h" +#include "svga_surface.h" #include "svga_cmd.h" /* @@ -279,7 +280,7 @@ SVGA3D_BeginDefineSurface(struct svga_winsys_context *swc, if(!cmd) return PIPE_ERROR_OUT_OF_MEMORY; - swc->surface_relocation(swc, &cmd->sid, sid, PIPE_BUFFER_USAGE_GPU_WRITE); + swc->surface_relocation(swc, &cmd->sid, sid, SVGA_RELOC_WRITE); cmd->surfaceFlags = flags; cmd->format = format; @@ -365,7 +366,7 @@ SVGA3D_DestroySurface(struct svga_winsys_context *swc, if(!cmd) return PIPE_ERROR_OUT_OF_MEMORY; - swc->surface_relocation(swc, &cmd->sid, sid, PIPE_BUFFER_USAGE_GPU_READ); + swc->surface_relocation(swc, &cmd->sid, sid, SVGA_RELOC_READ); swc->commit(swc);; return PIPE_OK; @@ -423,7 +424,7 @@ SVGA3D_SurfaceDMA(struct svga_winsys_context *swc, const SVGA3dCopyBox *boxes, // IN uint32 numBoxes) // IN { - struct svga_texture *texture = svga_texture(st->base.texture); + struct svga_texture *texture = svga_texture(st->base.resource); SVGA3dCmdSurfaceDMA *cmd; SVGA3dCmdSurfaceDMASuffix *pSuffix; uint32 boxesSize = sizeof *boxes * numBoxes; @@ -431,12 +432,12 @@ SVGA3D_SurfaceDMA(struct svga_winsys_context *swc, unsigned surface_flags; if(transfer == SVGA3D_WRITE_HOST_VRAM) { - region_flags = PIPE_BUFFER_USAGE_GPU_READ; - surface_flags = PIPE_BUFFER_USAGE_GPU_WRITE; + region_flags = SVGA_RELOC_READ; + surface_flags = SVGA_RELOC_WRITE; } else if(transfer == SVGA3D_READ_HOST_VRAM) { - region_flags = PIPE_BUFFER_USAGE_GPU_WRITE; - surface_flags = PIPE_BUFFER_USAGE_GPU_READ; + region_flags = SVGA_RELOC_WRITE; + surface_flags = SVGA_RELOC_READ; } else { assert(0); @@ -454,8 +455,8 @@ SVGA3D_SurfaceDMA(struct svga_winsys_context *swc, cmd->guest.pitch = st->base.stride; swc->surface_relocation(swc, &cmd->host.sid, texture->handle, surface_flags); - cmd->host.face = st->base.face; /* PIPE_TEX_FACE_* and SVGA3D_CUBEFACE_* match */ - cmd->host.mipmap = st->base.level; + cmd->host.face = st->base.sr.face; /* PIPE_TEX_FACE_* and SVGA3D_CUBEFACE_* match */ + cmd->host.mipmap = st->base.sr.level; cmd->transfer = transfer; @@ -489,12 +490,12 @@ SVGA3D_BufferDMA(struct svga_winsys_context *swc, unsigned surface_flags; if(transfer == SVGA3D_WRITE_HOST_VRAM) { - region_flags = PIPE_BUFFER_USAGE_GPU_READ; - surface_flags = PIPE_BUFFER_USAGE_GPU_WRITE; + region_flags = SVGA_RELOC_READ; + surface_flags = SVGA_RELOC_WRITE; } else if(transfer == SVGA3D_READ_HOST_VRAM) { - region_flags = PIPE_BUFFER_USAGE_GPU_WRITE; - surface_flags = PIPE_BUFFER_USAGE_GPU_READ; + region_flags = SVGA_RELOC_WRITE; + surface_flags = SVGA_RELOC_READ; } else { assert(0); @@ -584,7 +585,7 @@ SVGA3D_SetRenderTarget(struct svga_winsys_context *swc, cmd->type = type; - surface_to_surfaceid(swc, surface, &cmd->target, PIPE_BUFFER_USAGE_GPU_WRITE); + surface_to_surfaceid(swc, surface, &cmd->target, SVGA_RELOC_WRITE); swc->commit(swc); @@ -1000,8 +1001,8 @@ SVGA3D_BeginSurfaceCopy(struct svga_winsys_context *swc, if(!cmd) return PIPE_ERROR_OUT_OF_MEMORY; - surface_to_surfaceid(swc, src, &cmd->src, PIPE_BUFFER_USAGE_GPU_READ); - surface_to_surfaceid(swc, dest, &cmd->dest, PIPE_BUFFER_USAGE_GPU_WRITE); + surface_to_surfaceid(swc, src, &cmd->src, SVGA_RELOC_READ); + surface_to_surfaceid(swc, dest, &cmd->dest, SVGA_RELOC_WRITE); *boxes = (SVGA3dCopyBox*) &cmd[1]; memset(*boxes, 0, boxesSize); @@ -1043,8 +1044,8 @@ SVGA3D_SurfaceStretchBlt(struct svga_winsys_context *swc, if(!cmd) return PIPE_ERROR_OUT_OF_MEMORY; - surface_to_surfaceid(swc, src, &cmd->src, PIPE_BUFFER_USAGE_GPU_READ); - surface_to_surfaceid(swc, dest, &cmd->dest, PIPE_BUFFER_USAGE_GPU_WRITE); + surface_to_surfaceid(swc, src, &cmd->src, SVGA_RELOC_READ); + surface_to_surfaceid(swc, dest, &cmd->dest, SVGA_RELOC_WRITE); cmd->boxSrc = *boxSrc; cmd->boxDest = *boxDest; cmd->mode = mode; @@ -1373,7 +1374,7 @@ SVGA3D_EndQuery(struct svga_winsys_context *swc, cmd->type = type; swc->region_relocation(swc, &cmd->guestResult, buffer, 0, - PIPE_BUFFER_USAGE_GPU_WRITE); + SVGA_RELOC_WRITE); swc->commit(swc); @@ -1420,7 +1421,7 @@ SVGA3D_WaitForQuery(struct svga_winsys_context *swc, cmd->type = type; swc->region_relocation(swc, &cmd->guestResult, buffer, 0, - PIPE_BUFFER_USAGE_GPU_WRITE); + SVGA_RELOC_WRITE); swc->commit(swc); diff --git a/src/gallium/drivers/svga/svga_cmd.h b/src/gallium/drivers/svga/svga_cmd.h index da9fc4355fa..0e568d78e65 100644 --- a/src/gallium/drivers/svga/svga_cmd.h +++ b/src/gallium/drivers/svga/svga_cmd.h @@ -41,7 +41,6 @@ #include "pipe/p_defines.h" -struct pipe_buffer; struct pipe_surface; struct svga_transfer; struct svga_winsys_context; diff --git a/src/gallium/drivers/svga/svga_context.c b/src/gallium/drivers/svga/svga_context.c index d499ae6acc9..3228a6d3d7f 100644 --- a/src/gallium/drivers/svga/svga_context.c +++ b/src/gallium/drivers/svga/svga_context.c @@ -34,8 +34,9 @@ #include "svga_context.h" #include "svga_screen.h" -#include "svga_screen_texture.h" -#include "svga_screen_buffer.h" +#include "svga_resource_texture.h" +#include "svga_resource_buffer.h" +#include "svga_resource.h" #include "svga_winsys.h" #include "svga_swtnl.h" #include "svga_draw.h" @@ -66,64 +67,11 @@ static void svga_destroy( struct pipe_context *pipe ) util_bitmask_destroy( svga->fs_bm ); for(shader = 0; shader < PIPE_SHADER_TYPES; ++shader) - pipe_buffer_reference( &svga->curr.cb[shader], NULL ); + pipe_resource_reference( &svga->curr.cb[shader], NULL ); FREE( svga ); } -static unsigned int -svga_is_texture_referenced( struct pipe_context *pipe, - struct pipe_texture *texture, - unsigned face, unsigned level) -{ - struct svga_texture *tex = svga_texture(texture); - struct svga_screen *ss = svga_screen(pipe->screen); - - /** - * The screen does not cache texture writes. - */ - - if (!tex->handle || ss->sws->surface_is_flushed(ss->sws, tex->handle)) - return PIPE_UNREFERENCED; - - /** - * sws->surface_is_flushed() does not distinguish between read references - * and write references. So assume a reference is both. - */ - - return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE; -} - -static unsigned int -svga_is_buffer_referenced( struct pipe_context *pipe, - struct pipe_buffer *buf) - -{ - struct svga_screen *ss = svga_screen(pipe->screen); - struct svga_buffer *sbuf = svga_buffer(buf); - - /** - * XXX: Check this. - * The screen may cache buffer writes, but when we map, we map out - * of those cached writes, so we don't need to set a - * PIPE_REFERENCED_FOR_WRITE flag for cached buffers. - */ - - if (!sbuf->handle || ss->sws->surface_is_flushed(ss->sws, sbuf->handle)) - return PIPE_UNREFERENCED; - - /** - * sws->surface_is_flushed() does not distinguish between read references - * and write references. So assume a reference is both, - * however, we make an exception for index- and vertex buffers, to avoid - * a flush in st_bufferobj_get_subdata, during display list replay. - */ - - if (sbuf->base.usage & (PIPE_BUFFER_USAGE_VERTEX | PIPE_BUFFER_USAGE_INDEX)) - return PIPE_REFERENCED_FOR_READ; - - return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE; -} struct pipe_context *svga_context_create( struct pipe_screen *screen, @@ -143,13 +91,11 @@ struct pipe_context *svga_context_create( struct pipe_screen *screen, svga->pipe.destroy = svga_destroy; svga->pipe.clear = svga_clear; - svga->pipe.is_texture_referenced = svga_is_texture_referenced; - svga->pipe.is_buffer_referenced = svga_is_buffer_referenced; - svga->swc = svgascreen->sws->context_create(svgascreen->sws); if(!svga->swc) goto no_swc; + svga_init_resource_functions(svga); svga_init_blend_functions(svga); svga_init_blit_functions(svga); svga_init_depth_stencil_functions(svga); @@ -164,6 +110,7 @@ struct pipe_context *svga_context_create( struct pipe_screen *screen, svga_init_constbuffer_functions(svga); svga_init_query_functions(svga); + /* debug */ svga->debug.no_swtnl = debug_get_bool_option("SVGA_NO_SWTNL", FALSE); svga->debug.force_swtnl = debug_get_bool_option("SVGA_FORCE_SWTNL", FALSE); @@ -181,17 +128,17 @@ struct pipe_context *svga_context_create( struct pipe_screen *screen, if (svga->vs_bm == NULL) goto no_vs_bm; - svga->upload_ib = u_upload_create( svga->pipe.screen, + svga->upload_ib = u_upload_create( &svga->pipe, 32 * 1024, 16, - PIPE_BUFFER_USAGE_INDEX ); + PIPE_BIND_INDEX_BUFFER ); if (svga->upload_ib == NULL) goto no_upload_ib; - svga->upload_vb = u_upload_create( svga->pipe.screen, + svga->upload_vb = u_upload_create( &svga->pipe, 128 * 1024, 16, - PIPE_BUFFER_USAGE_VERTEX ); + PIPE_BIND_VERTEX_BUFFER ); if (svga->upload_vb == NULL) goto no_upload_vb; diff --git a/src/gallium/drivers/svga/svga_context.h b/src/gallium/drivers/svga/svga_context.h index 03302e2a6ec..9a46de643fd 100644 --- a/src/gallium/drivers/svga/svga_context.h +++ b/src/gallium/drivers/svga/svga_context.h @@ -169,6 +169,11 @@ struct svga_sampler_state { unsigned view_max_lod; }; +struct svga_velems_state { + unsigned count; + struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS]; +}; + /* Use to calculate differences between state emitted to hardware and * current driver-calculated state. */ @@ -178,14 +183,14 @@ struct svga_state const struct svga_depth_stencil_state *depth; const struct svga_rasterizer_state *rast; const struct svga_sampler_state *sampler[PIPE_MAX_SAMPLERS]; + const struct svga_velems_state *velems; - struct pipe_texture *texture[PIPE_MAX_SAMPLERS]; /* or texture ID's? */ + struct pipe_sampler_view *sampler_views[PIPE_MAX_SAMPLERS]; /* or texture ID's? */ struct svga_fragment_shader *fs; struct svga_vertex_shader *vs; struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS]; - struct pipe_vertex_element ve[PIPE_MAX_ATTRIBS]; - struct pipe_buffer *cb[PIPE_SHADER_TYPES]; + struct pipe_resource *cb[PIPE_SHADER_TYPES]; struct pipe_framebuffer_state framebuffer; float depthscale; @@ -203,8 +208,7 @@ struct svga_state struct pipe_viewport_state viewport; unsigned num_samplers; - unsigned num_textures; - unsigned num_vertex_elements; + unsigned num_sampler_views; unsigned num_vertex_buffers; unsigned reduced_prim; @@ -250,7 +254,7 @@ struct svga_hw_clear_state struct svga_hw_view_state { - struct pipe_texture *texture; + struct pipe_resource *texture; struct svga_sampler_view *v; unsigned min_lod; unsigned max_lod; diff --git a/src/gallium/drivers/svga/svga_draw.c b/src/gallium/drivers/svga/svga_draw.c index 8b7ca2e1123..81dd4778d0a 100644 --- a/src/gallium/drivers/svga/svga_draw.c +++ b/src/gallium/drivers/svga/svga_draw.c @@ -34,8 +34,9 @@ #include "svga_draw_private.h" #include "svga_debug.h" #include "svga_screen.h" -#include "svga_screen_buffer.h" -#include "svga_screen_texture.h" +#include "svga_resource_buffer.h" +#include "svga_resource_texture.h" +#include "svga_surface.h" #include "svga_winsys.h" #include "svga_cmd.h" @@ -65,16 +66,16 @@ void svga_hwtnl_destroy( struct svga_hwtnl *hwtnl ) for (i = 0; i < PIPE_PRIM_MAX; i++) { for (j = 0; j < IDX_CACHE_MAX; j++) { - pipe_buffer_reference( &hwtnl->index_cache[i][j].buffer, + pipe_resource_reference( &hwtnl->index_cache[i][j].buffer, NULL ); } } for (i = 0; i < hwtnl->cmd.vdecl_count; i++) - pipe_buffer_reference(&hwtnl->cmd.vdecl_vb[i], NULL); + pipe_resource_reference(&hwtnl->cmd.vdecl_vb[i], NULL); for (i = 0; i < hwtnl->cmd.prim_count; i++) - pipe_buffer_reference(&hwtnl->cmd.prim_ib[i], NULL); + pipe_resource_reference(&hwtnl->cmd.prim_ib[i], NULL); FREE(hwtnl); @@ -103,7 +104,7 @@ void svga_hwtnl_reset_vdecl( struct svga_hwtnl *hwtnl, assert(hwtnl->cmd.prim_count == 0); for (i = count; i < hwtnl->cmd.vdecl_count; i++) { - pipe_buffer_reference(&hwtnl->cmd.vdecl_vb[i], + pipe_resource_reference(&hwtnl->cmd.vdecl_vb[i], NULL); } @@ -112,9 +113,9 @@ void svga_hwtnl_reset_vdecl( struct svga_hwtnl *hwtnl, void svga_hwtnl_vdecl( struct svga_hwtnl *hwtnl, - unsigned i, - const SVGA3dVertexDecl *decl, - struct pipe_buffer *vb) + unsigned i, + const SVGA3dVertexDecl *decl, + struct pipe_resource *vb) { assert(hwtnl->cmd.prim_count == 0); @@ -122,8 +123,7 @@ void svga_hwtnl_vdecl( struct svga_hwtnl *hwtnl, hwtnl->cmd.vdecl[i] = *decl; - pipe_buffer_reference(&hwtnl->cmd.vdecl_vb[i], - vb); + pipe_resource_reference(&hwtnl->cmd.vdecl_vb[i], vb); } @@ -198,7 +198,7 @@ svga_hwtnl_flush( struct svga_hwtnl *hwtnl ) swc->surface_relocation(swc, &vdecl[i].array.surfaceId, vb_handle[i], - PIPE_BUFFER_USAGE_GPU_READ); + SVGA_RELOC_READ); } memcpy( prim, @@ -209,8 +209,8 @@ svga_hwtnl_flush( struct svga_hwtnl *hwtnl ) swc->surface_relocation(swc, &prim[i].indexArray.surfaceId, ib_handle[i], - PIPE_BUFFER_USAGE_GPU_READ); - pipe_buffer_reference(&hwtnl->cmd.prim_ib[i], NULL); + SVGA_RELOC_READ); + pipe_resource_reference(&hwtnl->cmd.prim_ib[i], NULL); } SVGA_FIFOCommitAll( swc ); @@ -232,7 +232,7 @@ enum pipe_error svga_hwtnl_prim( struct svga_hwtnl *hwtnl, const SVGA3dPrimitiveRange *range, unsigned min_index, unsigned max_index, - struct pipe_buffer *ib ) + struct pipe_resource *ib ) { int ret = PIPE_OK; @@ -240,8 +240,8 @@ enum pipe_error svga_hwtnl_prim( struct svga_hwtnl *hwtnl, { unsigned i; for (i = 0; i < hwtnl->cmd.vdecl_count; i++) { - struct pipe_buffer *vb = hwtnl->cmd.vdecl_vb[i]; - unsigned size = vb ? vb->size : 0; + struct pipe_resource *vb = hwtnl->cmd.vdecl_vb[i]; + unsigned size = vb ? vb->width0 : 0; unsigned offset = hwtnl->cmd.vdecl[i].array.offset; unsigned stride = hwtnl->cmd.vdecl[i].array.stride; unsigned index_bias = range->indexBias; @@ -324,7 +324,7 @@ enum pipe_error svga_hwtnl_prim( struct svga_hwtnl *hwtnl, assert(range->indexWidth == range->indexArray.stride); if(ib) { - unsigned size = ib->size; + unsigned size = ib->width0; unsigned offset = range->indexArray.offset; unsigned stride = range->indexArray.stride; unsigned count; @@ -375,7 +375,7 @@ enum pipe_error svga_hwtnl_prim( struct svga_hwtnl *hwtnl, hwtnl->cmd.prim[hwtnl->cmd.prim_count] = *range; - pipe_buffer_reference(&hwtnl->cmd.prim_ib[hwtnl->cmd.prim_count], ib); + pipe_resource_reference(&hwtnl->cmd.prim_ib[hwtnl->cmd.prim_count], ib); hwtnl->cmd.prim_count++; return ret; diff --git a/src/gallium/drivers/svga/svga_draw.h b/src/gallium/drivers/svga/svga_draw.h index 14553b17b58..a2403d802be 100644 --- a/src/gallium/drivers/svga/svga_draw.h +++ b/src/gallium/drivers/svga/svga_draw.h @@ -34,7 +34,7 @@ struct svga_hwtnl; struct svga_winsys_context; struct svga_screen; struct svga_context; -struct pipe_buffer; +struct pipe_resource; struct u_upload_mgr; struct svga_hwtnl *svga_hwtnl_create( struct svga_context *svga, @@ -53,7 +53,7 @@ void svga_hwtnl_set_unfilled( struct svga_hwtnl *hwtnl, void svga_hwtnl_vdecl( struct svga_hwtnl *hwtnl, unsigned i, const SVGA3dVertexDecl *decl, - struct pipe_buffer *vb); + struct pipe_resource *vb); void svga_hwtnl_reset_vdecl( struct svga_hwtnl *hwtnl, unsigned count ); @@ -67,14 +67,14 @@ svga_hwtnl_draw_arrays( struct svga_hwtnl *hwtnl, enum pipe_error svga_hwtnl_draw_range_elements( struct svga_hwtnl *hwtnl, - struct pipe_buffer *indexBuffer, + struct pipe_resource *indexBuffer, unsigned index_size, + int index_bias, unsigned min_index, unsigned max_index, unsigned prim, unsigned start, - unsigned count, - unsigned bias ); + unsigned count ); enum pipe_error svga_hwtnl_flush( struct svga_hwtnl *hwtnl ); diff --git a/src/gallium/drivers/svga/svga_draw_arrays.c b/src/gallium/drivers/svga/svga_draw_arrays.c index 6192aa96b11..005996d05d3 100644 --- a/src/gallium/drivers/svga/svga_draw_arrays.c +++ b/src/gallium/drivers/svga/svga_draw_arrays.c @@ -43,40 +43,40 @@ static enum pipe_error generate_indices( struct svga_hwtnl *hwtnl, unsigned nr, unsigned index_size, u_generate_func generate, - struct pipe_buffer **out_buf ) + struct pipe_resource **out_buf ) { - struct pipe_screen *screen = hwtnl->svga->pipe.screen; + struct pipe_context *pipe = &hwtnl->svga->pipe; + struct pipe_transfer *transfer; unsigned size = index_size * nr; - struct pipe_buffer *dst = NULL; + struct pipe_resource *dst = NULL; void *dst_map = NULL; - dst = screen->buffer_create( screen, 32, - PIPE_BUFFER_USAGE_INDEX | - PIPE_BUFFER_USAGE_CPU_WRITE | - PIPE_BUFFER_USAGE_GPU_READ, - size ); + dst = pipe_buffer_create( pipe->screen, + PIPE_BIND_INDEX_BUFFER, + size ); if (dst == NULL) goto fail; - dst_map = pipe_buffer_map( screen, dst, PIPE_BUFFER_USAGE_CPU_WRITE ); + dst_map = pipe_buffer_map( pipe, dst, PIPE_TRANSFER_WRITE, + &transfer); if (dst_map == NULL) goto fail; generate( nr, dst_map ); - pipe_buffer_unmap( screen, dst ); + pipe_buffer_unmap( pipe, dst, transfer ); *out_buf = dst; return PIPE_OK; fail: if (dst_map) - screen->buffer_unmap( screen, dst ); + pipe_buffer_unmap( pipe, dst, transfer ); if (dst) - screen->buffer_destroy( dst ); - + pipe->screen->resource_destroy( pipe->screen, dst ); + return PIPE_ERROR_OUT_OF_MEMORY; } @@ -96,7 +96,7 @@ static enum pipe_error retrieve_or_generate_indices( struct svga_hwtnl *hwtnl, unsigned gen_nr, unsigned gen_size, u_generate_func generate, - struct pipe_buffer **out_buf ) + struct pipe_resource **out_buf ) { enum pipe_error ret = PIPE_OK; int i; @@ -107,7 +107,7 @@ static enum pipe_error retrieve_or_generate_indices( struct svga_hwtnl *hwtnl, { if (compare(hwtnl->index_cache[prim][i].gen_nr, gen_nr, gen_type)) { - pipe_buffer_reference( out_buf, + pipe_resource_reference( out_buf, hwtnl->index_cache[prim][i].buffer ); if (DBG) @@ -117,7 +117,7 @@ static enum pipe_error retrieve_or_generate_indices( struct svga_hwtnl *hwtnl, } else if (gen_type == U_GENERATE_REUSABLE) { - pipe_buffer_reference( &hwtnl->index_cache[prim][i].buffer, + pipe_resource_reference( &hwtnl->index_cache[prim][i].buffer, NULL ); if (DBG) @@ -149,7 +149,7 @@ static enum pipe_error retrieve_or_generate_indices( struct svga_hwtnl *hwtnl, assert (smallest != IDX_CACHE_MAX); - pipe_buffer_reference( &hwtnl->index_cache[prim][smallest].buffer, + pipe_resource_reference( &hwtnl->index_cache[prim][smallest].buffer, NULL ); if (DBG) @@ -171,7 +171,7 @@ static enum pipe_error retrieve_or_generate_indices( struct svga_hwtnl *hwtnl, hwtnl->index_cache[prim][i].generate = generate; hwtnl->index_cache[prim][i].gen_nr = gen_nr; - pipe_buffer_reference( &hwtnl->index_cache[prim][i].buffer, + pipe_resource_reference( &hwtnl->index_cache[prim][i].buffer, *out_buf ); if (DBG) @@ -259,7 +259,7 @@ svga_hwtnl_draw_arrays( struct svga_hwtnl *hwtnl, return simple_draw_arrays( hwtnl, gen_prim, start, count ); } else { - struct pipe_buffer *gen_buf = NULL; + struct pipe_resource *gen_buf = NULL; /* Need to draw as indexed primitive. * Potentially need to run the gen func to build an index buffer. @@ -288,7 +288,7 @@ svga_hwtnl_draw_arrays( struct svga_hwtnl *hwtnl, done: if (gen_buf) - pipe_buffer_reference( &gen_buf, NULL ); + pipe_resource_reference( &gen_buf, NULL ); return ret; } diff --git a/src/gallium/drivers/svga/svga_draw_elements.c b/src/gallium/drivers/svga/svga_draw_elements.c index e8097d82f16..c4579177b77 100644 --- a/src/gallium/drivers/svga/svga_draw_elements.c +++ b/src/gallium/drivers/svga/svga_draw_elements.c @@ -30,7 +30,7 @@ #include "svga_cmd.h" #include "svga_draw.h" #include "svga_draw_private.h" -#include "svga_screen_buffer.h" +#include "svga_resource_buffer.h" #include "svga_winsys.h" #include "svga_context.h" @@ -39,32 +39,32 @@ static enum pipe_error translate_indices( struct svga_hwtnl *hwtnl, - struct pipe_buffer *src, + struct pipe_resource *src, unsigned offset, unsigned nr, unsigned index_size, u_translate_func translate, - struct pipe_buffer **out_buf ) + struct pipe_resource **out_buf ) { - struct pipe_screen *screen = hwtnl->svga->pipe.screen; + struct pipe_context *pipe = &hwtnl->svga->pipe; + struct pipe_transfer *src_transfer = NULL; + struct pipe_transfer *dst_transfer = NULL; unsigned size = index_size * nr; const void *src_map = NULL; - struct pipe_buffer *dst = NULL; + struct pipe_resource *dst = NULL; void *dst_map = NULL; - dst = screen->buffer_create( screen, 32, - PIPE_BUFFER_USAGE_INDEX | - PIPE_BUFFER_USAGE_CPU_WRITE | - PIPE_BUFFER_USAGE_GPU_READ, - size ); + dst = pipe_buffer_create( pipe->screen, + PIPE_BIND_INDEX_BUFFER, + size ); if (dst == NULL) goto fail; - src_map = pipe_buffer_map( screen, src, PIPE_BUFFER_USAGE_CPU_READ ); + src_map = pipe_buffer_map( pipe, src, PIPE_TRANSFER_READ, &src_transfer ); if (src_map == NULL) goto fail; - dst_map = pipe_buffer_map( screen, dst, PIPE_BUFFER_USAGE_CPU_WRITE ); + dst_map = pipe_buffer_map( pipe, dst, PIPE_TRANSFER_WRITE, &dst_transfer ); if (dst_map == NULL) goto fail; @@ -72,21 +72,21 @@ translate_indices( struct svga_hwtnl *hwtnl, nr, dst_map ); - pipe_buffer_unmap( screen, src ); - pipe_buffer_unmap( screen, dst ); + pipe_buffer_unmap( pipe, src, src_transfer ); + pipe_buffer_unmap( pipe, dst, dst_transfer ); *out_buf = dst; return PIPE_OK; fail: if (src_map) - screen->buffer_unmap( screen, src ); + pipe_buffer_unmap( pipe, src, src_transfer ); if (dst_map) - screen->buffer_unmap( screen, dst ); + pipe_buffer_unmap( pipe, dst, dst_transfer ); if (dst) - screen->buffer_destroy( dst ); + pipe->screen->resource_destroy( pipe->screen, dst ); return PIPE_ERROR_OUT_OF_MEMORY; } @@ -97,16 +97,16 @@ fail: enum pipe_error svga_hwtnl_simple_draw_range_elements( struct svga_hwtnl *hwtnl, - struct pipe_buffer *index_buffer, + struct pipe_resource *index_buffer, unsigned index_size, + int index_bias, unsigned min_index, unsigned max_index, unsigned prim, unsigned start, - unsigned count, - unsigned bias ) + unsigned count ) { - struct pipe_buffer *upload_buffer = NULL; + struct pipe_resource *upload_buffer = NULL; SVGA3dPrimitiveRange range; unsigned hw_prim; unsigned hw_count; @@ -120,7 +120,7 @@ svga_hwtnl_simple_draw_range_elements( struct svga_hwtnl *hwtnl, if (index_buffer && svga_buffer_is_user_buffer(index_buffer)) { - assert( index_buffer->size >= index_offset + count * index_size ); + assert( index_buffer->width0 >= index_offset + count * index_size ); ret = u_upload_buffer( hwtnl->upload_ib, index_offset, @@ -143,7 +143,7 @@ svga_hwtnl_simple_draw_range_elements( struct svga_hwtnl *hwtnl, range.indexArray.offset = index_offset; range.indexArray.stride = index_size; range.indexWidth = index_size; - range.indexBias = bias; + range.indexBias = index_bias; ret = svga_hwtnl_prim( hwtnl, &range, min_index, max_index, index_buffer ); if (ret) @@ -151,7 +151,7 @@ svga_hwtnl_simple_draw_range_elements( struct svga_hwtnl *hwtnl, done: if (upload_buffer) - pipe_buffer_reference( &upload_buffer, NULL ); + pipe_resource_reference( &upload_buffer, NULL ); return ret; } @@ -161,12 +161,12 @@ done: enum pipe_error svga_hwtnl_draw_range_elements( struct svga_hwtnl *hwtnl, - struct pipe_buffer *index_buffer, + struct pipe_resource *index_buffer, unsigned index_size, + int index_bias, unsigned min_index, unsigned max_index, - unsigned prim, unsigned start, unsigned count, - unsigned bias) + unsigned prim, unsigned start, unsigned count) { unsigned gen_prim, gen_size, gen_nr, gen_type; u_translate_func gen_func; @@ -204,12 +204,13 @@ svga_hwtnl_draw_range_elements( struct svga_hwtnl *hwtnl, */ return svga_hwtnl_simple_draw_range_elements( hwtnl, index_buffer, index_size, + index_bias, min_index, max_index, - gen_prim, start, count, bias ); + gen_prim, start, count ); } else { - struct pipe_buffer *gen_buf = NULL; + struct pipe_resource *gen_buf = NULL; /* Need to allocate a new index buffer and run the translate * func to populate it. Could potentially cache this translated @@ -231,18 +232,18 @@ svga_hwtnl_draw_range_elements( struct svga_hwtnl *hwtnl, ret = svga_hwtnl_simple_draw_range_elements( hwtnl, gen_buf, gen_size, + index_bias, min_index, max_index, gen_prim, 0, - gen_nr, - bias ); + gen_nr ); if (ret) goto done; done: if (gen_buf) - pipe_buffer_reference( &gen_buf, NULL ); + pipe_resource_reference( &gen_buf, NULL ); return ret; } diff --git a/src/gallium/drivers/svga/svga_draw_private.h b/src/gallium/drivers/svga/svga_draw_private.h index 9aa40e16642..11afb59875b 100644 --- a/src/gallium/drivers/svga/svga_draw_private.h +++ b/src/gallium/drivers/svga/svga_draw_private.h @@ -90,7 +90,7 @@ struct index_cache { /* If non-null, this buffer is filled by calling * generate(nr, map(buffer)) */ - struct pipe_buffer *buffer; + struct pipe_resource *buffer; }; #define QSZ 32 @@ -99,11 +99,11 @@ struct draw_cmd { struct svga_winsys_context *swc; SVGA3dVertexDecl vdecl[SVGA3D_INPUTREG_MAX]; - struct pipe_buffer *vdecl_vb[SVGA3D_INPUTREG_MAX]; + struct pipe_resource *vdecl_vb[SVGA3D_INPUTREG_MAX]; unsigned vdecl_count; SVGA3dPrimitiveRange prim[QSZ]; - struct pipe_buffer *prim_ib[QSZ]; + struct pipe_resource *prim_ib[QSZ]; unsigned prim_count; unsigned min_index[QSZ]; unsigned max_index[QSZ]; @@ -141,18 +141,18 @@ svga_hwtnl_prim( struct svga_hwtnl *hwtnl, const SVGA3dPrimitiveRange *range, unsigned min_index, unsigned max_index, - struct pipe_buffer *ib ); + struct pipe_resource *ib ); enum pipe_error svga_hwtnl_simple_draw_range_elements( struct svga_hwtnl *hwtnl, - struct pipe_buffer *indexBuffer, + struct pipe_resource *indexBuffer, unsigned index_size, + int index_bias, unsigned min_index, unsigned max_index, unsigned prim, unsigned start, - unsigned count, - unsigned bias ); + unsigned count ); #endif diff --git a/src/gallium/drivers/svga/svga_pipe_blit.c b/src/gallium/drivers/svga/svga_pipe_blit.c index 4f575b06e62..889da29e28b 100644 --- a/src/gallium/drivers/svga/svga_pipe_blit.c +++ b/src/gallium/drivers/svga/svga_pipe_blit.c @@ -23,10 +23,11 @@ * **********************************************************/ -#include "svga_screen_texture.h" +#include "svga_resource_texture.h" #include "svga_context.h" #include "svga_debug.h" #include "svga_cmd.h" +#include "svga_surface.h" #define FILE_DEBUG_FLAG DEBUG_BLIT diff --git a/src/gallium/drivers/svga/svga_pipe_clear.c b/src/gallium/drivers/svga/svga_pipe_clear.c index 8483a3fad74..cbff95c9179 100644 --- a/src/gallium/drivers/svga/svga_pipe_clear.c +++ b/src/gallium/drivers/svga/svga_pipe_clear.c @@ -31,7 +31,7 @@ #include "svga_context.h" #include "svga_state.h" -#include "svga_screen_texture.h" +#include "svga_surface.h" static enum pipe_error @@ -63,7 +63,7 @@ try_clear(struct svga_context *svga, if ((buffers & PIPE_CLEAR_DEPTHSTENCIL) && fb->zsbuf) { flags |= SVGA3D_CLEAR_DEPTH; - if (svga->curr.framebuffer.zsbuf->format == PIPE_FORMAT_S8Z24_UNORM) + if (svga->curr.framebuffer.zsbuf->format == PIPE_FORMAT_S8_USCALED_Z24_UNORM) flags |= SVGA3D_CLEAR_STENCIL; rect.w = MAX2(rect.w, fb->zsbuf->width); diff --git a/src/gallium/drivers/svga/svga_pipe_constants.c b/src/gallium/drivers/svga/svga_pipe_constants.c index 73a0cd6b3a8..2fa2142d07d 100644 --- a/src/gallium/drivers/svga/svga_pipe_constants.c +++ b/src/gallium/drivers/svga/svga_pipe_constants.c @@ -45,14 +45,14 @@ struct svga_constbuf static void svga_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index, - struct pipe_buffer *buf) + struct pipe_resource *buf) { struct svga_context *svga = svga_context(pipe); assert(shader < PIPE_SHADER_TYPES); assert(index == 0); - pipe_buffer_reference( &svga->curr.cb[shader], + pipe_resource_reference( &svga->curr.cb[shader], buf ); if (shader == PIPE_SHADER_FRAGMENT) diff --git a/src/gallium/drivers/svga/svga_pipe_draw.c b/src/gallium/drivers/svga/svga_pipe_draw.c index f00cf23935e..58e930d9835 100644 --- a/src/gallium/drivers/svga/svga_pipe_draw.c +++ b/src/gallium/drivers/svga/svga_pipe_draw.c @@ -42,8 +42,9 @@ static enum pipe_error retry_draw_range_elements( struct svga_context *svga, - struct pipe_buffer *index_buffer, + struct pipe_resource *index_buffer, unsigned index_size, + int index_bias, unsigned min_index, unsigned max_index, unsigned prim, @@ -66,9 +67,9 @@ retry_draw_range_elements( struct svga_context *svga, goto retry; ret = svga_hwtnl_draw_range_elements( svga->hwtnl, - index_buffer, index_size, + index_buffer, index_size, index_bias, min_index, max_index, - prim, start, count, 0 ); + prim, start, count ); if (ret) goto retry; @@ -86,7 +87,7 @@ retry: if (do_retry) { return retry_draw_range_elements( svga, - index_buffer, index_size, + index_buffer, index_size, index_bias, min_index, max_index, prim, start, count, FALSE ); @@ -150,8 +151,9 @@ retry: static void svga_draw_range_elements( struct pipe_context *pipe, - struct pipe_buffer *index_buffer, + struct pipe_resource *index_buffer, unsigned index_size, + int index_bias, unsigned min_index, unsigned max_index, unsigned prim, unsigned start, unsigned count) @@ -190,6 +192,7 @@ svga_draw_range_elements( struct pipe_context *pipe, ret = svga_swtnl_draw_range_elements( svga, index_buffer, index_size, + index_bias, min_index, max_index, prim, start, count ); @@ -199,6 +202,7 @@ svga_draw_range_elements( struct pipe_context *pipe, ret = retry_draw_range_elements( svga, index_buffer, index_size, + index_bias, min_index, max_index, prim, @@ -224,12 +228,12 @@ svga_draw_range_elements( struct pipe_context *pipe, static void svga_draw_elements( struct pipe_context *pipe, - struct pipe_buffer *index_buffer, - unsigned index_size, + struct pipe_resource *index_buffer, + unsigned index_size, int index_bias, unsigned prim, unsigned start, unsigned count) { svga_draw_range_elements( pipe, index_buffer, - index_size, + index_size, index_bias, 0, 0xffffffff, prim, start, count ); } @@ -238,7 +242,7 @@ static void svga_draw_arrays( struct pipe_context *pipe, unsigned prim, unsigned start, unsigned count) { - svga_draw_range_elements(pipe, NULL, 0, + svga_draw_range_elements(pipe, NULL, 0, 0, start, start + count - 1, prim, start, count); diff --git a/src/gallium/drivers/svga/svga_pipe_flush.c b/src/gallium/drivers/svga/svga_pipe_flush.c index 7fa2205ae5f..ab243aa6ec5 100644 --- a/src/gallium/drivers/svga/svga_pipe_flush.c +++ b/src/gallium/drivers/svga/svga_pipe_flush.c @@ -25,7 +25,7 @@ #include "pipe/p_defines.h" #include "svga_screen.h" -#include "svga_screen_texture.h" +#include "svga_surface.h" #include "svga_context.h" #include "svga_debug.h" diff --git a/src/gallium/drivers/svga/svga_pipe_misc.c b/src/gallium/drivers/svga/svga_pipe_misc.c index 95bf0e6f91b..8c24fb302f7 100644 --- a/src/gallium/drivers/svga/svga_pipe_misc.c +++ b/src/gallium/drivers/svga/svga_pipe_misc.c @@ -28,7 +28,7 @@ #include "util/u_inlines.h" #include "svga_context.h" -#include "svga_screen_texture.h" +#include "svga_surface.h" static void svga_set_scissor_state( struct pipe_context *pipe, @@ -118,9 +118,9 @@ static void svga_set_framebuffer_state(struct pipe_context *pipe, case PIPE_FORMAT_Z16_UNORM: svga->curr.depthscale = 1.0f / DEPTH_BIAS_SCALE_FACTOR_D16; break; - case PIPE_FORMAT_Z24S8_UNORM: + case PIPE_FORMAT_Z24_UNORM_S8_USCALED: case PIPE_FORMAT_Z24X8_UNORM: - case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: case PIPE_FORMAT_X8Z24_UNORM: svga->curr.depthscale = 1.0f / DEPTH_BIAS_SCALE_FACTOR_D24S8; break; diff --git a/src/gallium/drivers/svga/svga_pipe_query.c b/src/gallium/drivers/svga/svga_pipe_query.c index 08283e37317..9c6f5858ba4 100644 --- a/src/gallium/drivers/svga/svga_pipe_query.c +++ b/src/gallium/drivers/svga/svga_pipe_query.c @@ -30,7 +30,7 @@ #include "svga_cmd.h" #include "svga_context.h" #include "svga_screen.h" -#include "svga_screen_buffer.h" +#include "svga_resource_buffer.h" #include "svga_winsys.h" #include "svga_debug.h" @@ -89,7 +89,7 @@ static struct pipe_query *svga_create_query( struct pipe_context *pipe, sq->queryResult = (SVGA3dQueryResult *)sws->buffer_map(sws, sq->hwbuf, - PIPE_BUFFER_USAGE_CPU_WRITE); + PIPE_TRANSFER_WRITE); if(!sq->queryResult) goto no_query_result; diff --git a/src/gallium/drivers/svga/svga_pipe_rasterizer.c b/src/gallium/drivers/svga/svga_pipe_rasterizer.c index 35717788677..5253c45cb20 100644 --- a/src/gallium/drivers/svga/svga_pipe_rasterizer.c +++ b/src/gallium/drivers/svga/svga_pipe_rasterizer.c @@ -222,7 +222,8 @@ static void svga_bind_rasterizer_state( struct pipe_context *pipe, svga->curr.rast = raster; - draw_set_rasterizer_state(svga->swtnl.draw, raster ? &raster->templ : NULL); + draw_set_rasterizer_state(svga->swtnl.draw, raster ? &raster->templ : NULL, + state); svga->dirty |= SVGA_NEW_RAST; } diff --git a/src/gallium/drivers/svga/svga_pipe_sampler.c b/src/gallium/drivers/svga/svga_pipe_sampler.c index acba2b8f9da..f44a0e1325a 100644 --- a/src/gallium/drivers/svga/svga_pipe_sampler.c +++ b/src/gallium/drivers/svga/svga_pipe_sampler.c @@ -30,7 +30,7 @@ #include "tgsi/tgsi_parse.h" #include "svga_context.h" -#include "svga_screen_texture.h" +#include "svga_resource_texture.h" #include "svga_debug.h" @@ -155,7 +155,7 @@ static void svga_bind_sampler_states(struct pipe_context *pipe, /* Check for no-op */ if (num == svga->curr.num_samplers && !memcmp(svga->curr.sampler, sampler, num * sizeof(void *))) { - debug_printf("sampler noop\n"); + if (0) debug_printf("sampler noop\n"); return; } @@ -176,9 +176,36 @@ static void svga_delete_sampler_state(struct pipe_context *pipe, } -static void svga_set_sampler_textures(struct pipe_context *pipe, - unsigned num, - struct pipe_texture **texture) +static struct pipe_sampler_view * +svga_create_sampler_view(struct pipe_context *pipe, + struct pipe_resource *texture, + const struct pipe_sampler_view *templ) +{ + struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view); + + if (view) { + *view = *templ; + view->reference.count = 1; + view->texture = NULL; + pipe_resource_reference(&view->texture, texture); + view->context = pipe; + } + + return view; +} + + +static void +svga_sampler_view_destroy(struct pipe_context *pipe, + struct pipe_sampler_view *view) +{ + pipe_resource_reference(&view->texture, NULL); + FREE(view); +} + +static void svga_set_sampler_views(struct pipe_context *pipe, + unsigned num, + struct pipe_sampler_view **views) { struct svga_context *svga = svga_context(pipe); unsigned flag_1d = 0; @@ -188,31 +215,31 @@ static void svga_set_sampler_textures(struct pipe_context *pipe, assert(num <= PIPE_MAX_SAMPLERS); /* Check for no-op */ - if (num == svga->curr.num_textures && - !memcmp(svga->curr.texture, texture, num * sizeof(struct pipe_texture *))) { + if (num == svga->curr.num_sampler_views && + !memcmp(svga->curr.sampler_views, views, num * sizeof(struct pipe_sampler_view *))) { if (0) debug_printf("texture noop\n"); return; } for (i = 0; i < num; i++) { - pipe_texture_reference(&svga->curr.texture[i], - texture[i]); + pipe_sampler_view_reference(&svga->curr.sampler_views[i], + views[i]); - if (!texture[i]) + if (!views[i]) continue; - if (texture[i]->format == PIPE_FORMAT_B8G8R8A8_SRGB) + if (views[i]->texture->format == PIPE_FORMAT_B8G8R8A8_SRGB) flag_srgb |= 1 << i; - if (texture[i]->target == PIPE_TEXTURE_1D) + if (views[i]->texture->target == PIPE_TEXTURE_1D) flag_1d |= 1 << i; } - for (i = num; i < svga->curr.num_textures; i++) - pipe_texture_reference(&svga->curr.texture[i], - NULL); + for (i = num; i < svga->curr.num_sampler_views; i++) + pipe_sampler_view_reference(&svga->curr.sampler_views[i], + NULL); - svga->curr.num_textures = num; + svga->curr.num_sampler_views = num; svga->dirty |= SVGA_NEW_TEXTURE_BINDING; if (flag_srgb != svga->curr.tex_flags.flag_srgb || @@ -231,7 +258,9 @@ void svga_init_sampler_functions( struct svga_context *svga ) svga->pipe.create_sampler_state = svga_create_sampler_state; svga->pipe.bind_fragment_sampler_states = svga_bind_sampler_states; svga->pipe.delete_sampler_state = svga_delete_sampler_state; - svga->pipe.set_fragment_sampler_textures = svga_set_sampler_textures; + svga->pipe.set_fragment_sampler_views = svga_set_sampler_views; + svga->pipe.create_sampler_view = svga_create_sampler_view; + svga->pipe.sampler_view_destroy = svga_sampler_view_destroy; } diff --git a/src/gallium/drivers/svga/svga_pipe_vertex.c b/src/gallium/drivers/svga/svga_pipe_vertex.c index 836b8441da2..23808ad08e0 100644 --- a/src/gallium/drivers/svga/svga_pipe_vertex.c +++ b/src/gallium/drivers/svga/svga_pipe_vertex.c @@ -26,10 +26,11 @@ #include "util/u_inlines.h" #include "pipe/p_defines.h" #include "util/u_math.h" +#include "util/u_memory.h" #include "tgsi/tgsi_parse.h" #include "svga_screen.h" -#include "svga_screen_buffer.h" +#include "svga_resource_buffer.h" #include "svga_context.h" @@ -48,13 +49,13 @@ static void svga_set_vertex_buffers(struct pipe_context *pipe, /* Adjust refcounts */ for (i = 0; i < count; i++) { - pipe_buffer_reference(&svga->curr.vb[i].buffer, buffers[i].buffer); + pipe_resource_reference(&svga->curr.vb[i].buffer, buffers[i].buffer); if (svga_buffer_is_user_buffer(buffers[i].buffer)) any_user_buffer = TRUE; } for ( ; i < svga->curr.num_vertex_buffers; i++) - pipe_buffer_reference(&svga->curr.vb[i].buffer, NULL); + pipe_resource_reference(&svga->curr.vb[i].buffer, NULL); /* Copy remaining data */ memcpy(svga->curr.vb, buffers, count * sizeof buffers[0]); @@ -64,34 +65,53 @@ static void svga_set_vertex_buffers(struct pipe_context *pipe, svga->dirty |= SVGA_NEW_VBUFFER; } -static void svga_set_vertex_elements(struct pipe_context *pipe, - unsigned count, - const struct pipe_vertex_element *elements) + +static void * +svga_create_vertex_elements_state(struct pipe_context *pipe, + unsigned count, + const struct pipe_vertex_element *attribs) { - struct svga_context *svga = svga_context(pipe); - unsigned i; + struct svga_velems_state *velems; + assert(count <= PIPE_MAX_ATTRIBS); + velems = (struct svga_velems_state *) MALLOC(sizeof(struct svga_velems_state)); + if (velems) { + velems->count = count; + memcpy(velems->velem, attribs, sizeof(*attribs) * count); + } + return velems; +} - for (i = 0; i < count; i++) - svga->curr.ve[i] = elements[i]; +static void svga_bind_vertex_elements_state(struct pipe_context *pipe, + void *velems) +{ + struct svga_context *svga = svga_context(pipe); + struct svga_velems_state *svga_velems = (struct svga_velems_state *) velems; - svga->curr.num_vertex_elements = count; + svga->curr.velems = svga_velems; svga->dirty |= SVGA_NEW_VELEMENT; } +static void svga_delete_vertex_elements_state(struct pipe_context *pipe, + void *velems) +{ + FREE(velems); +} void svga_cleanup_vertex_state( struct svga_context *svga ) { unsigned i; for (i = 0 ; i < svga->curr.num_vertex_buffers; i++) - pipe_buffer_reference(&svga->curr.vb[i].buffer, NULL); + pipe_resource_reference(&svga->curr.vb[i].buffer, NULL); } void svga_init_vertex_functions( struct svga_context *svga ) { svga->pipe.set_vertex_buffers = svga_set_vertex_buffers; - svga->pipe.set_vertex_elements = svga_set_vertex_elements; + svga->pipe.create_vertex_elements_state = svga_create_vertex_elements_state; + svga->pipe.bind_vertex_elements_state = svga_bind_vertex_elements_state; + svga->pipe.delete_vertex_elements_state = svga_delete_vertex_elements_state; } diff --git a/src/gallium/drivers/svga/svga_resource.c b/src/gallium/drivers/svga/svga_resource.c new file mode 100644 index 00000000000..ba630582e59 --- /dev/null +++ b/src/gallium/drivers/svga/svga_resource.c @@ -0,0 +1,55 @@ +#include "util/u_debug.h" + +#include "svga_resource.h" +#include "svga_resource_buffer.h" +#include "svga_resource_texture.h" +#include "svga_context.h" +#include "svga_screen.h" + + +static struct pipe_resource * +svga_resource_create(struct pipe_screen *screen, + const struct pipe_resource *template) +{ + if (template->target == PIPE_BUFFER) + return svga_buffer_create(screen, template); + else + return svga_texture_create(screen, template); + +} + +static struct pipe_resource * +svga_resource_from_handle(struct pipe_screen * screen, + const struct pipe_resource *template, + struct winsys_handle *whandle) +{ + if (template->target == PIPE_BUFFER) + return NULL; + else + return svga_texture_from_handle(screen, template, whandle); +} + + +void +svga_init_resource_functions(struct svga_context *svga) +{ + svga->pipe.get_transfer = u_get_transfer_vtbl; + svga->pipe.transfer_map = u_transfer_map_vtbl; + svga->pipe.transfer_flush_region = u_transfer_flush_region_vtbl; + svga->pipe.transfer_unmap = u_transfer_unmap_vtbl; + svga->pipe.transfer_destroy = u_transfer_destroy_vtbl; + svga->pipe.transfer_inline_write = u_transfer_inline_write_vtbl; +} + +void +svga_init_screen_resource_functions(struct svga_screen *is) +{ + is->screen.resource_create = svga_resource_create; + is->screen.resource_from_handle = svga_resource_from_handle; + is->screen.resource_get_handle = u_resource_get_handle_vtbl; + is->screen.resource_destroy = u_resource_destroy_vtbl; + is->screen.user_buffer_create = svga_user_buffer_create; +} + + + diff --git a/src/gallium/drivers/cell/ppu/cell_winsys.h b/src/gallium/drivers/svga/svga_resource.h index e227e065ff3..851e3b50ce3 100644 --- a/src/gallium/drivers/cell/ppu/cell_winsys.h +++ b/src/gallium/drivers/svga/svga_resource.h @@ -1,6 +1,6 @@ /************************************************************************** * - * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas. + * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a @@ -25,23 +25,19 @@ * **************************************************************************/ +#ifndef SVGA_RESOURCE_H +#define SVGA_RESOURCE_H -#ifndef CELL_WINSYS_H -#define CELL_WINSYS_H +struct svga_screen; -#include "pipe/p_compiler.h" +#include "util/u_debug.h" +struct svga_context; +struct svga_screen; -/** - * Very simple winsys at this time. - * Will probably eventually add SPU control info. - */ -struct cell_winsys -{ - uint dummy; -}; +void svga_init_screen_resource_functions(struct svga_screen *is); +void svga_init_resource_functions(struct svga_context *svga ); - -#endif +#endif /* SVGA_RESOURCE_H */ diff --git a/src/gallium/drivers/svga/svga_resource_buffer.c b/src/gallium/drivers/svga/svga_resource_buffer.c new file mode 100644 index 00000000000..18eeff9c67e --- /dev/null +++ b/src/gallium/drivers/svga/svga_resource_buffer.c @@ -0,0 +1,355 @@ +/********************************************************** + * Copyright 2008-2009 VMware, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + **********************************************************/ + +#include "svga_cmd.h" + +#include "pipe/p_state.h" +#include "pipe/p_defines.h" +#include "util/u_inlines.h" +#include "os/os_thread.h" +#include "util/u_math.h" +#include "util/u_memory.h" + +#include "svga_context.h" +#include "svga_screen.h" +#include "svga_resource_buffer.h" +#include "svga_resource_buffer_upload.h" +#include "svga_winsys.h" +#include "svga_debug.h" + + +/** + * Vertex and index buffers need hardware backing. Constant buffers + * do not. No other types of buffers currently supported. + */ +static INLINE boolean +svga_buffer_needs_hw_storage(unsigned usage) +{ + return usage & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER); +} + + +static unsigned int +svga_buffer_is_referenced( struct pipe_context *pipe, + struct pipe_resource *buf, + unsigned face, unsigned level) +{ + struct svga_screen *ss = svga_screen(pipe->screen); + struct svga_buffer *sbuf = svga_buffer(buf); + + /** + * XXX: Check this. + * The screen may cache buffer writes, but when we map, we map out + * of those cached writes, so we don't need to set a + * PIPE_REFERENCED_FOR_WRITE flag for cached buffers. + */ + + if (!sbuf->handle || ss->sws->surface_is_flushed(ss->sws, sbuf->handle)) + return PIPE_UNREFERENCED; + + /** + * sws->surface_is_flushed() does not distinguish between read references + * and write references. So assume a reference is both, + * however, we make an exception for index- and vertex buffers, to avoid + * a flush in st_bufferobj_get_subdata, during display list replay. + */ + + if (sbuf->b.b.bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) + return PIPE_REFERENCED_FOR_READ; + + return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE; +} + + + + + + +static void * +svga_buffer_map_range( struct pipe_screen *screen, + struct pipe_resource *buf, + unsigned offset, + unsigned length, + unsigned usage ) +{ + struct svga_screen *ss = svga_screen(screen); + struct svga_winsys_screen *sws = ss->sws; + struct svga_buffer *sbuf = svga_buffer( buf ); + void *map; + + if (!sbuf->swbuf && !sbuf->hwbuf) { + if (svga_buffer_create_hw_storage(ss, sbuf) != PIPE_OK) { + /* + * We can't create a hardware buffer big enough, so create a malloc + * buffer instead. + */ + debug_printf("%s: failed to allocate %u KB of DMA, splitting DMA transfers\n", + __FUNCTION__, + (sbuf->b.b.width0 + 1023)/1024); + + sbuf->swbuf = align_malloc(sbuf->b.b.width0, 16); + } + } + + if (sbuf->swbuf) { + /* User/malloc buffer */ + map = sbuf->swbuf; + } + else if (sbuf->hwbuf) { + map = sws->buffer_map(sws, sbuf->hwbuf, usage); + } + else { + map = NULL; + } + + if(map) { + pipe_mutex_lock(ss->swc_mutex); + + ++sbuf->map.count; + + if (usage & PIPE_TRANSFER_WRITE) { + assert(sbuf->map.count <= 1); + sbuf->map.writing = TRUE; + if (usage & PIPE_TRANSFER_FLUSH_EXPLICIT) + sbuf->map.flush_explicit = TRUE; + } + + pipe_mutex_unlock(ss->swc_mutex); + } + + return map; +} + + + +static void +svga_buffer_flush_mapped_range( struct pipe_screen *screen, + struct pipe_resource *buf, + unsigned offset, unsigned length) +{ + struct svga_buffer *sbuf = svga_buffer( buf ); + struct svga_screen *ss = svga_screen(screen); + + pipe_mutex_lock(ss->swc_mutex); + assert(sbuf->map.writing); + if(sbuf->map.writing) { + assert(sbuf->map.flush_explicit); + svga_buffer_add_range(sbuf, offset, offset + length); + } + pipe_mutex_unlock(ss->swc_mutex); +} + +static void +svga_buffer_unmap( struct pipe_screen *screen, + struct pipe_resource *buf) +{ + struct svga_screen *ss = svga_screen(screen); + struct svga_winsys_screen *sws = ss->sws; + struct svga_buffer *sbuf = svga_buffer( buf ); + + pipe_mutex_lock(ss->swc_mutex); + + assert(sbuf->map.count); + if(sbuf->map.count) + --sbuf->map.count; + + if(sbuf->hwbuf) + sws->buffer_unmap(sws, sbuf->hwbuf); + + if(sbuf->map.writing) { + if(!sbuf->map.flush_explicit) { + /* No mapped range was flushed -- flush the whole buffer */ + SVGA_DBG(DEBUG_DMA, "flushing the whole buffer\n"); + + svga_buffer_add_range(sbuf, 0, sbuf->b.b.width0); + } + + sbuf->map.writing = FALSE; + sbuf->map.flush_explicit = FALSE; + } + + pipe_mutex_unlock(ss->swc_mutex); +} + + + +static void +svga_buffer_destroy( struct pipe_screen *screen, + struct pipe_resource *buf ) +{ + struct svga_screen *ss = svga_screen(screen); + struct svga_buffer *sbuf = svga_buffer( buf ); + + assert(!p_atomic_read(&buf->reference.count)); + + assert(!sbuf->dma.pending); + + if(sbuf->handle) + svga_buffer_destroy_host_surface(ss, sbuf); + + if(sbuf->uploaded.buffer) + pipe_resource_reference(&sbuf->uploaded.buffer, NULL); + + if(sbuf->hwbuf) + svga_buffer_destroy_hw_storage(ss, sbuf); + + if(sbuf->swbuf && !sbuf->user) + align_free(sbuf->swbuf); + + FREE(sbuf); +} + + +/* Keep the original code more or less intact, implement transfers in + * terms of the old functions. + */ +static void * +svga_buffer_transfer_map( struct pipe_context *pipe, + struct pipe_transfer *transfer ) +{ + uint8_t *map = svga_buffer_map_range( pipe->screen, + transfer->resource, + transfer->box.x, + transfer->box.width, + transfer->usage ); + if (map == NULL) + return NULL; + + /* map_buffer() returned a pointer to the beginning of the buffer, + * but transfers are expected to return a pointer to just the + * region specified in the box. + */ + return map + transfer->box.x; +} + + + +static void svga_buffer_transfer_flush_region( struct pipe_context *pipe, + struct pipe_transfer *transfer, + const struct pipe_box *box) +{ + assert(box->x + box->width <= transfer->box.width); + + svga_buffer_flush_mapped_range(pipe->screen, + transfer->resource, + transfer->box.x + box->x, + box->width); +} + +static void svga_buffer_transfer_unmap( struct pipe_context *pipe, + struct pipe_transfer *transfer ) +{ + svga_buffer_unmap(pipe->screen, + transfer->resource); +} + + + + + + + +struct u_resource_vtbl svga_buffer_vtbl = +{ + u_default_resource_get_handle, /* get_handle */ + svga_buffer_destroy, /* resource_destroy */ + svga_buffer_is_referenced, /* is_resource_referenced */ + u_default_get_transfer, /* get_transfer */ + u_default_transfer_destroy, /* transfer_destroy */ + svga_buffer_transfer_map, /* transfer_map */ + svga_buffer_transfer_flush_region, /* transfer_flush_region */ + svga_buffer_transfer_unmap, /* transfer_unmap */ + u_default_transfer_inline_write /* transfer_inline_write */ +}; + + + +struct pipe_resource * +svga_buffer_create(struct pipe_screen *screen, + const struct pipe_resource *template) +{ + struct svga_screen *ss = svga_screen(screen); + struct svga_buffer *sbuf; + + sbuf = CALLOC_STRUCT(svga_buffer); + if(!sbuf) + goto error1; + + sbuf->b.b = *template; + sbuf->b.vtbl = &svga_buffer_vtbl; + pipe_reference_init(&sbuf->b.b.reference, 1); + sbuf->b.b.screen = screen; + + if(svga_buffer_needs_hw_storage(template->bind)) { + if(svga_buffer_create_host_surface(ss, sbuf) != PIPE_OK) + goto error2; + } + else { + sbuf->swbuf = align_malloc(template->width0, 64); + if(!sbuf->swbuf) + goto error2; + } + + return &sbuf->b.b; + +error2: + FREE(sbuf); +error1: + return NULL; +} + +struct pipe_resource * +svga_user_buffer_create(struct pipe_screen *screen, + void *ptr, + unsigned bytes, + unsigned bind) +{ + struct svga_buffer *sbuf; + + sbuf = CALLOC_STRUCT(svga_buffer); + if(!sbuf) + goto no_sbuf; + + pipe_reference_init(&sbuf->b.b.reference, 1); + sbuf->b.vtbl = &svga_buffer_vtbl; + sbuf->b.b.screen = screen; + sbuf->b.b.format = PIPE_FORMAT_R8_UNORM; /* ?? */ + sbuf->b.b.usage = PIPE_USAGE_IMMUTABLE; + sbuf->b.b.bind = bind; + sbuf->b.b.width0 = bytes; + sbuf->b.b.height0 = 1; + sbuf->b.b.depth0 = 1; + + sbuf->swbuf = ptr; + sbuf->user = TRUE; + + return &sbuf->b.b; + +no_sbuf: + return NULL; +} + + + diff --git a/src/gallium/drivers/svga/svga_screen_buffer.h b/src/gallium/drivers/svga/svga_resource_buffer.h index 8c862fa62d6..55e7321184f 100644 --- a/src/gallium/drivers/svga/svga_screen_buffer.h +++ b/src/gallium/drivers/svga/svga_resource_buffer.h @@ -29,14 +29,13 @@ #include "pipe/p_compiler.h" #include "pipe/p_state.h" +#include "util/u_transfer.h" #include "util/u_double_list.h" #include "svga_screen_cache.h" -#define SVGA_BUFFER_MAGIC 0x344f9005 - /** * Maximum number of discontiguous ranges */ @@ -49,6 +48,8 @@ struct svga_winsys_buffer; struct svga_winsys_surface; +extern struct u_resource_vtbl svga_buffer_vtbl; + struct svga_buffer_range { unsigned start; @@ -61,12 +62,7 @@ struct svga_buffer_range */ struct svga_buffer { - struct pipe_buffer base; - - /** - * Marker to detect bad casts in runtime. - */ - uint32_t magic; + struct u_resource b; /** * Regular (non DMA'able) memory. @@ -138,7 +134,7 @@ struct svga_buffer * Information about uploaded version of user buffers. */ struct { - struct pipe_buffer *buffer; + struct pipe_resource *buffer; /** * We combine multiple user buffers into the same hardware buffer. This @@ -190,10 +186,10 @@ struct svga_buffer static INLINE struct svga_buffer * -svga_buffer(struct pipe_buffer *buffer) +svga_buffer(struct pipe_resource *buffer) { if (buffer) { - assert(((struct svga_buffer *)buffer)->magic == SVGA_BUFFER_MAGIC); + assert(((struct svga_buffer *)buffer)->b.vtbl == &svga_buffer_vtbl); return (struct svga_buffer *)buffer; } return NULL; @@ -205,14 +201,24 @@ svga_buffer(struct pipe_buffer *buffer) * decide to use an alternate upload path for these buffers. */ static INLINE boolean -svga_buffer_is_user_buffer( struct pipe_buffer *buffer ) +svga_buffer_is_user_buffer( struct pipe_resource *buffer ) { return svga_buffer(buffer)->user; } -void -svga_screen_init_buffer_functions(struct pipe_screen *screen); + + +struct pipe_resource * +svga_user_buffer_create(struct pipe_screen *screen, + void *ptr, + unsigned bytes, + unsigned usage); + +struct pipe_resource * +svga_buffer_create(struct pipe_screen *screen, + const struct pipe_resource *template); + /** @@ -226,7 +232,7 @@ svga_screen_init_buffer_functions(struct pipe_screen *screen); */ struct svga_winsys_surface * svga_buffer_handle(struct svga_context *svga, - struct pipe_buffer *buf); + struct pipe_resource *buf); void svga_context_flush_buffers(struct svga_context *svga); diff --git a/src/gallium/drivers/svga/svga_resource_buffer_host.c b/src/gallium/drivers/svga/svga_resource_buffer_host.c new file mode 100644 index 00000000000..139597f9cb0 --- /dev/null +++ b/src/gallium/drivers/svga/svga_resource_buffer_host.c @@ -0,0 +1,2 @@ + + diff --git a/src/gallium/drivers/svga/svga_screen_buffer.c b/src/gallium/drivers/svga/svga_resource_buffer_upload.c index 1ff6a3a5b31..acef60f4647 100644 --- a/src/gallium/drivers/svga/svga_screen_buffer.c +++ b/src/gallium/drivers/svga/svga_resource_buffer_upload.c @@ -34,88 +34,14 @@ #include "svga_context.h" #include "svga_screen.h" -#include "svga_screen_buffer.h" +#include "svga_resource_buffer.h" +#include "svga_resource_buffer_upload.h" #include "svga_winsys.h" #include "svga_debug.h" -/** - * Vertex and index buffers have to be treated slightly differently from - * regular guest memory regions because the SVGA device sees them as - * surfaces, and the state tracker can create/destroy without the pipe - * driver, therefore we must do the uploads from the vws. +/* Allocate a winsys_buffer (ie. DMA, aka GMR memory). */ -static INLINE boolean -svga_buffer_needs_hw_storage(unsigned usage) -{ - return usage & (PIPE_BUFFER_USAGE_VERTEX | PIPE_BUFFER_USAGE_INDEX); -} - - -static INLINE enum pipe_error -svga_buffer_create_host_surface(struct svga_screen *ss, - struct svga_buffer *sbuf) -{ - if(!sbuf->handle) { - sbuf->key.flags = 0; - - sbuf->key.format = SVGA3D_BUFFER; - if(sbuf->base.usage & PIPE_BUFFER_USAGE_VERTEX) - sbuf->key.flags |= SVGA3D_SURFACE_HINT_VERTEXBUFFER; - if(sbuf->base.usage & PIPE_BUFFER_USAGE_INDEX) - sbuf->key.flags |= SVGA3D_SURFACE_HINT_INDEXBUFFER; - - sbuf->key.size.width = sbuf->base.size; - sbuf->key.size.height = 1; - sbuf->key.size.depth = 1; - - sbuf->key.numFaces = 1; - sbuf->key.numMipLevels = 1; - sbuf->key.cachable = 1; - - SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n", sbuf->base.size); - - sbuf->handle = svga_screen_surface_create(ss, &sbuf->key); - if(!sbuf->handle) - return PIPE_ERROR_OUT_OF_MEMORY; - - /* Always set the discard flag on the first time the buffer is written - * as svga_screen_surface_create might have passed a recycled host - * buffer. - */ - sbuf->dma.flags.discard = TRUE; - - SVGA_DBG(DEBUG_DMA, " --> got sid %p sz %d (buffer)\n", sbuf->handle, sbuf->base.size); - } - - return PIPE_OK; -} - - -static INLINE void -svga_buffer_destroy_host_surface(struct svga_screen *ss, - struct svga_buffer *sbuf) -{ - if(sbuf->handle) { - SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n", sbuf->handle, sbuf->base.size); - svga_screen_surface_destroy(ss, &sbuf->key, &sbuf->handle); - } -} - - -static INLINE void -svga_buffer_destroy_hw_storage(struct svga_screen *ss, struct svga_buffer *sbuf) -{ - struct svga_winsys_screen *sws = ss->sws; - - assert(!sbuf->map.count); - assert(sbuf->hwbuf); - if(sbuf->hwbuf) { - sws->buffer_destroy(sws, sbuf->hwbuf); - sbuf->hwbuf = NULL; - } -} - struct svga_winsys_buffer * svga_winsys_buffer_create( struct svga_screen *ss, unsigned alignment, @@ -142,21 +68,36 @@ svga_winsys_buffer_create( struct svga_screen *ss, } +void +svga_buffer_destroy_hw_storage(struct svga_screen *ss, struct svga_buffer *sbuf) +{ + struct svga_winsys_screen *sws = ss->sws; + + assert(!sbuf->map.count); + assert(sbuf->hwbuf); + if(sbuf->hwbuf) { + sws->buffer_destroy(sws, sbuf->hwbuf); + sbuf->hwbuf = NULL; + } +} + + + /** * Allocate DMA'ble storage for the buffer. * * Called before mapping a buffer. */ -static INLINE enum pipe_error +enum pipe_error svga_buffer_create_hw_storage(struct svga_screen *ss, struct svga_buffer *sbuf) { assert(!sbuf->user); if(!sbuf->hwbuf) { - unsigned alignment = sbuf->base.alignment; + unsigned alignment = 16; unsigned usage = 0; - unsigned size = sbuf->base.size; + unsigned size = sbuf->b.b.width0; sbuf->hwbuf = svga_winsys_buffer_create(ss, alignment, usage, size); if(!sbuf->hwbuf) @@ -169,6 +110,58 @@ svga_buffer_create_hw_storage(struct svga_screen *ss, } + +enum pipe_error +svga_buffer_create_host_surface(struct svga_screen *ss, + struct svga_buffer *sbuf) +{ + if(!sbuf->handle) { + sbuf->key.flags = 0; + + sbuf->key.format = SVGA3D_BUFFER; + if(sbuf->b.b.bind & PIPE_BIND_VERTEX_BUFFER) + sbuf->key.flags |= SVGA3D_SURFACE_HINT_VERTEXBUFFER; + if(sbuf->b.b.bind & PIPE_BIND_INDEX_BUFFER) + sbuf->key.flags |= SVGA3D_SURFACE_HINT_INDEXBUFFER; + + sbuf->key.size.width = sbuf->b.b.width0; + sbuf->key.size.height = 1; + sbuf->key.size.depth = 1; + + sbuf->key.numFaces = 1; + sbuf->key.numMipLevels = 1; + sbuf->key.cachable = 1; + + SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n", sbuf->b.b.width0); + + sbuf->handle = svga_screen_surface_create(ss, &sbuf->key); + if(!sbuf->handle) + return PIPE_ERROR_OUT_OF_MEMORY; + + /* Always set the discard flag on the first time the buffer is written + * as svga_screen_surface_create might have passed a recycled host + * buffer. + */ + sbuf->dma.flags.discard = TRUE; + + SVGA_DBG(DEBUG_DMA, " --> got sid %p sz %d (buffer)\n", sbuf->handle, sbuf->b.b.width0); + } + + return PIPE_OK; +} + + +void +svga_buffer_destroy_host_surface(struct svga_screen *ss, + struct svga_buffer *sbuf) +{ + if(sbuf->handle) { + SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n", sbuf->handle, sbuf->b.b.width0); + svga_screen_surface_destroy(ss, &sbuf->key, &sbuf->handle); + } +} + + /** * Variant of SVGA3D_BufferDMA which leaves the copy box temporarily in blank. */ @@ -186,15 +179,15 @@ svga_buffer_upload_command(struct svga_context *svga, SVGA3dCmdSurfaceDMASuffix *pSuffix; unsigned region_flags; unsigned surface_flags; - struct pipe_buffer *dummy; + struct pipe_resource *dummy; if(transfer == SVGA3D_WRITE_HOST_VRAM) { - region_flags = PIPE_BUFFER_USAGE_GPU_READ; - surface_flags = PIPE_BUFFER_USAGE_GPU_WRITE; + region_flags = SVGA_RELOC_READ; + surface_flags = SVGA_RELOC_WRITE; } else if(transfer == SVGA3D_READ_HOST_VRAM) { - region_flags = PIPE_BUFFER_USAGE_GPU_WRITE; - surface_flags = PIPE_BUFFER_USAGE_GPU_READ; + region_flags = SVGA_RELOC_WRITE; + surface_flags = SVGA_RELOC_READ; } else { assert(0); @@ -224,11 +217,11 @@ svga_buffer_upload_command(struct svga_context *svga, /* Increment reference count */ dummy = NULL; - pipe_buffer_reference(&dummy, &sbuf->base); + pipe_resource_reference(&dummy, &sbuf->b.b); pSuffix = (SVGA3dCmdSurfaceDMASuffix *)((uint8_t*)cmd + sizeof *cmd + numBoxes * sizeof *boxes); pSuffix->suffixSize = sizeof *pSuffix; - pSuffix->maximumOffset = sbuf->base.size; + pSuffix->maximumOffset = sbuf->b.b.width0; pSuffix->flags = sbuf->dma.flags; SVGA_FIFOCommitAll(swc); @@ -291,11 +284,12 @@ svga_buffer_upload_flush(struct svga_context *svga, sbuf->dma.boxes = NULL; /* Decrement reference count */ - pipe_reference(&(sbuf->base.reference), NULL); + pipe_reference(&(sbuf->b.b.reference), NULL); sbuf = NULL; } + /** * Note a dirty range. * @@ -305,7 +299,7 @@ svga_buffer_upload_flush(struct svga_context *svga, * * We try to lump as many contiguous DMA transfers together as possible. */ -static void +void svga_buffer_add_range(struct svga_buffer *sbuf, unsigned start, unsigned end) @@ -330,7 +324,7 @@ svga_buffer_add_range(struct svga_buffer *sbuf, * Note that it is not this function task to care about overlapping ranges, * as the GMR was already given so it is too late to do anything. Situations * where overlapping ranges may pose a problem should be detected via - * pipe_context::is_buffer_referenced and the context that refers to the + * pipe_context::is_resource_referenced and the context that refers to the * buffer should be flushed. */ @@ -400,222 +394,6 @@ svga_buffer_add_range(struct svga_buffer *sbuf, } -static void * -svga_buffer_map_range( struct pipe_screen *screen, - struct pipe_buffer *buf, - unsigned offset, unsigned length, - unsigned usage ) -{ - struct svga_screen *ss = svga_screen(screen); - struct svga_winsys_screen *sws = ss->sws; - struct svga_buffer *sbuf = svga_buffer( buf ); - void *map; - - if (!sbuf->swbuf && !sbuf->hwbuf) { - if (svga_buffer_create_hw_storage(ss, sbuf) != PIPE_OK) { - /* - * We can't create a hardware buffer big enough, so create a malloc - * buffer instead. - */ - - debug_printf("%s: failed to allocate %u KB of DMA, splitting DMA transfers\n", - __FUNCTION__, - (sbuf->base.size + 1023)/1024); - - sbuf->swbuf = align_malloc(sbuf->base.size, sbuf->base.alignment); - } - } - - if (sbuf->swbuf) { - /* User/malloc buffer */ - map = sbuf->swbuf; - } - else if (sbuf->hwbuf) { - map = sws->buffer_map(sws, sbuf->hwbuf, usage); - } - else { - map = NULL; - } - - if(map) { - pipe_mutex_lock(ss->swc_mutex); - - ++sbuf->map.count; - - if (usage & PIPE_BUFFER_USAGE_CPU_WRITE) { - assert(sbuf->map.count <= 1); - sbuf->map.writing = TRUE; - if (usage & PIPE_BUFFER_USAGE_FLUSH_EXPLICIT) - sbuf->map.flush_explicit = TRUE; - } - - pipe_mutex_unlock(ss->swc_mutex); - } - - return map; -} - -static void -svga_buffer_flush_mapped_range( struct pipe_screen *screen, - struct pipe_buffer *buf, - unsigned offset, unsigned length) -{ - struct svga_buffer *sbuf = svga_buffer( buf ); - struct svga_screen *ss = svga_screen(screen); - - pipe_mutex_lock(ss->swc_mutex); - assert(sbuf->map.writing); - if(sbuf->map.writing) { - assert(sbuf->map.flush_explicit); - svga_buffer_add_range(sbuf, offset, offset + length); - } - pipe_mutex_unlock(ss->swc_mutex); -} - -static void -svga_buffer_unmap( struct pipe_screen *screen, - struct pipe_buffer *buf) -{ - struct svga_screen *ss = svga_screen(screen); - struct svga_winsys_screen *sws = ss->sws; - struct svga_buffer *sbuf = svga_buffer( buf ); - - pipe_mutex_lock(ss->swc_mutex); - - assert(sbuf->map.count); - if(sbuf->map.count) - --sbuf->map.count; - - if(sbuf->hwbuf) - sws->buffer_unmap(sws, sbuf->hwbuf); - - if(sbuf->map.writing) { - if(!sbuf->map.flush_explicit) { - /* No mapped range was flushed -- flush the whole buffer */ - SVGA_DBG(DEBUG_DMA, "flushing the whole buffer\n"); - - svga_buffer_add_range(sbuf, 0, sbuf->base.size); - } - - sbuf->map.writing = FALSE; - sbuf->map.flush_explicit = FALSE; - } - - pipe_mutex_unlock(ss->swc_mutex); -} - -static void -svga_buffer_destroy( struct pipe_buffer *buf ) -{ - struct svga_screen *ss = svga_screen(buf->screen); - struct svga_buffer *sbuf = svga_buffer( buf ); - - assert(!p_atomic_read(&buf->reference.count)); - - assert(!sbuf->dma.pending); - - if(sbuf->handle) - svga_buffer_destroy_host_surface(ss, sbuf); - - if(sbuf->uploaded.buffer) - pipe_buffer_reference(&sbuf->uploaded.buffer, NULL); - - if(sbuf->hwbuf) - svga_buffer_destroy_hw_storage(ss, sbuf); - - if(sbuf->swbuf && !sbuf->user) - align_free(sbuf->swbuf); - - FREE(sbuf); -} - -static struct pipe_buffer * -svga_buffer_create(struct pipe_screen *screen, - unsigned alignment, - unsigned usage, - unsigned size) -{ - struct svga_screen *ss = svga_screen(screen); - struct svga_buffer *sbuf; - - assert(size); - assert(alignment); - - sbuf = CALLOC_STRUCT(svga_buffer); - if(!sbuf) - goto error1; - - sbuf->magic = SVGA_BUFFER_MAGIC; - - pipe_reference_init(&sbuf->base.reference, 1); - sbuf->base.screen = screen; - sbuf->base.alignment = alignment; - sbuf->base.usage = usage; - sbuf->base.size = size; - - if(svga_buffer_needs_hw_storage(usage)) { - if(svga_buffer_create_host_surface(ss, sbuf) != PIPE_OK) - goto error2; - } - else { - if(alignment < sizeof(void*)) - alignment = sizeof(void*); - - usage |= PIPE_BUFFER_USAGE_CPU_READ_WRITE; - - sbuf->swbuf = align_malloc(size, alignment); - if(!sbuf->swbuf) - goto error2; - } - - return &sbuf->base; - -error2: - FREE(sbuf); -error1: - return NULL; -} - -static struct pipe_buffer * -svga_user_buffer_create(struct pipe_screen *screen, - void *ptr, - unsigned bytes) -{ - struct svga_buffer *sbuf; - - sbuf = CALLOC_STRUCT(svga_buffer); - if(!sbuf) - goto no_sbuf; - - sbuf->magic = SVGA_BUFFER_MAGIC; - - sbuf->swbuf = ptr; - sbuf->user = TRUE; - - pipe_reference_init(&sbuf->base.reference, 1); - sbuf->base.screen = screen; - sbuf->base.alignment = 1; - sbuf->base.usage = 0; - sbuf->base.size = bytes; - - return &sbuf->base; - -no_sbuf: - return NULL; -} - - -void -svga_screen_init_buffer_functions(struct pipe_screen *screen) -{ - screen->buffer_create = svga_buffer_create; - screen->user_buffer_create = svga_user_buffer_create; - screen->buffer_map_range = svga_buffer_map_range; - screen->buffer_flush_mapped_range = svga_buffer_flush_mapped_range; - screen->buffer_unmap = svga_buffer_unmap; - screen->buffer_destroy = svga_buffer_destroy; -} - /** * Copy the contents of the malloc buffer to a hardware buffer. @@ -637,7 +415,7 @@ svga_buffer_update_hw(struct svga_screen *ss, struct svga_buffer *sbuf) return ret; pipe_mutex_lock(ss->swc_mutex); - map = ss->sws->buffer_map(ss->sws, sbuf->hwbuf, PIPE_BUFFER_USAGE_CPU_WRITE); + map = ss->sws->buffer_map(ss->sws, sbuf->hwbuf, PIPE_TRANSFER_WRITE); assert(map); if(!map) { pipe_mutex_unlock(ss->swc_mutex); @@ -645,7 +423,7 @@ svga_buffer_update_hw(struct svga_screen *ss, struct svga_buffer *sbuf) return PIPE_ERROR; } - memcpy(map, sbuf->swbuf, sbuf->base.size); + memcpy(map, sbuf->swbuf, sbuf->b.b.width0); ss->sws->buffer_unmap(ss->sws, sbuf->hwbuf); /* This user/malloc buffer is now indistinguishable from a gpu buffer */ @@ -710,8 +488,8 @@ svga_buffer_upload_piecewise(struct svga_screen *ss, offset, offset + size); map = sws->buffer_map(sws, hwbuf, - PIPE_BUFFER_USAGE_CPU_WRITE | - PIPE_BUFFER_USAGE_DISCARD); + PIPE_TRANSFER_WRITE | + PIPE_TRANSFER_DISCARD); assert(map); if (map) { memcpy(map, sbuf->swbuf, size); @@ -745,9 +523,14 @@ svga_buffer_upload_piecewise(struct svga_screen *ss, } + + +/* Get (or create/upload) the winsys surface handle so that we can + * refer to this buffer in fifo commands. + */ struct svga_winsys_surface * svga_buffer_handle(struct svga_context *svga, - struct pipe_buffer *buf) + struct pipe_resource *buf) { struct pipe_screen *screen = svga->pipe.screen; struct svga_screen *ss = svga_screen(screen); @@ -828,45 +611,6 @@ svga_buffer_handle(struct svga_context *svga, } -struct pipe_buffer * -svga_screen_buffer_wrap_surface(struct pipe_screen *screen, - enum SVGA3dSurfaceFormat format, - struct svga_winsys_surface *srf) -{ - struct pipe_buffer *buf; - struct svga_buffer *sbuf; - struct svga_winsys_screen *sws = svga_winsys_screen(screen); - - buf = svga_buffer_create(screen, 0, SVGA_BUFFER_USAGE_WRAPPED, 0); - if (!buf) - return NULL; - - sbuf = svga_buffer(buf); - - /* - * We are not the creator of this surface and therefore we must not - * cache it for reuse. Set the cacheable flag to zero in the key to - * prevent this. - */ - sbuf->key.format = format; - sbuf->key.cachable = 0; - sws->surface_reference(sws, &sbuf->handle, srf); - - return buf; -} - - -struct svga_winsys_surface * -svga_screen_buffer_get_winsys_surface(struct pipe_buffer *buffer) -{ - struct svga_winsys_screen *sws = svga_winsys_screen(buffer->screen); - struct svga_winsys_surface *vsurf = NULL; - - assert(svga_buffer(buffer)->key.cachable == 0); - svga_buffer(buffer)->key.cachable = 0; - sws->surface_reference(sws, &vsurf, svga_buffer(buffer)->handle); - return vsurf; -} void svga_context_flush_buffers(struct svga_context *svga) @@ -879,7 +623,7 @@ svga_context_flush_buffers(struct svga_context *svga) while(curr != &svga->dirty_buffers) { sbuf = LIST_ENTRY(struct svga_buffer, curr, head); - assert(p_atomic_read(&sbuf->base.reference.count) != 0); + assert(p_atomic_read(&sbuf->b.b.reference.count) != 0); assert(sbuf->dma.pending); svga_buffer_upload_flush(svga, sbuf); diff --git a/src/gallium/drivers/svga/svga_resource_buffer_upload.h b/src/gallium/drivers/svga/svga_resource_buffer_upload.h new file mode 100644 index 00000000000..11df3065263 --- /dev/null +++ b/src/gallium/drivers/svga/svga_resource_buffer_upload.h @@ -0,0 +1,54 @@ +/********************************************************** + * Copyright 2008-2009 VMware, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + **********************************************************/ + +#ifndef SVGA_BUFFER_UPLOAD_H +#define SVGA_BUFFER_UPLOAD_H + + +void +svga_buffer_add_range(struct svga_buffer *sbuf, + unsigned start, + unsigned end); + +enum pipe_error +svga_buffer_create_hw_storage(struct svga_screen *ss, + struct svga_buffer *sbuf); + +void +svga_buffer_destroy_hw_storage(struct svga_screen *ss, + struct svga_buffer *sbuf); + +enum pipe_error +svga_buffer_create_host_surface(struct svga_screen *ss, + struct svga_buffer *sbuf); + +void +svga_buffer_destroy_host_surface(struct svga_screen *ss, + struct svga_buffer *sbuf); + + + + +#endif /* SVGA_BUFFER_H */ diff --git a/src/gallium/drivers/svga/svga_resource_texture.c b/src/gallium/drivers/svga/svga_resource_texture.c new file mode 100644 index 00000000000..f06b0323d8c --- /dev/null +++ b/src/gallium/drivers/svga/svga_resource_texture.c @@ -0,0 +1,633 @@ +/********************************************************** + * Copyright 2008-2009 VMware, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + **********************************************************/ + +#include "svga_cmd.h" + +#include "pipe/p_state.h" +#include "pipe/p_defines.h" +#include "util/u_inlines.h" +#include "os/os_thread.h" +#include "util/u_format.h" +#include "util/u_math.h" +#include "util/u_memory.h" + +#include "svga_screen.h" +#include "svga_context.h" +#include "svga_resource_texture.h" +#include "svga_resource_buffer.h" +#include "svga_sampler_view.h" +#include "svga_winsys.h" +#include "svga_debug.h" + + +/* XXX: This isn't a real hardware flag, but just a hack for kernel to + * know about primary surfaces. Find a better way to accomplish this. + */ +#define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9) + + +static unsigned int +svga_texture_is_referenced( struct pipe_context *pipe, + struct pipe_resource *texture, + unsigned face, unsigned level) +{ + struct svga_texture *tex = svga_texture(texture); + struct svga_screen *ss = svga_screen(pipe->screen); + + /** + * The screen does not cache texture writes. + */ + + if (!tex->handle || ss->sws->surface_is_flushed(ss->sws, tex->handle)) + return PIPE_UNREFERENCED; + + /** + * sws->surface_is_flushed() does not distinguish between read references + * and write references. So assume a reference is both. + */ + + return PIPE_REFERENCED_FOR_READ | PIPE_REFERENCED_FOR_WRITE; +} + + + +/* + * Helper function and arrays + */ + +SVGA3dSurfaceFormat +svga_translate_format(enum pipe_format format) +{ + switch(format) { + + case PIPE_FORMAT_B8G8R8A8_UNORM: + return SVGA3D_A8R8G8B8; + case PIPE_FORMAT_B8G8R8X8_UNORM: + return SVGA3D_X8R8G8B8; + + /* Required for GL2.1: + */ + case PIPE_FORMAT_B8G8R8A8_SRGB: + return SVGA3D_A8R8G8B8; + + case PIPE_FORMAT_B5G6R5_UNORM: + return SVGA3D_R5G6B5; + case PIPE_FORMAT_B5G5R5A1_UNORM: + return SVGA3D_A1R5G5B5; + case PIPE_FORMAT_B4G4R4A4_UNORM: + return SVGA3D_A4R4G4B4; + + + /* XXX: Doesn't seem to work properly. + case PIPE_FORMAT_Z32_UNORM: + return SVGA3D_Z_D32; + */ + case PIPE_FORMAT_Z16_UNORM: + return SVGA3D_Z_D16; + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: + return SVGA3D_Z_D24S8; + case PIPE_FORMAT_X8Z24_UNORM: + return SVGA3D_Z_D24X8; + + case PIPE_FORMAT_A8_UNORM: + return SVGA3D_ALPHA8; + case PIPE_FORMAT_L8_UNORM: + return SVGA3D_LUMINANCE8; + + case PIPE_FORMAT_DXT1_RGB: + case PIPE_FORMAT_DXT1_RGBA: + return SVGA3D_DXT1; + case PIPE_FORMAT_DXT3_RGBA: + return SVGA3D_DXT3; + case PIPE_FORMAT_DXT5_RGBA: + return SVGA3D_DXT5; + + default: + return SVGA3D_FORMAT_INVALID; + } +} + + +SVGA3dSurfaceFormat +svga_translate_format_render(enum pipe_format format) +{ + switch(format) { + case PIPE_FORMAT_B8G8R8A8_UNORM: + case PIPE_FORMAT_B8G8R8X8_UNORM: + case PIPE_FORMAT_B5G5R5A1_UNORM: + case PIPE_FORMAT_B4G4R4A4_UNORM: + case PIPE_FORMAT_B5G6R5_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: + case PIPE_FORMAT_X8Z24_UNORM: + case PIPE_FORMAT_Z32_UNORM: + case PIPE_FORMAT_Z16_UNORM: + case PIPE_FORMAT_L8_UNORM: + return svga_translate_format(format); + +#if 1 + /* For on host conversion */ + case PIPE_FORMAT_DXT1_RGB: + return SVGA3D_X8R8G8B8; + case PIPE_FORMAT_DXT1_RGBA: + case PIPE_FORMAT_DXT3_RGBA: + case PIPE_FORMAT_DXT5_RGBA: + return SVGA3D_A8R8G8B8; +#endif + + default: + return SVGA3D_FORMAT_INVALID; + } +} + + +static INLINE void +svga_transfer_dma_band(struct svga_transfer *st, + SVGA3dTransferType transfer, + unsigned y, unsigned h, unsigned srcy) +{ + struct svga_texture *texture = svga_texture(st->base.resource); + struct svga_screen *screen = svga_screen(texture->b.b.screen); + SVGA3dCopyBox box; + enum pipe_error ret; + + SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n", + transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from", + texture->handle, + st->base.sr.face, + st->base.box.x, + y, + st->base.box.z, + st->base.box.x + st->base.box.width, + y + h, + st->base.box.z + 1, + util_format_get_blocksize(texture->b.b.format) * 8 / + (util_format_get_blockwidth(texture->b.b.format)*util_format_get_blockheight(texture->b.b.format))); + + box.x = st->base.box.x; + box.y = y; + box.z = st->base.box.z; + box.w = st->base.box.width; + box.h = h; + box.d = 1; + box.srcx = 0; + box.srcy = srcy; + box.srcz = 0; + + pipe_mutex_lock(screen->swc_mutex); + ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1); + if(ret != PIPE_OK) { + screen->swc->flush(screen->swc, NULL); + ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1); + assert(ret == PIPE_OK); + } + pipe_mutex_unlock(screen->swc_mutex); +} + + +static INLINE void +svga_transfer_dma(struct svga_transfer *st, + SVGA3dTransferType transfer) +{ + struct svga_texture *texture = svga_texture(st->base.resource); + struct svga_screen *screen = svga_screen(texture->b.b.screen); + struct svga_winsys_screen *sws = screen->sws; + struct pipe_fence_handle *fence = NULL; + + if (transfer == SVGA3D_READ_HOST_VRAM) { + SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__); + } + + + if(!st->swbuf) { + /* Do the DMA transfer in a single go */ + + svga_transfer_dma_band(st, transfer, st->base.box.y, st->base.box.height, 0); + + if(transfer == SVGA3D_READ_HOST_VRAM) { + svga_screen_flush(screen, &fence); + sws->fence_finish(sws, fence, 0); + sws->fence_reference(sws, &fence, NULL); + } + } + else { + unsigned y, h, srcy; + unsigned blockheight = util_format_get_blockheight(st->base.resource->format); + h = st->hw_nblocksy * blockheight; + srcy = 0; + for(y = 0; y < st->base.box.height; y += h) { + unsigned offset, length; + void *hw, *sw; + + if (y + h > st->base.box.height) + h = st->base.box.height - y; + + /* Transfer band must be aligned to pixel block boundaries */ + assert(y % blockheight == 0); + assert(h % blockheight == 0); + + offset = y * st->base.stride / blockheight; + length = h * st->base.stride / blockheight; + + sw = (uint8_t *)st->swbuf + offset; + + if(transfer == SVGA3D_WRITE_HOST_VRAM) { + /* Wait for the previous DMAs to complete */ + /* TODO: keep one DMA (at half the size) in the background */ + if(y) { + svga_screen_flush(screen, &fence); + sws->fence_finish(sws, fence, 0); + sws->fence_reference(sws, &fence, NULL); + } + + hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_WRITE); + assert(hw); + if(hw) { + memcpy(hw, sw, length); + sws->buffer_unmap(sws, st->hwbuf); + } + } + + svga_transfer_dma_band(st, transfer, y, h, srcy); + + if(transfer == SVGA3D_READ_HOST_VRAM) { + svga_screen_flush(screen, &fence); + sws->fence_finish(sws, fence, 0); + + hw = sws->buffer_map(sws, st->hwbuf, PIPE_TRANSFER_READ); + assert(hw); + if(hw) { + memcpy(sw, hw, length); + sws->buffer_unmap(sws, st->hwbuf); + } + } + } + } +} + + + + + +static boolean +svga_texture_get_handle(struct pipe_screen *screen, + struct pipe_resource *texture, + struct winsys_handle *whandle) +{ + struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen); + unsigned stride; + + assert(svga_texture(texture)->key.cachable == 0); + svga_texture(texture)->key.cachable = 0; + stride = util_format_get_nblocksx(texture->format, texture->width0) * + util_format_get_blocksize(texture->format); + return sws->surface_get_handle(sws, svga_texture(texture)->handle, stride, whandle); +} + + +static void +svga_texture_destroy(struct pipe_screen *screen, + struct pipe_resource *pt) +{ + struct svga_screen *ss = svga_screen(screen); + struct svga_texture *tex = (struct svga_texture *)pt; + + ss->texture_timestamp++; + + svga_sampler_view_reference(&tex->cached_view, NULL); + + /* + DBG("%s deleting %p\n", __FUNCTION__, (void *) tex); + */ + SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle); + svga_screen_surface_destroy(ss, &tex->key, &tex->handle); + + FREE(tex); +} + + + + + + + +/* XXX: Still implementing this as if it was a screen function, but + * can now modify it to queue transfers on the context. + */ +static struct pipe_transfer * +svga_texture_get_transfer(struct pipe_context *pipe, + struct pipe_resource *texture, + struct pipe_subresource sr, + unsigned usage, + const struct pipe_box *box) +{ + struct svga_screen *ss = svga_screen(pipe->screen); + struct svga_winsys_screen *sws = ss->sws; + struct svga_transfer *st; + unsigned nblocksx = util_format_get_nblocksx(texture->format, box->width); + unsigned nblocksy = util_format_get_nblocksy(texture->format, box->height); + + /* We can't map texture storage directly */ + if (usage & PIPE_TRANSFER_MAP_DIRECTLY) + return NULL; + + st = CALLOC_STRUCT(svga_transfer); + if (!st) + return NULL; + + pipe_resource_reference(&st->base.resource, texture); + st->base.sr = sr; + st->base.usage = usage; + st->base.box = *box; + st->base.stride = nblocksx*util_format_get_blocksize(texture->format); + st->base.slice_stride = 0; + + st->hw_nblocksy = nblocksy; + + st->hwbuf = svga_winsys_buffer_create(ss, + 1, + 0, + st->hw_nblocksy*st->base.stride); + while(!st->hwbuf && (st->hw_nblocksy /= 2)) { + st->hwbuf = svga_winsys_buffer_create(ss, + 1, + 0, + st->hw_nblocksy*st->base.stride); + } + + if(!st->hwbuf) + goto no_hwbuf; + + if(st->hw_nblocksy < nblocksy) { + /* We couldn't allocate a hardware buffer big enough for the transfer, + * so allocate regular malloc memory instead */ + debug_printf("%s: failed to allocate %u KB of DMA, splitting into %u x %u KB DMA transfers\n", + __FUNCTION__, + (nblocksy*st->base.stride + 1023)/1024, + (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy, + (st->hw_nblocksy*st->base.stride + 1023)/1024); + st->swbuf = MALLOC(nblocksy*st->base.stride); + if(!st->swbuf) + goto no_swbuf; + } + + if (usage & PIPE_TRANSFER_READ) + svga_transfer_dma(st, SVGA3D_READ_HOST_VRAM); + + return &st->base; + +no_swbuf: + sws->buffer_destroy(sws, st->hwbuf); +no_hwbuf: + FREE(st); + return NULL; +} + + +/* XXX: Still implementing this as if it was a screen function, but + * can now modify it to queue transfers on the context. + */ +static void * +svga_texture_transfer_map( struct pipe_context *pipe, + struct pipe_transfer *transfer ) +{ + struct svga_screen *ss = svga_screen(pipe->screen); + struct svga_winsys_screen *sws = ss->sws; + struct svga_transfer *st = svga_transfer(transfer); + + if(st->swbuf) + return st->swbuf; + else + /* The wait for read transfers already happened when svga_transfer_dma + * was called. */ + return sws->buffer_map(sws, st->hwbuf, transfer->usage); +} + + +/* XXX: Still implementing this as if it was a screen function, but + * can now modify it to queue transfers on the context. + */ +static void +svga_texture_transfer_unmap(struct pipe_context *pipe, + struct pipe_transfer *transfer) +{ + struct svga_screen *ss = svga_screen(pipe->screen); + struct svga_winsys_screen *sws = ss->sws; + struct svga_transfer *st = svga_transfer(transfer); + + if(!st->swbuf) + sws->buffer_unmap(sws, st->hwbuf); +} + + +static void +svga_texture_transfer_destroy(struct pipe_context *pipe, + struct pipe_transfer *transfer) +{ + struct svga_texture *tex = svga_texture(transfer->resource); + struct svga_screen *ss = svga_screen(pipe->screen); + struct svga_winsys_screen *sws = ss->sws; + struct svga_transfer *st = svga_transfer(transfer); + + if (st->base.usage & PIPE_TRANSFER_WRITE) { + svga_transfer_dma(st, SVGA3D_WRITE_HOST_VRAM); + ss->texture_timestamp++; + tex->view_age[transfer->sr.level] = ++(tex->age); + tex->defined[transfer->sr.face][transfer->sr.level] = TRUE; + } + + pipe_resource_reference(&st->base.resource, NULL); + FREE(st->swbuf); + sws->buffer_destroy(sws, st->hwbuf); + FREE(st); +} + + + + + +struct u_resource_vtbl svga_texture_vtbl = +{ + svga_texture_get_handle, /* get_handle */ + svga_texture_destroy, /* resource_destroy */ + svga_texture_is_referenced, /* is_resource_referenced */ + svga_texture_get_transfer, /* get_transfer */ + svga_texture_transfer_destroy, /* transfer_destroy */ + svga_texture_transfer_map, /* transfer_map */ + u_default_transfer_flush_region, /* transfer_flush_region */ + svga_texture_transfer_unmap, /* transfer_unmap */ + u_default_transfer_inline_write /* transfer_inline_write */ +}; + + + + +struct pipe_resource * +svga_texture_create(struct pipe_screen *screen, + const struct pipe_resource *template) +{ + struct svga_screen *svgascreen = svga_screen(screen); + struct svga_texture *tex = CALLOC_STRUCT(svga_texture); + + if (!tex) + goto error1; + + tex->b.b = *template; + tex->b.vtbl = &svga_texture_vtbl; + pipe_reference_init(&tex->b.b.reference, 1); + tex->b.b.screen = screen; + + assert(template->last_level < SVGA_MAX_TEXTURE_LEVELS); + if(template->last_level >= SVGA_MAX_TEXTURE_LEVELS) + goto error2; + + tex->key.flags = 0; + tex->key.size.width = template->width0; + tex->key.size.height = template->height0; + tex->key.size.depth = template->depth0; + + if(template->target == PIPE_TEXTURE_CUBE) { + tex->key.flags |= SVGA3D_SURFACE_CUBEMAP; + tex->key.numFaces = 6; + } + else { + tex->key.numFaces = 1; + } + + tex->key.cachable = 1; + + if (template->bind & PIPE_BIND_SAMPLER_VIEW) + tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE; + + if (template->bind & PIPE_BIND_DISPLAY_TARGET) { + tex->key.cachable = 0; + } + + if (template->bind & PIPE_BIND_SHARED) { + tex->key.cachable = 0; + } + + if (template->bind & PIPE_BIND_SCANOUT) { + tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT; + tex->key.cachable = 0; + } + + /* + * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot + * know beforehand whether a texture will be used as a rendertarget or not + * and it always requests PIPE_BIND_RENDER_TARGET, therefore + * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose. + */ +#if 0 + if((template->bind & PIPE_BIND_RENDER_TARGET) && + !util_format_is_s3tc(template->format)) + tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET; +#endif + + if(template->bind & PIPE_BIND_DEPTH_STENCIL) + tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL; + + tex->key.numMipLevels = template->last_level + 1; + + tex->key.format = svga_translate_format(template->format); + if(tex->key.format == SVGA3D_FORMAT_INVALID) + goto error2; + + SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle); + tex->handle = svga_screen_surface_create(svgascreen, &tex->key); + if (tex->handle) + SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture)\n", tex->handle); + + return &tex->b.b; + +error2: + FREE(tex); +error1: + return NULL; +} + + + + +struct pipe_resource * +svga_texture_from_handle(struct pipe_screen *screen, + const struct pipe_resource *template, + struct winsys_handle *whandle) +{ + struct svga_winsys_screen *sws = svga_winsys_screen(screen); + struct svga_winsys_surface *srf; + struct svga_texture *tex; + enum SVGA3dSurfaceFormat format = 0; + assert(screen); + + /* Only supports one type */ + if (template->target != PIPE_TEXTURE_2D || + template->last_level != 0 || + template->depth0 != 1) { + return NULL; + } + + srf = sws->surface_from_handle(sws, whandle, &format); + + if (!srf) + return NULL; + + if (svga_translate_format(template->format) != format) { + unsigned f1 = svga_translate_format(template->format); + unsigned f2 = format; + + /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */ + if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) || + (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) || + (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ) ) { + debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2); + return NULL; + } + } + + tex = CALLOC_STRUCT(svga_texture); + if (!tex) + return NULL; + + tex->b.b = *template; + tex->b.vtbl = &svga_texture_vtbl; + pipe_reference_init(&tex->b.b.reference, 1); + tex->b.b.screen = screen; + + if (format == SVGA3D_X8R8G8B8) + tex->b.b.format = PIPE_FORMAT_B8G8R8X8_UNORM; + else if (format == SVGA3D_A8R8G8B8) + tex->b.b.format = PIPE_FORMAT_B8G8R8A8_UNORM; + else { + /* ?? */ + } + + SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf); + + tex->key.cachable = 0; + tex->handle = srf; + + return &tex->b.b; +} + diff --git a/src/gallium/drivers/svga/svga_screen_texture.h b/src/gallium/drivers/svga/svga_resource_texture.h index 24c1f78ca55..631937f2eb0 100644 --- a/src/gallium/drivers/svga/svga_screen_texture.h +++ b/src/gallium/drivers/svga/svga_resource_texture.h @@ -30,6 +30,7 @@ #include "pipe/p_compiler.h" #include "pipe/p_state.h" #include "util/u_inlines.h" +#include "util/u_transfer.h" #include "svga_screen_cache.h" struct pipe_context; @@ -42,43 +43,14 @@ enum SVGA3dSurfaceFormat; #define SVGA_MAX_TEXTURE_LEVELS 16 -/** - * A sampler's view into a texture - * - * We currently cache one sampler view on - * the texture and in there by holding a reference - * from the texture to the sampler view. - * - * Because of this we can not hold a refernce to the - * texture from the sampler view. So the user - * of the sampler views must make sure that the - * texture has a reference take for as long as - * the sampler view is refrenced. - * - * Just unreferencing the sampler_view before the - * texture is enough. - */ -struct svga_sampler_view -{ - struct pipe_reference reference; - - struct pipe_texture *texture; - - int min_lod; - int max_lod; - - unsigned age; - - struct svga_host_surface_cache_key key; - struct svga_winsys_surface *handle; -}; +extern struct u_resource_vtbl svga_texture_vtbl; struct svga_texture { - struct pipe_texture base; + struct u_resource b; - boolean defined[6][PIPE_MAX_TEXTURE_LEVELS]; + boolean defined[6][SVGA_MAX_TEXTURE_LEVELS]; struct svga_sampler_view *cached_view; @@ -106,21 +78,9 @@ struct svga_texture }; -struct svga_surface -{ - struct pipe_surface base; - - struct svga_host_surface_cache_key key; - struct svga_winsys_surface *handle; - - unsigned real_face; - unsigned real_level; - unsigned real_zslice; - - boolean dirty; -}; - +/* Note this is only used for texture (not buffer) transfers: + */ struct svga_transfer { struct pipe_transfer base; @@ -136,18 +96,13 @@ struct svga_transfer }; -static INLINE struct svga_texture * -svga_texture(struct pipe_texture *texture) +static INLINE struct svga_texture *svga_texture( struct pipe_resource *resource ) { - return (struct svga_texture *)texture; + struct svga_texture *tex = (struct svga_texture *)resource; + assert(tex == NULL || tex->b.vtbl == &svga_texture_vtbl); + return tex; } -static INLINE struct svga_surface * -svga_surface(struct pipe_surface *surface) -{ - assert(surface); - return (struct svga_surface *)surface; -} static INLINE struct svga_transfer * svga_transfer(struct pipe_transfer *transfer) @@ -156,35 +111,18 @@ svga_transfer(struct pipe_transfer *transfer) return (struct svga_transfer *)transfer; } -extern struct svga_sampler_view * -svga_get_tex_sampler_view(struct pipe_context *pipe, - struct pipe_texture *pt, - unsigned min_lod, unsigned max_lod); - -void -svga_validate_sampler_view(struct svga_context *svga, struct svga_sampler_view *v); -void -svga_destroy_sampler_view_priv(struct svga_sampler_view *v); -static INLINE void -svga_sampler_view_reference(struct svga_sampler_view **ptr, struct svga_sampler_view *v) -{ - struct svga_sampler_view *old = *ptr; - - if (pipe_reference(&(*ptr)->reference, &v->reference)) - svga_destroy_sampler_view_priv(old); - *ptr = v; -} +struct pipe_resource * +svga_texture_create(struct pipe_screen *screen, + const struct pipe_resource *template); -extern void -svga_propagate_surface(struct pipe_context *pipe, struct pipe_surface *surf); +struct pipe_resource * +svga_texture_from_handle(struct pipe_screen * screen, + const struct pipe_resource *template, + struct winsys_handle *whandle); -extern boolean -svga_surface_needs_propagation(struct pipe_surface *surf); -extern void -svga_screen_init_texture_functions(struct pipe_screen *screen); enum SVGA3dSurfaceFormat svga_translate_format(enum pipe_format format); diff --git a/src/gallium/drivers/svga/svga_sampler_view.c b/src/gallium/drivers/svga/svga_sampler_view.c new file mode 100644 index 00000000000..fbae552f78f --- /dev/null +++ b/src/gallium/drivers/svga/svga_sampler_view.c @@ -0,0 +1,196 @@ +/********************************************************** + * Copyright 2008-2009 VMware, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + **********************************************************/ + +#include "svga_cmd.h" + +#include "pipe/p_state.h" +#include "pipe/p_defines.h" +#include "util/u_inlines.h" +#include "os/os_thread.h" +#include "util/u_format.h" +#include "util/u_math.h" +#include "util/u_memory.h" + +#include "svga_screen.h" +#include "svga_context.h" +#include "svga_resource_texture.h" +#include "svga_sampler_view.h" +#include "svga_debug.h" +#include "svga_surface.h" + + +struct svga_sampler_view * +svga_get_tex_sampler_view(struct pipe_context *pipe, + struct pipe_resource *pt, + unsigned min_lod, unsigned max_lod) +{ + struct svga_screen *ss = svga_screen(pt->screen); + struct svga_texture *tex = svga_texture(pt); + struct svga_sampler_view *sv = NULL; + SVGA3dSurfaceFormat format = svga_translate_format(pt->format); + boolean view = TRUE; + + assert(pt); + assert(min_lod >= 0); + assert(min_lod <= max_lod); + assert(max_lod <= pt->last_level); + + + /* Is a view needed */ + { + /* + * Can't control max lod. For first level views and when we only + * look at one level we disable mip filtering to achive the same + * results as a view. + */ + if (min_lod == 0 && max_lod >= pt->last_level) + view = FALSE; + + if (util_format_is_s3tc(pt->format) && view) { + format = svga_translate_format_render(pt->format); + } + + if (ss->debug.no_sampler_view) + view = FALSE; + + if (ss->debug.force_sampler_view) + view = TRUE; + } + + /* First try the cache */ + if (view) { + pipe_mutex_lock(ss->tex_mutex); + if (tex->cached_view && + tex->cached_view->min_lod == min_lod && + tex->cached_view->max_lod == max_lod) { + svga_sampler_view_reference(&sv, tex->cached_view); + pipe_mutex_unlock(ss->tex_mutex); + SVGA_DBG(DEBUG_VIEWS, "svga: Sampler view: reuse %p, %u %u, last %u\n", + pt, min_lod, max_lod, pt->last_level); + svga_validate_sampler_view(svga_context(pipe), sv); + return sv; + } + pipe_mutex_unlock(ss->tex_mutex); + } + + sv = CALLOC_STRUCT(svga_sampler_view); + pipe_reference_init(&sv->reference, 1); + pipe_resource_reference(&sv->texture, pt); + sv->min_lod = min_lod; + sv->max_lod = max_lod; + + /* No view needed just use the whole texture */ + if (!view) { + SVGA_DBG(DEBUG_VIEWS, + "svga: Sampler view: no %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n", + pt, min_lod, max_lod, + max_lod - min_lod + 1, + pt->width0, + pt->height0, + pt->depth0, + pt->last_level); + sv->key.cachable = 0; + sv->handle = tex->handle; + return sv; + } + + SVGA_DBG(DEBUG_VIEWS, + "svga: Sampler view: yes %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n", + pt, min_lod, max_lod, + max_lod - min_lod + 1, + pt->width0, + pt->height0, + pt->depth0, + pt->last_level); + + sv->age = tex->age; + sv->handle = svga_texture_view_surface(pipe, tex, format, + min_lod, + max_lod - min_lod + 1, + -1, -1, + &sv->key); + + if (!sv->handle) { + assert(0); + sv->key.cachable = 0; + sv->handle = tex->handle; + return sv; + } + + pipe_mutex_lock(ss->tex_mutex); + svga_sampler_view_reference(&tex->cached_view, sv); + pipe_mutex_unlock(ss->tex_mutex); + + return sv; +} + +void +svga_validate_sampler_view(struct svga_context *svga, struct svga_sampler_view *v) +{ + struct svga_texture *tex = svga_texture(v->texture); + unsigned numFaces; + unsigned age = 0; + int i, k; + + assert(svga); + + if (v->handle == tex->handle) + return; + + age = tex->age; + + if(tex->b.b.target == PIPE_TEXTURE_CUBE) + numFaces = 6; + else + numFaces = 1; + + for (i = v->min_lod; i <= v->max_lod; i++) { + for (k = 0; k < numFaces; k++) { + if (v->age < tex->view_age[i]) + svga_texture_copy_handle(svga, NULL, + tex->handle, 0, 0, 0, i, k, + v->handle, 0, 0, 0, i - v->min_lod, k, + u_minify(tex->b.b.width0, i), + u_minify(tex->b.b.height0, i), + u_minify(tex->b.b.depth0, i)); + } + } + + v->age = age; +} + +void +svga_destroy_sampler_view_priv(struct svga_sampler_view *v) +{ + struct svga_texture *tex = svga_texture(v->texture); + + if(v->handle != tex->handle) { + struct svga_screen *ss = svga_screen(v->texture->screen); + SVGA_DBG(DEBUG_DMA, "unref sid %p (sampler view)\n", v->handle); + svga_screen_surface_destroy(ss, &v->key, &v->handle); + } + pipe_resource_reference(&v->texture, NULL); + FREE(v); +} diff --git a/src/gallium/drivers/svga/svga_sampler_view.h b/src/gallium/drivers/svga/svga_sampler_view.h new file mode 100644 index 00000000000..e64665f2e58 --- /dev/null +++ b/src/gallium/drivers/svga/svga_sampler_view.h @@ -0,0 +1,97 @@ +/********************************************************** + * Copyright 2008-2009 VMware, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + **********************************************************/ + +#ifndef SVGA_SAMPLER_VIEW_H +#define SVGA_SAMPLER_VIEW_H + + +#include "pipe/p_compiler.h" +#include "pipe/p_state.h" +#include "util/u_inlines.h" +#include "svga_screen_cache.h" + +struct pipe_context; +struct pipe_screen; +struct svga_context; +struct svga_winsys_surface; +enum SVGA3dSurfaceFormat; + + +/** + * A sampler's view into a texture + * + * We currently cache one sampler view on + * the texture and in there by holding a reference + * from the texture to the sampler view. + * + * Because of this we can not hold a refernce to the + * texture from the sampler view. So the user + * of the sampler views must make sure that the + * texture has a reference take for as long as + * the sampler view is refrenced. + * + * Just unreferencing the sampler_view before the + * texture is enough. + */ +struct svga_sampler_view +{ + struct pipe_reference reference; + + struct pipe_resource *texture; + + int min_lod; + int max_lod; + + unsigned age; + + struct svga_host_surface_cache_key key; + struct svga_winsys_surface *handle; +}; + + + +extern struct svga_sampler_view * +svga_get_tex_sampler_view(struct pipe_context *pipe, + struct pipe_resource *pt, + unsigned min_lod, unsigned max_lod); + +void +svga_validate_sampler_view(struct svga_context *svga, struct svga_sampler_view *v); + +void +svga_destroy_sampler_view_priv(struct svga_sampler_view *v); + +static INLINE void +svga_sampler_view_reference(struct svga_sampler_view **ptr, struct svga_sampler_view *v) +{ + struct svga_sampler_view *old = *ptr; + + if (pipe_reference(&(*ptr)->reference, &v->reference)) + svga_destroy_sampler_view_priv(old); + *ptr = v; +} + + +#endif diff --git a/src/gallium/drivers/svga/svga_screen.c b/src/gallium/drivers/svga/svga_screen.c index 6022c38cfca..aeda3dcad51 100644 --- a/src/gallium/drivers/svga/svga_screen.c +++ b/src/gallium/drivers/svga/svga_screen.c @@ -31,8 +31,8 @@ #include "svga_winsys.h" #include "svga_context.h" #include "svga_screen.h" -#include "svga_screen_texture.h" -#include "svga_screen_buffer.h" +#include "svga_resource_texture.h" +#include "svga_resource.h" #include "svga_debug.h" #include "svga3d_shaderdefs.h" @@ -210,7 +210,7 @@ svga_translate_format_cap(enum pipe_format format) case PIPE_FORMAT_Z16_UNORM: return SVGA3D_DEVCAP_SURFACEFMT_Z_D16; - case PIPE_FORMAT_S8Z24_UNORM: + case PIPE_FORMAT_S8_USCALED_Z24_UNORM: return SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8; case PIPE_FORMAT_X8Z24_UNORM: return SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8; @@ -248,7 +248,7 @@ svga_is_format_supported( struct pipe_screen *screen, assert(tex_usage); /* Override host capabilities */ - if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) { + if (tex_usage & PIPE_BIND_RENDER_TARGET) { switch(format) { /* Often unsupported/problematic. This means we end up with the same @@ -278,11 +278,11 @@ svga_is_format_supported( struct pipe_screen *screen, SVGA3dSurfaceFormatCaps mask; mask.value = 0; - if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) + if (tex_usage & PIPE_BIND_RENDER_TARGET) mask.offscreenRenderTarget = 1; - if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) + if (tex_usage & PIPE_BIND_DEPTH_STENCIL) mask.zStencil = 1; - if (tex_usage & PIPE_TEXTURE_USAGE_SAMPLER) + if (tex_usage & PIPE_BIND_SAMPLER_VIEW) mask.texture = 1; if ((result.u & mask.value) == mask.value) @@ -295,7 +295,7 @@ svga_is_format_supported( struct pipe_screen *screen, * duplicated list of supported formats which is prone to getting * out of sync: */ - if(tex_usage & (PIPE_TEXTURE_USAGE_RENDER_TARGET | PIPE_TEXTURE_USAGE_DEPTH_STENCIL)) + if(tex_usage & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) return svga_translate_format_render(format) != SVGA3D_FORMAT_INVALID; else return svga_translate_format(format) != SVGA3D_FORMAT_INVALID; @@ -397,8 +397,7 @@ svga_screen_create(struct svga_winsys_screen *sws) screen->fence_finish = svga_fence_finish; svgascreen->sws = sws; - svga_screen_init_texture_functions(screen); - svga_screen_init_buffer_functions(screen); + svga_init_screen_resource_functions(svgascreen); svgascreen->use_ps30 = sws->get_cap(sws, SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION, &result) && diff --git a/src/gallium/drivers/svga/svga_screen_texture.c b/src/gallium/drivers/svga/svga_screen_texture.c deleted file mode 100644 index e9792e063e0..00000000000 --- a/src/gallium/drivers/svga/svga_screen_texture.c +++ /dev/null @@ -1,1152 +0,0 @@ -/********************************************************** - * Copyright 2008-2009 VMware, Inc. All rights reserved. - * - * Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, copy, - * modify, merge, publish, distribute, sublicense, and/or sell copies - * of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE - * SOFTWARE. - * - **********************************************************/ - -#include "svga_cmd.h" - -#include "pipe/p_state.h" -#include "pipe/p_defines.h" -#include "util/u_inlines.h" -#include "os/os_thread.h" -#include "util/u_format.h" -#include "util/u_math.h" -#include "util/u_memory.h" - -#include "svga_screen.h" -#include "svga_context.h" -#include "svga_screen_texture.h" -#include "svga_screen_buffer.h" -#include "svga_winsys.h" -#include "svga_debug.h" -#include "svga_screen_buffer.h" - -#include <util/u_string.h> - - -/* XXX: This isn't a real hardware flag, but just a hack for kernel to - * know about primary surfaces. Find a better way to accomplish this. - */ -#define SVGA3D_SURFACE_HINT_SCANOUT (1 << 9) - - -/* - * Helper function and arrays - */ - -SVGA3dSurfaceFormat -svga_translate_format(enum pipe_format format) -{ - switch(format) { - - case PIPE_FORMAT_B8G8R8A8_UNORM: - return SVGA3D_A8R8G8B8; - case PIPE_FORMAT_B8G8R8X8_UNORM: - return SVGA3D_X8R8G8B8; - - /* Required for GL2.1: - */ - case PIPE_FORMAT_B8G8R8A8_SRGB: - return SVGA3D_A8R8G8B8; - - case PIPE_FORMAT_B5G6R5_UNORM: - return SVGA3D_R5G6B5; - case PIPE_FORMAT_B5G5R5A1_UNORM: - return SVGA3D_A1R5G5B5; - case PIPE_FORMAT_B4G4R4A4_UNORM: - return SVGA3D_A4R4G4B4; - - - /* XXX: Doesn't seem to work properly. - case PIPE_FORMAT_Z32_UNORM: - return SVGA3D_Z_D32; - */ - case PIPE_FORMAT_Z16_UNORM: - return SVGA3D_Z_D16; - case PIPE_FORMAT_S8Z24_UNORM: - return SVGA3D_Z_D24S8; - case PIPE_FORMAT_X8Z24_UNORM: - return SVGA3D_Z_D24X8; - - case PIPE_FORMAT_A8_UNORM: - return SVGA3D_ALPHA8; - case PIPE_FORMAT_L8_UNORM: - return SVGA3D_LUMINANCE8; - - case PIPE_FORMAT_DXT1_RGB: - case PIPE_FORMAT_DXT1_RGBA: - return SVGA3D_DXT1; - case PIPE_FORMAT_DXT3_RGBA: - return SVGA3D_DXT3; - case PIPE_FORMAT_DXT5_RGBA: - return SVGA3D_DXT5; - - default: - return SVGA3D_FORMAT_INVALID; - } -} - - -SVGA3dSurfaceFormat -svga_translate_format_render(enum pipe_format format) -{ - switch(format) { - case PIPE_FORMAT_B8G8R8A8_UNORM: - case PIPE_FORMAT_B8G8R8X8_UNORM: - case PIPE_FORMAT_B5G5R5A1_UNORM: - case PIPE_FORMAT_B4G4R4A4_UNORM: - case PIPE_FORMAT_B5G6R5_UNORM: - case PIPE_FORMAT_S8Z24_UNORM: - case PIPE_FORMAT_X8Z24_UNORM: - case PIPE_FORMAT_Z32_UNORM: - case PIPE_FORMAT_Z16_UNORM: - case PIPE_FORMAT_L8_UNORM: - return svga_translate_format(format); - -#if 1 - /* For on host conversion */ - case PIPE_FORMAT_DXT1_RGB: - return SVGA3D_X8R8G8B8; - case PIPE_FORMAT_DXT1_RGBA: - case PIPE_FORMAT_DXT3_RGBA: - case PIPE_FORMAT_DXT5_RGBA: - return SVGA3D_A8R8G8B8; -#endif - - default: - return SVGA3D_FORMAT_INVALID; - } -} - - -static INLINE void -svga_transfer_dma_band(struct svga_transfer *st, - SVGA3dTransferType transfer, - unsigned y, unsigned h, unsigned srcy) -{ - struct svga_texture *texture = svga_texture(st->base.texture); - struct svga_screen *screen = svga_screen(texture->base.screen); - SVGA3dCopyBox box; - enum pipe_error ret; - - SVGA_DBG(DEBUG_DMA, "dma %s sid %p, face %u, (%u, %u, %u) - (%u, %u, %u), %ubpp\n", - transfer == SVGA3D_WRITE_HOST_VRAM ? "to" : "from", - texture->handle, - st->base.face, - st->base.x, - y, - st->base.zslice, - st->base.x + st->base.width, - y + h, - st->base.zslice + 1, - util_format_get_blocksize(texture->base.format)*8/ - (util_format_get_blockwidth(texture->base.format)*util_format_get_blockheight(texture->base.format))); - - box.x = st->base.x; - box.y = y; - box.z = st->base.zslice; - box.w = st->base.width; - box.h = h; - box.d = 1; - box.srcx = 0; - box.srcy = srcy; - box.srcz = 0; - - pipe_mutex_lock(screen->swc_mutex); - ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1); - if(ret != PIPE_OK) { - screen->swc->flush(screen->swc, NULL); - ret = SVGA3D_SurfaceDMA(screen->swc, st, transfer, &box, 1); - assert(ret == PIPE_OK); - } - pipe_mutex_unlock(screen->swc_mutex); -} - - -static INLINE void -svga_transfer_dma(struct svga_transfer *st, - SVGA3dTransferType transfer) -{ - struct svga_texture *texture = svga_texture(st->base.texture); - struct svga_screen *screen = svga_screen(texture->base.screen); - struct svga_winsys_screen *sws = screen->sws; - struct pipe_fence_handle *fence = NULL; - - if (transfer == SVGA3D_READ_HOST_VRAM) { - SVGA_DBG(DEBUG_PERF, "%s: readback transfer\n", __FUNCTION__); - } - - - if(!st->swbuf) { - /* Do the DMA transfer in a single go */ - - svga_transfer_dma_band(st, transfer, st->base.y, st->base.height, 0); - - if(transfer == SVGA3D_READ_HOST_VRAM) { - svga_screen_flush(screen, &fence); - sws->fence_finish(sws, fence, 0); - sws->fence_reference(sws, &fence, NULL); - } - } - else { - unsigned y, h, srcy; - unsigned blockheight = util_format_get_blockheight(st->base.texture->format); - h = st->hw_nblocksy * blockheight; - srcy = 0; - for(y = 0; y < st->base.height; y += h) { - unsigned offset, length; - void *hw, *sw; - - if (y + h > st->base.height) - h = st->base.height - y; - - /* Transfer band must be aligned to pixel block boundaries */ - assert(y % blockheight == 0); - assert(h % blockheight == 0); - - offset = y * st->base.stride / blockheight; - length = h * st->base.stride / blockheight; - - sw = (uint8_t *)st->swbuf + offset; - - if(transfer == SVGA3D_WRITE_HOST_VRAM) { - /* Wait for the previous DMAs to complete */ - /* TODO: keep one DMA (at half the size) in the background */ - if(y) { - svga_screen_flush(screen, &fence); - sws->fence_finish(sws, fence, 0); - sws->fence_reference(sws, &fence, NULL); - } - - hw = sws->buffer_map(sws, st->hwbuf, PIPE_BUFFER_USAGE_CPU_WRITE); - assert(hw); - if(hw) { - memcpy(hw, sw, length); - sws->buffer_unmap(sws, st->hwbuf); - } - } - - svga_transfer_dma_band(st, transfer, y, h, srcy); - - if(transfer == SVGA3D_READ_HOST_VRAM) { - svga_screen_flush(screen, &fence); - sws->fence_finish(sws, fence, 0); - - hw = sws->buffer_map(sws, st->hwbuf, PIPE_BUFFER_USAGE_CPU_READ); - assert(hw); - if(hw) { - memcpy(sw, hw, length); - sws->buffer_unmap(sws, st->hwbuf); - } - } - } - } -} - - -static struct pipe_texture * -svga_texture_create(struct pipe_screen *screen, - const struct pipe_texture *templat) -{ - struct svga_screen *svgascreen = svga_screen(screen); - struct svga_texture *tex = CALLOC_STRUCT(svga_texture); - unsigned width, height, depth; - unsigned level; - - if (!tex) - goto error1; - - tex->base = *templat; - pipe_reference_init(&tex->base.reference, 1); - tex->base.screen = screen; - - assert(templat->last_level < SVGA_MAX_TEXTURE_LEVELS); - if(templat->last_level >= SVGA_MAX_TEXTURE_LEVELS) - goto error2; - - width = templat->width0; - height = templat->height0; - depth = templat->depth0; - for(level = 0; level <= templat->last_level; ++level) { - width = u_minify(width, 1); - height = u_minify(height, 1); - depth = u_minify(depth, 1); - } - - tex->key.flags = 0; - tex->key.size.width = templat->width0; - tex->key.size.height = templat->height0; - tex->key.size.depth = templat->depth0; - - if(templat->target == PIPE_TEXTURE_CUBE) { - tex->key.flags |= SVGA3D_SURFACE_CUBEMAP; - tex->key.numFaces = 6; - } - else { - tex->key.numFaces = 1; - } - - tex->key.cachable = 1; - - if(templat->tex_usage & PIPE_TEXTURE_USAGE_SAMPLER) - tex->key.flags |= SVGA3D_SURFACE_HINT_TEXTURE; - - if(templat->tex_usage & PIPE_TEXTURE_USAGE_DISPLAY_TARGET) { - tex->key.cachable = 0; - } - - if(templat->tex_usage & PIPE_TEXTURE_USAGE_PRIMARY) { - tex->key.flags |= SVGA3D_SURFACE_HINT_SCANOUT; - tex->key.cachable = 0; - } - - /* - * XXX: Never pass the SVGA3D_SURFACE_HINT_RENDERTARGET hint. Mesa cannot - * know beforehand whether a texture will be used as a rendertarget or not - * and it always requests PIPE_TEXTURE_USAGE_RENDER_TARGET, therefore - * passing the SVGA3D_SURFACE_HINT_RENDERTARGET here defeats its purpose. - */ -#if 0 - if((templat->tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) && - !util_format_is_compressed(templat->format)) - tex->key.flags |= SVGA3D_SURFACE_HINT_RENDERTARGET; -#endif - - if(templat->tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) - tex->key.flags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL; - - tex->key.numMipLevels = templat->last_level + 1; - - tex->key.format = svga_translate_format(templat->format); - if(tex->key.format == SVGA3D_FORMAT_INVALID) - goto error2; - - SVGA_DBG(DEBUG_DMA, "surface_create for texture\n", tex->handle); - tex->handle = svga_screen_surface_create(svgascreen, &tex->key); - if (tex->handle) - SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture)\n", tex->handle); - - return &tex->base; - -error2: - FREE(tex); -error1: - return NULL; -} - - -static struct pipe_texture * -svga_texture_blanket(struct pipe_screen * screen, - const struct pipe_texture *base, - const unsigned *stride, - struct pipe_buffer *buffer) -{ - struct svga_texture *tex; - struct svga_buffer *sbuf = svga_buffer(buffer); - struct svga_winsys_screen *sws = svga_winsys_screen(screen); - assert(screen); - - /* Only supports one type */ - if (base->target != PIPE_TEXTURE_2D || - base->last_level != 0 || - base->depth0 != 1) { - return NULL; - } - - /** - * We currently can't do texture blanket on - * SVGA3D_BUFFER. Need to blit to a temporary surface? - */ - - assert(sbuf->handle); - if (!sbuf->handle) - return NULL; - - if (svga_translate_format(base->format) != sbuf->key.format) { - unsigned f1 = svga_translate_format(base->format); - unsigned f2 = sbuf->key.format; - - /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */ - if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) || - (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) || - (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ) ) { - debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2); - return NULL; - } - } - - tex = CALLOC_STRUCT(svga_texture); - if (!tex) - return NULL; - - tex->base = *base; - - - if (sbuf->key.format == 1) - tex->base.format = PIPE_FORMAT_B8G8R8X8_UNORM; - else if (sbuf->key.format == 2) - tex->base.format = PIPE_FORMAT_B8G8R8A8_UNORM; - - pipe_reference_init(&tex->base.reference, 1); - tex->base.screen = screen; - - SVGA_DBG(DEBUG_DMA, "blanket sid %p\n", sbuf->handle); - - /* We don't own this storage, so don't try to cache it. - */ - assert(sbuf->key.cachable == 0); - tex->key.cachable = 0; - sws->surface_reference(sws, &tex->handle, sbuf->handle); - - return &tex->base; -} - - -struct pipe_texture * -svga_screen_texture_wrap_surface(struct pipe_screen *screen, - struct pipe_texture *base, - enum SVGA3dSurfaceFormat format, - struct svga_winsys_surface *srf) -{ - struct svga_texture *tex; - assert(screen); - - /* Only supports one type */ - if (base->target != PIPE_TEXTURE_2D || - base->last_level != 0 || - base->depth0 != 1) { - return NULL; - } - - if (!srf) - return NULL; - - if (svga_translate_format(base->format) != format) { - unsigned f1 = svga_translate_format(base->format); - unsigned f2 = format; - - /* It's okay for XRGB and ARGB or depth with/out stencil to get mixed up */ - if ( !( (f1 == SVGA3D_X8R8G8B8 && f2 == SVGA3D_A8R8G8B8) || - (f1 == SVGA3D_A8R8G8B8 && f2 == SVGA3D_X8R8G8B8) || - (f1 == SVGA3D_Z_D24X8 && f2 == SVGA3D_Z_D24S8) ) ) { - debug_printf("%s wrong format %u != %u\n", __FUNCTION__, f1, f2); - return NULL; - } - } - - tex = CALLOC_STRUCT(svga_texture); - if (!tex) - return NULL; - - tex->base = *base; - - - if (format == 1) - tex->base.format = PIPE_FORMAT_B8G8R8X8_UNORM; - else if (format == 2) - tex->base.format = PIPE_FORMAT_B8G8R8A8_UNORM; - - pipe_reference_init(&tex->base.reference, 1); - tex->base.screen = screen; - - SVGA_DBG(DEBUG_DMA, "wrap surface sid %p\n", srf); - - tex->key.cachable = 0; - tex->handle = srf; - - return &tex->base; -} - - -static void -svga_texture_destroy(struct pipe_texture *pt) -{ - struct svga_screen *ss = svga_screen(pt->screen); - struct svga_texture *tex = (struct svga_texture *)pt; - - ss->texture_timestamp++; - - svga_sampler_view_reference(&tex->cached_view, NULL); - - /* - DBG("%s deleting %p\n", __FUNCTION__, (void *) tex); - */ - SVGA_DBG(DEBUG_DMA, "unref sid %p (texture)\n", tex->handle); - svga_screen_surface_destroy(ss, &tex->key, &tex->handle); - - FREE(tex); -} - - -static void -svga_texture_copy_handle(struct svga_context *svga, - struct svga_screen *ss, - struct svga_winsys_surface *src_handle, - unsigned src_x, unsigned src_y, unsigned src_z, - unsigned src_level, unsigned src_face, - struct svga_winsys_surface *dst_handle, - unsigned dst_x, unsigned dst_y, unsigned dst_z, - unsigned dst_level, unsigned dst_face, - unsigned width, unsigned height, unsigned depth) -{ - struct svga_surface dst, src; - enum pipe_error ret; - SVGA3dCopyBox box, *boxes; - - assert(svga || ss); - - src.handle = src_handle; - src.real_level = src_level; - src.real_face = src_face; - src.real_zslice = 0; - - dst.handle = dst_handle; - dst.real_level = dst_level; - dst.real_face = dst_face; - dst.real_zslice = 0; - - box.x = dst_x; - box.y = dst_y; - box.z = dst_z; - box.w = width; - box.h = height; - box.d = depth; - box.srcx = src_x; - box.srcy = src_y; - box.srcz = src_z; - -/* - SVGA_DBG(DEBUG_VIEWS, "mipcopy src: %p %u (%ux%ux%u), dst: %p %u (%ux%ux%u)\n", - src_handle, src_level, src_x, src_y, src_z, - dst_handle, dst_level, dst_x, dst_y, dst_z); -*/ - - if (svga) { - ret = SVGA3D_BeginSurfaceCopy(svga->swc, - &src.base, - &dst.base, - &boxes, 1); - if(ret != PIPE_OK) { - svga_context_flush(svga, NULL); - ret = SVGA3D_BeginSurfaceCopy(svga->swc, - &src.base, - &dst.base, - &boxes, 1); - assert(ret == PIPE_OK); - } - *boxes = box; - SVGA_FIFOCommitAll(svga->swc); - } else { - pipe_mutex_lock(ss->swc_mutex); - ret = SVGA3D_BeginSurfaceCopy(ss->swc, - &src.base, - &dst.base, - &boxes, 1); - if(ret != PIPE_OK) { - ss->swc->flush(ss->swc, NULL); - ret = SVGA3D_BeginSurfaceCopy(ss->swc, - &src.base, - &dst.base, - &boxes, 1); - assert(ret == PIPE_OK); - } - *boxes = box; - SVGA_FIFOCommitAll(ss->swc); - pipe_mutex_unlock(ss->swc_mutex); - } -} - -static struct svga_winsys_surface * -svga_texture_view_surface(struct pipe_context *pipe, - struct svga_texture *tex, - SVGA3dSurfaceFormat format, - unsigned start_mip, - unsigned num_mip, - int face_pick, - int zslice_pick, - struct svga_host_surface_cache_key *key) /* OUT */ -{ - struct svga_screen *ss = svga_screen(tex->base.screen); - struct svga_winsys_surface *handle; - uint32_t i, j; - unsigned z_offset = 0; - - SVGA_DBG(DEBUG_PERF, - "svga: Create surface view: face %d zslice %d mips %d..%d\n", - face_pick, zslice_pick, start_mip, start_mip+num_mip-1); - - key->flags = 0; - key->format = format; - key->numMipLevels = num_mip; - key->size.width = u_minify(tex->base.width0, start_mip); - key->size.height = u_minify(tex->base.height0, start_mip); - key->size.depth = zslice_pick < 0 ? u_minify(tex->base.depth0, start_mip) : 1; - key->cachable = 1; - assert(key->size.depth == 1); - - if(tex->base.target == PIPE_TEXTURE_CUBE && face_pick < 0) { - key->flags |= SVGA3D_SURFACE_CUBEMAP; - key->numFaces = 6; - } else { - key->numFaces = 1; - } - - if(key->format == SVGA3D_FORMAT_INVALID) { - key->cachable = 0; - return NULL; - } - - SVGA_DBG(DEBUG_DMA, "surface_create for texture view\n"); - handle = svga_screen_surface_create(ss, key); - if (!handle) { - key->cachable = 0; - return NULL; - } - - SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture view)\n", handle); - - if (face_pick < 0) - face_pick = 0; - - if (zslice_pick >= 0) - z_offset = zslice_pick; - - for (i = 0; i < key->numMipLevels; i++) { - for (j = 0; j < key->numFaces; j++) { - if(tex->defined[j + face_pick][i + start_mip]) { - unsigned depth = (zslice_pick < 0 ? - u_minify(tex->base.depth0, i + start_mip) : - 1); - - svga_texture_copy_handle(svga_context(pipe), - ss, - tex->handle, - 0, 0, z_offset, - i + start_mip, - j + face_pick, - handle, 0, 0, 0, i, j, - u_minify(tex->base.width0, i + start_mip), - u_minify(tex->base.height0, i + start_mip), - depth); - } - } - } - - return handle; -} - - -static struct pipe_surface * -svga_get_tex_surface(struct pipe_screen *screen, - struct pipe_texture *pt, - unsigned face, unsigned level, unsigned zslice, - unsigned flags) -{ - struct svga_texture *tex = svga_texture(pt); - struct svga_surface *s; - boolean render = flags & PIPE_BUFFER_USAGE_GPU_WRITE ? TRUE : FALSE; - boolean view = FALSE; - SVGA3dSurfaceFormat format; - - s = CALLOC_STRUCT(svga_surface); - if (!s) - return NULL; - - pipe_reference_init(&s->base.reference, 1); - pipe_texture_reference(&s->base.texture, pt); - s->base.format = pt->format; - s->base.width = u_minify(pt->width0, level); - s->base.height = u_minify(pt->height0, level); - s->base.usage = flags; - s->base.level = level; - s->base.face = face; - s->base.zslice = zslice; - - if (!render) - format = svga_translate_format(pt->format); - else - format = svga_translate_format_render(pt->format); - - assert(format != SVGA3D_FORMAT_INVALID); - assert(!(flags & PIPE_BUFFER_USAGE_CPU_READ_WRITE)); - - - if (svga_screen(screen)->debug.force_surface_view) - view = TRUE; - - /* Currently only used for compressed textures */ - if (render && - format != svga_translate_format(pt->format)) { - view = TRUE; - } - - if (level != 0 && - svga_screen(screen)->debug.force_level_surface_view) - view = TRUE; - - if (pt->target == PIPE_TEXTURE_3D) - view = TRUE; - - if (svga_screen(screen)->debug.no_surface_view) - view = FALSE; - - if (view) { - SVGA_DBG(DEBUG_VIEWS, "svga: Surface view: yes %p, level %u face %u z %u, %p\n", - pt, level, face, zslice, s); - - s->handle = svga_texture_view_surface(NULL, tex, format, level, 1, face, zslice, - &s->key); - s->real_face = 0; - s->real_level = 0; - s->real_zslice = 0; - } else { - SVGA_DBG(DEBUG_VIEWS, "svga: Surface view: no %p, level %u, face %u, z %u, %p\n", - pt, level, face, zslice, s); - - memset(&s->key, 0, sizeof s->key); - s->handle = tex->handle; - s->real_face = face; - s->real_level = level; - s->real_zslice = zslice; - } - - return &s->base; -} - - -static void -svga_tex_surface_destroy(struct pipe_surface *surf) -{ - struct svga_surface *s = svga_surface(surf); - struct svga_texture *t = svga_texture(surf->texture); - struct svga_screen *ss = svga_screen(surf->texture->screen); - - if(s->handle != t->handle) { - SVGA_DBG(DEBUG_DMA, "unref sid %p (tex surface)\n", s->handle); - svga_screen_surface_destroy(ss, &s->key, &s->handle); - } - - pipe_texture_reference(&surf->texture, NULL); - FREE(surf); -} - - -static INLINE void -svga_mark_surface_dirty(struct pipe_surface *surf) -{ - struct svga_surface *s = svga_surface(surf); - - if(!s->dirty) { - struct svga_texture *tex = svga_texture(surf->texture); - - s->dirty = TRUE; - - if (s->handle == tex->handle) - tex->defined[surf->face][surf->level] = TRUE; - else { - /* this will happen later in svga_propagate_surface */ - } - } -} - - -void svga_mark_surfaces_dirty(struct svga_context *svga) -{ - unsigned i; - - for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) { - if (svga->curr.framebuffer.cbufs[i]) - svga_mark_surface_dirty(svga->curr.framebuffer.cbufs[i]); - } - if (svga->curr.framebuffer.zsbuf) - svga_mark_surface_dirty(svga->curr.framebuffer.zsbuf); -} - -/** - * Progagate any changes from surfaces to texture. - * pipe is optional context to inline the blit command in. - */ -void -svga_propagate_surface(struct pipe_context *pipe, struct pipe_surface *surf) -{ - struct svga_surface *s = svga_surface(surf); - struct svga_texture *tex = svga_texture(surf->texture); - struct svga_screen *ss = svga_screen(surf->texture->screen); - - if (!s->dirty) - return; - - s->dirty = FALSE; - ss->texture_timestamp++; - tex->view_age[surf->level] = ++(tex->age); - - if (s->handle != tex->handle) { - SVGA_DBG(DEBUG_VIEWS, "svga: Surface propagate: tex %p, level %u, from %p\n", tex, surf->level, surf); - svga_texture_copy_handle(svga_context(pipe), ss, - s->handle, 0, 0, 0, s->real_level, s->real_face, - tex->handle, 0, 0, surf->zslice, surf->level, surf->face, - u_minify(tex->base.width0, surf->level), - u_minify(tex->base.height0, surf->level), 1); - tex->defined[surf->face][surf->level] = TRUE; - } -} - -/** - * Check if we should call svga_propagate_surface on the surface. - */ -extern boolean -svga_surface_needs_propagation(struct pipe_surface *surf) -{ - struct svga_surface *s = svga_surface(surf); - struct svga_texture *tex = svga_texture(surf->texture); - - return s->dirty && s->handle != tex->handle; -} - - -static struct pipe_transfer * -svga_get_tex_transfer(struct pipe_screen *screen, - struct pipe_texture *texture, - unsigned face, unsigned level, unsigned zslice, - enum pipe_transfer_usage usage, unsigned x, unsigned y, - unsigned w, unsigned h) -{ - struct svga_screen *ss = svga_screen(screen); - struct svga_winsys_screen *sws = ss->sws; - struct svga_transfer *st; - unsigned nblocksx = util_format_get_nblocksx(texture->format, w); - unsigned nblocksy = util_format_get_nblocksy(texture->format, h); - - /* We can't map texture storage directly */ - if (usage & PIPE_TRANSFER_MAP_DIRECTLY) - return NULL; - - st = CALLOC_STRUCT(svga_transfer); - if (!st) - return NULL; - - st->base.x = x; - st->base.y = y; - st->base.width = w; - st->base.height = h; - st->base.stride = nblocksx*util_format_get_blocksize(texture->format); - st->base.usage = usage; - st->base.face = face; - st->base.level = level; - st->base.zslice = zslice; - - st->hw_nblocksy = nblocksy; - - st->hwbuf = svga_winsys_buffer_create(ss, - 1, - 0, - st->hw_nblocksy*st->base.stride); - while(!st->hwbuf && (st->hw_nblocksy /= 2)) { - st->hwbuf = svga_winsys_buffer_create(ss, - 1, - 0, - st->hw_nblocksy*st->base.stride); - } - - if(!st->hwbuf) - goto no_hwbuf; - - if(st->hw_nblocksy < nblocksy) { - /* We couldn't allocate a hardware buffer big enough for the transfer, - * so allocate regular malloc memory instead */ - debug_printf("%s: failed to allocate %u KB of DMA, splitting into %u x %u KB DMA transfers\n", - __FUNCTION__, - (nblocksy*st->base.stride + 1023)/1024, - (nblocksy + st->hw_nblocksy - 1)/st->hw_nblocksy, - (st->hw_nblocksy*st->base.stride + 1023)/1024); - st->swbuf = MALLOC(nblocksy*st->base.stride); - if(!st->swbuf) - goto no_swbuf; - } - - pipe_texture_reference(&st->base.texture, texture); - - if (usage & PIPE_TRANSFER_READ) - svga_transfer_dma(st, SVGA3D_READ_HOST_VRAM); - - return &st->base; - -no_swbuf: - sws->buffer_destroy(sws, st->hwbuf); -no_hwbuf: - FREE(st); - return NULL; -} - - -static void * -svga_transfer_map( struct pipe_screen *screen, - struct pipe_transfer *transfer ) -{ - struct svga_screen *ss = svga_screen(screen); - struct svga_winsys_screen *sws = ss->sws; - struct svga_transfer *st = svga_transfer(transfer); - - if(st->swbuf) - return st->swbuf; - else - /* The wait for read transfers already happened when svga_transfer_dma - * was called. */ - return sws->buffer_map(sws, st->hwbuf, - pipe_transfer_buffer_flags(transfer)); -} - - -static void -svga_transfer_unmap(struct pipe_screen *screen, - struct pipe_transfer *transfer) -{ - struct svga_screen *ss = svga_screen(screen); - struct svga_winsys_screen *sws = ss->sws; - struct svga_transfer *st = svga_transfer(transfer); - - if(!st->swbuf) - sws->buffer_unmap(sws, st->hwbuf); -} - - -static void -svga_tex_transfer_destroy(struct pipe_transfer *transfer) -{ - struct svga_texture *tex = svga_texture(transfer->texture); - struct svga_screen *ss = svga_screen(transfer->texture->screen); - struct svga_winsys_screen *sws = ss->sws; - struct svga_transfer *st = svga_transfer(transfer); - - if (st->base.usage & PIPE_TRANSFER_WRITE) { - svga_transfer_dma(st, SVGA3D_WRITE_HOST_VRAM); - ss->texture_timestamp++; - tex->view_age[transfer->level] = ++(tex->age); - tex->defined[transfer->face][transfer->level] = TRUE; - } - - pipe_texture_reference(&st->base.texture, NULL); - FREE(st->swbuf); - sws->buffer_destroy(sws, st->hwbuf); - FREE(st); -} - -void -svga_screen_init_texture_functions(struct pipe_screen *screen) -{ - screen->texture_create = svga_texture_create; - screen->texture_destroy = svga_texture_destroy; - screen->get_tex_surface = svga_get_tex_surface; - screen->tex_surface_destroy = svga_tex_surface_destroy; - screen->texture_blanket = svga_texture_blanket; - screen->get_tex_transfer = svga_get_tex_transfer; - screen->transfer_map = svga_transfer_map; - screen->transfer_unmap = svga_transfer_unmap; - screen->tex_transfer_destroy = svga_tex_transfer_destroy; -} - -/*********************************************************************** - */ - -struct svga_sampler_view * -svga_get_tex_sampler_view(struct pipe_context *pipe, struct pipe_texture *pt, - unsigned min_lod, unsigned max_lod) -{ - struct svga_screen *ss = svga_screen(pt->screen); - struct svga_texture *tex = svga_texture(pt); - struct svga_sampler_view *sv = NULL; - SVGA3dSurfaceFormat format = svga_translate_format(pt->format); - boolean view = TRUE; - - assert(pt); - assert(min_lod >= 0); - assert(min_lod <= max_lod); - assert(max_lod <= pt->last_level); - - - /* Is a view needed */ - { - /* - * Can't control max lod. For first level views and when we only - * look at one level we disable mip filtering to achive the same - * results as a view. - */ - if (min_lod == 0 && max_lod >= pt->last_level) - view = FALSE; - - if (util_format_is_compressed(pt->format) && view) { - format = svga_translate_format_render(pt->format); - } - - if (ss->debug.no_sampler_view) - view = FALSE; - - if (ss->debug.force_sampler_view) - view = TRUE; - } - - /* First try the cache */ - if (view) { - pipe_mutex_lock(ss->tex_mutex); - if (tex->cached_view && - tex->cached_view->min_lod == min_lod && - tex->cached_view->max_lod == max_lod) { - svga_sampler_view_reference(&sv, tex->cached_view); - pipe_mutex_unlock(ss->tex_mutex); - SVGA_DBG(DEBUG_VIEWS, "svga: Sampler view: reuse %p, %u %u, last %u\n", - pt, min_lod, max_lod, pt->last_level); - svga_validate_sampler_view(svga_context(pipe), sv); - return sv; - } - pipe_mutex_unlock(ss->tex_mutex); - } - - sv = CALLOC_STRUCT(svga_sampler_view); - pipe_reference_init(&sv->reference, 1); - pipe_texture_reference(&sv->texture, pt); - sv->min_lod = min_lod; - sv->max_lod = max_lod; - - /* No view needed just use the whole texture */ - if (!view) { - SVGA_DBG(DEBUG_VIEWS, - "svga: Sampler view: no %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n", - pt, min_lod, max_lod, - max_lod - min_lod + 1, - pt->width0, - pt->height0, - pt->depth0, - pt->last_level); - sv->key.cachable = 0; - sv->handle = tex->handle; - return sv; - } - - SVGA_DBG(DEBUG_VIEWS, - "svga: Sampler view: yes %p, mips %u..%u, nr %u, size (%ux%ux%u), last %u\n", - pt, min_lod, max_lod, - max_lod - min_lod + 1, - pt->width0, - pt->height0, - pt->depth0, - pt->last_level); - - sv->age = tex->age; - sv->handle = svga_texture_view_surface(pipe, tex, format, - min_lod, - max_lod - min_lod + 1, - -1, -1, - &sv->key); - - if (!sv->handle) { - assert(0); - sv->key.cachable = 0; - sv->handle = tex->handle; - return sv; - } - - pipe_mutex_lock(ss->tex_mutex); - svga_sampler_view_reference(&tex->cached_view, sv); - pipe_mutex_unlock(ss->tex_mutex); - - return sv; -} - -void -svga_validate_sampler_view(struct svga_context *svga, struct svga_sampler_view *v) -{ - struct svga_texture *tex = svga_texture(v->texture); - unsigned numFaces; - unsigned age = 0; - int i, k; - - assert(svga); - - if (v->handle == tex->handle) - return; - - age = tex->age; - - if(tex->base.target == PIPE_TEXTURE_CUBE) - numFaces = 6; - else - numFaces = 1; - - for (i = v->min_lod; i <= v->max_lod; i++) { - for (k = 0; k < numFaces; k++) { - if (v->age < tex->view_age[i]) - svga_texture_copy_handle(svga, NULL, - tex->handle, 0, 0, 0, i, k, - v->handle, 0, 0, 0, i - v->min_lod, k, - u_minify(tex->base.width0, i), - u_minify(tex->base.height0, i), - u_minify(tex->base.depth0, i)); - } - } - - v->age = age; -} - -void -svga_destroy_sampler_view_priv(struct svga_sampler_view *v) -{ - struct svga_texture *tex = svga_texture(v->texture); - - if(v->handle != tex->handle) { - struct svga_screen *ss = svga_screen(v->texture->screen); - SVGA_DBG(DEBUG_DMA, "unref sid %p (sampler view)\n", v->handle); - svga_screen_surface_destroy(ss, &v->key, &v->handle); - } - pipe_texture_reference(&v->texture, NULL); - FREE(v); -} - -boolean -svga_screen_buffer_from_texture(struct pipe_texture *texture, - struct pipe_buffer **buffer, - unsigned *stride) -{ - struct svga_texture *stex = svga_texture(texture); - - *buffer = svga_screen_buffer_wrap_surface - (texture->screen, - svga_translate_format(texture->format), - stex->handle); - - *stride = util_format_get_stride(texture->format, texture->width0); - - return *buffer != NULL; -} - - -struct svga_winsys_surface * -svga_screen_texture_get_winsys_surface(struct pipe_texture *texture) -{ - struct svga_winsys_screen *sws = svga_winsys_screen(texture->screen); - struct svga_winsys_surface *vsurf = NULL; - - assert(svga_texture(texture)->key.cachable == 0); - svga_texture(texture)->key.cachable = 0; - sws->surface_reference(sws, &vsurf, svga_texture(texture)->handle); - return vsurf; -} diff --git a/src/gallium/drivers/svga/svga_state_constants.c b/src/gallium/drivers/svga/svga_state_constants.c index bb92f818eae..97c818cd379 100644 --- a/src/gallium/drivers/svga/svga_state_constants.c +++ b/src/gallium/drivers/svga/svga_state_constants.c @@ -82,7 +82,7 @@ static int emit_consts( struct svga_context *svga, int offset, int unit ) { - struct pipe_screen *screen = svga->pipe.screen; + struct pipe_transfer *transfer = NULL; unsigned count; const float (*data)[4] = NULL; unsigned i; @@ -91,11 +91,12 @@ static int emit_consts( struct svga_context *svga, if (svga->curr.cb[unit] == NULL) goto done; - count = svga->curr.cb[unit]->size / (4 * sizeof(float)); + count = svga->curr.cb[unit]->width0 / (4 * sizeof(float)); - data = (const float (*)[4])pipe_buffer_map(screen, + data = (const float (*)[4])pipe_buffer_map(&svga->pipe, svga->curr.cb[unit], - PIPE_BUFFER_USAGE_CPU_READ); + PIPE_TRANSFER_READ, + &transfer); if (data == NULL) { ret = PIPE_ERROR_OUT_OF_MEMORY; goto done; @@ -109,7 +110,7 @@ static int emit_consts( struct svga_context *svga, done: if (data) - pipe_buffer_unmap(screen, svga->curr.cb[unit]); + pipe_buffer_unmap(&svga->pipe, svga->curr.cb[unit], transfer); return ret; } @@ -137,7 +138,7 @@ static int emit_fs_consts( struct svga_context *svga, for (i = 0; i < key->num_textures; i++) { if (key->tex[i].unnormalized) { - struct pipe_texture *tex = svga->curr.texture[i]; + struct pipe_resource *tex = svga->curr.sampler_views[i]->texture; float data[4]; data[0] = 1.0 / (float)tex->width0; diff --git a/src/gallium/drivers/svga/svga_state_framebuffer.c b/src/gallium/drivers/svga/svga_state_framebuffer.c index b710914acda..bd92f003432 100644 --- a/src/gallium/drivers/svga/svga_state_framebuffer.c +++ b/src/gallium/drivers/svga/svga_state_framebuffer.c @@ -70,7 +70,7 @@ static int emit_framebuffer( struct svga_context *svga, return ret; if (curr->zsbuf && - curr->zsbuf->format == PIPE_FORMAT_S8Z24_UNORM) { + curr->zsbuf->format == PIPE_FORMAT_S8_USCALED_Z24_UNORM) { ret = SVGA3D_SetRenderTarget(svga->swc, SVGA3D_RT_STENCIL, curr->zsbuf); if (ret != PIPE_OK) return ret; diff --git a/src/gallium/drivers/svga/svga_state_fs.c b/src/gallium/drivers/svga/svga_state_fs.c index 2973444d0ab..1310fd9825f 100644 --- a/src/gallium/drivers/svga/svga_state_fs.c +++ b/src/gallium/drivers/svga/svga_state_fs.c @@ -158,10 +158,11 @@ static int make_fs_key( const struct svga_context *svga, * * SVGA_NEW_TEXTURE_BINDING | SVGA_NEW_SAMPLER */ - for (i = 0; i < svga->curr.num_textures; i++) { - if (svga->curr.texture[i]) { + for (i = 0; i < svga->curr.num_sampler_views; i++) { + if (svga->curr.sampler_views[i]) { assert(svga->curr.sampler[i]); - key->tex[i].texture_target = svga->curr.texture[i]->target; + assert(svga->curr.sampler_views[i]->texture); + key->tex[i].texture_target = svga->curr.sampler_views[i]->texture->target; if (!svga->curr.sampler[i]->normalized_coords) { key->tex[i].width_height_idx = idx++; key->tex[i].unnormalized = TRUE; @@ -169,7 +170,7 @@ static int make_fs_key( const struct svga_context *svga, } } } - key->num_textures = svga->curr.num_textures; + key->num_textures = svga->curr.num_sampler_views; idx = 0; for (i = 0; i < svga->curr.num_samplers; ++i) { diff --git a/src/gallium/drivers/svga/svga_state_need_swtnl.c b/src/gallium/drivers/svga/svga_state_need_swtnl.c index d774e3e504d..d34d68f5350 100644 --- a/src/gallium/drivers/svga/svga_state_need_swtnl.c +++ b/src/gallium/drivers/svga/svga_state_need_swtnl.c @@ -43,7 +43,7 @@ svga_translate_vertex_format(enum pipe_format format) case PIPE_FORMAT_R32G32_FLOAT: return SVGA3D_DECLTYPE_FLOAT2; case PIPE_FORMAT_R32G32B32_FLOAT: return SVGA3D_DECLTYPE_FLOAT3; case PIPE_FORMAT_R32G32B32A32_FLOAT: return SVGA3D_DECLTYPE_FLOAT4; - case PIPE_FORMAT_A8R8G8B8_UNORM: return SVGA3D_DECLTYPE_D3DCOLOR; + case PIPE_FORMAT_B8G8R8A8_UNORM: return SVGA3D_DECLTYPE_D3DCOLOR; case PIPE_FORMAT_R8G8B8A8_USCALED: return SVGA3D_DECLTYPE_UBYTE4; case PIPE_FORMAT_R16G16_SSCALED: return SVGA3D_DECLTYPE_SHORT2; case PIPE_FORMAT_R16G16B16A16_SSCALED: return SVGA3D_DECLTYPE_SHORT4; @@ -52,14 +52,10 @@ svga_translate_vertex_format(enum pipe_format format) case PIPE_FORMAT_R16G16B16A16_SNORM: return SVGA3D_DECLTYPE_SHORT4N; case PIPE_FORMAT_R16G16_UNORM: return SVGA3D_DECLTYPE_USHORT2N; case PIPE_FORMAT_R16G16B16A16_UNORM: return SVGA3D_DECLTYPE_USHORT4N; - - /* These formats don't exist yet: - * - case PIPE_FORMAT_R10G10B10_USCALED: return SVGA3D_DECLTYPE_UDEC3; - case PIPE_FORMAT_R10G10B10_SNORM: return SVGA3D_DECLTYPE_DEC3N; + case PIPE_FORMAT_R10G10B10X2_USCALED: return SVGA3D_DECLTYPE_UDEC3; + case PIPE_FORMAT_R10G10B10X2_SNORM: return SVGA3D_DECLTYPE_DEC3N; case PIPE_FORMAT_R16G16_FLOAT: return SVGA3D_DECLTYPE_FLOAT16_2; case PIPE_FORMAT_R16G16B16A16_FLOAT: return SVGA3D_DECLTYPE_FLOAT16_4; - */ default: /* There are many formats without hardware support. This case @@ -76,8 +72,13 @@ static int update_need_swvfetch( struct svga_context *svga, unsigned i; boolean need_swvfetch = FALSE; - for (i = 0; i < svga->curr.num_vertex_elements; i++) { - svga->state.sw.ve_format[i] = svga_translate_vertex_format(svga->curr.ve[i].src_format); + if (!svga->curr.velems) { + /* No vertex elements bound. */ + return 0; + } + + for (i = 0; i < svga->curr.velems->count; i++) { + svga->state.sw.ve_format[i] = svga_translate_vertex_format(svga->curr.velems->velem[i].src_format); if (svga->state.sw.ve_format[i] == SVGA3D_DECLTYPE_MAX) { need_swvfetch = TRUE; break; diff --git a/src/gallium/drivers/svga/svga_state_rss.c b/src/gallium/drivers/svga/svga_state_rss.c index 107cc403b4d..b7195d246bc 100644 --- a/src/gallium/drivers/svga/svga_state_rss.c +++ b/src/gallium/drivers/svga/svga_state_rss.c @@ -191,15 +191,24 @@ static int emit_rss( struct svga_context *svga, EMIT_RS( svga, svga->curr.stencil_ref.ref_value[0], STENCILREF, fail ); } - if (dirty & SVGA_NEW_RAST) + if (dirty & (SVGA_NEW_RAST | SVGA_NEW_NEED_PIPELINE)) { const struct svga_rasterizer_state *curr = svga->curr.rast; + unsigned cullmode = curr->cullmode; /* Shademode: still need to rearrange index list to move * flat-shading PV first vertex. */ EMIT_RS( svga, curr->shademode, SHADEMODE, fail ); - EMIT_RS( svga, curr->cullmode, CULLMODE, fail ); + + /* Don't do culling while the software pipeline is active. It + * does it for us, and additionally introduces potentially + * back-facing triangles. + */ + if (svga->state.sw.need_pipeline) + cullmode = SVGA3D_FACE_NONE; + + EMIT_RS( svga, cullmode, CULLMODE, fail ); EMIT_RS( svga, curr->scissortestenable, SCISSORTESTENABLE, fail ); EMIT_RS( svga, curr->multisampleantialias, MULTISAMPLEANTIALIAS, fail ); EMIT_RS( svga, curr->lastpixel, LASTPIXEL, fail ); diff --git a/src/gallium/drivers/svga/svga_state_tss.c b/src/gallium/drivers/svga/svga_state_tss.c index 17b47859781..76a2dae1435 100644 --- a/src/gallium/drivers/svga/svga_state_tss.c +++ b/src/gallium/drivers/svga/svga_state_tss.c @@ -27,7 +27,7 @@ #include "pipe/p_defines.h" #include "util/u_math.h" -#include "svga_screen_texture.h" +#include "svga_sampler_view.h" #include "svga_winsys.h" #include "svga_context.h" #include "svga_state.h" @@ -37,15 +37,15 @@ void svga_cleanup_tss_binding(struct svga_context *svga) { int i; - unsigned count = MAX2( svga->curr.num_textures, + unsigned count = MAX2( svga->curr.num_sampler_views, svga->state.hw_draw.num_views ); for (i = 0; i < count; i++) { struct svga_hw_view_state *view = &svga->state.hw_draw.views[i]; svga_sampler_view_reference(&view->v, NULL); - pipe_texture_reference( &svga->curr.texture[i], NULL ); - pipe_texture_reference( &view->texture, NULL ); + pipe_sampler_view_reference( &svga->curr.sampler_views[i], NULL ); + pipe_resource_reference( &view->texture, NULL ); view->dirty = 1; } @@ -57,7 +57,7 @@ update_tss_binding(struct svga_context *svga, unsigned dirty ) { unsigned i; - unsigned count = MAX2( svga->curr.num_textures, + unsigned count = MAX2( svga->curr.num_sampler_views, svga->state.hw_draw.num_views ); unsigned min_lod; unsigned max_lod; @@ -77,30 +77,32 @@ update_tss_binding(struct svga_context *svga, for (i = 0; i < count; i++) { const struct svga_sampler_state *s = svga->curr.sampler[i]; struct svga_hw_view_state *view = &svga->state.hw_draw.views[i]; + struct pipe_resource *texture = NULL; /* get min max lod */ - if (svga->curr.texture[i]) { + if (svga->curr.sampler_views[i]) { min_lod = MAX2(s->view_min_lod, 0); - max_lod = MIN2(s->view_max_lod, svga->curr.texture[i]->last_level); + max_lod = MIN2(s->view_max_lod, svga->curr.sampler_views[i]->texture->last_level); + texture = svga->curr.sampler_views[i]->texture; } else { min_lod = 0; max_lod = 0; } - if (view->texture != svga->curr.texture[i] || + if (view->texture != texture || view->min_lod != min_lod || view->max_lod != max_lod) { svga_sampler_view_reference(&view->v, NULL); - pipe_texture_reference( &view->texture, svga->curr.texture[i] ); + pipe_resource_reference( &view->texture, texture ); view->dirty = TRUE; view->min_lod = min_lod; view->max_lod = max_lod; - if (svga->curr.texture[i]) + if (texture) view->v = svga_get_tex_sampler_view(&svga->pipe, - svga->curr.texture[i], + texture, min_lod, max_lod); } @@ -115,7 +117,7 @@ update_tss_binding(struct svga_context *svga, } } - svga->state.hw_draw.num_views = svga->curr.num_textures; + svga->state.hw_draw.num_views = svga->curr.num_sampler_views; if (queue.bind_count) { SVGA3dTextureState *ts; @@ -133,7 +135,7 @@ update_tss_binding(struct svga_context *svga, svga->swc->surface_relocation(svga->swc, &ts[i].value, queue.bind[i].view->v->handle, - PIPE_BUFFER_USAGE_GPU_READ); + SVGA_RELOC_READ); } else { ts[i].value = SVGA3D_INVALID_ID; diff --git a/src/gallium/drivers/svga/svga_state_vdecl.c b/src/gallium/drivers/svga/svga_state_vdecl.c index ded903170b5..3af7bf2b358 100644 --- a/src/gallium/drivers/svga/svga_state_vdecl.c +++ b/src/gallium/drivers/svga/svga_state_vdecl.c @@ -33,7 +33,7 @@ #include "svga_draw.h" #include "svga_tgsi.h" #include "svga_screen.h" -#include "svga_screen_buffer.h" +#include "svga_resource_buffer.h" #include "svga_hw_reg.h" @@ -59,8 +59,8 @@ upload_user_buffers( struct svga_context *svga ) if (!buffer->uploaded.buffer) { ret = u_upload_buffer( svga->upload_vb, 0, - buffer->base.size, - &buffer->base, + buffer->b.b.width0, + &buffer->b.b, &buffer->uploaded.offset, &buffer->uploaded.buffer ); if (ret) @@ -73,10 +73,10 @@ upload_user_buffers( struct svga_context *svga ) buffer, buffer->uploaded.buffer, buffer->uploaded.offset, - buffer->base.size); + buffer->b.b.width0); } - pipe_buffer_reference( &svga->curr.vb[i].buffer, buffer->uploaded.buffer ); + pipe_resource_reference( &svga->curr.vb[i].buffer, buffer->uploaded.buffer ); svga->curr.vb[i].buffer_offset = buffer->uploaded.offset; } } @@ -95,17 +95,17 @@ upload_user_buffers( struct svga_context *svga ) static int emit_hw_vs_vdecl( struct svga_context *svga, unsigned dirty ) { - const struct pipe_vertex_element *ve = svga->curr.ve; + const struct pipe_vertex_element *ve = svga->curr.velems->velem; SVGA3dVertexDecl decl; unsigned i; - assert(svga->curr.num_vertex_elements >= + assert(svga->curr.velems->count >= svga->curr.vs->base.info.file_count[TGSI_FILE_INPUT]); svga_hwtnl_reset_vdecl( svga->hwtnl, - svga->curr.num_vertex_elements ); + svga->curr.velems->count ); - for (i = 0; i < svga->curr.num_vertex_elements; i++) { + for (i = 0; i < svga->curr.velems->count; i++) { const struct pipe_vertex_buffer *vb = &svga->curr.vb[ve[i].vertex_buffer_index]; unsigned usage, index; diff --git a/src/gallium/drivers/svga/svga_state_vs.c b/src/gallium/drivers/svga/svga_state_vs.c index d7999fe53d2..5133c70593c 100644 --- a/src/gallium/drivers/svga/svga_state_vs.c +++ b/src/gallium/drivers/svga/svga_state_vs.c @@ -186,13 +186,15 @@ static int update_zero_stride( struct svga_context *svga, svga->curr.zero_stride_vertex_elements = 0; svga->curr.num_zero_stride_vertex_elements = 0; - for (i = 0; i < svga->curr.num_vertex_elements; i++) { - const struct pipe_vertex_element *vel = &svga->curr.ve[i]; + for (i = 0; i < svga->curr.velems->count; i++) { + const struct pipe_vertex_element *vel = &svga->curr.velems->velem[i]; const struct pipe_vertex_buffer *vbuffer = &svga->curr.vb[ vel->vertex_buffer_index]; + if (vbuffer->stride == 0) { unsigned const_idx = svga->curr.num_zero_stride_vertex_elements; + struct pipe_transfer *transfer; struct translate *translate; struct translate_key key; void *mapped_buffer; @@ -218,19 +220,23 @@ static int update_zero_stride( struct svga_context *svga, assert(vel->src_offset == 0); - mapped_buffer = pipe_buffer_map_range(svga->pipe.screen, + mapped_buffer = pipe_buffer_map_range(&svga->pipe, vbuffer->buffer, vel->src_offset, util_format_get_blocksize(vel->src_format), - PIPE_BUFFER_USAGE_CPU_READ); + PIPE_TRANSFER_READ, + &transfer); + translate->set_buffer(translate, vel->vertex_buffer_index, mapped_buffer, - vbuffer->stride); + vbuffer->stride, vbuffer->max_index); translate->run(translate, 0, 1, 0, svga->curr.zero_stride_constants); - pipe_buffer_unmap(svga->pipe.screen, - vbuffer->buffer); + pipe_buffer_unmap(&svga->pipe, + vbuffer->buffer, + transfer); + translate->release(translate); } } diff --git a/src/gallium/drivers/svga/svga_surface.c b/src/gallium/drivers/svga/svga_surface.c new file mode 100644 index 00000000000..dc1d9a850df --- /dev/null +++ b/src/gallium/drivers/svga/svga_surface.c @@ -0,0 +1,381 @@ +/********************************************************** + * Copyright 2008-2009 VMware, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + **********************************************************/ + +#include "svga_cmd.h" + +#include "pipe/p_state.h" +#include "pipe/p_defines.h" +#include "util/u_inlines.h" +#include "os/os_thread.h" +#include "util/u_format.h" +#include "util/u_math.h" +#include "util/u_memory.h" + +#include "svga_screen.h" +#include "svga_context.h" +#include "svga_resource_texture.h" +#include "svga_surface.h" +#include "svga_winsys.h" +#include "svga_debug.h" + + +void +svga_texture_copy_handle(struct svga_context *svga, + struct svga_screen *ss, + struct svga_winsys_surface *src_handle, + unsigned src_x, unsigned src_y, unsigned src_z, + unsigned src_level, unsigned src_face, + struct svga_winsys_surface *dst_handle, + unsigned dst_x, unsigned dst_y, unsigned dst_z, + unsigned dst_level, unsigned dst_face, + unsigned width, unsigned height, unsigned depth) +{ + struct svga_surface dst, src; + enum pipe_error ret; + SVGA3dCopyBox box, *boxes; + + assert(svga || ss); + + src.handle = src_handle; + src.real_level = src_level; + src.real_face = src_face; + src.real_zslice = 0; + + dst.handle = dst_handle; + dst.real_level = dst_level; + dst.real_face = dst_face; + dst.real_zslice = 0; + + box.x = dst_x; + box.y = dst_y; + box.z = dst_z; + box.w = width; + box.h = height; + box.d = depth; + box.srcx = src_x; + box.srcy = src_y; + box.srcz = src_z; + +/* + SVGA_DBG(DEBUG_VIEWS, "mipcopy src: %p %u (%ux%ux%u), dst: %p %u (%ux%ux%u)\n", + src_handle, src_level, src_x, src_y, src_z, + dst_handle, dst_level, dst_x, dst_y, dst_z); +*/ + + if (svga) { + ret = SVGA3D_BeginSurfaceCopy(svga->swc, + &src.base, + &dst.base, + &boxes, 1); + if(ret != PIPE_OK) { + svga_context_flush(svga, NULL); + ret = SVGA3D_BeginSurfaceCopy(svga->swc, + &src.base, + &dst.base, + &boxes, 1); + assert(ret == PIPE_OK); + } + *boxes = box; + SVGA_FIFOCommitAll(svga->swc); + } else { + pipe_mutex_lock(ss->swc_mutex); + ret = SVGA3D_BeginSurfaceCopy(ss->swc, + &src.base, + &dst.base, + &boxes, 1); + if(ret != PIPE_OK) { + ss->swc->flush(ss->swc, NULL); + ret = SVGA3D_BeginSurfaceCopy(ss->swc, + &src.base, + &dst.base, + &boxes, 1); + assert(ret == PIPE_OK); + } + *boxes = box; + SVGA_FIFOCommitAll(ss->swc); + pipe_mutex_unlock(ss->swc_mutex); + } +} + + +struct svga_winsys_surface * +svga_texture_view_surface(struct pipe_context *pipe, + struct svga_texture *tex, + SVGA3dSurfaceFormat format, + unsigned start_mip, + unsigned num_mip, + int face_pick, + int zslice_pick, + struct svga_host_surface_cache_key *key) /* OUT */ +{ + struct svga_screen *ss = svga_screen(pipe->screen); + struct svga_winsys_surface *handle; + uint32_t i, j; + unsigned z_offset = 0; + + SVGA_DBG(DEBUG_PERF, + "svga: Create surface view: face %d zslice %d mips %d..%d\n", + face_pick, zslice_pick, start_mip, start_mip+num_mip-1); + + key->flags = 0; + key->format = format; + key->numMipLevels = num_mip; + key->size.width = u_minify(tex->b.b.width0, start_mip); + key->size.height = u_minify(tex->b.b.height0, start_mip); + key->size.depth = zslice_pick < 0 ? u_minify(tex->b.b.depth0, start_mip) : 1; + key->cachable = 1; + assert(key->size.depth == 1); + + if(tex->b.b.target == PIPE_TEXTURE_CUBE && face_pick < 0) { + key->flags |= SVGA3D_SURFACE_CUBEMAP; + key->numFaces = 6; + } else { + key->numFaces = 1; + } + + if(key->format == SVGA3D_FORMAT_INVALID) { + key->cachable = 0; + return NULL; + } + + SVGA_DBG(DEBUG_DMA, "surface_create for texture view\n"); + handle = svga_screen_surface_create(ss, key); + if (!handle) { + key->cachable = 0; + return NULL; + } + + SVGA_DBG(DEBUG_DMA, " --> got sid %p (texture view)\n", handle); + + if (face_pick < 0) + face_pick = 0; + + if (zslice_pick >= 0) + z_offset = zslice_pick; + + for (i = 0; i < key->numMipLevels; i++) { + for (j = 0; j < key->numFaces; j++) { + if(tex->defined[j + face_pick][i + start_mip]) { + unsigned depth = (zslice_pick < 0 ? + u_minify(tex->b.b.depth0, i + start_mip) : + 1); + + svga_texture_copy_handle(svga_context(pipe), + ss, + tex->handle, + 0, 0, z_offset, + i + start_mip, + j + face_pick, + handle, 0, 0, 0, i, j, + u_minify(tex->b.b.width0, i + start_mip), + u_minify(tex->b.b.height0, i + start_mip), + depth); + } + } + } + + return handle; +} + + +static struct pipe_surface * +svga_get_tex_surface(struct pipe_screen *screen, + struct pipe_resource *pt, + unsigned face, unsigned level, unsigned zslice, + unsigned flags) +{ + struct svga_texture *tex = svga_texture(pt); + struct svga_surface *s; + boolean render = (flags & (PIPE_BIND_RENDER_TARGET | + PIPE_BIND_DEPTH_STENCIL)) ? TRUE : FALSE; + boolean view = FALSE; + SVGA3dSurfaceFormat format; + + s = CALLOC_STRUCT(svga_surface); + if (!s) + return NULL; + + pipe_reference_init(&s->base.reference, 1); + pipe_resource_reference(&s->base.texture, pt); + s->base.format = pt->format; + s->base.width = u_minify(pt->width0, level); + s->base.height = u_minify(pt->height0, level); + s->base.usage = flags; + s->base.level = level; + s->base.face = face; + s->base.zslice = zslice; + + if (!render) + format = svga_translate_format(pt->format); + else + format = svga_translate_format_render(pt->format); + + assert(format != SVGA3D_FORMAT_INVALID); + + if (svga_screen(screen)->debug.force_surface_view) + view = TRUE; + + /* Currently only used for compressed textures */ + if (render && + format != svga_translate_format(pt->format)) { + view = TRUE; + } + + if (level != 0 && + svga_screen(screen)->debug.force_level_surface_view) + view = TRUE; + + if (pt->target == PIPE_TEXTURE_3D) + view = TRUE; + + if (svga_screen(screen)->debug.no_surface_view) + view = FALSE; + + if (view) { + SVGA_DBG(DEBUG_VIEWS, "svga: Surface view: yes %p, level %u face %u z %u, %p\n", + pt, level, face, zslice, s); + + s->handle = svga_texture_view_surface(NULL, tex, format, level, 1, face, zslice, + &s->key); + s->real_face = 0; + s->real_level = 0; + s->real_zslice = 0; + } else { + SVGA_DBG(DEBUG_VIEWS, "svga: Surface view: no %p, level %u, face %u, z %u, %p\n", + pt, level, face, zslice, s); + + memset(&s->key, 0, sizeof s->key); + s->handle = tex->handle; + s->real_face = face; + s->real_level = level; + s->real_zslice = zslice; + } + + return &s->base; +} + + +static void +svga_tex_surface_destroy(struct pipe_surface *surf) +{ + struct svga_surface *s = svga_surface(surf); + struct svga_texture *t = svga_texture(surf->texture); + struct svga_screen *ss = svga_screen(surf->texture->screen); + + if(s->handle != t->handle) { + SVGA_DBG(DEBUG_DMA, "unref sid %p (tex surface)\n", s->handle); + svga_screen_surface_destroy(ss, &s->key, &s->handle); + } + + pipe_resource_reference(&surf->texture, NULL); + FREE(surf); +} + + +static INLINE void +svga_mark_surface_dirty(struct pipe_surface *surf) +{ + struct svga_surface *s = svga_surface(surf); + + if(!s->dirty) { + struct svga_texture *tex = svga_texture(surf->texture); + + s->dirty = TRUE; + + if (s->handle == tex->handle) + tex->defined[surf->face][surf->level] = TRUE; + else { + /* this will happen later in svga_propagate_surface */ + } + } +} + + +void svga_mark_surfaces_dirty(struct svga_context *svga) +{ + unsigned i; + + for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) { + if (svga->curr.framebuffer.cbufs[i]) + svga_mark_surface_dirty(svga->curr.framebuffer.cbufs[i]); + } + if (svga->curr.framebuffer.zsbuf) + svga_mark_surface_dirty(svga->curr.framebuffer.zsbuf); +} + + +/** + * Progagate any changes from surfaces to texture. + * pipe is optional context to inline the blit command in. + */ +void +svga_propagate_surface(struct pipe_context *pipe, struct pipe_surface *surf) +{ + struct svga_surface *s = svga_surface(surf); + struct svga_texture *tex = svga_texture(surf->texture); + struct svga_screen *ss = svga_screen(surf->texture->screen); + + if (!s->dirty) + return; + + s->dirty = FALSE; + ss->texture_timestamp++; + tex->view_age[surf->level] = ++(tex->age); + + if (s->handle != tex->handle) { + SVGA_DBG(DEBUG_VIEWS, "svga: Surface propagate: tex %p, level %u, from %p\n", tex, surf->level, surf); + svga_texture_copy_handle(svga_context(pipe), ss, + s->handle, 0, 0, 0, s->real_level, s->real_face, + tex->handle, 0, 0, surf->zslice, surf->level, surf->face, + u_minify(tex->b.b.width0, surf->level), + u_minify(tex->b.b.height0, surf->level), 1); + tex->defined[surf->face][surf->level] = TRUE; + } +} + +/** + * Check if we should call svga_propagate_surface on the surface. + */ +boolean +svga_surface_needs_propagation(struct pipe_surface *surf) +{ + struct svga_surface *s = svga_surface(surf); + struct svga_texture *tex = svga_texture(surf->texture); + + return s->dirty && s->handle != tex->handle; +} + + + + + + +void +svga_screen_init_surface_functions(struct pipe_screen *screen) +{ + screen->get_tex_surface = svga_get_tex_surface; + screen->tex_surface_destroy = svga_tex_surface_destroy; +} + diff --git a/src/gallium/drivers/svga/svga_surface.h b/src/gallium/drivers/svga/svga_surface.h new file mode 100644 index 00000000000..b50ecdc9942 --- /dev/null +++ b/src/gallium/drivers/svga/svga_surface.h @@ -0,0 +1,97 @@ +/********************************************************** + * Copyright 2008-2009 VMware, Inc. All rights reserved. + * + * Permission is hereby granted, free of charge, to any person + * obtaining a copy of this software and associated documentation + * files (the "Software"), to deal in the Software without + * restriction, including without limitation the rights to use, copy, + * modify, merge, publish, distribute, sublicense, and/or sell copies + * of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be + * included in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS + * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN + * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN + * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * SOFTWARE. + * + **********************************************************/ + +#ifndef SVGA_SURFACE_H +#define SVGA_SURFACE_H + + +#include "pipe/p_compiler.h" +#include "pipe/p_state.h" +#include "util/u_inlines.h" +#include "svga_screen_cache.h" + +struct pipe_context; +struct pipe_screen; +struct svga_context; +struct svga_texture; +struct svga_winsys_surface; +enum SVGA3dSurfaceFormat; + + +struct svga_surface +{ + struct pipe_surface base; + + struct svga_host_surface_cache_key key; + struct svga_winsys_surface *handle; + + unsigned real_face; + unsigned real_level; + unsigned real_zslice; + + boolean dirty; +}; + + +extern void +svga_propagate_surface(struct pipe_context *pipe, struct pipe_surface *surf); + +extern boolean +svga_surface_needs_propagation(struct pipe_surface *surf); + +struct svga_winsys_surface * +svga_texture_view_surface(struct pipe_context *pipe, + struct svga_texture *tex, + SVGA3dSurfaceFormat format, + unsigned start_mip, + unsigned num_mip, + int face_pick, + int zslice_pick, + struct svga_host_surface_cache_key *key); /* OUT */ + + +void +svga_texture_copy_handle(struct svga_context *svga, + struct svga_screen *ss, + struct svga_winsys_surface *src_handle, + unsigned src_x, unsigned src_y, unsigned src_z, + unsigned src_level, unsigned src_face, + struct svga_winsys_surface *dst_handle, + unsigned dst_x, unsigned dst_y, unsigned dst_z, + unsigned dst_level, unsigned dst_face, + unsigned width, unsigned height, unsigned depth); + + +static INLINE struct svga_surface * +svga_surface(struct pipe_surface *surface) +{ + assert(surface); + return (struct svga_surface *)surface; +} + +void +svga_screen_init_surface_functions(struct pipe_screen *screen); + +#endif diff --git a/src/gallium/drivers/svga/svga_swtnl.h b/src/gallium/drivers/svga/svga_swtnl.h index 4882f26b170..8724690f7e1 100644 --- a/src/gallium/drivers/svga/svga_swtnl.h +++ b/src/gallium/drivers/svga/svga_swtnl.h @@ -40,8 +40,9 @@ void svga_destroy_swtnl( struct svga_context *svga ); enum pipe_error svga_swtnl_draw_range_elements(struct svga_context *svga, - struct pipe_buffer *indexBuffer, + struct pipe_resource *indexBuffer, unsigned indexSize, + int indexBias, unsigned min_index, unsigned max_index, unsigned prim, diff --git a/src/gallium/drivers/svga/svga_swtnl_backend.c b/src/gallium/drivers/svga/svga_swtnl_backend.c index e9d7942fb57..b0cbead8a5c 100644 --- a/src/gallium/drivers/svga/svga_swtnl_backend.c +++ b/src/gallium/drivers/svga/svga_swtnl_backend.c @@ -79,21 +79,19 @@ svga_vbuf_render_allocate_vertices( struct vbuf_render *render, new_vbuf = TRUE; if (new_vbuf) - pipe_buffer_reference(&svga_render->vbuf, NULL); + pipe_resource_reference(&svga_render->vbuf, NULL); if (new_ibuf) - pipe_buffer_reference(&svga_render->ibuf, NULL); + pipe_resource_reference(&svga_render->ibuf, NULL); if (!svga_render->vbuf) { svga_render->vbuf_size = MAX2(size, svga_render->vbuf_alloc_size); svga_render->vbuf = pipe_buffer_create(screen, - 16, - PIPE_BUFFER_USAGE_VERTEX, + PIPE_BIND_VERTEX_BUFFER, svga_render->vbuf_size); if(!svga_render->vbuf) { svga_context_flush(svga, NULL); svga_render->vbuf = pipe_buffer_create(screen, - 16, - PIPE_BUFFER_USAGE_VERTEX, + PIPE_BIND_VERTEX_BUFFER, svga_render->vbuf_size); assert(svga_render->vbuf); } @@ -117,14 +115,14 @@ svga_vbuf_render_map_vertices( struct vbuf_render *render ) { struct svga_vbuf_render *svga_render = svga_vbuf_render(render); struct svga_context *svga = svga_render->svga; - struct pipe_screen *screen = svga->pipe.screen; - char *ptr = (char*)pipe_buffer_map(screen, + char *ptr = (char*)pipe_buffer_map(&svga->pipe, svga_render->vbuf, - PIPE_BUFFER_USAGE_CPU_WRITE | - PIPE_BUFFER_USAGE_FLUSH_EXPLICIT | - PIPE_BUFFER_USAGE_DISCARD | - PIPE_BUFFER_USAGE_UNSYNCHRONIZED); + PIPE_TRANSFER_WRITE | + PIPE_TRANSFER_FLUSH_EXPLICIT | + PIPE_TRANSFER_DISCARD | + PIPE_TRANSFER_UNSYNCHRONIZED, + &svga_render->vbuf_transfer); return ptr + svga_render->vbuf_offset; } @@ -135,14 +133,15 @@ svga_vbuf_render_unmap_vertices( struct vbuf_render *render, { struct svga_vbuf_render *svga_render = svga_vbuf_render(render); struct svga_context *svga = svga_render->svga; - struct pipe_screen *screen = svga->pipe.screen; unsigned offset, length; size_t used = svga_render->vertex_size * ((size_t)max_index + 1); offset = svga_render->vbuf_offset + svga_render->vertex_size * min_index; length = svga_render->vertex_size * (max_index + 1 - min_index); - pipe_buffer_flush_mapped_range(screen, svga_render->vbuf, offset, length); - pipe_buffer_unmap(screen, svga_render->vbuf); + pipe_buffer_flush_mapped_range(&svga->pipe, + svga_render->vbuf_transfer, + offset, length); + pipe_buffer_unmap(&svga->pipe, svga_render->vbuf, svga_render->vbuf_transfer); svga_render->min_index = min_index; svga_render->max_index = max_index; svga_render->vbuf_used = MAX2(svga_render->vbuf_used, used); @@ -248,26 +247,25 @@ svga_vbuf_render_draw( struct vbuf_render *render, struct svga_vbuf_render *svga_render = svga_vbuf_render(render); struct svga_context *svga = svga_render->svga; struct pipe_screen *screen = svga->pipe.screen; - unsigned bias = (svga_render->vbuf_offset - svga_render->vdecl_offset) / svga_render->vertex_size; + int bias = (svga_render->vbuf_offset - svga_render->vdecl_offset) / svga_render->vertex_size; boolean ret; size_t size = 2 * nr_indices; assert(( svga_render->vbuf_offset - svga_render->vdecl_offset) % svga_render->vertex_size == 0); if (svga_render->ibuf_size < svga_render->ibuf_offset + size) - pipe_buffer_reference(&svga_render->ibuf, NULL); + pipe_resource_reference(&svga_render->ibuf, NULL); if (!svga_render->ibuf) { svga_render->ibuf_size = MAX2(size, svga_render->ibuf_alloc_size); svga_render->ibuf = pipe_buffer_create(screen, - 2, - PIPE_BUFFER_USAGE_VERTEX, + PIPE_BIND_INDEX_BUFFER, svga_render->ibuf_size); svga_render->ibuf_offset = 0; } - pipe_buffer_write_nooverlap(screen, svga_render->ibuf, - svga_render->ibuf_offset, 2 * nr_indices, indices); + pipe_buffer_write_nooverlap(&svga->pipe, svga_render->ibuf, + svga_render->ibuf_offset, 2 * nr_indices, indices); /* off to hardware */ @@ -282,19 +280,21 @@ svga_vbuf_render_draw( struct vbuf_render *render, ret = svga_hwtnl_draw_range_elements(svga->hwtnl, svga_render->ibuf, 2, + bias, svga_render->min_index, svga_render->max_index, svga_render->prim, - svga_render->ibuf_offset / 2, nr_indices, bias); + svga_render->ibuf_offset / 2, nr_indices); if(ret != PIPE_OK) { svga_context_flush(svga, NULL); ret = svga_hwtnl_draw_range_elements(svga->hwtnl, svga_render->ibuf, 2, + bias, svga_render->min_index, svga_render->max_index, svga_render->prim, - svga_render->ibuf_offset / 2, nr_indices, bias); + svga_render->ibuf_offset / 2, nr_indices); svga->swtnl.new_vbuf = TRUE; assert(ret == PIPE_OK); } @@ -315,8 +315,8 @@ svga_vbuf_render_destroy( struct vbuf_render *render ) { struct svga_vbuf_render *svga_render = svga_vbuf_render(render); - pipe_buffer_reference(&svga_render->vbuf, NULL); - pipe_buffer_reference(&svga_render->ibuf, NULL); + pipe_resource_reference(&svga_render->vbuf, NULL); + pipe_resource_reference(&svga_render->ibuf, NULL); FREE(svga_render); } diff --git a/src/gallium/drivers/svga/svga_swtnl_draw.c b/src/gallium/drivers/svga/svga_swtnl_draw.c index da15be155c8..eb71c23195b 100644 --- a/src/gallium/drivers/svga/svga_swtnl_draw.c +++ b/src/gallium/drivers/svga/svga_swtnl_draw.c @@ -37,12 +37,16 @@ enum pipe_error svga_swtnl_draw_range_elements(struct svga_context *svga, - struct pipe_buffer *indexBuffer, + struct pipe_resource *indexBuffer, unsigned indexSize, + int indexBias, unsigned min_index, unsigned max_index, unsigned prim, unsigned start, unsigned count) { + struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS]; + struct pipe_transfer *ib_transfer = NULL; + struct pipe_transfer *cb_transfer = NULL; struct draw_context *draw = svga->swtnl.draw; unsigned i; const void *map; @@ -64,34 +68,37 @@ svga_swtnl_draw_range_elements(struct svga_context *svga, * Map vertex buffers */ for (i = 0; i < svga->curr.num_vertex_buffers; i++) { - map = pipe_buffer_map(svga->pipe.screen, + map = pipe_buffer_map(&svga->pipe, svga->curr.vb[i].buffer, - PIPE_BUFFER_USAGE_CPU_READ); + PIPE_TRANSFER_READ, + &vb_transfer[i]); draw_set_mapped_vertex_buffer(draw, i, map); } /* Map index buffer, if present */ if (indexBuffer) { - map = pipe_buffer_map(svga->pipe.screen, indexBuffer, - PIPE_BUFFER_USAGE_CPU_READ); + map = pipe_buffer_map(&svga->pipe, indexBuffer, + PIPE_TRANSFER_READ, + &ib_transfer); draw_set_mapped_element_buffer_range(draw, - indexSize, + indexSize, indexBias, min_index, max_index, map); } if (svga->curr.cb[PIPE_SHADER_VERTEX]) { - map = pipe_buffer_map(svga->pipe.screen, + map = pipe_buffer_map(&svga->pipe, svga->curr.cb[PIPE_SHADER_VERTEX], - PIPE_BUFFER_USAGE_CPU_READ); + PIPE_TRANSFER_READ, + &cb_transfer); assert(map); draw_set_mapped_constant_buffer( draw, PIPE_SHADER_VERTEX, 0, map, - svga->curr.cb[PIPE_SHADER_VERTEX]->size); + svga->curr.cb[PIPE_SHADER_VERTEX]->width0); } draw_arrays(svga->swtnl.draw, prim, start, count); @@ -105,18 +112,20 @@ svga_swtnl_draw_range_elements(struct svga_context *svga, * unmap vertex/index buffers */ for (i = 0; i < svga->curr.num_vertex_buffers; i++) { - pipe_buffer_unmap(svga->pipe.screen, svga->curr.vb[i].buffer); + pipe_buffer_unmap(&svga->pipe, svga->curr.vb[i].buffer, + vb_transfer[i]); draw_set_mapped_vertex_buffer(draw, i, NULL); } if (indexBuffer) { - pipe_buffer_unmap(svga->pipe.screen, indexBuffer); - draw_set_mapped_element_buffer(draw, 0, NULL); + pipe_buffer_unmap(&svga->pipe, indexBuffer, ib_transfer); + draw_set_mapped_element_buffer(draw, 0, 0, NULL); } if (svga->curr.cb[PIPE_SHADER_VERTEX]) { - pipe_buffer_unmap(svga->pipe.screen, - svga->curr.cb[PIPE_SHADER_VERTEX]); + pipe_buffer_unmap(&svga->pipe, + svga->curr.cb[PIPE_SHADER_VERTEX], + cb_transfer); } return ret; @@ -134,7 +143,7 @@ boolean svga_init_swtnl( struct svga_context *svga ) /* * Create drawing context and plug our rendering stage into it. */ - svga->swtnl.draw = draw_create(); + svga->swtnl.draw = draw_create(&svga->pipe); if (svga->swtnl.draw == NULL) goto fail; diff --git a/src/gallium/drivers/svga/svga_swtnl_private.h b/src/gallium/drivers/svga/svga_swtnl_private.h index 9bbb42910f5..8d080708438 100644 --- a/src/gallium/drivers/svga/svga_swtnl_private.h +++ b/src/gallium/drivers/svga/svga_swtnl_private.h @@ -45,8 +45,10 @@ struct svga_vbuf_render { unsigned prim; - struct pipe_buffer *vbuf; - struct pipe_buffer *ibuf; + struct pipe_resource *vbuf; + struct pipe_resource *ibuf; + struct pipe_transfer *vbuf_transfer; + struct pipe_transfer *ibuf_transfer; /* current size of buffer */ size_t vbuf_size; diff --git a/src/gallium/drivers/svga/svga_swtnl_state.c b/src/gallium/drivers/svga/svga_swtnl_state.c index 35f36a828fd..a7592382936 100644 --- a/src/gallium/drivers/svga/svga_swtnl_state.c +++ b/src/gallium/drivers/svga/svga_swtnl_state.c @@ -99,8 +99,8 @@ static int update_swtnl_draw( struct svga_context *svga, if (dirty & SVGA_NEW_VELEMENT) draw_set_vertex_elements(svga->swtnl.draw, - svga->curr.num_vertex_elements, - svga->curr.ve ); + svga->curr.velems->count, + svga->curr.velems->velem ); if (dirty & SVGA_NEW_CLIP) draw_set_clip_state(svga->swtnl.draw, @@ -113,7 +113,8 @@ static int update_swtnl_draw( struct svga_context *svga, if (dirty & SVGA_NEW_RAST) draw_set_rasterizer_state(svga->swtnl.draw, - &svga->curr.rast->templ); + &svga->curr.rast->templ, + (void *) svga->curr.rast); if (dirty & SVGA_NEW_FRAME_BUFFER) draw_set_mrd(svga->swtnl.draw, diff --git a/src/gallium/drivers/svga/svga_tgsi_insn.c b/src/gallium/drivers/svga/svga_tgsi_insn.c index 3d4f56a67bd..7d7024c4a7d 100644 --- a/src/gallium/drivers/svga/svga_tgsi_insn.c +++ b/src/gallium/drivers/svga/svga_tgsi_insn.c @@ -49,9 +49,7 @@ translate_opcode( case TGSI_OPCODE_DP2A: return SVGA3DOP_DP2ADD; case TGSI_OPCODE_DP3: return SVGA3DOP_DP3; case TGSI_OPCODE_DP4: return SVGA3DOP_DP4; - case TGSI_OPCODE_ENDFOR: return SVGA3DOP_ENDLOOP; case TGSI_OPCODE_FRC: return SVGA3DOP_FRC; - case TGSI_OPCODE_BGNFOR: return SVGA3DOP_LOOP; case TGSI_OPCODE_MAD: return SVGA3DOP_MAD; case TGSI_OPCODE_MAX: return SVGA3DOP_MAX; case TGSI_OPCODE_MIN: return SVGA3DOP_MIN; @@ -2686,7 +2684,6 @@ needs_to_create_zero( struct svga_shader_emitter *emit ) if (emit->info.opcode_count[TGSI_OPCODE_IF] >= 1 || emit->info.opcode_count[TGSI_OPCODE_BGNLOOP] >= 1 || - emit->info.opcode_count[TGSI_OPCODE_BGNFOR] >= 1 || emit->info.opcode_count[TGSI_OPCODE_DDX] >= 1 || emit->info.opcode_count[TGSI_OPCODE_DDY] >= 1 || emit->info.opcode_count[TGSI_OPCODE_SGE] >= 1 || diff --git a/src/gallium/drivers/svga/svga_winsys.h b/src/gallium/drivers/svga/svga_winsys.h index b4e3af0eafc..3892addafd1 100644 --- a/src/gallium/drivers/svga/svga_winsys.h +++ b/src/gallium/drivers/svga/svga_winsys.h @@ -49,12 +49,18 @@ struct svga_winsys_buffer; struct pipe_screen; struct pipe_context; struct pipe_fence_handle; -struct pipe_texture; +struct pipe_resource; struct svga_region; +struct winsys_handle; -#define SVGA_BUFFER_USAGE_PINNED (PIPE_BUFFER_USAGE_CUSTOM << 0) -#define SVGA_BUFFER_USAGE_WRAPPED (PIPE_BUFFER_USAGE_CUSTOM << 1) +#define SVGA_BUFFER_USAGE_PINNED (1 << 0) +#define SVGA_BUFFER_USAGE_WRAPPED (1 << 1) + + +#define SVGA_RELOC_WRITE 0x1 +#define SVGA_RELOC_READ 0x2 + /** Opaque surface handle */ @@ -187,6 +193,25 @@ struct svga_winsys_screen uint32 numMipLevels); /** + * Creates a surface from a winsys handle. + * Used to implement pipe_screen::resource_from_handle. + */ + struct svga_winsys_surface * + (*surface_from_handle)(struct svga_winsys_screen *sws, + struct winsys_handle *whandle, + SVGA3dSurfaceFormat *format); + + /** + * Get a winsys_handle from a surface. + * Used to implement pipe_screen::resource_get_handle. + */ + boolean + (*surface_get_handle)(struct svga_winsys_screen *sws, + struct svga_winsys_surface *surface, + unsigned stride, + struct winsys_handle *whandle); + + /** * Whether this surface is sitting in a validate list */ boolean @@ -205,13 +230,7 @@ struct svga_winsys_screen /** * Buffer management. Buffer attributes are mostly fixed over its lifetime. * - * Remember that gallium gets to choose the interface it needs, and the - * window systems must then implement that interface (rather than the - * other way around...). - * - * usage is a bitmask of PIPE_BUFFER_USAGE_PIXEL/VERTEX/INDEX/CONSTANT. This - * usage argument is only an optimization hint, not a guarantee, therefore - * proper behavior must be observed in all circumstances. + * XXX usage seems to be a bitmask of SVGA_BUFFER_USAGE_* flags. * * alignment indicates the client's alignment requirements, eg for * SSE instructions. @@ -225,9 +244,9 @@ struct svga_winsys_screen /** * Map the entire data store of a buffer object into the client's address. * flags is a bitmask of: - * - PIPE_BUFFER_USAGE_CPU_READ/WRITE - * - PIPE_BUFFER_USAGE_DONTBLOCK - * - PIPE_BUFFER_USAGE_UNSYNCHRONIZED + * - PB_USAGE_CPU_READ/WRITE + * - PB_USAGE_DONTBLOCK + * - PB_USAGE_UNSYNCHRONIZED */ void * (*buffer_map)( struct svga_winsys_screen *sws, @@ -278,25 +297,12 @@ svga_screen_create(struct svga_winsys_screen *sws); struct svga_winsys_screen * svga_winsys_screen(struct pipe_screen *screen); -struct pipe_buffer * +struct pipe_resource * svga_screen_buffer_wrap_surface(struct pipe_screen *screen, enum SVGA3dSurfaceFormat format, struct svga_winsys_surface *srf); struct svga_winsys_surface * -svga_screen_texture_get_winsys_surface(struct pipe_texture *texture); -struct svga_winsys_surface * -svga_screen_buffer_get_winsys_surface(struct pipe_buffer *buffer); - -boolean -svga_screen_buffer_from_texture(struct pipe_texture *texture, - struct pipe_buffer **buffer, - unsigned *stride); - -struct pipe_texture * -svga_screen_texture_wrap_surface(struct pipe_screen *screen, - struct pipe_texture *base, - enum SVGA3dSurfaceFormat format, - struct svga_winsys_surface *srf); +svga_screen_buffer_get_winsys_surface(struct pipe_resource *buffer); #endif /* SVGA_WINSYS_H_ */ diff --git a/src/gallium/drivers/svga/svgadump/svga_shader_dump.c b/src/gallium/drivers/svga/svgadump/svga_shader_dump.c index 705ca29e8f5..4ee1bf2c353 100644 --- a/src/gallium/drivers/svga/svgadump/svga_shader_dump.c +++ b/src/gallium/drivers/svga/svgadump/svga_shader_dump.c @@ -360,7 +360,9 @@ dump_dstreg(struct sh_dstreg dstreg, union { struct sh_reg reg; struct sh_dstreg dstreg; - } u = { { 0 } }; + } u; + + memset(&u, 0, sizeof(u)); assert( (dstreg.modifier & (SVGA3DDSTMOD_SATURATE | SVGA3DDSTMOD_PARTIALPRECISION)) == dstreg.modifier ); diff --git a/src/gallium/drivers/sw/Makefile b/src/gallium/drivers/sw/Makefile new file mode 100644 index 00000000000..2713a62ee9f --- /dev/null +++ b/src/gallium/drivers/sw/Makefile @@ -0,0 +1,10 @@ +# Meta-driver which combines whichever software rasterizers have been +# built into a single convenience library. + +TOP = ../../../.. +include $(TOP)/configs/current + +C_SOURCES = \ + sw.c + +include ../../Makefile.template diff --git a/src/gallium/drivers/sw/SConscript b/src/gallium/drivers/sw/SConscript new file mode 100644 index 00000000000..37d0a0d63ce --- /dev/null +++ b/src/gallium/drivers/sw/SConscript @@ -0,0 +1,36 @@ +####################################################################### +# SConscript for swrast convenience library +# +# This is a meta-driver which consists of any and all of the software +# rasterizers into a single driver. A software rasterizer is defined +# as any driver which takes an sw_winsys pointer as the only argument +# to create_screen. +# +# XXX: unfortunately users of this driver still need to link in any +# extra libraries needed for the particular driver (eg llvm for +# llvmpipe). Not sure how to get around this. + +Import('*') + +env = env.Clone() + +if True: + env.Append(CPPDEFINES = 'GALLIUM_SOFTPIPE') + env.Prepend(LIBS = [softpipe]) + +if env['llvm']: + env.Append(CPPDEFINES = 'GALLIUM_LLVMPIPE') + env.Tool('udis86') + env.Prepend(LIBS = [llvmpipe]) + +if 'cell' in env['drivers']: + env.Append(CPPDEFINES = 'GALLIUM_CELL') + env.Prepend(LIBS = [cell]) + +sw = env.ConvenienceLibrary( + target = 'sw', + source = [ + 'sw.c', + ] + ) + Export('sw') diff --git a/src/gallium/drivers/sw/sw.c b/src/gallium/drivers/sw/sw.c new file mode 100644 index 00000000000..9f156df45f5 --- /dev/null +++ b/src/gallium/drivers/sw/sw.c @@ -0,0 +1,59 @@ +#include "pipe/p_compiler.h" +#include "util/u_debug.h" +#include "target-helpers/wrap_screen.h" +#include "sw_public.h" +#include "state_tracker/sw_winsys.h" + + +/* Helper function to choose and instantiate one of the software rasterizers: + * cell, llvmpipe, softpipe. + */ + +#ifdef GALLIUM_SOFTPIPE +#include "softpipe/sp_public.h" +#endif + +#ifdef GALLIUM_LLVMPIPE +#include "llvmpipe/lp_public.h" +#endif + +#ifdef GALLIUM_CELL +#include "cell/ppu/cell_public.h" +#endif + +struct pipe_screen * +swrast_create_screen(struct sw_winsys *winsys) +{ + const char *default_driver; + const char *driver; + struct pipe_screen *screen = NULL; + +#if defined(GALLIUM_CELL) + default_driver = "cell"; +#elif defined(GALLIUM_LLVMPIPE) + default_driver = "llvmpipe"; +#elif defined(GALLIUM_SOFTPIPE) + default_driver = "softpipe"; +#else + default_driver = ""; +#endif + + driver = debug_get_option("GALLIUM_DRIVER", default_driver); + +#if defined(GALLIUM_CELL) + if (screen == NULL && strcmp(driver, "cell") == 0) + screen = cell_create_screen( winsys ); +#endif + +#if defined(GALLIUM_LLVMPIPE) + if (screen == NULL && strcmp(driver, "llvmpipe") == 0) + screen = llvmpipe_create_screen( winsys ); +#endif + +#if defined(GALLIUM_SOFTPIPE) + if (screen == NULL) + screen = softpipe_create_screen( winsys ); +#endif + + return screen; +} diff --git a/src/gallium/drivers/sw/sw_public.h b/src/gallium/drivers/sw/sw_public.h new file mode 100644 index 00000000000..7085c5c85a0 --- /dev/null +++ b/src/gallium/drivers/sw/sw_public.h @@ -0,0 +1,13 @@ +#ifndef SW_PUBLIC_H +#define SW_PUBLIC_H + +/* A convenience library, primarily to isolate the logic required to + * figure out which if any software rasterizers have been built and + * select between them. + */ +struct sw_winsys; + +struct pipe_screen * +swrast_create_screen(struct sw_winsys *winsys); + +#endif diff --git a/src/gallium/drivers/trace/Makefile b/src/gallium/drivers/trace/Makefile index dd6831c70ab..78f6347dc72 100644 --- a/src/gallium/drivers/trace/Makefile +++ b/src/gallium/drivers/trace/Makefile @@ -4,7 +4,6 @@ include $(TOP)/configs/current LIBNAME = trace C_SOURCES = \ - tr_buffer.c \ tr_context.c \ tr_dump.c \ tr_dump_state.c \ diff --git a/src/gallium/drivers/trace/SConscript b/src/gallium/drivers/trace/SConscript index c1675d1c165..5f1fb17966a 100644 --- a/src/gallium/drivers/trace/SConscript +++ b/src/gallium/drivers/trace/SConscript @@ -5,7 +5,6 @@ env = env.Clone() trace = env.ConvenienceLibrary( target = 'trace', source = [ - 'tr_buffer.c', 'tr_context.c', 'tr_drm.c', 'tr_dump.c', diff --git a/src/gallium/drivers/trace/tr_context.c b/src/gallium/drivers/trace/tr_context.c index df40fbade6c..71ba1e909df 100644 --- a/src/gallium/drivers/trace/tr_context.c +++ b/src/gallium/drivers/trace/tr_context.c @@ -25,51 +25,37 @@ * **************************************************************************/ +#include "util/u_inlines.h" #include "util/u_memory.h" #include "util/u_simple_list.h" +#include "util/u_format.h" +#include "pipe/p_format.h" #include "pipe/p_screen.h" #include "tr_dump.h" #include "tr_dump_state.h" #include "tr_state.h" -#include "tr_buffer.h" #include "tr_screen.h" #include "tr_texture.h" -static INLINE struct pipe_buffer * -trace_buffer_unwrap(struct trace_context *tr_ctx, - struct pipe_buffer *buffer) -{ - struct trace_screen *tr_scr = trace_screen(tr_ctx->base.screen); - struct trace_buffer *tr_buf; - - if(!buffer) - return NULL; - - tr_buf = trace_buffer(buffer); - assert(tr_buf->buffer); - assert(tr_buf->buffer->screen == tr_scr->screen); - (void) tr_scr; - return tr_buf->buffer; -} -static INLINE struct pipe_texture * -trace_texture_unwrap(struct trace_context *tr_ctx, - struct pipe_texture *texture) +static INLINE struct pipe_resource * +trace_resource_unwrap(struct trace_context *tr_ctx, + struct pipe_resource *resource) { - struct trace_texture *tr_tex; + struct trace_resource *tr_tex; - if(!texture) + if(!resource) return NULL; - tr_tex = trace_texture(texture); + tr_tex = trace_resource(resource); - assert(tr_tex->texture); - return tr_tex->texture; + assert(tr_tex->resource); + return tr_tex->resource; } @@ -112,7 +98,7 @@ trace_context_draw_block(struct trace_context *tr_ctx, int flag) (void *) tr_ctx->draw_rule.fs, (void *) tr_ctx->curr.fs, (void *) tr_ctx->draw_rule.vs, (void *) tr_ctx->curr.vs, (void *) tr_ctx->draw_rule.surf, 0, - (void *) tr_ctx->draw_rule.tex, 0); + (void *) tr_ctx->draw_rule.sampler_view, 0); if (tr_ctx->draw_rule.fs && tr_ctx->draw_rule.fs == tr_ctx->curr.fs) block = TRUE; @@ -126,12 +112,12 @@ trace_context_draw_block(struct trace_context *tr_ctx, int flag) for (k = 0; k < tr_ctx->curr.nr_cbufs; k++) if (tr_ctx->draw_rule.surf == tr_ctx->curr.cbufs[k]) block = TRUE; - if (tr_ctx->draw_rule.tex) { - for (k = 0; k < tr_ctx->curr.num_texs; k++) - if (tr_ctx->draw_rule.tex == tr_ctx->curr.tex[k]) + if (tr_ctx->draw_rule.sampler_view) { + for (k = 0; k < tr_ctx->curr.num_sampler_views; k++) + if (tr_ctx->draw_rule.sampler_view == tr_ctx->curr.sampler_views[k]) block = TRUE; - for (k = 0; k < tr_ctx->curr.num_vert_texs; k++) { - if (tr_ctx->draw_rule.tex == tr_ctx->curr.vert_tex[k]) { + for (k = 0; k < tr_ctx->curr.num_vert_sampler_views; k++) { + if (tr_ctx->draw_rule.sampler_view == tr_ctx->curr.vert_sampler_views[k]) { block = TRUE; } } @@ -190,32 +176,32 @@ trace_context_draw_arrays(struct pipe_context *_pipe, static INLINE void trace_context_draw_elements(struct pipe_context *_pipe, - struct pipe_buffer *_indexBuffer, - unsigned indexSize, - unsigned mode, unsigned start, unsigned count) + struct pipe_resource *_indexBuffer, + unsigned indexSize, int indexBias, + unsigned mode, unsigned start, unsigned count) { struct trace_context *tr_ctx = trace_context(_pipe); - struct trace_buffer *tr_buf = trace_buffer(_indexBuffer); + struct trace_resource *tr_buf = trace_resource(_indexBuffer); struct pipe_context *pipe = tr_ctx->pipe; - struct pipe_buffer *indexBuffer = tr_buf->buffer; + struct pipe_resource *indexBuffer = tr_buf->resource; if (tr_ctx->curr.fs->disabled || tr_ctx->curr.vs->disabled) return; trace_context_draw_block(tr_ctx, 1); - trace_screen_user_buffer_update(_pipe->screen, indexBuffer); - trace_dump_call_begin("pipe_context", "draw_elements"); trace_dump_arg(ptr, pipe); trace_dump_arg(ptr, indexBuffer); trace_dump_arg(uint, indexSize); + trace_dump_arg(int, indexBias); trace_dump_arg(uint, mode); trace_dump_arg(uint, start); trace_dump_arg(uint, count); - pipe->draw_elements(pipe, indexBuffer, indexSize, mode, start, count); + pipe->draw_elements(pipe, indexBuffer, indexSize, indexBias, + mode, start, count); trace_dump_call_end(); @@ -225,8 +211,9 @@ trace_context_draw_elements(struct pipe_context *_pipe, static INLINE void trace_context_draw_range_elements(struct pipe_context *_pipe, - struct pipe_buffer *_indexBuffer, + struct pipe_resource *_indexBuffer, unsigned indexSize, + int indexBias, unsigned minIndex, unsigned maxIndex, unsigned mode, @@ -234,22 +221,21 @@ trace_context_draw_range_elements(struct pipe_context *_pipe, unsigned count) { struct trace_context *tr_ctx = trace_context(_pipe); - struct trace_buffer *tr_buf = trace_buffer(_indexBuffer); + struct trace_resource *tr_buf = trace_resource(_indexBuffer); struct pipe_context *pipe = tr_ctx->pipe; - struct pipe_buffer *indexBuffer = tr_buf->buffer; + struct pipe_resource *indexBuffer = tr_buf->resource; if (tr_ctx->curr.fs->disabled || tr_ctx->curr.vs->disabled) return; trace_context_draw_block(tr_ctx, 1); - trace_screen_user_buffer_update(_pipe->screen, indexBuffer); - trace_dump_call_begin("pipe_context", "draw_range_elements"); trace_dump_arg(ptr, pipe); trace_dump_arg(ptr, indexBuffer); trace_dump_arg(uint, indexSize); + trace_dump_arg(int, indexBias); trace_dump_arg(uint, minIndex); trace_dump_arg(uint, maxIndex); trace_dump_arg(uint, mode); @@ -257,8 +243,8 @@ trace_context_draw_range_elements(struct pipe_context *_pipe, trace_dump_arg(uint, count); pipe->draw_range_elements(pipe, - indexBuffer, - indexSize, minIndex, maxIndex, + indexBuffer, indexSize, indexBias, + minIndex, maxIndex, mode, start, count); trace_dump_call_end(); @@ -773,6 +759,70 @@ trace_context_delete_vs_state(struct pipe_context *_pipe, } +static INLINE void * +trace_context_create_vertex_elements_state(struct pipe_context *_pipe, + unsigned num_elements, + const struct pipe_vertex_element *elements) +{ + struct trace_context *tr_ctx = trace_context(_pipe); + struct pipe_context *pipe = tr_ctx->pipe; + void * result; + + trace_dump_call_begin("pipe_context", "create_vertex_elements_state"); + + trace_dump_arg(ptr, pipe); + trace_dump_arg(uint, num_elements); + + trace_dump_arg_begin("elements"); + trace_dump_struct_array(vertex_element, elements, num_elements); + trace_dump_arg_end(); + + result = pipe->create_vertex_elements_state(pipe, num_elements, elements); + + trace_dump_ret(ptr, result); + + trace_dump_call_end(); + + return result; +} + + +static INLINE void +trace_context_bind_vertex_elements_state(struct pipe_context *_pipe, + void *state) +{ + struct trace_context *tr_ctx = trace_context(_pipe); + struct pipe_context *pipe = tr_ctx->pipe; + + trace_dump_call_begin("pipe_context", "bind_vertex_elements_state"); + + trace_dump_arg(ptr, pipe); + trace_dump_arg(ptr, state); + + pipe->bind_vertex_elements_state(pipe, state); + + trace_dump_call_end(); +} + + +static INLINE void +trace_context_delete_vertex_elements_state(struct pipe_context *_pipe, + void *state) +{ + struct trace_context *tr_ctx = trace_context(_pipe); + struct pipe_context *pipe = tr_ctx->pipe; + + trace_dump_call_begin("pipe_context", "delete_verte_elements_state"); + + trace_dump_arg(ptr, pipe); + trace_dump_arg(ptr, state); + + pipe->delete_vertex_elements_state(pipe, state); + + trace_dump_call_end(); +} + + static INLINE void trace_context_set_blend_color(struct pipe_context *_pipe, const struct pipe_blend_color *state) @@ -830,14 +880,13 @@ trace_context_set_clip_state(struct pipe_context *_pipe, static INLINE void trace_context_set_constant_buffer(struct pipe_context *_pipe, uint shader, uint index, - struct pipe_buffer *buffer) + struct pipe_resource *buffer) { struct trace_context *tr_ctx = trace_context(_pipe); struct pipe_context *pipe = tr_ctx->pipe; if (buffer) { - trace_screen_user_buffer_update(_pipe->screen, buffer); - buffer = trace_buffer_unwrap(tr_ctx, buffer); + buffer = trace_resource_unwrap(tr_ctx, buffer); } trace_dump_call_begin("pipe_context", "set_constant_buffer"); @@ -866,11 +915,11 @@ trace_context_set_framebuffer_state(struct pipe_context *_pipe, tr_ctx->curr.nr_cbufs = state->nr_cbufs; for (i = 0; i < state->nr_cbufs; i++) if (state->cbufs[i]) - tr_ctx->curr.cbufs[i] = trace_texture(state->cbufs[i]->texture); + tr_ctx->curr.cbufs[i] = trace_resource(state->cbufs[i]->texture); else tr_ctx->curr.cbufs[i] = NULL; if (state->zsbuf) - tr_ctx->curr.zsbuf = trace_texture(state->zsbuf->texture); + tr_ctx->curr.zsbuf = trace_resource(state->zsbuf->texture); else tr_ctx->curr.zsbuf = NULL; } @@ -949,63 +998,126 @@ trace_context_set_viewport_state(struct pipe_context *_pipe, } +static struct pipe_sampler_view * +trace_create_sampler_view(struct pipe_context *_pipe, + struct pipe_resource *_resource, + const struct pipe_sampler_view *templ) +{ + struct trace_context *tr_ctx = trace_context(_pipe); + struct trace_resource *tr_tex = trace_resource(_resource); + struct pipe_context *pipe = tr_ctx->pipe; + struct pipe_resource *texture = tr_tex->resource; + struct pipe_sampler_view *result; + struct trace_sampler_view *tr_view; + + trace_dump_call_begin("pipe_context", "create_sampler_view"); + + trace_dump_arg(ptr, pipe); + trace_dump_arg(ptr, texture); + trace_dump_arg(sampler_view_template, templ); + + result = pipe->create_sampler_view(pipe, texture, templ); + + trace_dump_ret(ptr, result); + + trace_dump_call_end(); + + /* + * Wrap pipe_sampler_view + */ + tr_view = CALLOC_STRUCT(trace_sampler_view); + tr_view->base = *templ; + tr_view->base.reference.count = 1; + tr_view->base.texture = NULL; + pipe_resource_reference(&tr_view->base.texture, _resource); + tr_view->base.context = _pipe; + tr_view->sampler_view = result; + result = &tr_view->base; + + return result; +} + + +static void +trace_sampler_view_destroy(struct pipe_context *_pipe, + struct pipe_sampler_view *_view) +{ + struct trace_context *tr_ctx = trace_context(_pipe); + struct trace_sampler_view *tr_view = trace_sampler_view(_view); + struct pipe_context *pipe = tr_ctx->pipe; + struct pipe_sampler_view *view = tr_view->sampler_view; + + trace_dump_call_begin("pipe_context", "sampler_view_destroy"); + + trace_dump_arg(ptr, pipe); + trace_dump_arg(ptr, view); + + pipe->sampler_view_destroy(pipe, view); + + trace_dump_call_end(); + + pipe_resource_reference(&_view->texture, NULL); + FREE(_view); +} + + static INLINE void -trace_context_set_fragment_sampler_textures(struct pipe_context *_pipe, - unsigned num_textures, - struct pipe_texture **textures) +trace_context_set_fragment_sampler_views(struct pipe_context *_pipe, + unsigned num, + struct pipe_sampler_view **views) { struct trace_context *tr_ctx = trace_context(_pipe); - struct trace_texture *tr_tex; + struct trace_sampler_view *tr_view; struct pipe_context *pipe = tr_ctx->pipe; - struct pipe_texture *unwrapped_textures[PIPE_MAX_SAMPLERS]; + struct pipe_sampler_view *unwrapped_views[PIPE_MAX_SAMPLERS]; unsigned i; - tr_ctx->curr.num_texs = num_textures; - for(i = 0; i < num_textures; ++i) { - tr_tex = trace_texture(textures[i]); - tr_ctx->curr.tex[i] = tr_tex; - unwrapped_textures[i] = tr_tex ? tr_tex->texture : NULL; + tr_ctx->curr.num_sampler_views = num; + for(i = 0; i < num; ++i) { + tr_view = trace_sampler_view(views[i]); + tr_ctx->curr.sampler_views[i] = tr_view; + unwrapped_views[i] = tr_view ? tr_view->sampler_view : NULL; } - textures = unwrapped_textures; + views = unwrapped_views; - trace_dump_call_begin("pipe_context", "set_fragment_sampler_textures"); + trace_dump_call_begin("pipe_context", "set_fragment_sampler_views"); trace_dump_arg(ptr, pipe); - trace_dump_arg(uint, num_textures); - trace_dump_arg_array(ptr, textures, num_textures); + trace_dump_arg(uint, num); + trace_dump_arg_array(ptr, views, num); - pipe->set_fragment_sampler_textures(pipe, num_textures, textures); + pipe->set_fragment_sampler_views(pipe, num, views); trace_dump_call_end(); } static INLINE void -trace_context_set_vertex_sampler_textures(struct pipe_context *_pipe, - unsigned num_textures, - struct pipe_texture **textures) +trace_context_set_vertex_sampler_views(struct pipe_context *_pipe, + unsigned num, + struct pipe_sampler_view **views) { struct trace_context *tr_ctx = trace_context(_pipe); - struct trace_texture *tr_tex; + struct trace_sampler_view *tr_view; struct pipe_context *pipe = tr_ctx->pipe; - struct pipe_texture *unwrapped_textures[PIPE_MAX_VERTEX_SAMPLERS]; + struct pipe_sampler_view *unwrapped_views[PIPE_MAX_VERTEX_SAMPLERS]; unsigned i; - tr_ctx->curr.num_vert_texs = num_textures; - for(i = 0; i < num_textures; ++i) { - tr_tex = trace_texture(textures[i]); - tr_ctx->curr.vert_tex[i] = tr_tex; - unwrapped_textures[i] = tr_tex ? tr_tex->texture : NULL; + tr_ctx->curr.num_vert_sampler_views = num; + for(i = 0; i < num; ++i) { + tr_view = trace_sampler_view(views[i]); + tr_ctx->curr.vert_sampler_views[i] = tr_view; + unwrapped_views[i] = tr_view ? tr_view->sampler_view : NULL; } - textures = unwrapped_textures; + views = unwrapped_views; - trace_dump_call_begin("pipe_context", "set_vertex_sampler_textures"); + trace_dump_call_begin("pipe_context", "set_vertex_sampler_views"); trace_dump_arg(ptr, pipe); - trace_dump_arg(uint, num_textures); - trace_dump_arg_array(ptr, textures, num_textures); + trace_dump_arg(uint, num); + trace_dump_arg_array(ptr, views, num); - pipe->set_vertex_sampler_textures(pipe, num_textures, textures); + pipe->set_vertex_sampler_views(pipe, num, views); trace_dump_call_end(); } @@ -1020,9 +1132,6 @@ trace_context_set_vertex_buffers(struct pipe_context *_pipe, struct pipe_context *pipe = tr_ctx->pipe; unsigned i; - for(i = 0; i < num_buffers; ++i) - trace_screen_user_buffer_update(_pipe->screen, buffers[i].buffer); - trace_dump_call_begin("pipe_context", "set_vertex_buffers"); trace_dump_arg(ptr, pipe); @@ -1033,12 +1142,12 @@ trace_context_set_vertex_buffers(struct pipe_context *_pipe, trace_dump_arg_end(); if (num_buffers) { - struct pipe_vertex_buffer *_buffers = malloc(num_buffers * sizeof(*_buffers)); + struct pipe_vertex_buffer *_buffers = MALLOC(num_buffers * sizeof(*_buffers)); memcpy(_buffers, buffers, num_buffers * sizeof(*_buffers)); for (i = 0; i < num_buffers; i++) - _buffers[i].buffer = trace_buffer_unwrap(tr_ctx, buffers[i].buffer); + _buffers[i].buffer = trace_resource_unwrap(tr_ctx, buffers[i].buffer); pipe->set_vertex_buffers(pipe, num_buffers, _buffers); - free(_buffers); + FREE(_buffers); } else { pipe->set_vertex_buffers(pipe, num_buffers, NULL); } @@ -1048,29 +1157,6 @@ trace_context_set_vertex_buffers(struct pipe_context *_pipe, static INLINE void -trace_context_set_vertex_elements(struct pipe_context *_pipe, - unsigned num_elements, - const struct pipe_vertex_element *elements) -{ - struct trace_context *tr_ctx = trace_context(_pipe); - struct pipe_context *pipe = tr_ctx->pipe; - - trace_dump_call_begin("pipe_context", "set_vertex_elements"); - - trace_dump_arg(ptr, pipe); - trace_dump_arg(uint, num_elements); - - trace_dump_arg_begin("elements"); - trace_dump_struct_array(vertex_element, elements, num_elements); - trace_dump_arg_end(); - - pipe->set_vertex_elements(pipe, num_elements, elements); - - trace_dump_call_end(); -} - - -static INLINE void trace_context_surface_copy(struct pipe_context *_pipe, struct pipe_surface *dest, unsigned destx, unsigned desty, @@ -1196,23 +1282,23 @@ trace_context_destroy(struct pipe_context *_pipe) } static unsigned int -trace_is_texture_referenced( struct pipe_context *_pipe, - struct pipe_texture *_texture, - unsigned face, unsigned level) +trace_is_resource_referenced( struct pipe_context *_pipe, + struct pipe_resource *_resource, + unsigned face, unsigned level) { struct trace_context *tr_ctx = trace_context(_pipe); - struct trace_texture *tr_tex = trace_texture(_texture); + struct trace_resource *tr_tex = trace_resource(_resource); struct pipe_context *pipe = tr_ctx->pipe; - struct pipe_texture *texture = tr_tex->texture; + struct pipe_resource *texture = tr_tex->resource; unsigned int referenced; - trace_dump_call_begin("pipe_context", "is_texture_referenced"); + trace_dump_call_begin("pipe_context", "is_resource_referenced"); trace_dump_arg(ptr, pipe); trace_dump_arg(ptr, texture); trace_dump_arg(uint, face); trace_dump_arg(uint, level); - referenced = pipe->is_texture_referenced(pipe, texture, face, level); + referenced = pipe->is_resource_referenced(pipe, texture, face, level); trace_dump_ret(uint, referenced); trace_dump_call_end(); @@ -1220,28 +1306,183 @@ trace_is_texture_referenced( struct pipe_context *_pipe, return referenced; } -static unsigned int -trace_is_buffer_referenced( struct pipe_context *_pipe, - struct pipe_buffer *_buf) + +/******************************************************************** + * transfer + */ + + +static struct pipe_transfer * +trace_context_get_transfer(struct pipe_context *_context, + struct pipe_resource *_resource, + struct pipe_subresource sr, + unsigned usage, + const struct pipe_box *box) { - struct trace_context *tr_ctx = trace_context(_pipe); - struct trace_buffer *tr_buf = trace_buffer(_buf); - struct pipe_context *pipe = tr_ctx->pipe; - struct pipe_buffer *buf = tr_buf->buffer; - unsigned int referenced; + struct trace_context *tr_context = trace_context(_context); + struct trace_resource *tr_tex = trace_resource(_resource); + struct pipe_context *context = tr_context->pipe; + struct pipe_resource *texture = tr_tex->resource; + struct pipe_transfer *result = NULL; - trace_dump_call_begin("pipe_context", "is_buffer_referenced"); - trace_dump_arg(ptr, pipe); - trace_dump_arg(ptr, buf); + assert(texture->screen == context->screen); - referenced = pipe->is_buffer_referenced(pipe, buf); + /* + * Map and transfers can't be serialized so we convert all write transfers + * to transfer_inline_write and ignore read transfers. + */ + + result = context->get_transfer(context, texture, sr, usage, box); + + if (result) + result = trace_transfer_create(tr_context, tr_tex, result); + + return result; +} + + +static void +trace_context_transfer_destroy(struct pipe_context *_context, + struct pipe_transfer *_transfer) +{ + struct trace_context *tr_context = trace_context(_context); + struct trace_transfer *tr_trans = trace_transfer(_transfer); + + trace_transfer_destroy(tr_context, tr_trans); +} + + +static void * +trace_context_transfer_map(struct pipe_context *_context, + struct pipe_transfer *_transfer) +{ + struct trace_context *tr_context = trace_context(_context); + struct trace_transfer *tr_trans = trace_transfer(_transfer); + struct pipe_context *context = tr_context->pipe; + struct pipe_transfer *transfer = tr_trans->transfer; + void *map; + + map = context->transfer_map(context, transfer); + if(map) { + if(transfer->usage & PIPE_TRANSFER_WRITE) { + assert(!tr_trans->map); + tr_trans->map = map; + } + } + + return map; +} + + +static void +trace_context_transfer_flush_region( struct pipe_context *_context, + struct pipe_transfer *_transfer, + const struct pipe_box *box) +{ + struct trace_context *tr_context = trace_context(_context); + struct trace_transfer *tr_transfer = trace_transfer(_transfer); + struct pipe_context *context = tr_context->pipe; + struct pipe_transfer *transfer = tr_transfer->transfer; + + context->transfer_flush_region(context, + transfer, + box); +} + +static void +trace_context_transfer_unmap(struct pipe_context *_context, + struct pipe_transfer *_transfer) +{ + struct trace_context *tr_ctx = trace_context(_context); + struct trace_transfer *tr_trans = trace_transfer(_transfer); + struct pipe_context *context = tr_ctx->pipe; + struct pipe_transfer *transfer = tr_trans->transfer; + + if(tr_trans->map) { + /* + * Fake a transfer_inline_write + */ + + struct pipe_resource *resource = transfer->resource; + struct pipe_subresource sr = transfer->sr; + unsigned usage = transfer->usage; + const struct pipe_box *box = &transfer->box; + unsigned stride = transfer->stride; + unsigned slice_stride = transfer->slice_stride; + + trace_dump_call_begin("pipe_context", "transfer_inline_write"); + + trace_dump_arg(ptr, context); + trace_dump_arg(ptr, resource); + trace_dump_arg_struct(subresource, sr); + trace_dump_arg(uint, usage); + trace_dump_arg(box, box); + + trace_dump_arg_begin("data"); + trace_dump_box_bytes(tr_trans->map, + resource->format, + box, + stride, + slice_stride); + trace_dump_arg_end(); + + trace_dump_arg(uint, stride); + trace_dump_arg(uint, slice_stride); + + trace_dump_call_end(); + + tr_trans->map = NULL; + } + + context->transfer_unmap(context, transfer); +} + + +static void +trace_context_transfer_inline_write(struct pipe_context *_context, + struct pipe_resource *_resource, + struct pipe_subresource sr, + unsigned usage, + const struct pipe_box *box, + const void *data, + unsigned stride, + unsigned slice_stride) +{ + struct trace_context *tr_context = trace_context(_context); + struct trace_resource *tr_tex = trace_resource(_resource); + struct pipe_context *context = tr_context->pipe; + struct pipe_resource *resource = tr_tex->resource; + + assert(resource->screen == context->screen); + + trace_dump_call_begin("pipe_context", "transfer_inline_write"); + + trace_dump_arg(ptr, context); + trace_dump_arg(ptr, resource); + trace_dump_arg_struct(subresource, sr); + trace_dump_arg(uint, usage); + trace_dump_arg(box, box); + + trace_dump_arg_begin("data"); + trace_dump_box_bytes(data, + resource->format, + box, + stride, + slice_stride); + trace_dump_arg_end(); + + trace_dump_arg(uint, stride); + trace_dump_arg(uint, slice_stride); - trace_dump_ret(uint, referenced); trace_dump_call_end(); - return referenced; + context->transfer_inline_write(context, resource, + sr, usage, box, data, stride, slice_stride); } + + + static const struct debug_named_value rbug_blocker_flags[] = { {"before", 1}, {"after", 2}, @@ -1303,6 +1544,9 @@ trace_context_create(struct trace_screen *tr_scr, tr_ctx->base.create_vs_state = trace_context_create_vs_state; tr_ctx->base.bind_vs_state = trace_context_bind_vs_state; tr_ctx->base.delete_vs_state = trace_context_delete_vs_state; + tr_ctx->base.create_vertex_elements_state = trace_context_create_vertex_elements_state; + tr_ctx->base.bind_vertex_elements_state = trace_context_bind_vertex_elements_state; + tr_ctx->base.delete_vertex_elements_state = trace_context_delete_vertex_elements_state; tr_ctx->base.set_blend_color = trace_context_set_blend_color; tr_ctx->base.set_stencil_ref = trace_context_set_stencil_ref; tr_ctx->base.set_clip_state = trace_context_set_clip_state; @@ -1311,18 +1555,25 @@ trace_context_create(struct trace_screen *tr_scr, tr_ctx->base.set_polygon_stipple = trace_context_set_polygon_stipple; tr_ctx->base.set_scissor_state = trace_context_set_scissor_state; tr_ctx->base.set_viewport_state = trace_context_set_viewport_state; - tr_ctx->base.set_fragment_sampler_textures = trace_context_set_fragment_sampler_textures; - tr_ctx->base.set_vertex_sampler_textures = trace_context_set_vertex_sampler_textures; + tr_ctx->base.set_fragment_sampler_views = trace_context_set_fragment_sampler_views; + tr_ctx->base.set_vertex_sampler_views = trace_context_set_vertex_sampler_views; + tr_ctx->base.create_sampler_view = trace_create_sampler_view; + tr_ctx->base.sampler_view_destroy = trace_sampler_view_destroy; tr_ctx->base.set_vertex_buffers = trace_context_set_vertex_buffers; - tr_ctx->base.set_vertex_elements = trace_context_set_vertex_elements; if (pipe->surface_copy) tr_ctx->base.surface_copy = trace_context_surface_copy; if (pipe->surface_fill) tr_ctx->base.surface_fill = trace_context_surface_fill; tr_ctx->base.clear = trace_context_clear; tr_ctx->base.flush = trace_context_flush; - tr_ctx->base.is_texture_referenced = trace_is_texture_referenced; - tr_ctx->base.is_buffer_referenced = trace_is_buffer_referenced; + tr_ctx->base.is_resource_referenced = trace_is_resource_referenced; + + tr_ctx->base.get_transfer = trace_context_get_transfer; + tr_ctx->base.transfer_destroy = trace_context_transfer_destroy; + tr_ctx->base.transfer_map = trace_context_transfer_map; + tr_ctx->base.transfer_unmap = trace_context_transfer_unmap; + tr_ctx->base.transfer_flush_region = trace_context_transfer_flush_region; + tr_ctx->base.transfer_inline_write = trace_context_transfer_inline_write; tr_ctx->pipe = pipe; diff --git a/src/gallium/drivers/trace/tr_context.h b/src/gallium/drivers/trace/tr_context.h index 14284232485..1b4121d80a9 100644 --- a/src/gallium/drivers/trace/tr_context.h +++ b/src/gallium/drivers/trace/tr_context.h @@ -53,23 +53,23 @@ struct trace_context struct trace_shader *fs; struct trace_shader *vs; - struct trace_texture *tex[PIPE_MAX_SAMPLERS]; - unsigned num_texs; + struct trace_sampler_view *sampler_views[PIPE_MAX_SAMPLERS]; + unsigned num_sampler_views; - struct trace_texture *vert_tex[PIPE_MAX_VERTEX_SAMPLERS]; - unsigned num_vert_texs; + struct trace_sampler_view *vert_sampler_views[PIPE_MAX_VERTEX_SAMPLERS]; + unsigned num_vert_sampler_views; unsigned nr_cbufs; - struct trace_texture *cbufs[PIPE_MAX_COLOR_BUFS]; - struct trace_texture *zsbuf; + struct trace_resource *cbufs[PIPE_MAX_COLOR_BUFS]; + struct trace_resource *zsbuf; } curr; struct { struct trace_shader *fs; struct trace_shader *vs; - struct trace_texture *tex; - struct trace_texture *surf; + struct trace_sampler_view *sampler_view; + struct trace_resource *surf; int blocker; } draw_rule; diff --git a/src/gallium/drivers/trace/tr_drm.c b/src/gallium/drivers/trace/tr_drm.c index 2b4915003e2..0dc8cca2648 100644 --- a/src/gallium/drivers/trace/tr_drm.c +++ b/src/gallium/drivers/trace/tr_drm.c @@ -30,9 +30,7 @@ #include "util/u_memory.h" #include "tr_drm.h" #include "tr_screen.h" -#include "tr_context.h" -#include "tr_buffer.h" -#include "tr_texture.h" +#include "tr_public.h" struct trace_drm_api { @@ -62,69 +60,8 @@ trace_drm_create_screen(struct drm_api *_api, int fd, screen = api->create_screen(api, fd, arg); - return trace_screen_create(screen); -} - - -static struct pipe_texture * -trace_drm_texture_from_shared_handle(struct drm_api *_api, - struct pipe_screen *_screen, - struct pipe_texture *templ, - const char *name, - unsigned stride, - unsigned handle) -{ - struct trace_screen *tr_screen = trace_screen(_screen); - struct trace_drm_api *tr_api = trace_drm_api(_api); - struct pipe_screen *screen = tr_screen->screen; - struct drm_api *api = tr_api->api; - struct pipe_texture *result; - - /* TODO trace call */ - - result = api->texture_from_shared_handle(api, screen, templ, name, stride, handle); - - result = trace_texture_create(trace_screen(_screen), result); - - return result; -} - -static boolean -trace_drm_shared_handle_from_texture(struct drm_api *_api, - struct pipe_screen *_screen, - struct pipe_texture *_texture, - unsigned *stride, - unsigned *handle) -{ - struct trace_screen *tr_screen = trace_screen(_screen); - struct trace_texture *tr_texture = trace_texture(_texture); - struct trace_drm_api *tr_api = trace_drm_api(_api); - struct pipe_screen *screen = tr_screen->screen; - struct pipe_texture *texture = tr_texture->texture; - struct drm_api *api = tr_api->api; - - /* TODO trace call */ - - return api->shared_handle_from_texture(api, screen, texture, stride, handle); -} -static boolean -trace_drm_local_handle_from_texture(struct drm_api *_api, - struct pipe_screen *_screen, - struct pipe_texture *_texture, - unsigned *stride, - unsigned *handle) -{ - struct trace_screen *tr_screen = trace_screen(_screen); - struct trace_texture *tr_texture = trace_texture(_texture); - struct trace_drm_api *tr_api = trace_drm_api(_api); - struct pipe_screen *screen = tr_screen->screen; - struct pipe_texture *texture = tr_texture->texture; - struct drm_api *api = tr_api->api; - - /* TODO trace call */ - - return api->local_handle_from_texture(api, screen, texture, stride, handle); + return trace_screen_create(screen); } static void @@ -136,7 +73,7 @@ trace_drm_destroy(struct drm_api *_api) if (api->destroy) api->destroy(api); - free(tr_api); + FREE(tr_api); } struct drm_api * @@ -158,9 +95,6 @@ trace_drm_create(struct drm_api *api) tr_api->base.name = api->name; tr_api->base.driver_name = api->driver_name; tr_api->base.create_screen = trace_drm_create_screen; - tr_api->base.texture_from_shared_handle = trace_drm_texture_from_shared_handle; - tr_api->base.shared_handle_from_texture = trace_drm_shared_handle_from_texture; - tr_api->base.local_handle_from_texture = trace_drm_local_handle_from_texture; tr_api->base.destroy = trace_drm_destroy; tr_api->api = api; diff --git a/src/gallium/drivers/trace/tr_dump.c b/src/gallium/drivers/trace/tr_dump.c index 1affafdddc6..51a4ea96335 100644 --- a/src/gallium/drivers/trace/tr_dump.c +++ b/src/gallium/drivers/trace/tr_dump.c @@ -50,11 +50,12 @@ #include "util/u_debug.h" #include "util/u_memory.h" #include "util/u_string.h" +#include "util/u_math.h" +#include "util/u_format.h" #include "tr_dump.h" #include "tr_screen.h" #include "tr_texture.h" -#include "tr_buffer.h" static struct os_stream *stream = NULL; @@ -471,6 +472,25 @@ void trace_dump_bytes(const void *data, trace_dump_writes("</bytes>"); } +void trace_dump_box_bytes(const void *data, + enum pipe_format format, + const struct pipe_box *box, + unsigned stride, + unsigned slice_stride) +{ + size_t size; + + if (slice_stride) + size = box->depth * slice_stride; + else if (stride) + size = util_format_get_nblocksy(format, box->height) * stride; + else { + size = util_format_get_nblocksx(format, box->width) * util_format_get_blocksize(format); + } + + trace_dump_bytes(data, size); +} + void trace_dump_string(const char *str) { if (!dumping) @@ -574,27 +594,15 @@ void trace_dump_ptr(const void *value) trace_dump_null(); } -void trace_dump_buffer_ptr(struct pipe_buffer *_buffer) -{ - if (!dumping) - return; - - if (_buffer) { - struct trace_buffer *tr_buf = trace_buffer(_buffer); - trace_dump_ptr(tr_buf->buffer); - } else { - trace_dump_null(); - } -} -void trace_dump_texture_ptr(struct pipe_texture *_texture) +void trace_dump_resource_ptr(struct pipe_resource *_resource) { if (!dumping) return; - if (_texture) { - struct trace_texture *tr_tex = trace_texture(_texture); - trace_dump_ptr(tr_tex->texture); + if (_resource) { + struct trace_resource *tr_resource = trace_resource(_resource); + trace_dump_ptr(tr_resource->resource); } else { trace_dump_null(); } diff --git a/src/gallium/drivers/trace/tr_dump.h b/src/gallium/drivers/trace/tr_dump.h index 32592bab12f..f21f72b0c79 100644 --- a/src/gallium/drivers/trace/tr_dump.h +++ b/src/gallium/drivers/trace/tr_dump.h @@ -35,12 +35,13 @@ #include "pipe/p_compiler.h" - +#include "pipe/p_format.h" struct pipe_buffer; -struct pipe_texture; +struct pipe_resource; struct pipe_surface; struct pipe_transfer; +struct pipe_box; /* * Call before use. @@ -92,6 +93,11 @@ void trace_dump_int(long long int value); void trace_dump_uint(long long unsigned value); void trace_dump_float(double value); void trace_dump_bytes(const void *data, size_t size); +void trace_dump_box_bytes(const void *data, + enum pipe_format format, + const struct pipe_box *box, + unsigned stride, + unsigned slice_stride); void trace_dump_string(const char *str); void trace_dump_enum(const char *value); void trace_dump_array_begin(void); @@ -105,8 +111,7 @@ void trace_dump_member_end(void); void trace_dump_null(void); void trace_dump_ptr(const void *value); /* will turn a wrapped object into the real one and dump ptr */ -void trace_dump_buffer_ptr(struct pipe_buffer *_buffer); -void trace_dump_texture_ptr(struct pipe_texture *_texture); +void trace_dump_resource_ptr(struct pipe_resource *_texture); void trace_dump_surface_ptr(struct pipe_surface *_surface); void trace_dump_transfer_ptr(struct pipe_transfer *_transfer); @@ -121,6 +126,13 @@ void trace_dump_transfer_ptr(struct pipe_transfer *_transfer); trace_dump_arg_end(); \ } while(0) +#define trace_dump_arg_struct(_type, _arg) \ + do { \ + trace_dump_arg_begin(#_arg); \ + trace_dump_##_type(&_arg); \ + trace_dump_arg_end(); \ + } while(0) + #define trace_dump_ret(_type, _arg) \ do { \ trace_dump_ret_begin(); \ diff --git a/src/gallium/drivers/trace/tr_dump_state.c b/src/gallium/drivers/trace/tr_dump_state.c index f97d963dba6..f148a859ff3 100644 --- a/src/gallium/drivers/trace/tr_dump_state.c +++ b/src/gallium/drivers/trace/tr_dump_state.c @@ -44,7 +44,7 @@ void trace_dump_format(enum pipe_format format) } -void trace_dump_template(const struct pipe_texture *templat) +void trace_dump_resource_template(const struct pipe_resource *templat) { if (!trace_dumping_enabled_locked()) return; @@ -54,7 +54,7 @@ void trace_dump_template(const struct pipe_texture *templat) return; } - trace_dump_struct_begin("pipe_texture"); + trace_dump_struct_begin("pipe_resource"); trace_dump_member(int, templat, target); trace_dump_member(format, templat, format); @@ -72,7 +72,51 @@ void trace_dump_template(const struct pipe_texture *templat) trace_dump_member_end(); trace_dump_member(uint, templat, last_level); - trace_dump_member(uint, templat, tex_usage); + trace_dump_member(uint, templat, usage); + trace_dump_member(uint, templat, bind); + trace_dump_member(uint, templat, flags); + + trace_dump_struct_end(); +} + + +void trace_dump_subresource(const struct pipe_subresource *subresource) +{ + if (!trace_dumping_enabled_locked()) + return; + + if(!subresource) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_subresource"); + + trace_dump_member(uint, subresource, face); + trace_dump_member(uint, subresource, level); + + trace_dump_struct_end(); +} + + +void trace_dump_box(const struct pipe_box *box) +{ + if (!trace_dumping_enabled_locked()) + return; + + if(!box) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_box"); + + trace_dump_member(uint, box, x); + trace_dump_member(uint, box, y); + trace_dump_member(uint, box, z); + trace_dump_member(uint, box, width); + trace_dump_member(uint, box, height); + trace_dump_member(uint, box, depth); trace_dump_struct_end(); } @@ -387,6 +431,30 @@ void trace_dump_sampler_state(const struct pipe_sampler_state *state) } +void trace_dump_sampler_view_template(const struct pipe_sampler_view *state) +{ + if (!trace_dumping_enabled_locked()) + return; + + if(!state) { + trace_dump_null(); + return; + } + + trace_dump_struct_begin("pipe_sampler_view"); + + trace_dump_member(format, state, format); + trace_dump_member(uint, state, first_level); + trace_dump_member(uint, state, last_level); + trace_dump_member(uint, state, swizzle_r); + trace_dump_member(uint, state, swizzle_g); + trace_dump_member(uint, state, swizzle_b); + trace_dump_member(uint, state, swizzle_a); + + trace_dump_struct_end(); +} + + void trace_dump_surface(const struct pipe_surface *state) { if (!trace_dumping_enabled_locked()) @@ -428,16 +496,16 @@ void trace_dump_transfer(const struct pipe_transfer *state) trace_dump_struct_begin("pipe_transfer"); - trace_dump_member(uint, state, width); - trace_dump_member(uint, state, height); + trace_dump_member(uint, state, box.width); + trace_dump_member(uint, state, box.height); trace_dump_member(uint, state, stride); trace_dump_member(uint, state, usage); - trace_dump_member(ptr, state, texture); - trace_dump_member(uint, state, face); - trace_dump_member(uint, state, level); - trace_dump_member(uint, state, zslice); + trace_dump_member(ptr, state, resource); + trace_dump_member(uint, state, sr.face); + trace_dump_member(uint, state, sr.level); + trace_dump_member(uint, state, box.z); trace_dump_struct_end(); } @@ -458,7 +526,7 @@ void trace_dump_vertex_buffer(const struct pipe_vertex_buffer *state) trace_dump_member(uint, state, stride); trace_dump_member(uint, state, max_index); trace_dump_member(uint, state, buffer_offset); - trace_dump_member(buffer_ptr, state, buffer); + trace_dump_member(resource_ptr, state, buffer); trace_dump_struct_end(); } @@ -479,7 +547,6 @@ void trace_dump_vertex_element(const struct pipe_vertex_element *state) trace_dump_member(uint, state, src_offset); trace_dump_member(uint, state, vertex_buffer_index); - trace_dump_member(uint, state, nr_components); trace_dump_member(format, state, src_format); diff --git a/src/gallium/drivers/trace/tr_dump_state.h b/src/gallium/drivers/trace/tr_dump_state.h index 3400367d82a..e614e8355e3 100644 --- a/src/gallium/drivers/trace/tr_dump_state.h +++ b/src/gallium/drivers/trace/tr_dump_state.h @@ -35,7 +35,11 @@ void trace_dump_format(enum pipe_format format); -void trace_dump_template(const struct pipe_texture *templat); +void trace_dump_resource_template(const struct pipe_resource *templat); + +void trace_dump_subresource(const struct pipe_subresource *subresource); + +void trace_dump_box(const struct pipe_box *box); void trace_dump_rasterizer_state(const struct pipe_rasterizer_state *state); @@ -63,6 +67,8 @@ void trace_dump_framebuffer_state(const struct pipe_framebuffer_state *state); void trace_dump_sampler_state(const struct pipe_sampler_state *state); +void trace_dump_sampler_view_template(const struct pipe_sampler_view *view); + void trace_dump_surface(const struct pipe_surface *state); void trace_dump_transfer(const struct pipe_transfer *state); diff --git a/src/gallium/drivers/trace/tr_public.h b/src/gallium/drivers/trace/tr_public.h new file mode 100644 index 00000000000..62e217097d0 --- /dev/null +++ b/src/gallium/drivers/trace/tr_public.h @@ -0,0 +1,45 @@ +/************************************************************************** + * + * Copyright 2010 VMware, Inc. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sub license, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial portions + * of the Software. + * + **************************************************************************/ + +#ifndef TR_PUBLIC_H +#define TR_PUBLIC_H + +#ifdef __cplusplus +extern "C" { +#endif + +struct pipe_screen; +struct pipe_context; + +struct pipe_screen * +trace_screen_create(struct pipe_screen *screen); + +#ifdef __cplusplus +} +#endif + +#endif /* TR_PUBLIC_H */ diff --git a/src/gallium/drivers/trace/tr_rbug.c b/src/gallium/drivers/trace/tr_rbug.c index a43adac6940..3ce1b85854b 100644 --- a/src/gallium/drivers/trace/tr_rbug.c +++ b/src/gallium/drivers/trace/tr_rbug.c @@ -29,6 +29,7 @@ #include "os/os_thread.h" #include "util/u_format.h" #include "util/u_string.h" +#include "util/u_inlines.h" #include "util/u_memory.h" #include "util/u_simple_list.h" #include "util/u_network.h" @@ -38,7 +39,6 @@ #include "tr_dump.h" #include "tr_state.h" -#include "tr_buffer.h" #include "tr_texture.h" #include "rbug/rbug.h" @@ -150,7 +150,7 @@ static int trace_rbug_texture_list(struct trace_rbug *tr_rbug, struct rbug_header *header, uint32_t serial) { struct trace_screen *tr_scr = tr_rbug->tr_scr; - struct trace_texture *tr_tex = NULL; + struct trace_resource *tr_tex = NULL; struct tr_list *ptr; rbug_texture_t *texs; int i = 0; @@ -158,7 +158,7 @@ trace_rbug_texture_list(struct trace_rbug *tr_rbug, struct rbug_header *header, pipe_mutex_lock(tr_scr->list_mutex); texs = MALLOC(tr_scr->num_textures * sizeof(rbug_texture_t)); foreach(ptr, &tr_scr->textures) { - tr_tex = (struct trace_texture *)((char*)ptr - offsetof(struct trace_texture, list)); + tr_tex = (struct trace_resource *)((char*)ptr - offsetof(struct trace_resource, list)); texs[i++] = VOID2U64(tr_tex); } pipe_mutex_unlock(tr_scr->list_mutex); @@ -173,14 +173,14 @@ static int trace_rbug_texture_info(struct trace_rbug *tr_rbug, struct rbug_header *header, uint32_t serial) { struct trace_screen *tr_scr = tr_rbug->tr_scr; - struct trace_texture *tr_tex = NULL; + struct trace_resource *tr_tex = NULL; struct rbug_proto_texture_info *gpti = (struct rbug_proto_texture_info *)header; struct tr_list *ptr; - struct pipe_texture *t; + struct pipe_resource *t; pipe_mutex_lock(tr_scr->list_mutex); foreach(ptr, &tr_scr->textures) { - tr_tex = (struct trace_texture *)((char*)ptr - offsetof(struct trace_texture, list)); + tr_tex = (struct trace_resource *)((char*)ptr - offsetof(struct trace_resource, list)); if (gpti->texture == VOID2U64(tr_tex)) break; tr_tex = NULL; @@ -191,7 +191,7 @@ trace_rbug_texture_info(struct trace_rbug *tr_rbug, struct rbug_header *header, return -ESRCH; } - t = tr_tex->texture; + t = tr_tex->resource; rbug_send_texture_info_reply(tr_rbug->con, serial, t->target, t->format, &t->width0, 1, @@ -202,7 +202,7 @@ trace_rbug_texture_info(struct trace_rbug *tr_rbug, struct rbug_header *header, util_format_get_blocksize(t->format), t->last_level, t->nr_samples, - t->tex_usage, + t->bind, NULL); pipe_mutex_unlock(tr_scr->list_mutex); @@ -216,18 +216,18 @@ trace_rbug_texture_read(struct trace_rbug *tr_rbug, struct rbug_header *header, struct rbug_proto_texture_read *gptr = (struct rbug_proto_texture_read *)header; struct trace_screen *tr_scr = tr_rbug->tr_scr; - struct trace_texture *tr_tex = NULL; + struct trace_resource *tr_tex = NULL; struct tr_list *ptr; - struct pipe_screen *screen = tr_scr->screen; - struct pipe_texture *tex; + struct pipe_context *context = tr_scr->private_context; + struct pipe_resource *tex; struct pipe_transfer *t; void *map; pipe_mutex_lock(tr_scr->list_mutex); foreach(ptr, &tr_scr->textures) { - tr_tex = (struct trace_texture *)((char*)ptr - offsetof(struct trace_texture, list)); + tr_tex = (struct trace_resource *)((char*)ptr - offsetof(struct trace_resource, list)); if (gptr->texture == VOID2U64(tr_tex)) break; tr_tex = NULL; @@ -238,26 +238,27 @@ trace_rbug_texture_read(struct trace_rbug *tr_rbug, struct rbug_header *header, return -ESRCH; } - tex = tr_tex->texture; - t = screen->get_tex_transfer(tr_scr->screen, tex, - gptr->face, gptr->level, gptr->zslice, - PIPE_TRANSFER_READ, - gptr->x, gptr->y, gptr->w, gptr->h); + tex = tr_tex->resource; + t = pipe_get_transfer(context, tex, + gptr->face, gptr->level, gptr->zslice, + PIPE_TRANSFER_READ, + gptr->x, gptr->y, gptr->w, gptr->h); - map = screen->transfer_map(screen, t); + map = context->transfer_map(context, t); rbug_send_texture_read_reply(tr_rbug->con, serial, - t->texture->format, - util_format_get_blockwidth(t->texture->format), - util_format_get_blockheight(t->texture->format), - util_format_get_blocksize(t->texture->format), + t->resource->format, + util_format_get_blockwidth(t->resource->format), + util_format_get_blockheight(t->resource->format), + util_format_get_blocksize(t->resource->format), (uint8_t*)map, - t->stride * util_format_get_nblocksy(t->texture->format, t->height), + t->stride * util_format_get_nblocksy(t->resource->format, + t->box.height), t->stride, NULL); - screen->transfer_unmap(screen, t); - screen->tex_transfer_destroy(t); + context->transfer_unmap(context, t); + context->transfer_destroy(context, t); pipe_mutex_unlock(tr_scr->list_mutex); @@ -313,12 +314,12 @@ trace_rbug_context_info(struct trace_rbug *tr_rbug, struct rbug_header *header, for (i = 0; i < tr_ctx->curr.nr_cbufs; i++) cbufs[i] = VOID2U64(tr_ctx->curr.cbufs[i]); - for (i = 0; i < tr_ctx->curr.num_texs; i++) - texs[i] = VOID2U64(tr_ctx->curr.tex[i]); + for (i = 0; i < tr_ctx->curr.num_sampler_views; i++) + texs[i] = VOID2U64(tr_ctx->curr.sampler_views[i]); rbug_send_context_info_reply(tr_rbug->con, serial, VOID2U64(tr_ctx->curr.vs), VOID2U64(tr_ctx->curr.fs), - texs, tr_ctx->curr.num_texs, + texs, tr_ctx->curr.num_sampler_views, cbufs, tr_ctx->curr.nr_cbufs, VOID2U64(tr_ctx->curr.zsbuf), tr_ctx->draw_blocker, tr_ctx->draw_blocked, NULL); @@ -444,7 +445,7 @@ trace_rbug_context_draw_rule(struct trace_rbug *tr_rbug, struct rbug_header *hea pipe_mutex_lock(tr_ctx->draw_mutex); tr_ctx->draw_rule.vs = U642VOID(rule->vertex); tr_ctx->draw_rule.fs = U642VOID(rule->fragment); - tr_ctx->draw_rule.tex = U642VOID(rule->texture); + tr_ctx->draw_rule.sampler_view = U642VOID(rule->texture); tr_ctx->draw_rule.surf = U642VOID(rule->surface); tr_ctx->draw_rule.blocker = rule->block; tr_ctx->draw_blocker |= RBUG_BLOCK_RULE; diff --git a/src/gallium/drivers/trace/tr_screen.c b/src/gallium/drivers/trace/tr_screen.c index 388d83eb5c2..63a45d7e512 100644 --- a/src/gallium/drivers/trace/tr_screen.c +++ b/src/gallium/drivers/trace/tr_screen.c @@ -29,14 +29,13 @@ #include "util/u_memory.h" #include "util/u_simple_list.h" -#include "tr_buffer.h" #include "tr_dump.h" #include "tr_dump_state.h" #include "tr_texture.h" #include "tr_context.h" #include "tr_screen.h" +#include "tr_public.h" -#include "util/u_inlines.h" #include "pipe/p_format.h" @@ -212,70 +211,73 @@ trace_screen_flush_frontbuffer(struct pipe_screen *_screen, */ -static struct pipe_texture * -trace_screen_texture_create(struct pipe_screen *_screen, - const struct pipe_texture *templat) +static struct pipe_resource * +trace_screen_resource_create(struct pipe_screen *_screen, + const struct pipe_resource *templat) { struct trace_screen *tr_scr = trace_screen(_screen); struct pipe_screen *screen = tr_scr->screen; - struct pipe_texture *result; + struct pipe_resource *result; - trace_dump_call_begin("pipe_screen", "texture_create"); + trace_dump_call_begin("pipe_screen", "resource_create"); trace_dump_arg(ptr, screen); - trace_dump_arg(template, templat); + trace_dump_arg(resource_template, templat); - result = screen->texture_create(screen, templat); + result = screen->resource_create(screen, templat); trace_dump_ret(ptr, result); trace_dump_call_end(); - result = trace_texture_create(tr_scr, result); + result = trace_resource_create(tr_scr, result); return result; } - -static struct pipe_texture * -trace_screen_texture_blanket(struct pipe_screen *_screen, - const struct pipe_texture *templat, - const unsigned *ppitch, - struct pipe_buffer *_buffer) +static struct pipe_resource * +trace_screen_resource_from_handle(struct pipe_screen *_screen, + const struct pipe_resource *templ, + struct winsys_handle *handle) { - struct trace_screen *tr_scr = trace_screen(_screen); - struct trace_buffer *tr_buf = trace_buffer(_buffer); - struct pipe_screen *screen = tr_scr->screen; - struct pipe_buffer *buffer = tr_buf->buffer; - unsigned pitch = *ppitch; - struct pipe_texture *result; + struct trace_screen *tr_screen = trace_screen(_screen); + struct pipe_screen *screen = tr_screen->screen; + struct pipe_resource *result; - trace_dump_call_begin("pipe_screen", "texture_blanket"); + /* TODO trace call */ - trace_dump_arg(ptr, screen); - trace_dump_arg(template, templat); - trace_dump_arg(uint, pitch); - trace_dump_arg(ptr, buffer); + result = screen->resource_from_handle(screen, templ, handle); - result = screen->texture_blanket(screen, templat, ppitch, buffer); + result = trace_resource_create(trace_screen(_screen), result); - trace_dump_ret(ptr, result); + return result; +} - trace_dump_call_end(); +static boolean +trace_screen_resource_get_handle(struct pipe_screen *_screen, + struct pipe_resource *_texture, + struct winsys_handle *handle) +{ + struct trace_screen *tr_screen = trace_screen(_screen); + struct trace_resource *tr_texture = trace_resource(_texture); + struct pipe_screen *screen = tr_screen->screen; + struct pipe_resource *texture = tr_texture->resource; - result = trace_texture_create(tr_scr, result); + /* TODO trace call */ - return result; + return screen->resource_get_handle(screen, texture, handle); } + static void -trace_screen_texture_destroy(struct pipe_texture *_texture) +trace_screen_resource_destroy(struct pipe_screen *_screen, + struct pipe_resource *_texture) { - struct trace_screen *tr_scr = trace_screen(_texture->screen); - struct trace_texture *tr_tex = trace_texture(_texture); + struct trace_screen *tr_scr = trace_screen(_screen); + struct trace_resource *tr_tex = trace_resource(_texture); struct pipe_screen *screen = tr_scr->screen; - struct pipe_texture *texture = tr_tex->texture; + struct pipe_resource *texture = tr_tex->resource; assert(texture->screen == screen); @@ -286,7 +288,7 @@ trace_screen_texture_destroy(struct pipe_texture *_texture) trace_dump_call_end(); - trace_texture_destroy(tr_tex); + trace_resource_destroy(tr_scr, tr_tex); } @@ -297,15 +299,15 @@ trace_screen_texture_destroy(struct pipe_texture *_texture) static struct pipe_surface * trace_screen_get_tex_surface(struct pipe_screen *_screen, - struct pipe_texture *_texture, + struct pipe_resource *_texture, unsigned face, unsigned level, unsigned zslice, unsigned usage) { struct trace_screen *tr_scr = trace_screen(_screen); - struct trace_texture *tr_tex = trace_texture(_texture); + struct trace_resource *tr_tex = trace_resource(_texture); struct pipe_screen *screen = tr_scr->screen; - struct pipe_texture *texture = tr_tex->texture; + struct pipe_resource *texture = tr_tex->resource; struct pipe_surface *result = NULL; assert(texture->screen == screen); @@ -350,133 +352,7 @@ trace_screen_tex_surface_destroy(struct pipe_surface *_surface) } -/******************************************************************** - * transfer - */ - - -static struct pipe_transfer * -trace_screen_get_tex_transfer(struct pipe_screen *_screen, - struct pipe_texture *_texture, - unsigned face, unsigned level, - unsigned zslice, - enum pipe_transfer_usage usage, - unsigned x, unsigned y, unsigned w, unsigned h) -{ - struct trace_screen *tr_scr = trace_screen(_screen); - struct trace_texture *tr_tex = trace_texture(_texture); - struct pipe_screen *screen = tr_scr->screen; - struct pipe_texture *texture = tr_tex->texture; - struct pipe_transfer *result = NULL; - - assert(texture->screen == screen); - - trace_dump_call_begin("pipe_screen", "get_tex_transfer"); - - trace_dump_arg(ptr, screen); - trace_dump_arg(ptr, texture); - trace_dump_arg(uint, face); - trace_dump_arg(uint, level); - trace_dump_arg(uint, zslice); - trace_dump_arg(uint, usage); - - trace_dump_arg(uint, x); - trace_dump_arg(uint, y); - trace_dump_arg(uint, w); - trace_dump_arg(uint, h); - - result = screen->get_tex_transfer(screen, texture, face, level, zslice, usage, - x, y, w, h); - - trace_dump_ret(ptr, result); - - trace_dump_call_end(); - - if (result) - result = trace_transfer_create(tr_tex, result); - - return result; -} - - -static void -trace_screen_tex_transfer_destroy(struct pipe_transfer *_transfer) -{ - struct trace_screen *tr_scr = trace_screen(_transfer->texture->screen); - struct trace_transfer *tr_trans = trace_transfer(_transfer); - struct pipe_screen *screen = tr_scr->screen; - struct pipe_transfer *transfer = tr_trans->transfer; - - trace_dump_call_begin("pipe_screen", "tex_transfer_destroy"); - - trace_dump_arg(ptr, screen); - trace_dump_arg(ptr, transfer); - trace_dump_call_end(); - - trace_transfer_destroy(tr_trans); -} - - -static void * -trace_screen_transfer_map(struct pipe_screen *_screen, - struct pipe_transfer *_transfer) -{ - struct trace_screen *tr_scr = trace_screen(_screen); - struct trace_transfer *tr_trans = trace_transfer(_transfer); - struct pipe_screen *screen = tr_scr->screen; - struct pipe_transfer *transfer = tr_trans->transfer; - void *map; - - map = screen->transfer_map(screen, transfer); - if(map) { - if(transfer->usage & PIPE_TRANSFER_WRITE) { - assert(!tr_trans->map); - tr_trans->map = map; - } - } - - return map; -} - - -static void -trace_screen_transfer_unmap(struct pipe_screen *_screen, - struct pipe_transfer *_transfer) -{ - struct trace_screen *tr_scr = trace_screen(_screen); - struct trace_transfer *tr_trans = trace_transfer(_transfer); - struct pipe_screen *screen = tr_scr->screen; - struct pipe_transfer *transfer = tr_trans->transfer; - - if(tr_trans->map) { - size_t size = util_format_get_nblocksy(transfer->texture->format, transfer->height) * transfer->stride; - - trace_dump_call_begin("pipe_screen", "transfer_write"); - - trace_dump_arg(ptr, screen); - - trace_dump_arg(ptr, transfer); - - trace_dump_arg_begin("stride"); - trace_dump_uint(transfer->stride); - trace_dump_arg_end(); - - trace_dump_arg_begin("data"); - trace_dump_bytes(tr_trans->map, size); - trace_dump_arg_end(); - - trace_dump_arg_begin("size"); - trace_dump_uint(size); - trace_dump_arg_end(); - - trace_dump_call_end(); - - tr_trans->map = NULL; - } - - screen->transfer_unmap(screen, transfer); -} /******************************************************************** @@ -484,92 +360,16 @@ trace_screen_transfer_unmap(struct pipe_screen *_screen, */ -static struct pipe_buffer * -trace_screen_surface_buffer_create(struct pipe_screen *_screen, - unsigned width, unsigned height, - enum pipe_format format, - unsigned usage, - unsigned tex_usage, - unsigned *pstride) -{ - struct trace_screen *tr_scr = trace_screen(_screen); - struct pipe_screen *screen = tr_scr->screen; - unsigned stride; - struct pipe_buffer *result; - - trace_dump_call_begin("pipe_screen", "surface_buffer_create"); - - trace_dump_arg(ptr, screen); - trace_dump_arg(uint, width); - trace_dump_arg(uint, height); - trace_dump_arg(format, format); - trace_dump_arg(uint, usage); - trace_dump_arg(uint, tex_usage); - - result = screen->surface_buffer_create(screen, - width, height, - format, - usage, - tex_usage, - pstride); - - stride = *pstride; - - trace_dump_arg(uint, stride); - - trace_dump_ret(ptr, result); - - trace_dump_call_end(); - - return trace_buffer_create(tr_scr, result); -} - -static struct pipe_buffer * -trace_screen_buffer_create(struct pipe_screen *_screen, - unsigned alignment, - unsigned usage, - unsigned size) -{ - struct trace_screen *tr_scr = trace_screen(_screen); - struct pipe_screen *screen = tr_scr->screen; - struct pipe_buffer *result; - - trace_dump_call_begin("pipe_screen", "buffer_create"); - - trace_dump_arg(ptr, screen); - trace_dump_arg(uint, alignment); - trace_dump_arg(uint, usage); - trace_dump_arg(uint, size); - - result = screen->buffer_create(screen, alignment, usage, size); - - trace_dump_ret(ptr, result); - - trace_dump_call_end(); - - /* Zero the buffer to avoid dumping uninitialized memory */ - if(result->usage & PIPE_BUFFER_USAGE_CPU_WRITE) { - void *map; - map = pipe_buffer_map(screen, result, PIPE_BUFFER_USAGE_CPU_WRITE); - if(map) { - memset(map, 0, result->size); - screen->buffer_unmap(screen, result); - } - } - - return trace_buffer_create(tr_scr, result); -} - - -static struct pipe_buffer * +static struct pipe_resource * trace_screen_user_buffer_create(struct pipe_screen *_screen, void *data, - unsigned size) + unsigned size, + unsigned usage) { struct trace_screen *tr_scr = trace_screen(_screen); struct pipe_screen *screen = tr_scr->screen; - struct pipe_buffer *result; + struct pipe_resource *result; trace_dump_call_begin("pipe_screen", "user_buffer_create"); @@ -578,189 +378,23 @@ trace_screen_user_buffer_create(struct pipe_screen *_screen, trace_dump_bytes(data, size); trace_dump_arg_end(); trace_dump_arg(uint, size); + trace_dump_arg(uint, usage); - result = screen->user_buffer_create(screen, data, size); + result = screen->user_buffer_create(screen, data, size, usage); trace_dump_ret(ptr, result); trace_dump_call_end(); if(result) { - assert(!(result->usage & TRACE_BUFFER_USAGE_USER)); - result->usage |= TRACE_BUFFER_USAGE_USER; - } - - return trace_buffer_create(tr_scr, result); -} - - -/** - * This function is used to track if data has been changed on a user buffer - * without map/unmap being called. - */ -void -trace_screen_user_buffer_update(struct pipe_screen *_screen, - struct pipe_buffer *_buffer) -{ -#if 0 - struct trace_screen *tr_scr = trace_screen(_screen); - struct pipe_screen *screen = tr_scr->screen; - const void *map; - - if(buffer && buffer->usage & TRACE_BUFFER_USAGE_USER) { - map = screen->buffer_map(screen, buffer, PIPE_BUFFER_USAGE_CPU_READ); - if(map) { - trace_dump_call_begin("pipe_winsys", "buffer_write"); - - trace_dump_arg(ptr, screen); - - trace_dump_arg(ptr, buffer); - - trace_dump_arg_begin("data"); - trace_dump_bytes(map, buffer->size); - trace_dump_arg_end(); - - trace_dump_arg_begin("size"); - trace_dump_uint(buffer->size); - trace_dump_arg_end(); - - trace_dump_call_end(); - - screen->buffer_unmap(screen, buffer); - } - } -#endif -} - - -static void * -trace_screen_buffer_map(struct pipe_screen *_screen, - struct pipe_buffer *_buffer, - unsigned usage) -{ - struct trace_screen *tr_scr = trace_screen(_screen); - struct trace_buffer *tr_buf = trace_buffer(_buffer); - struct pipe_screen *screen = tr_scr->screen; - struct pipe_buffer *buffer = tr_buf->buffer; - void *map; - - assert(screen->buffer_map); - map = screen->buffer_map(screen, buffer, usage); - if(map) { - if(usage & PIPE_BUFFER_USAGE_CPU_WRITE) { - tr_buf->map = map; - } - } - - return map; -} - - -static void * -trace_screen_buffer_map_range(struct pipe_screen *_screen, - struct pipe_buffer *_buffer, - unsigned offset, - unsigned length, - unsigned usage) -{ - struct trace_screen *tr_scr = trace_screen(_screen); - struct trace_buffer *tr_buf = trace_buffer(_buffer); - struct pipe_screen *screen = tr_scr->screen; - struct pipe_buffer *buffer = tr_buf->buffer; - void *map; - - assert(screen->buffer_map_range); - map = screen->buffer_map_range(screen, buffer, offset, length, usage); - if(map) { - if(usage & PIPE_BUFFER_USAGE_CPU_WRITE) { - tr_buf->map = map; - } + assert(!(result->flags & TRACE_FLAG_USER_BUFFER)); + result->flags |= TRACE_FLAG_USER_BUFFER; } - return map; + return trace_resource_create(tr_scr, result); } -static void -buffer_write(struct pipe_screen *screen, - struct pipe_buffer *buffer, - unsigned offset, - const char *map, - unsigned size) -{ - assert(map); - - trace_dump_call_begin("pipe_screen", "buffer_write"); - - trace_dump_arg(ptr, screen); - - trace_dump_arg(ptr, buffer); - - trace_dump_arg(uint, offset); - - trace_dump_arg_begin("data"); - trace_dump_bytes(map + offset, size); - trace_dump_arg_end(); - - trace_dump_arg(uint, size); - - trace_dump_call_end(); - -} - - -static void -trace_screen_buffer_flush_mapped_range(struct pipe_screen *_screen, - struct pipe_buffer *_buffer, - unsigned offset, - unsigned length) -{ - struct trace_screen *tr_scr = trace_screen(_screen); - struct trace_buffer *tr_buf = trace_buffer(_buffer); - struct pipe_screen *screen = tr_scr->screen; - struct pipe_buffer *buffer = tr_buf->buffer; - - assert(tr_buf->map); - buffer_write(screen, buffer, offset, tr_buf->map, length); - tr_buf->range_flushed = TRUE; - screen->buffer_flush_mapped_range(screen, buffer, offset, length); -} - - -static void -trace_screen_buffer_unmap(struct pipe_screen *_screen, - struct pipe_buffer *_buffer) -{ - struct trace_screen *tr_scr = trace_screen(_screen); - struct trace_buffer *tr_buf = trace_buffer(_buffer); - struct pipe_screen *screen = tr_scr->screen; - struct pipe_buffer *buffer = tr_buf->buffer; - - if (tr_buf->map && !tr_buf->range_flushed) - buffer_write(screen, buffer, 0, tr_buf->map, buffer->size); - tr_buf->map = NULL; - tr_buf->range_flushed = FALSE; - screen->buffer_unmap(screen, buffer); -} - - -static void -trace_screen_buffer_destroy(struct pipe_buffer *_buffer) -{ - struct trace_screen *tr_scr = trace_screen(_buffer->screen); - struct trace_buffer *tr_buf = trace_buffer(_buffer); - struct pipe_screen *screen = tr_scr->screen; - struct pipe_buffer *buffer = tr_buf->buffer; - - trace_dump_call_begin("pipe_screen", "buffer_destroy"); - - trace_dump_arg(ptr, screen); - trace_dump_arg(ptr, buffer); - - trace_dump_call_end(); - - trace_buffer_destroy(tr_scr, _buffer); -} /******************************************************************** @@ -930,32 +564,22 @@ trace_screen_create(struct pipe_screen *screen) tr_scr->base.is_format_supported = trace_screen_is_format_supported; assert(screen->context_create); tr_scr->base.context_create = trace_screen_context_create; - tr_scr->base.texture_create = trace_screen_texture_create; - tr_scr->base.texture_blanket = trace_screen_texture_blanket; - tr_scr->base.texture_destroy = trace_screen_texture_destroy; + tr_scr->base.resource_create = trace_screen_resource_create; + tr_scr->base.resource_from_handle = trace_screen_resource_from_handle; + tr_scr->base.resource_get_handle = trace_screen_resource_get_handle; + tr_scr->base.resource_destroy = trace_screen_resource_destroy; tr_scr->base.get_tex_surface = trace_screen_get_tex_surface; tr_scr->base.tex_surface_destroy = trace_screen_tex_surface_destroy; - tr_scr->base.get_tex_transfer = trace_screen_get_tex_transfer; - tr_scr->base.tex_transfer_destroy = trace_screen_tex_transfer_destroy; - tr_scr->base.transfer_map = trace_screen_transfer_map; - tr_scr->base.transfer_unmap = trace_screen_transfer_unmap; - tr_scr->base.buffer_create = trace_screen_buffer_create; tr_scr->base.user_buffer_create = trace_screen_user_buffer_create; - tr_scr->base.surface_buffer_create = trace_screen_surface_buffer_create; - if (screen->buffer_map) - tr_scr->base.buffer_map = trace_screen_buffer_map; - if (screen->buffer_map_range) - tr_scr->base.buffer_map_range = trace_screen_buffer_map_range; - if (screen->buffer_flush_mapped_range) - tr_scr->base.buffer_flush_mapped_range = trace_screen_buffer_flush_mapped_range; - if (screen->buffer_unmap) - tr_scr->base.buffer_unmap = trace_screen_buffer_unmap; - tr_scr->base.buffer_destroy = trace_screen_buffer_destroy; tr_scr->base.fence_reference = trace_screen_fence_reference; tr_scr->base.fence_signalled = trace_screen_fence_signalled; tr_scr->base.fence_finish = trace_screen_fence_finish; tr_scr->base.flush_frontbuffer = trace_screen_flush_frontbuffer; + tr_scr->screen = screen; + tr_scr->private_context = screen->context_create(screen, NULL); + if (tr_scr->private_context == NULL) + goto error3; trace_dump_ret(ptr, screen); trace_dump_call_end(); @@ -965,10 +589,8 @@ trace_screen_create(struct pipe_screen *screen) return &tr_scr->base; -#if 0 error3: FREE(tr_scr); -#endif error2: trace_dump_ret(ptr, screen); trace_dump_call_end(); diff --git a/src/gallium/drivers/trace/tr_screen.h b/src/gallium/drivers/trace/tr_screen.h index fe5a0fa1909..05ff9ef61f1 100644 --- a/src/gallium/drivers/trace/tr_screen.h +++ b/src/gallium/drivers/trace/tr_screen.h @@ -48,7 +48,7 @@ struct tr_list { * without mapping/unmapping. This flag marks user buffers, so that their * contents can be dumpped before being used by the pipe context. */ -#define TRACE_BUFFER_USAGE_USER (1 << 31) +#define TRACE_FLAG_USER_BUFFER (1 << 31) struct trace_screen @@ -56,6 +56,7 @@ struct trace_screen struct pipe_screen base; struct pipe_screen *screen; + struct pipe_context *private_context; /* remote debugger */ struct trace_rbug *rbug; @@ -99,13 +100,6 @@ trace_enabled(void); struct trace_screen * trace_screen(struct pipe_screen *screen); -struct pipe_screen * -trace_screen_create(struct pipe_screen *screen); - -void -trace_screen_user_buffer_update(struct pipe_screen *screen, - struct pipe_buffer *buffer); - #define trace_screen_add_to_list(tr_scr, name, obj) \ do { \ pipe_mutex_lock(tr_scr->list_mutex); \ diff --git a/src/gallium/drivers/trace/tr_texture.c b/src/gallium/drivers/trace/tr_texture.c index 5321d68ec0c..1132dc92724 100644 --- a/src/gallium/drivers/trace/tr_texture.c +++ b/src/gallium/drivers/trace/tr_texture.c @@ -31,54 +31,54 @@ #include "util/u_simple_list.h" #include "tr_screen.h" +#include "tr_context.h" #include "tr_texture.h" -struct pipe_texture * -trace_texture_create(struct trace_screen *tr_scr, - struct pipe_texture *texture) +struct pipe_resource * +trace_resource_create(struct trace_screen *tr_scr, + struct pipe_resource *texture) { - struct trace_texture *tr_tex; + struct trace_resource *tr_tex; if(!texture) goto error; assert(texture->screen == tr_scr->screen); - tr_tex = CALLOC_STRUCT(trace_texture); + tr_tex = CALLOC_STRUCT(trace_resource); if(!tr_tex) goto error; - memcpy(&tr_tex->base, texture, sizeof(struct pipe_texture)); + memcpy(&tr_tex->base, texture, sizeof(struct pipe_resource)); pipe_reference_init(&tr_tex->base.reference, 1); tr_tex->base.screen = &tr_scr->base; - tr_tex->texture = texture; + tr_tex->resource = texture; trace_screen_add_to_list(tr_scr, textures, tr_tex); return &tr_tex->base; error: - pipe_texture_reference(&texture, NULL); + pipe_resource_reference(&texture, NULL); return NULL; } void -trace_texture_destroy(struct trace_texture *tr_tex) +trace_resource_destroy(struct trace_screen *tr_scr, + struct trace_resource *tr_tex) { - struct trace_screen *tr_scr = trace_screen(tr_tex->base.screen); - trace_screen_remove_from_list(tr_scr, textures, tr_tex); - pipe_texture_reference(&tr_tex->texture, NULL); + pipe_resource_reference(&tr_tex->resource, NULL); FREE(tr_tex); } struct pipe_surface * -trace_surface_create(struct trace_texture *tr_tex, +trace_surface_create(struct trace_resource *tr_tex, struct pipe_surface *surface) { struct trace_screen *tr_scr = trace_screen(tr_tex->base.screen); @@ -87,7 +87,7 @@ trace_surface_create(struct trace_texture *tr_tex, if(!surface) goto error; - assert(surface->texture == tr_tex->texture); + assert(surface->texture == tr_tex->resource); tr_surf = CALLOC_STRUCT(trace_surface); if(!tr_surf) @@ -97,7 +97,7 @@ trace_surface_create(struct trace_texture *tr_tex, pipe_reference_init(&tr_surf->base.reference, 1); tr_surf->base.texture = NULL; - pipe_texture_reference(&tr_surf->base.texture, &tr_tex->base); + pipe_resource_reference(&tr_surf->base.texture, &tr_tex->base); tr_surf->surface = surface; trace_screen_add_to_list(tr_scr, surfaces, tr_surf); @@ -117,15 +117,16 @@ trace_surface_destroy(struct trace_surface *tr_surf) trace_screen_remove_from_list(tr_scr, surfaces, tr_surf); - pipe_texture_reference(&tr_surf->base.texture, NULL); + pipe_resource_reference(&tr_surf->base.texture, NULL); pipe_surface_reference(&tr_surf->surface, NULL); FREE(tr_surf); } struct pipe_transfer * -trace_transfer_create(struct trace_texture *tr_tex, - struct pipe_transfer *transfer) +trace_transfer_create(struct trace_context *tr_ctx, + struct trace_resource *tr_tex, + struct pipe_transfer *transfer) { struct trace_screen *tr_scr = trace_screen(tr_tex->base.screen); struct trace_transfer *tr_trans; @@ -133,7 +134,7 @@ trace_transfer_create(struct trace_texture *tr_tex, if(!transfer) goto error; - assert(transfer->texture == tr_tex->texture); + assert(transfer->resource == tr_tex->resource); tr_trans = CALLOC_STRUCT(trace_transfer); if(!tr_trans) @@ -141,31 +142,34 @@ trace_transfer_create(struct trace_texture *tr_tex, memcpy(&tr_trans->base, transfer, sizeof(struct pipe_transfer)); - tr_trans->base.texture = NULL; - pipe_texture_reference(&tr_trans->base.texture, &tr_tex->base); + tr_trans->base.resource = NULL; tr_trans->transfer = transfer; - assert(tr_trans->base.texture == &tr_tex->base); + + pipe_resource_reference(&tr_trans->base.resource, &tr_tex->base); + assert(tr_trans->base.resource == &tr_tex->base); trace_screen_add_to_list(tr_scr, transfers, tr_trans); return &tr_trans->base; error: - transfer->texture->screen->tex_transfer_destroy(transfer); + tr_ctx->pipe->transfer_destroy(tr_ctx->pipe, transfer); return NULL; } void -trace_transfer_destroy(struct trace_transfer *tr_trans) +trace_transfer_destroy(struct trace_context *tr_context, + struct trace_transfer *tr_trans) { - struct trace_screen *tr_scr = trace_screen(tr_trans->base.texture->screen); - struct pipe_screen *screen = tr_trans->transfer->texture->screen; + struct trace_screen *tr_scr = trace_screen(tr_context->base.screen); + struct pipe_context *context = tr_context->pipe; + struct pipe_transfer *transfer = tr_trans->transfer; trace_screen_remove_from_list(tr_scr, transfers, tr_trans); - pipe_texture_reference(&tr_trans->base.texture, NULL); - screen->tex_transfer_destroy(tr_trans->transfer); + pipe_resource_reference(&tr_trans->base.resource, NULL); + context->transfer_destroy(context, transfer); FREE(tr_trans); } diff --git a/src/gallium/drivers/trace/tr_texture.h b/src/gallium/drivers/trace/tr_texture.h index 395e523e73a..6513995d505 100644 --- a/src/gallium/drivers/trace/tr_texture.h +++ b/src/gallium/drivers/trace/tr_texture.h @@ -34,12 +34,13 @@ #include "tr_screen.h" +struct trace_context; -struct trace_texture +struct trace_resource { - struct pipe_texture base; + struct pipe_resource base; - struct pipe_texture *texture; + struct pipe_resource *resource; struct tr_list list; }; @@ -55,11 +56,20 @@ struct trace_surface }; +struct trace_sampler_view +{ + struct pipe_sampler_view base; + + struct pipe_sampler_view *sampler_view; +}; + + struct trace_transfer { struct pipe_transfer base; struct pipe_transfer *transfer; + struct pipe_context *pipe; struct tr_list list; @@ -67,13 +77,13 @@ struct trace_transfer }; -static INLINE struct trace_texture * -trace_texture(struct pipe_texture *texture) +static INLINE struct trace_resource * +trace_resource(struct pipe_resource *texture) { if(!texture) return NULL; (void)trace_screen(texture->screen); - return (struct trace_texture *)texture; + return (struct trace_resource *)texture; } @@ -82,41 +92,53 @@ trace_surface(struct pipe_surface *surface) { if(!surface) return NULL; - (void)trace_texture(surface->texture); + (void)trace_resource(surface->texture); return (struct trace_surface *)surface; } +static INLINE struct trace_sampler_view * +trace_sampler_view(struct pipe_sampler_view *sampler_view) +{ + if (!sampler_view) + return NULL; + return (struct trace_sampler_view *)sampler_view; +} + + static INLINE struct trace_transfer * trace_transfer(struct pipe_transfer *transfer) { if(!transfer) return NULL; - (void)trace_texture(transfer->texture); + (void)trace_resource(transfer->resource); return (struct trace_transfer *)transfer; } -struct pipe_texture * -trace_texture_create(struct trace_screen *tr_scr, - struct pipe_texture *texture); +struct pipe_resource * +trace_resource_create(struct trace_screen *tr_scr, + struct pipe_resource *texture); void -trace_texture_destroy(struct trace_texture *tr_tex); +trace_resource_destroy(struct trace_screen *tr_scr, + struct trace_resource *tr_tex); struct pipe_surface * -trace_surface_create(struct trace_texture *tr_tex, +trace_surface_create(struct trace_resource *tr_tex, struct pipe_surface *surface); void trace_surface_destroy(struct trace_surface *tr_surf); struct pipe_transfer * -trace_transfer_create(struct trace_texture *tr_tex, - struct pipe_transfer *transfer); +trace_transfer_create(struct trace_context *tr_ctx, + struct trace_resource *tr_tex, + struct pipe_transfer *transfer); void -trace_transfer_destroy(struct trace_transfer *tr_trans); +trace_transfer_destroy(struct trace_context *tr_ctx, + struct trace_transfer *tr_trans); #endif /* TR_TEXTURE_H_ */ |