summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers
diff options
context:
space:
mode:
authorMarek Olšák <[email protected]>2017-06-07 00:58:46 +0200
committerMarek Olšák <[email protected]>2017-06-08 23:29:07 +0200
commitc6451b12096fb4258051b9b38c50ffb0a86df173 (patch)
tree191665aa155b9bd7135aa05477130a750b686f93 /src/gallium/drivers
parentd8a577d96e91493fb281b460c31bac27bcce4599 (diff)
radeonsi: rename depth decompress functions
Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/radeonsi/si_blit.c31
1 files changed, 15 insertions, 16 deletions
diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c
index 20b08b6afb1..e39ba62e0b8 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -310,11 +310,11 @@ si_blit_decompress_zs_in_place(struct si_context *sctx,
}
static void
-si_flush_depth_texture(struct si_context *sctx,
- struct r600_texture *tex,
- unsigned required_planes,
- unsigned first_level, unsigned last_level,
- unsigned first_layer, unsigned last_layer)
+si_decompress_depth(struct si_context *sctx,
+ struct r600_texture *tex,
+ unsigned required_planes,
+ unsigned first_level, unsigned last_level,
+ unsigned first_layer, unsigned last_layer)
{
unsigned inplace_planes = 0;
unsigned copy_planes = 0;
@@ -391,8 +391,8 @@ si_flush_depth_texture(struct si_context *sctx,
}
static void
-si_flush_depth_textures(struct si_context *sctx,
- struct si_textures_info *textures)
+si_decompress_sampler_depth_textures(struct si_context *sctx,
+ struct si_textures_info *textures)
{
unsigned i;
unsigned mask = textures->needs_depth_decompress_mask;
@@ -411,11 +411,10 @@ si_flush_depth_textures(struct si_context *sctx,
tex = (struct r600_texture *)view->texture;
assert(tex->db_compatible);
- si_flush_depth_texture(
- sctx, tex,
- sview->is_stencil_sampler ? PIPE_MASK_S : PIPE_MASK_Z,
- view->u.tex.first_level, view->u.tex.last_level,
- 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
+ si_decompress_depth(sctx, tex,
+ sview->is_stencil_sampler ? PIPE_MASK_S : PIPE_MASK_Z,
+ view->u.tex.first_level, view->u.tex.last_level,
+ 0, util_max_layer(&tex->resource.b.b, view->u.tex.first_level));
}
}
@@ -665,7 +664,7 @@ static void si_decompress_textures(struct si_context *sctx, unsigned shader_mask
unsigned i = u_bit_scan(&mask);
if (sctx->samplers[i].needs_depth_decompress_mask) {
- si_flush_depth_textures(sctx, &sctx->samplers[i]);
+ si_decompress_sampler_depth_textures(sctx, &sctx->samplers[i]);
}
if (sctx->samplers[i].needs_color_decompress_mask) {
si_decompress_sampler_color_textures(sctx, &sctx->samplers[i]);
@@ -840,9 +839,9 @@ static void si_decompress_subresource(struct pipe_context *ctx,
if (!(rtex->surface.flags & RADEON_SURF_SBUFFER))
planes &= ~PIPE_MASK_S;
- si_flush_depth_texture(sctx, rtex, planes,
- level, level,
- first_layer, last_layer);
+ si_decompress_depth(sctx, rtex, planes,
+ level, level,
+ first_layer, last_layer);
} else if (rtex->fmask.size || rtex->cmask.size || rtex->dcc_offset) {
si_blit_decompress_color(ctx, rtex, level, level,
first_layer, last_layer, false);