diff options
| author | Vadim Girlin <[email protected]> | 2012-05-07 17:38:01 +0400 |
|---|---|---|
| committer | Vadim Girlin <[email protected]> | 2012-05-08 01:18:22 +0400 |
| commit | e3e7ae732c903235a57760e10de542f128c1fe62 (patch) | |
| tree | 9e957f132d2a123ae4e0d731ef3ca91491cb2ce1 /src/gallium/drivers | |
| parent | 757f471ba99446a942107fd9dba6bfbfe1652c14 (diff) | |
radeon/llvm: fix live-in handling for inputs
Set the input registers as live-in for entry basic block.
Signed-off-by: Vadim Girlin <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
| -rw-r--r-- | src/gallium/drivers/radeon/AMDGPUUtil.cpp | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/radeon/R600LowerShaderInstructions.cpp | 4 |
2 files changed, 3 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeon/AMDGPUUtil.cpp b/src/gallium/drivers/radeon/AMDGPUUtil.cpp index 6fb01b687f3..663a77f2645 100644 --- a/src/gallium/drivers/radeon/AMDGPUUtil.cpp +++ b/src/gallium/drivers/radeon/AMDGPUUtil.cpp @@ -118,6 +118,7 @@ void AMDGPU::utilAddLiveIn(MachineFunction * MF, MachineRegisterInfo & MRI, { if (!MRI.isLiveIn(physReg)) { MRI.addLiveIn(physReg, virtReg); + MF->front().addLiveIn(physReg); BuildMI(MF->front(), MF->front().begin(), DebugLoc(), TII->get(TargetOpcode::COPY), virtReg) .addReg(physReg); diff --git a/src/gallium/drivers/radeon/R600LowerShaderInstructions.cpp b/src/gallium/drivers/radeon/R600LowerShaderInstructions.cpp index 394ee7006ce..742b50fb394 100644 --- a/src/gallium/drivers/radeon/R600LowerShaderInstructions.cpp +++ b/src/gallium/drivers/radeon/R600LowerShaderInstructions.cpp @@ -13,6 +13,7 @@ #include "AMDGPU.h" #include "AMDGPULowerShaderInstructions.h" +#include "AMDGPUUtil.h" #include "AMDIL.h" #include "AMDILInstrInfo.h" #include "llvm/CodeGen/MachineFunctionPass.h" @@ -117,8 +118,7 @@ void R600LowerShaderInstructionsPass::lowerLOAD_INPUT(MachineInstr &MI) unsigned newRegister = inputClass->getRegister(inputIndex); unsigned dstReg = dst.getReg(); - preloadRegister(MI.getParent()->getParent(), TM.getInstrInfo(), newRegister, - dstReg); + AMDGPU::utilAddLiveIn(MI.getParent()->getParent(), *MRI, TM.getInstrInfo(), newRegister, dstReg); } bool R600LowerShaderInstructionsPass::lowerSTORE_OUTPUT(MachineInstr &MI, |