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authorTom Stellard <[email protected]>2012-06-06 13:24:48 -0400
committerTom Stellard <[email protected]>2012-06-06 20:51:00 -0400
commit5f3f63b76d36b752d7d98c04ab044b5a961b5593 (patch)
tree039dd0a2daac157e4747434da78f55369c140e60 /src/gallium/drivers
parent0c9f5f22d5cf3cad01ee3685116011ff7ff67140 (diff)
radeon/llvm: Emulate RECIP_UINT instruction on Cayman
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/radeon/R600CodeEmitter.cpp2
-rw-r--r--src/gallium/drivers/radeon/R600Instructions.td15
2 files changed, 13 insertions, 4 deletions
diff --git a/src/gallium/drivers/radeon/R600CodeEmitter.cpp b/src/gallium/drivers/radeon/R600CodeEmitter.cpp
index 3b7ca2c2398..3042f38af8a 100644
--- a/src/gallium/drivers/radeon/R600CodeEmitter.cpp
+++ b/src/gallium/drivers/radeon/R600CodeEmitter.cpp
@@ -172,6 +172,8 @@ bool R600CodeEmitter::runOnMachineFunction(MachineFunction &MF) {
emitFCInstr(MI);
} else if (isReduction || isVector || isCube) {
isLast = false;
+ // XXX: On Cayman, some (all?) of the vector instructions only need
+ // to fill the first three slots.
for (currentElement = 0; currentElement < 4; currentElement++) {
isLast = (currentElement == 3);
emitALUInstr(MI);
diff --git a/src/gallium/drivers/radeon/R600Instructions.td b/src/gallium/drivers/radeon/R600Instructions.td
index 617961a20c0..794eaef6ff6 100644
--- a/src/gallium/drivers/radeon/R600Instructions.td
+++ b/src/gallium/drivers/radeon/R600Instructions.td
@@ -795,10 +795,13 @@ class TRIG_HELPER_r700 <InstR600 trig_inst>: Pat <
let Predicates = [isEG] in {
+def RECIP_IEEE_eg : RECIP_IEEE_Common<0x86>;
+
def MULLO_INT_eg : MULLO_INT_Common<0x8F>;
def MULHI_INT_eg : MULHI_INT_Common<0x90>;
def MULLO_UINT_eg : MULLO_UINT_Common<0x91>;
def MULHI_UINT_eg : MULHI_UINT_Common<0x92>;
+def RECIP_UINT_eg : RECIP_UINT_Common<0x94>;
} // End Predicates = [isEG]
@@ -825,12 +828,10 @@ class TRIG_eg <InstR600 trig, Intrinsic intr> : Pat<
def LOG_CLAMPED_eg : LOG_CLAMPED_Common<0x82>;
def LOG_IEEE_eg : LOG_IEEE_Common<0x83>;
def RECIP_CLAMPED_eg : RECIP_CLAMPED_Common<0x84>;
- def RECIP_IEEE_eg : RECIP_IEEE_Common<0x86>;
def RECIPSQRT_CLAMPED_eg : RECIPSQRT_CLAMPED_Common<0x87>;
def RECIPSQRT_IEEE_eg : RECIPSQRT_IEEE_Common<0x89>;
def SIN_eg : SIN_Common<0x8D>;
def COS_eg : COS_Common<0x8E>;
- def RECIP_UINT_eg : RECIP_UINT_Common<0x94>;
def DOT4_eg : DOT4_Common<0xBE>;
def CUBE_eg : CUBE_Common<0xC0>;
@@ -909,6 +910,8 @@ let Predicates = [isCayman] in {
let isVector = 1 in {
+def RECIP_IEEE_cm : RECIP_IEEE_Common<0x86>;
+
def MULLO_INT_cm : MULLO_INT_Common<0x8F>;
def MULHI_INT_cm : MULHI_INT_Common<0x90>;
def MULLO_UINT_cm : MULLO_UINT_Common<0x91>;
@@ -916,8 +919,12 @@ def MULHI_UINT_cm : MULHI_UINT_Common<0x92>;
} // End isVector = 1
-/* XXX: I'm not sure if this opcode is correct. */
-def RECIP_UINT_cm : RECIP_UINT_Common<0x77>;
+// RECIP_UINT emulation for Cayman
+def : Pat <
+ (AMDGPUurecip R600_Reg32:$src0),
+ (FLT_TO_UINT_eg (MUL_IEEE (RECIP_IEEE_cm (UINT_TO_FLT_eg R600_Reg32:$src0)),
+ (MOV_IMM_I32 (i32 ALU_LITERAL_X), 0x4f800000)))
+>;
} // End isCayman