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authorMarek Olšák <[email protected]>2013-08-18 03:05:34 +0200
committerMarek Olšák <[email protected]>2013-09-13 01:04:44 +0200
commite4c5d3ee27e125a20b4899b0c95f517d4e2f07e9 (patch)
tree3946dc07ac60ffb73d66580fde421dab46d7b771 /src/gallium/drivers
parent9eb3b9dc2bd459af41a277ba8d4661a6d0b5726d (diff)
radeonsi: handle rasterizer_discard and set GS_OUT_PRIM_TYPE
Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/radeonsi/si_state.c1
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c28
-rw-r--r--src/gallium/drivers/radeonsi/sid.h3
3 files changed, 31 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index f409af41947..650db4fc101 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -552,6 +552,7 @@ static void *si_create_rs_state(struct pipe_context *ctx,
S_028810_PS_UCP_MODE(3) |
S_028810_ZCLIP_NEAR_DISABLE(!state->depth_clip) |
S_028810_ZCLIP_FAR_DISABLE(!state->depth_clip) |
+ S_028810_DX_RASTERIZATION_KILL(state->rasterizer_discard) |
S_028810_DX_LINEAR_ATTR_CLIP_ENA(1);
clip_rule = state->scissor ? 0xAAAA : 0xFFFF;
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 581d2892b0e..3529660645f 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -273,12 +273,36 @@ static unsigned si_conv_pipe_prim(unsigned pprim)
return result;
}
+static unsigned r600_conv_prim_to_gs_out(unsigned mode)
+{
+ static const int prim_conv[] = {
+ [PIPE_PRIM_POINTS] = V_028A6C_OUTPRIM_TYPE_POINTLIST,
+ [PIPE_PRIM_LINES] = V_028A6C_OUTPRIM_TYPE_LINESTRIP,
+ [PIPE_PRIM_LINE_LOOP] = V_028A6C_OUTPRIM_TYPE_LINESTRIP,
+ [PIPE_PRIM_LINE_STRIP] = V_028A6C_OUTPRIM_TYPE_LINESTRIP,
+ [PIPE_PRIM_TRIANGLES] = V_028A6C_OUTPRIM_TYPE_TRISTRIP,
+ [PIPE_PRIM_TRIANGLE_STRIP] = V_028A6C_OUTPRIM_TYPE_TRISTRIP,
+ [PIPE_PRIM_TRIANGLE_FAN] = V_028A6C_OUTPRIM_TYPE_TRISTRIP,
+ [PIPE_PRIM_QUADS] = V_028A6C_OUTPRIM_TYPE_TRISTRIP,
+ [PIPE_PRIM_QUAD_STRIP] = V_028A6C_OUTPRIM_TYPE_TRISTRIP,
+ [PIPE_PRIM_POLYGON] = V_028A6C_OUTPRIM_TYPE_TRISTRIP,
+ [PIPE_PRIM_LINES_ADJACENCY] = V_028A6C_OUTPRIM_TYPE_LINESTRIP,
+ [PIPE_PRIM_LINE_STRIP_ADJACENCY] = V_028A6C_OUTPRIM_TYPE_LINESTRIP,
+ [PIPE_PRIM_TRIANGLES_ADJACENCY] = V_028A6C_OUTPRIM_TYPE_TRISTRIP,
+ [PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY] = V_028A6C_OUTPRIM_TYPE_TRISTRIP
+ };
+ assert(mode < Elements(prim_conv));
+
+ return prim_conv[mode];
+}
+
static bool si_update_draw_info_state(struct r600_context *rctx,
const struct pipe_draw_info *info)
{
struct si_pm4_state *pm4 = si_pm4_alloc_state(rctx);
struct si_shader *vs = &rctx->vs_shader->current->shader;
unsigned prim = si_conv_pipe_prim(info->mode);
+ unsigned gs_out_prim = r600_conv_prim_to_gs_out(info->mode);
unsigned ls_mask = 0;
if (pm4 == NULL)
@@ -291,8 +315,10 @@ static bool si_update_draw_info_state(struct r600_context *rctx,
if (rctx->b.chip_class >= CIK)
si_pm4_set_reg(pm4, R_030908_VGT_PRIMITIVE_TYPE, prim);
- else
+ else {
si_pm4_set_reg(pm4, R_008958_VGT_PRIMITIVE_TYPE, prim);
+ si_pm4_set_reg(pm4, R_028A6C_VGT_GS_OUT_PRIM_TYPE, gs_out_prim);
+ }
si_pm4_set_reg(pm4, R_028400_VGT_MAX_VTX_INDX, ~0);
si_pm4_set_reg(pm4, R_028404_VGT_MIN_VTX_INDX, 0);
si_pm4_set_reg(pm4, R_028408_VGT_INDX_OFFSET,
diff --git a/src/gallium/drivers/radeonsi/sid.h b/src/gallium/drivers/radeonsi/sid.h
index 7f3329ca024..c6688b37abc 100644
--- a/src/gallium/drivers/radeonsi/sid.h
+++ b/src/gallium/drivers/radeonsi/sid.h
@@ -7423,6 +7423,9 @@
#define S_028A6C_OUTPRIM_TYPE(x) (((x) & 0x3F) << 0)
#define G_028A6C_OUTPRIM_TYPE(x) (((x) >> 0) & 0x3F)
#define C_028A6C_OUTPRIM_TYPE 0xFFFFFFC0
+#define V_028A6C_OUTPRIM_TYPE_POINTLIST 0
+#define V_028A6C_OUTPRIM_TYPE_LINESTRIP 1
+#define V_028A6C_OUTPRIM_TYPE_TRISTRIP 2
#define S_028A6C_OUTPRIM_TYPE_1(x) (((x) & 0x3F) << 8)
#define G_028A6C_OUTPRIM_TYPE_1(x) (((x) >> 8) & 0x3F)
#define C_028A6C_OUTPRIM_TYPE_1 0xFFFFC0FF