diff options
author | Rob Clark <[email protected]> | 2014-12-06 12:39:19 -0500 |
---|---|---|
committer | Rob Clark <[email protected]> | 2014-12-09 18:02:45 -0500 |
commit | 5b38a1740beccf1f33b9dfe4d38f00a711b6b2e0 (patch) | |
tree | 833d04fdbca1a0aacf58cd6b9c2c2e620c6e94a6 /src/gallium/drivers | |
parent | 1e3a732603a4a4d5b3e7102cf0d7840f79ecf5c4 (diff) |
freedreno/a4xx: XA gpu hang at startup
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r-- | src/gallium/drivers/freedreno/a4xx/fd4_emit.c | 6 | ||||
-rw-r--r-- | src/gallium/drivers/freedreno/a4xx/fd4_gmem.c | 4 |
2 files changed, 9 insertions, 1 deletions
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c index 5b471584ee0..839d3e8e441 100644 --- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c +++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c @@ -689,5 +689,11 @@ fd4_emit_restore(struct fd_context *ctx) OUT_PKT0(ring, REG_A4XX_RB_RENDER_CONTROL3, 1); OUT_RING(ring, A4XX_RB_RENDER_CONTROL3_COMPONENT_ENABLE(0xf)); + OUT_PKT0(ring, REG_A4XX_GRAS_CLEAR_CNTL, 1); + OUT_RING(ring, A4XX_GRAS_CLEAR_CNTL_NOT_FASTCLEAR); + + OUT_PKT0(ring, REG_A4XX_GRAS_ALPHA_CONTROL, 1); + OUT_RING(ring, 0x0); + ctx->needs_rb_fbd = true; } diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c index 89ae260c855..8ad00393005 100644 --- a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c +++ b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c @@ -500,10 +500,12 @@ fd4_emit_tile_prep(struct fd_context *ctx, struct fd_tile *tile) OUT_RING(ring, 0x00000000); } + OUT_PKT0(ring, REG_A4XX_GRAS_DEPTH_CONTROL, 1); if (pfb->zsbuf) { - OUT_PKT0(ring, REG_A4XX_GRAS_DEPTH_CONTROL, 1); OUT_RING(ring, A4XX_GRAS_DEPTH_CONTROL_FORMAT( fd4_pipe2depth(pfb->zsbuf->format))); + } else { + OUT_RING(ring, A4XX_GRAS_DEPTH_CONTROL_FORMAT(DEPTH4_NONE)); } if (ctx->needs_rb_fbd) { |