Revert "intel/gen11+: Enable Hardware filtering of Semi-Pipelined State in WM"

This reverts commit 729de1488f49033bc181b8123af5658228a51bf1.

It turns out that, although the register is in the logical context,
it isn't whitelisted, so we can't actually write it from userspace
batch buffers.  The write just becomes a noop, which is why we saw
no performance changes.

I manually whitelisted it, and still observed no performance gains, but
it did regress KHR-GL46.texture_cube_map_array.color_depth_attachments
on the iris driver.  So we might need to fix something before enabling
this.  To prevent it randomly getting turned on should the kernel ever
whitelist this register, we revert the patch for now.

1 files changed, 0 insertions, 9 deletions

diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index 370dc52df38..113e2b4e9a5 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -824,15 +824,6 @@ iris_init_render_context(struct iris_screen *screen,
       iris_upload_slice_hashing_state(batch);
 #endif
 
-#if GEN_GEN >= 11
-      /* WA_220160979: Enable Hardware filtering of Semi-Pipelined State in WM */
-      iris_pack_state(GENX(COMMON_SLICE_CHICKEN4), &reg_val, reg) {
-         reg.EnableHardwareFilteringinWM = true;
-         reg.EnableHardwareFilteringinWMMask = true;
-      }
-      iris_emit_lri(batch, COMMON_SLICE_CHICKEN4, reg_val);
-#endif
-
    /* 3DSTATE_DRAWING_RECTANGLE is non-pipelined, so we want to avoid
     * changing it dynamically.  We set it to the maximum size here, and
     * instead include the render target dimensions in the viewport, so