diff options
author | Henri Verbeet <[email protected]> | 2011-04-25 13:28:55 +0200 |
---|---|---|
committer | Henri Verbeet <[email protected]> | 2011-04-25 14:06:21 +0200 |
commit | d7577ae3a6d6e174ab36d244f6bd4dedd63c3d1d (patch) | |
tree | c38b0da2a6f0e3d8cdeb736f0a454aec08a38e34 /src/gallium/drivers | |
parent | 32001c2244521a606ab210cd3a3fea3481131879 (diff) |
r600g: Cleanup the big endian support a bit.
In particular, make sure the code is at least compiled on little endian
systems.
Signed-off-by: Henri Verbeet <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r-- | src/gallium/drivers/r600/eg_state_inlines.h | 92 | ||||
-rw-r--r-- | src/gallium/drivers/r600/evergreen_state.c | 4 | ||||
-rw-r--r-- | src/gallium/drivers/r600/r600_asm.c | 30 | ||||
-rw-r--r-- | src/gallium/drivers/r600/r600_buffer.c | 37 | ||||
-rw-r--r-- | src/gallium/drivers/r600/r600_formats.h | 25 | ||||
-rw-r--r-- | src/gallium/drivers/r600/r600_pipe.h | 6 | ||||
-rw-r--r-- | src/gallium/drivers/r600/r600_shader.c | 20 | ||||
-rw-r--r-- | src/gallium/drivers/r600/r600_state.c | 4 | ||||
-rw-r--r-- | src/gallium/drivers/r600/r600_state_common.c | 13 | ||||
-rw-r--r-- | src/gallium/drivers/r600/r600_state_inlines.h | 92 | ||||
-rw-r--r-- | src/gallium/drivers/r600/r600d.h | 5 |
11 files changed, 166 insertions, 162 deletions
diff --git a/src/gallium/drivers/r600/eg_state_inlines.h b/src/gallium/drivers/r600/eg_state_inlines.h index 1ceea0bb486..1b4f75947b3 100644 --- a/src/gallium/drivers/r600/eg_state_inlines.h +++ b/src/gallium/drivers/r600/eg_state_inlines.h @@ -508,53 +508,53 @@ static INLINE uint32_t r600_translate_colorformat(enum pipe_format format) static INLINE uint32_t r600_colorformat_endian_swap(uint32_t colorformat) { -#ifdef PIPE_ARCH_BIG_ENDIAN - switch(colorformat) { - case V_028C70_COLOR_4_4: - return(ENDIAN_NONE); - - /* 8-bit buffers. */ - case V_028C70_COLOR_8: - return(ENDIAN_NONE); - - /* 16-bit buffers. */ - case V_028C70_COLOR_5_6_5: - case V_028C70_COLOR_1_5_5_5: - case V_028C70_COLOR_4_4_4_4: - case V_028C70_COLOR_16: - case V_028C70_COLOR_8_8: - return(ENDIAN_8IN16); - - /* 32-bit buffers. */ - case V_028C70_COLOR_8_8_8_8: - case V_028C70_COLOR_2_10_10_10: - case V_028C70_COLOR_8_24: - case V_028C70_COLOR_24_8: - case V_028C70_COLOR_32_FLOAT: - case V_028C70_COLOR_16_16_FLOAT: - case V_028C70_COLOR_16_16: - return(ENDIAN_8IN32); - - /* 64-bit buffers. */ - case V_028C70_COLOR_16_16_16_16: - case V_028C70_COLOR_16_16_16_16_FLOAT: - return(ENDIAN_8IN16); - - case V_028C70_COLOR_32_32_FLOAT: - case V_028C70_COLOR_32_32: - return(ENDIAN_8IN32); - - /* 128-bit buffers. */ - case V_028C70_COLOR_32_32_32_FLOAT: - case V_028C70_COLOR_32_32_32_32_FLOAT: - case V_028C70_COLOR_32_32_32_32: - return(ENDIAN_8IN32); - default: - return ENDIAN_NONE; /* Unsupported. */ + if (R600_BIG_ENDIAN) { + switch(colorformat) { + case V_028C70_COLOR_4_4: + return(ENDIAN_NONE); + + /* 8-bit buffers. */ + case V_028C70_COLOR_8: + return(ENDIAN_NONE); + + /* 16-bit buffers. */ + case V_028C70_COLOR_5_6_5: + case V_028C70_COLOR_1_5_5_5: + case V_028C70_COLOR_4_4_4_4: + case V_028C70_COLOR_16: + case V_028C70_COLOR_8_8: + return(ENDIAN_8IN16); + + /* 32-bit buffers. */ + case V_028C70_COLOR_8_8_8_8: + case V_028C70_COLOR_2_10_10_10: + case V_028C70_COLOR_8_24: + case V_028C70_COLOR_24_8: + case V_028C70_COLOR_32_FLOAT: + case V_028C70_COLOR_16_16_FLOAT: + case V_028C70_COLOR_16_16: + return(ENDIAN_8IN32); + + /* 64-bit buffers. */ + case V_028C70_COLOR_16_16_16_16: + case V_028C70_COLOR_16_16_16_16_FLOAT: + return(ENDIAN_8IN16); + + case V_028C70_COLOR_32_32_FLOAT: + case V_028C70_COLOR_32_32: + return(ENDIAN_8IN32); + + /* 128-bit buffers. */ + case V_028C70_COLOR_32_32_32_FLOAT: + case V_028C70_COLOR_32_32_32_32_FLOAT: + case V_028C70_COLOR_32_32_32_32: + return(ENDIAN_8IN32); + default: + return ENDIAN_NONE; /* Unsupported. */ + } + } else { + return ENDIAN_NONE; } -#else - return ENDIAN_NONE; -#endif } static INLINE boolean r600_is_sampler_format_supported(struct pipe_screen *screen, enum pipe_format format) diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index a972f82fb1d..9813e01c966 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -1574,9 +1574,7 @@ void evergreen_pipe_set_buffer_resource(struct r600_pipe_context *rctx, r600_pipe_state_add_reg(rstate, R_030004_RESOURCE0_WORD1, rbuffer->bo_size - offset - 1, 0xFFFFFFFF, NULL); r600_pipe_state_add_reg(rstate, R_030008_RESOURCE0_WORD2, -#ifdef PIPE_ARCH_BIG_ENDIAN - S_030008_ENDIAN_SWAP(ENDIAN_8IN32) | -#endif + S_030008_ENDIAN_SWAP(r600_endian_swap(32)) | S_030008_STRIDE(stride), 0xFFFFFFFF, NULL); r600_pipe_state_add_reg(rstate, R_03000C_RESOURCE0_WORD3, S_03000C_DST_SEL_X(V_03000C_SQ_SEL_X) | diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c index efb22fdb8ee..f037423f4bb 100644 --- a/src/gallium/drivers/r600/r600_asm.c +++ b/src/gallium/drivers/r600/r600_asm.c @@ -33,12 +33,6 @@ #include "r600_formats.h" #include "r600d.h" -#ifdef PIPE_ARCH_BIG_ENDIAN -#define CPU_TO_LE32(x) bswap_32(x) -#else -#define CPU_TO_LE32(x) (x) -#endif - #define NUM_OF_CYCLES 3 #define NUM_OF_COMPONENTS 4 @@ -1404,7 +1398,7 @@ static int r600_bc_vtx_build(struct r600_bc *bc, struct r600_bc_vtx *vtx, unsign S_SQ_VTX_WORD1_SRF_MODE_ALL(vtx->srf_mode_all) | S_SQ_VTX_WORD1_GPR_DST_GPR(vtx->dst_gpr); bc->bytecode[id++] = S_SQ_VTX_WORD2_OFFSET(vtx->offset) | - S_SQ_VTX_WORD2_ENDIAN_SWAP(vtx->endian) | + S_SQ_VTX_WORD2_ENDIAN_SWAP(vtx->endian) | S_SQ_VTX_WORD2_MEGA_FETCH(1); bc->bytecode[id++] = 0; return 0; @@ -1974,6 +1968,8 @@ static void r600_vertex_data_type(enum pipe_format pformat, unsigned *format, } } + *endian = r600_endian_swap(desc->channel[i].size); + switch (desc->channel[i].type) { /* Half-floats, floats, ints */ case UTIL_FORMAT_TYPE_FLOAT: @@ -1991,9 +1987,6 @@ static void r600_vertex_data_type(enum pipe_format pformat, unsigned *format, *format = FMT_16_16_16_16_FLOAT; break; } -#ifdef PIPE_ARCH_BIG_ENDIAN - *endian = ENDIAN_8IN16; -#endif break; case 32: switch (desc->nr_channels) { @@ -2010,9 +2003,6 @@ static void r600_vertex_data_type(enum pipe_format pformat, unsigned *format, *format = FMT_32_32_32_32_FLOAT; break; } -#ifdef PIPE_ARCH_BIG_ENDIAN - *endian = ENDIAN_8IN32; -#endif break; default: goto out_unknown; @@ -2050,9 +2040,6 @@ static void r600_vertex_data_type(enum pipe_format pformat, unsigned *format, *format = FMT_16_16_16_16; break; } -#ifdef PIPE_ARCH_BIG_ENDIAN - *endian = ENDIAN_8IN16; -#endif break; case 32: switch (desc->nr_channels) { @@ -2069,9 +2056,6 @@ static void r600_vertex_data_type(enum pipe_format pformat, unsigned *format, *format = FMT_32_32_32_32; break; } -#ifdef PIPE_ARCH_BIG_ENDIAN - *endian = ENDIAN_8IN32; -#endif break; default: goto out_unknown; @@ -2216,8 +2200,12 @@ int r600_vertex_elements_build_fetch_shader(struct r600_pipe_context *rctx, stru return -ENOMEM; } - for(i = 0; i < ve->fs_size / 4; i++) { - *(bytecode + i) = CPU_TO_LE32(*(bc.bytecode + i)); + if (R600_BIG_ENDIAN) { + for (i = 0; i < ve->fs_size / 4; ++i) { + bytecode[i] = bswap_32(bc.bytecode[i]); + } + } else { + memcpy(bytecode, bc.bytecode, ve->fs_size); } r600_bo_unmap(rctx->radeon, ve->fetch_shader); diff --git a/src/gallium/drivers/r600/r600_buffer.c b/src/gallium/drivers/r600/r600_buffer.c index 71b47e1b056..b89901d6248 100644 --- a/src/gallium/drivers/r600/r600_buffer.c +++ b/src/gallium/drivers/r600/r600_buffer.c @@ -268,31 +268,30 @@ void r600_upload_const_buffer(struct r600_pipe_context *rctx, struct r600_resour uint8_t *ptr = (*rbuffer)->r.b.user_ptr; unsigned size = (*rbuffer)->r.b.b.b.width0; boolean flushed; -#ifdef PIPE_ARCH_BIG_ENDIAN - int i; - uint32_t *tmpPtr; *rbuffer = NULL; - tmpPtr = (uint32_t *)malloc(size); - /* big endian swap */ - if(tmpPtr == NULL) { - return; - } - for(i = 0; i < size / 4; i++) { - tmpPtr[i] = bswap_32(*((uint32_t *)ptr + i)); - } + if (R600_BIG_ENDIAN) { + uint32_t *tmpPtr; + unsigned i; - u_upload_data(rctx->vbuf_mgr->uploader, 0, size, tmpPtr, const_offset, - (struct pipe_resource**)rbuffer, &flushed); + if (!(tmpPtr = malloc(size))) { + R600_ERR("Failed to allocate BE swap buffer.\n"); + return; + } - free(tmpPtr); -#else - *rbuffer = NULL; + for (i = 0; i < size / 4; ++i) { + tmpPtr[i] = bswap_32(((uint32_t *)ptr)[i]); + } - u_upload_data(rctx->vbuf_mgr->uploader, 0, size, ptr, const_offset, - (struct pipe_resource**)rbuffer, &flushed); -#endif + u_upload_data(rctx->vbuf_mgr->uploader, 0, size, tmpPtr, const_offset, + (struct pipe_resource**)rbuffer, &flushed); + + free(tmpPtr); + } else { + u_upload_data(rctx->vbuf_mgr->uploader, 0, size, ptr, const_offset, + (struct pipe_resource**)rbuffer, &flushed); + } } else { *const_offset = 0; } diff --git a/src/gallium/drivers/r600/r600_formats.h b/src/gallium/drivers/r600/r600_formats.h index 0c91a212384..c9af631da41 100644 --- a/src/gallium/drivers/r600/r600_formats.h +++ b/src/gallium/drivers/r600/r600_formats.h @@ -1,6 +1,8 @@ #ifndef R600_FORMATS_H #define R600_FORMATS_H +#include "r600_pipe.h" + /* list of formats from R700 ISA document - apply across GPUs in different registers */ #define FMT_INVALID 0x00000000 #define FMT_8 0x00000001 @@ -53,4 +55,27 @@ #define FMT_BC4 0x00000034 #define FMT_BC5 0x00000035 +#define ENDIAN_NONE 0 +#define ENDIAN_8IN16 1 +#define ENDIAN_8IN32 2 +#define ENDIAN_8IN64 3 + +static INLINE unsigned r600_endian_swap(unsigned size) +{ + if (R600_BIG_ENDIAN) { + switch (size) { + case 64: + return ENDIAN_8IN64; + case 32: + return ENDIAN_8IN32; + case 16: + return ENDIAN_8IN16; + default: + return ENDIAN_NONE; + } + } else { + return ENDIAN_NONE; + } +} + #endif diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h index d6e47594116..ae2a57e1416 100644 --- a/src/gallium/drivers/r600/r600_pipe.h +++ b/src/gallium/drivers/r600/r600_pipe.h @@ -40,6 +40,12 @@ #define R600_MAX_CONST_BUFFERS 1 #define R600_MAX_CONST_BUFFER_SIZE 4096 +#ifdef PIPE_ARCH_BIG_ENDIAN +#define R600_BIG_ENDIAN 1 +#else +#define R600_BIG_ENDIAN 0 +#endif + enum r600_pipe_state_id { R600_PIPE_STATE_BLEND = 0, R600_PIPE_STATE_BLEND_COLOR, diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c index 2f901be28fa..96ac59b2e93 100644 --- a/src/gallium/drivers/r600/r600_shader.c +++ b/src/gallium/drivers/r600/r600_shader.c @@ -35,12 +35,6 @@ #include <errno.h> #include <byteswap.h> -#ifdef PIPE_ARCH_BIG_ENDIAN -#define CPU_TO_LE32(x) bswap_32(x) -#else -#define CPU_TO_LE32(x) (x) -#endif - int r600_find_vs_semantic_index(struct r600_shader *vs, struct r600_shader *ps, int id) { @@ -69,8 +63,12 @@ static int r600_pipe_shader(struct pipe_context *ctx, struct r600_pipe_shader *s return -ENOMEM; } ptr = (uint32_t*)r600_bo_map(rctx->radeon, shader->bo, 0, NULL); - for(i = 0; i < rshader->bc.ndw; i++) { - *(ptr + i) = CPU_TO_LE32(*(rshader->bc.bytecode + i)); + if (R600_BIG_ENDIAN) { + for (i = 0; i < rshader->bc.ndw; ++i) { + ptr[i] = bswap_32(rshader->bc.bytecode[i]); + } + } else { + memcpy(ptr, rshader->bc.bytecode, rshader->bc.ndw * sizeof(*ptr)); } r600_bo_unmap(rctx->radeon, shader->bo); } @@ -477,11 +475,7 @@ static int tgsi_fetch_rel_const(struct r600_shader_ctx *ctx, unsigned int offset vtx.num_format_all = 2; /* NUM_FORMAT_SCALED */ vtx.format_comp_all = 1; /* FORMAT_COMP_SIGNED */ vtx.srf_mode_all = 1; /* SRF_MODE_NO_ZERO */ -#ifdef PIPE_ARCH_BIG_ENDIAN - vtx.endian = ENDIAN_8IN32; -#else - vtx.endian = ENDIAN_NONE; -#endif + vtx.endian = r600_endian_swap(32); if ((r = r600_bc_add_vtx(ctx->bc, &vtx))) return r; diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index ac2e8986b97..1e3f81548a2 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -1461,9 +1461,7 @@ void r600_pipe_set_buffer_resource(struct r600_pipe_context *rctx, r600_pipe_state_add_reg(rstate, R_038004_RESOURCE0_WORD1, rbuffer->bo_size - offset - 1, 0xFFFFFFFF, NULL); r600_pipe_state_add_reg(rstate, R_038008_RESOURCE0_WORD2, -#ifdef PIPE_ARCH_BIG_ENDIAN - S_038008_ENDIAN_SWAP(ENDIAN_8IN32) | -#endif + S_038008_ENDIAN_SWAP(r600_endian_swap(32)) | S_038008_STRIDE(stride), 0xFFFFFFFF, NULL); r600_pipe_state_add_reg(rstate, R_03800C_RESOURCE0_WORD3, 0x00000000, 0xFFFFFFFF, NULL); diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c index a0817d09a15..cf605e11ade 100644 --- a/src/gallium/drivers/r600/r600_state_common.c +++ b/src/gallium/drivers/r600/r600_state_common.c @@ -28,6 +28,7 @@ #include <util/u_format.h> #include <pipebuffer/pb_buffer.h> #include "pipe/p_shader_tokens.h" +#include "r600_formats.h" #include "r600_pipe.h" #include "r600d.h" @@ -517,16 +518,16 @@ void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info) case 2: vgt_draw_initiator = 0; vgt_dma_index_type = 0; -#ifdef PIPE_ARCH_BIG_ENDIAN - vgt_dma_swap_mode = ENDIAN_8IN16; -#endif + if (R600_BIG_ENDIAN) { + vgt_dma_swap_mode = ENDIAN_8IN16; + } break; case 4: vgt_draw_initiator = 0; vgt_dma_index_type = 1; -#ifdef PIPE_ARCH_BIG_ENDIAN - vgt_dma_swap_mode = ENDIAN_8IN32; -#endif + if (R600_BIG_ENDIAN) { + vgt_dma_swap_mode = ENDIAN_8IN32; + } break; case 0: vgt_draw_initiator = 2; diff --git a/src/gallium/drivers/r600/r600_state_inlines.h b/src/gallium/drivers/r600/r600_state_inlines.h index 5d6145661a0..45fb0ce5e82 100644 --- a/src/gallium/drivers/r600/r600_state_inlines.h +++ b/src/gallium/drivers/r600/r600_state_inlines.h @@ -503,53 +503,53 @@ static INLINE uint32_t r600_translate_colorformat(enum pipe_format format) static INLINE uint32_t r600_colorformat_endian_swap(uint32_t colorformat) { -#ifdef PIPE_ARCH_BIG_ENDIAN - switch(colorformat) { - case V_0280A0_COLOR_4_4: - return(ENDIAN_NONE); - - /* 8-bit buffers. */ - case V_0280A0_COLOR_8: - return(ENDIAN_NONE); - - /* 16-bit buffers. */ - case V_0280A0_COLOR_5_6_5: - case V_0280A0_COLOR_1_5_5_5: - case V_0280A0_COLOR_4_4_4_4: - case V_0280A0_COLOR_16: - case V_0280A0_COLOR_8_8: - return(ENDIAN_8IN16); - - /* 32-bit buffers. */ - case V_0280A0_COLOR_8_8_8_8: - case V_0280A0_COLOR_2_10_10_10: - case V_0280A0_COLOR_8_24: - case V_0280A0_COLOR_24_8: - case V_0280A0_COLOR_32_FLOAT: - case V_0280A0_COLOR_16_16_FLOAT: - case V_0280A0_COLOR_16_16: - return(ENDIAN_8IN32); - - /* 64-bit buffers. */ - case V_0280A0_COLOR_16_16_16_16: - case V_0280A0_COLOR_16_16_16_16_FLOAT: - return(ENDIAN_8IN16); - - case V_0280A0_COLOR_32_32_FLOAT: - case V_0280A0_COLOR_32_32: - return(ENDIAN_8IN32); - - /* 128-bit buffers. */ - case V_0280A0_COLOR_32_32_32_FLOAT: - case V_0280A0_COLOR_32_32_32_32_FLOAT: - case V_0280A0_COLOR_32_32_32_32: - return(ENDIAN_8IN32); - default: - return ENDIAN_NONE; /* Unsupported. */ + if (R600_BIG_ENDIAN) { + switch(colorformat) { + case V_0280A0_COLOR_4_4: + return(ENDIAN_NONE); + + /* 8-bit buffers. */ + case V_0280A0_COLOR_8: + return(ENDIAN_NONE); + + /* 16-bit buffers. */ + case V_0280A0_COLOR_5_6_5: + case V_0280A0_COLOR_1_5_5_5: + case V_0280A0_COLOR_4_4_4_4: + case V_0280A0_COLOR_16: + case V_0280A0_COLOR_8_8: + return(ENDIAN_8IN16); + + /* 32-bit buffers. */ + case V_0280A0_COLOR_8_8_8_8: + case V_0280A0_COLOR_2_10_10_10: + case V_0280A0_COLOR_8_24: + case V_0280A0_COLOR_24_8: + case V_0280A0_COLOR_32_FLOAT: + case V_0280A0_COLOR_16_16_FLOAT: + case V_0280A0_COLOR_16_16: + return(ENDIAN_8IN32); + + /* 64-bit buffers. */ + case V_0280A0_COLOR_16_16_16_16: + case V_0280A0_COLOR_16_16_16_16_FLOAT: + return(ENDIAN_8IN16); + + case V_0280A0_COLOR_32_32_FLOAT: + case V_0280A0_COLOR_32_32: + return(ENDIAN_8IN32); + + /* 128-bit buffers. */ + case V_0280A0_COLOR_32_32_32_FLOAT: + case V_0280A0_COLOR_32_32_32_32_FLOAT: + case V_0280A0_COLOR_32_32_32_32: + return(ENDIAN_8IN32); + default: + return ENDIAN_NONE; /* Unsupported. */ + } + } else { + return ENDIAN_NONE; } -#else - return ENDIAN_NONE; -#endif } static INLINE boolean r600_is_sampler_format_supported(struct pipe_screen *screen, enum pipe_format format) diff --git a/src/gallium/drivers/r600/r600d.h b/src/gallium/drivers/r600/r600d.h index 2bff52bec8c..8296b52eb94 100644 --- a/src/gallium/drivers/r600/r600d.h +++ b/src/gallium/drivers/r600/r600d.h @@ -3461,9 +3461,4 @@ #define SQ_TEX_INST_SAMPLE_L 0x11 #define SQ_TEX_INST_SAMPLE_C 0x18 -#define ENDIAN_NONE 0 -#define ENDIAN_8IN16 1 -#define ENDIAN_8IN32 2 -#define ENDIAN_8IN64 3 - #endif |