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authorConstantine Kharlamov <[email protected]>2017-04-02 20:33:06 +0300
committerMarek Olšák <[email protected]>2017-04-04 22:15:47 +0200
commit6ee486899b7fac43fc97a5a80bc090db349d374f (patch)
tree2c296a4ca10bead7c0358c2d07e434946f3ddc5d /src/gallium/drivers
parent7ade08e2a83d5cf1d9dbdb767130f19e9d885864 (diff)
r600g: check rasterizer primitive states like in radeonsi
Specifically, non-line primitives skipped, and defaulting to reset on each packet. The skip of non-line primitives saves ≈110 resetting of PA_SC_LINE_STIPPLE register per frame in Kane&Lynch2. Signed-off-by: Constantine Kharlamov <[email protected]> Signed-off-by: Marek Olšák <[email protected]> Tested-by: Dieter Nützel <[email protected]>
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/r600/r600_state_common.c21
1 files changed, 13 insertions, 8 deletions
diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index e4d16609339..4de2a7344b2 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -1670,19 +1670,24 @@ void r600_emit_clip_misc_state(struct r600_context *rctx, struct r600_atom *atom
static inline void r600_emit_rasterizer_prim_state(struct r600_context *rctx)
{
struct radeon_winsys_cs *cs = rctx->b.gfx.cs;
- unsigned ls_mask = 0;
enum pipe_prim_type rast_prim = rctx->current_rast_prim;
- if (rast_prim == rctx->last_rast_prim)
+
+ /* Skip this if not rendering lines. */
+ if (rast_prim != PIPE_PRIM_LINES &&
+ rast_prim != PIPE_PRIM_LINE_LOOP &&
+ rast_prim != PIPE_PRIM_LINE_STRIP &&
+ rast_prim != PIPE_PRIM_LINES_ADJACENCY &&
+ rast_prim != PIPE_PRIM_LINE_STRIP_ADJACENCY)
return;
- if (rast_prim == PIPE_PRIM_LINES)
- ls_mask = 1;
- else if (rast_prim == PIPE_PRIM_LINE_STRIP ||
- rast_prim == PIPE_PRIM_LINE_LOOP)
- ls_mask = 2;
+ if (rast_prim == rctx->last_rast_prim)
+ return;
+ /* For lines, reset the stipple pattern at each primitive. Otherwise,
+ * reset the stipple pattern at each packet (line strips, line loops).
+ */
radeon_set_context_reg(cs, R_028A0C_PA_SC_LINE_STIPPLE,
- S_028A0C_AUTO_RESET_CNTL(ls_mask) |
+ S_028A0C_AUTO_RESET_CNTL(rast_prim == PIPE_PRIM_LINES ? 1 : 2) |
(rctx->rasterizer ? rctx->rasterizer->pa_sc_line_stipple : 0));
rctx->last_rast_prim = rast_prim;
}