summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers
diff options
context:
space:
mode:
authorKeith Whitwell <[email protected]>2009-11-24 15:02:23 +0000
committerKeith Whitwell <[email protected]>2009-11-24 15:02:23 +0000
commit7d6c8f980d1e23ad6f557d650e89c715861a3b0c (patch)
treeb947e26ce1a03497b8a2863ef47d465089ac7ca9 /src/gallium/drivers
parent763426a0256f0ab06f8af53947bd630f8600183a (diff)
tgsi: rename fields of tgsi_full_instruction to avoid excessive verbosity
InstructionPredicate -> Predicate InstructionLabel -> Label InstructionTexture -> Texture FullSrcRegisters -> Src FullDstRegisters -> Dst
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r--src/gallium/drivers/cell/ppu/cell_gen_fp.c226
-rw-r--r--src/gallium/drivers/cell/spu/spu_exec.c12
-rw-r--r--src/gallium/drivers/i915/i915_fpc_translate.c116
-rw-r--r--src/gallium/drivers/llvmpipe/lp_bld_tgsi_soa.c16
-rw-r--r--src/gallium/drivers/nv20/nv20_vertprog.c8
-rw-r--r--src/gallium/drivers/nv30/nv30_fragprog.c8
-rw-r--r--src/gallium/drivers/nv30/nv30_vertprog.c8
-rw-r--r--src/gallium/drivers/nv40/nv40_fragprog.c8
-rw-r--r--src/gallium/drivers/nv40/nv40_vertprog.c10
-rw-r--r--src/gallium/drivers/nv50/nv50_program.c36
-rw-r--r--src/gallium/drivers/r300/r300_tgsi_to_rc.c10
-rw-r--r--src/gallium/drivers/svga/svga_tgsi_insn.c110
12 files changed, 284 insertions, 284 deletions
diff --git a/src/gallium/drivers/cell/ppu/cell_gen_fp.c b/src/gallium/drivers/cell/ppu/cell_gen_fp.c
index 19e3ab08440..b0afad349f6 100644
--- a/src/gallium/drivers/cell/ppu/cell_gen_fp.c
+++ b/src/gallium/drivers/cell/ppu/cell_gen_fp.c
@@ -544,7 +544,7 @@ emit_epilogue(struct codegen *gen)
#define FOR_EACH_ENABLED_CHANNEL(inst, ch) \
for (ch = 0; ch < 4; ch++) \
- if (inst->FullDstRegisters[0].DstRegister.WriteMask & (1 << ch))
+ if (inst->Dst[0].DstRegister.WriteMask & (1 << ch))
static boolean
@@ -552,7 +552,7 @@ emit_ARL(struct codegen *gen, const struct tgsi_full_instruction *inst)
{
int ch = 0, src_reg, addr_reg;
- src_reg = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
+ src_reg = get_src_reg(gen, ch, &inst->Src[0]);
addr_reg = get_address_reg(gen);
/* convert float to int */
@@ -570,19 +570,19 @@ emit_MOV(struct codegen *gen, const struct tgsi_full_instruction *inst)
int ch, src_reg[4], dst_reg[4];
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- src_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- dst_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ src_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ dst_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- if (is_register_src(gen, ch, &inst->FullSrcRegisters[0]) &&
- is_memory_dst(gen, ch, &inst->FullDstRegisters[0])) {
+ if (is_register_src(gen, ch, &inst->Src[0]) &&
+ is_memory_dst(gen, ch, &inst->Dst[0])) {
/* special-case: register to memory store */
- store_dest_reg(gen, src_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, src_reg[ch], ch, &inst->Dst[0]);
}
else {
spe_move(gen->f, dst_reg[ch], src_reg[ch]);
- store_dest_reg(gen, dst_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, dst_reg[ch], ch, &inst->Dst[0]);
}
}
@@ -601,9 +601,9 @@ emit_binop(struct codegen *gen, const struct tgsi_full_instruction *inst)
/* Loop over Red/Green/Blue/Alpha channels, fetch src operands */
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- s2_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[1]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ s2_reg[ch] = get_src_reg(gen, ch, &inst->Src[1]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
}
/* Loop over Red/Green/Blue/Alpha channels, do the op, store results */
@@ -626,7 +626,7 @@ emit_binop(struct codegen *gen, const struct tgsi_full_instruction *inst)
/* Store the result (a no-op for TGSI_FILE_TEMPORARY dests) */
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
/* Free any intermediate temps we allocated */
@@ -645,16 +645,16 @@ emit_MAD(struct codegen *gen, const struct tgsi_full_instruction *inst)
int ch, s1_reg[4], s2_reg[4], s3_reg[4], d_reg[4];
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- s2_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[1]);
- s3_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[2]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ s2_reg[ch] = get_src_reg(gen, ch, &inst->Src[1]);
+ s3_reg[ch] = get_src_reg(gen, ch, &inst->Src[2]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
spe_fma(gen->f, d_reg[ch], s1_reg[ch], s2_reg[ch], s3_reg[ch]);
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
return TRUE;
@@ -671,10 +671,10 @@ emit_LRP(struct codegen *gen, const struct tgsi_full_instruction *inst)
/* setup/get src/dst/temp regs */
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- s2_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[1]);
- s3_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[2]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ s2_reg[ch] = get_src_reg(gen, ch, &inst->Src[1]);
+ s3_reg[ch] = get_src_reg(gen, ch, &inst->Src[2]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
tmp_reg[ch] = get_itemp(gen);
}
@@ -687,7 +687,7 @@ emit_LRP(struct codegen *gen, const struct tgsi_full_instruction *inst)
spe_fma(gen->f, d_reg[ch], tmp_reg[ch], s1_reg[ch], s3_reg[ch]);
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
return TRUE;
@@ -704,8 +704,8 @@ emit_RCP_RSQ(struct codegen *gen, const struct tgsi_full_instruction *inst)
int ch, s1_reg[4], d_reg[4], tmp_reg[4];
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
tmp_reg[ch] = get_itemp(gen);
}
@@ -726,7 +726,7 @@ emit_RCP_RSQ(struct codegen *gen, const struct tgsi_full_instruction *inst)
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -747,8 +747,8 @@ emit_ABS(struct codegen *gen, const struct tgsi_full_instruction *inst)
spe_load_uint(gen->f, bit31mask_reg, (1 << 31));
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
}
/* d = sign bit cleared in s1 */
@@ -757,7 +757,7 @@ emit_ABS(struct codegen *gen, const struct tgsi_full_instruction *inst)
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -775,12 +775,12 @@ emit_DP3(struct codegen *gen, const struct tgsi_full_instruction *inst)
int s2x_reg, s2y_reg, s2z_reg;
int t0_reg = get_itemp(gen), t1_reg = get_itemp(gen);
- s1x_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[0]);
- s2x_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[1]);
- s1y_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[0]);
- s2y_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[1]);
- s1z_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[0]);
- s2z_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[1]);
+ s1x_reg = get_src_reg(gen, CHAN_X, &inst->Src[0]);
+ s2x_reg = get_src_reg(gen, CHAN_X, &inst->Src[1]);
+ s1y_reg = get_src_reg(gen, CHAN_Y, &inst->Src[0]);
+ s2y_reg = get_src_reg(gen, CHAN_Y, &inst->Src[1]);
+ s1z_reg = get_src_reg(gen, CHAN_Z, &inst->Src[0]);
+ s2z_reg = get_src_reg(gen, CHAN_Z, &inst->Src[1]);
/* t0 = x0 * x1 */
spe_fm(gen->f, t0_reg, s1x_reg, s2x_reg);
@@ -795,9 +795,9 @@ emit_DP3(struct codegen *gen, const struct tgsi_full_instruction *inst)
spe_fa(gen->f, t0_reg, t0_reg, t1_reg);
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- int d_reg = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ int d_reg = get_dst_reg(gen, ch, &inst->Dst[0]);
spe_move(gen->f, d_reg, t0_reg);
- store_dest_reg(gen, d_reg, ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg, ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -815,14 +815,14 @@ emit_DP4(struct codegen *gen, const struct tgsi_full_instruction *inst)
int s1x_reg, s1y_reg, s1z_reg, s1w_reg;
int t0_reg = get_itemp(gen), t1_reg = get_itemp(gen);
- s0x_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[0]);
- s1x_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[1]);
- s0y_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[0]);
- s1y_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[1]);
- s0z_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[0]);
- s1z_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[1]);
- s0w_reg = get_src_reg(gen, CHAN_W, &inst->FullSrcRegisters[0]);
- s1w_reg = get_src_reg(gen, CHAN_W, &inst->FullSrcRegisters[1]);
+ s0x_reg = get_src_reg(gen, CHAN_X, &inst->Src[0]);
+ s1x_reg = get_src_reg(gen, CHAN_X, &inst->Src[1]);
+ s0y_reg = get_src_reg(gen, CHAN_Y, &inst->Src[0]);
+ s1y_reg = get_src_reg(gen, CHAN_Y, &inst->Src[1]);
+ s0z_reg = get_src_reg(gen, CHAN_Z, &inst->Src[0]);
+ s1z_reg = get_src_reg(gen, CHAN_Z, &inst->Src[1]);
+ s0w_reg = get_src_reg(gen, CHAN_W, &inst->Src[0]);
+ s1w_reg = get_src_reg(gen, CHAN_W, &inst->Src[1]);
/* t0 = x0 * x1 */
spe_fm(gen->f, t0_reg, s0x_reg, s1x_reg);
@@ -840,9 +840,9 @@ emit_DP4(struct codegen *gen, const struct tgsi_full_instruction *inst)
spe_fa(gen->f, t0_reg, t0_reg, t1_reg);
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- int d_reg = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ int d_reg = get_dst_reg(gen, ch, &inst->Dst[0]);
spe_move(gen->f, d_reg, t0_reg);
- store_dest_reg(gen, d_reg, ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg, ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -857,31 +857,31 @@ emit_DPH(struct codegen *gen, const struct tgsi_full_instruction *inst)
{
/* XXX rewrite this function to look more like DP3/DP4 */
int ch;
- int s1_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[0]);
- int s2_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[1]);
+ int s1_reg = get_src_reg(gen, CHAN_X, &inst->Src[0]);
+ int s2_reg = get_src_reg(gen, CHAN_X, &inst->Src[1]);
int tmp_reg = get_itemp(gen);
/* t = x0 * x1 */
spe_fm(gen->f, tmp_reg, s1_reg, s2_reg);
- s1_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[0]);
- s2_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[1]);
+ s1_reg = get_src_reg(gen, CHAN_Y, &inst->Src[0]);
+ s2_reg = get_src_reg(gen, CHAN_Y, &inst->Src[1]);
/* t = y0 * y1 + t */
spe_fma(gen->f, tmp_reg, s1_reg, s2_reg, tmp_reg);
- s1_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[0]);
- s2_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[1]);
+ s1_reg = get_src_reg(gen, CHAN_Z, &inst->Src[0]);
+ s2_reg = get_src_reg(gen, CHAN_Z, &inst->Src[1]);
/* t = z0 * z1 + t */
spe_fma(gen->f, tmp_reg, s1_reg, s2_reg, tmp_reg);
- s2_reg = get_src_reg(gen, CHAN_W, &inst->FullSrcRegisters[1]);
+ s2_reg = get_src_reg(gen, CHAN_W, &inst->Src[1]);
/* t = w1 + t */
spe_fa(gen->f, tmp_reg, s2_reg, tmp_reg);
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- int d_reg = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ int d_reg = get_dst_reg(gen, ch, &inst->Dst[0]);
spe_move(gen->f, d_reg, tmp_reg);
- store_dest_reg(gen, tmp_reg, ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, tmp_reg, ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -898,9 +898,9 @@ emit_NRM3(struct codegen *gen, const struct tgsi_full_instruction *inst)
int src_reg[3];
int t0_reg = get_itemp(gen), t1_reg = get_itemp(gen);
- src_reg[0] = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[0]);
- src_reg[1] = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[0]);
- src_reg[2] = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[0]);
+ src_reg[0] = get_src_reg(gen, CHAN_X, &inst->Src[0]);
+ src_reg[1] = get_src_reg(gen, CHAN_Y, &inst->Src[0]);
+ src_reg[2] = get_src_reg(gen, CHAN_Z, &inst->Src[0]);
/* t0 = x * x */
spe_fm(gen->f, t0_reg, src_reg[0], src_reg[0]);
@@ -919,10 +919,10 @@ emit_NRM3(struct codegen *gen, const struct tgsi_full_instruction *inst)
spe_fi(gen->f, t1_reg, t0_reg, t1_reg);
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- int d_reg = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ int d_reg = get_dst_reg(gen, ch, &inst->Dst[0]);
/* dst = src[ch] * t1 */
spe_fm(gen->f, d_reg, src_reg[ch], t1_reg);
- store_dest_reg(gen, d_reg, ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg, ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -936,48 +936,48 @@ emit_NRM3(struct codegen *gen, const struct tgsi_full_instruction *inst)
static boolean
emit_XPD(struct codegen *gen, const struct tgsi_full_instruction *inst)
{
- int s1_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[0]);
- int s2_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[1]);
+ int s1_reg = get_src_reg(gen, CHAN_Z, &inst->Src[0]);
+ int s2_reg = get_src_reg(gen, CHAN_Y, &inst->Src[1]);
int tmp_reg = get_itemp(gen);
/* t = z0 * y1 */
spe_fm(gen->f, tmp_reg, s1_reg, s2_reg);
- s1_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[0]);
- s2_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[1]);
+ s1_reg = get_src_reg(gen, CHAN_Y, &inst->Src[0]);
+ s2_reg = get_src_reg(gen, CHAN_Z, &inst->Src[1]);
/* t = y0 * z1 - t */
spe_fms(gen->f, tmp_reg, s1_reg, s2_reg, tmp_reg);
- if (inst->FullDstRegisters[0].DstRegister.WriteMask & (1 << CHAN_X)) {
- store_dest_reg(gen, tmp_reg, CHAN_X, &inst->FullDstRegisters[0]);
+ if (inst->Dst[0].DstRegister.WriteMask & (1 << CHAN_X)) {
+ store_dest_reg(gen, tmp_reg, CHAN_X, &inst->Dst[0]);
}
- s1_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[0]);
- s2_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[1]);
+ s1_reg = get_src_reg(gen, CHAN_X, &inst->Src[0]);
+ s2_reg = get_src_reg(gen, CHAN_Z, &inst->Src[1]);
/* t = x0 * z1 */
spe_fm(gen->f, tmp_reg, s1_reg, s2_reg);
- s1_reg = get_src_reg(gen, CHAN_Z, &inst->FullSrcRegisters[0]);
- s2_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[1]);
+ s1_reg = get_src_reg(gen, CHAN_Z, &inst->Src[0]);
+ s2_reg = get_src_reg(gen, CHAN_X, &inst->Src[1]);
/* t = z0 * x1 - t */
spe_fms(gen->f, tmp_reg, s1_reg, s2_reg, tmp_reg);
- if (inst->FullDstRegisters[0].DstRegister.WriteMask & (1 << CHAN_Y)) {
- store_dest_reg(gen, tmp_reg, CHAN_Y, &inst->FullDstRegisters[0]);
+ if (inst->Dst[0].DstRegister.WriteMask & (1 << CHAN_Y)) {
+ store_dest_reg(gen, tmp_reg, CHAN_Y, &inst->Dst[0]);
}
- s1_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[0]);
- s2_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[1]);
+ s1_reg = get_src_reg(gen, CHAN_Y, &inst->Src[0]);
+ s2_reg = get_src_reg(gen, CHAN_X, &inst->Src[1]);
/* t = y0 * x1 */
spe_fm(gen->f, tmp_reg, s1_reg, s2_reg);
- s1_reg = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[0]);
- s2_reg = get_src_reg(gen, CHAN_Y, &inst->FullSrcRegisters[1]);
+ s1_reg = get_src_reg(gen, CHAN_X, &inst->Src[0]);
+ s2_reg = get_src_reg(gen, CHAN_Y, &inst->Src[1]);
/* t = x0 * y1 - t */
spe_fms(gen->f, tmp_reg, s1_reg, s2_reg, tmp_reg);
- if (inst->FullDstRegisters[0].DstRegister.WriteMask & (1 << CHAN_Z)) {
- store_dest_reg(gen, tmp_reg, CHAN_Z, &inst->FullDstRegisters[0]);
+ if (inst->Dst[0].DstRegister.WriteMask & (1 << CHAN_Z)) {
+ store_dest_reg(gen, tmp_reg, CHAN_Z, &inst->Dst[0]);
}
free_itemps(gen);
@@ -1000,9 +1000,9 @@ emit_inequality(struct codegen *gen, const struct tgsi_full_instruction *inst)
one_reg = get_const_one_reg(gen);
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- s2_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[1]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ s2_reg[ch] = get_src_reg(gen, ch, &inst->Src[1]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
@@ -1043,7 +1043,7 @@ emit_inequality(struct codegen *gen, const struct tgsi_full_instruction *inst)
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -1060,10 +1060,10 @@ emit_CMP(struct codegen *gen, const struct tgsi_full_instruction *inst)
int ch;
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- int s1_reg = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- int s2_reg = get_src_reg(gen, ch, &inst->FullSrcRegisters[1]);
- int s3_reg = get_src_reg(gen, ch, &inst->FullSrcRegisters[2]);
- int d_reg = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ int s1_reg = get_src_reg(gen, ch, &inst->Src[0]);
+ int s2_reg = get_src_reg(gen, ch, &inst->Src[1]);
+ int s3_reg = get_src_reg(gen, ch, &inst->Src[2]);
+ int d_reg = get_dst_reg(gen, ch, &inst->Dst[0]);
int zero_reg = get_itemp(gen);
spe_zero(gen->f, zero_reg);
@@ -1072,7 +1072,7 @@ emit_CMP(struct codegen *gen, const struct tgsi_full_instruction *inst)
spe_fcgt(gen->f, d_reg, zero_reg, s1_reg);
spe_selb(gen->f, d_reg, s3_reg, s2_reg, d_reg);
- store_dest_reg(gen, d_reg, ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg, ch, &inst->Dst[0]);
free_itemps(gen);
}
@@ -1090,8 +1090,8 @@ emit_TRUNC(struct codegen *gen, const struct tgsi_full_instruction *inst)
int ch, s1_reg[4], d_reg[4];
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
}
/* Convert float to int */
@@ -1105,7 +1105,7 @@ emit_TRUNC(struct codegen *gen, const struct tgsi_full_instruction *inst)
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -1129,8 +1129,8 @@ emit_FLR(struct codegen *gen, const struct tgsi_full_instruction *inst)
one_reg = get_const_one_reg(gen);
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
tmp_reg[ch] = get_itemp(gen);
}
@@ -1156,7 +1156,7 @@ emit_FLR(struct codegen *gen, const struct tgsi_full_instruction *inst)
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -1177,8 +1177,8 @@ emit_FRC(struct codegen *gen, const struct tgsi_full_instruction *inst)
one_reg = get_const_one_reg(gen);
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
tmp_reg[ch] = get_itemp(gen);
}
@@ -1210,7 +1210,7 @@ emit_FRC(struct codegen *gen, const struct tgsi_full_instruction *inst)
/* store result */
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -1272,7 +1272,7 @@ emit_function_call(struct codegen *gen,
if (scalar) {
for (a = 0; a < num_args; a++) {
- s_regs[a] = get_src_reg(gen, CHAN_X, &inst->FullSrcRegisters[a]);
+ s_regs[a] = get_src_reg(gen, CHAN_X, &inst->Src[a]);
}
/* we'll call the function, put the return value in this register,
* then replicate it across all write-enabled components in d_reg.
@@ -1287,11 +1287,11 @@ emit_function_call(struct codegen *gen,
if (!scalar) {
for (a = 0; a < num_args; a++) {
- s_regs[a] = get_src_reg(gen, ch, &inst->FullSrcRegisters[a]);
+ s_regs[a] = get_src_reg(gen, ch, &inst->Src[a]);
}
}
- d_reg = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ d_reg = get_dst_reg(gen, ch, &inst->Dst[0]);
if (!scalar || !func_called) {
/* for a scalar function, we'll really only call the function once */
@@ -1336,7 +1336,7 @@ emit_function_call(struct codegen *gen,
spe_move(gen->f, d_reg, retval_reg);
}
- store_dest_reg(gen, d_reg, ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg, ch, &inst->Dst[0]);
free_itemps(gen);
}
@@ -1352,7 +1352,7 @@ static boolean
emit_TEX(struct codegen *gen, const struct tgsi_full_instruction *inst)
{
const uint target = inst->InstructionExtTexture.Texture;
- const uint unit = inst->FullSrcRegisters[1].SrcRegister.Index;
+ const uint unit = inst->Src[1].SrcRegister.Index;
uint addr;
int ch;
int coord_regs[4], d_regs[4];
@@ -1373,14 +1373,14 @@ emit_TEX(struct codegen *gen, const struct tgsi_full_instruction *inst)
return FALSE;
}
- assert(inst->FullSrcRegisters[1].SrcRegister.File == TGSI_FILE_SAMPLER);
+ assert(inst->Src[1].SrcRegister.File == TGSI_FILE_SAMPLER);
spe_comment(gen->f, -4, "CALL tex:");
/* get src/dst reg info */
for (ch = 0; ch < 4; ch++) {
- coord_regs[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- d_regs[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ coord_regs[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ d_regs[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
}
{
@@ -1425,7 +1425,7 @@ emit_TEX(struct codegen *gen, const struct tgsi_full_instruction *inst)
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_regs[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_regs[ch], ch, &inst->Dst[0]);
free_itemps(gen);
}
@@ -1452,7 +1452,7 @@ emit_KIL(struct codegen *gen, const struct tgsi_full_instruction *inst)
/* get src regs */
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s_regs[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
+ s_regs[ch] = get_src_reg(gen, ch, &inst->Src[0]);
}
/* test if any src regs are < 0 */
@@ -1500,9 +1500,9 @@ emit_MIN_MAX(struct codegen *gen, const struct tgsi_full_instruction *inst)
int ch, s0_reg[4], s1_reg[4], d_reg[4], tmp_reg[4];
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- s0_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- s1_reg[ch] = get_src_reg(gen, ch, &inst->FullSrcRegisters[1]);
- d_reg[ch] = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ s0_reg[ch] = get_src_reg(gen, ch, &inst->Src[0]);
+ s1_reg[ch] = get_src_reg(gen, ch, &inst->Src[1]);
+ d_reg[ch] = get_dst_reg(gen, ch, &inst->Dst[0]);
tmp_reg[ch] = get_itemp(gen);
}
@@ -1518,7 +1518,7 @@ emit_MIN_MAX(struct codegen *gen, const struct tgsi_full_instruction *inst)
}
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- store_dest_reg(gen, d_reg[ch], ch, &inst->FullDstRegisters[0]);
+ store_dest_reg(gen, d_reg[ch], ch, &inst->Dst[0]);
}
free_itemps(gen);
@@ -1575,7 +1575,7 @@ emit_IF(struct codegen *gen, const struct tgsi_full_instruction *inst)
/* update conditional execution mask with the predicate register */
int tmp_reg = get_itemp(gen);
- int s1_reg = get_src_reg(gen, channel, &inst->FullSrcRegisters[0]);
+ int s1_reg = get_src_reg(gen, channel, &inst->Src[0]);
/* tmp = (s1_reg == 0) */
spe_ceqi(gen->f, tmp_reg, s1_reg, 0);
@@ -1699,8 +1699,8 @@ emit_DDX_DDY(struct codegen *gen, const struct tgsi_full_instruction *inst,
int ch;
FOR_EACH_ENABLED_CHANNEL(inst, ch) {
- int s_reg = get_src_reg(gen, ch, &inst->FullSrcRegisters[0]);
- int d_reg = get_dst_reg(gen, ch, &inst->FullDstRegisters[0]);
+ int s_reg = get_src_reg(gen, ch, &inst->Src[0]);
+ int d_reg = get_dst_reg(gen, ch, &inst->Dst[0]);
int t1_reg = get_itemp(gen);
int t2_reg = get_itemp(gen);
diff --git a/src/gallium/drivers/cell/spu/spu_exec.c b/src/gallium/drivers/cell/spu/spu_exec.c
index 4c32b2d06d7..8d58c534bec 100644
--- a/src/gallium/drivers/cell/spu/spu_exec.c
+++ b/src/gallium/drivers/cell/spu/spu_exec.c
@@ -108,10 +108,10 @@
for (CHAN = 0; CHAN < 4; CHAN++)
#define IS_CHANNEL_ENABLED(INST, CHAN)\
- ((INST).FullDstRegisters[0].DstRegister.WriteMask & (1 << (CHAN)))
+ ((INST).Dst[0].DstRegister.WriteMask & (1 << (CHAN)))
#define IS_CHANNEL_ENABLED2(INST, CHAN)\
- ((INST).FullDstRegisters[1].DstRegister.WriteMask & (1 << (CHAN)))
+ ((INST).Dst[1].DstRegister.WriteMask & (1 << (CHAN)))
#define FOR_EACH_ENABLED_CHANNEL(INST, CHAN)\
FOR_EACH_CHANNEL( CHAN )\
@@ -583,10 +583,10 @@ store_dest(
}
#define FETCH(VAL,INDEX,CHAN)\
- fetch_source (mach, VAL, &inst->FullSrcRegisters[INDEX], CHAN)
+ fetch_source (mach, VAL, &inst->Src[INDEX], CHAN)
#define STORE(VAL,INDEX,CHAN)\
- store_dest (mach, VAL, &inst->FullDstRegisters[INDEX], inst, CHAN )
+ store_dest (mach, VAL, &inst->Dst[INDEX], inst, CHAN )
/**
@@ -612,7 +612,7 @@ exec_kil(struct spu_exec_machine *mach,
/* unswizzle channel */
swizzle = tgsi_util_get_full_src_register_swizzle (
- &inst->FullSrcRegisters[0],
+ &inst->Src[0],
chan_index);
/* check if the component has not been already tested */
@@ -677,7 +677,7 @@ exec_tex(struct spu_exec_machine *mach,
const struct tgsi_full_instruction *inst,
boolean biasLod, boolean projected)
{
- const uint unit = inst->FullSrcRegisters[1].SrcRegister.Index;
+ const uint unit = inst->Src[1].SrcRegister.Index;
union spu_exec_channel r[8];
uint chan_index;
float lodBias;
diff --git a/src/gallium/drivers/i915/i915_fpc_translate.c b/src/gallium/drivers/i915/i915_fpc_translate.c
index f2554998a9e..9e626c85c0b 100644
--- a/src/gallium/drivers/i915/i915_fpc_translate.c
+++ b/src/gallium/drivers/i915/i915_fpc_translate.c
@@ -276,7 +276,7 @@ static uint
get_result_flags(const struct tgsi_full_instruction *inst)
{
const uint writeMask
- = inst->FullDstRegisters[0].DstRegister.WriteMask;
+ = inst->Dst[0].DstRegister.WriteMask;
uint flags = 0x0;
if (inst->Instruction.Saturate == TGSI_SAT_ZERO_ONE)
@@ -338,14 +338,14 @@ emit_tex(struct i915_fp_compile *p,
const struct tgsi_full_instruction *inst,
uint opcode)
{
- uint texture = inst->InstructionTexture.Texture;
- uint unit = inst->FullSrcRegisters[1].SrcRegister.Index;
+ uint texture = inst->Texture.Texture;
+ uint unit = inst->Src[1].SrcRegister.Index;
uint tex = translate_tex_src_target( p, texture );
uint sampler = i915_emit_decl(p, REG_TYPE_S, unit, tex);
- uint coord = src_vector( p, &inst->FullSrcRegisters[0]);
+ uint coord = src_vector( p, &inst->Src[0]);
i915_emit_texld( p,
- get_result_vector( p, &inst->FullDstRegisters[0] ),
+ get_result_vector( p, &inst->Dst[0] ),
get_result_flags( inst ),
sampler,
coord,
@@ -367,13 +367,13 @@ emit_simple_arith(struct i915_fp_compile *p,
assert(numArgs <= 3);
- arg1 = (numArgs < 1) ? 0 : src_vector( p, &inst->FullSrcRegisters[0] );
- arg2 = (numArgs < 2) ? 0 : src_vector( p, &inst->FullSrcRegisters[1] );
- arg3 = (numArgs < 3) ? 0 : src_vector( p, &inst->FullSrcRegisters[2] );
+ arg1 = (numArgs < 1) ? 0 : src_vector( p, &inst->Src[0] );
+ arg2 = (numArgs < 2) ? 0 : src_vector( p, &inst->Src[1] );
+ arg3 = (numArgs < 3) ? 0 : src_vector( p, &inst->Src[2] );
i915_emit_arith( p,
opcode,
- get_result_vector( p, &inst->FullDstRegisters[0]),
+ get_result_vector( p, &inst->Dst[0]),
get_result_flags( inst ), 0,
arg1,
arg2,
@@ -393,8 +393,8 @@ emit_simple_arith_swap2(struct i915_fp_compile *p,
/* transpose first two registers */
inst2 = *inst;
- inst2.FullSrcRegisters[0] = inst->FullSrcRegisters[1];
- inst2.FullSrcRegisters[1] = inst->FullSrcRegisters[0];
+ inst2.Src[0] = inst->Src[1];
+ inst2.Src[1] = inst->Src[0];
emit_simple_arith(p, &inst2, opcode, numArgs);
}
@@ -423,10 +423,10 @@ i915_translate_instruction(struct i915_fp_compile *p,
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_ABS:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
i915_emit_arith(p,
A0_MAX,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
src0, negate(src0, 1, 1, 1, 1), 0);
break;
@@ -436,17 +436,17 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_CMP:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
- src2 = src_vector(p, &inst->FullSrcRegisters[2]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
+ src2 = src_vector(p, &inst->Src[2]);
i915_emit_arith(p, A0_CMP,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst),
0, src0, src2, src1); /* NOTE: order of src2, src1 */
break;
case TGSI_OPCODE_COS:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
tmp = i915_get_utemp(p);
i915_emit_arith(p,
@@ -489,7 +489,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
i915_emit_arith(p,
A0_DP4,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(tmp, ONE, Z, Y, X),
i915_emit_const4fv(p, cos_constants), 0);
@@ -504,19 +504,19 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_DPH:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
i915_emit_arith(p,
A0_DP4,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, X, Y, Z, ONE), src1, 0);
break;
case TGSI_OPCODE_DST:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
/* result[0] = 1 * 1;
* result[1] = a[1] * b[1];
@@ -525,7 +525,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
*/
i915_emit_arith(p,
A0_MUL,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, ONE, Y, Z, ONE),
swizzle(src1, ONE, Y, ONE, W), 0);
@@ -536,11 +536,11 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_EX2:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
i915_emit_arith(p,
A0_EXP,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, X, X, X, X), 0, 0);
break;
@@ -555,7 +555,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
case TGSI_OPCODE_KIL:
/* kill if src[0].x < 0 || src[0].y < 0 ... */
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
tmp = i915_get_utemp(p);
i915_emit_texld(p,
@@ -571,17 +571,17 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_LG2:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
i915_emit_arith(p,
A0_LOG,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, X, X, X, X), 0, 0);
break;
case TGSI_OPCODE_LIT:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
tmp = i915_get_utemp(p);
/* tmp = max( a.xyzw, a.00zw )
@@ -605,7 +605,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
swizzle(tmp, Y, Y, Y, Y), 0, 0);
i915_emit_arith(p, A0_CMP,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
negate(swizzle(tmp, ONE, ONE, X, ONE), 0, 0, 1, 0),
swizzle(tmp, ONE, X, ZERO, ONE),
@@ -614,9 +614,9 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_LRP:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
- src2 = src_vector(p, &inst->FullSrcRegisters[2]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
+ src2 = src_vector(p, &inst->Src[2]);
flags = get_result_flags(inst);
tmp = i915_get_utemp(p);
@@ -631,7 +631,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
flags & A0_DEST_CHANNEL_ALL, 0, src1, src0, src2);
i915_emit_arith(p, A0_MAD,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
flags, 0, negate(src2, 1, 1, 1, 1), src0, tmp);
break;
@@ -644,8 +644,8 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_MIN:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
tmp = i915_get_utemp(p);
flags = get_result_flags(inst);
@@ -657,7 +657,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
i915_emit_arith(p,
A0_MOV,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
flags, 0, negate(tmp, 1, 1, 1, 1), 0, 0);
break;
@@ -670,8 +670,8 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_POW:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
tmp = i915_get_utemp(p);
flags = get_result_flags(inst);
@@ -686,7 +686,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
i915_emit_arith(p,
A0_EXP,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
flags, 0, swizzle(tmp, X, X, X, X), 0, 0);
break;
@@ -695,27 +695,27 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_RCP:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
i915_emit_arith(p,
A0_RCP,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, X, X, X, X), 0, 0);
break;
case TGSI_OPCODE_RSQ:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
i915_emit_arith(p,
A0_RSQ,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, X, X, X, X), 0, 0);
break;
case TGSI_OPCODE_SCS:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
tmp = i915_get_utemp(p);
/*
@@ -738,7 +738,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
swizzle(tmp, X, Y, X, Y),
swizzle(tmp, X, X, ONE, ONE), 0);
- writemask = inst->FullDstRegisters[0].DstRegister.WriteMask;
+ writemask = inst->Dst[0].DstRegister.WriteMask;
if (writemask & TGSI_WRITEMASK_Y) {
uint tmp1;
@@ -756,7 +756,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
i915_emit_arith(p,
A0_DP4,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
A0_DEST_CHANNEL_Y, 0,
swizzle(tmp1, W, Z, Y, X),
i915_emit_const4fv(p, sin_constants), 0);
@@ -771,7 +771,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
i915_emit_arith(p,
A0_DP4,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
A0_DEST_CHANNEL_X, 0,
swizzle(tmp, ONE, Z, Y, X),
i915_emit_const4fv(p, cos_constants), 0);
@@ -788,7 +788,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_SIN:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
tmp = i915_get_utemp(p);
i915_emit_arith(p,
@@ -831,7 +831,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
i915_emit_arith(p,
A0_DP4,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(tmp, W, Z, Y, X),
i915_emit_const4fv(p, sin_constants), 0);
@@ -847,12 +847,12 @@ i915_translate_instruction(struct i915_fp_compile *p,
break;
case TGSI_OPCODE_SUB:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
i915_emit_arith(p,
A0_ADD,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
src0, negate(src1, 1, 1, 1, 1), 0);
break;
@@ -876,8 +876,8 @@ i915_translate_instruction(struct i915_fp_compile *p,
* result.z = src0.x * src1.y - src0.y * src1.x;
* result.w = undef;
*/
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
tmp = i915_get_utemp(p);
i915_emit_arith(p,
@@ -888,7 +888,7 @@ i915_translate_instruction(struct i915_fp_compile *p,
i915_emit_arith(p,
A0_MAD,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, Y, Z, X, ONE),
swizzle(src1, Z, X, Y, ONE),
diff --git a/src/gallium/drivers/llvmpipe/lp_bld_tgsi_soa.c b/src/gallium/drivers/llvmpipe/lp_bld_tgsi_soa.c
index b2234ef6798..893e665e691 100644
--- a/src/gallium/drivers/llvmpipe/lp_bld_tgsi_soa.c
+++ b/src/gallium/drivers/llvmpipe/lp_bld_tgsi_soa.c
@@ -64,7 +64,7 @@
for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)
#define IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
- ((INST)->FullDstRegisters[0].DstRegister.WriteMask & (1 << (CHAN)))
+ ((INST)->Dst[0].DstRegister.WriteMask & (1 << (CHAN)))
#define IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
if (IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
@@ -157,7 +157,7 @@ emit_fetch(
unsigned index,
const unsigned chan_index )
{
- const struct tgsi_full_src_register *reg = &inst->FullSrcRegisters[index];
+ const struct tgsi_full_src_register *reg = &inst->Src[index];
unsigned swizzle = tgsi_util_get_full_src_register_swizzle( reg, chan_index );
LLVMValueRef res;
@@ -267,7 +267,7 @@ emit_store(
unsigned chan_index,
LLVMValueRef value)
{
- const struct tgsi_full_dst_register *reg = &inst->FullDstRegisters[index];
+ const struct tgsi_full_dst_register *reg = &inst->Dst[index];
switch( inst->Instruction.Saturate ) {
case TGSI_SAT_NONE:
@@ -319,14 +319,14 @@ emit_tex( struct lp_build_tgsi_soa_context *bld,
boolean projected,
LLVMValueRef *texel)
{
- const uint unit = inst->FullSrcRegisters[1].SrcRegister.Index;
+ const uint unit = inst->Src[1].SrcRegister.Index;
LLVMValueRef lodbias;
LLVMValueRef oow;
LLVMValueRef coords[3];
unsigned num_coords;
unsigned i;
- switch (inst->InstructionTexture.Texture) {
+ switch (inst->Texture.Texture) {
case TGSI_TEXTURE_1D:
num_coords = 1;
break;
@@ -375,7 +375,7 @@ emit_kil(
struct lp_build_tgsi_soa_context *bld,
const struct tgsi_full_instruction *inst )
{
- const struct tgsi_full_src_register *reg = &inst->FullSrcRegisters[0];
+ const struct tgsi_full_src_register *reg = &inst->Src[0];
LLVMValueRef terms[NUM_CHANNELS];
LLVMValueRef mask;
unsigned chan_index;
@@ -423,13 +423,13 @@ indirect_temp_reference(const struct tgsi_full_instruction *inst)
{
uint i;
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
- const struct tgsi_full_src_register *reg = &inst->FullSrcRegisters[i];
+ const struct tgsi_full_src_register *reg = &inst->Src[i];
if (reg->SrcRegister.File == TGSI_FILE_TEMPORARY &&
reg->SrcRegister.Indirect)
return TRUE;
}
for (i = 0; i < inst->Instruction.NumDstRegs; i++) {
- const struct tgsi_full_dst_register *reg = &inst->FullDstRegisters[i];
+ const struct tgsi_full_dst_register *reg = &inst->Dst[i];
if (reg->DstRegister.File == TGSI_FILE_TEMPORARY &&
reg->DstRegister.Indirect)
return TRUE;
diff --git a/src/gallium/drivers/nv20/nv20_vertprog.c b/src/gallium/drivers/nv20/nv20_vertprog.c
index cd769107440..e82a23d4755 100644
--- a/src/gallium/drivers/nv20/nv20_vertprog.c
+++ b/src/gallium/drivers/nv20/nv20_vertprog.c
@@ -334,7 +334,7 @@ nv20_vertprog_parse_instruction(struct nv20_vpc *vpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
+ fsrc = &finst->Src[i];
if (fsrc->SrcRegister.File == TGSI_FILE_TEMPORARY) {
src[i] = tgsi_src(vpc, fsrc);
}
@@ -343,7 +343,7 @@ nv20_vertprog_parse_instruction(struct nv20_vpc *vpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
+ fsrc = &finst->Src[i];
switch (fsrc->SrcRegister.File) {
case TGSI_FILE_INPUT:
if (ai == -1 || ai == fsrc->SrcRegister.Index) {
@@ -378,8 +378,8 @@ nv20_vertprog_parse_instruction(struct nv20_vpc *vpc,
}
}
- dst = tgsi_dst(vpc, &finst->FullDstRegisters[0]);
- mask = tgsi_mask(finst->FullDstRegisters[0].DstRegister.WriteMask);
+ dst = tgsi_dst(vpc, &finst->Dst[0]);
+ mask = tgsi_mask(finst->Dst[0].DstRegister.WriteMask);
switch (finst->Instruction.Opcode) {
case TGSI_OPCODE_ABS:
diff --git a/src/gallium/drivers/nv30/nv30_fragprog.c b/src/gallium/drivers/nv30/nv30_fragprog.c
index acf216bb61d..dfffeb32639 100644
--- a/src/gallium/drivers/nv30/nv30_fragprog.c
+++ b/src/gallium/drivers/nv30/nv30_fragprog.c
@@ -363,7 +363,7 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
+ fsrc = &finst->Src[i];
if (fsrc->SrcRegister.File == TGSI_FILE_TEMPORARY) {
src[i] = tgsi_src(fpc, fsrc);
}
@@ -372,7 +372,7 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
+ fsrc = &finst->Src[i];
switch (fsrc->SrcRegister.File) {
case TGSI_FILE_INPUT:
@@ -423,8 +423,8 @@ nv30_fragprog_parse_instruction(struct nv30_fpc *fpc,
}
}
- dst = tgsi_dst(fpc, &finst->FullDstRegisters[0]);
- mask = tgsi_mask(finst->FullDstRegisters[0].DstRegister.WriteMask);
+ dst = tgsi_dst(fpc, &finst->Dst[0]);
+ mask = tgsi_mask(finst->Dst[0].DstRegister.WriteMask);
sat = (finst->Instruction.Saturate == TGSI_SAT_ZERO_ONE);
switch (finst->Instruction.Opcode) {
diff --git a/src/gallium/drivers/nv30/nv30_vertprog.c b/src/gallium/drivers/nv30/nv30_vertprog.c
index e8fba8ab162..41bd45ad29c 100644
--- a/src/gallium/drivers/nv30/nv30_vertprog.c
+++ b/src/gallium/drivers/nv30/nv30_vertprog.c
@@ -334,7 +334,7 @@ nv30_vertprog_parse_instruction(struct nv30_vpc *vpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
+ fsrc = &finst->Src[i];
if (fsrc->SrcRegister.File == TGSI_FILE_TEMPORARY) {
src[i] = tgsi_src(vpc, fsrc);
}
@@ -343,7 +343,7 @@ nv30_vertprog_parse_instruction(struct nv30_vpc *vpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
+ fsrc = &finst->Src[i];
switch (fsrc->SrcRegister.File) {
case TGSI_FILE_INPUT:
if (ai == -1 || ai == fsrc->SrcRegister.Index) {
@@ -378,8 +378,8 @@ nv30_vertprog_parse_instruction(struct nv30_vpc *vpc,
}
}
- dst = tgsi_dst(vpc, &finst->FullDstRegisters[0]);
- mask = tgsi_mask(finst->FullDstRegisters[0].DstRegister.WriteMask);
+ dst = tgsi_dst(vpc, &finst->Dst[0]);
+ mask = tgsi_mask(finst->Dst[0].DstRegister.WriteMask);
switch (finst->Instruction.Opcode) {
case TGSI_OPCODE_ABS:
diff --git a/src/gallium/drivers/nv40/nv40_fragprog.c b/src/gallium/drivers/nv40/nv40_fragprog.c
index ca6a957fc12..6addc452473 100644
--- a/src/gallium/drivers/nv40/nv40_fragprog.c
+++ b/src/gallium/drivers/nv40/nv40_fragprog.c
@@ -364,7 +364,7 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
+ fsrc = &finst->Src[i];
if (fsrc->SrcRegister.File == TGSI_FILE_TEMPORARY) {
src[i] = tgsi_src(fpc, fsrc);
}
@@ -373,7 +373,7 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
+ fsrc = &finst->Src[i];
switch (fsrc->SrcRegister.File) {
case TGSI_FILE_INPUT:
@@ -433,8 +433,8 @@ nv40_fragprog_parse_instruction(struct nv40_fpc *fpc,
}
}
- dst = tgsi_dst(fpc, &finst->FullDstRegisters[0]);
- mask = tgsi_mask(finst->FullDstRegisters[0].DstRegister.WriteMask);
+ dst = tgsi_dst(fpc, &finst->Dst[0]);
+ mask = tgsi_mask(finst->Dst[0].DstRegister.WriteMask);
sat = (finst->Instruction.Saturate == TGSI_SAT_ZERO_ONE);
switch (finst->Instruction.Opcode) {
diff --git a/src/gallium/drivers/nv40/nv40_vertprog.c b/src/gallium/drivers/nv40/nv40_vertprog.c
index ed0f1d857d3..0cdc5111664 100644
--- a/src/gallium/drivers/nv40/nv40_vertprog.c
+++ b/src/gallium/drivers/nv40/nv40_vertprog.c
@@ -405,7 +405,7 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
+ fsrc = &finst->Src[i];
if (fsrc->SrcRegister.File == TGSI_FILE_TEMPORARY) {
src[i] = tgsi_src(vpc, fsrc);
}
@@ -414,7 +414,7 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,
for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
const struct tgsi_full_src_register *fsrc;
- fsrc = &finst->FullSrcRegisters[i];
+ fsrc = &finst->Src[i];
switch (fsrc->SrcRegister.File) {
case TGSI_FILE_INPUT:
@@ -469,8 +469,8 @@ nv40_vertprog_parse_instruction(struct nv40_vpc *vpc,
}
}
- dst = tgsi_dst(vpc, &finst->FullDstRegisters[0]);
- mask = tgsi_mask(finst->FullDstRegisters[0].DstRegister.WriteMask);
+ dst = tgsi_dst(vpc, &finst->Dst[0]);
+ mask = tgsi_mask(finst->Dst[0].DstRegister.WriteMask);
switch (finst->Instruction.Opcode) {
case TGSI_OPCODE_ABS:
@@ -681,7 +681,7 @@ nv40_vertprog_prepare(struct nv40_vpc *vpc)
const struct tgsi_full_dst_register *fdst;
finst = &p.FullToken.FullInstruction;
- fdst = &finst->FullDstRegisters[0];
+ fdst = &finst->Dst[0];
if (fdst->DstRegister.File == TGSI_FILE_ADDRESS) {
if (fdst->DstRegister.Index > high_addr)
diff --git a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c
index 00518af8c0e..9fbf918601a 100644
--- a/src/gallium/drivers/nv50/nv50_program.c
+++ b/src/gallium/drivers/nv50/nv50_program.c
@@ -1535,10 +1535,10 @@ negate_supported(const struct tgsi_full_instruction *insn, int i)
for (s = 0; s < insn->Instruction.NumSrcRegs; ++s) {
if (s == i)
continue;
- if ((insn->FullSrcRegisters[s].SrcRegister.Index ==
- insn->FullSrcRegisters[i].SrcRegister.Index) &&
- (insn->FullSrcRegisters[s].SrcRegister.File ==
- insn->FullSrcRegisters[i].SrcRegister.File))
+ if ((insn->Src[s].SrcRegister.Index ==
+ insn->Src[i].SrcRegister.Index) &&
+ (insn->Src[s].SrcRegister.File ==
+ insn->Src[i].SrcRegister.File))
return FALSE;
}
@@ -1549,7 +1549,7 @@ negate_supported(const struct tgsi_full_instruction *insn, int i)
static unsigned
nv50_tgsi_src_mask(const struct tgsi_full_instruction *insn, int c)
{
- unsigned x, mask = insn->FullDstRegisters[0].DstRegister.WriteMask;
+ unsigned x, mask = insn->Dst[0].DstRegister.WriteMask;
switch (insn->Instruction.Opcode) {
case TGSI_OPCODE_COS:
@@ -1578,7 +1578,7 @@ nv50_tgsi_src_mask(const struct tgsi_full_instruction *insn, int c)
const struct tgsi_instruction_texture *tex;
assert(insn->Instruction.Texture);
- tex = &insn->InstructionTexture;
+ tex = &insn->Texture;
mask = 0x7;
if (insn->Instruction.Opcode == TGSI_OPCODE_TXP)
@@ -1850,21 +1850,21 @@ nv50_program_tx_insn(struct nv50_pc *pc,
unsigned mask, sat, unit;
int i, c;
- mask = inst->FullDstRegisters[0].DstRegister.WriteMask;
+ mask = inst->Dst[0].DstRegister.WriteMask;
sat = inst->Instruction.Saturate == TGSI_SAT_ZERO_ONE;
memset(src, 0, sizeof(src));
for (c = 0; c < 4; c++) {
if ((mask & (1 << c)) && !pc->r_dst[c])
- dst[c] = tgsi_dst(pc, c, &inst->FullDstRegisters[0]);
+ dst[c] = tgsi_dst(pc, c, &inst->Dst[0]);
else
dst[c] = pc->r_dst[c];
rdst[c] = dst[c];
}
for (i = 0; i < inst->Instruction.NumSrcRegs; i++) {
- const struct tgsi_full_src_register *fs = &inst->FullSrcRegisters[i];
+ const struct tgsi_full_src_register *fs = &inst->Src[i];
unsigned src_mask;
boolean neg_supp;
@@ -2181,11 +2181,11 @@ nv50_program_tx_insn(struct nv50_pc *pc,
break;
case TGSI_OPCODE_TEX:
emit_tex(pc, dst, mask, src[0], unit,
- inst->InstructionTexture.Texture, FALSE);
+ inst->Texture.Texture, FALSE);
break;
case TGSI_OPCODE_TXP:
emit_tex(pc, dst, mask, src[0], unit,
- inst->InstructionTexture.Texture, TRUE);
+ inst->Texture.Texture, TRUE);
break;
case TGSI_OPCODE_TRUNC:
for (c = 0; c < 4; c++) {
@@ -2264,7 +2264,7 @@ prep_inspect_insn(struct nv50_pc *pc, const struct tgsi_full_instruction *insn)
const struct tgsi_dst_register *dst;
unsigned i, c, k, mask;
- dst = &insn->FullDstRegisters[0].DstRegister;
+ dst = &insn->Dst[0].DstRegister;
mask = dst->WriteMask;
if (dst->File == TGSI_FILE_TEMPORARY)
@@ -2282,7 +2282,7 @@ prep_inspect_insn(struct nv50_pc *pc, const struct tgsi_full_instruction *insn)
}
for (i = 0; i < insn->Instruction.NumSrcRegs; i++) {
- src = &insn->FullSrcRegisters[i];
+ src = &insn->Src[i];
if (src->SrcRegister.File == TGSI_FILE_TEMPORARY)
reg = pc->temp;
@@ -2379,7 +2379,7 @@ static unsigned
nv50_tgsi_scan_swizzle(const struct tgsi_full_instruction *insn,
unsigned rdep[4])
{
- const struct tgsi_full_dst_register *fd = &insn->FullDstRegisters[0];
+ const struct tgsi_full_dst_register *fd = &insn->Dst[0];
const struct tgsi_full_src_register *fs;
unsigned i, deqs = 0;
@@ -2390,7 +2390,7 @@ nv50_tgsi_scan_swizzle(const struct tgsi_full_instruction *insn,
unsigned chn, mask = nv50_tgsi_src_mask(insn, i);
boolean neg_supp = negate_supported(insn, i);
- fs = &insn->FullSrcRegisters[i];
+ fs = &insn->Src[i];
if (fs->SrcRegister.File != fd->DstRegister.File ||
fs->SrcRegister.Index != fd->DstRegister.Index)
continue;
@@ -2427,7 +2427,7 @@ nv50_tgsi_insn(struct nv50_pc *pc, const union tgsi_full_token *tok)
const struct tgsi_full_dst_register *fd;
unsigned i, deqs, rdep[4], m[4];
- fd = &tok->FullInstruction.FullDstRegisters[0];
+ fd = &tok->FullInstruction.Dst[0];
deqs = nv50_tgsi_scan_swizzle(&insn, rdep);
if (is_scalar_op(insn.Instruction.Opcode)) {
@@ -2446,10 +2446,10 @@ nv50_tgsi_insn(struct nv50_pc *pc, const union tgsi_full_token *tok)
for (i = 0; i < 4; ++i) {
assert(pc->r_dst[m[i]] == NULL);
- insn.FullDstRegisters[0].DstRegister.WriteMask =
+ insn.Dst[0].DstRegister.WriteMask =
fd->DstRegister.WriteMask & (1 << m[i]);
- if (!insn.FullDstRegisters[0].DstRegister.WriteMask)
+ if (!insn.Dst[0].DstRegister.WriteMask)
continue;
if (deqs & (1 << i))
diff --git a/src/gallium/drivers/r300/r300_tgsi_to_rc.c b/src/gallium/drivers/r300/r300_tgsi_to_rc.c
index 25a634e5a24..82466e245a9 100644
--- a/src/gallium/drivers/r300/r300_tgsi_to_rc.c
+++ b/src/gallium/drivers/r300/r300_tgsi_to_rc.c
@@ -258,18 +258,18 @@ static void transform_instruction(struct tgsi_to_rc * ttr, struct tgsi_full_inst
dst->U.I.SaturateMode = translate_saturate(src->Instruction.Saturate);
if (src->Instruction.NumDstRegs)
- transform_dstreg(ttr, &dst->U.I.DstReg, &src->FullDstRegisters[0]);
+ transform_dstreg(ttr, &dst->U.I.DstReg, &src->Dst[0]);
for(i = 0; i < src->Instruction.NumSrcRegs; ++i) {
- if (src->FullSrcRegisters[i].SrcRegister.File == TGSI_FILE_SAMPLER)
- dst->U.I.TexSrcUnit = src->FullSrcRegisters[i].SrcRegister.Index;
+ if (src->Src[i].SrcRegister.File == TGSI_FILE_SAMPLER)
+ dst->U.I.TexSrcUnit = src->Src[i].SrcRegister.Index;
else
- transform_srcreg(ttr, &dst->U.I.SrcReg[i], &src->FullSrcRegisters[i]);
+ transform_srcreg(ttr, &dst->U.I.SrcReg[i], &src->Src[i]);
}
/* Texturing. */
if (src->Instruction.Texture)
- transform_texture(dst, src->InstructionTexture);
+ transform_texture(dst, src->Texture);
}
static void handle_immediate(struct tgsi_to_rc * ttr, struct tgsi_full_immediate * imm)
diff --git a/src/gallium/drivers/svga/svga_tgsi_insn.c b/src/gallium/drivers/svga/svga_tgsi_insn.c
index 3ef6cb1074d..39fd7a60259 100644
--- a/src/gallium/drivers/svga/svga_tgsi_insn.c
+++ b/src/gallium/drivers/svga/svga_tgsi_insn.c
@@ -96,7 +96,7 @@ translate_dst_register( struct svga_shader_emitter *emit,
const struct tgsi_full_instruction *insn,
unsigned idx )
{
- const struct tgsi_full_dst_register *reg = &insn->FullDstRegisters[idx];
+ const struct tgsi_full_dst_register *reg = &insn->Dst[idx];
SVGA3dShaderDestToken dest;
switch (reg->DstRegister.File) {
@@ -629,7 +629,7 @@ static boolean emit_fake_arl(struct svga_shader_emitter *emit,
const struct tgsi_full_instruction *insn)
{
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
struct src_register src1 = get_fake_arl_const( emit );
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
SVGA3dShaderDestToken tmp = get_temp( emit );
@@ -653,7 +653,7 @@ static boolean emit_if(struct svga_shader_emitter *emit,
const struct tgsi_full_instruction *insn)
{
const struct src_register src = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
struct src_register zero = get_zero_immediate( emit );
SVGA3dShaderInstToken if_token = inst_token( SVGA3DOP_IFC );
@@ -690,7 +690,7 @@ static boolean emit_floor(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
SVGA3dShaderDestToken temp = get_temp( emit );
/* FRC TMP, SRC */
@@ -716,11 +716,11 @@ static boolean emit_cmp(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
const struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
const struct src_register src2 = translate_src_register(
- emit, &insn->FullSrcRegisters[2] );
+ emit, &insn->Src[2] );
/* CMP DST, SRC0, SRC2, SRC1 */
return submit_op3( emit, inst_token( SVGA3DOP_CMP ), dst, src0, src2, src1);
@@ -740,9 +740,9 @@ static boolean emit_div(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
const struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
SVGA3dShaderDestToken temp = get_temp( emit );
int i;
@@ -782,9 +782,9 @@ static boolean emit_dp2(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
const struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
SVGA3dShaderDestToken temp = get_temp( emit );
struct src_register temp_src0, temp_src1;
@@ -815,9 +815,9 @@ static boolean emit_dph(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
SVGA3dShaderDestToken temp = get_temp( emit );
/* DP3 TMP, SRC1, SRC2 */
@@ -846,7 +846,7 @@ static boolean emit_nrm(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
SVGA3dShaderDestToken temp = get_temp( emit );
/* DP3 TMP, SRC, SRC */
@@ -889,7 +889,7 @@ static boolean emit_sincos(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
SVGA3dShaderDestToken temp = get_temp( emit );
/* SCS TMP SRC */
@@ -912,7 +912,7 @@ static boolean emit_sin(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
SVGA3dShaderDestToken temp = get_temp( emit );
/* SCS TMP SRC */
@@ -937,7 +937,7 @@ static boolean emit_cos(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
SVGA3dShaderDestToken temp = get_temp( emit );
/* SCS TMP SRC */
@@ -962,9 +962,9 @@ static boolean emit_sub(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
src1 = negate(src1);
@@ -980,7 +980,7 @@ static boolean emit_kil(struct svga_shader_emitter *emit,
const struct tgsi_full_instruction *insn )
{
SVGA3dShaderInstToken inst;
- const struct tgsi_full_src_register *reg = &insn->FullSrcRegisters[0];
+ const struct tgsi_full_src_register *reg = &insn->Src[0];
struct src_register src0;
inst = inst_token( SVGA3DOP_TEXKILL );
@@ -1154,9 +1154,9 @@ static boolean emit_select_op(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
return emit_select( emit, compare, dst, src0, src1 );
}
@@ -1189,8 +1189,8 @@ static boolean emit_tex2(struct svga_shader_emitter *emit,
return FALSE;
}
- src0 = translate_src_register( emit, &insn->FullSrcRegisters[0] );
- src1 = translate_src_register( emit, &insn->FullSrcRegisters[1] );
+ src0 = translate_src_register( emit, &insn->Src[0] );
+ src1 = translate_src_register( emit, &insn->Src[1] );
if (emit->key.fkey.tex[src1.base.num].unnormalized) {
struct src_register wh = get_tex_dimensions( emit, src1.base.num );
@@ -1231,9 +1231,9 @@ static boolean emit_tex3(struct svga_shader_emitter *emit,
break;
}
- src0 = translate_src_register( emit, &insn->FullSrcRegisters[0] );
- src1 = translate_src_register( emit, &insn->FullSrcRegisters[1] );
- src2 = translate_src_register( emit, &insn->FullSrcRegisters[2] );
+ src0 = translate_src_register( emit, &insn->Src[0] );
+ src1 = translate_src_register( emit, &insn->Src[1] );
+ src2 = translate_src_register( emit, &insn->Src[2] );
return submit_op3( emit, inst, dst, src0, src1, src2 );
}
@@ -1245,9 +1245,9 @@ static boolean emit_tex(struct svga_shader_emitter *emit,
SVGA3dShaderDestToken dst =
translate_dst_register( emit, insn, 0 );
struct src_register src0 =
- translate_src_register( emit, &insn->FullSrcRegisters[0] );
+ translate_src_register( emit, &insn->Src[0] );
struct src_register src1 =
- translate_src_register( emit, &insn->FullSrcRegisters[1] );
+ translate_src_register( emit, &insn->Src[1] );
SVGA3dShaderDestToken tex_result;
@@ -1359,7 +1359,7 @@ static boolean emit_scalar_op1( struct svga_shader_emitter *emit,
inst = inst_token( opcode );
dst = translate_dst_register( emit, insn, 0 );
- src = translate_src_register( emit, &insn->FullSrcRegisters[0] );
+ src = translate_src_register( emit, &insn->Src[0] );
src = scalar( src, TGSI_SWIZZLE_X );
return submit_op1( emit, inst, dst, src );
@@ -1370,7 +1370,7 @@ static boolean emit_simple_instruction(struct svga_shader_emitter *emit,
unsigned opcode,
const struct tgsi_full_instruction *insn )
{
- const struct tgsi_full_src_register *src = insn->FullSrcRegisters;
+ const struct tgsi_full_src_register *src = insn->Src;
SVGA3dShaderInstToken inst;
SVGA3dShaderDestToken dst;
@@ -1428,13 +1428,13 @@ static boolean emit_pow(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
boolean need_tmp = FALSE;
/* POW can only output to a temporary */
- if (insn->FullDstRegisters[0].DstRegister.File != TGSI_FILE_TEMPORARY)
+ if (insn->Dst[0].DstRegister.File != TGSI_FILE_TEMPORARY)
need_tmp = TRUE;
/* POW src1 must not be the same register as dst */
@@ -1463,9 +1463,9 @@ static boolean emit_xpd(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
const struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
boolean need_dst_tmp = FALSE;
/* XPD can only output to a temporary */
@@ -1517,11 +1517,11 @@ static boolean emit_lrp(struct svga_shader_emitter *emit,
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
SVGA3dShaderDestToken tmp;
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
const struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
const struct src_register src2 = translate_src_register(
- emit, &insn->FullSrcRegisters[2] );
+ emit, &insn->Src[2] );
boolean need_dst_tmp = FALSE;
/* The dst reg must not be the same as src0 or src2 */
@@ -1568,9 +1568,9 @@ static boolean emit_dst_insn(struct svga_shader_emitter *emit,
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
SVGA3dShaderDestToken tmp;
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
const struct src_register src1 = translate_src_register(
- emit, &insn->FullSrcRegisters[1] );
+ emit, &insn->Src[1] );
struct src_register zero = get_zero_immediate( emit );
boolean need_tmp = FALSE;
@@ -1633,7 +1633,7 @@ static boolean emit_exp(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
struct src_register src0 =
- translate_src_register( emit, &insn->FullSrcRegisters[0] );
+ translate_src_register( emit, &insn->Src[0] );
struct src_register zero = get_zero_immediate( emit );
SVGA3dShaderDestToken fraction;
@@ -1723,7 +1723,7 @@ static boolean emit_lit(struct svga_shader_emitter *emit,
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
SVGA3dShaderDestToken tmp = get_temp( emit );
const struct src_register src0 = translate_src_register(
- emit, &insn->FullSrcRegisters[0] );
+ emit, &insn->Src[0] );
struct src_register zero = get_zero_immediate( emit );
/* tmp = pow(src.y, src.w)
@@ -1806,7 +1806,7 @@ static boolean emit_ex2( struct svga_shader_emitter *emit,
inst = inst_token( SVGA3DOP_EXP );
dst = translate_dst_register( emit, insn, 0 );
- src0 = translate_src_register( emit, &insn->FullSrcRegisters[0] );
+ src0 = translate_src_register( emit, &insn->Src[0] );
src0 = scalar( src0, TGSI_SWIZZLE_X );
if (dst.mask != TGSI_WRITEMASK_XYZW) {
@@ -1829,7 +1829,7 @@ static boolean emit_log(struct svga_shader_emitter *emit,
{
SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
struct src_register src0 =
- translate_src_register( emit, &insn->FullSrcRegisters[0] );
+ translate_src_register( emit, &insn->Src[0] );
struct src_register zero = get_zero_immediate( emit );
SVGA3dShaderDestToken abs_tmp;
struct src_register abs_src0;
@@ -1953,7 +1953,7 @@ static boolean emit_bgnsub( struct svga_shader_emitter *emit,
static boolean emit_call( struct svga_shader_emitter *emit,
const struct tgsi_full_instruction *insn )
{
- unsigned position = insn->InstructionLabel.Label;
+ unsigned position = insn->Label.Label;
unsigned i;
for (i = 0; i < emit->nr_labels; i++) {
@@ -2543,25 +2543,25 @@ pre_parse_instruction( struct svga_shader_emitter *emit,
const struct tgsi_full_instruction *insn,
int current_arl)
{
- if (insn->FullSrcRegisters[0].SrcRegister.Indirect &&
- insn->FullSrcRegisters[0].SrcRegisterInd.File == TGSI_FILE_ADDRESS) {
- const struct tgsi_full_src_register *reg = &insn->FullSrcRegisters[0];
+ if (insn->Src[0].SrcRegister.Indirect &&
+ insn->Src[0].SrcRegisterInd.File == TGSI_FILE_ADDRESS) {
+ const struct tgsi_full_src_register *reg = &insn->Src[0];
if (reg->SrcRegister.Index < 0) {
pre_parse_add_indirect(emit, reg->SrcRegister.Index, current_arl);
}
}
- if (insn->FullSrcRegisters[1].SrcRegister.Indirect &&
- insn->FullSrcRegisters[1].SrcRegisterInd.File == TGSI_FILE_ADDRESS) {
- const struct tgsi_full_src_register *reg = &insn->FullSrcRegisters[1];
+ if (insn->Src[1].SrcRegister.Indirect &&
+ insn->Src[1].SrcRegisterInd.File == TGSI_FILE_ADDRESS) {
+ const struct tgsi_full_src_register *reg = &insn->Src[1];
if (reg->SrcRegister.Index < 0) {
pre_parse_add_indirect(emit, reg->SrcRegister.Index, current_arl);
}
}
- if (insn->FullSrcRegisters[2].SrcRegister.Indirect &&
- insn->FullSrcRegisters[2].SrcRegisterInd.File == TGSI_FILE_ADDRESS) {
- const struct tgsi_full_src_register *reg = &insn->FullSrcRegisters[2];
+ if (insn->Src[2].SrcRegister.Indirect &&
+ insn->Src[2].SrcRegisterInd.File == TGSI_FILE_ADDRESS) {
+ const struct tgsi_full_src_register *reg = &insn->Src[2];
if (reg->SrcRegister.Index < 0) {
pre_parse_add_indirect(emit, reg->SrcRegister.Index, current_arl);
}