virgl: native fence fd support

Following the support for fences on the virtio driver add support
for native fence on virgl. This was somewhat based on the freedeno one.

Signed-off-by: Gustavo Padovan <[email protected]>
Signed-off-by: Robert Foss <[email protected]>
Reviewed-by: Emil Velikov <[email protected]>

3 files changed, 62 insertions, 10 deletions

diff --git a/src/gallium/drivers/virgl/virgl_context.c b/src/gallium/drivers/virgl/virgl_context.c
index 96932c473d8..9be7775abd3 100644
--- a/src/gallium/drivers/virgl/virgl_context.c
+++ b/src/gallium/drivers/virgl/virgl_context.c
@@ -21,6 +21,7 @@
  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  */
 
+#include <libsync.h>
 #include "pipe/p_shader_tokens.h"
 
 #include "pipe/p_context.h"
@@ -709,13 +710,20 @@ static void virgl_draw_vbo(struct pipe_context *ctx,
 
 }
 
-static void virgl_flush_eq(struct virgl_context *ctx, void *closure)
+static void virgl_flush_eq(struct virgl_context *ctx, void *closure,
+			   struct pipe_fence_handle **fence)
 {
    struct virgl_screen *rs = virgl_screen(ctx->base.screen);
+   int out_fence_fd = -1;
 
    /* send the buffer to the remote side for decoding */
    ctx->num_transfers = ctx->num_draws = 0;
-   rs->vws->submit_cmd(rs->vws, ctx->cbuf);
+
+   rs->vws->submit_cmd(rs->vws, ctx->cbuf, ctx->cbuf->in_fence_fd,
+                       ctx->cbuf->needs_out_fence_fd ? &out_fence_fd : NULL);
+
+   if (fence)
+      *fence = rs->vws->cs_create_fence(rs->vws, out_fence_fd);
 
    virgl_encoder_set_sub_ctx(ctx, ctx->hw_sub_ctx_id);
 
@@ -728,11 +736,10 @@ static void virgl_flush_from_st(struct pipe_context *ctx,
                                enum pipe_flush_flags flags)
 {
    struct virgl_context *vctx = virgl_context(ctx);
-   struct virgl_screen *rs = virgl_screen(ctx->screen);
    struct virgl_buffer *buf, *tmp;
 
-   if (fence)
-      *fence = rs->vws->cs_create_fence(rs->vws);
+   if (flags & PIPE_FLUSH_FENCE_FD)
+       vctx->cbuf->needs_out_fence_fd = true;
 
    LIST_FOR_EACH_ENTRY_SAFE(buf, tmp, &vctx->to_flush_bufs, flush_list) {
       struct pipe_resource *res = &buf->base.u.b;
@@ -742,7 +749,13 @@ static void virgl_flush_from_st(struct pipe_context *ctx,
       pipe_resource_reference(&res, NULL);
 
    }
-   virgl_flush_eq(vctx, vctx);
+   virgl_flush_eq(vctx, vctx, fence);
+
+   if (vctx->cbuf->in_fence_fd != -1) {
+      close(vctx->cbuf->in_fence_fd);
+      vctx->cbuf->in_fence_fd = -1;
+   }
+   vctx->cbuf->needs_out_fence_fd = false;
 }
 
 static struct pipe_sampler_view *virgl_create_sampler_view(struct pipe_context *ctx,
@@ -1016,6 +1029,23 @@ static void virgl_set_shader_buffers(struct pipe_context *ctx,
    virgl_encode_set_shader_buffers(vctx, shader, start_slot, count, buffers);
 }
 
+static void virgl_create_fence_fd(struct pipe_context *ctx,
+			        struct pipe_fence_handle **fence, int fd)
+{
+   struct virgl_screen *rs = virgl_screen(ctx->screen);
+
+   *fence = rs->vws->cs_create_fence(rs->vws, fd);
+}
+
+static void virgl_fence_server_sync(struct pipe_context *ctx,
+			            struct pipe_fence_handle *fence)
+{
+   struct virgl_context *vctx = virgl_context(ctx);
+   struct virgl_screen *rs = virgl_screen(ctx->screen);
+
+   rs->vws->fence_server_sync(rs->vws, vctx->cbuf, fence);
+}
+
 static void virgl_set_shader_images(struct pipe_context *ctx,
                                     enum pipe_shader_type shader,
                                     unsigned start_slot, unsigned count,
@@ -1108,7 +1138,7 @@ virgl_context_destroy( struct pipe_context *ctx )
    vctx->framebuffer.zsbuf = NULL;
    vctx->framebuffer.nr_cbufs = 0;
    virgl_encoder_destroy_sub_ctx(vctx, vctx->hw_sub_ctx_id);
-   virgl_flush_eq(vctx, vctx);
+   virgl_flush_eq(vctx, vctx, NULL);
 
    rs->vws->cmd_buf_destroy(vctx->cbuf);
    if (vctx->uploader)
@@ -1244,6 +1274,8 @@ struct pipe_context *virgl_context_create(struct pipe_screen *pscreen,
    vctx->base.resource_copy_region = virgl_resource_copy_region;
    vctx->base.flush_resource = virgl_flush_resource;
    vctx->base.blit =  virgl_blit;
+   vctx->base.create_fence_fd = virgl_create_fence_fd;
+   vctx->base.fence_server_sync = virgl_fence_server_sync;
 
    vctx->base.set_shader_buffers = virgl_set_shader_buffers;
    vctx->base.set_hw_atomic_buffers = virgl_set_hw_atomic_buffers;
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c
index e71883b06f1..8addbea9e4c 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -340,7 +340,7 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
    case PIPE_CAP_VIDEO_MEMORY:
       return 0;
    case PIPE_CAP_NATIVE_FENCE_FD:
-      return 0;
+      return !!vscreen->vws->supports_fences;
    default:
       return u_pipe_screen_get_param_defaults(screen, param);
    }
@@ -721,6 +721,15 @@ static boolean virgl_fence_finish(struct pipe_screen *screen,
    return vws->fence_wait(vws, fence, timeout);
 }
 
+static int virgl_fence_get_fd(struct pipe_screen *screen,
+            struct pipe_fence_handle *fence)
+{
+   struct virgl_screen *vscreen = virgl_screen(screen);
+   struct virgl_winsys *vws = vscreen->vws;
+
+   return vws->fence_get_fd(vws, fence);
+}
+
 static uint64_t
 virgl_get_timestamp(struct pipe_screen *_screen)
 {
@@ -765,6 +774,7 @@ virgl_create_screen(struct virgl_winsys *vws)
    screen->base.fence_reference = virgl_fence_reference;
    //screen->base.fence_signalled = virgl_fence_signalled;
    screen->base.fence_finish = virgl_fence_finish;
+   screen->base.fence_get_fd = virgl_fence_get_fd;
 
    virgl_init_screen_resource_functions(&screen->base);
 
diff --git a/src/gallium/drivers/virgl/virgl_winsys.h b/src/gallium/drivers/virgl/virgl_winsys.h
index 0e6cb7953f6..d13212c5e84 100644
--- a/src/gallium/drivers/virgl/virgl_winsys.h
+++ b/src/gallium/drivers/virgl/virgl_winsys.h
@@ -40,10 +40,13 @@ struct virgl_drm_caps {
 struct virgl_cmd_buf {
    unsigned cdw;
    uint32_t *buf;
+   int in_fence_fd;
+   bool needs_out_fence_fd;
 };
 
 struct virgl_winsys {
    unsigned pci_id;
+   int supports_fences; /* In/Out fences are supported */
 
    void (*destroy)(struct virgl_winsys *vws);
 
@@ -83,7 +86,8 @@ struct virgl_winsys {
    void (*cmd_buf_destroy)(struct virgl_cmd_buf *buf);
 
    void (*emit_res)(struct virgl_winsys *vws, struct virgl_cmd_buf *buf, struct virgl_hw_res *res, boolean write_buffer);
-   int (*submit_cmd)(struct virgl_winsys *vws, struct virgl_cmd_buf *buf);
+   int (*submit_cmd)(struct virgl_winsys *vws, struct virgl_cmd_buf *buf,
+                     int32_t in_fence_fd, int32_t *out_fence_fd);
 
    boolean (*res_is_referenced)(struct virgl_winsys *vws,
                                 struct virgl_cmd_buf *buf,
@@ -92,7 +96,7 @@ struct virgl_winsys {
    int (*get_caps)(struct virgl_winsys *vws, struct virgl_drm_caps *caps);
 
    /* fence */
-   struct pipe_fence_handle *(*cs_create_fence)(struct virgl_winsys *vws);
+   struct pipe_fence_handle *(*cs_create_fence)(struct virgl_winsys *vws, int fd);
    bool (*fence_wait)(struct virgl_winsys *vws,
                       struct pipe_fence_handle *fence,
                       uint64_t timeout);
@@ -107,6 +111,12 @@ struct virgl_winsys {
                              unsigned level, unsigned layer,
                              void *winsys_drawable_handle,
                              struct pipe_box *sub_box);
+   void (*fence_server_sync)(struct virgl_winsys *vws,
+                             struct virgl_cmd_buf *cbuf,
+                             struct pipe_fence_handle *fence);
+
+   int (*fence_get_fd)(struct virgl_winsys *vws,
+                       struct pipe_fence_handle *fence);
 };
 
 /* this defaults all newer caps,