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authorMatt Turner <[email protected]>2016-01-13 11:09:11 -0800
committerMatt Turner <[email protected]>2016-01-14 09:28:01 -0800
commitb82e26a6a4d6baf121f44c61c862bfa79ba0d172 (patch)
treed8c97faf241b7ea0bd07ceccde1f59f5e7058986 /src/gallium/drivers/virgl/virgl_screen.c
parent15640ee77ae601cba33cbbc72256e55e03a363e5 (diff)
nir: Lower bitfield_extract.
The OpenGL specifications for bitfieldExtract() says: The result will be undefined if <offset> or <bits> is negative, or if the sum of <offset> and <bits> is greater than the number of bits used to store the operand. Therefore passing bits=32, offset=0 is legal and defined in GLSL. But the earlier SM5 ubfe/ibfe opcodes are specified to accept a bitfield width ranging from 0-31. As such, Intel and AMD instructions read only the low 5 bits of the width operand, making them not able to implement the GLSL-specified behavior directly. This commit adds ubfe/ibfe operations from SM5 and a lowering pass for bitfield_extract to to handle the trivial case of <bits> = 32 as bitfieldExtract: bits > 31 ? value : bfe(value, offset, bits) Fixes: ES31-CTS.shader_bitfield_operation.bitfieldExtract.uvec3_0 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92595 Reviewed-by: Connor Abbott <[email protected]> Tested-by: Marta Lofstedt <[email protected]>
Diffstat (limited to 'src/gallium/drivers/virgl/virgl_screen.c')
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