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| author | Lyude <[email protected]> | 2017-03-16 18:00:05 -0400 |
|---|---|---|
| committer | Ilia Mirkin <[email protected]> | 2017-03-31 21:41:24 -0400 |
| commit | ffe2bd676f332172a5faa053eff6460c1f184ef5 (patch) | |
| tree | 6f653bf858e92738b89c34f5c9d222a04acbe5fb /src/gallium/drivers/virgl/virgl_screen.c | |
| parent | 54af467334db53837171701471fb7854ccdf8dd5 (diff) | |
gallium: Add a cap to check if the driver supports fill_rectangle
Changes since v1:
- Add pipe caps for etnaviv, freedreno, swr and virgl
Signed-off-by: Lyude <[email protected]>
Reviewed-by: Ilia Mirkin <[email protected]>
Diffstat (limited to 'src/gallium/drivers/virgl/virgl_screen.c')
| -rw-r--r-- | src/gallium/drivers/virgl/virgl_screen.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c index 466ca55dfd0..75624b12579 100644 --- a/src/gallium/drivers/virgl/virgl_screen.c +++ b/src/gallium/drivers/virgl/virgl_screen.c @@ -257,6 +257,7 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param) case PIPE_CAP_INT64_DIVMOD: case PIPE_CAP_TGSI_TEX_TXF_LZ: case PIPE_CAP_TGSI_CLOCK: + case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE: return 0; case PIPE_CAP_VENDOR_ID: return 0x1af4; |