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author | Roland Scheidegger <[email protected]> | 2018-02-13 18:56:34 +0100 |
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committer | Roland Scheidegger <[email protected]> | 2018-02-14 02:06:54 +0100 |
commit | f6718baabc7d6fed0d41f72fb22e57c0d67fbf1d (patch) | |
tree | 28f6c6ecd16e78096b74f6e30fbb9f136a5202f3 /src/gallium/drivers/virgl/virgl_protocol.h | |
parent | 7461bd5b8f77652195bdb771232cb762b9b8758f (diff) |
tgsi: Recognize RET in main for tgsi_transform
Shaders coming from dx10 state trackers have a RET before the END.
And the epilog needs to be placed before the RET (otherwise it will
get ignored).
Hence figure out if a RET is in main, in this case we'll place
the epilog there rather than before the END.
(At a closer look, there actually seem to be problems with control
flow in general with output redirection, that would need another
look. It's enough however to fix draw's aa line emulation in some
internal bug - lines tend to be drawn with trivial shaders, moving
either a constant color or a vertex color directly to the output).
v2: add assert so buggy handling of RET in main is detected
Reviewed-by: Brian Paul <[email protected]>
Reviewed-by: Jose Fonseca <[email protected]>
Diffstat (limited to 'src/gallium/drivers/virgl/virgl_protocol.h')
0 files changed, 0 insertions, 0 deletions